22588 lines
1.6 MiB
22588 lines
1.6 MiB
; --------------------------------------------------------------------------------
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; @Title: Exynos5250 On-Chip Peripherals
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; @Props: Released
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; @Author: KAP, KRW
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; @Changelog: 2013-11-06
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; @Manufacturer: SAMSUNG - Samsung Semiconductor
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; @Doc: Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf
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; DDI0471A_gic400_r0p0_trm.pdf; IHI0048B_b_gic_architecture_specification.pdf
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; DDI0424B_dma330_r1p0_trm.pdf
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; @Core: Cortex-A15
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; @Chip: EXYNOS5250
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perexynos5250.per 12761 2021-01-18 10:24:52Z pegold $
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; Known Problems :
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; Display Controller
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; Page 15-60, 3 states described for only 1 bit data
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config 16. 8.
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sif (corename()=="CORTEXA15MPCORE")
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tree "Core Registers (Cortex-A15MPCore)"
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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width 10.
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tree "ID Registers"
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group.long c15:0x0++0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..."
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bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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textline " "
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bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical"
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x100++0x0
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line.long 0x0 "CTR,Cache Type Register"
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bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..."
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bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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textline " "
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bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
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bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
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bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..."
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endif
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rgroup.long c15:0x300++0x0
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line.long 0x0 "TLBTR,TLB Type Register"
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bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..."
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rgroup.long c15:0x500++0x0
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line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
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bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported"
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bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
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bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
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textline " "
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bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4"
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rgroup.long c15:0x400++0x0
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line.long 0x0 "MIDR2,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long c15:0x600++0x0
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line.long 0x0 "REVIDR,Revision ID Register"
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rgroup.long c15:0x700++0x0
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line.long 0x0 "MIDR3,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0410++0x00
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
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bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..."
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bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
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endif
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0510++0x00
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line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..."
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bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
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endif
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rgroup.long c15:0x0610++0x00
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
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bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
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rgroup.long c15:0x0710++0x00
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line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
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bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
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bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..."
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bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
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if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..."
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elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
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rgroup.long c15:0x0020++0x00
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line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
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bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..."
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bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..."
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endif
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rgroup.long c15:0x0120++0x00
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line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
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bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0220++0x00
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line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
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bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..."
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bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..."
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bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..."
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rgroup.long c15:0x0320++0x00
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line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
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bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..."
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bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0420++0x00
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line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
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bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..."
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bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..."
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bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..."
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textline " "
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bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..."
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bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
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bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
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rgroup.long c15:0x0010++0x00
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..."
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bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..."
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
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textline " "
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bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
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rgroup.long c15:0x0110++0x00
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line.long 0x00 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..."
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bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..."
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..."
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..."
|
|
if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented"
|
|
bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "System Control and Configuration"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified"
|
|
bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented"
|
|
bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented"
|
|
textline " "
|
|
bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
|
|
bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled"
|
|
bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced"
|
|
bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced"
|
|
bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes"
|
|
bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes"
|
|
bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes"
|
|
bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited"
|
|
bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed"
|
|
bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced"
|
|
bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced"
|
|
bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes"
|
|
bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited"
|
|
bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes"
|
|
bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes"
|
|
bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes"
|
|
bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches"
|
|
textline " "
|
|
bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes"
|
|
bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x140F++0x00
|
|
line.long 0x0 "ACTLR2,Auxiliary Control Register 2"
|
|
bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
hgroup.long c15:0x140F++0x00
|
|
hide.long 0x0 "ACTLR2,Auxiliary Control Register 2"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full"
|
|
endif
|
|
group.long c15:0x11++0x0
|
|
line.long 0x0 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted"
|
|
bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled"
|
|
bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
|
|
group.long c15:0x0111++0x00
|
|
line.long 0x00 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable"
|
|
bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
endif
|
|
group.long c15:0x000C++0x00
|
|
line.long 0x00 "VBAR,Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address"
|
|
group.long c15:0x010C++0x00
|
|
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address"
|
|
textline " "
|
|
rgroup.long c15:0x001C++0x00
|
|
line.long 0x00 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x400F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]"
|
|
else
|
|
hgroup.long c15:0x400F++0x00
|
|
hide.long 0x00 "CBAR,Configuration Base Address Register"
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x1609))&0x3)==0x3)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes"
|
|
bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x2)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes"
|
|
bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x1)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes"
|
|
bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
elif (((d.l(c15:0x1609))&0x3)==0x0)
|
|
group.long c15:0x1609++0x00
|
|
line.long 0x00 "SCUCTLR,SCU Control Register"
|
|
bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown"
|
|
bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4"
|
|
textline " "
|
|
endif
|
|
group.long c15:0x410F++0x00
|
|
line.long 0x00 "FILASTARTR,Peripheral port start address register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region"
|
|
bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid"
|
|
group.long c15:0x420F++0x00
|
|
line.long 0x00 "FILAENDR,Peripheral port end address register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
hgroup.long c15:0x1609++0x00
|
|
hide.long 0x00 "SCUCTLR,SCU Control Register"
|
|
hgroup.long c15:0x410F++0x00
|
|
hide.long 0x00 "FILASTARTR,Peripheral port start address register"
|
|
hgroup.long c15:0x420F++0x00
|
|
hide.long 0x00 "FILAENDR,Peripheral port end address register"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Memory Management Unit"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x10020++0x01
|
|
line.quad 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
endif
|
|
if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
elif (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x11020++0x01
|
|
line.quad 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
endif
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes"
|
|
bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes"
|
|
else
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High"
|
|
bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1"
|
|
bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
textline " "
|
|
group.long c15:0x0003++0x00
|
|
line.long 0x00 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved"
|
|
endif
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
endif
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
endif
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
else
|
|
hgroup.long c15:0x0015++0x00
|
|
hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
endif
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved"
|
|
endif
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..."
|
|
endif
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
endif
|
|
endif
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0)
|
|
group.quad c15:0x0047++0x01
|
|
line.quad 0x00 "PAR,Physical Address Register"
|
|
hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA"
|
|
hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address"
|
|
bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
textline " "
|
|
bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure"
|
|
bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable"
|
|
bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1)
|
|
group.quad c15:0x0047++0x01
|
|
line.quad 0x00 "PAR,Physical Address Register"
|
|
bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2"
|
|
bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved"
|
|
textline " "
|
|
bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0)
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,Physical Address Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address"
|
|
bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure"
|
|
bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate"
|
|
bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection"
|
|
bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1)
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,Physical Address Register"
|
|
bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used"
|
|
textline " "
|
|
bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful"
|
|
textline " "
|
|
endif
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x002A++0x00
|
|
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x012A++0x00
|
|
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x003A++0x00
|
|
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x013A++0x00
|
|
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
hgroup.long c15:0x003A++0x00
|
|
hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
|
|
hgroup.long c15:0x013A++0x00
|
|
hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
|
|
endif
|
|
else
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
textline " "
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate"
|
|
textline " "
|
|
endif
|
|
if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x400F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
hgroup.long c15:0x400F++0x00
|
|
hide.long 0x00 "CBAR,Configuration Base Address Register"
|
|
endif
|
|
textline " "
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
else
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier"
|
|
endif
|
|
group.long c15:0x020D++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
group.long c15:0x030D++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
|
|
group.long c15:0x040D++0x00
|
|
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
|
|
group.long c15:0x420D++0x00
|
|
line.long 0x00 "HTPIDR,Hyp Software Thread ID Register"
|
|
tree.end
|
|
width 15.
|
|
tree "Virtualization Extensions"
|
|
group.long c15:0x4000++0x00
|
|
line.long 0x0 "VPIDR,Virtualization Processor ID Register"
|
|
group.long c15:0x4500++0x00
|
|
line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register"
|
|
group.long c15:0x4001++0x00
|
|
line.long 0x00 "HSCTLR,System Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled"
|
|
group.long c15:0x4011++0x00
|
|
line.long 0x00 "HCR,Hyp Configuration Register"
|
|
bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system"
|
|
bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override"
|
|
bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override"
|
|
bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override"
|
|
bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled"
|
|
group.long c15:0x4111++0x00
|
|
line.long 0x00 "HDCR,Hyp Debug Control Register"
|
|
bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid"
|
|
bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid"
|
|
bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid"
|
|
bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid"
|
|
bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x4211++0x00
|
|
line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register"
|
|
bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped"
|
|
bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped"
|
|
bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped"
|
|
group.long c15:0x4025++0x00
|
|
line.long 0x00 "HSR,Hyp Syndrome Register"
|
|
bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit"
|
|
hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome"
|
|
group.long c15:0x4311++0x00
|
|
line.long 0x00 "HSTR,Hyp System Trap Register"
|
|
bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped"
|
|
bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped"
|
|
bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped"
|
|
bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped"
|
|
bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped"
|
|
bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped"
|
|
bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped"
|
|
bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hyp Translation Table Base Register"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
group.long c15:0x4202++0x00
|
|
line.long 0x00 "HTCR,Hyp Translation Control Register"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1"
|
|
group.quad c15:0x16020++0x01
|
|
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table"
|
|
hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address"
|
|
group.long c15:0x4212++0x00
|
|
line.long 0x00 "VTCR,Virtualization Translation Control Register"
|
|
bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved"
|
|
bitfld.long 0x00 4. " S ,Sign extension bit" "0,1"
|
|
bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x4015++0x00
|
|
line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register"
|
|
bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
endif
|
|
group.long c15:0x4006++0x00
|
|
line.long 0x00 "HDFAR,Hyp Data Fault Address Register"
|
|
group.long c15:0x4025++0x00
|
|
line.long 0x00 "HSR,Hyp Syndrome Register"
|
|
bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
|
|
textline " "
|
|
bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit"
|
|
hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome"
|
|
group.long c15:0x4206++0x00
|
|
line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register"
|
|
group.long c15:0x4406++0x00
|
|
line.long 0x00 "HPFAR,Hyp IPA Fault Address Register"
|
|
hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits"
|
|
textline " "
|
|
hgroup.long c15:0x407++0x00
|
|
hide.long 0x00 "NOP,No Operation Register"
|
|
in
|
|
wgroup.long c15:0x17++0x00
|
|
line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x617++0x00
|
|
line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x57++0x00
|
|
line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x157++0x00
|
|
line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x457++0x00
|
|
line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x657++0x00
|
|
line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x757++0x00
|
|
line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x167++0x00
|
|
line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x267++0x00
|
|
line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x0087++0x00
|
|
line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read"
|
|
wgroup.long c15:0x0187++0x00
|
|
line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write"
|
|
wgroup.long c15:0x0287++0x00
|
|
line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read"
|
|
wgroup.long c15:0x0387++0x00
|
|
line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write"
|
|
wgroup.long c15:0x0487++0x00
|
|
line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read"
|
|
wgroup.long c15:0x0587++0x00
|
|
line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write"
|
|
wgroup.long c15:0x0687++0x00
|
|
line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read"
|
|
wgroup.long c15:0x0787++0x00
|
|
line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write"
|
|
wgroup.long c15:0x1a7++0x00
|
|
line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x2a7++0x00
|
|
line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x4a7++0x00
|
|
line.long 0x00 "CP15DSB,Data Synchronization Barrier Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean"
|
|
wgroup.long c15:0x5a7++0x00
|
|
line.long 0x00 "CP15DMB,Data Memory Barrier Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean"
|
|
wgroup.long c15:0x1b7++0x00
|
|
line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x1e7++0x00
|
|
line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x2e7++0x00
|
|
line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register"
|
|
bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3"
|
|
hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean"
|
|
wgroup.long c15:0x4087++0x00
|
|
line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read"
|
|
wgroup.long c15:0x4187++0x00
|
|
line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write"
|
|
wgroup.long c15:0x0038++0x00
|
|
line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable"
|
|
wgroup.long c15:0x0138++0x00
|
|
line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable"
|
|
wgroup.long c15:0x0238++0x00
|
|
line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable"
|
|
wgroup.long c15:0x0338++0x00
|
|
line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable"
|
|
wgroup.long c15:0x0058++0x00
|
|
line.long 0x00 "ITLBIALL,Invalidate instruction TLB"
|
|
wgroup.long c15:0x0158++0x00
|
|
line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA"
|
|
wgroup.long c15:0x0258++0x00
|
|
line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match"
|
|
wgroup.long c15:0x0068++0x00
|
|
line.long 0x00 "DTLBIALL,Invalidate data TLB"
|
|
wgroup.long c15:0x0168++0x00
|
|
line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA"
|
|
wgroup.long c15:0x0268++0x00
|
|
line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match"
|
|
wgroup.long c15:0x0078++0x00
|
|
line.long 0x00 "TLBIALL,Invalidate unified TLB"
|
|
wgroup.long c15:0x0178++0x00
|
|
line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA"
|
|
wgroup.long c15:0x0278++0x00
|
|
line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match"
|
|
wgroup.long c15:0x0378++0x00
|
|
line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID"
|
|
wgroup.long c15:0x4038++0x00
|
|
line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable"
|
|
wgroup.long c15:0x4138++0x00
|
|
line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable"
|
|
wgroup.long c15:0x4438++0x00
|
|
line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable"
|
|
wgroup.long c15:0x4078++0x00
|
|
line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB"
|
|
wgroup.long c15:0x4178++0x00
|
|
line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA"
|
|
wgroup.long c15:0x4478++0x00
|
|
line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB"
|
|
group.long c15:0x402A++0x00
|
|
line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x412A++0x00
|
|
line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x403A++0x00
|
|
line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0"
|
|
group.long c15:0x413A++0x00
|
|
line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4"
|
|
else
|
|
hgroup.long c15:0x403A++0x00
|
|
hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0"
|
|
hgroup.long c15:0x413A++0x00
|
|
hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1"
|
|
endif
|
|
group.long c15:0x400C++0x00
|
|
line.long 0x00 "HVBAR,Hyp Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address"
|
|
tree.end
|
|
width 12.
|
|
tree "Cache Control and Configuration"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..."
|
|
bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..."
|
|
bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..."
|
|
bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..."
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..."
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..."
|
|
endif
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
wgroup.long c15:0x10EF++0x00
|
|
line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register"
|
|
bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved"
|
|
else
|
|
hgroup.long c15:0x10EF++0x00
|
|
hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register"
|
|
endif
|
|
tree "Level 1 memory system"
|
|
width 10.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x000F++0x00
|
|
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
|
|
group.long c15:0x010F++0x00
|
|
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
|
|
group.long c15:0x020F++0x00
|
|
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
|
|
group.long c15:0x001F++0x00
|
|
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
|
|
group.long c15:0x011F++0x00
|
|
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
|
|
group.long c15:0x021F++0x00
|
|
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
|
|
group.long c15:0x031F++0x00
|
|
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
|
|
wgroup.long c15:0x004F++0x00
|
|
line.long 0x00 "RAMINDEX,RAM Index Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier"
|
|
bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
textline " "
|
|
group.quad c15:0x100F0++0x01
|
|
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count"
|
|
bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid"
|
|
textline " "
|
|
hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier"
|
|
bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c15:0x300F++0x0
|
|
line.long 0x00 "CDBGDR0,Data Register 0"
|
|
rgroup.long c15:0x310F++0x0
|
|
line.long 0x00 "CDBGDR1,Data Register 1"
|
|
rgroup.long c15:0x320F++0x0
|
|
line.long 0x00 "CDBGDR2,Data Register 2"
|
|
wgroup.long c15:0x302F++0x0
|
|
line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x312F++0x0
|
|
line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 31. " CW ,Cache Way" "Low,High"
|
|
hexmask.long 0x00 5.--30. 1. " SI ,Set index"
|
|
bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x304F++0x0
|
|
line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 31. " CW ,Cache Way" "Low,High"
|
|
hexmask.long 0x00 5.--30. 1. " SI ,Set index"
|
|
bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7"
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c15:0x300F++0x0
|
|
line.long 0x00 "CDBGDR0,Data Register 0"
|
|
bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High"
|
|
bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High"
|
|
bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High"
|
|
bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High"
|
|
hexmask.long 0x00 0.--26. 1. " TA ,Tag Address"
|
|
rgroup.long c15:0x310F++0x0
|
|
line.long 0x00 "CDBGDR1,Data Register 1"
|
|
bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High"
|
|
rgroup.long c15:0x320F++0x0
|
|
line.long 0x00 "CDBGDR2,Data Register 2"
|
|
wgroup.long c15:0x302F++0x0
|
|
line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
wgroup.long c15:0x312F++0x0
|
|
line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long 0x00 6.--30. 1. " SI ,Set index"
|
|
wgroup.long c15:0x304F++0x0
|
|
line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--15. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--16. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--17. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--18. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--19. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000)
|
|
wgroup.long c15:0x314F++0x0
|
|
line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3"
|
|
hexmask.long.word 0x00 6.--20. 1. " SI ,Set index"
|
|
bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
|
|
else
|
|
hgroup.long c15:0x314F++0x0
|
|
hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register"
|
|
endif
|
|
if (((d.l(c15:0x324F))&0x100)==0x100)
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1"
|
|
else
|
|
wgroup.long c15:0x324F++0x0
|
|
line.long 0x00 "CDBGTD,TLB Data Read Operation Register"
|
|
bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3"
|
|
bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Level 2 memory system"
|
|
width 11.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes"
|
|
bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
|
|
bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present"
|
|
bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes"
|
|
bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191."
|
|
rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes"
|
|
bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
group.long c15:0x100F++0x00
|
|
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced"
|
|
bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced"
|
|
bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes"
|
|
bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes"
|
|
bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes"
|
|
bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes"
|
|
bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes"
|
|
bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes"
|
|
group.long c15:0x130F++0x00
|
|
line.long 0x00 "L2PFR,L2 Prefetch Control Register"
|
|
bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
|
|
bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
|
|
bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines"
|
|
textline " "
|
|
group.quad c15:0x110F0++0x01
|
|
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count"
|
|
bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid"
|
|
textline " "
|
|
hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
hgroup.quad c15:0x110F0++0x01
|
|
hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error"
|
|
bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes"
|
|
rgroup.long c15:0x1609++0x00
|
|
line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1"
|
|
bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA"
|
|
bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xc9++0x00
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes"
|
|
bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1c9++0x00
|
|
line.long 0x00 "PMNCNTENSET,Count Enable Set Register "
|
|
bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled"
|
|
group.long c15:0x2c9++0x00
|
|
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
|
|
eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled"
|
|
group.long c15:0x3c9++0x00
|
|
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4c9++0x00
|
|
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
|
|
bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment"
|
|
bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment"
|
|
bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5c9++0x00
|
|
line.long 0x00 "PMSELR,Performance Monitor Select Register"
|
|
bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..."
|
|
group.long c15:0xd9++0x00
|
|
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
|
|
group.long c15:0x1d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
|
|
bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes"
|
|
bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count"
|
|
group.long c15:0x2d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
|
|
group.long c15:0xe9++0x00
|
|
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled"
|
|
group.long c15:0x1e9++0x00
|
|
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2e9++0x00
|
|
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
|
|
eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
group.long c15:0x3e9++0x00
|
|
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
|
|
bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed"
|
|
bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "System Timer Register"
|
|
group.long c15:0x000E++0x00
|
|
line.long 0x00 "CNTFRQ,Counter Frequency Register"
|
|
group.long c15:0x001E++0x00
|
|
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
|
|
bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
textline ""
|
|
group.quad c15:0x100E0++0x01
|
|
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
|
|
group.quad c15:0x120E0++0x01
|
|
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
|
|
group.long c15:0x002E++0x00
|
|
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register"
|
|
group.long c15:0x012E++0x00
|
|
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
textline ""
|
|
group.quad c15:0x110E0++0x01
|
|
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
|
|
group.quad c15:0x130E0++0x01
|
|
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
|
|
group.long c15:0x003E++0x00
|
|
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
|
|
group.long c15:0x013E++0x00
|
|
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
group.quad c15:0x140E0++0x01
|
|
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
|
|
textline ""
|
|
group.long c15:0x401E++0x00
|
|
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
|
|
bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible"
|
|
group.quad c15:0x160E0++0x01
|
|
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
|
|
group.long c15:0x402E++0x00
|
|
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
|
|
group.long c15:0x412E++0x00
|
|
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
|
|
bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled"
|
|
tree.end
|
|
width 11.
|
|
width 15.
|
|
tree "Debug Registers"
|
|
rgroup.long c14:0.++0x0
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version"
|
|
bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High"
|
|
bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported"
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented"
|
|
hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
wgroup.long c14:6.++0x0
|
|
line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
wgroup.long c14:5.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c14:195.))&0x1)==0x1)
|
|
group.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
else
|
|
rgroup.long c14:1.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)"
|
|
rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
endif
|
|
wgroup.long c14:5.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)"
|
|
endif
|
|
group.long c14:0x7++0x0
|
|
line.long 0x00 "DBGVCR,Debug Vector Catch register"
|
|
bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled"
|
|
group.long c14:9.++0x0
|
|
line.long 0x00 "DBGECR,Debug Event Catch Register"
|
|
bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled"
|
|
group.long c14:32.++0x0
|
|
line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)"
|
|
wgroup.long c14:33.++0x0
|
|
line.long 0x00 "DBGITR,Debug Instruction Transfer Register"
|
|
rgroup.long c14:33.++0x0
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle"
|
|
bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted"
|
|
bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c14:195.))&0x1)==0x1)
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
else
|
|
group.long c14:34.++0x0
|
|
line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)"
|
|
rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full"
|
|
rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched"
|
|
textline " "
|
|
rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched"
|
|
rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle"
|
|
rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded"
|
|
bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled"
|
|
rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced"
|
|
bitfld.long 0x00 9. " FS ,Fault status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred"
|
|
rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..."
|
|
rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited"
|
|
rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug"
|
|
endif
|
|
endif
|
|
wgroup.long c14:35.++0x0
|
|
line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
wgroup.long c14:36.++0x0
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart"
|
|
bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
wgroup.long c14:36.++0x0
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart"
|
|
bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
group.long c14:37.++0x0
|
|
line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset"
|
|
bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request"
|
|
bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running"
|
|
textline " "
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:37.++0x0
|
|
line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register"
|
|
bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset"
|
|
endif
|
|
rgroup.long c14:40.++0x0
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..."
|
|
rgroup.long c14:41.++0x0
|
|
line.long 0x00 "DBGCIDSR,DBGCIDSR"
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c14:42.++0x0
|
|
line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register"
|
|
bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure"
|
|
bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:42.++0x0
|
|
line.long 0x00 "DBGVIDSR,DBGVIDSR"
|
|
endif
|
|
width 15.
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
textline " "
|
|
wgroup.long c14:958.++0x0
|
|
line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register"
|
|
bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High"
|
|
bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High"
|
|
bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High"
|
|
bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
textline " "
|
|
wgroup.long c14:958.++0x0
|
|
line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register"
|
|
bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High"
|
|
bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High"
|
|
bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High"
|
|
endif
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE")
|
|
rgroup.long c14:959.++0x0
|
|
line.long 0x00 "DBGITISR,Debug Integration Input Status Register"
|
|
bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High"
|
|
bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High"
|
|
bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High"
|
|
bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High"
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
textline " "
|
|
rgroup.long c14:959.++0x0
|
|
line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register"
|
|
bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High"
|
|
bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High"
|
|
bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High"
|
|
endif
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
if (((d.l(c15:0x202))&0x80000000)==0x80000000)
|
|
rgroup.quad c14:128.++0x1
|
|
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address"
|
|
bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid"
|
|
rgroup.quad c14:256.++0x1
|
|
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value"
|
|
bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid"
|
|
else
|
|
rgroup.long c14:128.++0x0
|
|
line.long 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address"
|
|
bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid"
|
|
rgroup.long c14:256.++0x0
|
|
line.long 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value"
|
|
bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid"
|
|
endif
|
|
group.long c14:195.++0x00
|
|
line.long 0x00 "DBGOSDLR,OS Double Lock Register"
|
|
bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked"
|
|
else
|
|
hgroup.quad c14:128.++0x1
|
|
hide.quad 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hgroup.quad c14:256.++0x1
|
|
hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
hgroup.long c14:195.++0x00
|
|
hide.long 0x00 "DBGOSDLR,OS Double Lock Register"
|
|
endif
|
|
wgroup.long c14:192.++0x00
|
|
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
|
|
rgroup.long c14:193.++0x00
|
|
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
|
|
bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..."
|
|
group.long c14:196.++0x00
|
|
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High"
|
|
bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High"
|
|
rgroup.long c14:197.++0x0
|
|
line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register"
|
|
bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High"
|
|
bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High"
|
|
bitfld.long 0x00 4. " HALTED ,Halted" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High"
|
|
bitfld.long 0x00 2. " RS ,Reset Status" "Low,High"
|
|
bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High"
|
|
tree "Processor ID registers"
|
|
rgroup.long c14:(832.+0.)++0x00
|
|
line.long 0x00 "PIDR0,Processor ID register 0"
|
|
rgroup.long c14:(832.+1.)++0x00
|
|
line.long 0x00 "PIDR1,Processor ID register 1"
|
|
rgroup.long c14:(832.+2.)++0x00
|
|
line.long 0x00 "PIDR2,Processor ID register 2"
|
|
rgroup.long c14:(832.+3.)++0x00
|
|
line.long 0x00 "PIDR3,Processor ID register 3"
|
|
rgroup.long c14:(832.+4.)++0x00
|
|
line.long 0x00 "PIDR4,Processor ID register 4"
|
|
rgroup.long c14:(832.+5.)++0x00
|
|
line.long 0x00 "PIDR5,Processor ID register 5"
|
|
rgroup.long c14:(832.+6.)++0x00
|
|
line.long 0x00 "PIDR6,Processor ID register 6"
|
|
rgroup.long c14:(832.+7.)++0x00
|
|
line.long 0x00 "PIDR7,Processor ID register 7"
|
|
rgroup.long c14:(832.+8.)++0x00
|
|
line.long 0x00 "PIDR8,Processor ID register 8"
|
|
rgroup.long c14:(832.+9.)++0x00
|
|
line.long 0x00 "PIDR9,Processor ID register 9"
|
|
rgroup.long c14:(832.+10.)++0x00
|
|
line.long 0x00 "PIDR10,Processor ID register 10"
|
|
rgroup.long c14:(832.+11.)++0x00
|
|
line.long 0x00 "PIDR11,Processor ID register 11"
|
|
rgroup.long c14:(832.+12.)++0x00
|
|
line.long 0x00 "PIDR12,Processor ID register 12"
|
|
rgroup.long c14:(832.+13.)++0x00
|
|
line.long 0x00 "PIDR13,Processor ID register 13"
|
|
rgroup.long c14:(832.+14.)++0x00
|
|
line.long 0x00 "PIDR14,Processor ID register 14"
|
|
rgroup.long c14:(832.+15.)++0x00
|
|
line.long 0x00 "PIDR15,Processor ID register 15"
|
|
rgroup.long c14:(832.+16.)++0x00
|
|
line.long 0x00 "PIDR16,Processor ID register 16"
|
|
rgroup.long c14:(832.+17.)++0x00
|
|
line.long 0x00 "PIDR17,Processor ID register 17"
|
|
rgroup.long c14:(832.+18.)++0x00
|
|
line.long 0x00 "PIDR18,Processor ID register 18"
|
|
rgroup.long c14:(832.+19.)++0x00
|
|
line.long 0x00 "PIDR19,Processor ID register 19"
|
|
rgroup.long c14:(832.+20.)++0x00
|
|
line.long 0x00 "PIDR20,Processor ID register 20"
|
|
rgroup.long c14:(832.+21.)++0x00
|
|
line.long 0x00 "PIDR21,Processor ID register 21"
|
|
rgroup.long c14:(832.+22.)++0x00
|
|
line.long 0x00 "PIDR22,Processor ID register 22"
|
|
rgroup.long c14:(832.+23.)++0x00
|
|
line.long 0x00 "PIDR23,Processor ID register 23"
|
|
rgroup.long c14:(832.+24.)++0x00
|
|
line.long 0x00 "PIDR24,Processor ID register 24"
|
|
rgroup.long c14:(832.+25.)++0x00
|
|
line.long 0x00 "PIDR25,Processor ID register 25"
|
|
rgroup.long c14:(832.+26.)++0x00
|
|
line.long 0x00 "PIDR26,Processor ID register 26"
|
|
rgroup.long c14:(832.+27.)++0x00
|
|
line.long 0x00 "PIDR27,Processor ID register 27"
|
|
rgroup.long c14:(832.+28.)++0x00
|
|
line.long 0x00 "PIDR28,Processor ID register 28"
|
|
rgroup.long c14:(832.+29.)++0x00
|
|
line.long 0x00 "PIDR29,Processor ID register 29"
|
|
rgroup.long c14:(832.+30.)++0x00
|
|
line.long 0x00 "PIDR30,Processor ID register 30"
|
|
rgroup.long c14:(832.+31.)++0x00
|
|
line.long 0x00 "PIDR31,Processor ID register 31"
|
|
rgroup.long c14:(832.+32.)++0x00
|
|
line.long 0x00 "PIDR32,Processor ID register 32"
|
|
rgroup.long c14:(832.+33.)++0x00
|
|
line.long 0x00 "PIDR33,Processor ID register 33"
|
|
rgroup.long c14:(832.+34.)++0x00
|
|
line.long 0x00 "PIDR34,Processor ID register 34"
|
|
rgroup.long c14:(832.+35.)++0x00
|
|
line.long 0x00 "PIDR35,Processor ID register 35"
|
|
rgroup.long c14:(832.+36.)++0x00
|
|
line.long 0x00 "PIDR36,Processor ID register 36"
|
|
rgroup.long c14:(832.+37.)++0x00
|
|
line.long 0x00 "PIDR37,Processor ID register 37"
|
|
rgroup.long c14:(832.+38.)++0x00
|
|
line.long 0x00 "PIDR38,Processor ID register 38"
|
|
rgroup.long c14:(832.+39.)++0x00
|
|
line.long 0x00 "PIDR39,Processor ID register 39"
|
|
rgroup.long c14:(832.+40.)++0x00
|
|
line.long 0x00 "PIDR40,Processor ID register 40"
|
|
rgroup.long c14:(832.+41.)++0x00
|
|
line.long 0x00 "PIDR41,Processor ID register 41"
|
|
rgroup.long c14:(832.+42.)++0x00
|
|
line.long 0x00 "PIDR42,Processor ID register 42"
|
|
rgroup.long c14:(832.+43.)++0x00
|
|
line.long 0x00 "PIDR43,Processor ID register 43"
|
|
rgroup.long c14:(832.+44.)++0x00
|
|
line.long 0x00 "PIDR44,Processor ID register 44"
|
|
rgroup.long c14:(832.+45.)++0x00
|
|
line.long 0x00 "PIDR45,Processor ID register 45"
|
|
rgroup.long c14:(832.+46.)++0x00
|
|
line.long 0x00 "PIDR46,Processor ID register 46"
|
|
rgroup.long c14:(832.+47.)++0x00
|
|
line.long 0x00 "PIDR47,Processor ID register 47"
|
|
rgroup.long c14:(832.+48.)++0x00
|
|
line.long 0x00 "PIDR48,Processor ID register 48"
|
|
rgroup.long c14:(832.+49.)++0x00
|
|
line.long 0x00 "PIDR49,Processor ID register 49"
|
|
rgroup.long c14:(832.+50.)++0x00
|
|
line.long 0x00 "PIDR50,Processor ID register 50"
|
|
rgroup.long c14:(832.+51.)++0x00
|
|
line.long 0x00 "PIDR51,Processor ID register 51"
|
|
rgroup.long c14:(832.+52.)++0x00
|
|
line.long 0x00 "PIDR52,Processor ID register 52"
|
|
rgroup.long c14:(832.+53.)++0x00
|
|
line.long 0x00 "PIDR53,Processor ID register 53"
|
|
rgroup.long c14:(832.+54.)++0x00
|
|
line.long 0x00 "PIDR54,Processor ID register 54"
|
|
rgroup.long c14:(832.+55.)++0x00
|
|
line.long 0x00 "PIDR55,Processor ID register 55"
|
|
rgroup.long c14:(832.+56.)++0x00
|
|
line.long 0x00 "PIDR56,Processor ID register 56"
|
|
rgroup.long c14:(832.+57.)++0x00
|
|
line.long 0x00 "PIDR57,Processor ID register 57"
|
|
rgroup.long c14:(832.+58.)++0x00
|
|
line.long 0x00 "PIDR58,Processor ID register 58"
|
|
rgroup.long c14:(832.+59.)++0x00
|
|
line.long 0x00 "PIDR59,Processor ID register 59"
|
|
rgroup.long c14:(832.+60.)++0x00
|
|
line.long 0x00 "PIDR60,Processor ID register 60"
|
|
rgroup.long c14:(832.+61.)++0x00
|
|
line.long 0x00 "PIDR61,Processor ID register 61"
|
|
rgroup.long c14:(832.+62.)++0x00
|
|
line.long 0x00 "PIDR62,Processor ID register 62"
|
|
rgroup.long c14:(832.+63.)++0x00
|
|
line.long 0x00 "PIDR63,Processor ID register 63"
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
group.long c14:960.++0x0
|
|
line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register"
|
|
bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group.long c14:1000.++0x0
|
|
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set"
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set"
|
|
group.long c14:1001.++0x0
|
|
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared"
|
|
wgroup.long c14:1004.++0x00
|
|
line.long 0x00 "DBGLAR,Lock Access Register"
|
|
rgroup.long c14:1005.++0x00
|
|
line.long 0x00 "DBGLSR,Lock Status Register"
|
|
bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit"
|
|
bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
rgroup.long c14:1006.++0x0
|
|
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled"
|
|
textline " "
|
|
if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
rgroup.long c14:1009.++0x0
|
|
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
|
|
bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..."
|
|
elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
rgroup.long c14:1009.++0x0
|
|
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
|
|
bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..."
|
|
endif
|
|
textline " "
|
|
rgroup.long c14:1010.++0x0
|
|
line.long 0x0 "DBGDEVID0,Debug Device ID Register 0"
|
|
bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..."
|
|
bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..."
|
|
bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..."
|
|
bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
|
|
bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
|
|
textline " "
|
|
bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
|
|
textline " "
|
|
rgroup.long c14:1011.++0x00
|
|
line.long 0x00 "DBGDEVTYPE,Debug Device Type Register"
|
|
bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c14:1016.++0x00
|
|
line.long 0x00 "DBGPID0,Debug Peripheral ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]"
|
|
rgroup.long c14:1017.++0x00
|
|
line.long 0x00 "DBGPID1,Debug Peripheral ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]"
|
|
rgroup.long c14:1018.++0x00
|
|
line.long 0x00 "DBGPID2,Debug Peripheral ID 2"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]"
|
|
rgroup.long c14:1019.++0x00
|
|
line.long 0x00 "DBGPID3,Debug Peripheral ID 3"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision"
|
|
hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified"
|
|
rgroup.long c14:1012.++0x00
|
|
line.long 0x00 "DBGPID4,Debug Peripheral ID 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code"
|
|
rgroup.long c14:1020.++0x00
|
|
line.long 0x00 "DBGCID0,Debug Component ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0"
|
|
rgroup.long c14:1021.++0x00
|
|
line.long 0x00 "DBGCID1,Debug Component ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1"
|
|
rgroup.long c14:1022.++0x00
|
|
line.long 0x00 "DBGCID2,Debug Component ID 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2"
|
|
rgroup.long c14:1023.++0x00
|
|
line.long 0x00 "DBGCID3,Debug Component ID 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3"
|
|
tree.end
|
|
tree.end
|
|
width 10.
|
|
tree "Breakpoint Registers"
|
|
if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+0.)++0x0
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+0.)++0x0
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+0.)++0x0
|
|
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+1.)++0x0
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+1.)++0x0
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+1.)++0x0
|
|
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+2.)++0x0
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+2.)++0x0
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+2.)++0x0
|
|
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+3.)++0x0
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+3.)++0x0
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+3.)++0x0
|
|
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+4.)++0x0
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+4.)++0x0
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+4.)++0x0
|
|
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0))
|
|
group.long c14:(64.+5.)++0x0
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)"
|
|
hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31"
|
|
else
|
|
group.long c14:(64.+5.)++0x0
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)"
|
|
endif
|
|
group.long c14:(80.+5.)++0x0
|
|
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
|
|
bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..."
|
|
bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode"
|
|
bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:148.++0x0
|
|
line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value"
|
|
group.long c14:149.++0x0
|
|
line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value"
|
|
tree.end
|
|
width 10.
|
|
tree "Watchpoint Control Registers"
|
|
group.long c14:(96.+0.)++0x00
|
|
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+0.)++0x00
|
|
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+0.)++0x00
|
|
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+1.)++0x00
|
|
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+1.)++0x00
|
|
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+1.)++0x00
|
|
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+2.)++0x00
|
|
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+2.)++0x00
|
|
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+2.)++0x00
|
|
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c14:(96.+3.)++0x00
|
|
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " DA ,Data address"
|
|
if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE")
|
|
group.long c14:(112.+3.)++0x00
|
|
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure"
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1"
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any"
|
|
bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled"
|
|
elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE")
|
|
group.long c14:(112.+3.)++0x00
|
|
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled"
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
base AD:0x10480000
|
|
tree "Interrupt Controller"
|
|
width 17.
|
|
group.long 0x1000++0x03 "Interrupt Controller Distributor"
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.long 0x1004++0x03
|
|
line.long 0x00 "GICD_ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "up to 32/0 external,up to 64/32 external,up to 96/64 external,up to 128/96 external,up to 160/128 external,up to 192/160 external,up to 224/192 external,up to 256/224 external,?..."
|
|
rgroup.long 0x1008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identfication Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
tree "Group Registers"
|
|
group.long 0x1080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
group.long 0x1084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
group.long 0x1088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
group.long 0x108C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
group.long 0x1090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
group.long 0x1094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
group.long 0x1098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
group.long 0x109C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
tree.end
|
|
tree "Set-Enable Registers"
|
|
group.long 0x1100++0x03
|
|
line.long 0x0 "GICD_ISER0,Interrupt Set Enable Register 0"
|
|
bitfld.long 0x00 31. " SEB31 ,Set Enable Bit 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB30 ,Set Enable Bit 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB29 ,Set Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB28 ,Set Enable Bit 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB27 ,Set Enable Bit 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB26 ,Set Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB25 ,Set Enable Bit 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB24 ,Set Enable Bit 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB23 ,Set Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB22 ,Set Enable Bit 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB21 ,Set Enable Bit 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB20 ,Set Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB19 ,Set Enable Bit 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB18 ,Set Enable Bit 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB17 ,Set Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB16 ,Set Enable Bit 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB15 ,Set Enable Bit 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB14 ,Set Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB13 ,Set Enable Bit 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB12 ,Set Enable Bit 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB11 ,Set Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB10 ,Set Enable Bit 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB9 ,Set Enable Bit 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB8 ,Set Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB7 ,Set Enable Bit 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB6 ,Set Enable Bit 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB5 ,Set Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB4 ,Set Enable Bit 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB3 ,Set Enable Bit 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB2 ,Set Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB1 ,Set Enable Bit 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB0 ,Set Enable Bit 0" "Disabled,Enabled"
|
|
group.long 0x1104++0x03
|
|
line.long 0x0 "GICD_ISER1,Interrupt Set Enable Register 1"
|
|
bitfld.long 0x00 31. " SEB63 ,Set Enable Bit 63" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB62 ,Set Enable Bit 62" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB61 ,Set Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB60 ,Set Enable Bit 60" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB59 ,Set Enable Bit 59" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB58 ,Set Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB57 ,Set Enable Bit 57" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB56 ,Set Enable Bit 56" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB55 ,Set Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB54 ,Set Enable Bit 54" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB53 ,Set Enable Bit 53" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB52 ,Set Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB51 ,Set Enable Bit 51" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB50 ,Set Enable Bit 50" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB49 ,Set Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB48 ,Set Enable Bit 48" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB47 ,Set Enable Bit 47" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB46 ,Set Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB45 ,Set Enable Bit 45" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB44 ,Set Enable Bit 44" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB43 ,Set Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB42 ,Set Enable Bit 42" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB41 ,Set Enable Bit 41" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB40 ,Set Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB39 ,Set Enable Bit 39" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB38 ,Set Enable Bit 38" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB37 ,Set Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB36 ,Set Enable Bit 36" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB35 ,Set Enable Bit 35" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB34 ,Set Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB33 ,Set Enable Bit 33" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB32 ,Set Enable Bit 32" "Disabled,Enabled"
|
|
group.long 0x1108++0x03
|
|
line.long 0x0 "GICD_ISER2,Interrupt Set Enable Register 2"
|
|
bitfld.long 0x00 31. " SEB95 ,Set Enable Bit 95" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB94 ,Set Enable Bit 94" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB93 ,Set Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB92 ,Set Enable Bit 92" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB91 ,Set Enable Bit 91" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB90 ,Set Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB89 ,Set Enable Bit 89" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB88 ,Set Enable Bit 88" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB87 ,Set Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB86 ,Set Enable Bit 86" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB85 ,Set Enable Bit 85" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB84 ,Set Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB83 ,Set Enable Bit 83" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB82 ,Set Enable Bit 82" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB81 ,Set Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB80 ,Set Enable Bit 80" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB79 ,Set Enable Bit 79" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB78 ,Set Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB77 ,Set Enable Bit 77" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB76 ,Set Enable Bit 76" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB75 ,Set Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB74 ,Set Enable Bit 74" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB73 ,Set Enable Bit 73" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB72 ,Set Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB71 ,Set Enable Bit 71" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB70 ,Set Enable Bit 70" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB69 ,Set Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB68 ,Set Enable Bit 68" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB67 ,Set Enable Bit 67" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB66 ,Set Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB65 ,Set Enable Bit 65" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB64 ,Set Enable Bit 64" "Disabled,Enabled"
|
|
group.long 0x110C++0x03
|
|
line.long 0x0 "GICD_ISER3,Interrupt Set Enable Register 3"
|
|
bitfld.long 0x00 31. " SEB127 ,Set Enable Bit 127" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB126 ,Set Enable Bit 126" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB125 ,Set Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB124 ,Set Enable Bit 124" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB123 ,Set Enable Bit 123" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB122 ,Set Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB121 ,Set Enable Bit 121" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB120 ,Set Enable Bit 120" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB119 ,Set Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB118 ,Set Enable Bit 118" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB117 ,Set Enable Bit 117" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB116 ,Set Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB115 ,Set Enable Bit 115" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB114 ,Set Enable Bit 114" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB113 ,Set Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB112 ,Set Enable Bit 112" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB111 ,Set Enable Bit 111" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB110 ,Set Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB109 ,Set Enable Bit 109" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB108 ,Set Enable Bit 108" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB107 ,Set Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB106 ,Set Enable Bit 106" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB105 ,Set Enable Bit 105" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB104 ,Set Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB103 ,Set Enable Bit 103" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB102 ,Set Enable Bit 102" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB101 ,Set Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB100 ,Set Enable Bit 100" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB99 ,Set Enable Bit 99" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB98 ,Set Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB97 ,Set Enable Bit 97" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB96 ,Set Enable Bit 96" "Disabled,Enabled"
|
|
group.long 0x1110++0x03
|
|
line.long 0x0 "GICD_ISER4,Interrupt Set Enable Register 4"
|
|
bitfld.long 0x00 31. " SEB159 ,Set Enable Bit 159" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB158 ,Set Enable Bit 158" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB157 ,Set Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB156 ,Set Enable Bit 156" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB155 ,Set Enable Bit 155" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB154 ,Set Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB153 ,Set Enable Bit 153" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB152 ,Set Enable Bit 152" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB151 ,Set Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB150 ,Set Enable Bit 150" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB149 ,Set Enable Bit 149" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB148 ,Set Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB147 ,Set Enable Bit 147" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB146 ,Set Enable Bit 146" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB145 ,Set Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB144 ,Set Enable Bit 144" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB143 ,Set Enable Bit 143" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB142 ,Set Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB141 ,Set Enable Bit 141" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB140 ,Set Enable Bit 140" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB139 ,Set Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB138 ,Set Enable Bit 138" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB137 ,Set Enable Bit 137" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB136 ,Set Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB135 ,Set Enable Bit 135" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB134 ,Set Enable Bit 134" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB133 ,Set Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB132 ,Set Enable Bit 132" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB131 ,Set Enable Bit 131" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB130 ,Set Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB129 ,Set Enable Bit 129" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB128 ,Set Enable Bit 128" "Disabled,Enabled"
|
|
group.long 0x1114++0x03
|
|
line.long 0x0 "GICD_ISER5,Interrupt Set Enable Register 5"
|
|
bitfld.long 0x00 31. " SEB191 ,Set Enable Bit 191" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB190 ,Set Enable Bit 190" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB189 ,Set Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB188 ,Set Enable Bit 188" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB187 ,Set Enable Bit 187" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB186 ,Set Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB185 ,Set Enable Bit 185" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB184 ,Set Enable Bit 184" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB183 ,Set Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB182 ,Set Enable Bit 182" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB181 ,Set Enable Bit 181" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB180 ,Set Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB179 ,Set Enable Bit 179" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB178 ,Set Enable Bit 178" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB177 ,Set Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB176 ,Set Enable Bit 176" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB175 ,Set Enable Bit 175" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB174 ,Set Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB173 ,Set Enable Bit 173" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB172 ,Set Enable Bit 172" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB171 ,Set Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB170 ,Set Enable Bit 170" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB169 ,Set Enable Bit 169" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB168 ,Set Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB167 ,Set Enable Bit 167" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB166 ,Set Enable Bit 166" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB165 ,Set Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB164 ,Set Enable Bit 164" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB163 ,Set Enable Bit 163" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB162 ,Set Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB161 ,Set Enable Bit 161" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB160 ,Set Enable Bit 160" "Disabled,Enabled"
|
|
group.long 0x1118++0x03
|
|
line.long 0x0 "GICD_ISER6,Interrupt Set Enable Register 6"
|
|
bitfld.long 0x00 31. " SEB223 ,Set Enable Bit 223" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB222 ,Set Enable Bit 222" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB221 ,Set Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB220 ,Set Enable Bit 220" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB219 ,Set Enable Bit 219" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB218 ,Set Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB217 ,Set Enable Bit 217" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB216 ,Set Enable Bit 216" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB215 ,Set Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB214 ,Set Enable Bit 214" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB213 ,Set Enable Bit 213" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB212 ,Set Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB211 ,Set Enable Bit 211" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB210 ,Set Enable Bit 210" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB209 ,Set Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB208 ,Set Enable Bit 208" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB207 ,Set Enable Bit 207" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB206 ,Set Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB205 ,Set Enable Bit 205" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB204 ,Set Enable Bit 204" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB203 ,Set Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB202 ,Set Enable Bit 202" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB201 ,Set Enable Bit 201" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB200 ,Set Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB199 ,Set Enable Bit 199" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB198 ,Set Enable Bit 198" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB197 ,Set Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB196 ,Set Enable Bit 196" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB195 ,Set Enable Bit 195" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB194 ,Set Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB193 ,Set Enable Bit 193" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB192 ,Set Enable Bit 192" "Disabled,Enabled"
|
|
group.long 0x111C++0x03
|
|
line.long 0x0 "GICD_ISER7,Interrupt Set Enable Register 7"
|
|
bitfld.long 0x00 31. " SEB255 ,Set Enable Bit 255" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SEB254 ,Set Enable Bit 254" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SEB253 ,Set Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SEB252 ,Set Enable Bit 252" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SEB251 ,Set Enable Bit 251" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SEB250 ,Set Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SEB249 ,Set Enable Bit 249" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SEB248 ,Set Enable Bit 248" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SEB247 ,Set Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SEB246 ,Set Enable Bit 246" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEB245 ,Set Enable Bit 245" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SEB244 ,Set Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEB243 ,Set Enable Bit 243" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SEB242 ,Set Enable Bit 242" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SEB241 ,Set Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SEB240 ,Set Enable Bit 240" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SEB239 ,Set Enable Bit 239" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SEB238 ,Set Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SEB237 ,Set Enable Bit 237" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SEB236 ,Set Enable Bit 236" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SEB235 ,Set Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SEB234 ,Set Enable Bit 234" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SEB233 ,Set Enable Bit 233" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SEB232 ,Set Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEB231 ,Set Enable Bit 231" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SEB230 ,Set Enable Bit 230" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SEB229 ,Set Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SEB228 ,Set Enable Bit 228" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SEB227 ,Set Enable Bit 227" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SEB226 ,Set Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SEB225 ,Set Enable Bit 225" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SEB224 ,Set Enable Bit 224" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Clear-Enable Registers"
|
|
group.long 0x1180++0x03
|
|
line.long 0x0 "GICD_ICER0,Interrupt Clear Enable Register 0"
|
|
eventfld.long 0x00 31. " CEB31 ,Clear Enable Bit 31" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB30 ,Clear Enable Bit 30" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB29 ,Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB28 ,Clear Enable Bit 28" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB27 ,Clear Enable Bit 27" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB26 ,Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB25 ,Clear Enable Bit 25" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB24 ,Clear Enable Bit 24" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB23 ,Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB22 ,Clear Enable Bit 22" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB21 ,Clear Enable Bit 21" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB20 ,Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB19 ,Clear Enable Bit 19" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB18 ,Clear Enable Bit 18" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB17 ,Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB16 ,Clear Enable Bit 16" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB15 ,Clear Enable Bit 15" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB14 ,Clear Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB13 ,Clear Enable Bit 13" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB12 ,Clear Enable Bit 12" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB11 ,Clear Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB10 ,Clear Enable Bit 10" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB9 ,Clear Enable Bit 9" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB8 ,Clear Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB7 ,Clear Enable Bit 7" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB6 ,Clear Enable Bit 6" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB5 ,Clear Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB4 ,Clear Enable Bit 4" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB3 ,Clear Enable Bit 3" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB2 ,Clear Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB1 ,Clear Enable Bit 1" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB0 ,Clear Enable Bit 0" "Disabled,Enabled"
|
|
group.long 0x1184++0x03
|
|
line.long 0x0 "GICD_ICER1,Interrupt Clear Enable Register 1"
|
|
eventfld.long 0x00 31. " CEB63 ,Clear Enable Bit 63" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB62 ,Clear Enable Bit 62" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB61 ,Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB60 ,Clear Enable Bit 60" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB59 ,Clear Enable Bit 59" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB58 ,Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB57 ,Clear Enable Bit 57" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB56 ,Clear Enable Bit 56" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB55 ,Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB54 ,Clear Enable Bit 54" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB53 ,Clear Enable Bit 53" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB52 ,Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB51 ,Clear Enable Bit 51" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB50 ,Clear Enable Bit 50" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB49 ,Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB48 ,Clear Enable Bit 48" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB47 ,Clear Enable Bit 47" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB46 ,Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB45 ,Clear Enable Bit 45" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB44 ,Clear Enable Bit 44" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB43 ,Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB42 ,Clear Enable Bit 42" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB41 ,Clear Enable Bit 41" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB40 ,Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB39 ,Clear Enable Bit 39" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB38 ,Clear Enable Bit 38" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB37 ,Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB36 ,Clear Enable Bit 36" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB35 ,Clear Enable Bit 35" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB34 ,Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB33 ,Clear Enable Bit 33" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB32 ,Clear Enable Bit 32" "Disabled,Enabled"
|
|
group.long 0x1188++0x03
|
|
line.long 0x0 "GICD_ICER2,Interrupt Clear Enable Register 2"
|
|
eventfld.long 0x00 31. " CEB95 ,Clear Enable Bit 95" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB94 ,Clear Enable Bit 94" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB93 ,Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB92 ,Clear Enable Bit 92" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB91 ,Clear Enable Bit 91" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB90 ,Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB89 ,Clear Enable Bit 89" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB88 ,Clear Enable Bit 88" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB87 ,Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB86 ,Clear Enable Bit 86" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB85 ,Clear Enable Bit 85" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB84 ,Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB83 ,Clear Enable Bit 83" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB82 ,Clear Enable Bit 82" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB81 ,Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB80 ,Clear Enable Bit 80" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB79 ,Clear Enable Bit 79" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB78 ,Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB77 ,Clear Enable Bit 77" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB76 ,Clear Enable Bit 76" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB75 ,Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB74 ,Clear Enable Bit 74" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB73 ,Clear Enable Bit 73" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB72 ,Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB71 ,Clear Enable Bit 71" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB70 ,Clear Enable Bit 70" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB69 ,Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB68 ,Clear Enable Bit 68" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB67 ,Clear Enable Bit 67" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB66 ,Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB65 ,Clear Enable Bit 65" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB64 ,Clear Enable Bit 64" "Disabled,Enabled"
|
|
group.long 0x118C++0x03
|
|
line.long 0x0 "GICD_ICER3,Interrupt Clear Enable Register 3"
|
|
eventfld.long 0x00 31. " CEB127 ,Clear Enable Bit 127" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB126 ,Clear Enable Bit 126" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB125 ,Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB124 ,Clear Enable Bit 124" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB123 ,Clear Enable Bit 123" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB122 ,Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB121 ,Clear Enable Bit 121" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB120 ,Clear Enable Bit 120" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB119 ,Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB118 ,Clear Enable Bit 118" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB117 ,Clear Enable Bit 117" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB116 ,Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB115 ,Clear Enable Bit 115" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB114 ,Clear Enable Bit 114" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB113 ,Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB112 ,Clear Enable Bit 112" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB111 ,Clear Enable Bit 111" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB110 ,Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB109 ,Clear Enable Bit 109" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB108 ,Clear Enable Bit 108" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB107 ,Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB106 ,Clear Enable Bit 106" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB105 ,Clear Enable Bit 105" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB104 ,Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB103 ,Clear Enable Bit 103" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB102 ,Clear Enable Bit 102" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB101 ,Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB100 ,Clear Enable Bit 100" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB99 ,Clear Enable Bit 99" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB98 ,Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB97 ,Clear Enable Bit 97" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB96 ,Clear Enable Bit 96" "Disabled,Enabled"
|
|
group.long 0x1190++0x03
|
|
line.long 0x0 "GICD_ICER4,Interrupt Clear Enable Register 4"
|
|
eventfld.long 0x00 31. " CEB159 ,Clear Enable Bit 159" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB158 ,Clear Enable Bit 158" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB157 ,Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB156 ,Clear Enable Bit 156" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB155 ,Clear Enable Bit 155" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB154 ,Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB153 ,Clear Enable Bit 153" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB152 ,Clear Enable Bit 152" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB151 ,Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB150 ,Clear Enable Bit 150" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB149 ,Clear Enable Bit 149" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB148 ,Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB147 ,Clear Enable Bit 147" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB146 ,Clear Enable Bit 146" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB145 ,Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB144 ,Clear Enable Bit 144" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB143 ,Clear Enable Bit 143" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB142 ,Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB141 ,Clear Enable Bit 141" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB140 ,Clear Enable Bit 140" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB139 ,Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB138 ,Clear Enable Bit 138" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB137 ,Clear Enable Bit 137" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB136 ,Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB135 ,Clear Enable Bit 135" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB134 ,Clear Enable Bit 134" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB133 ,Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB132 ,Clear Enable Bit 132" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB131 ,Clear Enable Bit 131" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB130 ,Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB129 ,Clear Enable Bit 129" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB128 ,Clear Enable Bit 128" "Disabled,Enabled"
|
|
group.long 0x1194++0x03
|
|
line.long 0x0 "GICD_ICER5,Interrupt Clear Enable Register 5"
|
|
eventfld.long 0x00 31. " CEB191 ,Clear Enable Bit 191" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB190 ,Clear Enable Bit 190" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB189 ,Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB188 ,Clear Enable Bit 188" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB187 ,Clear Enable Bit 187" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB186 ,Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB185 ,Clear Enable Bit 185" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB184 ,Clear Enable Bit 184" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB183 ,Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB182 ,Clear Enable Bit 182" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB181 ,Clear Enable Bit 181" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB180 ,Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB179 ,Clear Enable Bit 179" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB178 ,Clear Enable Bit 178" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB177 ,Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB176 ,Clear Enable Bit 176" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB175 ,Clear Enable Bit 175" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB174 ,Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB173 ,Clear Enable Bit 173" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB172 ,Clear Enable Bit 172" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB171 ,Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB170 ,Clear Enable Bit 170" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB169 ,Clear Enable Bit 169" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB168 ,Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB167 ,Clear Enable Bit 167" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB166 ,Clear Enable Bit 166" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB165 ,Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB164 ,Clear Enable Bit 164" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB163 ,Clear Enable Bit 163" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB162 ,Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB161 ,Clear Enable Bit 161" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB160 ,Clear Enable Bit 160" "Disabled,Enabled"
|
|
group.long 0x1198++0x03
|
|
line.long 0x0 "GICD_ICER6,Interrupt Clear Enable Register 6"
|
|
eventfld.long 0x00 31. " CEB223 ,Clear Enable Bit 223" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB222 ,Clear Enable Bit 222" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB221 ,Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB220 ,Clear Enable Bit 220" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB219 ,Clear Enable Bit 219" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB218 ,Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB217 ,Clear Enable Bit 217" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB216 ,Clear Enable Bit 216" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB215 ,Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB214 ,Clear Enable Bit 214" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB213 ,Clear Enable Bit 213" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB212 ,Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB211 ,Clear Enable Bit 211" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB210 ,Clear Enable Bit 210" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB209 ,Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB208 ,Clear Enable Bit 208" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB207 ,Clear Enable Bit 207" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB206 ,Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB205 ,Clear Enable Bit 205" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB204 ,Clear Enable Bit 204" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB203 ,Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB202 ,Clear Enable Bit 202" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB201 ,Clear Enable Bit 201" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB200 ,Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB199 ,Clear Enable Bit 199" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB198 ,Clear Enable Bit 198" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB197 ,Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB196 ,Clear Enable Bit 196" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB195 ,Clear Enable Bit 195" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB194 ,Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB193 ,Clear Enable Bit 193" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB192 ,Clear Enable Bit 192" "Disabled,Enabled"
|
|
group.long 0x119C++0x03
|
|
line.long 0x0 "GICD_ICER7,Interrupt Clear Enable Register 7"
|
|
eventfld.long 0x00 31. " CEB255 ,Clear Enable Bit 255" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. " CEB254 ,Clear Enable Bit 254" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " CEB253 ,Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CEB252 ,Clear Enable Bit 252" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. " CEB251 ,Clear Enable Bit 251" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " CEB250 ,Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CEB249 ,Clear Enable Bit 249" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. " CEB248 ,Clear Enable Bit 248" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " CEB247 ,Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CEB246 ,Clear Enable Bit 246" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. " CEB245 ,Clear Enable Bit 245" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " CEB244 ,Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CEB243 ,Clear Enable Bit 243" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. " CEB242 ,Clear Enable Bit 242" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " CEB241 ,Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CEB240 ,Clear Enable Bit 240" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. " CEB239 ,Clear Enable Bit 239" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " CEB238 ,Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CEB237 ,Clear Enable Bit 237" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. " CEB236 ,Clear Enable Bit 236" "Disabled,Enabled"
|
|
eventfld.long 0x00 11. " CEB235 ,Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CEB234 ,Clear Enable Bit 234" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. " CEB233 ,Clear Enable Bit 233" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. " CEB232 ,Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CEB231 ,Clear Enable Bit 231" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. " CEB230 ,Clear Enable Bit 230" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " CEB229 ,Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CEB228 ,Clear Enable Bit 228" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " CEB227 ,Clear Enable Bit 227" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. " CEB226 ,Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CEB225 ,Clear Enable Bit 225" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " CEB224 ,Clear Enable Bit 224" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Set-Pending Registers"
|
|
group.long 0x1200++0x03
|
|
line.long 0x0 "GICD_ISPR0,Interrupt Set Pending Register 0"
|
|
bitfld.long 0x00 31. " SPB31 ,Set Pending Bit 31" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB30 ,Set Pending Bit 30" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB29 ,Set Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB28 ,Set Pending Bit 28" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB27 ,Set Pending Bit 27" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB26 ,Set Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB25 ,Set Pending Bit 25" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB24 ,Set Pending Bit 24" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB23 ,Set Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB22 ,Set Pending Bit 22" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB21 ,Set Pending Bit 21" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB20 ,Set Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB19 ,Set Pending Bit 19" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB18 ,Set Pending Bit 18" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB17 ,Set Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB16 ,Set Pending Bit 16" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB15 ,Set Pending Bit 15" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB14 ,Set Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB13 ,Set Pending Bit 13" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB12 ,Set Pending Bit 12" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB11 ,Set Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB10 ,Set Pending Bit 10" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB9 ,Set Pending Bit 9" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB8 ,Set Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB7 ,Set Pending Bit 7" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB6 ,Set Pending Bit 6" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB5 ,Set Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB4 ,Set Pending Bit 4" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB3 ,Set Pending Bit 3" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB2 ,Set Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB1 ,Set Pending Bit 1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB0 ,Set Pending Bit 0" "Not pending,Pending"
|
|
group.long 0x1204++0x03
|
|
line.long 0x0 "GICD_ISPR1,Interrupt Set Pending Register 1"
|
|
bitfld.long 0x00 31. " SPB63 ,Set Pending Bit 63" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB62 ,Set Pending Bit 62" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB61 ,Set Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB60 ,Set Pending Bit 60" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB59 ,Set Pending Bit 59" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB58 ,Set Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB57 ,Set Pending Bit 57" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB56 ,Set Pending Bit 56" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB55 ,Set Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB54 ,Set Pending Bit 54" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB53 ,Set Pending Bit 53" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB52 ,Set Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB51 ,Set Pending Bit 51" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB50 ,Set Pending Bit 50" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB49 ,Set Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB48 ,Set Pending Bit 48" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB47 ,Set Pending Bit 47" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB46 ,Set Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB45 ,Set Pending Bit 45" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB44 ,Set Pending Bit 44" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB43 ,Set Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB42 ,Set Pending Bit 42" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB41 ,Set Pending Bit 41" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB40 ,Set Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB39 ,Set Pending Bit 39" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB38 ,Set Pending Bit 38" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB37 ,Set Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB36 ,Set Pending Bit 36" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB35 ,Set Pending Bit 35" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB34 ,Set Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB33 ,Set Pending Bit 33" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB32 ,Set Pending Bit 32" "Not pending,Pending"
|
|
group.long 0x1208++0x03
|
|
line.long 0x0 "GICD_ISPR2,Interrupt Set Pending Register 2"
|
|
bitfld.long 0x00 31. " SPB95 ,Set Pending Bit 95" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB94 ,Set Pending Bit 94" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB93 ,Set Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB92 ,Set Pending Bit 92" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB91 ,Set Pending Bit 91" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB90 ,Set Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB89 ,Set Pending Bit 89" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB88 ,Set Pending Bit 88" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB87 ,Set Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB86 ,Set Pending Bit 86" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB85 ,Set Pending Bit 85" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB84 ,Set Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB83 ,Set Pending Bit 83" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB82 ,Set Pending Bit 82" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB81 ,Set Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB80 ,Set Pending Bit 80" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB79 ,Set Pending Bit 79" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB78 ,Set Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB77 ,Set Pending Bit 77" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB76 ,Set Pending Bit 76" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB75 ,Set Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB74 ,Set Pending Bit 74" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB73 ,Set Pending Bit 73" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB72 ,Set Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB71 ,Set Pending Bit 71" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB70 ,Set Pending Bit 70" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB69 ,Set Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB68 ,Set Pending Bit 68" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB67 ,Set Pending Bit 67" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB66 ,Set Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB65 ,Set Pending Bit 65" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB64 ,Set Pending Bit 64" "Not pending,Pending"
|
|
group.long 0x120C++0x03
|
|
line.long 0x0 "GICD_ISPR3,Interrupt Set Pending Register 3"
|
|
bitfld.long 0x00 31. " SPB127 ,Set Pending Bit 127" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB126 ,Set Pending Bit 126" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB125 ,Set Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB124 ,Set Pending Bit 124" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB123 ,Set Pending Bit 123" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB122 ,Set Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB121 ,Set Pending Bit 121" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB120 ,Set Pending Bit 120" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB119 ,Set Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB118 ,Set Pending Bit 118" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB117 ,Set Pending Bit 117" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB116 ,Set Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB115 ,Set Pending Bit 115" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB114 ,Set Pending Bit 114" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB113 ,Set Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB112 ,Set Pending Bit 112" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB111 ,Set Pending Bit 111" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB110 ,Set Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB109 ,Set Pending Bit 109" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB108 ,Set Pending Bit 108" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB107 ,Set Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB106 ,Set Pending Bit 106" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB105 ,Set Pending Bit 105" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB104 ,Set Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB103 ,Set Pending Bit 103" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB102 ,Set Pending Bit 102" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB101 ,Set Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB100 ,Set Pending Bit 100" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB99 ,Set Pending Bit 99" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB98 ,Set Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB97 ,Set Pending Bit 97" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB96 ,Set Pending Bit 96" "Not pending,Pending"
|
|
group.long 0x1210++0x03
|
|
line.long 0x0 "GICD_ISPR4,Interrupt Set Pending Register 4"
|
|
bitfld.long 0x00 31. " SPB159 ,Set Pending Bit 159" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB158 ,Set Pending Bit 158" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB157 ,Set Pending Bit 157" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB156 ,Set Pending Bit 156" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB155 ,Set Pending Bit 155" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB154 ,Set Pending Bit 154" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB153 ,Set Pending Bit 153" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB152 ,Set Pending Bit 152" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB151 ,Set Pending Bit 151" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB150 ,Set Pending Bit 150" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB149 ,Set Pending Bit 149" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB148 ,Set Pending Bit 148" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB147 ,Set Pending Bit 147" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB146 ,Set Pending Bit 146" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB145 ,Set Pending Bit 145" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB144 ,Set Pending Bit 144" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB143 ,Set Pending Bit 143" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB142 ,Set Pending Bit 142" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB141 ,Set Pending Bit 141" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB140 ,Set Pending Bit 140" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB139 ,Set Pending Bit 139" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB138 ,Set Pending Bit 138" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB137 ,Set Pending Bit 137" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB136 ,Set Pending Bit 136" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB135 ,Set Pending Bit 135" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB134 ,Set Pending Bit 134" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB133 ,Set Pending Bit 133" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB132 ,Set Pending Bit 132" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB131 ,Set Pending Bit 131" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB130 ,Set Pending Bit 130" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB129 ,Set Pending Bit 129" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB128 ,Set Pending Bit 128" "Not pending,Pending"
|
|
group.long 0x1214++0x03
|
|
line.long 0x0 "GICD_ISPR5,Interrupt Set Pending Register 5"
|
|
bitfld.long 0x00 31. " SPB191 ,Set Pending Bit 191" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB190 ,Set Pending Bit 190" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB189 ,Set Pending Bit 189" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB188 ,Set Pending Bit 188" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB187 ,Set Pending Bit 187" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB186 ,Set Pending Bit 186" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB185 ,Set Pending Bit 185" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB184 ,Set Pending Bit 184" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB183 ,Set Pending Bit 183" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB182 ,Set Pending Bit 182" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB181 ,Set Pending Bit 181" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB180 ,Set Pending Bit 180" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB179 ,Set Pending Bit 179" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB178 ,Set Pending Bit 178" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB177 ,Set Pending Bit 177" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB176 ,Set Pending Bit 176" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB175 ,Set Pending Bit 175" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB174 ,Set Pending Bit 174" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB173 ,Set Pending Bit 173" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB172 ,Set Pending Bit 172" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB171 ,Set Pending Bit 171" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB170 ,Set Pending Bit 170" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB169 ,Set Pending Bit 169" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB168 ,Set Pending Bit 168" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB167 ,Set Pending Bit 167" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB166 ,Set Pending Bit 166" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB165 ,Set Pending Bit 165" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB164 ,Set Pending Bit 164" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB163 ,Set Pending Bit 163" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB162 ,Set Pending Bit 162" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB161 ,Set Pending Bit 161" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB160 ,Set Pending Bit 160" "Not pending,Pending"
|
|
group.long 0x1218++0x03
|
|
line.long 0x0 "GICD_ISPR6,Interrupt Set Pending Register 6"
|
|
bitfld.long 0x00 31. " SPB223 ,Set Pending Bit 223" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB222 ,Set Pending Bit 222" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB221 ,Set Pending Bit 221" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB220 ,Set Pending Bit 220" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB219 ,Set Pending Bit 219" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB218 ,Set Pending Bit 218" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB217 ,Set Pending Bit 217" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB216 ,Set Pending Bit 216" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB215 ,Set Pending Bit 215" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB214 ,Set Pending Bit 214" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB213 ,Set Pending Bit 213" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB212 ,Set Pending Bit 212" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB211 ,Set Pending Bit 211" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB210 ,Set Pending Bit 210" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB209 ,Set Pending Bit 209" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB208 ,Set Pending Bit 208" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB207 ,Set Pending Bit 207" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB206 ,Set Pending Bit 206" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB205 ,Set Pending Bit 205" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB204 ,Set Pending Bit 204" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB203 ,Set Pending Bit 203" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB202 ,Set Pending Bit 202" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB201 ,Set Pending Bit 201" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB200 ,Set Pending Bit 200" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB199 ,Set Pending Bit 199" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB198 ,Set Pending Bit 198" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB197 ,Set Pending Bit 197" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB196 ,Set Pending Bit 196" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB195 ,Set Pending Bit 195" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB194 ,Set Pending Bit 194" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB193 ,Set Pending Bit 193" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB192 ,Set Pending Bit 192" "Not pending,Pending"
|
|
group.long 0x121C++0x03
|
|
line.long 0x0 "GICD_ISPR7,Interrupt Set Pending Register 7"
|
|
bitfld.long 0x00 31. " SPB255 ,Set Pending Bit 255" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SPB254 ,Set Pending Bit 254" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SPB253 ,Set Pending Bit 253" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SPB252 ,Set Pending Bit 252" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SPB251 ,Set Pending Bit 251" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SPB250 ,Set Pending Bit 250" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SPB249 ,Set Pending Bit 249" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SPB248 ,Set Pending Bit 248" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SPB247 ,Set Pending Bit 247" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SPB246 ,Set Pending Bit 246" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SPB245 ,Set Pending Bit 245" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SPB244 ,Set Pending Bit 244" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SPB243 ,Set Pending Bit 243" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SPB242 ,Set Pending Bit 242" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SPB241 ,Set Pending Bit 241" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPB240 ,Set Pending Bit 240" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SPB239 ,Set Pending Bit 239" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SPB238 ,Set Pending Bit 238" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SPB237 ,Set Pending Bit 237" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SPB236 ,Set Pending Bit 236" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SPB235 ,Set Pending Bit 235" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SPB234 ,Set Pending Bit 234" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SPB233 ,Set Pending Bit 233" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SPB232 ,Set Pending Bit 232" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SPB231 ,Set Pending Bit 231" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SPB230 ,Set Pending Bit 230" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SPB229 ,Set Pending Bit 229" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SPB228 ,Set Pending Bit 228" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SPB227 ,Set Pending Bit 227" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SPB226 ,Set Pending Bit 226" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPB225 ,Set Pending Bit 225" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SPB224 ,Set Pending Bit 224" "Not pending,Pending"
|
|
textline " "
|
|
tree.end
|
|
tree "Clear-Pending Registers"
|
|
group.long 0x1280++0x03
|
|
line.long 0x0 "GICD_ICPR0,Interrupt Clear Pending Register 0"
|
|
eventfld.long 0x00 31. " CPB31 ,Clear Pending Bit 31" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB30 ,Clear Pending Bit 30" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB29 ,Clear Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB28 ,Clear Pending Bit 28" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB27 ,Clear Pending Bit 27" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB26 ,Clear Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB25 ,Clear Pending Bit 25" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB24 ,Clear Pending Bit 24" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB23 ,Clear Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB22 ,Clear Pending Bit 22" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB21 ,Clear Pending Bit 21" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB20 ,Clear Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB19 ,Clear Pending Bit 19" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB18 ,Clear Pending Bit 18" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB17 ,Clear Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB16 ,Clear Pending Bit 16" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB15 ,Clear Pending Bit 15" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB14 ,Clear Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB13 ,Clear Pending Bit 13" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB12 ,Clear Pending Bit 12" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB11 ,Clear Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB10 ,Clear Pending Bit 10" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB9 ,Clear Pending Bit 9" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB8 ,Clear Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB7 ,Clear Pending Bit 7" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB6 ,Clear Pending Bit 6" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB5 ,Clear Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB4 ,Clear Pending Bit 4" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB3 ,Clear Pending Bit 3" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB2 ,Clear Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB1 ,Clear Pending Bit 1" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB0 ,Clear Pending Bit 0" "Not pending,Pending"
|
|
group.long 0x1284++0x03
|
|
line.long 0x0 "GICD_ICPR1,Interrupt Clear Pending Register 1"
|
|
eventfld.long 0x00 31. " CPB63 ,Clear Pending Bit 63" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB62 ,Clear Pending Bit 62" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB61 ,Clear Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB60 ,Clear Pending Bit 60" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB59 ,Clear Pending Bit 59" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB58 ,Clear Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB57 ,Clear Pending Bit 57" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB56 ,Clear Pending Bit 56" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB55 ,Clear Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB54 ,Clear Pending Bit 54" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB53 ,Clear Pending Bit 53" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB52 ,Clear Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB51 ,Clear Pending Bit 51" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB50 ,Clear Pending Bit 50" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB49 ,Clear Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB48 ,Clear Pending Bit 48" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB47 ,Clear Pending Bit 47" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB46 ,Clear Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB45 ,Clear Pending Bit 45" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB44 ,Clear Pending Bit 44" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB43 ,Clear Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB42 ,Clear Pending Bit 42" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB41 ,Clear Pending Bit 41" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB40 ,Clear Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB39 ,Clear Pending Bit 39" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB38 ,Clear Pending Bit 38" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB37 ,Clear Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB36 ,Clear Pending Bit 36" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB35 ,Clear Pending Bit 35" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB34 ,Clear Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB33 ,Clear Pending Bit 33" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB32 ,Clear Pending Bit 32" "Not pending,Pending"
|
|
group.long 0x1288++0x03
|
|
line.long 0x0 "GICD_ICPR2,Interrupt Clear Pending Register 2"
|
|
eventfld.long 0x00 31. " CPB95 ,Clear Pending Bit 95" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB94 ,Clear Pending Bit 94" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB93 ,Clear Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB92 ,Clear Pending Bit 92" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB91 ,Clear Pending Bit 91" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB90 ,Clear Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB89 ,Clear Pending Bit 89" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB88 ,Clear Pending Bit 88" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB87 ,Clear Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB86 ,Clear Pending Bit 86" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB85 ,Clear Pending Bit 85" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB84 ,Clear Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB83 ,Clear Pending Bit 83" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB82 ,Clear Pending Bit 82" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB81 ,Clear Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB80 ,Clear Pending Bit 80" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB79 ,Clear Pending Bit 79" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB78 ,Clear Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB77 ,Clear Pending Bit 77" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB76 ,Clear Pending Bit 76" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB75 ,Clear Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB74 ,Clear Pending Bit 74" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB73 ,Clear Pending Bit 73" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB72 ,Clear Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB71 ,Clear Pending Bit 71" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB70 ,Clear Pending Bit 70" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB69 ,Clear Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB68 ,Clear Pending Bit 68" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB67 ,Clear Pending Bit 67" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB66 ,Clear Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB65 ,Clear Pending Bit 65" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB64 ,Clear Pending Bit 64" "Not pending,Pending"
|
|
group.long 0x128C++0x03
|
|
line.long 0x0 "GICD_ICPR3,Interrupt Clear Pending Register 3"
|
|
eventfld.long 0x00 31. " CPB127 ,Clear Pending Bit 127" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB126 ,Clear Pending Bit 126" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB125 ,Clear Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB124 ,Clear Pending Bit 124" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB123 ,Clear Pending Bit 123" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB122 ,Clear Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB121 ,Clear Pending Bit 121" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB120 ,Clear Pending Bit 120" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB119 ,Clear Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB118 ,Clear Pending Bit 118" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB117 ,Clear Pending Bit 117" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB116 ,Clear Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB115 ,Clear Pending Bit 115" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB114 ,Clear Pending Bit 114" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB113 ,Clear Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB112 ,Clear Pending Bit 112" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB111 ,Clear Pending Bit 111" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB110 ,Clear Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB109 ,Clear Pending Bit 109" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB108 ,Clear Pending Bit 108" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB107 ,Clear Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB106 ,Clear Pending Bit 106" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB105 ,Clear Pending Bit 105" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB104 ,Clear Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB103 ,Clear Pending Bit 103" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB102 ,Clear Pending Bit 102" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB101 ,Clear Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB100 ,Clear Pending Bit 100" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB99 ,Clear Pending Bit 99" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB98 ,Clear Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB97 ,Clear Pending Bit 97" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB96 ,Clear Pending Bit 96" "Not pending,Pending"
|
|
group.long 0x1290++0x03
|
|
line.long 0x0 "GICD_ICPR4,Interrupt Clear Pending Register 4"
|
|
eventfld.long 0x00 31. " CPB159 ,Clear Pending Bit 159" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB158 ,Clear Pending Bit 158" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB157 ,Clear Pending Bit 157" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB156 ,Clear Pending Bit 156" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB155 ,Clear Pending Bit 155" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB154 ,Clear Pending Bit 154" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB153 ,Clear Pending Bit 153" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB152 ,Clear Pending Bit 152" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB151 ,Clear Pending Bit 151" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB150 ,Clear Pending Bit 150" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB149 ,Clear Pending Bit 149" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB148 ,Clear Pending Bit 148" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB147 ,Clear Pending Bit 147" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB146 ,Clear Pending Bit 146" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB145 ,Clear Pending Bit 145" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB144 ,Clear Pending Bit 144" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB143 ,Clear Pending Bit 143" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB142 ,Clear Pending Bit 142" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB141 ,Clear Pending Bit 141" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB140 ,Clear Pending Bit 140" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB139 ,Clear Pending Bit 139" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB138 ,Clear Pending Bit 138" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB137 ,Clear Pending Bit 137" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB136 ,Clear Pending Bit 136" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB135 ,Clear Pending Bit 135" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB134 ,Clear Pending Bit 134" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB133 ,Clear Pending Bit 133" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB132 ,Clear Pending Bit 132" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB131 ,Clear Pending Bit 131" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB130 ,Clear Pending Bit 130" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB129 ,Clear Pending Bit 129" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB128 ,Clear Pending Bit 128" "Not pending,Pending"
|
|
group.long 0x1294++0x03
|
|
line.long 0x0 "GICD_ICPR5,Interrupt Clear Pending Register 5"
|
|
eventfld.long 0x00 31. " CPB191 ,Clear Pending Bit 191" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB190 ,Clear Pending Bit 190" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB189 ,Clear Pending Bit 189" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB188 ,Clear Pending Bit 188" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB187 ,Clear Pending Bit 187" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB186 ,Clear Pending Bit 186" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB185 ,Clear Pending Bit 185" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB184 ,Clear Pending Bit 184" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB183 ,Clear Pending Bit 183" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB182 ,Clear Pending Bit 182" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB181 ,Clear Pending Bit 181" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB180 ,Clear Pending Bit 180" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB179 ,Clear Pending Bit 179" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB178 ,Clear Pending Bit 178" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB177 ,Clear Pending Bit 177" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB176 ,Clear Pending Bit 176" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB175 ,Clear Pending Bit 175" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB174 ,Clear Pending Bit 174" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB173 ,Clear Pending Bit 173" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB172 ,Clear Pending Bit 172" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB171 ,Clear Pending Bit 171" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB170 ,Clear Pending Bit 170" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB169 ,Clear Pending Bit 169" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB168 ,Clear Pending Bit 168" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB167 ,Clear Pending Bit 167" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB166 ,Clear Pending Bit 166" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB165 ,Clear Pending Bit 165" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB164 ,Clear Pending Bit 164" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB163 ,Clear Pending Bit 163" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB162 ,Clear Pending Bit 162" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB161 ,Clear Pending Bit 161" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB160 ,Clear Pending Bit 160" "Not pending,Pending"
|
|
group.long 0x1298++0x03
|
|
line.long 0x0 "GICD_ICPR6,Interrupt Clear Pending Register 6"
|
|
eventfld.long 0x00 31. " CPB223 ,Clear Pending Bit 223" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB222 ,Clear Pending Bit 222" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB221 ,Clear Pending Bit 221" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB220 ,Clear Pending Bit 220" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB219 ,Clear Pending Bit 219" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB218 ,Clear Pending Bit 218" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB217 ,Clear Pending Bit 217" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB216 ,Clear Pending Bit 216" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB215 ,Clear Pending Bit 215" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB214 ,Clear Pending Bit 214" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB213 ,Clear Pending Bit 213" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB212 ,Clear Pending Bit 212" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB211 ,Clear Pending Bit 211" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB210 ,Clear Pending Bit 210" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB209 ,Clear Pending Bit 209" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB208 ,Clear Pending Bit 208" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB207 ,Clear Pending Bit 207" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB206 ,Clear Pending Bit 206" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB205 ,Clear Pending Bit 205" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB204 ,Clear Pending Bit 204" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB203 ,Clear Pending Bit 203" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB202 ,Clear Pending Bit 202" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB201 ,Clear Pending Bit 201" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB200 ,Clear Pending Bit 200" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB199 ,Clear Pending Bit 199" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB198 ,Clear Pending Bit 198" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB197 ,Clear Pending Bit 197" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB196 ,Clear Pending Bit 196" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB195 ,Clear Pending Bit 195" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB194 ,Clear Pending Bit 194" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB193 ,Clear Pending Bit 193" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB192 ,Clear Pending Bit 192" "Not pending,Pending"
|
|
group.long 0x129C++0x03
|
|
line.long 0x0 "GICD_ICPR7,Interrupt Clear Pending Register 7"
|
|
eventfld.long 0x00 31. " CPB255 ,Clear Pending Bit 255" "Not pending,Pending"
|
|
eventfld.long 0x00 30. " CPB254 ,Clear Pending Bit 254" "Not pending,Pending"
|
|
eventfld.long 0x00 29. " CPB253 ,Clear Pending Bit 253" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 28. " CPB252 ,Clear Pending Bit 252" "Not pending,Pending"
|
|
eventfld.long 0x00 27. " CPB251 ,Clear Pending Bit 251" "Not pending,Pending"
|
|
eventfld.long 0x00 26. " CPB250 ,Clear Pending Bit 250" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 25. " CPB249 ,Clear Pending Bit 249" "Not pending,Pending"
|
|
eventfld.long 0x00 24. " CPB248 ,Clear Pending Bit 248" "Not pending,Pending"
|
|
eventfld.long 0x00 23. " CPB247 ,Clear Pending Bit 247" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 22. " CPB246 ,Clear Pending Bit 246" "Not pending,Pending"
|
|
eventfld.long 0x00 21. " CPB245 ,Clear Pending Bit 245" "Not pending,Pending"
|
|
eventfld.long 0x00 20. " CPB244 ,Clear Pending Bit 244" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 19. " CPB243 ,Clear Pending Bit 243" "Not pending,Pending"
|
|
eventfld.long 0x00 18. " CPB242 ,Clear Pending Bit 242" "Not pending,Pending"
|
|
eventfld.long 0x00 17. " CPB241 ,Clear Pending Bit 241" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 16. " CPB240 ,Clear Pending Bit 240" "Not pending,Pending"
|
|
eventfld.long 0x00 15. " CPB239 ,Clear Pending Bit 239" "Not pending,Pending"
|
|
eventfld.long 0x00 14. " CPB238 ,Clear Pending Bit 238" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 13. " CPB237 ,Clear Pending Bit 237" "Not pending,Pending"
|
|
eventfld.long 0x00 12. " CPB236 ,Clear Pending Bit 236" "Not pending,Pending"
|
|
eventfld.long 0x00 11. " CPB235 ,Clear Pending Bit 235" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CPB234 ,Clear Pending Bit 234" "Not pending,Pending"
|
|
eventfld.long 0x00 9. " CPB233 ,Clear Pending Bit 233" "Not pending,Pending"
|
|
eventfld.long 0x00 8. " CPB232 ,Clear Pending Bit 232" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 7. " CPB231 ,Clear Pending Bit 231" "Not pending,Pending"
|
|
eventfld.long 0x00 6. " CPB230 ,Clear Pending Bit 230" "Not pending,Pending"
|
|
eventfld.long 0x00 5. " CPB229 ,Clear Pending Bit 229" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 4. " CPB228 ,Clear Pending Bit 228" "Not pending,Pending"
|
|
eventfld.long 0x00 3. " CPB227 ,Clear Pending Bit 227" "Not pending,Pending"
|
|
eventfld.long 0x00 2. " CPB226 ,Clear Pending Bit 226" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x00 1. " CPB225 ,Clear Pending Bit 225" "Not pending,Pending"
|
|
eventfld.long 0x00 0. " CPB224 ,Clear Pending Bit 224" "Not pending,Pending"
|
|
textline " "
|
|
tree.end
|
|
tree "Set/Clear Active Registers"
|
|
group.long 0x1300++0x03
|
|
line.long 0x0 "GICD_ISACTIVER0,Interrupt Set Active Register 0"
|
|
group.long 0x1304++0x03
|
|
line.long 0x0 "GICD_ISACTIVER1,Interrupt Set Active Register 1"
|
|
group.long 0x1308++0x03
|
|
line.long 0x0 "GICD_ISACTIVER2,Interrupt Set Active Register 2"
|
|
group.long 0x130C++0x03
|
|
line.long 0x0 "GICD_ISACTIVER3,Interrupt Set Active Register 3"
|
|
group.long 0x1310++0x03
|
|
line.long 0x0 "GICD_ISACTIVER4,Interrupt Set Active Register 4"
|
|
group.long 0x1314++0x03
|
|
line.long 0x0 "GICD_ISACTIVER5,Interrupt Set Active Register 5"
|
|
group.long 0x1318++0x03
|
|
line.long 0x0 "GICD_ISACTIVER6,Interrupt Set Active Register 6"
|
|
group.long 0x131C++0x03
|
|
line.long 0x0 "GICD_ISACTIVER7,Interrupt Set Active Register 7"
|
|
textline " "
|
|
group.long 0x1380++0x03
|
|
line.long 0x0 "GICD_ICACTIVER0,Interrupt Clear Active Register 0"
|
|
group.long 0x1384++0x03
|
|
line.long 0x0 "GICD_ICACTIVER1,Interrupt Clear Active Register 1"
|
|
group.long 0x1388++0x03
|
|
line.long 0x0 "GICD_ICACTIVER2,Interrupt Clear Active Register 2"
|
|
group.long 0x138C++0x03
|
|
line.long 0x0 "GICD_ICACTIVER3,Interrupt Clear Active Register 3"
|
|
group.long 0x1390++0x03
|
|
line.long 0x0 "GICD_ICACTIVER4,Interrupt Clear Active Register 4"
|
|
group.long 0x1394++0x03
|
|
line.long 0x0 "GICD_ICACTIVER5,Interrupt Clear Active Register 5"
|
|
group.long 0x1398++0x03
|
|
line.long 0x0 "GICD_ICACTIVER6,Interrupt Clear Active Register 6"
|
|
group.long 0x139C++0x03
|
|
line.long 0x0 "GICD_ICACTIVER7,Interrupt Clear Active Register 7"
|
|
textline " "
|
|
tree.end
|
|
tree "Priority Registers"
|
|
group.long 0x1400++0x03
|
|
line.long 0x0 "GICD_IPR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1404++0x03
|
|
line.long 0x0 "GICD_IPR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1408++0x03
|
|
line.long 0x0 "GICD_IPR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x140C++0x03
|
|
line.long 0x0 "GICD_IPR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1410++0x03
|
|
line.long 0x0 "GICD_IPR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1414++0x03
|
|
line.long 0x0 "GICD_IPR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1418++0x03
|
|
line.long 0x0 "GICD_IPR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x141C++0x03
|
|
line.long 0x0 "GICD_IPR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1420++0x03
|
|
line.long 0x0 "GICD_IPR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1424++0x03
|
|
line.long 0x0 "GICD_IPR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1428++0x03
|
|
line.long 0x0 "GICD_IPR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x142C++0x03
|
|
line.long 0x0 "GICD_IPR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1430++0x03
|
|
line.long 0x0 "GICD_IPR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1434++0x03
|
|
line.long 0x0 "GICD_IPR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1438++0x03
|
|
line.long 0x0 "GICD_IPR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x143C++0x03
|
|
line.long 0x0 "GICD_IPR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1440++0x03
|
|
line.long 0x0 "GICD_IPR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1444++0x03
|
|
line.long 0x0 "GICD_IPR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1448++0x03
|
|
line.long 0x0 "GICD_IPR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x144C++0x03
|
|
line.long 0x0 "GICD_IPR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1450++0x03
|
|
line.long 0x0 "GICD_IPR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1454++0x03
|
|
line.long 0x0 "GICD_IPR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1458++0x03
|
|
line.long 0x0 "GICD_IPR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x145C++0x03
|
|
line.long 0x0 "GICD_IPR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1460++0x03
|
|
line.long 0x0 "GICD_IPR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1464++0x03
|
|
line.long 0x0 "GICD_IPR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1468++0x03
|
|
line.long 0x0 "GICD_IPR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x146C++0x03
|
|
line.long 0x0 "GICD_IPR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1470++0x03
|
|
line.long 0x0 "GICD_IPR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1474++0x03
|
|
line.long 0x0 "GICD_IPR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1478++0x03
|
|
line.long 0x0 "GICD_IPR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x147C++0x03
|
|
line.long 0x0 "GICD_IPR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1480++0x03
|
|
line.long 0x0 "GICD_IPR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1484++0x03
|
|
line.long 0x0 "GICD_IPR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1488++0x03
|
|
line.long 0x0 "GICD_IPR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x148C++0x03
|
|
line.long 0x0 "GICD_IPR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1490++0x03
|
|
line.long 0x0 "GICD_IPR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1494++0x03
|
|
line.long 0x0 "GICD_IPR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x1498++0x03
|
|
line.long 0x0 "GICD_IPR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x149C++0x03
|
|
line.long 0x0 "GICD_IPR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14A0++0x03
|
|
line.long 0x0 "GICD_IPR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14A4++0x03
|
|
line.long 0x0 "GICD_IPR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14A8++0x03
|
|
line.long 0x0 "GICD_IPR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14AC++0x03
|
|
line.long 0x0 "GICD_IPR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14B0++0x03
|
|
line.long 0x0 "GICD_IPR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14B4++0x03
|
|
line.long 0x0 "GICD_IPR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14B8++0x03
|
|
line.long 0x0 "GICD_IPR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14BC++0x03
|
|
line.long 0x0 "GICD_IPR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14C0++0x03
|
|
line.long 0x0 "GICD_IPR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14C4++0x03
|
|
line.long 0x0 "GICD_IPR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14C8++0x03
|
|
line.long 0x0 "GICD_IPR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14CC++0x03
|
|
line.long 0x0 "GICD_IPR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14D0++0x03
|
|
line.long 0x0 "GICD_IPR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14D4++0x03
|
|
line.long 0x0 "GICD_IPR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14D8++0x03
|
|
line.long 0x0 "GICD_IPR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14DC++0x03
|
|
line.long 0x0 "GICD_IPR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14E0++0x03
|
|
line.long 0x0 "GICD_IPR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14E4++0x03
|
|
line.long 0x0 "GICD_IPR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14E8++0x03
|
|
line.long 0x0 "GICD_IPR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14EC++0x03
|
|
line.long 0x0 "GICD_IPR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14F0++0x03
|
|
line.long 0x0 "GICD_IPR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14F4++0x03
|
|
line.long 0x0 "GICD_IPR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14F8++0x03
|
|
line.long 0x0 "GICD_IPR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
group.long 0x14FC++0x03
|
|
line.long 0x0 "GICD_IPR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Priority Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Priority Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Priority Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PBO0 ,Priority Byte Offset 0"
|
|
textline " "
|
|
tree.end
|
|
tree "Processor Targets Registers"
|
|
rgroup.long 0x1800++0x03
|
|
line.long 0x0 "GICD_IPTR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x1804++0x03
|
|
line.long 0x0 "GICD_IPTR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x1808++0x03
|
|
line.long 0x0 "GICD_IPTR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x180C++0x03
|
|
line.long 0x0 "GICD_IPTR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x1810++0x03
|
|
line.long 0x0 "GICD_IPTR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x1814++0x03
|
|
line.long 0x0 "GICD_IPTR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x1818++0x03
|
|
line.long 0x0 "GICD_IPTR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
rgroup.long 0x181C++0x03
|
|
line.long 0x0 "GICD_IPTR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1820++0x03
|
|
line.long 0x0 "GICD_IPTR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1824++0x03
|
|
line.long 0x0 "GICD_IPTR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1828++0x03
|
|
line.long 0x0 "GICD_IPTR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x182C++0x03
|
|
line.long 0x0 "GICD_IPTR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1830++0x03
|
|
line.long 0x0 "GICD_IPTR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1834++0x03
|
|
line.long 0x0 "GICD_IPTR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1838++0x03
|
|
line.long 0x0 "GICD_IPTR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x183C++0x03
|
|
line.long 0x0 "GICD_IPTR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1840++0x03
|
|
line.long 0x0 "GICD_IPTR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1844++0x03
|
|
line.long 0x0 "GICD_IPTR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1848++0x03
|
|
line.long 0x0 "GICD_IPTR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x184C++0x03
|
|
line.long 0x0 "GICD_IPTR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1850++0x03
|
|
line.long 0x0 "GICD_IPTR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1854++0x03
|
|
line.long 0x0 "GICD_IPTR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1858++0x03
|
|
line.long 0x0 "GICD_IPTR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x185C++0x03
|
|
line.long 0x0 "GICD_IPTR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1860++0x03
|
|
line.long 0x0 "GICD_IPTR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1864++0x03
|
|
line.long 0x0 "GICD_IPTR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1868++0x03
|
|
line.long 0x0 "GICD_IPTR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x186C++0x03
|
|
line.long 0x0 "GICD_IPTR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1870++0x03
|
|
line.long 0x0 "GICD_IPTR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1874++0x03
|
|
line.long 0x0 "GICD_IPTR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1878++0x03
|
|
line.long 0x0 "GICD_IPTR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x187C++0x03
|
|
line.long 0x0 "GICD_IPTR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1880++0x03
|
|
line.long 0x0 "GICD_IPTR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1884++0x03
|
|
line.long 0x0 "GICD_IPTR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1888++0x03
|
|
line.long 0x0 "GICD_IPTR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x188C++0x03
|
|
line.long 0x0 "GICD_IPTR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1890++0x03
|
|
line.long 0x0 "GICD_IPTR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1894++0x03
|
|
line.long 0x0 "GICD_IPTR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x1898++0x03
|
|
line.long 0x0 "GICD_IPTR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x189C++0x03
|
|
line.long 0x0 "GICD_IPTR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18A0++0x03
|
|
line.long 0x0 "GICD_IPTR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18A4++0x03
|
|
line.long 0x0 "GICD_IPTR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18A8++0x03
|
|
line.long 0x0 "GICD_IPTR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18AC++0x03
|
|
line.long 0x0 "GICD_IPTR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18B0++0x03
|
|
line.long 0x0 "GICD_IPTR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18B4++0x03
|
|
line.long 0x0 "GICD_IPTR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18B8++0x03
|
|
line.long 0x0 "GICD_IPTR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18BC++0x03
|
|
line.long 0x0 "GICD_IPTR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18C0++0x03
|
|
line.long 0x0 "GICD_IPTR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18C4++0x03
|
|
line.long 0x0 "GICD_IPTR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18C8++0x03
|
|
line.long 0x0 "GICD_IPTR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18CC++0x03
|
|
line.long 0x0 "GICD_IPTR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18D0++0x03
|
|
line.long 0x0 "GICD_IPTR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18D4++0x03
|
|
line.long 0x0 "GICD_IPTR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18D8++0x03
|
|
line.long 0x0 "GICD_IPTR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18DC++0x03
|
|
line.long 0x0 "GICD_IPTR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18E0++0x03
|
|
line.long 0x0 "GICD_IPTR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18E4++0x03
|
|
line.long 0x0 "GICD_IPTR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18E8++0x03
|
|
line.long 0x0 "GICD_IPTR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18EC++0x03
|
|
line.long 0x0 "GICD_IPTR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18F0++0x03
|
|
line.long 0x0 "GICD_IPTR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18F4++0x03
|
|
line.long 0x0 "GICD_IPTR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18F8++0x03
|
|
line.long 0x0 "GICD_IPTR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
group.long 0x18FC++0x03
|
|
line.long 0x0 "GICD_IPTR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0"
|
|
textline " "
|
|
tree.end
|
|
tree "Configuration Registers"
|
|
rgroup.long 0x1C00++0x03
|
|
line.long 0x00 "GICD_ICFR0,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
rgroup.long 0x1C04++0x03
|
|
line.long 0x00 "GICD_ICFR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C08++0x03
|
|
line.long 0x00 "GICD_ICFR2,Interrupt Configuration Register 0x1C08"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C0C++0x03
|
|
line.long 0x00 "GICD_ICFR3,Interrupt Configuration Register 0x1C0C"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C10++0x03
|
|
line.long 0x00 "GICD_ICFR4,Interrupt Configuration Register 0x1C10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C14++0x03
|
|
line.long 0x00 "GICD_ICFR5,Interrupt Configuration Register 0x1C14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C18++0x03
|
|
line.long 0x00 "GICD_ICFR6,Interrupt Configuration Register 0x1C18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C1C++0x03
|
|
line.long 0x00 "GICD_ICFR7,Interrupt Configuration Register 0x1C1C"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C20++0x03
|
|
line.long 0x00 "GICD_ICFR8,Interrupt Configuration Register 0x1C20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C24++0x03
|
|
line.long 0x00 "GICD_ICFR9,Interrupt Configuration Register 0x1C24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C28++0x03
|
|
line.long 0x00 "GICD_ICFR10,Interrupt Configuration Register 0x1C28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C2C++0x03
|
|
line.long 0x00 "GICD_ICFR11,Interrupt Configuration Register 0x1C2C"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C30++0x03
|
|
line.long 0x00 "GICD_ICFR12,Interrupt Configuration Register 0x1C30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C34++0x03
|
|
line.long 0x00 "GICD_ICFR13,Interrupt Configuration Register 0x1C34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C38++0x03
|
|
line.long 0x00 "GICD_ICFR14,Interrupt Configuration Register 0x1C38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
group.long 0x1C3C++0x03
|
|
line.long 0x00 "GICD_ICFR15,Interrupt Configuration Register 0x1C3C"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Edge,Level"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Edge,Level"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Edge,Level"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Edge,Level"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Edge,Level"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Edge,Level"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Edge,Level"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Edge,Level"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Edge,Level"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Edge,Level"
|
|
textline " "
|
|
tree.end
|
|
width 17.
|
|
tree "Private/Shared Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x1D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D04++0x03
|
|
line.long 0x00 "GICD_SPISR0,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[31] ,IRQS[31] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[30] ,IRQS[30] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[29] ,IRQS[29] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[28] ,IRQS[28] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[27] ,IRQS[27] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[26] ,IRQS[26] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[25] ,IRQS[25] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[24] ,IRQS[24] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[23] ,IRQS[23] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[22] ,IRQS[22] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[21] ,IRQS[21] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[20] ,IRQS[20] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[19] ,IRQS[19] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[18] ,IRQS[18] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[17] ,IRQS[17] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[16] ,IRQS[16] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[15] ,IRQS[15] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[14] ,IRQS[14] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[13] ,IRQS[13] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[12] ,IRQS[12] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[11] ,IRQS[11] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[10] ,IRQS[10] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[9] ,IRQS[9] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[8] ,IRQS[8] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[7] ,IRQS[7] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[6] ,IRQS[6] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[5] ,IRQS[5] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[4] ,IRQS[4] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[3] ,IRQS[3] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[2] ,IRQS[2] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[1] ,IRQS[1] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[0] ,IRQS[0] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D08++0x03
|
|
line.long 0x00 "GICD_SPISR1,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[63] ,IRQS[63] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[62] ,IRQS[62] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[61] ,IRQS[61] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[60] ,IRQS[60] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[59] ,IRQS[59] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[58] ,IRQS[58] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[57] ,IRQS[57] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[56] ,IRQS[56] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[55] ,IRQS[55] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[54] ,IRQS[54] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[53] ,IRQS[53] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[52] ,IRQS[52] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[51] ,IRQS[51] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[50] ,IRQS[50] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[49] ,IRQS[49] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[48] ,IRQS[48] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[47] ,IRQS[47] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[46] ,IRQS[46] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[45] ,IRQS[45] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[44] ,IRQS[44] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[43] ,IRQS[43] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[42] ,IRQS[42] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[41] ,IRQS[41] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[40] ,IRQS[40] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[39] ,IRQS[39] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[38] ,IRQS[38] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[37] ,IRQS[37] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[36] ,IRQS[36] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[35] ,IRQS[35] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[34] ,IRQS[34] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[33] ,IRQS[33] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[32] ,IRQS[32] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D0C++0x03
|
|
line.long 0x00 "GICD_SPISR2,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[95] ,IRQS[95] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[94] ,IRQS[94] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[93] ,IRQS[93] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[92] ,IRQS[92] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[91] ,IRQS[91] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[90] ,IRQS[90] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[89] ,IRQS[89] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[88] ,IRQS[88] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[87] ,IRQS[87] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[86] ,IRQS[86] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[85] ,IRQS[85] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[84] ,IRQS[84] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[83] ,IRQS[83] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[82] ,IRQS[82] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[81] ,IRQS[81] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[80] ,IRQS[80] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[79] ,IRQS[79] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[78] ,IRQS[78] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[77] ,IRQS[77] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[76] ,IRQS[76] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[75] ,IRQS[75] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[74] ,IRQS[74] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[73] ,IRQS[73] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[72] ,IRQS[72] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[71] ,IRQS[71] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[70] ,IRQS[70] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[69] ,IRQS[69] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[68] ,IRQS[68] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[67] ,IRQS[67] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[66] ,IRQS[66] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[65] ,IRQS[65] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[64] ,IRQS[64] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D10++0x03
|
|
line.long 0x00 "GICD_SPISR3,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[127] ,IRQS[127] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[126] ,IRQS[126] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[125] ,IRQS[125] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[124] ,IRQS[124] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[123] ,IRQS[123] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[122] ,IRQS[122] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[121] ,IRQS[121] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[120] ,IRQS[120] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[119] ,IRQS[119] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[118] ,IRQS[118] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[117] ,IRQS[117] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[116] ,IRQS[116] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[115] ,IRQS[115] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[114] ,IRQS[114] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[113] ,IRQS[113] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[112] ,IRQS[112] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[111] ,IRQS[111] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[110] ,IRQS[110] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[109] ,IRQS[109] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[108] ,IRQS[108] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[107] ,IRQS[107] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[106] ,IRQS[106] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[105] ,IRQS[105] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[104] ,IRQS[104] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[103] ,IRQS[103] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[102] ,IRQS[102] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[101] ,IRQS[101] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[100] ,IRQS[100] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[99] ,IRQS[99] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[98] ,IRQS[98] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[97] ,IRQS[97] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[96] ,IRQS[96] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D14++0x03
|
|
line.long 0x00 "GICD_SPISR4,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[159] ,IRQS[159] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[158] ,IRQS[158] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[157] ,IRQS[157] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[156] ,IRQS[156] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[155] ,IRQS[155] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[154] ,IRQS[154] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[153] ,IRQS[153] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[152] ,IRQS[152] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[151] ,IRQS[151] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[150] ,IRQS[150] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[149] ,IRQS[149] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[148] ,IRQS[148] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[147] ,IRQS[147] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[146] ,IRQS[146] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[145] ,IRQS[145] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[144] ,IRQS[144] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[143] ,IRQS[143] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[142] ,IRQS[142] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[141] ,IRQS[141] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[140] ,IRQS[140] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[139] ,IRQS[139] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[138] ,IRQS[138] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[137] ,IRQS[137] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[136] ,IRQS[136] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[135] ,IRQS[135] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[134] ,IRQS[134] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[133] ,IRQS[133] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[132] ,IRQS[132] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[131] ,IRQS[131] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[130] ,IRQS[130] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[129] ,IRQS[129] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[128] ,IRQS[128] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D18++0x03
|
|
line.long 0x00 "GICD_SPISR5,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[191] ,IRQS[191] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[190] ,IRQS[190] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[189] ,IRQS[189] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[188] ,IRQS[188] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[187] ,IRQS[187] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[186] ,IRQS[186] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[185] ,IRQS[185] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[184] ,IRQS[184] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[183] ,IRQS[183] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[182] ,IRQS[182] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[181] ,IRQS[181] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[180] ,IRQS[180] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[179] ,IRQS[179] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[178] ,IRQS[178] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[177] ,IRQS[177] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[176] ,IRQS[176] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[175] ,IRQS[175] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[174] ,IRQS[174] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[173] ,IRQS[173] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[172] ,IRQS[172] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[171] ,IRQS[171] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[170] ,IRQS[170] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[169] ,IRQS[169] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[168] ,IRQS[168] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[167] ,IRQS[167] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[166] ,IRQS[166] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[165] ,IRQS[165] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[164] ,IRQS[164] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[163] ,IRQS[163] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[162] ,IRQS[162] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[161] ,IRQS[161] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[160] ,IRQS[160] status" "No interrupt,Interrupt"
|
|
rgroup.long 0x1D1C++0x03
|
|
line.long 0x00 "GICD_SPISR6,Shared Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 31. " IRQS[223] ,IRQS[223] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[222] ,IRQS[222] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[221] ,IRQS[221] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[220] ,IRQS[220] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQS[219] ,IRQS[219] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " IRQS[218] ,IRQS[218] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " IRQS[217] ,IRQS[217] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[216] ,IRQS[216] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQS[215] ,IRQS[215] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[214] ,IRQS[214] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " IRQS[213] ,IRQS[213] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[212] ,IRQS[212] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS[211] ,IRQS[211] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " IRQS[210] ,IRQS[210] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[209] ,IRQS[209] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[208] ,IRQS[208] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[207] ,IRQS[207] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[206] ,IRQS[206] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[205] ,IRQS[205] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " IRQS[204] ,IRQS[204] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQS[203] ,IRQS[203] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[202] ,IRQS[202] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " IRQS[201] ,IRQS[201] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[200] ,IRQS[200] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS[199] ,IRQS[199] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRQS[198] ,IRQS[198] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[197] ,IRQS[197] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[196] ,IRQS[196] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[195] ,IRQS[195] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[194] ,IRQS[194] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[193] ,IRQS[193] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " IRQS[192] ,IRQS[192] status" "No interrupt,Interrupt"
|
|
tree.end
|
|
textline " "
|
|
width 17.
|
|
wgroup.long 0x1F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "Send to specified,Send to all,Send to interrupt,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
bitfld.long 0x00 15. " SATT ,SATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1F10++0x03
|
|
line.long 0x00 "GICD_CPENDSGIR0,SGI Clear Pending Registers"
|
|
group.long 0x1F14++0x03
|
|
line.long 0x00 "GICD_CPENDSGIR1,SGI Clear Pending Registers"
|
|
group.long 0x1F18++0x03
|
|
line.long 0x00 "GICD_CPENDSGIR2,SGI Clear Pending Registers"
|
|
group.long 0x1F1C++0x03
|
|
line.long 0x00 "GICD_CPENDSGIR3,SGI Clear Pending Registers"
|
|
textline " "
|
|
group.long 0x1F20++0x03
|
|
line.long 0x00 "GICD_SPENDSGIR0,SGI Set Pending Registers"
|
|
group.long 0x1F24++0x03
|
|
line.long 0x00 "GICD_SPENDSGIR1,SGI Set Pending Registers"
|
|
group.long 0x1F28++0x03
|
|
line.long 0x00 "GICD_SPENDSGIR2,SGI Set Pending Registers"
|
|
group.long 0x1F2C++0x03
|
|
line.long 0x00 "GICD_SPENDSGIR3,SGI Set Pending Registers"
|
|
textline " "
|
|
rgroup.long 0x1FE0++0x03 "Peripheral/Component ID Registers"
|
|
line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DEVID ,DevID field"
|
|
rgroup.long 0x1FE4++0x03
|
|
line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FE8++0x03
|
|
line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High"
|
|
bitfld.long 0x00 0.--2. " DEVID ,DevID field" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x1FEC++0x03
|
|
line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.long 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1FD0++0x03
|
|
line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.long 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hgroup.long 0x1FD4++0x03
|
|
hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
hgroup.long 0x1FD8++0x03
|
|
hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
hgroup.long 0x1FDC++0x03
|
|
hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
textline " "
|
|
rgroup.long 0x1FF0++0x03
|
|
line.long 0x00 "GICD_CIDR0,Component ID0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.long 0x1FF4++0x03
|
|
line.long 0x00 "GICD_CIDR1,Component ID1 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.long 0x1FF8++0x03
|
|
line.long 0x00 "GICD_CIDR2,Component ID2 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.long 0x1FFC++0x03
|
|
line.long 0x00 "GICD_CIDR3,Component ID3 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
textline " "
|
|
width 17.
|
|
group.long 0x2000++0x03 "Interrupt Controller Physical CPU Interface"
|
|
line.long 0x00 "GICC_ICR,CPU Interface Control Register"
|
|
bitfld.long 0x00 4. " SBPR ,Secure/Non-secure Binary Point Register for preemption control" "SBPR for Secure/Non-SBPR for Non-Secure,SBPR for Both"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FIQEN ,Indicates using of FIQ or IRQ signal for interrupts" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ACKCTL ,Interrupt acknowledge control" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENABLENS ,Global Enable for signalling of Non-secure interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLES ,Global Enable for signalling of Secure interrupts" "Disabled,Enabled"
|
|
group.long 0x2004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0x2008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x200C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x2010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access"
|
|
rgroup.long 0x2014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0x2018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x201C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
group.long 0x20D0++0x03
|
|
line.long 0x00 "GICC_APR0,Active Priorities Register"
|
|
group.long 0x20E0++0x03
|
|
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
|
|
rgroup.long 0x20FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x3000++0x03
|
|
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
|
|
width 17.
|
|
group.long 0x4000++0x03 "Interrupt Controller Virtual CPU Interface (Hypervisor view)"
|
|
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
|
|
rgroup.long 0x4004++0x03
|
|
line.long 0x00 "GICH_VTR,VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..."
|
|
group.long 0x40F0++0x03
|
|
line.long 0x00 "GICH_APR0,Active Priorities Register"
|
|
group.long 0x4100++0x03
|
|
line.long 0x00 "GICH_LR0,List Register 0"
|
|
group.long 0x4104++0x03
|
|
line.long 0x00 "GICH_LR1,List Register 1"
|
|
group.long 0x4108++0x03
|
|
line.long 0x00 "GICH_LR2,List Register 2"
|
|
group.long 0x410C++0x03
|
|
line.long 0x00 "GICH_LR3,List Register 3"
|
|
group.long 0x6000++0x03 "Interrupt Controller Virtual CPU Interface (Virtual Machine View)"
|
|
line.long 0x00 "GICV_CTLR,VM Control Register"
|
|
group.long 0x6004++0x03
|
|
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
|
|
group.long 0x6008++0x03
|
|
line.long 0x00 "GICV_BPR,VM Binary Point Register"
|
|
hgroup.long 0x600C++0x03
|
|
hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x6010++0x03
|
|
line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
|
|
rgroup.long 0x6014++0x03
|
|
line.long 0x00 "GICV_RPR,VM Running Priority Register"
|
|
rgroup.long 0x6018++0x03
|
|
line.long 0x00 "GICV_HPIR,VM Highest Pending Interrupt Register"
|
|
group.long 0x601C++0x03
|
|
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
|
|
group.long 0x60D0++0x03
|
|
line.long 0x00 "GICV_APR0,VM Active Priority Register"
|
|
group.long 0x60E0++0x03
|
|
line.long 0x00 "GICV_NSAPR0,VM Non-Secure Active Priority Register"
|
|
rgroup.long 0x60FC++0x03
|
|
line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x7000++0x03
|
|
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
|
|
tree.end
|
|
tree.end
|
|
else
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "Core Registers (Cortex-A5)"
|
|
width 0x8
|
|
; --------------------------------------------------------------------------------
|
|
; Identification registers
|
|
; --------------------------------------------------------------------------------
|
|
tree "ID Registers"
|
|
rgroup.long c15:0x0++0x0
|
|
line.long 0x0 "MIDR,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
|
|
textline " "
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
|
|
bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c15:0x100++0x0
|
|
line.long 0x0 "CTR,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
|
|
bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
rgroup.long c15:0x200++0x0
|
|
line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register"
|
|
rgroup.long c15:0x300++0x0
|
|
line.long 0x0 "TLBTR,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
|
|
bitfld.long 0x0 1. " TLB_SIZE ,TLB Size" "64,128"
|
|
textline " "
|
|
bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,Separate"
|
|
rgroup.long c15:0x500++0x0
|
|
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
|
|
bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
|
|
bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3"
|
|
rgroup.long c15:0x0410++0x00
|
|
line.long 0x00 "MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " OSS ,Outer Shareable Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0510++0x00
|
|
line.long 0x00 "MMFR1,Memory Model Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup.long c15:0x0610++0x00
|
|
line.long 0x00 "MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
rgroup.long c15:0x0710++0x00
|
|
line.long 0x00 "MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0020++0x00
|
|
line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0120++0x00
|
|
line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0220++0x00
|
|
line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0320++0x00
|
|
line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0420++0x00
|
|
line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_FRAC ,SWAP_frac" "Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0520++0x00
|
|
line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)"
|
|
rgroup.long c15:0x0620++0x00
|
|
line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)"
|
|
rgroup.long c15:0x0720++0x00
|
|
line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)"
|
|
rgroup.long c15:0x0010++0x00
|
|
line.long 0x00 "PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0110++0x00
|
|
line.long 0x00 "PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0310++0x00
|
|
line.long 0x00 "AFR0,Auxiliary Feature Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature"
|
|
tree.end
|
|
width 0x8
|
|
tree "System Control and Configuration"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes"
|
|
bitfld.long 0x00 18. " BTDIS ,Disable indirect Branch Target Address Cache" "No,Yes"
|
|
bitfld.long 0x00 17. " RSDIS ,Disable return stack operation" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " BP ,Branch prediction policy" "Normal,Taken,Not taken,?..."
|
|
bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 prefetch,2 prefetches,3 prefetches"
|
|
bitfld.long 0x00 12. " RADIS ,Disable Data Cache read-allocate mode" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DWBST ,Disable data write bursts to normal non-cacheable memory" "No,Yes"
|
|
bitfld.long 0x00 10. " DODMBS ,Disable optimized Data Memory Barrier behavior" "No,Yes"
|
|
bitfld.long 0x00 7. " EXCL ,Exclusive L1/L2 cache control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SMP ,Data requests with Inner Cacheable Shared attributes are treated as cacheable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FW ,FW" "Low,High"
|
|
group.long c15:0x201++0x0
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
group.long c15:0x11++0x0
|
|
line.long 0x0 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 6. " NET ,Not early termination" "Not early,Early"
|
|
bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
|
|
group.long c15:0x111++0x0
|
|
line.long 0x0 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted"
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "Denied,Permitted"
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
group.long c15:0x0311++0x00
|
|
line.long 0x00 "VCR,Virtualization Control Register"
|
|
bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1"
|
|
bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1"
|
|
bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1"
|
|
textline " "
|
|
group.long c15:0x000c++0x00
|
|
line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group.long c15:0x10c++0x00
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address"
|
|
rgroup.long c15:0x1C++0x0
|
|
line.long 0x0 "ISR,Interrupt status Register"
|
|
bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending"
|
|
bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending"
|
|
bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending"
|
|
group.long c15:0x11c++0x0
|
|
line.long 0x00 "VIR,Virtualization Interrupt Register"
|
|
bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1"
|
|
group.long c15:0x400f++0x0
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address"
|
|
tree.end
|
|
width 0x08
|
|
tree "Memory Management Unit"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 6. 0. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
|
|
bitfld.long 0x00 6. 0. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable"
|
|
bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable"
|
|
bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000"
|
|
textline " "
|
|
group.long c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address"
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address"
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "DAFSR,Data Auxiliary Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status"
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "IAFSR,Instruction Auxiliary Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status"
|
|
textline " "
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,PA Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress"
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back"
|
|
bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful"
|
|
textline " "
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
group.long c15:0x500f++0x0
|
|
line.long 0x00 "TLBHR,TLB Hitmap Register"
|
|
bitfld.long 0x00 3. " 16MB ,16MB supersections are present in the TLB" "no,yes"
|
|
bitfld.long 0x00 2. " 1MB ,1MB sections are present in the TLB" "no,yes"
|
|
bitfld.long 0x00 1. " 16kB ,16kB pages are present in the TLB" "no,yes"
|
|
bitfld.long 0x00 0. " 4kB ,4kB pages are present in the TLB" "no,yes"
|
|
textline " "
|
|
group.long c15:0x10d++0x0
|
|
line.long 0x0 "CONTEXT,Context ID Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID"
|
|
group.long c15:0x020d++0x00
|
|
line.long 0x00 "URWTPID,User Read/Write Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " URWTPID ,User Read/Write Thread and Process ID"
|
|
group.long c15:0x030d++0x00
|
|
line.long 0x00 "UROTPID,User Read-Only Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " UROTPID ,User Read-Only Thread and Process ID"
|
|
group.long c15:0x040d++0x00
|
|
line.long 0x00 "POTPID,Privileged Only Thread and Process ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " POTPID ,Privileged Only Thread and Process ID"
|
|
tree.end
|
|
width 0x8
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " CTYPE8 ,Cache type for levels 8" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
rgroup.long c15:0x1700++0x0
|
|
line.long 0x0 "AIDR,Auxiliary ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " AID ,Auxiliary ID"
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words"
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction"
|
|
tree.end
|
|
width 0x8
|
|
tree "L2 Preload Engine"
|
|
rgroup c15:0x000b++0x00
|
|
line.long 0x00 "PLEIDR,PLE Identification Register 0"
|
|
bitfld.long 0x00 0. " CH0P ,Channel 0 Present" "Not present,Present"
|
|
rgroup c15:0x020b++0x00
|
|
line.long 0x00 "PLESR,PLE Status Register"
|
|
bitfld.long 0x00 0. " CH0R ,Channel 0 Run" "Not running,Running"
|
|
rgroup c15:0x040b++0x00
|
|
line.long 0x00 "PLEFSR,PLE FIFO Status Register"
|
|
group c15:0x001b++0x00
|
|
line.long 0x00 "PLEUAR,PLE User Accessibility Register"
|
|
bitfld.long 0x00 0. " U0 ,User Mode Process Access Registers for Channel 0 Permission" "Not permitted,Permitted"
|
|
group c15:0x011b++0x00
|
|
line.long 0x00 "PLEPCR,PLE Parameters Control Register"
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xC9++0x0
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1C9++0x0
|
|
line.long 0x0 "PMCNTENSET,Count Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x2C9++0x0
|
|
line.long 0x0 "PMCNTENCLR,Count Enable Clear Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x3C9++0x0
|
|
line.long 0x0 "PMOVSR,Overflow Flag Status Register"
|
|
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
wgroup.long c15:0x4C9++0x0
|
|
line.long 0x0 "PMSWINC,Software Increment Register"
|
|
eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment"
|
|
eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5C9++0x0
|
|
line.long 0x0 "PMSELR,Performance Counter Selection Register"
|
|
bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..."
|
|
group.long c15:0xD9++0x0
|
|
line.long 0x00 "PMCCNTR,Cycle Count Register"
|
|
group.long c15:0x01d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Event Selection Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
|
|
group.long c15:0x02d9++0x00
|
|
line.long 0x00 "PMCNT,Performance Monitor Count Register"
|
|
group.long c15:0xE9++0x0
|
|
line.long 0x0 "PMUSERENR,User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
|
|
group.long c15:0x1E9++0x0
|
|
line.long 0x0 "PMINTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2E9++0x0
|
|
line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xb
|
|
tree "Debug"
|
|
width 10.
|
|
tree "Debug Registers"
|
|
rgroup c14:0x000--0x000
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " Context ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSAMPLE ,PC Sample register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " Security ,Security Extensions implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
group c14:0x22--0x22
|
|
line.long 0x0 "DBGDSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full"
|
|
bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SPA ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
bitfld.long 0x0 24. " IC ,Instruction Complete" "Executing,Not executing"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " DTR ,DTR Access Mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " NSWS ,Imprecise Data Aborts discarded" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " nSPNIDEN ,Secure Non-invasive Debug Disabled" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 16. " nSPIDEN ,Secure Invasive Debug Disabled" "Enabled,Disabled"
|
|
bitfld.long 0x0 15. " MONITOR ,Monitor Debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " EXECUTE ,Execute instruction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " COMMS ,User mode access to Comms Channel disable" "Enabled,Disabled"
|
|
bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced"
|
|
bitfld.long 0x0 8. " uExt ,Sticky Undefined Exception" "No exception,Exception"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x0 6. " PABORT ,Sticky Precise Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Debug Entry,Breakpoint,Imprecise Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
|
|
textline " "
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
|
|
textline " "
|
|
if (((per.long(c14:0x00))&0x01000)==0x00000)
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "DBGVCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "DBGVCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
hgroup c14:0x020--0x020
|
|
hide.long 0x0 "DBGDTRRX,Debug Receive Register (External View)"
|
|
in
|
|
group c14:0x023--0x023
|
|
line.long 0x0 "DBGDTRTX,Debug Transmit Register (External View)"
|
|
group c14:0x09++0x00
|
|
line.long 0x00 "DBGECR,Event Catch Register"
|
|
bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled"
|
|
group c14:0x0a++0x00
|
|
line.long 0x00 "DBGDSCCR,Debug State Cache Control Register"
|
|
bitfld.long 0x00 2. " NWT ,Not Write-Through" "Forced,Normal"
|
|
bitfld.long 0x00 0. " DUCL ,Data and Unified Cache Linefill" "Disabled,Normal"
|
|
wgroup c14:0x21++0x00
|
|
line.long 0x00 "DBGITR,Instruction Transfer Register"
|
|
rgroup c14:0x21++0x00
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCSV ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " MPCSV ,Meaning of PC sample value" "ARM,Thumb,Jazelle,Thumb"
|
|
wgroup c14:0x24++0x00
|
|
line.long 0x00 "DBGDRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
|
|
rgroup c14:0x28++0x00
|
|
line.long 0x00 "DBGPCSR,Program Counter Sampling Register"
|
|
hexmask.long 0x00 2.--31. 1. " PCSV ,Program Counter sample value"
|
|
bitfld.long 0x00 0.--1. " MPCSV ,Meaning of PC sample value" "ARM,Thumb,Jazelle,Thumb"
|
|
rgroup c14:0x29++0x00
|
|
line.long 0x00 "DBGCIDSR,Context ID Sampling Register"
|
|
wgroup c14:0xc0++0x00
|
|
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
|
|
rgroup c14:0xc1++0x00
|
|
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
|
|
bitfld.long 0x00 2. " 32_BA ,32-Bit Access" "Not required,Required"
|
|
bitfld.long 0x00 1. " LB ,Locked Bit" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " LIB ,Lock Implemented Bit" "Not implemented,Implemented"
|
|
group c14:0xc2++0x00
|
|
line.long 0x00 "DBGOSSRR,Operating System Save and Restore Register"
|
|
hexmask.long 0x00 0.--31. 1. " OSSR ,OS Save and Restore"
|
|
group c14:0xc4++0x00
|
|
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "Not held,Held"
|
|
bitfld.long 0x00 0. " DBGNOPWRDWN ,DBGNOPWRDWN output signal" "Low,High"
|
|
group c14:0xc5++0x00
|
|
line.long 0x00 "DBGPRSR,Device Power-Down and Reset Status Register"
|
|
bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Not reset,Reset"
|
|
bitfld.long 0x00 2. " R ,Reset Status" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Not reset,Reset"
|
|
bitfld.long 0x00 0. " PU ,Power-up Status" "Powered down,Powered up"
|
|
width 11.
|
|
tree "Processor Identifier Registers"
|
|
rgroup c14:0x340--0x340
|
|
line.long 0x00 "CPUID,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
|
|
rgroup c14:0x341--0x341
|
|
line.long 0x00 "CACHETYPE,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
rgroup c14:0x343--0x343
|
|
line.long 0x00 "TLBTYPE,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
|
|
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
|
|
rgroup c14:0x348--0x348
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x349--0x349
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x34a--0x34a
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup c14:0x34b--0x34b
|
|
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature"
|
|
rgroup c14:0x34c--0x34c
|
|
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. " OSS ,Outer Shareable Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup c14:0x34d--0x34d
|
|
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup c14:0x34e--0x34e
|
|
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
rgroup c14:0x34f--0x34f
|
|
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x350--0x350
|
|
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x351--0x351
|
|
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x352--0x352
|
|
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x353--0x353
|
|
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x354--0x354
|
|
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup c14:0x355--0x355
|
|
line.long 0x00 "ID_ISAR5,ISA Feature Register 5 (Reserved)"
|
|
tree.end
|
|
width 17.
|
|
tree "Coresight Management Registers"
|
|
textline " "
|
|
group c14:0x03bd++0x00
|
|
line.long 0x00 "DBGITCTRL_IOC,Integration Internal Output Control Register"
|
|
bitfld.long 0x00 5. " I_DBGTRIGGER ,Internal DBGTRIGGER" "0,1"
|
|
bitfld.long 0x00 4. " I_DBGRESTARTED ,Internal DBGRESTARTED" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I_nPMUIRQ ,Internal nPMUIRQ" "0,1"
|
|
bitfld.long 0x00 2. " InternalCOMMTX ,Internal COMMTX" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I_COMMRX ,Internal COMMRX" "0,1"
|
|
bitfld.long 0x00 0. " I_DBGACK ,Internal DBGACK" "0,1"
|
|
group c14:0x03be++0x00
|
|
line.long 0x00 "DBGITCTRL_EOC,Integration External Output Control Register"
|
|
bitfld.long 0x00 7. " nDMAEXTERRIQ ,External nDMAEXTERRIRQ" "0,1"
|
|
bitfld.long 0x00 6. " nDMASIRQ ,External nDMASIRQ" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " nDMAIRQ ,External nDMAIRQ" "0,1"
|
|
bitfld.long 0x00 4. " nPMUIRQ ,External nPMUIRQ" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STANDBYWFI ,External STANDBYWFI" "0,1"
|
|
bitfld.long 0x00 2. " COMMTX ,External COMMTX" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMMRX ,External COMMRX" "0,1"
|
|
bitfld.long 0x00 0. " DBGACK ,External DBGACK" "0,1"
|
|
rgroup c14:0x03bf++0x00
|
|
line.long 0x00 "DBGITCTRL_IS,Integration Input Status Register"
|
|
bitfld.long 0x00 11. " CTI_DBGRESTART ,CTI Debug Restart" "0,1"
|
|
bitfld.long 0x00 10. " CTI_EDBGRQ ,CTI Debug Request" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTI_PMUEXTIN[1] ,CTI PMUEXTIN[1] Signal" "0,1"
|
|
bitfld.long 0x00 8. " CTI_PMUEXTIN[0] ,CTI PMUEXTIN[0] Signal" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " nFIQ ,nFIQ Input" "0,1"
|
|
bitfld.long 0x00 1. " nIRQ ,nIRQ Input" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EDBGRQ ,EDBGRQ Input" "0,1"
|
|
group c14:0x3c0--0x3c0
|
|
line.long 0x0 "DBGITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group c14:0x3e8--0x3e8
|
|
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group c14:0x3e9--0x3e9
|
|
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
wgroup c14:0x3ec--0x3ec
|
|
line.long 0x0 "DBGLAR,Lock Access Register"
|
|
rgroup c14:0x3ed--0x3ed
|
|
line.long 0x0 "DBGLSR,Lock Status Register"
|
|
bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit"
|
|
bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented"
|
|
rgroup c14:0x3ee--0x3ee
|
|
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented"
|
|
bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented"
|
|
bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled"
|
|
hgroup c14:0x3f2--0x3f2
|
|
hide.long 0x0 "DBGDEVID,Device Identifier (RESERVED)"
|
|
rgroup c14:0x3f3--0x3f3
|
|
line.long 0x0 "DBGDEVTYPE,Device Type"
|
|
bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup c14:0x3f8--0x3f8
|
|
line.long 0x00 "DBGPID0,Debug Peripheral ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]"
|
|
rgroup c14:0x3f9--0x3f9
|
|
line.long 0x00 "DBGPID1,Debug Peripheral ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]"
|
|
rgroup c14:0x3fa--0x3fa
|
|
line.long 0x00 "DBGPID2,Debug Peripheral ID 2"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]"
|
|
rgroup c14:0x3fb--0x3fb
|
|
line.long 0x00 "DBGPID3,Debug Peripheral ID 3"
|
|
hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision"
|
|
hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified"
|
|
rgroup c14:0x3f4--0x3f4
|
|
line.long 0x00 "DBGPID4,Debug Peripheral ID 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code"
|
|
rgroup c14:0x3fc--0x3fc
|
|
line.long 0x00 "DBGCID0,Debug Component ID 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0"
|
|
rgroup c14:0x3fd--0x3fd
|
|
line.long 0x00 "DBGCID1,Debug Component ID 1"
|
|
hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class"
|
|
hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1"
|
|
rgroup c14:0x3fe--0x3fe
|
|
line.long 0x00 "DBGCID2,Debug Component ID 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2"
|
|
rgroup c14:0x3ff--0x3ff
|
|
line.long 0x00 "DBGCID3,Debug Component ID 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3"
|
|
tree.end
|
|
tree.end
|
|
width 6.
|
|
tree "Breakpoint Registers"
|
|
group c14:0x40++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
group c14:0x50++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x41++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
group c14:0x51++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x42++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
group c14:0x52++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 6.
|
|
tree "Watchpoint Control Registers"
|
|
group c14:0x60++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x61++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
|
|
group c14:0x71--0x71
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
|
|
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
|
|
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
|
|
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
|
|
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x006--0x006
|
|
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
|
|
hexmask.long.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
|
|
textline " "
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
sif corename()=="CORTEXA5MPCORE"
|
|
width 9.
|
|
base ad:(d.l(c15:0x400f))
|
|
tree "Snoop Control Unit (SCU)"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCUCR,SCU Control Register"
|
|
bitfld.long 0x00 2. " PON ,Parity ON" "Off,On"
|
|
bitfld.long 0x00 1. " AFEN ,Address filtering enable" "Off,On"
|
|
bitfld.long 0x00 0. " SCUEN ,SCU enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SCUCON,SCU Configuration Register"
|
|
bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,Reserved,64KB"
|
|
bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,Reserved,64KB"
|
|
bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,Reserved,64KB"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,Reserved,64KB"
|
|
bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SCUSTAT,SCU CPU Power Status Register"
|
|
bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "INV,SCU Invalidate All Register"
|
|
bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FSAR,Filtering Start Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FEAR,Filtering End Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SAC,SCU Access Control Register"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SSAC,SCU Secure Access Control Register"
|
|
bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
tree.end
|
|
width 0xb
|
|
width 8.
|
|
tree "Timer and Watchdog Blocks"
|
|
base ad:(d.l(c15:0x400f))+0x600
|
|
group.long 0x00++0xb "Timer"
|
|
line.long 0x00 "TLR,Timer Load Register"
|
|
line.long 0x04 "TCR,Timer Counter Register"
|
|
line.long 0x08 "TCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TISR,Timer Interrupt Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x20++0x13 "Watchdog"
|
|
line.long 0x00 "WLR,Watchdog Load Register"
|
|
line.long 0x04 "WCR,Watchdog Counter Register"
|
|
line.long 0x08 "WCONR,Watchdog Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog"
|
|
bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload"
|
|
textline " "
|
|
bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled"
|
|
line.long 0x0c "WISR,Watchdog Interrupt Status Register"
|
|
eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1"
|
|
line.long 0x10 "WRSR,Watchdog Reset Sent Register"
|
|
eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "WDR,Watchdog Disable Register"
|
|
base ad:(d.l(c15:0x400f))+0x200
|
|
group.long 0x00++0xb "Global Timer"
|
|
line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register"
|
|
line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register"
|
|
line.long 0x08 "GTCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GTSR,Timer Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register"
|
|
line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register"
|
|
line.long 0x08 "GTINCR,Auto-increment Register for Comparator"
|
|
tree.end
|
|
width 11.
|
|
endif
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
endif
|
|
tree "Chip ID"
|
|
base ad:0x10000000
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PRO_ID,Product ID Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " PID ,Product ID"
|
|
bitfld.long 0x00 8.--11. " PACKAGE ,Package" "0,1,2,3,?..."
|
|
bitfld.long 0x00 4.--7. " MAINREV ,Main Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SUBREV ,Sub Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "Pad Control"
|
|
base ad:0x11400000
|
|
width 15.
|
|
tree "GPA0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPA0CON,Port Group GPA0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPA0CON[7] ,GPA0 Pin 7 Configuration" "Input,Output,Reserved,I2C_2_SCL,HS-I2C_2_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[7]"
|
|
bitfld.long 0x00 24.--27. " GPA0CON[6] ,GPA0 Pin 6 Configuration" "Input,Output,Reserved,I2C_2_SDA,HS-I2C_2_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[6]"
|
|
bitfld.long 0x00 20.--23. " GPA0CON[5] ,GPA0 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[5]"
|
|
bitfld.long 0x00 16.--19. " GPA0CON[4] ,GPA0 Pin 4 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPA0CON[3] ,GPA0 Pin 3 Configuration" "Input,Output,UART_0_RTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[3]"
|
|
bitfld.long 0x00 8.--11. " GPA0CON[2] ,GPA0 Pin 2 Configuration" "Input,Output,UART_0_CTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[2]"
|
|
bitfld.long 0x00 4.--7. " GPA0CON[1] ,GPA0 Pin 1 Configuration" "Input,Output,UART_0_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[1]"
|
|
bitfld.long 0x00 0.--3. " GPA0CON[0] ,GPA0 Pin 0 Configuration" "Input,Output,UART_0_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPA0DAT,Port Group GPA0 Data Register"
|
|
bitfld.byte 0x00 7. " GPA0DAT[7] ,GPA0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPA0DAT[6] ,GPA0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPA0DAT[5] ,GPA0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPA0DAT[4] ,GPA0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPA0DAT[3] ,GPA0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPA0DAT[2] ,GPA0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPA0DAT[1] ,GPA0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPA0DAT[0] ,GPA0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPA0PUD,Port Group GPA0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA0PUD[7] ,GPA0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA0PUD[6] ,GPA0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA0PUD[5] ,GPA0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA0PUD[4] ,GPA0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0PUD[3] ,GPA0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA0PUD[2] ,GPA0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA0PUD[1] ,GPA0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA0PUD[0] ,GPA0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPA0DRV,Port Group GPA0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPA0DRV[7] ,GPA0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPA0DRV[6] ,GPA0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPA0DRV[5] ,GPA0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPA0DRV[4] ,GPA0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPA0DRV[3] ,GPA0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPA0DRV[2] ,GPA0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPA0DRV[1] ,GPA0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPA0DRV[0] ,GPA0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPA0CONPDN,Port Group GPA0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPA0[7] ,GPA0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPA0[6] ,GPA0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPA0[5] ,GPA0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPA0[4] ,GPA0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0[3] ,GPA0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPA0[2] ,GPA0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPA0[1] ,GPA0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPA0[0] ,GPA0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPA0PUDPDN,Port Group GPA0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA0[7] ,GPA0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA0[6] ,GPA0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA0[5] ,GPA0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA0[4] ,GPA0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0[3] ,GPA0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA0[2] ,GPA0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA0[1] ,GPA0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA0[0] ,GPA0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPA1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPA1CON,Port Group GPA1 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPA1CON[5] ,GPA1 Pin 5 Configuration" "Input,Output,UART_3_TXDn,Reserved,UART_AUDIO_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[5]"
|
|
bitfld.long 0x00 16.--19. " GPA1CON[4] ,GPA1 Pin 4 Configuration" "Input,Output,UART_3_RXD,Reserved,UART_AUDIO_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[4]"
|
|
bitfld.long 0x00 12.--15. " GPA1CON[3] ,GPA1 Pin 3 Configuration" "Input,Output,UART_2_RTSn,I2C_3_SCL,HS-I2C_3_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPA1CON[2] ,GPA1 Pin 2 Configuration" "Input,Output,UART_2_CTSn,I2C_3_SDA,HS-I2C_3_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[2]"
|
|
bitfld.long 0x00 4.--7. " GPA1CON[1] ,GPA1 Pin 1 Configuration" "Input,Output,UART_2_TXD,Reserved,UART_AUDIO_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[1]"
|
|
bitfld.long 0x00 0.--3. " GPA1CON[0] ,GPA1 Pin 0 Configuration" "Input,Output,UART_2_RXD,Reserved,UART_AUDIO_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPA1DAT,Port Group GPA1 Data Register"
|
|
bitfld.byte 0x00 5. " GPA1DAT[5] ,GPA1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPA1DAT[4] ,GPA1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPA1DAT[3] ,GPA1 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPA1DAT[2] ,GPA1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPA1DAT[1] ,GPA1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPA1DAT[0] ,GPA1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPA1PUD,Port Group GPA1 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPA1PUD[5] ,GPA1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA1PUD[4] ,GPA1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPA1PUD[3] ,GPA1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1PUD[2] ,GPA1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA1PUD[1] ,GPA1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA1PUD[0] ,GPA1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPA1DRV,Port Group GPA1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPA1DRV[5] ,GPA1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPA1DRV[4] ,GPA1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPA1DRV[3] ,GPA1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPA1DRV[2] ,GPA1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPA1DRV[1] ,GPA1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPA1DRV[0] ,GPA1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPA1CONPDN,Port Group GPA1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPA1[5] ,GPA1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPA1[4] ,GPA1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPA1[3] ,GPA1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1[2] ,GPA1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPA1[1] ,GPA1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPA1[0] ,GPA1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPA1PUDPDN,Port Group GPA1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPA1[5] ,GPA1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA1[4] ,GPA1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPA1[3] ,GPA1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1[2] ,GPA1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA1[1] ,GPA1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA1[0] ,GPA1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPA2"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "GPA2CON,Port Group GPA2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPA2CON[7] ,GPA2 Pin 7 Configuration" "Input,Output,SPI_1_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[7]"
|
|
bitfld.long 0x00 24.--27. " GPA2CON[6] ,GPA2 Pin 6 Configuration" "Input,Output,SPI_1_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[6]"
|
|
bitfld.long 0x00 20.--23. " GPA2CON[5] ,GPA2 Pin 5 Configuration" "Input,Output,SPI_1_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[5]"
|
|
bitfld.long 0x00 16.--19. " GPA2CON[4] ,GPA2 Pin 4 Configuration" "Input,Output,SPI_1_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPA2CON[3] ,GPA2 Pin 3 Configuration" "Input,Output,SPI_0_MOSI,I2C_5_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[3]"
|
|
bitfld.long 0x00 8.--11. " GPA2CON[2] ,GPA2 Pin 2 Configuration" "Input,Output,SPI_0_MISO,I2C_5_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[2]"
|
|
bitfld.long 0x00 4.--7. " GPA2CON[1] ,GPA2 Pin 1 Configuration" "Input,Output,SPI_0_nSS,I2C_4_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[1]"
|
|
bitfld.long 0x00 0.--3. " GPA2CON[0] ,GPA2 Pin 0 Configuration" "Input,Output,SPI_0_CLK,I2C_4_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[0]"
|
|
group.byte 0x044++0x00
|
|
line.byte 0x00 "GPA2DAT,Port Group GPA2 Data Register"
|
|
bitfld.byte 0x00 7. " GPA2DAT[7] ,GPA2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPA2DAT[6] ,GPA2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPA2DAT[5] ,GPA2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPA2DAT[4] ,GPA2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPA2DAT[3] ,GPA2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPA2DAT[2] ,GPA2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPA2DAT[1] ,GPA2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPA2DAT[0] ,GPA2 Pin 0 Data" "Low,High"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "GPA2PUD,Port Group GPA2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA2PUD[7] ,GPA2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA2PUD[6] ,GPA2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA2PUD[5] ,GPA2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA2PUD[4] ,GPA2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA2PUD[3] ,GPA2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA2PUD[2] ,GPA2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA2PUD[1] ,GPA2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA2PUD[0] ,GPA2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "GPA2DRV,Port Group GPA2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPA2DRV[7] ,GPA2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPA2DRV[6] ,GPA2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPA2DRV[5] ,GPA2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPA2DRV[4] ,GPA2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPA2DRV[3] ,GPA2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPA2DRV[2] ,GPA2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPA2DRV[1] ,GPA2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPA2DRV[0] ,GPA2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x050++0x01
|
|
line.word 0x00 "GPA2CONPDN,Port Group GPA2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPA2[7] ,GPA2 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPA2[6] ,GPA2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPA2[5] ,GPA2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPA2[4] ,GPA2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA2[3] ,GPA2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPA2[2] ,GPA2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPA2[1] ,GPA2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPA2[0] ,GPA2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x054++0x01
|
|
line.word 0x00 "GPA2PUDPDN,Port Group GPA2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA2[7] ,GPA2 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA2[6] ,GPA2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA2[5] ,GPA2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA2[4] ,GPA2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA2[3] ,GPA2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA2[2] ,GPA2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA2[1] ,GPA2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA2[0] ,GPA2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPB0"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPB0CON,Port Group GPB0 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPB0CON[4] ,GPB0 Pin 4 Configuration" "Input,Output,I2S_1_SDO,PCM_1_SOUT,AC97SDO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[4]"
|
|
bitfld.long 0x00 12.--15. " GPB0CON[3] ,GPB0 Pin 3 Configuration" "Input,Output,I2S_1_SDI,PCM_1_SIN,AC97SDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[3]"
|
|
bitfld.long 0x00 8.--11. " GPB0CON[2] ,GPB0 Pin 2 Configuration" "Input,Output,I2S_1_LRCK,PCM_1_FSYNC,AC97SYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[2]"
|
|
bitfld.long 0x00 4.--7. " GPB0CON[1] ,GPB0 Pin 1 Configuration" "Input,Output,I2S_1_CDCLK,PCM_1_EXTCLK,AC97RESETn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[1]"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " GPB0CON[0] ,GPB0 Pin 0 Configuration" "Input,Output,I2S_1_SCLK,PCM_1_SCLK,AC97BITCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPB0DAT,Port Group GPB0 Data Register"
|
|
bitfld.byte 0x00 4. " GPB0DAT[4] ,GPB0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPB0DAT[3] ,GPB0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPB0DAT[2] ,GPB0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPB0DAT[1] ,GPB0 Pin 1 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPB0DAT[0] ,GPB0 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPB0PUD,Port Group GPB0 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPB0PUD[4] ,GPB0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPB0PUD[3] ,GPB0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB0PUD[2] ,GPB0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB0PUD[1] ,GPB0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB0PUD[0] ,GPB0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPB0DRV,Port Group GPB0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPB0DRV[4] ,GPB0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPB0DRV[3] ,GPB0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPB0DRV[2] ,GPB0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPB0DRV[1] ,GPB0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 0.--1. " GPB0DRV[0] ,GPB0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPB0CONPDN,Port Group GPB0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPB0[4] ,GPB0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPB0[3] ,GPB0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPB0[2] ,GPB0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPB0[1] ,GPB0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB0[0] ,GPB0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPB0PUDPDN,Port Group GPB0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPB0[4] ,GPB0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPB0[3] ,GPB0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB0[2] ,GPB0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB0[1] ,GPB0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB0[0] ,GPB0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPB1"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPB1CON,Port Group GPB1 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPB1CON[4] ,GPB1 Pin 4 Configuration" "Input,Output,I2S_2_SDO,PCM_2_SOUT,I2C_6_SCL,SPI_2_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[4]"
|
|
bitfld.long 0x00 12.--15. " GPB1CON[3] ,GPB1 Pin 3 Configuration" "Input,Output,I2S_2_SDI,PCM_2_SIN,I2C_6_SDA,SPI_2_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[3]"
|
|
bitfld.long 0x00 8.--11. " GPB1CON[2] ,GPB1 Pin 2 Configuration" "Input,Output,I2S_2_LRCK,PCM_2_FSYNC,Reserved,SPI_2_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[2]"
|
|
bitfld.long 0x00 4.--7. " GPB1CON[1] ,GPB1 Pin 1 Configuration" "Input,Output,I2S_2_CDCLK,PCM_2_EXTCLK,SPDIF_EXTCLK,SPI_2_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[1]"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " GPB1CON[0] ,GPB1 Pin 0 Configuration" "Input,Output,I2S_2_SCLK,PCM_2_SCLK,SPDIF_0_OUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPB1DAT,Port Group GPB1 Data Register"
|
|
bitfld.byte 0x00 4. " GPB1DAT[4] ,GPB1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPB1DAT[3] ,GPB1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPB1DAT[2] ,GPB1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPB1DAT[1] ,GPB1 Pin 1 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPB1DAT[0] ,GPB1 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPB1PUD,Port Group GPB1 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPB1PUD[4] ,GPB1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPB1PUD[3] ,GPB1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB1PUD[2] ,GPB1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB1PUD[1] ,GPB1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB1PUD[0] ,GPB1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPB1DRV,Port Group GPB1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPB1DRV[4] ,GPB1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPB1DRV[3] ,GPB1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPB1DRV[2] ,GPB1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPB1DRV[1] ,GPB1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 0.--1. " GPB1DRV[0] ,GPB1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPB1CONPDN,Port Group GPB1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPB1[4] ,GPB1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPB1[3] ,GPB1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPB1[2] ,GPB1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPB1[1] ,GPB1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB1[0] ,GPB1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPB1PUDPDN,Port Group GPB1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPB1[4] ,GPB1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPB1[3] ,GPB1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB1[2] ,GPB1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB1[1] ,GPB1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " GPB1[0] ,GPB1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPB2"
|
|
group.long 0x0A0++0x03
|
|
line.long 0x00 "GPB2CON,Port Group GPB2 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPB2CON[3] ,GPB2 Pin 3 Configuration" "Input,Output,TOUT_3,I2C_7_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[3]"
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|
bitfld.long 0x00 8.--11. " GPB2CON[2] ,GPB2 Pin 2 Configuration" "Input,Output,TOUT_2,I2C_7_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[2]"
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|
bitfld.long 0x00 4.--7. " GPB2CON[1] ,GPB2 Pin 1 Configuration" "Input,Output,TOUT_1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[1]"
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|
bitfld.long 0x00 0.--3. " GPB2CON[0] ,GPB2 Pin 0 Configuration" "Input,Output,TOUT_0,LCD_B_PWM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[0]"
|
|
group.byte 0x0A4++0x00
|
|
line.byte 0x00 "GPB2DAT,Port Group GPB2 Data Register"
|
|
bitfld.byte 0x00 3. " GPB2DAT[3] ,GPB2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPB2DAT[2] ,GPB2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPB2DAT[1] ,GPB2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPB2DAT[0] ,GPB2 Pin 0 Data" "Low,High"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "GPB2PUD,Port Group GPB2 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPB2PUD[3] ,GPB2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB2PUD[2] ,GPB2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB2PUD[1] ,GPB2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPB2PUD[0] ,GPB2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "GPB2DRV,Port Group GPB2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPB2DRV[3] ,GPB2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPB2DRV[2] ,GPB2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPB2DRV[1] ,GPB2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPB2DRV[0] ,GPB2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0B0++0x01
|
|
line.word 0x00 "GPB2CONPDN,Port Group GPB2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPB2[3] ,GPB2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPB2[2] ,GPB2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPB2[1] ,GPB2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPB2[0] ,GPB2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0B4++0x01
|
|
line.word 0x00 "GPB2PUDPDN,Port Group GPB2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPB2[3] ,GPB2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB2[2] ,GPB2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB2[1] ,GPB2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPB2[0] ,GPB2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPB3"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPB3CON,Port Group GPB3 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPB3CON[3] ,GPB3 Pin 3 Configuration" "Input,Output,I2C_1_SCL,MIPI1_ESC_CLK,HS-I2C_1_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[3]"
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bitfld.long 0x00 8.--11. " GPB3CON[2] ,GPB3 Pin 2 Configuration" "Input,Output,I2C_1_SDA,MIPI1_BYTE_CLK,HS-I2C_1_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[2]"
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bitfld.long 0x00 4.--7. " GPB3CON[1] ,GPB3 Pin 1 Configuration" "Input,Output,I2C_0_SCL,Reserved,HS-I2C_0_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[1]"
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bitfld.long 0x00 0.--3. " GPB3CON[0] ,GPB3 Pin 0 Configuration" "Input,Output,I2C_0_SDA,Reserved,HS-I2C_0_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[0]"
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|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPB3DAT,Port Group GPB3 Data Register"
|
|
bitfld.byte 0x00 3. " GPB3DAT[3] ,GPB3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPB3DAT[2] ,GPB3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPB3DAT[1] ,GPB3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPB3DAT[0] ,GPB3 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPB3PUD,Port Group GPB3 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPB3PUD[3] ,GPB3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB3PUD[2] ,GPB3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB3PUD[1] ,GPB3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPB3PUD[0] ,GPB3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPB3DRV,Port Group GPB3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPB3DRV[3] ,GPB3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPB3DRV[2] ,GPB3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPB3DRV[1] ,GPB3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPB3DRV[0] ,GPB3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPB3CONPDN,Port Group GPB3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPB3[3] ,GPB3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPB3[2] ,GPB3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPB3[1] ,GPB3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPB3[0] ,GPB3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPB3PUDPDN,Port Group GPB3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPB3[3] ,GPB3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB3[2] ,GPB3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB3[1] ,GPB3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPB3[0] ,GPB3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC0"
|
|
group.long 0x0E0++0x03
|
|
line.long 0x00 "GPC0CON,Port Group GPC0 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPC0CON[6] ,GPC0 Pin 6 Configuration" "Input,Output,SD_0_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[6]"
|
|
bitfld.long 0x00 20.--23. " GPC0CON[5] ,GPC0 Pin 5 Configuration" "Input,Output,SD_0_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[5]"
|
|
bitfld.long 0x00 16.--19. " GPC0CON[4] ,GPC0 Pin 4 Configuration" "Input,Output,SD_0_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPC0CON[3] ,GPC0 Pin 3 Configuration" "Input,Output,SD_0_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[3]"
|
|
bitfld.long 0x00 8.--11. " GPC0CON[2] ,GPC0 Pin 2 Configuration" "Input,Output,SD_0_CDn,SD_4_nRESET_OUT,SD_0_CARD_INT_n,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[2]"
|
|
bitfld.long 0x00 4.--7. " GPC0CON[1] ,GPC0 Pin 1 Configuration" "Input,Output,SD_0_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[1]"
|
|
bitfld.long 0x00 0.--3. " GPC0CON[0] ,GPC0 Pin 0 Configuration" "Input,Output,SD_0_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[0]"
|
|
group.byte 0x0E4++0x00
|
|
line.byte 0x00 "GPC0DAT,Port Group GPC0 Data Register"
|
|
bitfld.byte 0x00 6. " GPC0DAT[6] ,GPC0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPC0DAT[5] ,GPC0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPC0DAT[4] ,GPC0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPC0DAT[3] ,GPC0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC0DAT[2] ,GPC0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPC0DAT[1] ,GPC0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC0DAT[0] ,GPC0 Pin 0 Data" "Low,High"
|
|
group.word 0x0E8++0x01
|
|
line.word 0x00 "GPC0PUD,Port Group GPC0 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC0PUD[6] ,GPC0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC0PUD[5] ,GPC0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC0PUD[4] ,GPC0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC0PUD[3] ,GPC0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC0PUD[2] ,GPC0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC0PUD[1] ,GPC0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC0PUD[0] ,GPC0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0EC++0x02
|
|
line.tbyte 0x00 "GPC0DRV,Port Group GPC0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPC0DRV[6] ,GPC0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPC0DRV[5] ,GPC0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPC0DRV[4] ,GPC0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPC0DRV[3] ,GPC0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC0DRV[2] ,GPC0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPC0DRV[1] ,GPC0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC0DRV[0] ,GPC0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0F0++0x01
|
|
line.word 0x00 "GPC0CONPDN,Port Group GPC0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPC0[6] ,GPC0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPC0[5] ,GPC0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPC0[4] ,GPC0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC0[3] ,GPC0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC0[2] ,GPC0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPC0[1] ,GPC0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC0[0] ,GPC0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0F4++0x01
|
|
line.word 0x00 "GPC0PUDPDN,Port Group GPC0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC0[6] ,GPC0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC0[5] ,GPC0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC0[4] ,GPC0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC0[3] ,GPC0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC0[2] ,GPC0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC0[1] ,GPC0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC0[0] ,GPC0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GPC1CON,Port Group GPC1 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPC1CON[3] ,GPC1 Pin 3 Configuration" "Input,Output,SD_0_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[3]"
|
|
bitfld.long 0x00 8.--11. " GPC1CON[2] ,GPC1 Pin 2 Configuration" "Input,Output,SD_0_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[2]"
|
|
bitfld.long 0x00 4.--7. " GPC1CON[1] ,GPC1 Pin 1 Configuration" "Input,Output,SD_0_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[1]"
|
|
bitfld.long 0x00 0.--3. " GPC1CON[0] ,GPC1 Pin 0 Configuration" "Input,Output,SD_0_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[0]"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "GPC1DAT,Port Group GPC1 Data Register"
|
|
bitfld.byte 0x00 3. " GPC1DAT[3] ,GPC1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC1DAT[2] ,GPC1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPC1DAT[1] ,GPC1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC1DAT[0] ,GPC1 Pin 0 Data" "Low,High"
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "GPC1PUD,Port Group GPC1 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPC1PUD[3] ,GPC1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC1PUD[2] ,GPC1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC1PUD[1] ,GPC1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC1PUD[0] ,GPC1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x10C++0x02
|
|
line.tbyte 0x00 "GPC1DRV,Port Group GPC1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPC1DRV[3] ,GPC1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC1DRV[2] ,GPC1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPC1DRV[1] ,GPC1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC1DRV[0] ,GPC1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "GPC1CONPDN,Port Group GPC1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPC1[3] ,GPC1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC1[2] ,GPC1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPC1[1] ,GPC1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC1[0] ,GPC1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "GPC1PUDPDN,Port Group GPC1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPC1[3] ,GPC1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC1[2] ,GPC1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC1[1] ,GPC1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC1[0] ,GPC1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC2"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GPC2CON,Port Group GPC2 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPC2CON[6] ,GPC2 Pin 6 Configuration" "Input,Output,SD_1_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[6]"
|
|
bitfld.long 0x00 20.--23. " GPC2CON[5] ,GPC2 Pin 5 Configuration" "Input,Output,SD_1_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[5]"
|
|
bitfld.long 0x00 16.--19. " GPC2CON[4] ,GPC2 Pin 4 Configuration" "Input,Output,SD_1_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPC2CON[3] ,GPC2 Pin 3 Configuration" "Input,Output,SD_1_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[3]"
|
|
bitfld.long 0x00 8.--11. " GPC2CON[2] ,GPC2 Pin 2 Configuration" "Input,Output,SD_2_CDn,SD_1_nRESET_OUT,SD_1_CARD_INT_n,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[2]"
|
|
bitfld.long 0x00 4.--7. " GPC2CON[1] ,GPC2 Pin 1 Configuration" "Input,Output,SD_1_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[1]"
|
|
bitfld.long 0x00 0.--3. " GPC2CON[0] ,GPC2 Pin 0 Configuration" "Input,Output,SD_1_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[0]"
|
|
group.byte 0x124++0x00
|
|
line.byte 0x00 "GPC2DAT,Port Group GPC2 Data Register"
|
|
bitfld.byte 0x00 6. " GPC2DAT[6] ,GPC2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPC2DAT[5] ,GPC2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPC2DAT[4] ,GPC2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPC2DAT[3] ,GPC2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC2DAT[2] ,GPC2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPC2DAT[1] ,GPC2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC2DAT[0] ,GPC2 Pin 0 Data" "Low,High"
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "GPC2PUD,Port Group GPC2 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC2PUD[6] ,GPC2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC2PUD[5] ,GPC2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC2PUD[4] ,GPC2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC2PUD[3] ,GPC2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC2PUD[2] ,GPC2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC2PUD[1] ,GPC2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC2PUD[0] ,GPC2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x12C++0x02
|
|
line.tbyte 0x00 "GPC2DRV,Port Group GPC2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPC2DRV[6] ,GPC2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPC2DRV[5] ,GPC2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPC2DRV[4] ,GPC2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPC2DRV[3] ,GPC2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC2DRV[2] ,GPC2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPC2DRV[1] ,GPC2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC2DRV[0] ,GPC2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "GPC2CONPDN,Port Group GPC2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPC2[6] ,GPC2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPC2[5] ,GPC2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPC2[4] ,GPC2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC2[3] ,GPC2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC2[2] ,GPC2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPC2[1] ,GPC2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC2[0] ,GPC2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "GPC2PUDPDN,Port Group GPC2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC2[6] ,GPC2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC2[5] ,GPC2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC2[4] ,GPC2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC2[3] ,GPC2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC2[2] ,GPC2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC2[1] ,GPC2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC2[0] ,GPC2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC3"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "GPC3CON,Port Group GPC3 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPC3CON[6] ,GPC3 Pin 6 Configuration" "Input,Output,SD_2_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[6]"
|
|
bitfld.long 0x00 20.--23. " GPC3CON[5] ,GPC3 Pin 5 Configuration" "Input,Output,SD_2_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[5]"
|
|
bitfld.long 0x00 16.--19. " GPC3CON[4] ,GPC3 Pin 4 Configuration" "Input,Output,SD_2_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPC3CON[3] ,GPC3 Pin 3 Configuration" "Input,Output,SD_2_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[3]"
|
|
bitfld.long 0x00 8.--11. " GPC3CON[2] ,GPC3 Pin 2 Configuration" "Input,Output,SD_2_CDn,SD_2_nRESET_OUT,SD_2_CARD_INT_n,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[2]"
|
|
bitfld.long 0x00 4.--7. " GPC3CON[1] ,GPC3 Pin 1 Configuration" "Input,Output,SD_2_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[1]"
|
|
bitfld.long 0x00 0.--3. " GPC3CON[0] ,GPC3 Pin 0 Configuration" "Input,Output,SD_2_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[0]"
|
|
group.byte 0x144++0x00
|
|
line.byte 0x00 "GPC3DAT,Port Group GPC3 Data Register"
|
|
bitfld.byte 0x00 6. " GPC3DAT[6] ,GPC3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPC3DAT[5] ,GPC3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPC3DAT[4] ,GPC3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPC3DAT[3] ,GPC3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC3DAT[2] ,GPC3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPC3DAT[1] ,GPC3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC3DAT[0] ,GPC3 Pin 0 Data" "Low,High"
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "GPC3PUD,Port Group GPC3 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC3PUD[6] ,GPC3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC3PUD[5] ,GPC3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC3PUD[4] ,GPC3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC3PUD[3] ,GPC3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC3PUD[2] ,GPC3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC3PUD[1] ,GPC3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC3PUD[0] ,GPC3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x14C++0x02
|
|
line.tbyte 0x00 "GPC3DRV,Port Group GPC3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPC3DRV[6] ,GPC3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPC3DRV[5] ,GPC3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPC3DRV[4] ,GPC3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPC3DRV[3] ,GPC3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC3DRV[2] ,GPC3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPC3DRV[1] ,GPC3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC3DRV[0] ,GPC3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "GPC3CONPDN,Port Group GPC3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPC3[6] ,GPC3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPC3[5] ,GPC3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPC3[4] ,GPC3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC3[3] ,GPC3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC3[2] ,GPC3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPC3[1] ,GPC3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC3[0] ,GPC3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "GPC3PUDPDN,Port Group GPC3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPC3[6] ,GPC3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPC3[5] ,GPC3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPC3[4] ,GPC3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPC3[3] ,GPC3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC3[2] ,GPC3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPC3[1] ,GPC3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC3[0] ,GPC3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPD0"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "GPD0CON,Port Group GPD0 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPD0CON[3] ,GPD0 Pin 3 Configuration" "Input,Output,UART_1_RTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[3]"
|
|
bitfld.long 0x00 8.--11. " GPD0CON[2] ,GPD0 Pin 2 Configuration" "Input,Output,UART_1_CTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[2]"
|
|
bitfld.long 0x00 4.--7. " GPD0CON[1] ,GPD0 Pin 1 Configuration" "Input,Output,UART_1_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[1]"
|
|
bitfld.long 0x00 0.--3. " GPD0CON[0] ,GPD0 Pin 0 Configuration" "Input,Output,UART_1_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[0]"
|
|
group.byte 0x164++0x00
|
|
line.byte 0x00 "GPD0DAT,Port Group GPD0 Data Register"
|
|
bitfld.byte 0x00 3. " GPD0DAT[3] ,GPD0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPD0DAT[2] ,GPD0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPD0DAT[1] ,GPD0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPD0DAT[0] ,GPD0 Pin 0 Data" "Low,High"
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "GPD0PUD,Port Group GPD0 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD0PUD[3] ,GPD0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD0PUD[2] ,GPD0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD0PUD[1] ,GPD0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD0PUD[0] ,GPD0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x16C++0x02
|
|
line.tbyte 0x00 "GPD0DRV,Port Group GPD0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPD0DRV[3] ,GPD0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPD0DRV[2] ,GPD0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPD0DRV[1] ,GPD0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPD0DRV[0] ,GPD0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "GPD0CONPDN,Port Group GPD0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPD0[3] ,GPD0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPD0[2] ,GPD0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPD0[1] ,GPD0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPD0[0] ,GPD0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "GPD0PUDPDN,Port Group GPD0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD0[3] ,GPD0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD0[2] ,GPD0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD0[1] ,GPD0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD0[0] ,GPD0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPD1"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "GPD1CON,Port Group GPD1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPD1CON[7] ,GPD1 Pin 7 Configuration" "Input,Output,Reserved,Reserved,HSI_CAREADY,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[7]"
|
|
bitfld.long 0x00 24.--27. " GPD1CON[6] ,GPD1 Pin 6 Configuration" "Input,Output,Reserved,Reserved,HSI_ACFLAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[6]"
|
|
bitfld.long 0x00 20.--23. " GPD1CON[5] ,GPD1 Pin 5 Configuration" "Input,Output,Reserved,Reserved,HSI_ACDATA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[5]"
|
|
bitfld.long 0x00 16.--19. " GPD1CON[4] ,GPD1 Pin 4 Configuration" "Input,Output,Reserved,Reserved,HSI_ACWAKE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPD1CON[3] ,GPD1 Pin 3 Configuration" "Input,Output,Reserved,Reserved,HSI_ACREADY,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[3]"
|
|
bitfld.long 0x00 8.--11. " GPD1CON[2] ,GPD1 Pin 2 Configuration" "Input,Output,Reserved,Reserved,HSI_CAFLAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[2]"
|
|
bitfld.long 0x00 4.--7. " GPD1CON[1] ,GPD1 Pin 1 Configuration" "Input,Output,Reserved,Reserved,HSI_CADATA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[1]"
|
|
bitfld.long 0x00 0.--3. " GPD1CON[0] ,GPD1 Pin 0 Configuration" "Input,Output,Reserved,Reserved,HSI_CAWAKE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[0]"
|
|
group.byte 0x184++0x00
|
|
line.byte 0x00 "GPD1DAT,Port Group GPD1 Data Register"
|
|
bitfld.byte 0x00 7. " GPD1DAT[7] ,GPD1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPD1DAT[6] ,GPD1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPD1DAT[5] ,GPD1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPD1DAT[4] ,GPD1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPD1DAT[3] ,GPD1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPD1DAT[2] ,GPD1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPD1DAT[1] ,GPD1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPD1DAT[0] ,GPD1 Pin 0 Data" "Low,High"
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "GPD1PUD,Port Group GPD1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPD1PUD[7] ,GPD1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPD1PUD[6] ,GPD1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPD1PUD[5] ,GPD1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPD1PUD[4] ,GPD1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPD1PUD[3] ,GPD1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD1PUD[2] ,GPD1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD1PUD[1] ,GPD1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD1PUD[0] ,GPD1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x18C++0x02
|
|
line.tbyte 0x00 "GPD1DRV,Port Group GPD1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPD1DRV[7] ,GPD1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPD1DRV[6] ,GPD1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPD1DRV[5] ,GPD1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPD1DRV[4] ,GPD1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPD1DRV[3] ,GPD1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPD1DRV[2] ,GPD1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPD1DRV[1] ,GPD1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPD1DRV[0] ,GPD1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "GPD1CONPDN,Port Group GPD1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPD1[7] ,GPD1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPD1[6] ,GPD1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPD1[5] ,GPD1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPD1[4] ,GPD1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPD1[3] ,GPD1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPD1[2] ,GPD1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPD1[1] ,GPD1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPD1[0] ,GPD1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "GPD1PUDPDN,Port Group GPD1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPD1[7] ,GPD1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPD1[6] ,GPD1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPD1[5] ,GPD1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPD1[4] ,GPD1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPD1[3] ,GPD1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD1[2] ,GPD1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD1[1] ,GPD1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD1[0] ,GPD1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY0"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "GPY0CON,Port Group GPY0 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPY0CON[5] ,GPY0 Pin 5 Configuration" "Input,Output,EBI_WEn,?..."
|
|
bitfld.long 0x00 16.--19. " GPY0CON[4] ,GPY0 Pin 4 Configuration" "Input,Output,EBI_OEn,?..."
|
|
bitfld.long 0x00 12.--15. " GPY0CON[3] ,GPY0 Pin 3 Configuration" "Input,Output,SROM_CSn[3],?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPY0CON[2] ,GPY0 Pin 2 Configuration" "Input,Output,SROM_CSn[2],?..."
|
|
bitfld.long 0x00 4.--7. " GPY0CON[1] ,GPY0 Pin 1 Configuration" "Input,Output,SROM_CSn[1],?..."
|
|
bitfld.long 0x00 0.--3. " GPY0CON[0] ,GPY0 Pin 0 Configuration" "Input,Output,SROM_CSn[0],?..."
|
|
group.byte 0x1A4++0x00
|
|
line.byte 0x00 "GPY0DAT,Port Group GPY0 Data Register"
|
|
bitfld.byte 0x00 5. " GPY0DAT[5] ,GPY0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY0DAT[4] ,GPY0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPY0DAT[3] ,GPY0 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPY0DAT[2] ,GPY0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY0DAT[1] ,GPY0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY0DAT[0] ,GPY0 Pin 0 Data" "Low,High"
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "GPY0PUD,Port Group GPY0 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY0PUD[5] ,GPY0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY0PUD[4] ,GPY0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY0PUD[3] ,GPY0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0PUD[2] ,GPY0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY0PUD[1] ,GPY0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY0PUD[0] ,GPY0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1AC++0x02
|
|
line.tbyte 0x00 "GPY0DRV,Port Group GPY0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPY0DRV[5] ,GPY0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY0DRV[4] ,GPY0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPY0DRV[3] ,GPY0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPY0DRV[2] ,GPY0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY0DRV[1] ,GPY0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY0DRV[0] ,GPY0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "GPY0CONPDN,Port Group GPY0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPY0[5] ,GPY0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY0[4] ,GPY0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPY0[3] ,GPY0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0[2] ,GPY0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY0[1] ,GPY0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY0[0] ,GPY0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "GPY0PUDPDN,Port Group GPY0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY0[5] ,GPY0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY0[4] ,GPY0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY0[3] ,GPY0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0[2] ,GPY0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY0[1] ,GPY0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY0[0] ,GPY0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY1"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "GPY1CON,Port Group GPY1 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPY1CON[3] ,GPY1 Pin 3 Configuration" "Input,Output,EBI_DATA_RDn,?..."
|
|
bitfld.long 0x00 8.--11. " GPY1CON[2] ,GPY1 Pin 2 Configuration" "Input,Output,SROM_WAITn,?..."
|
|
bitfld.long 0x00 4.--7. " GPY1CON[1] ,GPY1 Pin 1 Configuration" "Input,Output,EBI_BEn[1],?..."
|
|
bitfld.long 0x00 0.--3. " GPY1CON[0] ,GPY1 Pin 0 Configuration" "Input,Output,EBI_BEn[0],?..."
|
|
group.byte 0x1C4++0x00
|
|
line.byte 0x00 "GPY1DAT,Port Group GPY1 Data Register"
|
|
bitfld.byte 0x00 3. " GPY1DAT[3] ,GPY1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY1DAT[2] ,GPY1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY1DAT[1] ,GPY1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY1DAT[0] ,GPY1 Pin 0 Data" "Low,High"
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "GPY1PUD,Port Group GPY1 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPY1PUD[3] ,GPY1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY1PUD[2] ,GPY1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY1PUD[1] ,GPY1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY1PUD[0] ,GPY1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1CC++0x02
|
|
line.tbyte 0x00 "GPY1DRV,Port Group GPY1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPY1DRV[3] ,GPY1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY1DRV[2] ,GPY1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY1DRV[1] ,GPY1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY1DRV[0] ,GPY1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "GPY1CONPDN,Port Group GPY1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPY1[3] ,GPY1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY1[2] ,GPY1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY1[1] ,GPY1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY1[0] ,GPY1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "GPY1PUDPDN,Port Group GPY1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPY1[3] ,GPY1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY1[2] ,GPY1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY1[1] ,GPY1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY1[0] ,GPY1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY2"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "GPY2CON,Port Group GPY2 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPY2CON[5] ,GPY2 Pin 5 Configuration" "Input,Output,?..."
|
|
bitfld.long 0x00 16.--19. " GPY2CON[4] ,GPY2 Pin 4 Configuration" "Input,Output,?..."
|
|
bitfld.long 0x00 12.--15. " GPY2CON[3] ,GPY2 Pin 3 Configuration" "Input,Output,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPY2CON[2] ,GPY2 Pin 2 Configuration" "Input,Output,?..."
|
|
bitfld.long 0x00 4.--7. " GPY2CON[1] ,GPY2 Pin 1 Configuration" "Input,Output,?..."
|
|
bitfld.long 0x00 0.--3. " GPY2CON[0] ,GPY2 Pin 0 Configuration" "Input,Output,?..."
|
|
group.byte 0x1E4++0x00
|
|
line.byte 0x00 "GPY2DAT,Port Group GPY2 Data Register"
|
|
bitfld.byte 0x00 5. " GPY2DAT[5] ,GPY2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY2DAT[4] ,GPY2 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPY2DAT[3] ,GPY2 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPY2DAT[2] ,GPY2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY2DAT[1] ,GPY2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY2DAT[0] ,GPY2 Pin 0 Data" "Low,High"
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "GPY2PUD,Port Group GPY2 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY2PUD[5] ,GPY2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY2PUD[4] ,GPY2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY2PUD[3] ,GPY2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2PUD[2] ,GPY2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY2PUD[1] ,GPY2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY2PUD[0] ,GPY2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1EC++0x02
|
|
line.tbyte 0x00 "GPY2DRV,Port Group GPY2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPY2DRV[5] ,GPY2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY2DRV[4] ,GPY2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPY2DRV[3] ,GPY2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPY2DRV[2] ,GPY2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY2DRV[1] ,GPY2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY2DRV[0] ,GPY2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "GPY2CONPDN,Port Group GPY2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPY2[5] ,GPY2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY2[4] ,GPY2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPY2[3] ,GPY2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2[2] ,GPY2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY2[1] ,GPY2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY2[0] ,GPY2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "GPY2PUDPDN,Port Group GPY2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY2[5] ,GPY2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY2[4] ,GPY2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY2[3] ,GPY2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2[2] ,GPY2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY2[1] ,GPY2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY2[0] ,GPY2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY3"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "GPY3CON,Port Group GPY3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY3CON[7] ,GPY3 Pin 7 Configuration" "Input,Output,EBI_ADDR[7],?..."
|
|
bitfld.long 0x00 24.--27. " GPY3CON[6] ,GPY3 Pin 6 Configuration" "Input,Output,EBI_ADDR[6],?..."
|
|
bitfld.long 0x00 20.--23. " GPY3CON[5] ,GPY3 Pin 5 Configuration" "Input,Output,EBI_ADDR[5],?..."
|
|
bitfld.long 0x00 16.--19. " GPY3CON[4] ,GPY3 Pin 4 Configuration" "Input,Output,EBI_ADDR[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY3CON[3] ,GPY3 Pin 3 Configuration" "Input,Output,EBI_ADDR[3],?..."
|
|
bitfld.long 0x00 8.--11. " GPY3CON[2] ,GPY3 Pin 2 Configuration" "Input,Output,EBI_ADDR[2],?..."
|
|
bitfld.long 0x00 4.--7. " GPY3CON[1] ,GPY3 Pin 1 Configuration" "Input,Output,EBI_ADDR[1],?..."
|
|
bitfld.long 0x00 0.--3. " GPY3CON[0] ,GPY3 Pin 0 Configuration" "Input,Output,EBI_ADDR[0],?..."
|
|
group.byte 0x204++0x00
|
|
line.byte 0x00 "GPY3DAT,Port Group GPY3 Data Register"
|
|
bitfld.byte 0x00 7. " GPY3DAT[7] ,GPY3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY3DAT[6] ,GPY3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY3DAT[5] ,GPY3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY3DAT[4] ,GPY3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY3DAT[3] ,GPY3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY3DAT[2] ,GPY3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY3DAT[1] ,GPY3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY3DAT[0] ,GPY3 Pin 0 Data" "Low,High"
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "GPY3PUD,Port Group GPY3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY3PUD[7] ,GPY3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY3PUD[6] ,GPY3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY3PUD[5] ,GPY3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY3PUD[4] ,GPY3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3PUD[3] ,GPY3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY3PUD[2] ,GPY3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY3PUD[1] ,GPY3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY3PUD[0] ,GPY3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x20C++0x02
|
|
line.tbyte 0x00 "GPY3DRV,Port Group GPY3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY3DRV[7] ,GPY3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY3DRV[6] ,GPY3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY3DRV[5] ,GPY3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY3DRV[4] ,GPY3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY3DRV[3] ,GPY3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY3DRV[2] ,GPY3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY3DRV[1] ,GPY3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY3DRV[0] ,GPY3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x210++0x01
|
|
line.word 0x00 "GPY3CONPDN,Port Group GPY3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY3[7] ,GPY3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY3[6] ,GPY3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY3[5] ,GPY3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY3[4] ,GPY3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3[3] ,GPY3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY3[2] ,GPY3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY3[1] ,GPY3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY3[0] ,GPY3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x214++0x01
|
|
line.word 0x00 "GPY3PUDPDN,Port Group GPY3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY3[7] ,GPY3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY3[6] ,GPY3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY3[5] ,GPY3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY3[4] ,GPY3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3[3] ,GPY3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY3[2] ,GPY3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY3[1] ,GPY3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY3[0] ,GPY3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY4"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "GPY4CON,Port Group GPY4 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY4CON[7] ,GPY4 Pin 7 Configuration" "Input,Output,EBI_ADDR[15],HSI_CAREADY,?..."
|
|
bitfld.long 0x00 24.--27. " GPY4CON[6] ,GPY4 Pin 6 Configuration" "Input,Output,EBI_ADDR[14],HSI_ACFLAG,?..."
|
|
bitfld.long 0x00 20.--23. " GPY4CON[5] ,GPY4 Pin 5 Configuration" "Input,Output,EBI_ADDR[13],HSI_ACDATA,?..."
|
|
bitfld.long 0x00 16.--19. " GPY4CON[4] ,GPY4 Pin 4 Configuration" "Input,Output,EBI_ADDR[12],HSI_ACWAKE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY4CON[3] ,GPY4 Pin 3 Configuration" "Input,Output,EBI_ADDR[11],HSI_ACREADY,?..."
|
|
bitfld.long 0x00 8.--11. " GPY4CON[2] ,GPY4 Pin 2 Configuration" "Input,Output,EBI_ADDR[10],HSI_CAFLAG,?..."
|
|
bitfld.long 0x00 4.--7. " GPY4CON[1] ,GPY4 Pin 1 Configuration" "Input,Output,EBI_ADDR[9],HSI_CADATA,?..."
|
|
bitfld.long 0x00 0.--3. " GPY4CON[0] ,GPY4 Pin 0 Configuration" "Input,Output,EBI_ADDR[8],HSI_CAWAKE,?..."
|
|
group.byte 0x224++0x00
|
|
line.byte 0x00 "GPY4DAT,Port Group GPY4 Data Register"
|
|
bitfld.byte 0x00 7. " GPY4DAT[7] ,GPY4 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY4DAT[6] ,GPY4 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY4DAT[5] ,GPY4 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY4DAT[4] ,GPY4 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY4DAT[3] ,GPY4 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY4DAT[2] ,GPY4 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY4DAT[1] ,GPY4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY4DAT[0] ,GPY4 Pin 0 Data" "Low,High"
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "GPY4PUD,Port Group GPY4 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY4PUD[7] ,GPY4 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY4PUD[6] ,GPY4 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY4PUD[5] ,GPY4 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY4PUD[4] ,GPY4 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4PUD[3] ,GPY4 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY4PUD[2] ,GPY4 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY4PUD[1] ,GPY4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY4PUD[0] ,GPY4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x22C++0x02
|
|
line.tbyte 0x00 "GPY4DRV,Port Group GPY4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY4DRV[7] ,GPY4 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY4DRV[6] ,GPY4 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY4DRV[5] ,GPY4 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY4DRV[4] ,GPY4 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY4DRV[3] ,GPY4 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY4DRV[2] ,GPY4 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY4DRV[1] ,GPY4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY4DRV[0] ,GPY4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x230++0x01
|
|
line.word 0x00 "GPY4CONPDN,Port Group GPY4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY4[7] ,GPY4 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY4[6] ,GPY4 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY4[5] ,GPY4 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY4[4] ,GPY4 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4[3] ,GPY4 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY4[2] ,GPY4 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY4[1] ,GPY4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY4[0] ,GPY4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x234++0x01
|
|
line.word 0x00 "GPY4PUDPDN,Port Group GPY4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY4[7] ,GPY4 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY4[6] ,GPY4 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY4[5] ,GPY4 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY4[4] ,GPY4 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4[3] ,GPY4 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY4[2] ,GPY4 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY4[1] ,GPY4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY4[0] ,GPY4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY5"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "GPY5CON,Port Group GPY5 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY5CON[7] ,GPY5 Pin 7 Configuration" "Input,Output,EBI_DATA[7],?..."
|
|
bitfld.long 0x00 24.--27. " GPY5CON[6] ,GPY5 Pin 6 Configuration" "Input,Output,EBI_DATA[6],?..."
|
|
bitfld.long 0x00 20.--23. " GPY5CON[5] ,GPY5 Pin 5 Configuration" "Input,Output,EBI_DATA[5],?..."
|
|
bitfld.long 0x00 16.--19. " GPY5CON[4] ,GPY5 Pin 4 Configuration" "Input,Output,EBI_DATA[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY5CON[3] ,GPY5 Pin 3 Configuration" "Input,Output,EBI_DATA[3],?..."
|
|
bitfld.long 0x00 8.--11. " GPY5CON[2] ,GPY5 Pin 2 Configuration" "Input,Output,EBI_DATA[2],?..."
|
|
bitfld.long 0x00 4.--7. " GPY5CON[1] ,GPY5 Pin 1 Configuration" "Input,Output,EBI_DATA[1],?..."
|
|
bitfld.long 0x00 0.--3. " GPY5CON[0] ,GPY5 Pin 0 Configuration" "Input,Output,EBI_DATA[0],?..."
|
|
group.byte 0x244++0x00
|
|
line.byte 0x00 "GPY5DAT,Port Group GPY5 Data Register"
|
|
bitfld.byte 0x00 7. " GPY5DAT[7] ,GPY5 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY5DAT[6] ,GPY5 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY5DAT[5] ,GPY5 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY5DAT[4] ,GPY5 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY5DAT[3] ,GPY5 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY5DAT[2] ,GPY5 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY5DAT[1] ,GPY5 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY5DAT[0] ,GPY5 Pin 0 Data" "Low,High"
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "GPY5PUD,Port Group GPY5 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY5PUD[7] ,GPY5 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY5PUD[6] ,GPY5 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY5PUD[5] ,GPY5 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY5PUD[4] ,GPY5 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5PUD[3] ,GPY5 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY5PUD[2] ,GPY5 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY5PUD[1] ,GPY5 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY5PUD[0] ,GPY5 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x24C++0x02
|
|
line.tbyte 0x00 "GPY5DRV,Port Group GPY5 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY5DRV[7] ,GPY5 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY5DRV[6] ,GPY5 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY5DRV[5] ,GPY5 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY5DRV[4] ,GPY5 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY5DRV[3] ,GPY5 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY5DRV[2] ,GPY5 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY5DRV[1] ,GPY5 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY5DRV[0] ,GPY5 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "GPY5CONPDN,Port Group GPY5 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY5[7] ,GPY5 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY5[6] ,GPY5 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY5[5] ,GPY5 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY5[4] ,GPY5 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5[3] ,GPY5 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY5[2] ,GPY5 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY5[1] ,GPY5 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY5[0] ,GPY5 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "GPY5PUDPDN,Port Group GPY5 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY5[7] ,GPY5 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY5[6] ,GPY5 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY5[5] ,GPY5 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY5[4] ,GPY5 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5[3] ,GPY5 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY5[2] ,GPY5 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY5[1] ,GPY5 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY5[0] ,GPY5 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY6"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "GPY6CON,Port Group GPY6 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY6CON[7] ,GPY6 Pin 7 Configuration" "Input,Output,EBI_DATA[15],?..."
|
|
bitfld.long 0x00 24.--27. " GPY6CON[6] ,GPY6 Pin 6 Configuration" "Input,Output,EBI_DATA[14],?..."
|
|
bitfld.long 0x00 20.--23. " GPY6CON[5] ,GPY6 Pin 5 Configuration" "Input,Output,EBI_DATA[13],?..."
|
|
bitfld.long 0x00 16.--19. " GPY6CON[4] ,GPY6 Pin 4 Configuration" "Input,Output,EBI_DATA[12],?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY6CON[3] ,GPY6 Pin 3 Configuration" "Input,Output,EBI_DATA[11],?..."
|
|
bitfld.long 0x00 8.--11. " GPY6CON[2] ,GPY6 Pin 2 Configuration" "Input,Output,EBI_DATA[10],?..."
|
|
bitfld.long 0x00 4.--7. " GPY6CON[1] ,GPY6 Pin 1 Configuration" "Input,Output,EBI_DATA[9],?..."
|
|
bitfld.long 0x00 0.--3. " GPY6CON[0] ,GPY6 Pin 0 Configuration" "Input,Output,EBI_DATA[8],?..."
|
|
group.byte 0x264++0x00
|
|
line.byte 0x00 "GPY6DAT,Port Group GPY6 Data Register"
|
|
bitfld.byte 0x00 7. " GPY6DAT[7] ,GPY6 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY6DAT[6] ,GPY6 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY6DAT[5] ,GPY6 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY6DAT[4] ,GPY6 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY6DAT[3] ,GPY6 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY6DAT[2] ,GPY6 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY6DAT[1] ,GPY6 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY6DAT[0] ,GPY6 Pin 0 Data" "Low,High"
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "GPY6PUD,Port Group GPY6 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY6PUD[7] ,GPY6 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY6PUD[6] ,GPY6 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY6PUD[5] ,GPY6 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY6PUD[4] ,GPY6 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6PUD[3] ,GPY6 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY6PUD[2] ,GPY6 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY6PUD[1] ,GPY6 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY6PUD[0] ,GPY6 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x26C++0x02
|
|
line.tbyte 0x00 "GPY6DRV,Port Group GPY6 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY6DRV[7] ,GPY6 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY6DRV[6] ,GPY6 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY6DRV[5] ,GPY6 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY6DRV[4] ,GPY6 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY6DRV[3] ,GPY6 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY6DRV[2] ,GPY6 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY6DRV[1] ,GPY6 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY6DRV[0] ,GPY6 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "GPY6CONPDN,Port Group GPY6 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY6[7] ,GPY6 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY6[6] ,GPY6 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY6[5] ,GPY6 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY6[4] ,GPY6 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6[3] ,GPY6 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY6[2] ,GPY6 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY6[1] ,GPY6 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY6[0] ,GPY6 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "GPY6PUDPDN,Port Group GPY6 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY6[7] ,GPY6 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY6[6] ,GPY6 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY6[5] ,GPY6 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY6[4] ,GPY6 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6[3] ,GPY6 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY6[2] ,GPY6 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY6[1] ,GPY6 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY6[0] ,GPY6 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 12.
|
|
tree "ETC0"
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "ETC0PUD,Port group ETC0 pull-up/down register"
|
|
bitfld.word 0x00 10.--11. " ETC0PUD[5] ,ETC0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " ETC0PUD[4] ,ETC0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " ETC0PUD[3] ,ETC0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " ETC0PUD[2] ,ETC0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " ETC0PUD[1] ,ETC0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC0PUD[0] ,ETC0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x28C++0x02
|
|
line.tbyte 0x00 "ETC0DRV,Port group ETC0 drive strength control register"
|
|
bitfld.tbyte 0x00 10.--11. " ETC0DRV[5] ,ETC0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " ETC0DRV[4] ,ETC0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " ETC0DRV[3] ,ETC0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " ETC0DRV[2] ,ETC0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " ETC0DRV[1] ,ETC0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC0DRV[0] ,ETC0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "ETC6"
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "ETC6PUD,Port group ETC6 pull-up/down register"
|
|
bitfld.word 0x00 12.--13. " ETC6PUD[6] ,ETC6 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " ETC6PUD[5] ,ETC6 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " ETC6PUD[4] ,ETC6 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " ETC6PUD[3] ,ETC6 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " ETC6PUD[2] ,ETC6 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " ETC6PUD[1] ,ETC6 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC6PUD[0] ,ETC6 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x2AC++0x02
|
|
line.tbyte 0x00 "ETC6DRV,Port group ETC6 drive strength control register"
|
|
bitfld.tbyte 0x00 12.--13. " ETC6DRV[6] ,ETC6 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " ETC6DRV[5] ,ETC6 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " ETC6DRV[4] ,ETC6 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " ETC6DRV[3] ,ETC6 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " ETC6DRV[2] ,ETC6 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " ETC6DRV[1] ,ETC6 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC6DRV[0] ,ETC6 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "ETC7"
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "ETC7PUD,Port group ETC7 pull-up/down register"
|
|
bitfld.word 0x00 8.--9. " ETC7PUD[4] ,ETC7 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " ETC7PUD[3] ,ETC7 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " ETC7PUD[2] ,ETC7 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " ETC7PUD[1] ,ETC7 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC7PUD[0] ,ETC7 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x2CC++0x02
|
|
line.tbyte 0x00 "ETC7DRV,Port group ETC7 drive strength control register"
|
|
bitfld.tbyte 0x00 8.--9. " ETC7DRV[4] ,ETC7 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " ETC7DRV[3] ,ETC7 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " ETC7DRV[2] ,ETC7 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " ETC7DRV[1] ,ETC7 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC7DRV[0] ,ETC7 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 15.
|
|
tree "GPC4"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "GPC4CON,Port Group GPC4 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPC4CON[6] ,GPC4 Pin 6 Configuration" "Input,Output,SD_3_DATA[3],SD_2_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[6]"
|
|
bitfld.long 0x00 20.--23. " GPC4CON[5] ,GPC4 Pin 5 Configuration" "Input,Output,SD_3_DATA[2],SD_2_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[5]"
|
|
bitfld.long 0x00 16.--19. " GPC4CON[4] ,GPC4 Pin 4 Configuration" "Input,Output,SD_3_DATA[1],SD_2_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[4]"
|
|
bitfld.long 0x00 12.--15. " GPC4CON[3] ,GPC4 Pin 3 Configuration" "Input,Output,SD_3_DATA[0],SD_2_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPC4CON[2] ,GPC4 Pin 2 Configuration" "Input,Output,SD_3_CDn,Reserved,SD_3_nRESET_OUT,SD_3_CARD_INT_n,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[2]"
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bitfld.long 0x00 4.--7. " GPC4CON[1] ,GPC4 Pin 1 Configuration" "Input,Output,SD_3_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[1]"
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bitfld.long 0x00 0.--3. " GPC4CON[0] ,GPC4 Pin 0 Configuration" "Input,Output,SD_3_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[0]"
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group.byte 0x2E4++0x00
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line.byte 0x00 "GPC4DAT,Port Group GPC4 Data Register"
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bitfld.byte 0x00 6. " GPC4DAT[6] ,GPC4 Pin 6 Data" "Low,High"
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bitfld.byte 0x00 5. " GPC4DAT[5] ,GPC4 Pin 5 Data" "Low,High"
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bitfld.byte 0x00 4. " GPC4DAT[4] ,GPC4 Pin 4 Data" "Low,High"
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bitfld.byte 0x00 3. " GPC4DAT[3] ,GPC4 Pin 3 Data" "Low,High"
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textline " "
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bitfld.byte 0x00 2. " GPC4DAT[2] ,GPC4 Pin 2 Data" "Low,High"
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bitfld.byte 0x00 1. " GPC4DAT[1] ,GPC4 Pin 1 Data" "Low,High"
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bitfld.byte 0x00 0. " GPC4DAT[0] ,GPC4 Pin 0 Data" "Low,High"
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group.word 0x2E8++0x01
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line.word 0x00 "GPC4PUD,Port Group GPC4 Pull-up/down Register"
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bitfld.word 0x00 12.--13. " GPC4PUD[6] ,GPC4 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 10.--11. " GPC4PUD[5] ,GPC4 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 8.--9. " GPC4PUD[4] ,GPC4 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 6.--7. " GPC4PUD[3] ,GPC4 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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textline " "
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bitfld.word 0x00 4.--5. " GPC4PUD[2] ,GPC4 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 2.--3. " GPC4PUD[1] ,GPC4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 0.--1. " GPC4PUD[0] ,GPC4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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group.tbyte 0x2EC++0x02
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line.tbyte 0x00 "GPC4DRV,Port Group GPC4 Drive Strength Control Register"
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bitfld.tbyte 0x00 12.--13. " GPC4DRV[6] ,GPC4 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
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bitfld.tbyte 0x00 10.--11. " GPC4DRV[5] ,GPC4 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
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bitfld.tbyte 0x00 8.--9. " GPC4DRV[4] ,GPC4 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
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bitfld.tbyte 0x00 6.--7. " GPC4DRV[3] ,GPC4 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
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textline " "
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bitfld.tbyte 0x00 4.--5. " GPC4DRV[2] ,GPC4 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
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bitfld.tbyte 0x00 2.--3. " GPC4DRV[1] ,GPC4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
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bitfld.tbyte 0x00 0.--1. " GPC4DRV[0] ,GPC4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
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group.word 0x2F0++0x01
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line.word 0x00 "GPC4CONPDN,Port Group GPC4 Power Down Mode Configuration Register"
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bitfld.word 0x00 12.--13. " GPC4[6] ,GPC4 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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bitfld.word 0x00 10.--11. " GPC4[5] ,GPC4 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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bitfld.word 0x00 8.--9. " GPC4[4] ,GPC4 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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bitfld.word 0x00 6.--7. " GPC4[3] ,GPC4 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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textline " "
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bitfld.word 0x00 4.--5. " GPC4[2] ,GPC4 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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bitfld.word 0x00 2.--3. " GPC4[1] ,GPC4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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bitfld.word 0x00 0.--1. " GPC4[0] ,GPC4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
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group.word 0x2F4++0x01
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line.word 0x00 "GPC4PUDPDN,Port Group GPC4 Power Down Mode Pull-up/down Register"
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bitfld.word 0x00 12.--13. " GPC4[6] ,GPC4 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 10.--11. " GPC4[5] ,GPC4 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 8.--9. " GPC4[4] ,GPC4 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 6.--7. " GPC4[3] ,GPC4 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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textline " "
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bitfld.word 0x00 4.--5. " GPC4[2] ,GPC4 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 2.--3. " GPC4[1] ,GPC4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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bitfld.word 0x00 0.--1. " GPC4[0] ,GPC4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
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tree.end
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width 19.
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tree "External interrupts"
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tree "External interrupt configuration"
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group.long 0x700++0x3F
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line.long 0x00 "EXT_INT1_CON,External interrupt EXT_INT1 configuration register"
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bitfld.long 0x00 28.--30. " EXT_INT1_CON[7] ,Setting the signaling method of EXT_INT1[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x00 24.--26. " EXT_INT1_CON[6] ,Setting the signaling method of EXT_INT1[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x00 20.--22. " EXT_INT1_CON[5] ,Setting the signaling method of EXT_INT1[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x00 16.--18. " EXT_INT1_CON[4] ,Setting the signaling method of EXT_INT1[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x00 12.--14. " EXT_INT1_CON[3] ,Setting the signaling method of EXT_INT1[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x00 8.--10. " EXT_INT1_CON[2] ,Setting the signaling method of EXT_INT1[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x00 4.--6. " EXT_INT1_CON[1] ,Setting the signaling method of EXT_INT1[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x00 0.--2. " EXT_INT1_CON[0] ,Setting the signaling method of EXT_INT1[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x04 "EXT_INT2_CON,External interrupt EXT_INT2 configuration register"
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bitfld.long 0x04 20.--22. " EXT_INT2_CON[5] ,Setting the signaling method of EXT_INT2[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x04 16.--18. " EXT_INT2_CON[4] ,Setting the signaling method of EXT_INT2[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x04 12.--14. " EXT_INT2_CON[3] ,Setting the signaling method of EXT_INT2[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x04 8.--10. " EXT_INT2_CON[2] ,Setting the signaling method of EXT_INT2[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x04 4.--6. " EXT_INT2_CON[1] ,Setting the signaling method of EXT_INT2[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x04 0.--2. " EXT_INT2_CON[0] ,Setting the signaling method of EXT_INT2[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x08 "EXT_INT3_CON,External interrupt EXT_INT3 configuration register"
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bitfld.long 0x08 28.--30. " EXT_INT3_CON[7] ,Setting the signaling method of EXT_INT3[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x08 24.--26. " EXT_INT3_CON[6] ,Setting the signaling method of EXT_INT3[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x08 20.--22. " EXT_INT3_CON[5] ,Setting the signaling method of EXT_INT3[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x08 16.--18. " EXT_INT3_CON[4] ,Setting the signaling method of EXT_INT3[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x08 12.--14. " EXT_INT3_CON[3] ,Setting the signaling method of EXT_INT3[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x08 8.--10. " EXT_INT3_CON[2] ,Setting the signaling method of EXT_INT3[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x08 4.--6. " EXT_INT3_CON[1] ,Setting the signaling method of EXT_INT3[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x08 0.--2. " EXT_INT3_CON[0] ,Setting the signaling method of EXT_INT3[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x0C "EXT_INT4_CON,External interrupt EXT_INT4 configuration register"
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bitfld.long 0x0C 16.--18. " EXT_INT4_CON[4] ,Setting the signaling method of EXT_INT4[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x0C 12.--14. " EXT_INT4_CON[3] ,Setting the signaling method of EXT_INT4[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x0C 8.--10. " EXT_INT4_CON[2] ,Setting the signaling method of EXT_INT4[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x0C 4.--6. " EXT_INT4_CON[1] ,Setting the signaling method of EXT_INT4[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x0C 0.--2. " EXT_INT4_CON[0] ,Setting the signaling method of EXT_INT4[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x10 "EXT_INT5_CON,External interrupt EXT_INT5 configuration register"
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bitfld.long 0x10 16.--18. " EXT_INT5_CON[4] ,Setting the signaling method of EXT_INT5[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x10 12.--14. " EXT_INT5_CON[3] ,Setting the signaling method of EXT_INT5[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x10 8.--10. " EXT_INT5_CON[2] ,Setting the signaling method of EXT_INT5[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x10 4.--6. " EXT_INT5_CON[1] ,Setting the signaling method of EXT_INT5[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x10 0.--2. " EXT_INT5_CON[0] ,Setting the signaling method of EXT_INT5[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x14 "EXT_INT6_CON,External interrupt EXT_INT6 configuration register"
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bitfld.long 0x14 12.--14. " EXT_INT6_CON[3] ,Setting the signaling method of EXT_INT6[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x14 8.--10. " EXT_INT6_CON[2] ,Setting the signaling method of EXT_INT6[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x14 4.--6. " EXT_INT6_CON[1] ,Setting the signaling method of EXT_INT6[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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textline " "
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bitfld.long 0x14 0.--2. " EXT_INT6_CON[0] ,Setting the signaling method of EXT_INT6[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x18 "EXT_INT7_CON,External interrupt EXT_INT7 configuration register"
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bitfld.long 0x18 12.--14. " EXT_INT7_CON[3] ,Setting the signaling method of EXT_INT7[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x18 8.--10. " EXT_INT7_CON[2] ,Setting the signaling method of EXT_INT7[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x18 4.--6. " EXT_INT7_CON[1] ,Setting the signaling method of EXT_INT7[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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textline " "
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bitfld.long 0x18 0.--2. " EXT_INT7_CON[0] ,Setting the signaling method of EXT_INT7[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x1C "EXT_INT8_CON,External interrupt EXT_INT8 configuration register"
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bitfld.long 0x1C 24.--26. " EXT_INT8_CON[6] ,Setting the signaling method of EXT_INT8[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x1C 20.--22. " EXT_INT8_CON[5] ,Setting the signaling method of EXT_INT8[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x1C 16.--18. " EXT_INT8_CON[4] ,Setting the signaling method of EXT_INT8[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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|
textline " "
|
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bitfld.long 0x1C 12.--14. " EXT_INT8_CON[3] ,Setting the signaling method of EXT_INT8[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x1C 8.--10. " EXT_INT8_CON[2] ,Setting the signaling method of EXT_INT8[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x1C 4.--6. " EXT_INT8_CON[1] ,Setting the signaling method of EXT_INT8[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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textline " "
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bitfld.long 0x1C 0.--2. " EXT_INT8_CON[0] ,Setting the signaling method of EXT_INT8[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x20 "EXT_INT9_CON,External interrupt EXT_INT9 configuration register"
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bitfld.long 0x20 12.--14. " EXT_INT9_CON[3] ,Setting the signaling method of EXT_INT9[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x20 8.--10. " EXT_INT9_CON[2] ,Setting the signaling method of EXT_INT9[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x20 4.--6. " EXT_INT9_CON[1] ,Setting the signaling method of EXT_INT9[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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textline " "
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bitfld.long 0x20 0.--2. " EXT_INT9_CON[0] ,Setting the signaling method of EXT_INT9[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x24 "EXT_INT10_CON,External interrupt EXT_INT10 configuration register"
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bitfld.long 0x24 24.--26. " EXT_INT10_CON[6] ,Setting the signaling method of EXT_INT10[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x24 20.--22. " EXT_INT10_CON[5] ,Setting the signaling method of EXT_INT10[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x24 16.--18. " EXT_INT10_CON[4] ,Setting the signaling method of EXT_INT10[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
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bitfld.long 0x24 12.--14. " EXT_INT10_CON[3] ,Setting the signaling method of EXT_INT10[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x24 8.--10. " EXT_INT10_CON[2] ,Setting the signaling method of EXT_INT10[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x24 4.--6. " EXT_INT10_CON[1] ,Setting the signaling method of EXT_INT10[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
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bitfld.long 0x24 0.--2. " EXT_INT10_CON[0] ,Setting the signaling method of EXT_INT10[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x28 "EXT_INT11_CON,External interrupt EXT_INT11 configuration register"
|
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bitfld.long 0x28 24.--26. " EXT_INT11_CON[6] ,Setting the signaling method of EXT_INT11[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x28 20.--22. " EXT_INT11_CON[5] ,Setting the signaling method of EXT_INT11[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
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bitfld.long 0x28 16.--18. " EXT_INT11_CON[4] ,Setting the signaling method of EXT_INT11[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x28 12.--14. " EXT_INT11_CON[3] ,Setting the signaling method of EXT_INT11[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 8.--10. " EXT_INT11_CON[2] ,Setting the signaling method of EXT_INT11[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
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bitfld.long 0x28 4.--6. " EXT_INT11_CON[1] ,Setting the signaling method of EXT_INT11[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x28 0.--2. " EXT_INT11_CON[0] ,Setting the signaling method of EXT_INT11[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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line.long 0x2C "EXT_INT12_CON,External interrupt EXT_INT12 configuration register"
|
|
bitfld.long 0x2C 12.--14. " EXT_INT12_CON[3] ,Setting the signaling method of EXT_INT12[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 8.--10. " EXT_INT12_CON[2] ,Setting the signaling method of EXT_INT12[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
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bitfld.long 0x2C 4.--6. " EXT_INT12_CON[1] ,Setting the signaling method of EXT_INT12[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x2C 0.--2. " EXT_INT12_CON[0] ,Setting the signaling method of EXT_INT12[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x30 "EXT_INT13_CON,External interrupt EXT_INT13 configuration register"
|
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bitfld.long 0x30 28.--30. " EXT_INT13_CON[7] ,Setting the signaling method of EXT_INT13[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x30 24.--26. " EXT_INT13_CON[6] ,Setting the signaling method of EXT_INT13[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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bitfld.long 0x30 20.--22. " EXT_INT13_CON[5] ,Setting the signaling method of EXT_INT13[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
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bitfld.long 0x30 16.--18. " EXT_INT13_CON[4] ,Setting the signaling method of EXT_INT13[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
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bitfld.long 0x30 12.--14. " EXT_INT13_CON[3] ,Setting the signaling method of EXT_INT13[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 8.--10. " EXT_INT13_CON[2] ,Setting the signaling method of EXT_INT13[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
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bitfld.long 0x30 4.--6. " EXT_INT13_CON[1] ,Setting the signaling method of EXT_INT13[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 0.--2. " EXT_INT13_CON[0] ,Setting the signaling method of EXT_INT13[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
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line.long 0x34 "EXT_INT30_CON,External interrupt EXT_INT30 configuration register"
|
|
bitfld.long 0x34 24.--26. " EXT_INT30_CON[6] ,Setting the signaling method of EXT_INT30[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 20.--22. " EXT_INT30_CON[5] ,Setting the signaling method of EXT_INT30[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 16.--18. " EXT_INT30_CON[4] ,Setting the signaling method of EXT_INT30[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x34 12.--14. " EXT_INT30_CON[3] ,Setting the signaling method of EXT_INT30[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 8.--10. " EXT_INT30_CON[2] ,Setting the signaling method of EXT_INT30[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 4.--6. " EXT_INT30_CON[1] ,Setting the signaling method of EXT_INT30[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x34 0.--2. " EXT_INT30_CON[0] ,Setting the signaling method of EXT_INT30[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long (0x800+0x0)++0x03
|
|
line.long 0x00 "EXT_INT1_FLTCON0,External interrupt EXT_INT1 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN1[3] ,Filter Enable for EXT_INT1[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT1[3]"
|
|
bitfld.long 0x00 23. " FLTEN1[2] ,Filter Enable for EXT_INT1[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT1[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[1] ,Filter Enable for EXT_INT1[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT1[1]"
|
|
bitfld.long 0x00 7. " FLTEN1[0] ,Filter Enable for EXT_INT1[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT1[0]"
|
|
group.long (0x800+0x0+0x04)++0x03
|
|
line.long 0x00 "EXT_INT1_FLTCON1,External interrupt EXT_INT1 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN1[7] ,Filter Enable for EXT_INT1[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT1[7]"
|
|
bitfld.long 0x00 23. " FLTEN1[6] ,Filter Enable for EXT_INT1[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT1[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[5] ,Filter Enable for EXT_INT1[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT1[5]"
|
|
bitfld.long 0x00 7. " FLTEN1[4] ,Filter Enable for EXT_INT1[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT1[4]"
|
|
textline " "
|
|
group.long (0x800+0x8)++0x03
|
|
line.long 0x00 "EXT_INT2_FLTCON0,External interrupt EXT_INT2 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN2[3] ,Filter Enable for EXT_INT2[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH2[3] ,Filtering width of EXT_INT2[3]"
|
|
bitfld.long 0x00 23. " FLTEN2[2] ,Filter Enable for EXT_INT2[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH2[2] ,Filtering width of EXT_INT2[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN2[1] ,Filter Enable for EXT_INT2[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT2[1]"
|
|
bitfld.long 0x00 7. " FLTEN2[0] ,Filter Enable for EXT_INT2[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT2[0]"
|
|
group.long (0x800+0x8+0x04)++0x03
|
|
line.long 0x00 "EXT_INT2_FLTCON1,External interrupt EXT_INT2 filter configuration register 1"
|
|
bitfld.long 0x00 15. " FLTEN2[5] ,Filter Enable for EXT_INT2[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH2[5] ,Filtering width of EXT_INT2[5]"
|
|
bitfld.long 0x00 7. " FLTEN2[4] ,Filter Enable for EXT_INT2[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH2[4] ,Filtering width of EXT_INT2[4]"
|
|
textline " "
|
|
group.long (0x800+0x10)++0x03
|
|
line.long 0x00 "EXT_INT3_FLTCON0,External interrupt EXT_INT3 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN3[3] ,Filter Enable for EXT_INT3[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT3[3]"
|
|
bitfld.long 0x00 23. " FLTEN3[2] ,Filter Enable for EXT_INT3[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT3[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3[1] ,Filter Enable for EXT_INT3[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT3[1]"
|
|
bitfld.long 0x00 7. " FLTEN3[0] ,Filter Enable for EXT_INT3[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT3[0]"
|
|
group.long (0x800+0x10+0x04)++0x03
|
|
line.long 0x00 "EXT_INT3_FLTCON1,External interrupt EXT_INT3 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN3[7] ,Filter Enable for EXT_INT3[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH3[7] ,Filtering width of EXT_INT3[7]"
|
|
bitfld.long 0x00 23. " FLTEN3[6] ,Filter Enable for EXT_INT3[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH3[6] ,Filtering width of EXT_INT3[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3[5] ,Filter Enable for EXT_INT3[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH3[5] ,Filtering width of EXT_INT3[5]"
|
|
bitfld.long 0x00 7. " FLTEN3[4] ,Filter Enable for EXT_INT3[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH3[4] ,Filtering width of EXT_INT3[4]"
|
|
textline " "
|
|
group.long (0x800+0x18)++0x03
|
|
line.long 0x00 "EXT_INT4_FLTCON0,External interrupt EXT_INT4 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN4[3] ,Filter Enable for EXT_INT4[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT4[3]"
|
|
bitfld.long 0x00 23. " FLTEN4[2] ,Filter Enable for EXT_INT4[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT4[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN4[1] ,Filter Enable for EXT_INT4[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT4[1]"
|
|
bitfld.long 0x00 7. " FLTEN4[0] ,Filter Enable for EXT_INT4[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT4[0]"
|
|
group.long (0x800+0x18+0x04)++0x03
|
|
line.long 0x00 "EXT_INT4_FLTCON1,External interrupt EXT_INT4 filter configuration register 1"
|
|
bitfld.long 0x00 7. " FLTEN4[4] ,Filter Enable for EXT_INT4[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH4[4] ,Filtering width of EXT_INT4[4]"
|
|
textline " "
|
|
group.long (0x800+0x20)++0x03
|
|
line.long 0x00 "EXT_INT5_FLTCON0,External interrupt EXT_INT5 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN5[3] ,Filter Enable for EXT_INT5[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH5[3] ,Filtering width of EXT_INT5[3]"
|
|
bitfld.long 0x00 23. " FLTEN5[2] ,Filter Enable for EXT_INT5[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH5[2] ,Filtering width of EXT_INT5[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN5[1] ,Filter Enable for EXT_INT5[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT5[1]"
|
|
bitfld.long 0x00 7. " FLTEN5[0] ,Filter Enable for EXT_INT5[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT5[0]"
|
|
group.long (0x800+0x20+0x04)++0x03
|
|
line.long 0x00 "EXT_INT5_FLTCON1,External interrupt EXT_INT5 filter configuration register 1"
|
|
bitfld.long 0x00 7. " FLTEN5[4] ,Filter Enable for EXT_INT5[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[4] ,Filtering width of EXT_INT5[4]"
|
|
textline " "
|
|
group.long (0x800+0x28)++0x03
|
|
line.long 0x00 "EXT_INT6_FLTCON0,External interrupt EXT_INT6 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN6[3] ,Filter Enable for EXT_INT6[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH6[3] ,Filtering width of EXT_INT6[3]"
|
|
bitfld.long 0x00 23. " FLTEN6[2] ,Filter Enable for EXT_INT6[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH6[2] ,Filtering width of EXT_INT6[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN6[1] ,Filter Enable for EXT_INT6[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH6[1] ,Filtering width of EXT_INT6[1]"
|
|
bitfld.long 0x00 7. " FLTEN6[0] ,Filter Enable for EXT_INT6[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH6[0] ,Filtering width of EXT_INT6[0]"
|
|
hgroup.long (0x800+0x28+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT6_FLTCON1,External interrupt EXT_INT6 filter configuration register 1"
|
|
group.long (0x800+0x30)++0x03
|
|
line.long 0x00 "EXT_INT7_FLTCON0,External interrupt EXT_INT7 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN7[3] ,Filter Enable for EXT_INT7[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH7[3] ,Filtering width of EXT_INT7[3]"
|
|
bitfld.long 0x00 23. " FLTEN7[2] ,Filter Enable for EXT_INT7[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH7[2] ,Filtering width of EXT_INT7[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN7[1] ,Filter Enable for EXT_INT7[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH7[1] ,Filtering width of EXT_INT7[1]"
|
|
bitfld.long 0x00 7. " FLTEN7[0] ,Filter Enable for EXT_INT7[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH7[0] ,Filtering width of EXT_INT7[0]"
|
|
hgroup.long (0x800+0x30+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT7_FLTCON1,External interrupt EXT_INT7 filter configuration register 1"
|
|
group.long (0x800+0x38)++0x03
|
|
line.long 0x00 "EXT_INT8_FLTCON0,External interrupt EXT_INT8 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN8[3] ,Filter Enable for EXT_INT8[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH8[3] ,Filtering width of EXT_INT8[3]"
|
|
bitfld.long 0x00 23. " FLTEN8[2] ,Filter Enable for EXT_INT8[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH8[2] ,Filtering width of EXT_INT8[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN8[1] ,Filter Enable for EXT_INT8[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH8[1] ,Filtering width of EXT_INT8[1]"
|
|
bitfld.long 0x00 7. " FLTEN8[0] ,Filter Enable for EXT_INT8[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH8[0] ,Filtering width of EXT_INT8[0]"
|
|
group.long (0x800+0x38+0x04)++0x03
|
|
line.long 0x00 "EXT_INT8_FLTCON1,External interrupt EXT_INT8 filter configuration register 1"
|
|
bitfld.long 0x00 23. " FLTEN8[6] ,Filter Enable for EXT_INT8[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH8[6] ,Filtering width of EXT_INT8[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN8[5] ,Filter Enable for EXT_INT8[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH8[5] ,Filtering width of EXT_INT8[5]"
|
|
bitfld.long 0x00 7. " FLTEN8[4] ,Filter Enable for EXT_INT8[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH8[4] ,Filtering width of EXT_INT8[4]"
|
|
textline " "
|
|
group.long (0x800+0x40)++0x03
|
|
line.long 0x00 "EXT_INT9_FLTCON0,External interrupt EXT_INT9 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN9[3] ,Filter Enable for EXT_INT9[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH9[3] ,Filtering width of EXT_INT9[3]"
|
|
bitfld.long 0x00 23. " FLTEN9[2] ,Filter Enable for EXT_INT9[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH9[2] ,Filtering width of EXT_INT9[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN9[1] ,Filter Enable for EXT_INT9[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH9[1] ,Filtering width of EXT_INT9[1]"
|
|
bitfld.long 0x00 7. " FLTEN9[0] ,Filter Enable for EXT_INT9[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH9[0] ,Filtering width of EXT_INT9[0]"
|
|
hgroup.long (0x800+0x40+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT9_FLTCON1,External interrupt EXT_INT9 filter configuration register 1"
|
|
group.long (0x800+0x48)++0x03
|
|
line.long 0x00 "EXT_INT10_FLTCON0,External interrupt EXT_INT10 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN10[3] ,Filter Enable for EXT_INT10[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH10[3] ,Filtering width of EXT_INT10[3]"
|
|
bitfld.long 0x00 23. " FLTEN10[2] ,Filter Enable for EXT_INT10[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[2] ,Filtering width of EXT_INT10[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN10[1] ,Filter Enable for EXT_INT10[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[1] ,Filtering width of EXT_INT10[1]"
|
|
bitfld.long 0x00 7. " FLTEN10[0] ,Filter Enable for EXT_INT10[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[0] ,Filtering width of EXT_INT10[0]"
|
|
group.long (0x800+0x48+0x04)++0x03
|
|
line.long 0x00 "EXT_INT10_FLTCON1,External interrupt EXT_INT10 filter configuration register 1"
|
|
bitfld.long 0x00 23. " FLTEN10[6] ,Filter Enable for EXT_INT10[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[6] ,Filtering width of EXT_INT10[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN10[5] ,Filter Enable for EXT_INT10[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[5] ,Filtering width of EXT_INT10[5]"
|
|
bitfld.long 0x00 7. " FLTEN10[4] ,Filter Enable for EXT_INT10[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[4] ,Filtering width of EXT_INT10[4]"
|
|
textline " "
|
|
group.long (0x800+0x50)++0x03
|
|
line.long 0x00 "EXT_INT11_FLTCON0,External interrupt EXT_INT11 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN11[3] ,Filter Enable for EXT_INT11[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH11[3] ,Filtering width of EXT_INT11[3]"
|
|
bitfld.long 0x00 23. " FLTEN11[2] ,Filter Enable for EXT_INT11[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH11[2] ,Filtering width of EXT_INT11[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN11[1] ,Filter Enable for EXT_INT11[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH11[1] ,Filtering width of EXT_INT11[1]"
|
|
bitfld.long 0x00 7. " FLTEN11[0] ,Filter Enable for EXT_INT11[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH11[0] ,Filtering width of EXT_INT11[0]"
|
|
group.long (0x800+0x50+0x04)++0x03
|
|
line.long 0x00 "EXT_INT11_FLTCON1,External interrupt EXT_INT11 filter configuration register 1"
|
|
bitfld.long 0x00 23. " FLTEN11[6] ,Filter Enable for EXT_INT11[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH11[6] ,Filtering width of EXT_INT11[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN11[5] ,Filter Enable for EXT_INT11[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH11[5] ,Filtering width of EXT_INT11[5]"
|
|
bitfld.long 0x00 7. " FLTEN11[4] ,Filter Enable for EXT_INT11[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH11[4] ,Filtering width of EXT_INT11[4]"
|
|
textline " "
|
|
group.long (0x800+0x58)++0x03
|
|
line.long 0x00 "EXT_INT12_FLTCON0,External interrupt EXT_INT12 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN12[3] ,Filter Enable for EXT_INT12[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH12[3] ,Filtering width of EXT_INT12[3]"
|
|
bitfld.long 0x00 23. " FLTEN12[2] ,Filter Enable for EXT_INT12[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH12[2] ,Filtering width of EXT_INT12[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN12[1] ,Filter Enable for EXT_INT12[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH12[1] ,Filtering width of EXT_INT12[1]"
|
|
bitfld.long 0x00 7. " FLTEN12[0] ,Filter Enable for EXT_INT12[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH12[0] ,Filtering width of EXT_INT12[0]"
|
|
hgroup.long (0x800+0x58+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT12_FLTCON1,External interrupt EXT_INT12 filter configuration register 1"
|
|
group.long (0x800+0x60)++0x03
|
|
line.long 0x00 "EXT_INT13_FLTCON0,External interrupt EXT_INT13 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN13[3] ,Filter Enable for EXT_INT13[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH13[3] ,Filtering width of EXT_INT13[3]"
|
|
bitfld.long 0x00 23. " FLTEN13[2] ,Filter Enable for EXT_INT13[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH13[2] ,Filtering width of EXT_INT13[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN13[1] ,Filter Enable for EXT_INT13[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH13[1] ,Filtering width of EXT_INT13[1]"
|
|
bitfld.long 0x00 7. " FLTEN13[0] ,Filter Enable for EXT_INT13[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH13[0] ,Filtering width of EXT_INT13[0]"
|
|
group.long (0x800+0x60+0x04)++0x03
|
|
line.long 0x00 "EXT_INT13_FLTCON1,External interrupt EXT_INT13 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN13[7] ,Filter Enable for EXT_INT13[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH13[7] ,Filtering width of EXT_INT13[7]"
|
|
bitfld.long 0x00 23. " FLTEN13[6] ,Filter Enable for EXT_INT13[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH13[6] ,Filtering width of EXT_INT13[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN13[5] ,Filter Enable for EXT_INT13[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH13[5] ,Filtering width of EXT_INT13[5]"
|
|
bitfld.long 0x00 7. " FLTEN13[4] ,Filter Enable for EXT_INT13[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH13[4] ,Filtering width of EXT_INT13[4]"
|
|
textline " "
|
|
group.long 0x868++0x07
|
|
line.long 0x00 "EXT_INT30_FLTCON0,External interrupt EXT_INT30 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN18[3] ,Filter Enable for EXT_INT30[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH18[3] ,Filtering width of EXT_INT30[3]"
|
|
bitfld.long 0x00 23. " FLTEN18[2] ,Filter Enable for EXT_INT30[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH18[2] ,Filtering width of EXT_INT30[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN18[1] ,Filter Enable for EXT_INT30[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH18[1] ,Filtering width of EXT_INT30[1]"
|
|
bitfld.long 0x00 7. " FLTEN18[0] ,Filter Enable for EXT_INT30[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH18[0] ,Filtering width of EXT_INT30[0]"
|
|
line.long 0x04 "EXT_INT30_FLTCON1,External interrupt EXT_INT30 filter configuration register 1"
|
|
bitfld.long 0x04 23. " FLTEN18[6] ,Filter Enable for EXT_INT30[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 16.--22. 1. " FLTWIDTH18[6] ,Filtering width of EXT_INT30[6]"
|
|
bitfld.long 0x04 15. " FLTEN18[5] ,Filter Enable for EXT_INT30[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 8.--14. 1. " FLTWIDTH18[5] ,Filtering width of EXT_INT30[5]"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTEN18[4] ,Filter Enable for EXT_INT30[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--6. 1. " FLTWIDTH18[4] ,Filtering width of EXT_INT30[4]"
|
|
tree.end
|
|
tree "External interrupt mask"
|
|
group.long 0x900++0x3F
|
|
line.long 0x00 "EXT_INT1_MASK,External interrupt EXT_INT1 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT1_MASK[7] ,External Interrupt 1 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT1_MASK[6] ,External Interrupt 1 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT1_MASK[5] ,External Interrupt 1 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT1_MASK[4] ,External Interrupt 1 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT1_MASK[3] ,External Interrupt 1 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT1_MASK[2] ,External Interrupt 1 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT1_MASK[1] ,External Interrupt 1 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT1_MASK[0] ,External Interrupt 1 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x04 "EXT_INT2_MASK,External interrupt EXT_INT2 mask register"
|
|
bitfld.long 0x04 5. " EXT_INT2_MASK[5] ,External Interrupt 2 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 4. " EXT_INT2_MASK[4] ,External Interrupt 2 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EXT_INT2_MASK[3] ,External Interrupt 2 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 2. " EXT_INT2_MASK[2] ,External Interrupt 2 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EXT_INT2_MASK[1] ,External Interrupt 2 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 0. " EXT_INT2_MASK[0] ,External Interrupt 2 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x08 "EXT_INT3_MASK,External interrupt EXT_INT3 mask register"
|
|
bitfld.long 0x08 7. " EXT_INT3_MASK[7] ,External Interrupt 3 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 6. " EXT_INT3_MASK[6] ,External Interrupt 3 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EXT_INT3_MASK[5] ,External Interrupt 3 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 4. " EXT_INT3_MASK[4] ,External Interrupt 3 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EXT_INT3_MASK[3] ,External Interrupt 3 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 2. " EXT_INT3_MASK[2] ,External Interrupt 3 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT3_MASK[1] ,External Interrupt 3 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 0. " EXT_INT3_MASK[0] ,External Interrupt 3 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x0C "EXT_INT4_MASK,External interrupt EXT_INT4 mask register"
|
|
bitfld.long 0x0C 4. " EXT_INT4_MASK[4] ,External Interrupt 4 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 3. " EXT_INT4_MASK[3] ,External Interrupt 4 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EXT_INT4_MASK[2] ,External Interrupt 4 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 1. " EXT_INT4_MASK[1] ,External Interrupt 4 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXT_INT4_MASK[0] ,External Interrupt 4 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x10 "EXT_INT5_MASK,External interrupt EXT_INT5 mask register"
|
|
bitfld.long 0x10 4. " EXT_INT5_MASK[4] ,External Interrupt 5 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXT_INT5_MASK[3] ,External Interrupt 5 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 2. " EXT_INT5_MASK[2] ,External Interrupt 5 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 1. " EXT_INT5_MASK[1] ,External Interrupt 5 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 0. " EXT_INT5_MASK[0] ,External Interrupt 5 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x14 "EXT_INT6_MASK,External interrupt EXT_INT6 mask register"
|
|
bitfld.long 0x14 3. " EXT_INT6_MASK[3] ,External Interrupt 6 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 2. " EXT_INT6_MASK[2] ,External Interrupt 6 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT6_MASK[1] ,External Interrupt 6 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 0. " EXT_INT6_MASK[0] ,External Interrupt 6 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x18 "EXT_INT7_MASK,External interrupt EXT_INT7 mask register"
|
|
bitfld.long 0x18 3. " EXT_INT7_MASK[3] ,External Interrupt 7 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 2. " EXT_INT7_MASK[2] ,External Interrupt 7 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT7_MASK[1] ,External Interrupt 7 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 0. " EXT_INT7_MASK[0] ,External Interrupt 7 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x1C "EXT_INT8_MASK,External interrupt EXT_INT8 mask register"
|
|
bitfld.long 0x1C 6. " EXT_INT8_MASK[6] ,External Interrupt 8 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 5. " EXT_INT8_MASK[5] ,External Interrupt 8 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " EXT_INT8_MASK[4] ,External Interrupt 8 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 3. " EXT_INT8_MASK[3] ,External Interrupt 8 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " EXT_INT8_MASK[2] ,External Interrupt 8 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 1. " EXT_INT8_MASK[1] ,External Interrupt 8 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT8_MASK[0] ,External Interrupt 8 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x20 "EXT_INT9_MASK,External interrupt EXT_INT9 mask register"
|
|
bitfld.long 0x20 3. " EXT_INT9_MASK[3] ,External Interrupt 9 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 2. " EXT_INT9_MASK[2] ,External Interrupt 9 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT9_MASK[1] ,External Interrupt 9 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 0. " EXT_INT9_MASK[0] ,External Interrupt 9 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x24 "EXT_INT10_MASK,External interrupt EXT_INT10 mask register"
|
|
bitfld.long 0x24 6. " EXT_INT10_MASK[6] ,External Interrupt 10 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 5. " EXT_INT10_MASK[5] ,External Interrupt 10 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x24 4. " EXT_INT10_MASK[4] ,External Interrupt 10 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 3. " EXT_INT10_MASK[3] ,External Interrupt 10 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x24 2. " EXT_INT10_MASK[2] ,External Interrupt 10 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 1. " EXT_INT10_MASK[1] ,External Interrupt 10 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x24 0. " EXT_INT10_MASK[0] ,External Interrupt 10 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x28 "EXT_INT11_MASK,External interrupt EXT_INT11 mask register"
|
|
bitfld.long 0x28 6. " EXT_INT11_MASK[6] ,External Interrupt 11 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 5. " EXT_INT11_MASK[5] ,External Interrupt 11 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 4. " EXT_INT11_MASK[4] ,External Interrupt 11 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 3. " EXT_INT11_MASK[3] ,External Interrupt 11 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 2. " EXT_INT11_MASK[2] ,External Interrupt 11 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 1. " EXT_INT11_MASK[1] ,External Interrupt 11 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 0. " EXT_INT11_MASK[0] ,External Interrupt 11 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x2C "EXT_INT12_MASK,External interrupt EXT_INT12 mask register"
|
|
bitfld.long 0x2C 3. " EXT_INT12_MASK[3] ,External Interrupt 12 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 2. " EXT_INT12_MASK[2] ,External Interrupt 12 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " EXT_INT12_MASK[1] ,External Interrupt 12 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 0. " EXT_INT12_MASK[0] ,External Interrupt 12 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x30 "EXT_INT13_MASK,External interrupt EXT_INT13 mask register"
|
|
bitfld.long 0x30 7. " EXT_INT13_MASK[7] ,External Interrupt 13 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 6. " EXT_INT13_MASK[6] ,External Interrupt 13 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 5. " EXT_INT13_MASK[5] ,External Interrupt 13 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 4. " EXT_INT13_MASK[4] ,External Interrupt 13 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXT_INT13_MASK[3] ,External Interrupt 13 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 2. " EXT_INT13_MASK[2] ,External Interrupt 13 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 1. " EXT_INT13_MASK[1] ,External Interrupt 13 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 0. " EXT_INT13_MASK[0] ,External Interrupt 13 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "EXT_INT30_MASK,External interrupt EXT_INT30 mask register"
|
|
bitfld.long 0x00 6. " EXT_INT30_MASK[6] ,External Interrupt 30 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 5. " EXT_INT30_MASK[5] ,External Interrupt 30 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT30_MASK[4] ,External Interrupt 30 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT30_MASK[3] ,External Interrupt 30 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT30_MASK[2] ,External Interrupt 30 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT30_MASK[1] ,External Interrupt 30 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT30_MASK[0] ,External Interrupt 30 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++0x3F
|
|
line.long 0x00 "EXT_INT1_PEND,External interrupt EXT_INT1 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT1_PEND[7] ,External Interrupt 1 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT1_PEND[6] ,External Interrupt 1 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT1_PEND[5] ,External Interrupt 1 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT1_PEND[4] ,External Interrupt 1 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT1_PEND[3] ,External Interrupt 1 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT1_PEND[2] ,External Interrupt 1 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT1_PEND[1] ,External Interrupt 1 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT1_PEND[0] ,External Interrupt 1 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x04 "EXT_INT2_PEND,External interrupt EXT_INT2 pending register"
|
|
bitfld.long 0x04 5. " EXT_INT2_PEND[5] ,External Interrupt 2 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " EXT_INT2_PEND[4] ,External Interrupt 2 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EXT_INT2_PEND[3] ,External Interrupt 2 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " EXT_INT2_PEND[2] ,External Interrupt 2 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EXT_INT2_PEND[1] ,External Interrupt 2 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " EXT_INT2_PEND[0] ,External Interrupt 2 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x08 "EXT_INT3_PEND,External interrupt EXT_INT3 pending register"
|
|
bitfld.long 0x08 7. " EXT_INT3_PEND[7] ,External Interrupt 3 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x08 6. " EXT_INT3_PEND[6] ,External Interrupt 3 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EXT_INT3_PEND[5] ,External Interrupt 3 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x08 4. " EXT_INT3_PEND[4] ,External Interrupt 3 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EXT_INT3_PEND[3] ,External Interrupt 3 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x08 2. " EXT_INT3_PEND[2] ,External Interrupt 3 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT3_PEND[1] ,External Interrupt 3 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x08 0. " EXT_INT3_PEND[0] ,External Interrupt 3 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x0C "EXT_INT4_PEND,External interrupt EXT_INT4 pending register"
|
|
bitfld.long 0x0C 4. " EXT_INT4_PEND[4] ,External Interrupt Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 3. " EXT_INT4_PEND[3] ,External Interrupt Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EXT_INT4_PEND[2] ,External Interrupt Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 1. " EXT_INT4_PEND[1] ,External Interrupt Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXT_INT4_PEND[0] ,External Interrupt Pending 0" "Not occurred,Occurred"
|
|
line.long 0x10 "EXT_INT5_PEND,External interrupt EXT_INT5 pending register"
|
|
bitfld.long 0x10 4. " EXT_INT5_PEND[4] ,External Interrupt 5 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x10 3. " EXT_INT5_PEND[3] ,External Interrupt 5 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 2. " EXT_INT5_PEND[2] ,External Interrupt 5 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x10 1. " EXT_INT5_PEND[1] ,External Interrupt 5 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 0. " EXT_INT5_PEND[0] ,External Interrupt 5 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x14 "EXT_INT6_PEND,External interrupt EXT_INT6 pending register"
|
|
bitfld.long 0x14 3. " EXT_INT6_PEND[3] ,External Interrupt 6 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " EXT_INT6_PEND[2] ,External Interrupt 6 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT6_PEND[1] ,External Interrupt 6 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " EXT_INT6_PEND[0] ,External Interrupt 6 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x18 "EXT_INT7_PEND,External interrupt EXT_INT7 pending register"
|
|
bitfld.long 0x18 3. " EXT_INT7_PEND[3] ,External Interrupt 7 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x18 2. " EXT_INT7_PEND[2] ,External Interrupt 7 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT7_PEND[1] ,External Interrupt 7 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x18 0. " EXT_INT7_PEND[0] ,External Interrupt 7 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x1C "EXT_INT8_PEND,External interrupt EXT_INT8 pending register"
|
|
bitfld.long 0x1C 6. " EXT_INT8_PEND[6] ,External Interrupt 8 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 5. " EXT_INT8_PEND[5] ,External Interrupt 8 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " EXT_INT8_PEND[4] ,External Interrupt 8 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 3. " EXT_INT8_PEND[3] ,External Interrupt 8 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " EXT_INT8_PEND[2] ,External Interrupt 8 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 1. " EXT_INT8_PEND[1] ,External Interrupt 8 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT8_PEND[0] ,External Interrupt 8 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x20 "EXT_INT9_PEND,External interrupt EXT_INT9 pending register"
|
|
bitfld.long 0x20 3. " EXT_INT9_PEND[3] ,External Interrupt 9 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x20 2. " EXT_INT9_PEND[2] ,External Interrupt 9 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT9_PEND[1] ,External Interrupt 9 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x20 0. " EXT_INT9_PEND[0] ,External Interrupt 9 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x24 "EXT_INT10_PEND,External interrupt EXT_INT10 pending register"
|
|
bitfld.long 0x24 6. " EXT_INT10_PEND[6] ,External Interrupt 10 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x24 5. " EXT_INT10_PEND[5] ,External Interrupt 10 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x24 4. " EXT_INT10_PEND[4] ,External Interrupt 10 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x24 3. " EXT_INT10_PEND[3] ,External Interrupt 10 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x24 2. " EXT_INT10_PEND[2] ,External Interrupt 10 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x24 1. " EXT_INT10_PEND[1] ,External Interrupt 10 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x24 0. " EXT_INT10_PEND[0] ,External Interrupt 10 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x28 "EXT_INT11_PEND,External interrupt EXT_INT11 pending register"
|
|
bitfld.long 0x28 6. " EXT_INT11_PEND[6] ,External Interrupt 11 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x28 5. " EXT_INT11_PEND[5] ,External Interrupt 11 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 4. " EXT_INT11_PEND[4] ,External Interrupt 11 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x28 3. " EXT_INT11_PEND[3] ,External Interrupt 11 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 2. " EXT_INT11_PEND[2] ,External Interrupt 11 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x28 1. " EXT_INT11_PEND[1] ,External Interrupt 11 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 0. " EXT_INT11_PEND[0] ,External Interrupt 11 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x2C "EXT_INT12_PEND,External interrupt EXT_INT12 pending register"
|
|
bitfld.long 0x2C 3. " EXT_INT12_PEND[3] ,External Interrupt 12 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 2. " EXT_INT12_PEND[2] ,External Interrupt 12 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " EXT_INT12_PEND[1] ,External Interrupt 12 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 0. " EXT_INT12_PEND[0] ,External Interrupt 12 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x30 "EXT_INT13_PEND,External interrupt EXT_INT13 pending register"
|
|
bitfld.long 0x30 7. " EXT_INT13_PEND[7] ,External Interrupt 13 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x30 6. " EXT_INT13_PEND[6] ,External Interrupt 13 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 5. " EXT_INT13_PEND[5] ,External Interrupt 13 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x30 4. " EXT_INT13_PEND[4] ,External Interrupt 13 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXT_INT13_PEND[3] ,External Interrupt 13 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x30 2. " EXT_INT13_PEND[2] ,External Interrupt 13 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 1. " EXT_INT13_PEND[1] ,External Interrupt 13 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x30 0. " EXT_INT13_PEND[0] ,External Interrupt 13 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "EXT_INT30_PEND,External interrupt EXT_INT30 pending register"
|
|
bitfld.long 0x00 6. " EXT_INT30_PEND[6] ,External Interrupt 30 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " EXT_INT30_PEND[5] ,External Interrupt 30 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT30_PEND[4] ,External Interrupt 30 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT30_PEND[3] ,External Interrupt 30 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT30_PEND[2] ,External Interrupt 30 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT30_PEND[1] ,External Interrupt 30 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT30_PEND[0] ,External Interrupt 30 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 21.
|
|
tree "External interrupt priority control"
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "EXT_INT_GRPPRI_XA,External interrupt group priority control register"
|
|
bitfld.long 0x00 0. " EXT_INT_GRPPRI ,Enables EXT_INT groups priority rotate enable" "Fixed,Enabled"
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "EXT_INT_PRIORITY_XA,External interrupt priority control registe"
|
|
bitfld.long 0x00 13. " EXT_INT30_PRI ,Enables EXT_INT group 18 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 12. " EXT_INT13_PRI ,Enables EXT_INT group 13 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 11. " EXT_INT12_PRI ,Enables EXT_INT group 12 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EXT_INT11_PRI ,Enables EXT_INT group 11 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 9. " EXT_INT10_PRI ,Enables EXT_INT group 10 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 8. " EXT_INT9_PRI ,Enables EXT_INT group 9 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EXT_INT8_PRI ,Enables EXT_INT group 8 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 6. " EXT_INT7_PRI ,Enables EXT_INT group 7 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 5. " EXT_INT6_PRI ,Enables EXT_INT group 6 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT5_PRI ,Enables EXT_INT group 5 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 3. " EXT_INT4_PRI ,Enables EXT_INT group 4 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 2. " EXT_INT3_PRI ,Enables EXT_INT group 3 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT2_PRI ,Enables EXT_INT group 2 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 0. " EXT_INT1_PRI ,Enables EXT_INT group 1 priority rotate" "Fixed,Enabled"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XA,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XA,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++0x43
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XA,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--4. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,?..."
|
|
line.long 0x04 "EXT_INT1_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT1" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "EXT_INT2_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x08 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT2" "0,1,2,3,4,5,?..."
|
|
line.long 0x0C "EXT_INT3_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x0C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT3" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT4_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT4" "0,1,2,3,4,?..."
|
|
line.long 0x14 "EXT_INT5_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT5" "0,1,2,3,4,?..."
|
|
line.long 0x18 "EXT_INT6_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT6" "0,1,2,3,?..."
|
|
line.long 0x1C "EXT_INT7_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT7" "0,1,2,3,?..."
|
|
line.long 0x20 "EXT_INT8_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x20 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT8" "0,1,2,3,4,5,6,?..."
|
|
line.long 0x24 "EXT_INT9_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x24 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT9" "0,1,2,3,?..."
|
|
line.long 0x28 "EXT_INT10_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x28 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT10" "0,1,2,3,4,5,6,?..."
|
|
line.long 0x2C "EXT_INT11_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x2C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT11" "0,1,2,3,4,5,6,?..."
|
|
line.long 0x30 "EXT_INT12_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x30 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT12" "0,1,2,3,?..."
|
|
line.long 0x34 "EXT_INT13_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x34 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT13" "0,1,2,3,4,5,6,7"
|
|
group.long 0xB48++0x07
|
|
line.long 0x00 "EXT_INT30_FIXPRI,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT30" "0,1,2,3,4,5,6,?..."
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "GPX0"
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "GPX0CON,Port Group GPX0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPX0CON[7] ,GPX0 Pin 7 Configuration" "Input,Output,Reserved,DP0_HPD,Reserved,ALV_DBG[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[7]"
|
|
bitfld.long 0x00 24.--27. " GPX0CON[6] ,GPX0 Pin 6 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[6]"
|
|
bitfld.long 0x00 20.--23. " GPX0CON[5] ,GPX0 Pin 5 Configuration" "Input,Output,Reserved,AUD_RTCK,Reserved,ALV_DBG[1],MFC_RTCK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[5]"
|
|
bitfld.long 0x00 16.--19. " GPX0CON[4] ,GPX0 Pin 4 Configuration" "Input,Output,Reserved,AUD_TRSTn,Reserved,ALV_DBG[0],MFC_TRSTn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX0CON[3] ,GPX0 Pin 3 Configuration" "Input,Output,Reserved,AUD_TDO,Reserved,ALV_TDO,MFC_TDO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[3]"
|
|
bitfld.long 0x00 8.--11. " GPX0CON[2] ,GPX0 Pin 2 Configuration" "Input,Output,Reserved,AUD_TDI,Reserved,ALV_TDI,MFC_TDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[2]"
|
|
bitfld.long 0x00 4.--7. " GPX0CON[1] ,GPX0 Pin 1 Configuration" "Input,Output,Reserved,AUD_TMS,Reserved,ALV_TMS,MFC_TMS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[1]"
|
|
bitfld.long 0x00 0.--3. " GPX0CON[0] ,GPX0 Pin 0 Configuration" "Input,Output,Reserved,AUD_TCK,Reserved,ALV_TCK,MFC_TCK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT40[0]"
|
|
group.byte 0xC04++0x00
|
|
line.byte 0x00 "GPX0DAT,Port Group GPX0 Data Register"
|
|
bitfld.byte 0x00 7. " GPX0DAT[7] ,GPX0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX0DAT[6] ,GPX0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX0DAT[5] ,GPX0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX0DAT[4] ,GPX0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX0DAT[3] ,GPX0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX0DAT[2] ,GPX0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX0DAT[1] ,GPX0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX0DAT[0] ,GPX0 Pin 0 Data" "Low,High"
|
|
group.word 0xC08++0x01
|
|
line.word 0x00 "GPX0PUD,Port Group GPX0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX0PUD[7] ,GPX0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX0PUD[6] ,GPX0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX0PUD[5] ,GPX0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX0PUD[4] ,GPX0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX0PUD[3] ,GPX0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX0PUD[2] ,GPX0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX0PUD[1] ,GPX0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX0PUD[0] ,GPX0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC0C++0x02
|
|
line.tbyte 0x00 "GPX0DRV,Port Group GPX0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX0DRV[7] ,GPX0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX0DRV[6] ,GPX0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX0DRV[5] ,GPX0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX0DRV[4] ,GPX0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX0DRV[3] ,GPX0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX0DRV[2] ,GPX0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX0DRV[1] ,GPX0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX0DRV[0] ,GPX0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX1"
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GPX1CON,Port Group GPX1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPX1CON[7] ,GPX1 Pin 7 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[7]"
|
|
bitfld.long 0x00 24.--27. " GPX1CON[6] ,GPX1 Pin 6 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[6]"
|
|
bitfld.long 0x00 20.--23. " GPX1CON[5] ,GPX1 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[5]"
|
|
bitfld.long 0x00 16.--19. " GPX1CON[4] ,GPX1 Pin 4 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX1CON[3] ,GPX1 Pin 3 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[3]"
|
|
bitfld.long 0x00 8.--11. " GPX1CON[2] ,GPX1 Pin 2 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[2]"
|
|
bitfld.long 0x00 4.--7. " GPX1CON[1] ,GPX1 Pin 1 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[1]"
|
|
bitfld.long 0x00 0.--3. " GPX1CON[0] ,GPX1 Pin 0 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT41[0]"
|
|
group.byte 0xC24++0x00
|
|
line.byte 0x00 "GPX1DAT,Port Group GPX1 Data Register"
|
|
bitfld.byte 0x00 7. " GPX1DAT[7] ,GPX1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX1DAT[6] ,GPX1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX1DAT[5] ,GPX1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX1DAT[4] ,GPX1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX1DAT[3] ,GPX1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX1DAT[2] ,GPX1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX1DAT[1] ,GPX1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX1DAT[0] ,GPX1 Pin 0 Data" "Low,High"
|
|
group.word 0xC28++0x01
|
|
line.word 0x00 "GPX1PUD,Port Group GPX1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX1PUD[7] ,GPX1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX1PUD[6] ,GPX1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX1PUD[5] ,GPX1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX1PUD[4] ,GPX1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX1PUD[3] ,GPX1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX1PUD[2] ,GPX1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX1PUD[1] ,GPX1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX1PUD[0] ,GPX1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC2C++0x02
|
|
line.tbyte 0x00 "GPX1DRV,Port Group GPX1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX1DRV[7] ,GPX1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX1DRV[6] ,GPX1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX1DRV[5] ,GPX1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX1DRV[4] ,GPX1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX1DRV[3] ,GPX1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX1DRV[2] ,GPX1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX1DRV[1] ,GPX1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX1DRV[0] ,GPX1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX2"
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GPX2CON,Port Group GPX2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPX2CON[7] ,GPX2 Pin 7 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[19],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[7]"
|
|
bitfld.long 0x00 24.--27. " GPX2CON[6] ,GPX2 Pin 6 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[18],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[6]"
|
|
bitfld.long 0x00 20.--23. " GPX2CON[5] ,GPX2 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[5]"
|
|
bitfld.long 0x00 16.--19. " GPX2CON[4] ,GPX2 Pin 4 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX2CON[3] ,GPX2 Pin 3 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[3]"
|
|
bitfld.long 0x00 8.--11. " GPX2CON[2] ,GPX2 Pin 2 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[2]"
|
|
bitfld.long 0x00 4.--7. " GPX2CON[1] ,GPX2 Pin 1 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[1]"
|
|
bitfld.long 0x00 0.--3. " GPX2CON[0] ,GPX2 Pin 0 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT42[0]"
|
|
group.byte 0xC44++0x00
|
|
line.byte 0x00 "GPX2DAT,Port Group GPX2 Data Register"
|
|
bitfld.byte 0x00 7. " GPX2DAT[7] ,GPX2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX2DAT[6] ,GPX2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX2DAT[5] ,GPX2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX2DAT[4] ,GPX2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX2DAT[3] ,GPX2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX2DAT[2] ,GPX2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX2DAT[1] ,GPX2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX2DAT[0] ,GPX2 Pin 0 Data" "Low,High"
|
|
group.word 0xC48++0x01
|
|
line.word 0x00 "GPX2PUD,Port Group GPX2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX2PUD[7] ,GPX2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX2PUD[6] ,GPX2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX2PUD[5] ,GPX2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX2PUD[4] ,GPX2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX2PUD[3] ,GPX2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX2PUD[2] ,GPX2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX2PUD[1] ,GPX2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX2PUD[0] ,GPX2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC4C++0x02
|
|
line.tbyte 0x00 "GPX2DRV,Port Group GPX2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX2DRV[7] ,GPX2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX2DRV[6] ,GPX2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX2DRV[5] ,GPX2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX2DRV[4] ,GPX2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX2DRV[3] ,GPX2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX2DRV[2] ,GPX2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX2DRV[1] ,GPX2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX2DRV[0] ,GPX2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX3"
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GPX3CON,Port Group GPX3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPX3CON[7] ,GPX3 Pin 7 Configuration" "Input,Output,Reserved,HDMI_HPD,Reserved,ALV_DBG[27],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[7]"
|
|
bitfld.long 0x00 24.--27. " GPX3CON[6] ,GPX3 Pin 6 Configuration" "Input,Output,Reserved,HDMI_CEC,Reserved,ALV_DBG[26],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[6]"
|
|
bitfld.long 0x00 20.--23. " GPX3CON[5] ,GPX3 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[25],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[5]"
|
|
bitfld.long 0x00 16.--19. " GPX3CON[4] ,GPX3 Pin 4 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[24],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX3CON[3] ,GPX3 Pin 3 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[23],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[3]"
|
|
bitfld.long 0x00 8.--11. " GPX3CON[2] ,GPX3 Pin 2 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[22],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[2]"
|
|
bitfld.long 0x00 4.--7. " GPX3CON[1] ,GPX3 Pin 1 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[21],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[1]"
|
|
bitfld.long 0x00 0.--3. " GPX3CON[0] ,GPX3 Pin 0 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[20],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT43[0]"
|
|
group.byte 0xC64++0x00
|
|
line.byte 0x00 "GPX3DAT,Port Group GPX3 Data Register"
|
|
bitfld.byte 0x00 7. " GPX3DAT[7] ,GPX3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX3DAT[6] ,GPX3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX3DAT[5] ,GPX3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX3DAT[4] ,GPX3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX3DAT[3] ,GPX3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX3DAT[2] ,GPX3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX3DAT[1] ,GPX3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX3DAT[0] ,GPX3 Pin 0 Data" "Low,High"
|
|
group.word 0xC68++0x01
|
|
line.word 0x00 "GPX3PUD,Port Group GPX3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX3PUD[7] ,GPX3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX3PUD[6] ,GPX3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX3PUD[5] ,GPX3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX3PUD[4] ,GPX3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX3PUD[3] ,GPX3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX3PUD[2] ,GPX3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX3PUD[1] ,GPX3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX3PUD[0] ,GPX3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC6C++0x02
|
|
line.tbyte 0x00 "GPX3DRV,Port Group GPX3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX3DRV[7] ,GPX3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX3DRV[6] ,GPX3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX3DRV[5] ,GPX3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX3DRV[4] ,GPX3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX3DRV[3] ,GPX3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX3DRV[2] ,GPX3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX3DRV[1] ,GPX3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX3DRV[0] ,GPX3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 22.
|
|
tree "External interrupts"
|
|
tree "External interrupts configuration"
|
|
group.long 0xE00++0x0F
|
|
line.long 0x0 "EXT_INT40CON,External interrupt EXT_INT40 configuration register"
|
|
bitfld.long 0x0 28.--30. " EXT_INT40CON[7] ,Setting the signaling method of EXT_INT40[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 24.--26. " EXT_INT40CON[6] ,Setting the signaling method of EXT_INT40[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EXT_INT40CON[5] ,Setting the signaling method of EXT_INT40[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 16.--18. " EXT_INT40CON[4] ,Setting the signaling method of EXT_INT40[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--14. " EXT_INT40CON[3] ,Setting the signaling method of EXT_INT40[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 8.--10. " EXT_INT40CON[2] ,Setting the signaling method of EXT_INT40[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 4.--6. " EXT_INT40CON[1] ,Setting the signaling method of EXT_INT40[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 0.--2. " EXT_INT40CON[0] ,Setting the signaling method of EXT_INT40[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x4 "EXT_INT41CON,External interrupt EXT_INT41 configuration register"
|
|
bitfld.long 0x4 28.--30. " EXT_INT41CON[7] ,Setting the signaling method of EXT_INT41[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 24.--26. " EXT_INT41CON[6] ,Setting the signaling method of EXT_INT41[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 20.--22. " EXT_INT41CON[5] ,Setting the signaling method of EXT_INT41[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 16.--18. " EXT_INT41CON[4] ,Setting the signaling method of EXT_INT41[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 12.--14. " EXT_INT41CON[3] ,Setting the signaling method of EXT_INT41[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 8.--10. " EXT_INT41CON[2] ,Setting the signaling method of EXT_INT41[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 4.--6. " EXT_INT41CON[1] ,Setting the signaling method of EXT_INT41[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 0.--2. " EXT_INT41CON[0] ,Setting the signaling method of EXT_INT41[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x8 "EXT_INT42CON,External interrupt EXT_INT42 configuration register"
|
|
bitfld.long 0x8 28.--30. " EXT_INT42CON[7] ,Setting the signaling method of EXT_INT42[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 24.--26. " EXT_INT42CON[6] ,Setting the signaling method of EXT_INT42[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 20.--22. " EXT_INT42CON[5] ,Setting the signaling method of EXT_INT42[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 16.--18. " EXT_INT42CON[4] ,Setting the signaling method of EXT_INT42[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 12.--14. " EXT_INT42CON[3] ,Setting the signaling method of EXT_INT42[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 8.--10. " EXT_INT42CON[2] ,Setting the signaling method of EXT_INT42[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 4.--6. " EXT_INT42CON[1] ,Setting the signaling method of EXT_INT42[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 0.--2. " EXT_INT42CON[0] ,Setting the signaling method of EXT_INT42[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0xC "EXT_INT43CON,External interrupt EXT_INT43 configuration register"
|
|
bitfld.long 0xC 28.--30. " EXT_INT43CON[7] ,Setting the signaling method of EXT_INT43[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 24.--26. " EXT_INT43CON[6] ,Setting the signaling method of EXT_INT43[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 20.--22. " EXT_INT43CON[5] ,Setting the signaling method of EXT_INT43[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 16.--18. " EXT_INT43CON[4] ,Setting the signaling method of EXT_INT43[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 12.--14. " EXT_INT43CON[3] ,Setting the signaling method of EXT_INT43[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 8.--10. " EXT_INT43CON[2] ,Setting the signaling method of EXT_INT43[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 4.--6. " EXT_INT43CON[1] ,Setting the signaling method of EXT_INT43[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 0.--2. " EXT_INT43CON[0] ,Setting the signaling method of EXT_INT43[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 20.
|
|
tree "External interrupts filter configuration"
|
|
group.long 0xE80++0x1F
|
|
line.long 0x0 "EXT_INT40_FLTCON0,External interrupt EXT_INT40 filter configuration register 0"
|
|
bitfld.long 0x0 31. " FLTEN40[3] ,Filter Enable for EXT_INT40[3]" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " FLTSEL40[3] ,Filter Selection for EXT_INT40[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 24.--29. 1. " FLTWIDTH40[3] ,Filter Selection for EXT_INT40[3]"
|
|
textline " "
|
|
bitfld.long 0x0 23. " FLTEN40[2] ,Filter Enable for EXT_INT40[2]" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " FLTSEL40[2] ,Filter Selection for EXT_INT40[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 16.--21. 1. " FLTWIDTH40[2] ,Filter Selection for EXT_INT40[2]"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FLTEN40[1] ,Filter Enable for EXT_INT40[1]" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " FLTSEL40[1] ,Filter Selection for EXT_INT40[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 8.--13. 1. " FLTWIDTH40[1] ,Filter Selection for EXT_INT40[1]"
|
|
textline " "
|
|
bitfld.long 0x0 7. " FLTEN40[0] ,Filter Enable for EXT_INT40[0]" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " FLTSEL40[0] ,Filter Selection for EXT_INT40[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 0.--5. 1. " FLTWIDTH40[0] ,Filter Selection for EXT_INT40[0]"
|
|
line.long 0x0+0x04 "EXT_INT40_FLTCON1,External interrupt EXT_INT40 filter configuration register 0"
|
|
bitfld.long 0x0+0x04 31. " FLTEN40[7] ,Filter Enable for EXT_INT40[7]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 30. " FLTSEL40[7] ,Filter Selection for EXT_INT40[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 24.--29. 1. " FLTWIDTH40[7] ,Filter Selection for EXT_INT40[7]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 23. " FLTEN40[6] ,Filter Enable for EXT_INT40[6]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 22. " FLTSEL40[6] ,Filter Selection for EXT_INT40[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 16.--21. 1. " FLTWIDTH40[6] ,Filter Selection for EXT_INT40[6]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 15. " FLTEN40[5] ,Filter Enable for EXT_INT40[5]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 14. " FLTSEL40[5] ,Filter Selection for EXT_INT40[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 8.--13. 1. " FLTWIDTH40[5] ,Filter Selection for EXT_INT40[5]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 7. " FLTEN40[4] ,Filter Enable for EXT_INT40[4]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 6. " FLTSEL40[4] ,Filter Selection for EXT_INT40[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 0.--5. 1. " FLTWIDTH40[4] ,Filter Selection for EXT_INT40[4]"
|
|
line.long 0x8 "EXT_INT41_FLTCON0,External interrupt EXT_INT41 filter configuration register 0"
|
|
bitfld.long 0x8 31. " FLTEN41[3] ,Filter Enable for EXT_INT41[3]" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " FLTSEL41[3] ,Filter Selection for EXT_INT41[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 24.--29. 1. " FLTWIDTH41[3] ,Filter Selection for EXT_INT41[3]"
|
|
textline " "
|
|
bitfld.long 0x8 23. " FLTEN41[2] ,Filter Enable for EXT_INT41[2]" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " FLTSEL41[2] ,Filter Selection for EXT_INT41[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 16.--21. 1. " FLTWIDTH41[2] ,Filter Selection for EXT_INT41[2]"
|
|
textline " "
|
|
bitfld.long 0x8 15. " FLTEN41[1] ,Filter Enable for EXT_INT41[1]" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " FLTSEL41[1] ,Filter Selection for EXT_INT41[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 8.--13. 1. " FLTWIDTH41[1] ,Filter Selection for EXT_INT41[1]"
|
|
textline " "
|
|
bitfld.long 0x8 7. " FLTEN41[0] ,Filter Enable for EXT_INT41[0]" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " FLTSEL41[0] ,Filter Selection for EXT_INT41[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 0.--5. 1. " FLTWIDTH41[0] ,Filter Selection for EXT_INT41[0]"
|
|
line.long 0x8+0x04 "EXT_INT41_FLTCON1,External interrupt EXT_INT41 filter configuration register 0"
|
|
bitfld.long 0x8+0x04 31. " FLTEN41[7] ,Filter Enable for EXT_INT41[7]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 30. " FLTSEL41[7] ,Filter Selection for EXT_INT41[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 24.--29. 1. " FLTWIDTH41[7] ,Filter Selection for EXT_INT41[7]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 23. " FLTEN41[6] ,Filter Enable for EXT_INT41[6]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 22. " FLTSEL41[6] ,Filter Selection for EXT_INT41[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 16.--21. 1. " FLTWIDTH41[6] ,Filter Selection for EXT_INT41[6]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 15. " FLTEN41[5] ,Filter Enable for EXT_INT41[5]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 14. " FLTSEL41[5] ,Filter Selection for EXT_INT41[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 8.--13. 1. " FLTWIDTH41[5] ,Filter Selection for EXT_INT41[5]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 7. " FLTEN41[4] ,Filter Enable for EXT_INT41[4]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 6. " FLTSEL41[4] ,Filter Selection for EXT_INT41[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 0.--5. 1. " FLTWIDTH41[4] ,Filter Selection for EXT_INT41[4]"
|
|
line.long 0x10 "EXT_INT42_FLTCON0,External interrupt EXT_INT42 filter configuration register 0"
|
|
bitfld.long 0x10 31. " FLTEN42[3] ,Filter Enable for EXT_INT42[3]" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " FLTSEL42[3] ,Filter Selection for EXT_INT42[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 24.--29. 1. " FLTWIDTH42[3] ,Filter Selection for EXT_INT42[3]"
|
|
textline " "
|
|
bitfld.long 0x10 23. " FLTEN42[2] ,Filter Enable for EXT_INT42[2]" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " FLTSEL42[2] ,Filter Selection for EXT_INT42[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 16.--21. 1. " FLTWIDTH42[2] ,Filter Selection for EXT_INT42[2]"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FLTEN42[1] ,Filter Enable for EXT_INT42[1]" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " FLTSEL42[1] ,Filter Selection for EXT_INT42[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 8.--13. 1. " FLTWIDTH42[1] ,Filter Selection for EXT_INT42[1]"
|
|
textline " "
|
|
bitfld.long 0x10 7. " FLTEN42[0] ,Filter Enable for EXT_INT42[0]" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " FLTSEL42[0] ,Filter Selection for EXT_INT42[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 0.--5. 1. " FLTWIDTH42[0] ,Filter Selection for EXT_INT42[0]"
|
|
line.long 0x10+0x04 "EXT_INT42_FLTCON1,External interrupt EXT_INT42 filter configuration register 0"
|
|
bitfld.long 0x10+0x04 31. " FLTEN42[7] ,Filter Enable for EXT_INT42[7]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 30. " FLTSEL42[7] ,Filter Selection for EXT_INT42[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 24.--29. 1. " FLTWIDTH42[7] ,Filter Selection for EXT_INT42[7]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 23. " FLTEN42[6] ,Filter Enable for EXT_INT42[6]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 22. " FLTSEL42[6] ,Filter Selection for EXT_INT42[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 16.--21. 1. " FLTWIDTH42[6] ,Filter Selection for EXT_INT42[6]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 15. " FLTEN42[5] ,Filter Enable for EXT_INT42[5]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 14. " FLTSEL42[5] ,Filter Selection for EXT_INT42[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 8.--13. 1. " FLTWIDTH42[5] ,Filter Selection for EXT_INT42[5]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 7. " FLTEN42[4] ,Filter Enable for EXT_INT42[4]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 6. " FLTSEL42[4] ,Filter Selection for EXT_INT42[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 0.--5. 1. " FLTWIDTH42[4] ,Filter Selection for EXT_INT42[4]"
|
|
line.long 0x18 "EXT_INT43_FLTCON0,External interrupt EXT_INT43 filter configuration register 0"
|
|
bitfld.long 0x18 31. " FLTEN43[3] ,Filter Enable for EXT_INT43[3]" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " FLTSEL43[3] ,Filter Selection for EXT_INT43[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 24.--29. 1. " FLTWIDTH43[3] ,Filter Selection for EXT_INT43[3]"
|
|
textline " "
|
|
bitfld.long 0x18 23. " FLTEN43[2] ,Filter Enable for EXT_INT43[2]" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " FLTSEL43[2] ,Filter Selection for EXT_INT43[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 16.--21. 1. " FLTWIDTH43[2] ,Filter Selection for EXT_INT43[2]"
|
|
textline " "
|
|
bitfld.long 0x18 15. " FLTEN43[1] ,Filter Enable for EXT_INT43[1]" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " FLTSEL43[1] ,Filter Selection for EXT_INT43[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 8.--13. 1. " FLTWIDTH43[1] ,Filter Selection for EXT_INT43[1]"
|
|
textline " "
|
|
bitfld.long 0x18 7. " FLTEN43[0] ,Filter Enable for EXT_INT43[0]" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " FLTSEL43[0] ,Filter Selection for EXT_INT43[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 0.--5. 1. " FLTWIDTH43[0] ,Filter Selection for EXT_INT43[0]"
|
|
line.long 0x18+0x04 "EXT_INT43_FLTCON1,External interrupt EXT_INT43 filter configuration register 0"
|
|
bitfld.long 0x18+0x04 31. " FLTEN43[7] ,Filter Enable for EXT_INT43[7]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 30. " FLTSEL43[7] ,Filter Selection for EXT_INT43[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 24.--29. 1. " FLTWIDTH43[7] ,Filter Selection for EXT_INT43[7]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 23. " FLTEN43[6] ,Filter Enable for EXT_INT43[6]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 22. " FLTSEL43[6] ,Filter Selection for EXT_INT43[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 16.--21. 1. " FLTWIDTH43[6] ,Filter Selection for EXT_INT43[6]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 15. " FLTEN43[5] ,Filter Enable for EXT_INT43[5]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 14. " FLTSEL43[5] ,Filter Selection for EXT_INT43[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 8.--13. 1. " FLTWIDTH43[5] ,Filter Selection for EXT_INT43[5]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 7. " FLTEN43[4] ,Filter Enable for EXT_INT43[4]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 6. " FLTSEL43[4] ,Filter Selection for EXT_INT43[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 0.--5. 1. " FLTWIDTH43[4] ,Filter Selection for EXT_INT43[4]"
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupts mask"
|
|
group.long 0xF00++0x0F
|
|
line.long 0x0 "EXT_INT40_MASK,External interrupt EXT_INT40 mask register"
|
|
bitfld.long 0x0 7. " EXT_INT40_MASK[7] ,EXT interrupt 40 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 6. " EXT_INT40_MASK[6] ,EXT interrupt 40 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT40_MASK[5] ,EXT interrupt 40 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 4. " EXT_INT40_MASK[4] ,EXT interrupt 40 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT40_MASK[3] ,EXT interrupt 40 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 2. " EXT_INT40_MASK[2] ,EXT interrupt 40 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT40_MASK[1] ,EXT interrupt 40 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 0. " EXT_INT40_MASK[0] ,EXT interrupt 40 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x4 "EXT_INT41_MASK,External interrupt EXT_INT41 mask register"
|
|
bitfld.long 0x4 7. " EXT_INT41_MASK[7] ,EXT interrupt 41 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 6. " EXT_INT41_MASK[6] ,EXT interrupt 41 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT41_MASK[5] ,EXT interrupt 41 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 4. " EXT_INT41_MASK[4] ,EXT interrupt 41 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT41_MASK[3] ,EXT interrupt 41 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 2. " EXT_INT41_MASK[2] ,EXT interrupt 41 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT41_MASK[1] ,EXT interrupt 41 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 0. " EXT_INT41_MASK[0] ,EXT interrupt 41 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x8 "EXT_INT42_MASK,External interrupt EXT_INT42 mask register"
|
|
bitfld.long 0x8 7. " EXT_INT42_MASK[7] ,EXT interrupt 42 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 6. " EXT_INT42_MASK[6] ,EXT interrupt 42 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT42_MASK[5] ,EXT interrupt 42 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 4. " EXT_INT42_MASK[4] ,EXT interrupt 42 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT42_MASK[3] ,EXT interrupt 42 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 2. " EXT_INT42_MASK[2] ,EXT interrupt 42 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT42_MASK[1] ,EXT interrupt 42 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 0. " EXT_INT42_MASK[0] ,EXT interrupt 42 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0xC "EXT_INT43_MASK,External interrupt EXT_INT43 mask register"
|
|
bitfld.long 0xC 7. " EXT_INT43_MASK[7] ,EXT interrupt 43 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 6. " EXT_INT43_MASK[6] ,EXT interrupt 43 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT43_MASK[5] ,EXT interrupt 43 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 4. " EXT_INT43_MASK[4] ,EXT interrupt 43 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT43_MASK[3] ,EXT interrupt 43 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 2. " EXT_INT43_MASK[2] ,EXT interrupt 43 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT43_MASK[1] ,EXT interrupt 43 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 0. " EXT_INT43_MASK[0] ,EXT interrupt 43 mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupts pending"
|
|
group.long 0xF40++0x0F
|
|
line.long 0x0 "EXT_INT40_PEND,External interrupt EXT_INT40 pending register"
|
|
bitfld.long 0x0 7. " EXT_INT40_PEND[7] ,EXT interrupt 40 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 6. " EXT_INT40_PEND[6] ,EXT interrupt 40 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT40_PEND[5] ,EXT interrupt 40 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 4. " EXT_INT40_PEND[4] ,EXT interrupt 40 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT40_PEND[3] ,EXT interrupt 40 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 2. " EXT_INT40_PEND[2] ,EXT interrupt 40 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT40_PEND[1] ,EXT interrupt 40 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 0. " EXT_INT40_PEND[0] ,EXT interrupt 40 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x4 "EXT_INT41_PEND,External interrupt EXT_INT41 pending register"
|
|
bitfld.long 0x4 7. " EXT_INT41_PEND[7] ,EXT interrupt 41 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 6. " EXT_INT41_PEND[6] ,EXT interrupt 41 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT41_PEND[5] ,EXT interrupt 41 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 4. " EXT_INT41_PEND[4] ,EXT interrupt 41 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT41_PEND[3] ,EXT interrupt 41 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 2. " EXT_INT41_PEND[2] ,EXT interrupt 41 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT41_PEND[1] ,EXT interrupt 41 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 0. " EXT_INT41_PEND[0] ,EXT interrupt 41 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x8 "EXT_INT42_PEND,External interrupt EXT_INT42 pending register"
|
|
bitfld.long 0x8 7. " EXT_INT42_PEND[7] ,EXT interrupt 42 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 6. " EXT_INT42_PEND[6] ,EXT interrupt 42 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT42_PEND[5] ,EXT interrupt 42 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 4. " EXT_INT42_PEND[4] ,EXT interrupt 42 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT42_PEND[3] ,EXT interrupt 42 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 2. " EXT_INT42_PEND[2] ,EXT interrupt 42 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT42_PEND[1] ,EXT interrupt 42 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 0. " EXT_INT42_PEND[0] ,EXT interrupt 42 pending 0" "Not Occurred,Occurred"
|
|
line.long 0xC "EXT_INT43_PEND,External interrupt EXT_INT43 pending register"
|
|
bitfld.long 0xC 7. " EXT_INT43_PEND[7] ,EXT interrupt 43 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 6. " EXT_INT43_PEND[6] ,EXT interrupt 43 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT43_PEND[5] ,EXT interrupt 43 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 4. " EXT_INT43_PEND[4] ,EXT interrupt 43 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT43_PEND[3] ,EXT interrupt 43 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 2. " EXT_INT43_PEND[2] ,EXT interrupt 43 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT43_PEND[1] ,EXT interrupt 43 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 0. " EXT_INT43_PEND[0] ,EXT interrupt 43 pending 0" "Not Occurred,Occurred"
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x13400000
|
|
width 15.
|
|
tree "GPE0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPE0CON,Port Group GPE0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPE0CON[7] ,GPE0 Pin 7 Configuration" "Input,Output,CAM_GPIO[7],TXD_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[7]"
|
|
bitfld.long 0x00 24.--27. " GPE0CON[6] ,GPE0 Pin 6 Configuration" "Input,Output,CAM_GPIO[6],nRTS_UART_ISP,CAM_I2C2_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[6]"
|
|
bitfld.long 0x00 20.--23. " GPE0CON[5] ,GPE0 Pin 5 Configuration" "Input,Output,CAM_GPIO[5],MPWM6_OUT_ISP,CAM_SPI1_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[5]"
|
|
bitfld.long 0x00 16.--19. " GPE0CON[4] ,GPE0 Pin 4 Configuration" "Input,Output,CAM_GPIO[4],MPWM5_OUT_ISP,CAM_SPI1_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPE0CON[3] ,GPE0 Pin 3 Configuration" "Input,Output,CAM_GPIO[3],MPWM4_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[3]"
|
|
bitfld.long 0x00 8.--11. " GPE0CON[2] ,GPE0 Pin 2 Configuration" "Input,Output,CAM_GPIO[2],MPWM3_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[2]"
|
|
bitfld.long 0x00 4.--7. " GPE0CON[1] ,GPE0 Pin 1 Configuration" "Input,Output,CAM_GPIO[1],MPWM2_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[1]"
|
|
bitfld.long 0x00 0.--3. " GPE0CON[0] ,GPE0 Pin 0 Configuration" "Input,Output,CAM_GPIO[0],MPWM1_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPE0DAT,Port Group GPE0 Data Register"
|
|
bitfld.byte 0x00 7. " GPE0DAT[7] ,GPE0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPE0DAT[6] ,GPE0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPE0DAT[5] ,GPE0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPE0DAT[4] ,GPE0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPE0DAT[3] ,GPE0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPE0DAT[2] ,GPE0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPE0DAT[1] ,GPE0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE0DAT[0] ,GPE0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPE0PUD,Port Group GPE0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE0PUD[7] ,GPE0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE0PUD[6] ,GPE0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE0PUD[5] ,GPE0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE0PUD[4] ,GPE0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE0PUD[3] ,GPE0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE0PUD[2] ,GPE0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE0PUD[1] ,GPE0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE0PUD[0] ,GPE0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPE0DRV,Port Group GPE0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPE0DRV[7] ,GPE0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPE0DRV[6] ,GPE0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPE0DRV[5] ,GPE0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPE0DRV[4] ,GPE0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPE0DRV[3] ,GPE0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPE0DRV[2] ,GPE0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPE0DRV[1] ,GPE0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE0DRV[0] ,GPE0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPE0CONPDN,Port Group GPE0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPE0[7] ,GPE0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPE0[6] ,GPE0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPE0[5] ,GPE0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPE0[4] ,GPE0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE0[3] ,GPE0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPE0[2] ,GPE0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPE0[1] ,GPE0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE0[0] ,GPE0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPE0PUDPDN,Port Group GPE0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE0[7] ,GPE0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE0[6] ,GPE0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE0[5] ,GPE0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE0[4] ,GPE0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE0[3] ,GPE0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE0[2] ,GPE0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE0[1] ,GPE0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE0[0] ,GPE0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPE1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPE1CON,Port Group GPE1 Configuration Register"
|
|
bitfld.long 0x00 4.--7. " GPE1CON[1] ,GPE1 Pin 1 Configuration" "Input,Output,CAM_GPIO[9],RXD_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[1]"
|
|
bitfld.long 0x00 0.--3. " GPE1CON[0] ,GPE1 Pin 0 Configuration" "Input,Output,CAM_GPIO[8],nCTS_UART_ISP,CAM_I2C2_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPE1DAT,Port Group GPE1 Data Register"
|
|
bitfld.byte 0x00 1. " GPE1DAT[1] ,GPE1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE1DAT[0] ,GPE1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPE1PUD,Port Group GPE1 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPE1PUD[1] ,GPE1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE1PUD[0] ,GPE1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPE1DRV,Port Group GPE1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " GPE1DRV[1] ,GPE1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE1DRV[0] ,GPE1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPE1CONPDN,Port Group GPE1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 2.--3. " GPE1[1] ,GPE1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE1[0] ,GPE1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPE1PUDPDN,Port Group GPE1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPE1[1] ,GPE1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE1[0] ,GPE1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPF0"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "GPF0CON,Port Group GPF0 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPF0CON[3] ,GPF0 Pin 3 Configuration" "Input,Output,CAM_I2C1_SCL,CAM_GPIO[13],CAM_SPI1_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[3]"
|
|
bitfld.long 0x00 8.--11. " GPF0CON[2] ,GPF0 Pin 2 Configuration" "Input,Output,CAM_I2C1_SDA,CAM_GPIO[12],CAM_SPI1_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[2]"
|
|
bitfld.long 0x00 4.--7. " GPF0CON[1] ,GPF0 Pin 1 Configuration" "Input,Output,CAM_I2C0_SCL,CAM_GPIO[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[1]"
|
|
bitfld.long 0x00 0.--3. " GPF0CON[0] ,GPF0 Pin 0 Configuration" "Input,Output,CAM_I2C0_SDA,CAM_GPIO[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[0]"
|
|
group.byte 0x044++0x00
|
|
line.byte 0x00 "GPF0DAT,Port Group GPF0 Data Register"
|
|
bitfld.byte 0x00 3. " GPF0DAT[3] ,GPF0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPF0DAT[2] ,GPF0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF0DAT[1] ,GPF0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF0DAT[0] ,GPF0 Pin 0 Data" "Low,High"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "GPF0PUD,Port Group GPF0 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPF0PUD[3] ,GPF0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF0PUD[2] ,GPF0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF0PUD[1] ,GPF0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF0PUD[0] ,GPF0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "GPF0DRV,Port Group GPF0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPF0DRV[3] ,GPF0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPF0DRV[2] ,GPF0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF0DRV[1] ,GPF0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF0DRV[0] ,GPF0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x050++0x01
|
|
line.word 0x00 "GPF0CONPDN,Port Group GPF0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPF0[3] ,GPF0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPF0[2] ,GPF0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF0[1] ,GPF0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF0[0] ,GPF0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x054++0x01
|
|
line.word 0x00 "GPF0PUDPDN,Port Group GPF0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPF0[3] ,GPF0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF0[2] ,GPF0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF0[1] ,GPF0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF0[0] ,GPF0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPF1"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPF1CON,Port Group GPF1 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPF1CON[3] ,GPF1 Pin 3 Configuration" "Input,Output,CAM_SPI_MOSI,CAM_GPIO[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT17[3]"
|
|
bitfld.long 0x00 8.--11. " GPF1CON[2] ,GPF1 Pin 2 Configuration" "Input,Output,CAM_SPI_MISO,CAM_GPIO[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT17[2]"
|
|
bitfld.long 0x00 4.--7. " GPF1CON[1] ,GPF1 Pin 1 Configuration" "Input,Output,CAM_SPI_nSS,CAM_GPIO[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT17[1]"
|
|
bitfld.long 0x00 0.--3. " GPF1CON[0] ,GPF1 Pin 0 Configuration" "Input,Output,SD_1_CLK,CAM_SPI_CLK,CAM_GPIO[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT17[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPF1DAT,Port Group GPF1 Data Register"
|
|
bitfld.byte 0x00 3. " GPF1DAT[3] ,GPF1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPF1DAT[2] ,GPF1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF1DAT[1] ,GPF1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF1DAT[0] ,GPF1 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPF1PUD,Port Group GPF1 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPF1PUD[3] ,GPF1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF1PUD[2] ,GPF1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF1PUD[1] ,GPF1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF1PUD[0] ,GPF1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPF1DRV,Port Group GPF1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPF1DRV[3] ,GPF1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPF1DRV[2] ,GPF1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF1DRV[1] ,GPF1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF1DRV[0] ,GPF1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPF1NPDN,Port Group GPF1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPF1[3] ,GPF1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPF1[2] ,GPF1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF1[1] ,GPF1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF1[0] ,GPF1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPF1PUDPDN,Port Group GPF1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPF1[3] ,GPF1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF1[2] ,GPF1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF1[1] ,GPF1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF1[0] ,GPF1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPG0"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPG0CON,Port Group GPG0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPG0CON[7] ,GPG0 Pin 7 Configuration" "Input,Output,CAM_BAY_RGB[6],TraceData[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[7]"
|
|
bitfld.long 0x00 24.--27. " GPG0CON[6] ,GPG0 Pin 6 Configuration" "Input,Output,CAM_BAY_RGB[5],TraceData[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[6]"
|
|
bitfld.long 0x00 20.--23. " GPG0CON[5] ,GPG0 Pin 5 Configuration" "Input,Output,CAM_BAY_RGB[4],TraceData[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[5]"
|
|
bitfld.long 0x00 16.--19. " GPG0CON[4] ,GPG0 Pin 4 Configuration" "Input,Output,CAM_BAY_RGB[3],TraceData[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPG0CON[3] ,GPG0 Pin 3 Configuration" "Input,Output,CAM_BAY_RGB[2],TraceData[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[3]"
|
|
bitfld.long 0x00 8.--11. " GPG0CON[2] ,GPG0 Pin 2 Configuration" "Input,Output,CAM_BAY_RGB[1],TraceData[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[2]"
|
|
bitfld.long 0x00 4.--7. " GPG0CON[1] ,GPG0 Pin 1 Configuration" "Input,Output,CAM_BAY_RGB[0],TraceData[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[1]"
|
|
bitfld.long 0x00 0.--3. " GPG0CON[0] ,GPG0 Pin 0 Configuration" "Input,Output,CAM_BAY_PCLK,TraceData[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT18[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPG0DAT,Port Group GPG0 Data Register"
|
|
bitfld.byte 0x00 7. " GPG0DAT[7] ,GPG0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPG0DAT[6] ,GPG0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPG0DAT[5] ,GPG0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPG0DAT[4] ,GPG0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPG0DAT[3] ,GPG0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPG0DAT[2] ,GPG0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPG0DAT[1] ,GPG0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPG0DAT[0] ,GPG0 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPG0PUD,Port Group GPG0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPG0PUD[7] ,GPG0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPG0PUD[6] ,GPG0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPG0PUD[5] ,GPG0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPG0PUD[4] ,GPG0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG0PUD[3] ,GPG0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPG0PUD[2] ,GPG0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPG0PUD[1] ,GPG0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG0PUD[0] ,GPG0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPG0DRV,Port Group GPG0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPG0DRV[7] ,GPG0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPG0DRV[6] ,GPG0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPG0DRV[5] ,GPG0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPG0DRV[4] ,GPG0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPG0DRV[3] ,GPG0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPG0DRV[2] ,GPG0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPG0DRV[1] ,GPG0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPG0DRV[0] ,GPG0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPG0CONPDN,Port Group GPG0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPG0[7] ,GPG0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPG0[6] ,GPG0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPG0[5] ,GPG0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPG0[4] ,GPG0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG0[3] ,GPG0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPG0[2] ,GPG0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPG0[1] ,GPG0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPG0[0] ,GPG0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPG0PUDPDN,Port Group GPG0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPG0[7] ,GPG0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPG0[6] ,GPG0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPG0[5] ,GPG0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPG0[4] ,GPG0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG0[3] ,GPG0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPG0[2] ,GPG0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPG0[1] ,GPG0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG0[0] ,GPG0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPG1"
|
|
group.long 0x0A0++0x03
|
|
line.long 0x00 "GPG1CON,Port Group GPG1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPG1CON[7] ,GPG1 Pin 7 Configuration" "Input,Output,CAM_BAY_Vsync,TraceData[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[6]"
|
|
bitfld.long 0x00 24.--27. " GPG1CON[6] ,GPG1 Pin 6 Configuration" "Input,Output,CAM_BAY_RGB[13],TraceData[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[6]"
|
|
bitfld.long 0x00 20.--23. " GPG1CON[5] ,GPG1 Pin 5 Configuration" "Input,Output,CAM_BAY_RGB[12],TraceData[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[5]"
|
|
bitfld.long 0x00 16.--19. " GPG1CON[4] ,GPG1 Pin 4 Configuration" "Input,Output,CAM_BAY_RGB[11],TraceData[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPG1CON[3] ,GPG1 Pin 3 Configuration" "Input,Output,CAM_BAY_RGB[10],TraceData[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[3]"
|
|
bitfld.long 0x00 8.--11. " GPG1CON[2] ,GPG1 Pin 2 Configuration" "Input,Output,CAM_BAY_RGB[9],TraceData[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[2]"
|
|
bitfld.long 0x00 4.--7. " GPG1CON[1] ,GPG1 Pin 1 Configuration" "Input,Output,CAM_BAY_RGB[8],TraceData[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[1]"
|
|
bitfld.long 0x00 0.--3. " GPG1CON[0] ,GPG1 Pin 0 Configuration" "Input,Output,CAM_BAY_RGB[7],TraceData[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT19[0]"
|
|
group.byte 0x0A4++0x00
|
|
line.byte 0x00 "GPG1DAT,Port Group GPG1 Data Register"
|
|
bitfld.byte 0x00 7. " GPG1DAT[7] ,GPG1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPG1DAT[6] ,GPG1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPG1DAT[5] ,GPG1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPG1DAT[4] ,GPG1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPG1DAT[3] ,GPG1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPG1DAT[2] ,GPG1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPG1DAT[1] ,GPG1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPG1DAT[0] ,GPG1 Pin 0 Data" "Low,High"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "GPG1PUD,Port Group GPG1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPG1PUD[7] ,GPG1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPG1PUD[6] ,GPG1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPG1PUD[5] ,GPG1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPG1PUD[4] ,GPG1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG1PUD[3] ,GPG1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPG1PUD[2] ,GPG1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPG1PUD[1] ,GPG1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG1PUD[0] ,GPG1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "GPG1DRV,Port Group GPG1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPG1DRV[7] ,GPG1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPG1DRV[6] ,GPG1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPG1DRV[5] ,GPG1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPG1DRV[4] ,GPG1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPG1DRV[3] ,GPG1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPG1DRV[2] ,GPG1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPG1DRV[1] ,GPG1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPG1DRV[0] ,GPG1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0B0++0x01
|
|
line.word 0x00 "GPG1CONPDN,Port Group GPK@ Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPG1[7] ,GPG1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPG1[6] ,GPG1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPG1[5] ,GPG1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPG1[4] ,GPG1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG1[3] ,GPG1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPG1[2] ,GPG1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPG1[1] ,GPG1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPG1[0] ,GPG1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0B4++0x01
|
|
line.word 0x00 "GPG1PUDPDN,Port Group GPG1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPG1[7] ,GPG1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPG1[6] ,GPG1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPG1[5] ,GPG1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPG1[4] ,GPG1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPG1[3] ,GPG1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPG1[2] ,GPG1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPG1[1] ,GPG1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG1[0] ,GPG1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPG2"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPG2CON,Port Group GPG2 Configuration Register"
|
|
bitfld.long 0x00 4.--7. " GPG2CON[1] ,GPG2 Pin 1 Configuration" "Input,Output,CAM_BAY_Hsync,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT20[1]"
|
|
bitfld.long 0x00 0.--3. " GPG2CON[0] ,GPG2 Pin 0 Configuration" "Input,Output,CAM_BAY_MCLK,CAM1_GATED,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT20[0]"
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPG2DAT,Port Group GPG2 Data Register"
|
|
bitfld.byte 0x00 1. " GPG2DAT[1] ,GPG2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPG2DAT[0] ,GPG2 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPG2PUD,Port Group GPG2 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPG2PUD[1] ,GPG2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG2PUD[0] ,GPG2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPG2DRV,Port Group GPG2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " GPG2DRV[1] ,GPG2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPG2DRV[0] ,GPG2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPG2CONPDN,Port Group GPG2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 2.--3. " GPG2[1] ,GPG2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPG2[0] ,GPG2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPG2PUDPDN,Port Group GPG2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPG2[1] ,GPG2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPG2[0] ,GPG2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPH0"
|
|
group.long 0x0E0++0x03
|
|
line.long 0x00 "GPH0CON,Port Group GPH0 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPH0CON[3] ,GPH0 Pin 3 Configuration" "Input,Output,CAM_A_CLKOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[3]"
|
|
bitfld.long 0x00 8.--11. " GPH0CON[2] ,GPH0 Pin 2 Configuration" "Input,Output,CAM_A_HREF,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[2]"
|
|
bitfld.long 0x00 4.--7. " GPH0CON[1] ,GPH0 Pin 1 Configuration" "Input,Output,CAM_A_VSYNC,TraceCtl,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[1]"
|
|
bitfld.long 0x00 0.--3. " GPH0CON[0] ,GPH0 Pin 0 Configuration" "Input,Output,CAM_A_PCLK,TraceClk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[0]"
|
|
group.byte 0x0E4++0x00
|
|
line.byte 0x00 "GPH0DAT,Port Group GPH0 Data Register"
|
|
bitfld.byte 0x00 3. " GPH0DAT[3] ,GPH0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPH0DAT[2] ,GPH0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPH0DAT[1] ,GPH0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPH0DAT[0] ,GPH0 Pin 0 Data" "Low,High"
|
|
group.word 0x0E8++0x01
|
|
line.word 0x00 "GPH0PUD,Port Group GPH0 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPH0PUD[3] ,GPH0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPH0PUD[2] ,GPH0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPH0PUD[1] ,GPH0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPH0PUD[0] ,GPH0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0EC++0x02
|
|
line.tbyte 0x00 "GPH0DRV,Port Group GPH0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPH0DRV[3] ,GPH0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPH0DRV[2] ,GPH0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPH0DRV[1] ,GPH0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPH0DRV[0] ,GPH0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0F0++0x01
|
|
line.word 0x00 "GPH0CONPDN,Port Group GPH0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPH0[3] ,GPH0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPH0[2] ,GPH0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPH0[1] ,GPH0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPH0[0] ,GPH0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0F4++0x01
|
|
line.word 0x00 "GPH0PUDPDN,Port Group GPH0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPH0[3] ,GPH0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPH0[2] ,GPH0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPH0[1] ,GPH0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPH0[0] ,GPH0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPH1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GPH1CON,Port Group GPH1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPH1CON[7] ,GPH1 Pin 7 Configuration" "Input,Output,CAM_A_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[7]"
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|
bitfld.long 0x00 24.--27. " GPH1CON[6] ,GPH1 Pin 6 Configuration" "Input,Output,CAM_A_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[6]"
|
|
bitfld.long 0x00 20.--23. " GPH1CON[5] ,GPH1 Pin 5 Configuration" "Input,Output,CAM_A_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[5]"
|
|
bitfld.long 0x00 16.--19. " GPH1CON[4] ,GPH1 Pin 4 Configuration" "Input,Output,CAM_A_DATA[4],LCD_FRM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[4]"
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|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPH1CON[3] ,GPH1 Pin 3 Configuration" "Input,Output,CAM_A_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[3]"
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|
bitfld.long 0x00 8.--11. " GPH1CON[2] ,GPH1 Pin 2 Configuration" "Input,Output,CAM_A_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[2]"
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|
bitfld.long 0x00 4.--7. " GPH1CON[1] ,GPH1 Pin 1 Configuration" "Input,Output,CAM_A_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[1]"
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|
bitfld.long 0x00 0.--3. " GPH1CON[0] ,GPH1 Pin 0 Configuration" "Input,Output,CAM_A_DATA[0],TES,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[0]"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "GPH1DAT,Port Group GPH1 Data Register"
|
|
bitfld.byte 0x00 7. " GPH1DAT[7] ,GPH1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPH1DAT[6] ,GPH1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPH1DAT[5] ,GPH1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPH1DAT[4] ,GPH1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPH1DAT[3] ,GPH1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPH1DAT[2] ,GPH1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPH1DAT[1] ,GPH1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPH1DAT[0] ,GPH1 Pin 0 Data" "Low,High"
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "GPH1PUD,Port Group GPH1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPH1PUD[7] ,GPH1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPH1PUD[6] ,GPH1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPH1PUD[5] ,GPH1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPH1PUD[4] ,GPH1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPH1PUD[3] ,GPH1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPH1PUD[2] ,GPH1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPH1PUD[1] ,GPH1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPH1PUD[0] ,GPH1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x10C++0x02
|
|
line.tbyte 0x00 "GPH1DRV,Port Group GPH1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPH1DRV[7] ,GPH1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPH1DRV[6] ,GPH1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPH1DRV[5] ,GPH1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPH1DRV[4] ,GPH1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPH1DRV[3] ,GPH1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPH1DRV[2] ,GPH1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPH1DRV[1] ,GPH1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPH1DRV[0] ,GPH1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "GPH1CONPDN,Port Group GPH1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPH1[7] ,GPH1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPH1[6] ,GPH1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPH1[5] ,GPH1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPH1[4] ,GPH1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPH1[3] ,GPH1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPH1[2] ,GPH1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPH1[1] ,GPH1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPH1[0] ,GPH1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "GPH1PUDPDN,Port Group GPH1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPH1[7] ,GPH1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPH1[6] ,GPH1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPH1[5] ,GPH1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPH1[4] ,GPH1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPH1[3] ,GPH1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPH1[2] ,GPH1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPH1[1] ,GPH1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPH1[0] ,GPH1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "External interrupts"
|
|
width 19.
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++0x23
|
|
line.long 0x00 "EXT_INT14_CON,External interrupt EXT_INT14 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT14_CON[7] ,Setting the signaling method of EXT_INT14[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT14_CON[6] ,Setting the signaling method of EXT_INT14[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT14_CON[5] ,Setting the signaling method of EXT_INT14[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT14_CON[4] ,Setting the signaling method of EXT_INT14[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT14_CON[3] ,Setting the signaling method of EXT_INT14[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT14_CON[2] ,Setting the signaling method of EXT_INT14[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT14_CON[1] ,Setting the signaling method of EXT_INT14[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT14_CON[0] ,Setting the signaling method of EXT_INT14[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x04 "EXT_INT15_CON,External interrupt EXT_INT15 configuration register"
|
|
bitfld.long 0x04 4.--6. " EXT_INT15_CON[1] ,Setting the signaling method of EXT_INT15[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 0.--2. " EXT_INT15_CON[0] ,Setting the signaling method of EXT_INT15[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x08 "EXT_INT16_CON,External interrupt EXT_INT16 configuration register"
|
|
bitfld.long 0x08 12.--14. " EXT_INT16_CON[3] ,Setting the signaling method of EXT_INT16[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 8.--10. " EXT_INT16_CON[2] ,Setting the signaling method of EXT_INT16[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 4.--6. " EXT_INT16_CON[1] ,Setting the signaling method of EXT_INT16[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " EXT_INT16_CON[0] ,Setting the signaling method of EXT_INT16[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x0C "EXT_INT17_CON,External interrupt EXT_INT17 configuration register"
|
|
bitfld.long 0x0C 12.--14. " EXT_INT17_CON[3] ,Setting the signaling method of EXT_INT17[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 8.--10. " EXT_INT17_CON[2] ,Setting the signaling method of EXT_INT17[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 4.--6. " EXT_INT17_CON[1] ,Setting the signaling method of EXT_INT17[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--2. " EXT_INT17_CON[0] ,Setting the signaling method of EXT_INT17[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x10 "EXT_INT18_CON,External interrupt EXT_INT18 configuration register"
|
|
bitfld.long 0x10 28.--30. " EXT_INT18_CON[7] ,Setting the signaling method of EXT_INT18[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 24.--26. " EXT_INT18_CON[6] ,Setting the signaling method of EXT_INT18[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 20.--22. " EXT_INT18_CON[5] ,Setting the signaling method of EXT_INT18[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x10 16.--18. " EXT_INT18_CON[4] ,Setting the signaling method of EXT_INT18[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 12.--14. " EXT_INT18_CON[3] ,Setting the signaling method of EXT_INT18[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 8.--10. " EXT_INT18_CON[2] ,Setting the signaling method of EXT_INT18[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " EXT_INT18_CON[1] ,Setting the signaling method of EXT_INT18[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 0.--2. " EXT_INT18_CON[0] ,Setting the signaling method of EXT_INT18[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x14 "EXT_INT19_CON,External interrupt EXT_INT19 configuration register"
|
|
bitfld.long 0x14 28.--30. " EXT_INT19_CON[7] ,Setting the signaling method of EXT_INT19[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 24.--26. " EXT_INT19_CON[6] ,Setting the signaling method of EXT_INT19[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 20.--22. " EXT_INT19_CON[5] ,Setting the signaling method of EXT_INT19[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x14 16.--18. " EXT_INT19_CON[4] ,Setting the signaling method of EXT_INT19[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 12.--14. " EXT_INT19_CON[3] ,Setting the signaling method of EXT_INT19[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 8.--10. " EXT_INT19_CON[2] ,Setting the signaling method of EXT_INT19[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x14 4.--6. " EXT_INT19_CON[1] ,Setting the signaling method of EXT_INT19[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 0.--2. " EXT_INT19_CON[0] ,Setting the signaling method of EXT_INT19[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x18 "EXT_INT20_CON,External interrupt EXT_INT20 configuration register"
|
|
bitfld.long 0x18 4.--6. " EXT_INT20_CON[1] ,Setting the signaling method of EXT_INT20[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 0.--2. " EXT_INT20_CON[0] ,Setting the signaling method of EXT_INT20[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x1C "EXT_INT21_CON,External interrupt EXT_INT21 configuration register"
|
|
bitfld.long 0x1C 12.--14. " EXT_INT21_CON[3] ,Setting the signaling method of EXT_INT21[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 8.--10. " EXT_INT21_CON[2] ,Setting the signaling method of EXT_INT21[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 4.--6. " EXT_INT21_CON[1] ,Setting the signaling method of EXT_INT21[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x1C 0.--2. " EXT_INT21_CON[0] ,Setting the signaling method of EXT_INT21[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x20 "EXT_INT22_CON,External interrupt EXT_INT22 configuration register"
|
|
bitfld.long 0x20 28.--30. " EXT_INT22_CON[7] ,Setting the signaling method of EXT_INT22[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 24.--26. " EXT_INT22_CON[6] ,Setting the signaling method of EXT_INT22[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 20.--22. " EXT_INT22_CON[5] ,Setting the signaling method of EXT_INT22[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 16.--18. " EXT_INT22_CON[4] ,Setting the signaling method of EXT_INT22[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 12.--14. " EXT_INT22_CON[3] ,Setting the signaling method of EXT_INT22[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 8.--10. " EXT_INT22_CON[2] ,Setting the signaling method of EXT_INT22[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 4.--6. " EXT_INT22_CON[1] ,Setting the signaling method of EXT_INT22[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 0.--2. " EXT_INT22_CON[0] ,Setting the signaling method of EXT_INT22[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long (0x800+0x0)++0x03
|
|
line.long 0x00 "EXT_INT14_FLTCON0,External interrupt EXT_INT14 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN1[3] ,Filter Enable for EXT_INT14[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT14[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN1[2] ,Filter Enable for EXT_INT14[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT14[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[1] ,Filter Enable for EXT_INT14[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT14[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[0] ,Filter Enable for EXT_INT14[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT14[0]"
|
|
group.long (0x800+0x0+0x04)++0x03
|
|
line.long 0x00 "EXT_INT14_FLTCON1,External interrupt EXT_INT14 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN1[7] ,Filter Enable for EXT_INT14[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT14[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN1[6] ,Filter Enable for EXT_INT14[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT14[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[5] ,Filter Enable for EXT_INT14[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT14[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[4] ,Filter Enable for EXT_INT214[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT214[4]"
|
|
group.long (0x800+0x8)++0x03
|
|
line.long 0x00 "EXT_INT15_FLTCON0,External interrupt EXT_INT15 filter configuration register 0"
|
|
bitfld.long 0x00 15. " FLTEN2[1] ,Filter Enable for EXT_INT15[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT15[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN2[0] ,Filter Enable for EXT_INT15[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT15[0]"
|
|
hgroup.long (0x800+0x8+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT15_FLTCON1,External interrupt EXT_INT15 filter configuration register 1"
|
|
group.long (0x800+0x10)++0x03
|
|
line.long 0x00 "EXT_INT16_FLTCON0,External interrupt EXT_INT16 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN3[3] ,Filter Enable for EXT_INT16[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT16[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN3[2] ,Filter Enable for EXT_INT16[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT16[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3[1] ,Filter Enable for EXT_INT16[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT16[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN3[0] ,Filter Enable for EXT_INT16[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT16[0]"
|
|
hgroup.long (0x800+0x10+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT16_FLTCON1,External interrupt EXT_INT16 filter configuration register 1"
|
|
group.long (0x800+0x18)++0x03
|
|
line.long 0x00 "EXT_INT17_FLTCON0,External interrupt EXT_INT17 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN4[3] ,Filter Enable for EXT_INT17[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT17[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN4[2] ,Filter Enable for EXT_INT17[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT17[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN4[1] ,Filter Enable for EXT_INT17[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT17[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN4[0] ,Filter Enable for EXT_INT17[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT17[0]"
|
|
hgroup.long (0x800+0x18+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT17_FLTCON1,External interrupt EXT_INT17 filter configuration register 1"
|
|
group.long (0x800+0x20)++0x03
|
|
line.long 0x00 "EXT_INT18_FLTCON0,External interrupt EXT_INT18 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN5[3] ,Filter Enable for EXT_INT18[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH5[3] ,Filtering width of EXT_INT18[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN5[2] ,Filter Enable for EXT_INT18[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH5[2] ,Filtering width of EXT_INT18[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN5[1] ,Filter Enable for EXT_INT18[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT18[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN5[0] ,Filter Enable for EXT_INT18[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT18[0]"
|
|
group.long (0x800+0x20+0x04)++0x03
|
|
line.long 0x00 "EXT_INT18_FLTCON1,External interrupt EXT_INT18 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN5[7] ,Filter Enable for EXT_INT18[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH5[7] ,Filtering width of EXT_INT18[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN5[6] ,Filter Enable for EXT_INT18[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH5[6] ,Filtering width of EXT_INT18[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN5[5] ,Filter Enable for EXT_INT18[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH5[5] ,Filtering width of EXT_INT18[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN5[4] ,Filter Enable for EXT_INT218[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[4] ,Filtering width of EXT_INT218[4]"
|
|
group.long (0x800+0x28)++0x03
|
|
line.long 0x00 "EXT_INT19_FLTCON0,External interrupt EXT_INT19 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN6[3] ,Filter Enable for EXT_INT19[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH6[3] ,Filtering width of EXT_INT19[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN6[2] ,Filter Enable for EXT_INT19[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH6[2] ,Filtering width of EXT_INT19[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN6[1] ,Filter Enable for EXT_INT19[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH6[1] ,Filtering width of EXT_INT19[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN6[0] ,Filter Enable for EXT_INT19[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH6[0] ,Filtering width of EXT_INT19[0]"
|
|
group.long (0x800+0x28+0x04)++0x03
|
|
line.long 0x00 "EXT_INT19_FLTCON1,External interrupt EXT_INT19 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN6[7] ,Filter Enable for EXT_INT19[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH6[7] ,Filtering width of EXT_INT19[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN6[6] ,Filter Enable for EXT_INT19[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH6[6] ,Filtering width of EXT_INT19[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN6[5] ,Filter Enable for EXT_INT19[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH6[5] ,Filtering width of EXT_INT19[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN6[4] ,Filter Enable for EXT_INT219[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH6[4] ,Filtering width of EXT_INT219[4]"
|
|
group.long (0x800+0x30)++0x03
|
|
line.long 0x00 "EXT_INT20_FLTCON0,External interrupt EXT_INT20 filter configuration register 0"
|
|
bitfld.long 0x00 15. " FLTEN7[1] ,Filter Enable for EXT_INT20[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH7[1] ,Filtering width of EXT_INT20[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN7[0] ,Filter Enable for EXT_INT20[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH7[0] ,Filtering width of EXT_INT20[0]"
|
|
group.long (0x800+0x30+0x04)++0x03
|
|
line.long 0x00 "EXT_INT20_FLTCON1,External interrupt EXT_INT20 filter configuration register 1"
|
|
group.long (0x800+0x38)++0x03
|
|
line.long 0x00 "EXT_INT21_FLTCON0,External interrupt EXT_INT21 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN8[3] ,Filter Enable for EXT_INT21[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH8[3] ,Filtering width of EXT_INT21[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN8[2] ,Filter Enable for EXT_INT21[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH8[2] ,Filtering width of EXT_INT21[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN8[1] ,Filter Enable for EXT_INT21[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH8[1] ,Filtering width of EXT_INT21[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN8[0] ,Filter Enable for EXT_INT21[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH8[0] ,Filtering width of EXT_INT21[0]"
|
|
hgroup.long (0x800+0x38+0x04)++0x03
|
|
hide.long 0x00 "EXT_INT21_FLTCON1,External interrupt EXT_INT21 filter configuration register 1"
|
|
group.long (0x800+0x40)++0x03
|
|
line.long 0x00 "EXT_INT22_FLTCON0,External interrupt EXT_INT22 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN9[3] ,Filter Enable for EXT_INT22[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH9[3] ,Filtering width of EXT_INT22[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN9[2] ,Filter Enable for EXT_INT22[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH9[2] ,Filtering width of EXT_INT22[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN9[1] ,Filter Enable for EXT_INT22[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH9[1] ,Filtering width of EXT_INT22[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN9[0] ,Filter Enable for EXT_INT22[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH9[0] ,Filtering width of EXT_INT22[0]"
|
|
group.long (0x800+0x40+0x04)++0x03
|
|
line.long 0x00 "EXT_INT22_FLTCON1,External interrupt EXT_INT22 filter configuration register 1"
|
|
bitfld.long 0x00 31. " FLTEN9[7] ,Filter Enable for EXT_INT22[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH9[7] ,Filtering width of EXT_INT22[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN9[6] ,Filter Enable for EXT_INT22[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH9[6] ,Filtering width of EXT_INT22[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN9[5] ,Filter Enable for EXT_INT22[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH9[5] ,Filtering width of EXT_INT22[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN9[4] ,Filter Enable for EXT_INT222[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH9[4] ,Filtering width of EXT_INT222[4]"
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt mask"
|
|
group.long 0x900++0x23
|
|
line.long 0x00 "EXT_INT14_MASK,External interrupt EXT_INT14 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT14_MASK[7] ,External Interrupt 14 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT14_MASK[6] ,External Interrupt 14 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT14_MASK[5] ,External Interrupt 14 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT14_MASK[4] ,External Interrupt 14 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT14_MASK[3] ,External Interrupt 14 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT14_MASK[2] ,External Interrupt 14 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT14_MASK[1] ,External Interrupt 14 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT14_MASK[0] ,External Interrupt 14 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x04 "EXT_INT15_MASK,External interrupt EXT_INT15 mask register"
|
|
bitfld.long 0x04 1. " EXT_INT15_MASK[1] ,External Interrupt 15 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 0. " EXT_INT15_MASK[0] ,External Interrupt 15 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x08 "EXT_INT16_MASK,External interrupt EXT_INT16 mask register"
|
|
bitfld.long 0x08 3. " EXT_INT16_MASK[3] ,External Interrupt 16 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 2. " EXT_INT16_MASK[2] ,External Interrupt 16 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT16_MASK[1] ,External Interrupt 16 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 0. " EXT_INT16_MASK[0] ,External Interrupt 16 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x0C "EXT_INT17_MASK,External interrupt EXT_INT17 mask register"
|
|
bitfld.long 0x0C 3. " EXT_INT17_MASK[3] ,External Interrupt 17 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 2. " EXT_INT17_MASK[2] ,External Interrupt 17 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " EXT_INT17_MASK[1] ,External Interrupt 17 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 0. " EXT_INT17_MASK[0] ,External Interrupt 17 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x10 "EXT_INT18_MASK,External interrupt EXT_INT18 mask register"
|
|
bitfld.long 0x10 7. " EXT_INT18_MASK[7] ,External Interrupt 18 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 6. " EXT_INT18_MASK[6] ,External Interrupt 18 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 5. " EXT_INT18_MASK[5] ,External Interrupt 18 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 4. " EXT_INT18_MASK[4] ,External Interrupt 18 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXT_INT18_MASK[3] ,External Interrupt 18 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 2. " EXT_INT18_MASK[2] ,External Interrupt 18 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 1. " EXT_INT18_MASK[1] ,External Interrupt 18 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 0. " EXT_INT18_MASK[0] ,External Interrupt 18 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x14 "EXT_INT19_MASK,External interrupt EXT_INT19 mask register"
|
|
bitfld.long 0x14 7. " EXT_INT19_MASK[7] ,External Interrupt 19 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 6. " EXT_INT19_MASK[6] ,External Interrupt 19 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 5. " EXT_INT19_MASK[5] ,External Interrupt 19 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 4. " EXT_INT19_MASK[4] ,External Interrupt 19 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXT_INT19_MASK[3] ,External Interrupt 19 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 2. " EXT_INT19_MASK[2] ,External Interrupt 19 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT19_MASK[1] ,External Interrupt 19 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 0. " EXT_INT19_MASK[0] ,External Interrupt 19 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x18 "EXT_INT20_MASK,External interrupt EXT_INT20 mask register"
|
|
bitfld.long 0x18 1. " EXT_INT20_MASK[1] ,External Interrupt 20 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 0. " EXT_INT20_MASK[0] ,External Interrupt 20 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x1C "EXT_INT21_MASK,External interrupt EXT_INT21 mask register"
|
|
bitfld.long 0x1C 3. " EXT_INT21_MASK[3] ,External Interrupt 21 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 2. " EXT_INT21_MASK[2] ,External Interrupt 21 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " EXT_INT21_MASK[1] ,External Interrupt 21 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 0. " EXT_INT21_MASK[0] ,External Interrupt 21 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x20 "EXT_INT22_MASK,External interrupt EXT_INT22 mask register"
|
|
bitfld.long 0x20 7. " EXT_INT22_MASK[7] ,External Interrupt 22 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 6. " EXT_INT22_MASK[6] ,External Interrupt 22 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT22_MASK[5] ,External Interrupt 22 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 4. " EXT_INT22_MASK[4] ,External Interrupt 22 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT22_MASK[3] ,External Interrupt 22 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 2. " EXT_INT22_MASK[2] ,External Interrupt 22 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT22_MASK[1] ,External Interrupt 22 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 0. " EXT_INT22_MASK[0] ,External Interrupt 22 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++0x23
|
|
line.long 0x00 "EXT_INT14_PEND,External interrupt EXT_INT14 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT14_PEND[7] ,External Interrupt 14 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT14_PEND[6] ,External Interrupt 14 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT14_PEND[5] ,External Interrupt 14 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT14_PEND[4] ,External Interrupt 14 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT14_PEND[3] ,External Interrupt 14 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT14_PEND[2] ,External Interrupt 14 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT14_PEND[1] ,External Interrupt 14 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT14_PEND[0] ,External Interrupt 14 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x04 "EXT_INT15_PEND,External interrupt EXT_INT15 pending register"
|
|
bitfld.long 0x04 1. " EXT_INT15_PEND[1] ,External Interrupt 15 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " EXT_INT15_PEND[0] ,External Interrupt 15 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x08 "EXT_INT16_PEND,External interrupt EXT_INT16 pending register"
|
|
bitfld.long 0x08 3. " EXT_INT16_PEND[3] ,External Interrupt 23 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x08 2. " EXT_INT16_PEND[2] ,External Interrupt 23 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT16_PEND[1] ,External Interrupt 23 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x08 0. " EXT_INT16_PEND[0] ,External Interrupt 23 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x0C "EXT_INT17_PEND,External interrupt EXT_INT17 pending register"
|
|
bitfld.long 0x0C 3. " EXT_INT17_PEND[3] ,External interrupt 17 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 2. " EXT_INT17_PEND[2] ,External interrupt 17 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " EXT_INT17_PEND[1] ,External interrupt 17 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 0. " EXT_INT17_PEND[0] ,External interrupt 17 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x10 "EXT_INT18_PEND,External interrupt EXT_INT18 pending register"
|
|
bitfld.long 0x10 7. " EXT_INT18_PEND[7] ,External Interrupt 18 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x10 6. " EXT_INT18_PEND[6] ,External Interrupt 18 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 5. " EXT_INT18_PEND[5] ,External Interrupt 18 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x10 4. " EXT_INT18_PEND[4] ,External Interrupt 18 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXT_INT18_PEND[3] ,External Interrupt 18 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x10 2. " EXT_INT18_PEND[2] ,External Interrupt 18 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 1. " EXT_INT18_PEND[1] ,External Interrupt 18 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x10 0. " EXT_INT18_PEND[0] ,External Interrupt 18 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x14 "EXT_INT19_PEND,External interrupt EXT_INT19 pending register"
|
|
bitfld.long 0x14 7. " EXT_INT19_PEND[7] ,External Interrupt 19 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x14 6. " EXT_INT19_PEND[6] ,External Interrupt 19 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 5. " EXT_INT19_PEND[5] ,External Interrupt 19 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x14 4. " EXT_INT19_PEND[4] ,External Interrupt 19 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXT_INT19_PEND[3] ,External Interrupt 19 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " EXT_INT19_PEND[2] ,External Interrupt 19 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT19_PEND[1] ,External Interrupt 19 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " EXT_INT19_PEND[0] ,External Interrupt 19 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x18 "EXT_INT20_PEND,External interrupt EXT_INT20 pending register"
|
|
bitfld.long 0x18 1. " EXT_INT20_PEND[1] ,External Interrupt 20 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x18 0. " EXT_INT20_PEND[0] ,External Interrupt 20 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x1C "EXT_INT21_PEND,External interrupt EXT_INT21 pending register"
|
|
bitfld.long 0x1C 3. " EXT_INT21_PEND[3] ,External Interrupt 21 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 2. " EXT_INT21_PEND[2] ,External Interrupt 21 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " EXT_INT21_PEND[1] ,External Interrupt 21 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 0. " EXT_INT21_PEND[0] ,External Interrupt 21 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x20 "EXT_INT22_PEND,External interrupt EXT_INT22 pending register"
|
|
bitfld.long 0x20 7. " EXT_INT22_PEND[7] ,External Interrupt 22 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x20 6. " EXT_INT22_PEND[6] ,External Interrupt 22 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT22_PEND[5] ,External Interrupt 22 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x20 4. " EXT_INT22_PEND[4] ,External Interrupt 22 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT22_PEND[3] ,External Interrupt 22 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x20 2. " EXT_INT22_PEND[2] ,External Interrupt 22 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT22_PEND[1] ,External Interrupt 22 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x20 0. " EXT_INT22_PEND[0] ,External Interrupt 22 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 21.
|
|
tree "External interrupt priority control"
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "EXT_INT_GRPPRI_XA,External interrupt group priority control register"
|
|
bitfld.long 0x00 0. " EXT_INT_GRPPRI ,Enables EXT_INT groups priority rotate enable" "Fixed,Enabled"
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "EXT_INT_PRIORITY_XA,External interrupt priority control register"
|
|
bitfld.long 0x00 8. " EXT_INT22_PRI ,Enables EXT_INT group 9 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 7. " EXT_INT21_PRI ,Enables EXT_INT group 8 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 6. " EXT_INT20_PRI ,Enables EXT_INT group 7 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT19_PRI ,Enables EXT_INT group 6 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 4. " EXT_INT18_PRI ,Enables EXT_INT group 5 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 3. " EXT_INT17_PRI ,Enables EXT_INT group 4 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT16_PRI ,Enables EXT_INT group 3 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 1. " EXT_INT15_PRI ,Enables EXT_INT group 2 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 0. " EXT_INT14_PRI ,Enables EXT_INT group 1 priority rotate" "Fixed,Enabled"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XB,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XB,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++0x27
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XB,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--4. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,?..."
|
|
line.long 0x04 "EXT_INT14_FIXPRI,External interrupt 14 fixed priority control register"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT14" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "EXT_INT15_FIXPRI,External interrupt 15 fixed priority control register"
|
|
bitfld.long 0x08 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT15" "0,1,?..."
|
|
line.long 0x0C "EXT_INT16_FIXPRI,External interrupt 16 fixed priority control register"
|
|
bitfld.long 0x0C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT16" "0,1,2,3,?..."
|
|
line.long 0x10 "EXT_INT17_FIXPRI,External interrupt 17 fixed priority control register"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT17" "0,1,2,3,?..."
|
|
line.long 0x14 "EXT_INT18_FIXPRI,External interrupt 18 fixed priority control register"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT18" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "EXT_INT19_FIXPRI,External interrupt 19 fixed priority control register"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT19" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "EXT_INT20_FIXPRI,External interrupt 20 fixed priority control register"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT20" "0,1,?..."
|
|
line.long 0x20 "EXT_INT21_FIXPRI,External interrupt 21 fixed priority control register"
|
|
bitfld.long 0x20 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT21" "0,1,2,3,?..."
|
|
line.long 0x24 "EXT_INT22_FIXPRI,External interrupt 22 fixed priority control register"
|
|
bitfld.long 0x24 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT22" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree.end
|
|
base ad:0x10D10000
|
|
width 15.
|
|
tree "GPV0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPV0CON,Port Group GPV0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV0CON[7] ,GPV0 Pin 7 Configuration" "Input,Output,C2C_RXD[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[7]"
|
|
bitfld.long 0x00 24.--27. " GPV0CON[6] ,GPV0 Pin 6 Configuration" "Input,Output,C2C_RXD[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[6]"
|
|
bitfld.long 0x00 20.--23. " GPV0CON[5] ,GPV0 Pin 5 Configuration" "Input,Output,C2C_RXD[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[5]"
|
|
bitfld.long 0x00 16.--19. " GPV0CON[4] ,GPV0 Pin 4 Configuration" "Input,Output,C2C_RXD[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV0CON[3] ,GPV0 Pin 3 Configuration" "Input,Output,C2C_RXD[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[3]"
|
|
bitfld.long 0x00 8.--11. " GPV0CON[2] ,GPV0 Pin 2 Configuration" "Input,Output,C2C_RXD[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[2]"
|
|
bitfld.long 0x00 4.--7. " GPV0CON[1] ,GPV0 Pin 1 Configuration" "Input,Output,C2C_RXD[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[1]"
|
|
bitfld.long 0x00 0.--3. " GPV0CON[0] ,GPV0 Pin 0 Configuration" "Input,Output,C2C_RXD[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT60[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPV0DAT,Port Group GPV0 Data Register"
|
|
bitfld.byte 0x00 7. " GPV0DAT[7] ,GPV0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV0DAT[6] ,GPV0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV0DAT[5] ,GPV0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV0DAT[4] ,GPV0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV0DAT[3] ,GPV0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV0DAT[2] ,GPV0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV0DAT[1] ,GPV0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV0DAT[0] ,GPV0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPV0PUD,Port Group GPV0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV0PUD[7] ,GPV0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV0PUD[6] ,GPV0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV0PUD[5] ,GPV0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV0PUD[4] ,GPV0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0PUD[3] ,GPV0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV0PUD[2] ,GPV0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV0PUD[1] ,GPV0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV0PUD[0] ,GPV0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPV0DRV,Port Group GPV0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV0DRV[7] ,GPV0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV0DRV[6] ,GPV0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV0DRV[5] ,GPV0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV0DRV[4] ,GPV0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV0DRV[3] ,GPV0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV0DRV[2] ,GPV0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV0DRV[1] ,GPV0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV0DRV[0] ,GPV0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPV0CONPDN,Port Group GPV0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV0[7] ,GPV0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV0[6] ,GPV0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV0[5] ,GPV0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV0[4] ,GPV0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0[3] ,GPV0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV0[2] ,GPV0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV0[1] ,GPV0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV0[0] ,GPV0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPV0PUDPDN,Port Group GPV0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV0[7] ,GPV0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV0[6] ,GPV0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV0[5] ,GPV0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV0[4] ,GPV0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0[3] ,GPV0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV0[2] ,GPV0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV0[1] ,GPV0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV0[0] ,GPV0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPV1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPV1CON,Port Group GPV1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV1CON[7] ,GPV1 Pin 7 Configuration" "Input,Output,C2C_RXD[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[7]"
|
|
bitfld.long 0x00 24.--27. " GPV1CON[6] ,GPV1 Pin 6 Configuration" "Input,Output,C2C_RXD[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[6]"
|
|
bitfld.long 0x00 20.--23. " GPV1CON[5] ,GPV1 Pin 5 Configuration" "Input,Output,C2C_RXD[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[5]"
|
|
bitfld.long 0x00 16.--19. " GPV1CON[4] ,GPV1 Pin 4 Configuration" "Input,Output,C2C_RXD[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV1CON[3] ,GPV1 Pin 3 Configuration" "Input,Output,C2C_RXD[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[3]"
|
|
bitfld.long 0x00 8.--11. " GPV1CON[2] ,GPV1 Pin 2 Configuration" "Input,Output,C2C_RXD[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[2]"
|
|
bitfld.long 0x00 4.--7. " GPV1CON[1] ,GPV1 Pin 1 Configuration" "Input,Output,C2C_RXD[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[1]"
|
|
bitfld.long 0x00 0.--3. " GPV1CON[0] ,GPV1 Pin 0 Configuration" "Input,Output,C2C_RXD[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT61[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPV1DAT,Port Group GPV1 Data Register"
|
|
bitfld.byte 0x00 7. " GPV1DAT[7] ,GPV1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV1DAT[6] ,GPV1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV1DAT[5] ,GPV1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV1DAT[4] ,GPV1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV1DAT[3] ,GPV1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV1DAT[2] ,GPV1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV1DAT[1] ,GPV1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV1DAT[0] ,GPV1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPV1PUD,Port Group GPV1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV1PUD[7] ,GPV1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV1PUD[6] ,GPV1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV1PUD[5] ,GPV1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV1PUD[4] ,GPV1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1PUD[3] ,GPV1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV1PUD[2] ,GPV1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV1PUD[1] ,GPV1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV1PUD[0] ,GPV1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPV1DRV,Port Group GPV1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV1DRV[7] ,GPV1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV1DRV[6] ,GPV1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV1DRV[5] ,GPV1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV1DRV[4] ,GPV1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV1DRV[3] ,GPV1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV1DRV[2] ,GPV1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV1DRV[1] ,GPV1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV1DRV[0] ,GPV1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPV1CONPDN,Port Group GPV1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV1[7] ,GPV1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV1[6] ,GPV1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV1[5] ,GPV1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV1[4] ,GPV1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1[3] ,GPV1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV1[2] ,GPV1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV1[1] ,GPV1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV1[0] ,GPV1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPV1PUDPDN,Port Group GPV1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV1[7] ,GPV1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV1[6] ,GPV1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV1[5] ,GPV1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV1[4] ,GPV1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1[3] ,GPV1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV1[2] ,GPV1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV1[1] ,GPV1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV1[0] ,GPV1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 12.
|
|
tree "ETC5"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "ETC5PUD,Port Group ETC5 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " ETC7PUD[1] ,ETC7 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC7PUD[0] ,ETC7 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "ETC5DRV,Port Group ETC5 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " ETC5DRV[1] ,ETC5 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC5DRV[0] ,ETC5 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV2"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPV2CON,Port Group GPV2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV2CON[7] ,GPV2 Pin 7 Configuration" "Input,Output,C2C_TXD[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[7]"
|
|
bitfld.long 0x00 24.--27. " GPV2CON[6] ,GPV2 Pin 6 Configuration" "Input,Output,C2C_TXD[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[6]"
|
|
bitfld.long 0x00 20.--23. " GPV2CON[5] ,GPV2 Pin 5 Configuration" "Input,Output,C2C_TXD[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[5]"
|
|
bitfld.long 0x00 16.--19. " GPV2CON[4] ,GPV2 Pin 4 Configuration" "Input,Output,C2C_TXD[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV2CON[3] ,GPV2 Pin 3 Configuration" "Input,Output,C2C_TXD[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[3]"
|
|
bitfld.long 0x00 8.--11. " GPV2CON[2] ,GPV2 Pin 2 Configuration" "Input,Output,C2C_TXD[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[2]"
|
|
bitfld.long 0x00 4.--7. " GPV2CON[1] ,GPV2 Pin 1 Configuration" "Input,Output,C2C_TXD[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[1]"
|
|
bitfld.long 0x00 0.--3. " GPV2CON[0] ,GPV2 Pin 0 Configuration" "Input,Output,C2C_TXD[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT62[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPV2DAT,Port Group GPV2 Data Register"
|
|
bitfld.byte 0x00 7. " GPV2DAT[7] ,GPV2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV2DAT[6] ,GPV2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV2DAT[5] ,GPV2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV2DAT[4] ,GPV2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV2DAT[3] ,GPV2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV2DAT[2] ,GPV2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV2DAT[1] ,GPV2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV2DAT[0] ,GPV2 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPV2PUD,Port Group GPV2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV2PUD[7] ,GPV2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV2PUD[6] ,GPV2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV2PUD[5] ,GPV2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV2PUD[4] ,GPV2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2PUD[3] ,GPV2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV2PUD[2] ,GPV2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV2PUD[1] ,GPV2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV2PUD[0] ,GPV2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPV2DRV,Port Group GPV2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV2DRV[7] ,GPV2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV2DRV[6] ,GPV2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV2DRV[5] ,GPV2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV2DRV[4] ,GPV2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV2DRV[3] ,GPV2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV2DRV[2] ,GPV2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV2DRV[1] ,GPV2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV2DRV[0] ,GPV2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPV2CONPDN,Port Group GPV2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV2[7] ,GPV2 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV2[6] ,GPV2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV2[5] ,GPV2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV2[4] ,GPV2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2[3] ,GPV2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV2[2] ,GPV2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV2[1] ,GPV2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV2[0] ,GPV2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPV2PUDPDN,Port Group GPV2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV2[7] ,GPV2 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV2[6] ,GPV2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV2[5] ,GPV2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV2[4] ,GPV2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2[3] ,GPV2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV2[2] ,GPV2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV2[1] ,GPV2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV2[0] ,GPV2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV3"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPV3CON,Port Group GPV3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV3CON[7] ,GPV3 Pin 7 Configuration" "Input,Output,C2C_TXD[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[7]"
|
|
bitfld.long 0x00 24.--27. " GPV3CON[6] ,GPV3 Pin 6 Configuration" "Input,Output,C2C_TXD[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[6]"
|
|
bitfld.long 0x00 20.--23. " GPV3CON[5] ,GPV3 Pin 5 Configuration" "Input,Output,C2C_TXD[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[5]"
|
|
bitfld.long 0x00 16.--19. " GPV3CON[4] ,GPV3 Pin 4 Configuration" "Input,Output,C2C_TXD[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV3CON[3] ,GPV3 Pin 3 Configuration" "Input,Output,C2C_TXD[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[3]"
|
|
bitfld.long 0x00 8.--11. " GPV3CON[2] ,GPV3 Pin 2 Configuration" "Input,Output,C2C_TXD[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[2]"
|
|
bitfld.long 0x00 4.--7. " GPV3CON[1] ,GPV3 Pin 1 Configuration" "Input,Output,C2C_TXD[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[1]"
|
|
bitfld.long 0x00 0.--3. " GPV3CON[0] ,GPV3 Pin 0 Configuration" "Input,Output,C2C_TXD[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT63[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPV3DAT,Port Group GPV3 Data Register"
|
|
bitfld.byte 0x00 7. " GPV3DAT[7] ,GPV3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV3DAT[6] ,GPV3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV3DAT[5] ,GPV3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV3DAT[4] ,GPV3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV3DAT[3] ,GPV3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV3DAT[2] ,GPV3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV3DAT[1] ,GPV3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV3DAT[0] ,GPV3 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPV3PUD,Port Group GPV3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV3PUD[7] ,GPV3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV3PUD[6] ,GPV3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV3PUD[5] ,GPV3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV3PUD[4] ,GPV3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3PUD[3] ,GPV3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV3PUD[2] ,GPV3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV3PUD[1] ,GPV3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV3PUD[0] ,GPV3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPV3DRV,Port Group GPV3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV3DRV[7] ,GPV3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV3DRV[6] ,GPV3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV3DRV[5] ,GPV3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV3DRV[4] ,GPV3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV3DRV[3] ,GPV3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV3DRV[2] ,GPV3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV3DRV[1] ,GPV3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV3DRV[0] ,GPV3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPV3CONPDN,Port Group GPV3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV3[7] ,GPV3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV3[6] ,GPV3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV3[5] ,GPV3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV3[4] ,GPV3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3[3] ,GPV3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV3[2] ,GPV3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV3[1] ,GPV3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV3[0] ,GPV3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPV3PUDPDN,Port Group GPV3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV3[7] ,GPV3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV3[6] ,GPV3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV3[5] ,GPV3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV3[4] ,GPV3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3[3] ,GPV3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV3[2] ,GPV3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV3[1] ,GPV3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV3[0] ,GPV3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 12.
|
|
tree "ETC8"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "ETC8PUD,Port Group ETC8 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " ETC8PUD[1] ,ETC8 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC8PUD[0] ,ETC8 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "ETC8DRV,Port Group ETC8 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " ETC8DRV[1] ,ETC8 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC8DRV[0] ,ETC8 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV4"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPV4CON,Port Group GPV4 Configuration Register"
|
|
bitfld.long 0x00 4.--7. " GPV4CON[1] ,GPV4 Pin 1 Configuration" "Input,Output,C2C_WKREQOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT64[1]"
|
|
bitfld.long 0x00 0.--3. " GPV4CON[0] ,GPV4 Pin 0 Configuration" "Input,Output,C2C_WKREQIN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT64[0]"
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPV4DAT,Port Group GPV4 Data Register"
|
|
bitfld.byte 0x00 1. " GPV4DAT[1] ,GPV4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV4DAT[0] ,GPV4 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPV4PUD,Port Group GPV4 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPV4PUD[1] ,GPV4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV4PUD[0] ,GPV4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPV4DRV,Port Group GPV4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " GPV4DRV[1] ,GPV4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV4DRV[0] ,GPV4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPV4CONPDN,Port Group GPV4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 2.--3. " GPV4[1] ,GPV4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV4[0] ,GPV4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPV4PUDPDN,Port Group GPV4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPV4[1] ,GPV4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV4[0] ,GPV4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "EXT_INT60_CON,External interrupt EXT_INT60 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT60_CON[7] ,Setting the signaling method of EXT_INT60[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT60_CON[6] ,Setting the signaling method of EXT_INT60[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT60_CON[5] ,Setting the signaling method of EXT_INT60[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT60_CON[4] ,Setting the signaling method of EXT_INT60[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT60_CON[3] ,Setting the signaling method of EXT_INT60[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT60_CON[2] ,Setting the signaling method of EXT_INT60[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT60_CON[1] ,Setting the signaling method of EXT_INT60[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT60_CON[0] ,Setting the signaling method of EXT_INT60[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "EXT_INT61_CON,External interrupt EXT_INT61 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT61_CON[7] ,Setting the signaling method of EXT_INT61[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT61_CON[6] ,Setting the signaling method of EXT_INT61[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT61_CON[5] ,Setting the signaling method of EXT_INT61[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT61_CON[4] ,Setting the signaling method of EXT_INT61[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT61_CON[3] ,Setting the signaling method of EXT_INT61[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT61_CON[2] ,Setting the signaling method of EXT_INT61[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT61_CON[1] ,Setting the signaling method of EXT_INT61[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT61_CON[0] ,Setting the signaling method of EXT_INT61[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "EXT_INT62_CON,External interrupt EXT_INT62 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT62_CON[7] ,Setting the signaling method of EXT_INT62[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT62_CON[6] ,Setting the signaling method of EXT_INT62[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT62_CON[5] ,Setting the signaling method of EXT_INT62[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT62_CON[4] ,Setting the signaling method of EXT_INT62[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT62_CON[3] ,Setting the signaling method of EXT_INT62[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT62_CON[2] ,Setting the signaling method of EXT_INT62[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT62_CON[1] ,Setting the signaling method of EXT_INT62[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT62_CON[0] ,Setting the signaling method of EXT_INT62[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "EXT_INT63_CON,External interrupt EXT_INT63 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT63_CON[7] ,Setting the signaling method of EXT_INT63[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT63_CON[6] ,Setting the signaling method of EXT_INT63[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT63_CON[5] ,Setting the signaling method of EXT_INT63[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT63_CON[4] ,Setting the signaling method of EXT_INT63[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT63_CON[3] ,Setting the signaling method of EXT_INT63[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT63_CON[2] ,Setting the signaling method of EXT_INT63[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT63_CON[1] ,Setting the signaling method of EXT_INT63[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT63_CON[0] ,Setting the signaling method of EXT_INT63[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "EXT_INT64_CON,External interrupt EXT_INT64 configuration register"
|
|
bitfld.long 0x00 4.--6. " EXT_INT64_CON[1] ,Setting the signaling method of EXT_INT64[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT64_CON[0] ,Setting the signaling method of EXT_INT64[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++0x1F
|
|
line.long 0x0 "EXT_INT60_FLTCON0,External interrupt EXT_INT60 filter configuration register 0"
|
|
bitfld.long 0x0 31. " FLTEN1[3] ,Filter Enable for EXT_INT60[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT60[3]"
|
|
bitfld.long 0x0 23. " FLTEN1[2] ,Filter Enable for EXT_INT60[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT60[2]"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FLTEN1[1] ,Filter Enable for EXT_INT60[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT60[1]"
|
|
bitfld.long 0x0 7. " FLTEN1[0] ,Filter Enable for EXT_INT60[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT60[0]"
|
|
line.long 0x0+0x04 "EXT_INT60_FLTCON1,External interrupt EXT_INT60 filter configuration register 1"
|
|
bitfld.long 0x0+0x04 31. " FLTEN1[7] ,Filter Enable for EXT_INT60[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0+0x04 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT60[7]"
|
|
bitfld.long 0x0+0x04 23. " FLTEN1[6] ,Filter Enable for EXT_INT60[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0+0x04 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT60[6]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 15. " FLTEN1[5] ,Filter Enable for EXT_INT60[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0+0x04 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT60[5]"
|
|
bitfld.long 0x0+0x04 7. " FLTEN1[4] ,Filter Enable for EXT_INT60[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0+0x04 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT60[4]"
|
|
line.long 0x8 "EXT_INT61_FLTCON0,External interrupt EXT_INT61 filter configuration register 0"
|
|
bitfld.long 0x8 31. " FLTEN2[3] ,Filter Enable for EXT_INT61[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 24.--30. 1. " FLTWIDTH2[3] ,Filtering width of EXT_INT61[3]"
|
|
bitfld.long 0x8 23. " FLTEN2[2] ,Filter Enable for EXT_INT61[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 16.--22. 1. " FLTWIDTH2[2] ,Filtering width of EXT_INT61[2]"
|
|
textline " "
|
|
bitfld.long 0x8 15. " FLTEN2[1] ,Filter Enable for EXT_INT61[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT61[1]"
|
|
bitfld.long 0x8 7. " FLTEN2[0] ,Filter Enable for EXT_INT61[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT61[0]"
|
|
line.long 0x8+0x04 "EXT_INT61_FLTCON1,External interrupt EXT_INT61 filter configuration register 1"
|
|
bitfld.long 0x8+0x04 31. " FLTEN2[7] ,Filter Enable for EXT_INT61[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8+0x04 24.--30. 1. " FLTWIDTH2[7] ,Filtering width of EXT_INT61[7]"
|
|
bitfld.long 0x8+0x04 23. " FLTEN2[6] ,Filter Enable for EXT_INT61[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8+0x04 16.--22. 1. " FLTWIDTH2[6] ,Filtering width of EXT_INT61[6]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 15. " FLTEN2[5] ,Filter Enable for EXT_INT61[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8+0x04 8.--14. 1. " FLTWIDTH2[5] ,Filtering width of EXT_INT61[5]"
|
|
bitfld.long 0x8+0x04 7. " FLTEN2[4] ,Filter Enable for EXT_INT61[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8+0x04 0.--6. 1. " FLTWIDTH2[4] ,Filtering width of EXT_INT61[4]"
|
|
line.long 0x10 "EXT_INT62_FLTCON0,External interrupt EXT_INT62 filter configuration register 0"
|
|
bitfld.long 0x10 31. " FLTEN3[3] ,Filter Enable for EXT_INT62[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT62[3]"
|
|
bitfld.long 0x10 23. " FLTEN3[2] ,Filter Enable for EXT_INT62[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT62[2]"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FLTEN3[1] ,Filter Enable for EXT_INT62[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT62[1]"
|
|
bitfld.long 0x10 7. " FLTEN3[0] ,Filter Enable for EXT_INT62[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT62[0]"
|
|
line.long 0x10+0x04 "EXT_INT62_FLTCON1,External interrupt EXT_INT62 filter configuration register 1"
|
|
bitfld.long 0x10+0x04 31. " FLTEN3[7] ,Filter Enable for EXT_INT62[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10+0x04 24.--30. 1. " FLTWIDTH3[7] ,Filtering width of EXT_INT62[7]"
|
|
bitfld.long 0x10+0x04 23. " FLTEN3[6] ,Filter Enable for EXT_INT62[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10+0x04 16.--22. 1. " FLTWIDTH3[6] ,Filtering width of EXT_INT62[6]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 15. " FLTEN3[5] ,Filter Enable for EXT_INT62[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10+0x04 8.--14. 1. " FLTWIDTH3[5] ,Filtering width of EXT_INT62[5]"
|
|
bitfld.long 0x10+0x04 7. " FLTEN3[4] ,Filter Enable for EXT_INT62[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10+0x04 0.--6. 1. " FLTWIDTH3[4] ,Filtering width of EXT_INT62[4]"
|
|
line.long 0x18 "EXT_INT63_FLTCON0,External interrupt EXT_INT63 filter configuration register 0"
|
|
bitfld.long 0x18 31. " FLTEN4[3] ,Filter Enable for EXT_INT63[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT63[3]"
|
|
bitfld.long 0x18 23. " FLTEN4[2] ,Filter Enable for EXT_INT63[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT63[2]"
|
|
textline " "
|
|
bitfld.long 0x18 15. " FLTEN4[1] ,Filter Enable for EXT_INT63[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT63[1]"
|
|
bitfld.long 0x18 7. " FLTEN4[0] ,Filter Enable for EXT_INT63[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT63[0]"
|
|
line.long 0x18+0x04 "EXT_INT63_FLTCON1,External interrupt EXT_INT63 filter configuration register 1"
|
|
bitfld.long 0x18+0x04 31. " FLTEN4[7] ,Filter Enable for EXT_INT63[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18+0x04 24.--30. 1. " FLTWIDTH4[7] ,Filtering width of EXT_INT63[7]"
|
|
bitfld.long 0x18+0x04 23. " FLTEN4[6] ,Filter Enable for EXT_INT63[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18+0x04 16.--22. 1. " FLTWIDTH4[6] ,Filtering width of EXT_INT63[6]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 15. " FLTEN4[5] ,Filter Enable for EXT_INT63[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18+0x04 8.--14. 1. " FLTWIDTH4[5] ,Filtering width of EXT_INT63[5]"
|
|
bitfld.long 0x18+0x04 7. " FLTEN4[4] ,Filter Enable for EXT_INT63[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x18+0x04 0.--6. 1. " FLTWIDTH4[4] ,Filtering width of EXT_INT63[4]"
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "EXT_INT64_FLTCON0,External interrupt EXT_INT64 filter configuration register 0"
|
|
bitfld.long 0x00 15. " FLTEN5[1] ,Filter Enable for EXT_INT64[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT64[1]"
|
|
bitfld.long 0x00 7. " FLTEN5[0] ,Filter Enable for EXT_INT64[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT64[0]"
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "EXT_INT64_FLTCON1,External interrupt EXT_INT64 filter configuration register 1"
|
|
tree.end
|
|
tree "External interrupt mask"
|
|
group.long 0x900++0x0F
|
|
line.long 0x0 "EXT_INT60_MASK,External interrupt EXT_INT60 mask register"
|
|
bitfld.long 0x0 7. " EXT_INT60_MASK[7] ,External Interrupt 60 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 6. " EXT_INT60_MASK[6] ,External Interrupt 60 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT60_MASK[5] ,External Interrupt 60 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 4. " EXT_INT60_MASK[4] ,External Interrupt 60 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT60_MASK[3] ,External Interrupt 60 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 2. " EXT_INT60_MASK[2] ,External Interrupt 60 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT60_MASK[1] ,External Interrupt 60 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 0. " EXT_INT60_MASK[0] ,External Interrupt 60 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x4 "EXT_INT61_MASK,External interrupt EXT_INT61 mask register"
|
|
bitfld.long 0x4 7. " EXT_INT61_MASK[7] ,External Interrupt 61 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 6. " EXT_INT61_MASK[6] ,External Interrupt 61 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT61_MASK[5] ,External Interrupt 61 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 4. " EXT_INT61_MASK[4] ,External Interrupt 61 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT61_MASK[3] ,External Interrupt 61 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 2. " EXT_INT61_MASK[2] ,External Interrupt 61 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT61_MASK[1] ,External Interrupt 61 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 0. " EXT_INT61_MASK[0] ,External Interrupt 61 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x8 "EXT_INT62_MASK,External interrupt EXT_INT62 mask register"
|
|
bitfld.long 0x8 7. " EXT_INT62_MASK[7] ,External Interrupt 62 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 6. " EXT_INT62_MASK[6] ,External Interrupt 62 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT62_MASK[5] ,External Interrupt 62 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 4. " EXT_INT62_MASK[4] ,External Interrupt 62 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT62_MASK[3] ,External Interrupt 62 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 2. " EXT_INT62_MASK[2] ,External Interrupt 62 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT62_MASK[1] ,External Interrupt 62 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 0. " EXT_INT62_MASK[0] ,External Interrupt 62 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0xC "EXT_INT63_MASK,External interrupt EXT_INT63 mask register"
|
|
bitfld.long 0xC 7. " EXT_INT63_MASK[7] ,External Interrupt 63 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 6. " EXT_INT63_MASK[6] ,External Interrupt 63 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT63_MASK[5] ,External Interrupt 63 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 4. " EXT_INT63_MASK[4] ,External Interrupt 63 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT63_MASK[3] ,External Interrupt 63 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 2. " EXT_INT63_MASK[2] ,External Interrupt 63 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT63_MASK[1] ,External Interrupt 63 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 0. " EXT_INT63_MASK[0] ,External Interrupt 63 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "EXT_INT64_MASK,External interrupt EXT_INT64 mask register"
|
|
bitfld.long 0x00 1. " EXT_INT64_MASK[1] ,External Interrupt 64 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT64_MASK[0] ,External Interrupt 64 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++0x0F
|
|
line.long 0x0 "EXT_INT60_PEND,External interrupt EXT_INT60 pending register"
|
|
bitfld.long 0x0 7. " EXT_INT60_PEND[7] ,External Interrupt 60 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x0 6. " EXT_INT60_PEND[6] ,External Interrupt 60 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT60_PEND[5] ,External Interrupt 60 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x0 4. " EXT_INT60_PEND[4] ,External Interrupt 60 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT60_PEND[3] ,External Interrupt 60 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x0 2. " EXT_INT60_PEND[2] ,External Interrupt 60 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT60_PEND[1] ,External Interrupt 60 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x0 0. " EXT_INT60_PEND[0] ,External Interrupt 60 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x4 "EXT_INT61_PEND,External interrupt EXT_INT61 pending register"
|
|
bitfld.long 0x4 7. " EXT_INT61_PEND[7] ,External Interrupt 61 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x4 6. " EXT_INT61_PEND[6] ,External Interrupt 61 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT61_PEND[5] ,External Interrupt 61 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x4 4. " EXT_INT61_PEND[4] ,External Interrupt 61 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT61_PEND[3] ,External Interrupt 61 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x4 2. " EXT_INT61_PEND[2] ,External Interrupt 61 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT61_PEND[1] ,External Interrupt 61 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x4 0. " EXT_INT61_PEND[0] ,External Interrupt 61 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x8 "EXT_INT62_PEND,External interrupt EXT_INT62 pending register"
|
|
bitfld.long 0x8 7. " EXT_INT62_PEND[7] ,External Interrupt 62 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x8 6. " EXT_INT62_PEND[6] ,External Interrupt 62 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT62_PEND[5] ,External Interrupt 62 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x8 4. " EXT_INT62_PEND[4] ,External Interrupt 62 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT62_PEND[3] ,External Interrupt 62 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x8 2. " EXT_INT62_PEND[2] ,External Interrupt 62 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT62_PEND[1] ,External Interrupt 62 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x8 0. " EXT_INT62_PEND[0] ,External Interrupt 62 Pending 0" "Not occurred,Occurred"
|
|
line.long 0xC "EXT_INT63_PEND,External interrupt EXT_INT63 pending register"
|
|
bitfld.long 0xC 7. " EXT_INT63_PEND[7] ,External Interrupt 63 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0xC 6. " EXT_INT63_PEND[6] ,External Interrupt 63 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT63_PEND[5] ,External Interrupt 63 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0xC 4. " EXT_INT63_PEND[4] ,External Interrupt 63 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT63_PEND[3] ,External Interrupt 63 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0xC 2. " EXT_INT63_PEND[2] ,External Interrupt 63 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT63_PEND[1] ,External Interrupt 63 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0xC 0. " EXT_INT63_PEND[0] ,External Interrupt 63 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "EXT_INT64_PEND,External interrupt EXT_INT64 pending register"
|
|
bitfld.long 0x00 1. " EXT_INT64_PEND[1] ,External Interrupt 34 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT64_PEND[0] ,External Interrupt 34 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 21.
|
|
tree "External interrupt priority control"
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "EXT_INT_GRPPRI_XC,External interrupt group priority control register"
|
|
bitfld.long 0x00 0. " EXT_INT_GRPPRI ,Enables EXT_INT groups priority rotate enable" "Fixed,Enabled"
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "EXT_INT_PRIORITY_XC,External interrupt priority control registe"
|
|
bitfld.long 0x00 4. " EXT_INT64_PRI ,Enables EXT_INT group 5 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 3. " EXT_INT63_PRI ,Enables EXT_INT group 4 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 2. " EXT_INT62_PRI ,Enables EXT_INT group 3 priority rotate" "Fixed,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT61_PRI ,Enables EXT_INT group 2 priority rotate" "Fixed,Enabled"
|
|
bitfld.long 0x00 0. " EXT_INT60_PRI ,Enables EXT_INT group 1 priority rotate" "Fixed,Enabled"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XC,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "1,2,3,4,5,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XC,Current service pending register"
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++0x17
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XC,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--4. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,?..."
|
|
line.long 0x04 "EXT_INT60_FIXPRI,External interrupt 60 fixed priority control register"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT60" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "EXT_INT61_FIXPRI,External interrupt 61 fixed priority control register"
|
|
bitfld.long 0x08 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT61" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "EXT_INT62_FIXPRI,External interrupt 62 fixed priority control register"
|
|
bitfld.long 0x0C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT62" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT63_FIXPRI,External interrupt 63 fixed priority control register"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT63" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT64_FIXPRI,External interrupt 64 fixed priority control register"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT64" "0,1,?..."
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x03860000
|
|
width 15.
|
|
tree "GPZ"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPZCON,Port Group GPZ Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPZCON[6] ,GPZ Pin 6 Configuration" "Input,Output,I2S_0_SDO[2],ST_INT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[6]"
|
|
bitfld.long 0x00 20.--23. " GPZCON[5] ,GPZ Pin 5 Configuration" "Input,Output,I2S_0_SDO[1],ST_TICK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[5]"
|
|
bitfld.long 0x00 16.--19. " GPZCON[4] ,GPZ Pin 4 Configuration" "Input,Output,I2S_0_SDO[0],PCM_0_SOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[4]"
|
|
bitfld.long 0x00 12.--15. " GPZCON[3] ,GPZ Pin 3 Configuration" "Input,Output,I2S_0_SDI,PCM_0_SIN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPZCON[2] ,GPZ Pin 2 Configuration" "Input,Output,I2S_0_LRCK,PCM_0_FSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[2]"
|
|
bitfld.long 0x00 4.--7. " GPZCON[1] ,GPZ Pin 1 Configuration" "Input,Output,I2S_0_CDCLK,PCM_0_EXTCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[1]"
|
|
bitfld.long 0x00 0.--3. " GPZCON[0] ,GPZ Pin 0 Configuration" "Input,Output,I2S_0_SCLK,PCM_0_SCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPZDAT,Port Group GPZ Data Register"
|
|
bitfld.byte 0x00 6. " GPZDAT[6] ,GPZ Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPZDAT[5] ,GPZ Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPZDAT[4] ,GPZ Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPZDAT[3] ,GPZ Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPZDAT[2] ,GPZ Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPZDAT[1] ,GPZ Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPZDAT[0] ,GPZ Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPZPUD,Port Group GPZ Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPZPUD[6] ,GPZ Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPZPUD[5] ,GPZ Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPZPUD[4] ,GPZ Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPZPUD[3] ,GPZ Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZPUD[2] ,GPZ Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPZPUD[1] ,GPZ Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPZPUD[0] ,GPZ Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPZDRV,Port Group GPZ Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPZDRV[6] ,GPZ Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPZDRV[5] ,GPZ Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPZDRV[4] ,GPZ Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPZDRV[3] ,GPZ Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPZDRV[2] ,GPZ Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPZDRV[1] ,GPZ Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPZDRV[0] ,GPZ Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPZCONPDN,Port Group GPZ Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPZ[6] ,GPZ Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPZ[5] ,GPZ Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPZ[4] ,GPZ Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPZ[3] ,GPZ Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZ[2] ,GPZ Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPZ[1] ,GPZ Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPZ[0] ,GPZ Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPZPUDPDN,Port Group GPZ Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPZ[6] ,GPZ Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPZ[5] ,GPZ Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPZ[4] ,GPZ Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPZ[3] ,GPZ Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZ[2] ,GPZ Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPZ[1] ,GPZ Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPZ[0] ,GPZ Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "EXT_INT50_CON,External interrupt EXT_INT50 configuration register"
|
|
bitfld.long 0x00 24.--26. " EXT_INT50_CON[6] ,Setting the signaling method of EXT_INT50[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT50_CON[5] ,Setting the signaling method of EXT_INT50[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 16.--18. " EXT_INT50_CON[4] ,Setting the signaling method of EXT_INT50[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " EXT_INT50_CON[3] ,Setting the signaling method of EXT_INT50[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT50_CON[2] ,Setting the signaling method of EXT_INT50[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 4.--6. " EXT_INT50_CON[1] ,Setting the signaling method of EXT_INT50[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " EXT_INT50_CON[0] ,Setting the signaling method of EXT_INT50[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "EXT_INT50_FLTCON0,External interrupt EXT_INT50 filter configuration register 0"
|
|
bitfld.long 0x00 31. " FLTEN1[3] ,Filter Enable for EXT_INT50[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH10[3] ,Filtering width of EXT_INT50[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN1[2] ,Filter Enable for EXT_INT50[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[2] ,Filtering width of EXT_INT50[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[1] ,Filter Enable for EXT_INT50[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[1] ,Filtering width of EXT_INT50[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[0] ,Filter Enable for EXT_INT50[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[0] ,Filtering width of EXT_INT50[0]"
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "EXT_INT50_FLTCON1,External interrupt EXT_INT50 filter configuration register 1"
|
|
bitfld.long 0x00 23. " FLTEN1[6] ,Filter Enable for EXT_INT50[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[6] ,Filtering width of EXT_INT50[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[5] ,Filter Enable for EXT_INT50[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[5] ,Filtering width of EXT_INT50[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[4] ,Filter Enable for EXT_INT50[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[4] ,Filtering width of EXT_INT50[4]"
|
|
tree.end
|
|
width 20.
|
|
tree "External interrupt mask"
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "EXT_INT50_MASK,External interrupt EXT_INT50 mask register"
|
|
bitfld.long 0x00 6. " EXT_INT50_MASK[6] ,External Interrupt 50 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT50_MASK[5] ,External Interrupt 50 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT50_MASK[4] ,External Interrupt 50 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT50_MASK[3] ,External Interrupt 50 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT50_MASK[2] ,External Interrupt 50 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT50_MASK[1] ,External Interrupt 50 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT50_MASK[0] ,External Interrupt 50 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "EXT_INT50_PEND,External interrupt EXT_INT50 pending register"
|
|
bitfld.long 0x00 6. " EXT_INT50_PEND[6] ,External Interrupt 50 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " EXT_INT50_PEND[5] ,External Interrupt 50 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT50_PEND[4] ,External Interrupt 50 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT50_PEND[3] ,External Interrupt 50 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT50_PEND[2] ,External Interrupt 50 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT50_PEND[1] ,External Interrupt 50 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT50_PEND[0] ,External Interrupt 50 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 21.
|
|
tree "External interrupt priority control"
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "EXT_INT_GRPPRI_XD,External interrupt group priority control register"
|
|
bitfld.long 0x00 0. " EXT_INT_GRPPRI ,Enables EXT_INT groups priority rotate enable" "Fixed,Enabled"
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "EXT_INT_PRIORITY_XD,External interrupt priority control register"
|
|
bitfld.long 0x00 0. " EXT_INT50_PRI ,Enables EXT_INT group 1 priority rotate" "Fixed,Enabled"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XD,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "EXT_INT50,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XD,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++0x27
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XD,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--4. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,?..."
|
|
line.long 0x04 "EXT_INT50_FIXPRI,External interrupt 50 fixed priority control register"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT50" "0,1,2,3,4,5,6,?..."
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "Clock Controller"
|
|
base ad:0x10010000
|
|
width 13.
|
|
tree "Frequence & PLL Control"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "APLL_LOCK,Control PLL locking period for APLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "APPL_CON0,Control PLL output frequency for APLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring frequency select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV ,PLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV ,PLL S divide value" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "APLL_CON1,Control PLL AFC"
|
|
bitfld.long 0x04 21. " DCC_ENB ,Enables DCC" "Enabled,Disabled"
|
|
bitfld.long 0x04 20. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x04 16. " FEED_EN ,Enables pin for FEED_OUT" "Disabled,Enabled"
|
|
bitfld.long 0x04 14.--15. " LOCK_CON_OUT ,Lock detector setting of the output margin" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " LOCK_CON_IN ,Lock detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x04 8.--11. " LOCK_CON_DLY ,Lock detector setting of the detection resolution" "0,1,2,3,?..."
|
|
hexmask.long.byte 0x04 0.--4. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
tree.end
|
|
width 25.
|
|
tree "CPU CMU Control"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "CLK_SRC_CPU,Clock source for CMU_CPU"
|
|
bitfld.long 0x00 20. " MUX_HPM_SEL ,Control MUX_HPM" "MOUT_APLL,SCLK_MPLL"
|
|
bitfld.long 0x00 16. " MUX_CPU_SEL ,Control MUX_CPU" "MOUT_APLL,SCLK_MPLL"
|
|
bitfld.long 0x00 0. " MUX_APLL_SEL ,Control MUX_APLL" "XXTI,FOUT_APLL"
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_CPU,Clock MUX status for CMU_CPU"
|
|
bitfld.long 0x00 20.--22. " HPM_SEL ,Selection signal status of MUX_HPM" "Reserved,MOUT_APPL,SCLK_MPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " CPU_SEL ,Selection signal status of MUX_CPU" "Reserved,MOUT_APPL,SCLK_MPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " APLL_SEL ,Selection signal status of MUX_APLL" "Reserved,XXTI,FOUT_APLL,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x500++0x07
|
|
line.long 0x00 "CLK_DIV_CPU0,Clock divider ratio for CMU_CPU0"
|
|
bitfld.long 0x00 28.--30. " ARM2_RATIO ,DIV_ARM2 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " APLL_RATIO ,DIV_APLL clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " PCLK_DBG_RATIO ,DIV_PCLK_DBG clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ATB_RATIO ,DIV_ATB clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " PERIPH_RATIO ,DIV_PERIPH clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " ACP_RATIO ,DIV_ACP clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " CPUD_RATIO ,DIV_CPUD clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ARM_RATIO ,DIV_ARM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CLK_DIV_CPU1,Clock divider ratio for CMU_CPU1"
|
|
bitfld.long 0x04 4.--6. " HPM_RATIO ,DIV_HPM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " COPY_RATIO ,DIV_COPY clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x600++0x07
|
|
line.long 0x00 "CLK_DIV_STAT_CPU0,Clock divider status for CMU_CPU"
|
|
bitfld.long 0x00 28. " DIV_ARM2 ,DIV_ARM2 status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_APLL ,DIV_APLL status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_PCLK_DBG ,DIV_PCLK_DBG status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_ATB ,DIV_ATB status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_PERIPH ,DIV_PERIPH status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_ACP ,DIV_ACP status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DIV_CPUD ,DIV_CPUD status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_ARM ,DIV_ARM status" "Stable,Changing"
|
|
line.long 0x04 "CLK_DIV_STAT_CPU1,Clock divider status for CMU_CPU"
|
|
bitfld.long 0x04 4. " DIV_HPM ,DIV_HPM status" "Stable,Changing"
|
|
bitfld.long 0x04 0. " DIV_COPY ,DIV_COPY status" "Stable,Changing"
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "CLK_GATE_SCLK_CPU,Special clock gating for CMU_CPU control"
|
|
bitfld.long 0x00 0. " SCLK_HPM ,Gating SCLK_HPM" "Mask,Pass"
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CPU,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ," "APLL_FOUT,Reserved,Reserved,Reserved,ARMCLK,ACLK_CPUD,Reserved,ATCLK,PERIPHCLK,PCLK_DBG,SCLK_HPM,?..."
|
|
rgroup.long 0xA04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CPU_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIV_CLKOUT status" "Stable,Changing"
|
|
group.long 0x1000++0x07
|
|
line.long 0x00 "ARMCLK_STOPCTRL,ARM clock stop control register"
|
|
bitfld.long 0x00 4.--7. " POST_WAIT_CNT ,Clock freeze cycle after ARM clamp or resent signal transition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " PRE_WAIT_CNT ,Clock freeze cycle before ARM clamp or reset signal transition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 19.
|
|
tree "Parity & Power"
|
|
rgroup.long 0x1010++0x03
|
|
line.long 0x00 "PARITYFAIL_STATUS,PARITYFAIL status register"
|
|
bitfld.long 0x00 16.--17. " PARITYFAILSCU ,Parity output pin from SCU tag RAMs" "0,1,2,3"
|
|
bitfld.long 0x00 15. " PARITYFAIL1[7] ,CPU1 BTAC parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 14. " PARITYFAIL1[6] ,CPU1 GHB parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PARITYFAIL1[5] ,CPU1 Instruction tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 12. " PARITYFAIL1[4] ,CPU1 Instruction data RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 11. " PARITYFAIL1[3] ,CPU1 Main TLB parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PARITYFAIL1[2] ,CPU1 D outer RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 9. " PARITYFAIL1[1] ,CPU1 Data tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 8. " PARITYFAIL1[0] ,CPU1 Data RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARITYFAIL0[7] ,CPU0 BTAC parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 6. " PARITYFAIL0[6] ,CPU0 GHB parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 5. " PARITYFAIL0[5] ,CPU0 Instruction tag RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PARITYFAIL0[4] ,CPU0 Instruction data RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 3. " PARITYFAIL0[3] ,CPU0 Main TLB parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 2. " PARITYFAIL0[2] ,CPU0 D outer RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PARITYFAIL0[1] ,CPU0 Data tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 0. " PARITYFAIL0[0] ,CPU0 Data RAM parity error" "No parity fail,Parity fail"
|
|
group.long 0x1014++0x03
|
|
line.long 0x00 "PARITYFAIL_CLEAR,PARITYFAIL clear register"
|
|
bitfld.long 0x00 16.--17. " PARITYFAILSCU ,Parity output pin from SCU tag RAMs" "0,1,2,3"
|
|
bitfld.long 0x00 15. " PARITYFAIL1[7] ,CPU1 BTAC parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 14. " PARITYFAIL1[6] ,CPU1 GHB parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PARITYFAIL1[5] ,CPU1 Instruction tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 12. " PARITYFAIL1[4] ,CPU1 Instruction data RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 11. " PARITYFAIL1[3] ,CPU1 Main TLB parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PARITYFAIL1[2] ,CPU1 D outer RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 9. " PARITYFAIL1[1] ,CPU1 Data tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 8. " PARITYFAIL1[0] ,CPU1 Data RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARITYFAIL0[7] ,CPU0 BTAC parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 6. " PARITYFAIL0[6] ,CPU0 GHB parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 5. " PARITYFAIL0[5] ,CPU0 Instruction tag RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PARITYFAIL0[4] ,CPU0 Instruction data RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 3. " PARITYFAIL0[3] ,CPU0 Main TLB parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 2. " PARITYFAIL0[2] ,CPU0 D outer RAM parity error" "No parity fail,Parity fail"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PARITYFAIL0[1] ,CPU0 Data tag RAM parity error" "No parity fail,Parity fail"
|
|
bitfld.long 0x00 0. " PARITYFAIL0[0] ,CPU0 Data RAM parity error" "No parity fail,Parity fail"
|
|
width 10.
|
|
textline ""
|
|
group.long 0x1020++0x03
|
|
line.long 0x00 "PWR_CTRL,Power control register"
|
|
bitfld.long 0x00 28.--30. " ARM2_RATIO ,DIV_ARM2 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20. " CSCLK_AUTO_END_IN_DEBUG ,Force CoreSight clocks to toggle" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " ARM_RATIO ,DIV_ARM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DIV_ARM2_DOWN_ENB ,ARMCLK down feature for DIVCORE2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DIV_ARM_DOWN_ENB ,ARMCLK down feature for DIVCORE" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " USE_STANDBYWFE_ARM_CORE1 ,Use ARM CORE1 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " USE_STANDBYWFE_ARM_CORE0 ,Use ARM CORE0 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " USE_STANDBYWFI_ARM_CORE1 ,Use ARM CORE1 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " USE_STANDBYWFI_ARM_CORE0 ,Use ARM CORE0 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
group.long 0x1024++0x03
|
|
line.long 0x00 "PWR_CTRL2,Power control register 2"
|
|
bitfld.long 0x00 25. " DIV_ARM2_UP_ENB ,ARMCLK up feature when exiting from IDLE mode for DIV_ARM2" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIV_ARM_UP_ENB ,ARMCLK up feature when exiting from IDLE mode for DIV_ARM" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DUR_STANDBY2 ,Normal divider value from the middle divider value (duration)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " DUR_STANDBY1 ,Middle divider value from the ARM idle divider value (duration)"
|
|
bitfld.long 0x00 4.--6. " UP_ARM2_RATIO ,DIV_ARM2 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " UP_ARM_RATIO ,DIV_ARM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
width 16.
|
|
tree "APLL Control"
|
|
group.long 0x1100++0x03
|
|
line.long 0x00 "APLL_CON0_L8,APLL control (performance level-8)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1104++0x03
|
|
line.long 0x00 "APLL_CON0_L7,APLL control (performance level-7)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1108++0x03
|
|
line.long 0x00 "APLL_CON0_L6,APLL control (performance level-6)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x110C++0x03
|
|
line.long 0x00 "APLL_CON0_L5,APLL control (performance level-5)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1110++0x03
|
|
line.long 0x00 "APLL_CON0_L4,APLL control (performance level-4)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1114++0x03
|
|
line.long 0x00 "APLL_CON0_L3,APLL control (performance level-3)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1118++0x03
|
|
line.long 0x00 "APLL_CON0_L2,APLL control (performance level-2)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x111C++0x03
|
|
line.long 0x00 "APLL_CON0_L1,APLL control (performance level-1)"
|
|
bitfld.long 0x00 27. " FSEL ,APLL FSEL value" "0,1"
|
|
hexmask.long.word 0x00 16.--26. 1. " MDIV ,APLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , APLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , APLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1200++0x03
|
|
line.long 0x00 "APPL_CON1_L8,Control PLL AFC (performance level-8)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x1204++0x03
|
|
line.long 0x00 "APPL_CON1_L7,Control PLL AFC (performance level-7)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x1208++0x03
|
|
line.long 0x00 "APPL_CON1_L6,Control PLL AFC (performance level-6)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x120C++0x03
|
|
line.long 0x00 "APPL_CON1_L5,Control PLL AFC (performance level-5)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x1210++0x03
|
|
line.long 0x00 "APPL_CON1_L4,Control PLL AFC (performance level-4)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x1214++0x03
|
|
line.long 0x00 "APPL_CON1_L3,Control PLL AFC (performance level-3)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x1218++0x03
|
|
line.long 0x00 "APPL_CON1_L2,Control PLL AFC (performance level-2)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
group.long 0x121C++0x03
|
|
line.long 0x00 "APPL_CON1_L1,Control PLL AFC (performance level-1)"
|
|
bitfld.long 0x00 31. " AFC_ENB ,Disables/Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
tree.end
|
|
width 16.
|
|
tree "MPLL Control"
|
|
group.long 0x4000++0x03
|
|
line.long 0x00 "MPLL_LOCK,Control PLL locking period for MPLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x4100++0x07
|
|
line.long 0x00 "MPLL_CON0,Control MPLL output frequency for MPLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring frequency select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV ,PLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV ,PLL S divide value" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "MPLL_CON1,Control PLL AFC"
|
|
bitfld.long 0x04 21. " DCC_ENB ,Enables Duty Cycle Corrector" "Enabled,Disabled"
|
|
bitfld.long 0x04 20. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x04 16. " FEED_EN ,Enable pin for FEED_OUT" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " LOCK_CON_OUT ,Lock detector setting of the output margin" "0,1,2,3"
|
|
bitfld.long 0x04 12.--13. " LOCK_CON_IN ,Lock detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x04 8.--11. " LOCK_CON_DLY ,Lock detector setting of the detection resolution" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--4. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
tree.end
|
|
width 19.
|
|
tree "Clock Control"
|
|
group.long 0x4200++0x03
|
|
line.long 0x00 "CLK_SRC_CORE0,Select Clock Source for CMU_CORE (part1)"
|
|
bitfld.long 0x00 16.--19. " MUX_RSVD3_CORE_SEL ,Control MUX_RSVD3_CORE" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL,SCLK_EPLL,SCLK_VPLL,?..."
|
|
group.long 0x4204++0x03
|
|
line.long 0x00 "CLK_SRC_CORE1,Select Clock Source for CMU_CORE (part2)"
|
|
bitfld.long 0x00 8. " MUX_MPLL_SEL ,Control MUX_MPLL" "XXTI,MPLL_FOUT_RGT"
|
|
group.long 0x4300++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_CORE,Clock source Mask for DMC_BLK (CORE) "
|
|
bitfld.long 0x00 16. " RSVD3_CORE_MASK ,Mask output clock of MUX_RSVD3_CORE" "Masked,Unmasked"
|
|
rgroup.long 0x4404++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_CORE1,Clock MUX Status for CMU_CORE (part2)"
|
|
bitfld.long 0x00 8.--10. " MPLL_SEL ,Selection signal status of MUX_MPLL" "Reserved,XXTI,MPLL_FOUT_RGT,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x4500++0x03
|
|
line.long 0x00 "CLK_DIV_CORE0,Set Clock Divider ratio for CMU_CORE (part1) "
|
|
bitfld.long 0x00 20.--22. " COREP_RATIO ,DIV_COREP clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " CORED_RATIO ,DIV_CORED clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x4504++0x03
|
|
line.long 0x00 "CLK_DIV_CORE1,Set Clock Divider ratio for CMU_CORE (part2) "
|
|
hexmask.long.byte 0x00 24.--30. 1. " RSVD1_CORE_RATIO ,DIV_RSVD1_CORE clock divider Ratio"
|
|
hexmask.long.byte 0x00 16.--22. 1. " RSVD2_CORE_RATIO ,DIV_RSVD2_CORE clock divider Ratio"
|
|
bitfld.long 0x00 8.--11. " RSVD3_CORE_RATIO ,DIV_RSVD3_CORE clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x4508++0x03
|
|
line.long 0x00 "CLK_DIV_SYSRGT,Set Clock Divider ratio for CMU_CORE (part3)"
|
|
bitfld.long 0x00 8.--10. " ACLK_C2C_200_RATIO ,DIV_ACLK_C2C_200 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " C2C_CLK_400_RATIO ,DIV_C2C_CLK_400 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ACLK_R1BX_RATIO ,DIV_ACLK_R1BX clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x4600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_CORE0,Clock Divider Status for CMU_CORE (part1)"
|
|
bitfld.long 0x00 20. " DIV_COREP ,DIV_COREP status" "Stable,On changing"
|
|
bitfld.long 0x00 16. " DIV_CORED ,DIV_CORED status" "Stable,On changing"
|
|
rgroup.long 0x4604++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_CORE1,Clock Divider Status for CMU_CORE (part2) "
|
|
bitfld.long 0x00 24. " DIV_RSVD1_CORE ,DIV_RSVD1_CORE status" "Stable,On changing"
|
|
bitfld.long 0x00 16. " DIV_RSVD2_CORE ,DIV_RSVD2_CORE status" "Stable,On changing"
|
|
bitfld.long 0x00 8. " DIV_RSVD3_CORE ,DIV_RSVD3_CORE status" "Stable,On changing"
|
|
rgroup.long 0x4608++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_SYSRGT,Clock Divider Status for CMU_CORE (part3)"
|
|
bitfld.long 0x00 8. " DIV_ACLK_C2C_200 ,DIV_ACLK_C2C_200 status" "Stable,On changing"
|
|
bitfld.long 0x00 4. " DIV_C2C_CLK_400 ,DIV_C2C_CLK_400 status" "Stable,On changing"
|
|
bitfld.long 0x00 0. " DIV_ACLK_R1BX ,DIV_ACLK_R1BX status" "Stable,On changing"
|
|
group.long 0x4900++0x03
|
|
line.long 0x00 "CLK_GATE_IP_CORE,Control IP Clock Gating for DMC_BLK"
|
|
bitfld.long 0x00 23. " CLK_COREMEM ,Gating all Clocks for CoreMEM" "Masked,Passed"
|
|
bitfld.long 0x00 22. " CLK_ASYNC_ACPX ,Gating all Clocks for ASYNC_ACPX" "Masked,Passed"
|
|
bitfld.long 0x00 21. " CLK_GIC_IOP ,Gating all Clocks for GIC_IOP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CLK_GIC_CPU ,Gating all Clocks for GIC_CPU" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_INT_COMB_IOP ,Gating all Clocks for INT_COMB_IOP" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_INT_COMB_CPU ,Gating all Clocks for INT_COMB_CPU" "Masked,Passed"
|
|
textline ""
|
|
width 26.
|
|
group.long 0x4904++0x03
|
|
line.long 0x00 "CLK_GATE_IP_SYSRGT,Control IP Clock Gating for SYSRGT"
|
|
bitfld.long 0x00 1. " CLK_C2C ,Gating Special Clock for C2C_CLK" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_SFRCDREXP2 ,Gating all Clocks for AXI2APB_CDREXP2" "Masked,Passed"
|
|
rgroup.long 0x4910++0x03
|
|
line.long 0x00 "C2C_MONITOR,Monitoring for C2C "
|
|
bitfld.long 0x00 0.--3. " FSM_SEC_CURR_STATE ,Current State of C2C internal FSM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x4A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CORE,CLKOUT control register "
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " MUX_SEL ,MUX_SEL" "MPLL_FOUT_RGT,Reserved,Reserved,Reserved,Reserved,ACLK_CORED,ACLK_COREP,SCLK_PWI,ACLK_R1BX,C2C_CLK,?..."
|
|
group.long 0x4A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CORE_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIV_CLKOUT Status" "Stable,On changing"
|
|
group.long 0x6000++0x03
|
|
line.long 0x00 "C2C_CONFIG,C2C configurations"
|
|
bitfld.long 0x00 31. " CG ,Clock Gating" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " MO ,Master On" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 20.--29. 1. " FCLK_FREQ ,Function Clock Frequency"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " TXW ,Tx Width" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " RXW ,Rx Width" "0,1,2,3"
|
|
bitfld.long 0x00 15. " RSTn ,Reset" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MD ,Memory Done" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " RET_RSTn ,Retention Reset" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 3.--12. 1. " BASE_ADDRESS ,Base Address"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SIZE ,Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8500++0x03
|
|
line.long 0x00 "CLK_DIV_ACP,Set Clock Divider ratio for CMU_ACP "
|
|
bitfld.long 0x00 4.--6. " PCLK_ACP_RATIO ,DIV_ACP_PCLK Clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ACLK_ACP_RATIO ,DIV_ACP_ACLK Clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_ACP,Clock Divider Status for CMU_ACP"
|
|
bitfld.long 0x00 4. " DIV_PCLK_ACP ,DIV_ACP_PCLK status" "Stable,On changing"
|
|
bitfld.long 0x00 0. " DIV_ACLK_ACP ,DIV_ACP_ACLK status" "Stable,On changing"
|
|
group.long 0x8800++0x03
|
|
line.long 0x00 "CLK_GATE_IP_ACP,Control IP Clock Gating for DMC_BLK (ACP)"
|
|
bitfld.long 0x00 7. " CLK_SMMUG2D ,Gating all Clocks for SMMUG2D" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_SMMUSSS ,Gating all clocks for SMMUSSS" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_SMMUMDMA ,Gating all Clocks for SMMUMDMA" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_ID_REMAPPER ,Gating all Clocks for ID_REMAPPER" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_G2D ,Gating all Clocks for G2D" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_SSS ,Gating all Clocks for SSS" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_MDMA ,Gating all Clocks for MDMA" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_SECJTAG ,Gating all Clocks for SECJTAG" "Masked,Passed"
|
|
group.long 0x8900++0x03
|
|
line.long 0x00 "CLK_DIV_SYSLFT,Set clock Divider ratio for CMU_SYSLFT"
|
|
bitfld.long 0x00 8.--11. " EFCLK_SYSLFT_RATIO ,SYSLFT EFCLK clock divider ratio" "0,1,2,3,4,5,6,7,?..."
|
|
bitfld.long 0x00 4.--6. " PCLK_SYSLFT_RATIO ,SYSLFT PCLK clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ACLK_SYSLFT_RATIO ,SYSLFT ACLK clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8910++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_SYSLFT,Clock Divider Status for CMU_SYSLFT"
|
|
bitfld.long 0x00 8. " DIV_EFCLK_SYSLFT ,DIV_EFCLK_SYSLFT status" "Stable,On changing"
|
|
bitfld.long 0x00 4. " DIV_PCLK_SYSLFT ,DIV_PCLK_SYSLFT status" "Stable,On changing"
|
|
bitfld.long 0x00 0. " DIV_ACLK_SYSLFT ,DIV_ACLK_SYSLFT status" "Stable,On changing"
|
|
group.long 0x8920++0x03
|
|
line.long 0x00 "CLK_GATE_BUS_SYSLFT,Clock gating of clock for SYSLFT_BLK"
|
|
bitfld.long 0x00 16. " EFCLK ,Gating EFCLK clock for UFMC" "Masked,Passed"
|
|
group.long 0x8930++0x03
|
|
line.long 0x00 "CLK_GATE_IP_SYSLFT,Clock gating of clock for SYSLFT_IP"
|
|
bitfld.long 0x00 0. " CLK_SFRCDREXP1 ,Gating all Clocks for SFRCDREXP1" "Masked,Passed"
|
|
group.long 0x8A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ACP,CLKOUT Control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " MUX_SEL ,MUX_SEL" "SCLK_MPLL_LFT,ACLK_ACP,PCLK_ACP,ACLK_SYSLFT,PCLK_SYSLFT,EFCLK_SYSLFT,?..."
|
|
group.long 0x8A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ACP_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIV_CLKOUT Status" "Stable,On changing"
|
|
group.long 0x8A10++0x03
|
|
line.long 0x00 "UFMC_CONFIG,UFMC Configuration"
|
|
bitfld.long 0x00 0. " SFMC_MODE ,SFMC mode selection" "EF_NFCON,SFMC"
|
|
group.long 0xC300++0x03
|
|
line.long 0x00 "CLK_DIV_ISP0,Set clock Divider ratio for CMU_ISP (part1)"
|
|
bitfld.long 0x00 4.--6. " ISPDIV1_RATIO ,ACLK_DIV1 clock Divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ISPDIV0_RATIO ,ACLK_DIV0 clock Divider ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC304++0x03
|
|
line.long 0x00 "CLK_DIV_ISP1,Set clock Divider ratio for CMU_ISP (part2)"
|
|
bitfld.long 0x00 4.--6. " MCUISPDIV1_RATIO ,PCLKDBG_MCUISP clock Divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " MCUISPDIV0_RATIO ,ATCLK_MCUISP clock Divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC308++0x03
|
|
line.long 0x00 "CLK_DIV_ISP2,Set clock Divider ratio for CMU_ISP (part3)"
|
|
bitfld.long 0x00 0.--2. " MPWMDIV_RATIO ,SCLK_MPWM_ISP clock Divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC400++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_ISP0,Set clock Divider ratio for CMU_ISP (part1)"
|
|
bitfld.long 0x00 4. " DIV_ISPDIV1 ,DIV_ISPDIV1 status" "Stable,On changing"
|
|
bitfld.long 0x00 0. " DIV_ISPDIV0 ,DIV_ISPDIV0 status" "Stable,On changing"
|
|
group.long 0xC404++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_ISP1,Set clock Divider ratio for CMU_ISP (part2)"
|
|
bitfld.long 0x00 4. " DIV_MCUISPDIV1 ,DIV_MCUISPDIV1 status" "Stable,On changing"
|
|
bitfld.long 0x00 0. " DIV_MCUISPDIV0 ,DIV_MCUISPDIV0 status" "Stable,On changing"
|
|
group.long 0xC408++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_ISP2,Set clock Divider ratio for CMU_ISP (part3)"
|
|
bitfld.long 0x00 0. " DIV_MPWMIDV ,DIV_MPWMIDV status" "Stable,On changing"
|
|
group.long 0xC800++0x03
|
|
line.long 0x00 "CLK_GATE_IP_ISP0,Control IP Clock Gating for ISP_BLK (part1)"
|
|
bitfld.long 0x00 31. " CLK_UART_ISP ,Gating all Clocks for UART_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 30. " CLK_WDT_ISP ,Gating all Clocks for WDT_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 28. " CLK_PWM_ISP ,Gating all Clocks for PWM_ISP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CLK_MTCADC_ISP ,Gating all Clocks for MTCADC_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 26. " CLK_I2C1_ISP ,Gating all Clocks for I2C1_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 25. " CLK_I2C0_ISP ,Gating all Clocks for I2C0_ISP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CLK_MPWM_ISP ,Gating all Clocks for MPWM_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 23. " CLK_MCUCTL_ISP ,Gating all Clocks for MCUCTL_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 22. " CLK_INT_COMB_ISP ,Gating all Clocks for INT_COMB_ISP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLK_SMMU_MCUISP ,Gating all Clocks for SMMU_MCUISP" "Masked,Passed"
|
|
bitfld.long 0x00 12. " CLK_SMMU_SCALERP ,Gating all Clocks for SMMU_SCALERP" "Masked,Passed"
|
|
bitfld.long 0x00 11. " CLK_SMMU_SCALERC ,Gating all Clocks for SMMU_SCALERC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLK_SMMU_FD ,Gating all Clocks for SMMU_FD" "Masked,Passed"
|
|
bitfld.long 0x00 9. " CLK_SMMU_DRC ,Gating all Clocks for SMMU_DRC" "Masked,Passed"
|
|
bitfld.long 0x00 8. " CLK_SMMU_ISP ,Gating all Clocks for SMMU_ISP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLK_GICISP ,Gating all Clocks for GICISP" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_ARM9S_MICE ,Gating all Clocks for ARM9S_MICE" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_MCUISP ,Gating all Clocks for MCUISP" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_SCALERP ,Gating all Clocks for SCALERP" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_SCALERC ,Gating all Clocks for SCALERC" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_FD ,Gating all Clocks for FD" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_DRC ,Gating all Clocks for DRC" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_ISP ,Gating all Clocks for ISP" "Masked,Passed"
|
|
group.long 0xC804++0x03
|
|
line.long 0x00 "CLK_GATE_IP_ISP1,Control IP Clock Gating for ISP_BLK (part2)"
|
|
bitfld.long 0x00 13. " CLK_SPI1_ISP ,Gating all Clocks for SPI1_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 12. " CLK_SPI0_ISP ,Gating all Clocks for SPI0_ISP" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_SMMU3DNR ,Gating all Clocks for SMMU3DNR" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLK_SMMUDIS1 ,Gating all Clocks for SMMUDIS1" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_SMMUDIS0 ,Gating all Clocks for SMMUDIS0" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_SMMUODC ,Gating all Clocks for SMMUODC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_3DNR ,Gating all Clocks for 3DNR" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_DIS ,Gating all Clocks for DIS" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_ODC ,Gating all Clocks for ODC" "Masked,Passed"
|
|
group.long 0xC900++0x03
|
|
line.long 0x00 "CLK_GATE_SCLK_ISP,Control Special Clock Gating for ISP_BLK"
|
|
bitfld.long 0x00 0. " SCLK_MPWM_ISP ,Gating all Clocks for MPWM_ISP" "Masked,Passed"
|
|
group.long 0xC910++0x03
|
|
line.long 0x00 "CSCLK_AUTO_ENB_IN_DEBUG,Power Control register"
|
|
bitfld.long 0x00 0. " ENB_CLKOUT ,Force CoreSight Clocks to toggle when debugger is attached" "Disabled,Enabled"
|
|
group.long 0xCA00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ISP,CLKOUT Control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide Ratio"
|
|
bitfld.long 0x00 0.--2. " MUX_SEL ,MUX_SEL" "ACLK_266,ACLK_DIV0,ACLK_DIV1,SCLK_MPWM_ISP,?..."
|
|
group.long 0xCA04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ISP_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIV_CLKOUT Status" "Stable,On changing"
|
|
tree.end
|
|
width 12.
|
|
tree "VPLL,GPLL,CPLL,EPLL Control"
|
|
group.long 0x10020++0x03
|
|
line.long 0x00 "CPLL_LOCK,Control PLL Locking period for CPLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x10030++0x03
|
|
line.long 0x00 "EPLL_LOCK,Control PLL Locking period for EPLL "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x10040++0x03
|
|
line.long 0x00 "VPLL_LOCK,Control PLL Locking period for VPLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x10050++0x03
|
|
line.long 0x00 "GPLL_LOCK,Control PLL Locking period for GPLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x10120++0x03
|
|
line.long 0x00 "CPLL_CON0 ,Control PLL output frequency for CPLL (part1) "
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL Locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring Frequency Select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
bitfld.long 0x00 8.--13. " PDIV , PLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV , PLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10124++0x03
|
|
line.long 0x00 "CPLL_CON1 ,Control PLL output frequency for CPLL (part2) "
|
|
bitfld.long 0x00 21. " DCC_ENB ,Enables Duty Cycle Corrector" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " FEED_EN ,Enable pin for FEED_OUT" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " LOCK_CON_OUT ,Lock detector setting of the output margin" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " LOCK_CON_IN ,Lock detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " LOCK_CON_DLY ,Lock detector setting of the detection resolution" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--4. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
group.long 0x10130++0x03
|
|
line.long 0x00 "EPLL_CON0 ,Control PLL output frequency for EPLL (part1) "
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 31. " LOCKED ,PLL Locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring Frequency Select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
hexmask.long.byte 0x00 8.--13. 1. " PDIV , PLL P divide value"
|
|
hexmask.long.byte 0x00 0.--2. 1. " SDIV , PLL S divide value"
|
|
group.long 0x10134++0x03
|
|
line.long 0x00 "EPLL_CON1 ,Control PLL output frequency for EPLL (part2) "
|
|
hexmask.long.word 0x00 0.--15. 1. " K , Value of 16-bit DSM"
|
|
group.long 0x10138++0x03
|
|
line.long 0x00 "EPLL_CON2 ,Control PLL output frequency for EPLL (part3) "
|
|
hexmask.long.byte 0x00 8.--12. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
bitfld.long 0x00 7. " DCC_ENB ,Enables Duty Cycle Corrector" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SSCG_EN ,Enable pin for dithered mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FVCO_EN ,Enable pin for FVCO_OUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FSEL ,Pin Selection for monitoring purposes" "FREF,FEED"
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|
group.long 0x10140++0x03
|
|
line.long 0x00 "VPLL_CON0 ,Control PLL output frequency for VPLL (part1) "
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 31. " LOCKED ,PLL Locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring Frequency Select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
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|
hexmask.long.byte 0x00 8.--13. 1. " PDIV , PLL P divide value"
|
|
hexmask.long.byte 0x00 0.--2. 1. " SDIV , PLL S divide value"
|
|
group.long 0x10144++0x03
|
|
line.long 0x00 "VPLL_CON1 ,Control PLL output frequency for VPLL (part2) "
|
|
bitfld.long 0x00 29.--30. " SEL_PF ,Value of 2-bit modulation method control" "Down spread,Up spread,Center spread,Center spread"
|
|
hexmask.long.byte 0x00 24.--28. 1. " MRR ,Value of 5-bit Modulation Rate Contro"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MFR ,Value of 8-bit Modulation Frequency Control"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " K ,Value of 16-bit Delta Sigma Modulator"
|
|
group.long 0x10148++0x03
|
|
line.long 0x00 "VPLL_CON2 ,Control PLL output frequency for VPLL (part3) "
|
|
hexmask.long.byte 0x00 8.--12. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
bitfld.long 0x00 7. " DCC_ENB ,Enables Duty Cycle Corrector" "Enabled,Disabled"
|
|
bitfld.long 0x00 6. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SSCG_EN ,Enable pin for dithered mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FVCO_EN ,Enable pin for FVCO_OUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FSEL ,Pin Selection for monitoring purposes" "FREF,FEED"
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|
group.long 0x10150++0x03
|
|
line.long 0x00 "GPLL_CON0 ,Control PLL output frequency for GPLL (part1) "
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 31. " LOCKED ,PLL Locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring Frequency Select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
hexmask.long.byte 0x00 8.--13. 1. " PDIV , PLL P divide value"
|
|
hexmask.long.byte 0x00 0.--2. 1. " SDIV , PLL S divide value"
|
|
group.long 0x10154++0x03
|
|
line.long 0x00 "GPLL_CON1 ,Control PLL output frequency for GPLL (part2) "
|
|
bitfld.long 0x00 21. " DCC_ENB ,Enables Duty Cycle Corrector" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " AFC_ENB ,Enables AFC" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " FEED_EN ,Enable pin for FEED_OUT" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " LOCK_CON_OUT ,Lock detector setting of the output margin" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " LOCK_CON_IN ,Lock detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " LOCK_CON_DLY ,Lock detector setting of the detection resolution" "0,1,2,3,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--4. " EXTAFC ,Enable pin for FVCO_OUT"
|
|
tree.end
|
|
width 22.
|
|
tree "Clock Source Control"
|
|
group.long 0x10210++0x03
|
|
line.long 0x00 "CLK_SRC_TOP0,Select Clock Source for CMU_TOP (part1)"
|
|
bitfld.long 0x00 25. " MUX_ACLK_300_GSCL_SEL ,Control MUX_ACLK_300" "MUX_ACLK_300_GSCL_MID,MUX_ACLK_300_GSCL_MID1"
|
|
bitfld.long 0x00 24. " MUX_ACLK_300_GSCL_MID_SEL ,Control MUX_ACLK_300_GSCL_MID" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MUX_ACLK_400_G3D_MID_SEL ,Control MUX_ACLK_400" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
bitfld.long 0x00 16. " MUX_ACLK_333_SEL ,Control MUX_ACLK_333" "SCLK_CPLL,SCLK_MPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MUX_ACLK_300_DISP1_SEL ,Control MUX_ACLK_300" "MUX_ACLK_300_DISP1_MID,MUX_ACLK_300_DISP1_MID1"
|
|
bitfld.long 0x00 14. " MUX_ACLK_300_DISP1_MID_SEL ,Control MUX_ACLK_300_DISP1_MID" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MUX_ACLK_200_SEL ,Control MUX_ACLK_200" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
bitfld.long 0x00 8. " MUX_ACLK_166_SEL ,Control MUX_ACLK_166" "SCLK_CPLL,SCLK_MPLL_USER"
|
|
group.long 0x10214++0x03
|
|
line.long 0x00 "CLK_SRC_TOP1,Select Clock Source for CMU_TOP (part2)"
|
|
bitfld.long 0x00 28. " MUX_ACLK_400_G3D_SEL ,Control MUX_ACLK_400_G3D" "MUX_ACLK_400_G3D_MID,SCLK_GPLL"
|
|
bitfld.long 0x00 24. " MUX_ACLK_400_ISP_SEL ,Control MUX_ACLK_400_ISP" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MUX_ACLK_400_IOP_SEL ,Control MUX_ACLK_400_IOP" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
bitfld.long 0x00 16. " MUX_ACLK_MIPI_HSI_TXBASE_SEL ,Control MUX_ACLK_MIPI_HSI_TXBASE" "SCLK_CPLL,SCLK_MPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MUX_ACLK_300_GSCL_MID1_SEL ,Control MUX_ACLK_300_GSCL_MID1" "SCLK_VPLL,SCLK_CPLL"
|
|
bitfld.long 0x00 8. " MUX_ACLK_300_DISP1_MID1_SEL ,Control MUX_ACLK_300_DISP1_MID1" "SCLK_VPLL,SCLK_CPLL"
|
|
group.long 0x10218++0x03
|
|
line.long 0x00 "CLK_SRC_TOP2,Select Clock Source for CMU_TOP (part3)"
|
|
bitfld.long 0x00 28. " MUX_GPLL_SEL ,Control MUX_GPLL_USER" "XXTI,FOUT_GPLL"
|
|
bitfld.long 0x00 24. " MUX_BPLL_USER_SEL ,Control MUX_BPLL_USER" "XXTI,MOUT_BPLL"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MUX_MPLL_USER_SEL ,Control MUX_MPLL_USER" "XXTI,MOUT_MPLL"
|
|
bitfld.long 0x00 16. " MUX_VPLL_SEL ,Control MUX_VPLL" "XXTI,FOUT_VPLL"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MUX_EPLL_SEL ,Control MUX_EPLL" "XXTI,FOUT_EPLL"
|
|
bitfld.long 0x00 8. " MUX_CPLL_SEL ,Control MUX_CPLL" "XXTI,FOUT_CPLL"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VPLLSRC_SEL ,Control MUX_VPLLSRC" "XXTI,SCLK_HDMI24M"
|
|
group.long 0x1021C++0x03
|
|
line.long 0x00 "CLK_SRC_TOP3,Select Clock Source for CMU_TOP (part4)"
|
|
bitfld.long 0x00 24. " MUX_ACLK_333_SUB_SEL ,Control MUX_ACLK_333_SUB" "XXTI,ACLK_333"
|
|
bitfld.long 0x00 20. " MUX_ACLK_400_ISP_SUB_SEL ,Control MUX_ACLK_400_ISP_SUB" "XXTI,ACLK_400_ISP"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MUX_ACLK_266_ISP_SUB_SEL ,Control MUX_ACLK_266_ISP_SUB" "XXTI,ACLK_266_ISP"
|
|
bitfld.long 0x00 10. " MUX_ACLK_300_GSCL_SUB_SEL ,Control MUX_ACLK_300_GSCL_SUB" "XXTI,ACLK_300_GSCL"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MUX_ACLK_266_GSCL_SUB_SEL ,Control MUX_ACLK_266_GSCL_SUB" "XXTI,ACLK_266_GSCL"
|
|
bitfld.long 0x00 6. " MUX_ACLK_300_DISP1_SUB_SEL ,Control MUX_ACLK_300_DISP1_SUB" "XXTI,ACLK_300_DISP1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MUX_ACLK_200_DISP1_SUB_SEL ,Control MUX_ACLK_200_DISP1_SUB" "XXTI,ACLK_200_DISP1"
|
|
group.long 0x10220++0x03
|
|
line.long 0x00 "GSCL_WRAP_B_SEL,Control MUX_GSCL_WRAP_B"
|
|
bitfld.long 0x00 28.--31. " GSCL_WRAP_B_SEL ,Control MUX_GSCL_WRAP_B" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
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|
bitfld.long 0x00 24.--27. " GSCL_WRAP_A_SEL ,Control MUX_GSCL_WRAP_A" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CAM0_SEL ,Control MUX_CAM0" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 12.--15. " CAM_BAYER_SEL ,Control MUX_CAM_BAYER" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x1022C++0x03
|
|
line.long 0x00 "CLK_SRC_DISP1_0,Select Clock Source for DISP1_BLK (part1)"
|
|
bitfld.long 0x00 20. " HDMI_SEL ,Control MUX_HDMI" "SCLK_PIXEL,SCLK_HDMIPHY"
|
|
bitfld.long 0x00 16.--19. " DP1_EXT_MST_VID_SEL ,Control MUX_DP1_EXT_MST_VID" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MIPI1_SEL ,Control MUX_MIPI1" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 0.--3. " FIMD1_SEL ,Control MUX_FIMD1" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10240++0x03
|
|
line.long 0x00 "CLK_SRC_MAU,Select Clock Source for MAUDIO_BLK"
|
|
bitfld.long 0x00 0.--3. " AUDIO0_SEL ,Control MUX_AUDIO0" "AUDIOCDCLK0,XTIPLL,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10244++0x03
|
|
line.long 0x00 "CLK_SRC_FSYS,Select Clock Source for FSYS_BLK"
|
|
bitfld.long 0x00 28. " USBDRD30_SEL ,Control MUX_USBDRD30" "SCLK_MPLL_USER,SCLK_CPLL"
|
|
bitfld.long 0x00 24. " SATA_SEL ,Control MUX_SATA" "SCLK_MPLL_USER,SCLK_BPLL_USER"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MMC3_SEL ,Control MUX_MMC3" "XXTI,SCLK_GPLL,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_BPLL_USER,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 8.--11. " MMC2_SEL ,Control MUX_MMC2" "XXTI,SCLK_GPLL,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_BPLL_USER,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MMC1_SEL ,Control MUX_MMC1" "XXTI,SCLK_GPLL,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_BPLL_USER,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 0.--3. " MMC0_SEL ,Control MUX_MMC0" "XXTI,SCLK_GPLL,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_BPLL_USER,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10248++0x03
|
|
line.long 0x00 "CLK_SRC_GEN,Select Clock Source for GEN_BLK"
|
|
bitfld.long 0x00 0.--3. " JPEG_SEL ,Control MUX_JPEG" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10250++0x03
|
|
line.long 0x00 "CLK_SRC_PERIC0,Select Clock Source for connectivity IPs (part1)"
|
|
bitfld.long 0x00 24.--27. " PWM_SEL ,Control MUX_PWM" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 12.--15. " UART3_SEL ,Control MUX_UART3" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " UART2_SEL ,Control MUX_UART2" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 4.--7. " UART1_SEL ,Control MUX_UART1" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " UART0_SEL ,Control MUX_UART0" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10254++0x03
|
|
line.long 0x00 "CLK_SRC_PERIC1,Select Clock Source for connectivity IPs (part2)"
|
|
bitfld.long 0x00 24.--27. " SPI2_SEL ,Control MUX_SPI2" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 20.--23. " SPI1_SEL ,Control MUX_SPI1" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " SPI0_SEL ,Control MUX_SPI0" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 8.--9. " SPDIF_SEL ,Control MUX_SPDIF" "SCLK_AUDIO0,SCLK_AUDIO1,SCLK_AUDIO2,SPDIF_EXTCLK"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " AUDIO2_SEL ,Control MUX_AUDIO2" "AUDIOCDCLK2,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 0.--3. " AUDIO1_SEL ,Control MUX_AUDIO1" "AUDIOCDCLK1,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
group.long 0x10270++0x03
|
|
line.long 0x00 "SCLK_SRC_ISP,Select Special Clock source for IPs in ISP_BLK"
|
|
bitfld.long 0x00 12.--15. " PWM_ISP_SEL ,Control MUX_PWM_ISP" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 8.--11. " UART_ISP_SEL ,Control MUX_UART_ISP" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SPI1_ISP_SEL ,Control MUX_SPI1" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
bitfld.long 0x00 0.--3. " SPI0_ISP_SEL ,Control MUX_SPI0" "XXTI,XXTI,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBHOST20PHY,SCLK_HDMIPHY,SCLK_MPLL_USER,SCLK_EPLL,SCLK_VPLL,SCLK_CPLL,?..."
|
|
width 22.
|
|
group.long 0x10310++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_TOP,Clock Source Mask for CMU_TOP"
|
|
bitfld.long 0x00 0. " VPLLSRC_MASK ,Masks output clock of MUX_VPLLSRC" "Masked,Unmasked"
|
|
group.long 0x10320++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_GSCL,Clock Source Mask for GSCL_BLK"
|
|
bitfld.long 0x00 28. " GSCL_WRAP_B_MASK ,Masks output clock of MUX_GSCL_WRAP_B" "Masked,Unmasked"
|
|
bitfld.long 0x00 24. " GSCL_WRAP_A_MASK ,Masks output clock of MUX_GSCL_WRAP_A" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CAM0_MASK ,Masks output clock of MUX_CAM0" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " CAM_BAYER_MASK ,Masks output clock of MUX_CAM_BAYER" "Masked,Unmasked"
|
|
group.long 0x1032C++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_DISP1_0,Clock Source Mask for DISP1_BLK (part1)"
|
|
bitfld.long 0x00 20. " HDMI_MASK ,Masks output clock of MUX_HDMI" "Masked,Unmasked"
|
|
bitfld.long 0x00 16. " DP1_EXT_MST_VID_MASK ,Masks output clock of MUX_DP1_EXT_MST_VID" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MIPI1_MASK ,Masks output clock of MUX_MIPI1" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " FIMD1_MASK ,Masks output clock of MUX_FIMD1" "Masked,Unmasked"
|
|
group.long 0x10334++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_MAU,Clock Source Mask for MAUDIO_BLK"
|
|
bitfld.long 0x00 0. " AUDIO0_MASK ,Masks output clock of MUX_AUDIO0" "Masked,Unmasked"
|
|
group.long 0x10340++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_FSYS,Clock Source Mask for FSYS_BLK"
|
|
bitfld.long 0x00 28. " USBDRD30_MASK ,Masks output clock of MUX_USBDRD30" "Masked,Unmasked"
|
|
bitfld.long 0x00 24. " SATA_MASK ,Masks output clock of MUX_SATA" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " MMC3_MASK ,Masks output clock of MUX_MMC3" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MMC2_MASK ,Masks output clock of MUX_MMC2" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " MMC1_MASK ,Masks output clock of MUX_MMC1" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " MMC0_MASK ,Masks output clock of MUX_MMC0" "Masked,Unmasked"
|
|
group.long 0x10344++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_GEN,Clock Source Mask for GEN_BLK"
|
|
bitfld.long 0x00 0. " JPEG_MASK ,Masks output clock of MUX_JPEG" "Masked,Unmasked"
|
|
group.long 0x10350++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_PERIC0,Clock Source Mask for PERIC_BLK"
|
|
bitfld.long 0x00 24. " PWM_MASK ,Masks output clock of MUX_PWM" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " UART3_MASK ,Masks output clock of MUX_UART3" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " UART2_MASK ,Masks output clock of MUX_UART2" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART1_MASK ,Masks output clock of MUX_UART1" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " UART0_MASK ,Masks output clock of MUX_UART0" "Masked,Unmasked"
|
|
group.long 0x10354++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_PERIC1,Clock Source Mask for PERIC_BLK"
|
|
bitfld.long 0x00 24. " SPI2_MASK ,Masks output clock of MUX_SPI2" "Masked,Unmasked"
|
|
bitfld.long 0x00 20. " SPI1_MASK ,Masks output clock of MUX_SPI1" "Masked,Unmasked"
|
|
bitfld.long 0x00 16. " SPI0_MASK ,Masks output clock of MUX_SPI0" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SPDIF_MASK ,Masks output clock of MUX_SPDIF" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " AUDIO2_MASK ,Masks output clock of MUX_AUDIO2" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " AUDIO1_MASK ,Masks output clock of MUX_AUDIO1" "Masked,Unmasked"
|
|
group.long 0x10370++0x03
|
|
line.long 0x00 "SCLK_SRC_MASK_ISP,Special lock Source Mask for ISP_BLK"
|
|
bitfld.long 0x00 12. " PWM_ISP_MASK ,Masks output clock of MUX_PWM_ISP" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " UART_ISP_MASK ,Masks output clock of MUX_UART_ISP" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " SPI1_ISP_MASK ,Masks output clock of MUX_SPI1_ISP" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SPI0_ISP_MASK ,Masks output clock of MUX_SPI0_ISP" "Masked,Unmasked"
|
|
tree.end
|
|
width 25.
|
|
tree "Clock MUX Status"
|
|
rgroup.long 0x10410++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_TOP0,Clock MUX Status for CM_TOP (part1)"
|
|
bitfld.long 0x00 28.--30. " ACLK_300_GSCL_MID_SEL ,Selection signal status of MUX_ACLK_300_GSCL_MID" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 24.--26. " ACLK_300_GSCL_SEL ,Selection signal status of MUX_ACLK_300" "Reserved,ACLK_300_GSCL_MID,ACLK_300_GSCL_MID1,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " ACLK_400_G3D_MID_SEL ,Selection signal status of MUX_ACLK_400_G3D_MID" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " ACLK_333_SEL ,Selection signal status of MUX_ACLK_333" "Reserved,SCLK_CPLL,SCLK_MPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " ACLK_200_SEL ,Selection signal status of MUX_ACLK_200" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 8.--10. " ACLK_166_SEL ,Selection signal status of MUX_ACLK_166" "Reserved,SCLK_CPLL,SCLK_MPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " ACLK_300_DISP1_MID_SEL ,Selection signal status of MUX_ACLK_300_DISP1_MID" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " ACLK_300_DISP1_SEL ,Selection signal status of MUX_ACLK_300_DISP1" "Reserved,ACLK_300_DISP1_MID,ACLK_300_DISP1_MID1,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0x10414++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_TOP1,Clock MUX Status for CM_TOP (part2)"
|
|
bitfld.long 0x00 28.--30. " ACLK_400_G3D_SEL ,Selection signal status of MUX_ACLK_400_G3D" "Reserved,MUX_ACLK_400_G3D_MID,MUX_ACLK_400_G3D_MID1,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 24.--26. " ACLK_400_ISP_SEL ,Selection signal status of MUX_ACLK_400_ISP" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " ACLK_400_IOP_SEL ,Selection signal status of MUX_ACLK_400_IOP" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " ACLK_MIPI_HSI_TXBASE_SEL ,Selection signal status of MUX_ACLK_MIPI_HSI_TXBASE" "Reserved,SCLK_MPLL_USER,SCLK_BPLL_USER,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " ACLK_300_GSCL_MID1_SEL ,Selection signal status of MUX_ACLK_300_GSCL_MID1" "Reserved,SCLK_VPLL,SCLK_CPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 8.--10. " ACLK_300_DISP1_MID1_SEL ,Selection signal status of MUX_ACLK_300_DISP1_MID1" "Reserved,SCLK_VPLL,SCLK_CPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0x10418++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_TOP2,Clock MUX Status for CM_TOP (part3)"
|
|
bitfld.long 0x00 28.--30. " GPLL_SEL ,Selection signal status of MUX_GPLL" "Reserved,XXTI,FOUT_GPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 24.--26. " BPLL_USER_SEL ,Selection signal status of MUX_BPLL_USER" "Reserved,XXTI,SCLK_BPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " MPLL_USER_SEL ,Selection signal status of MUX_MPLL_USER" "Reserved,XXTI,SCLK_MPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " VPLL_SEL ,Selection signal status of MUX_VPLL" "Reserved,XXTI,FOUT_VPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " EPLL_SEL ,Selection signal status of MUX_EPLL" "Reserved,XXTI,FOUT_EPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 8.--10. " CPLL_SEL ,Selection signal status of MUX_CPLL" "Reserved,XXTI,FOUT_CPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0x1041C++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_TOP3,Clock MUX Status for CM_TOP (part4)"
|
|
bitfld.long 0x00 28.--30. " ACLK_300_GSCL_SUB_SEL ,Selection signal status of MUX_ACLK_300_GSCL" "Reserved,XXTI,ACLK_300_GSCL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 24.--26. " ACLK_333_SUB_SEL ,Selection signal status of MUX_ACLK_333_SUB" "Reserved,XXTI,ACLK_333,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " ACLK_400_ISP_SUB_SEL ,Selection signal status of MUX_ACLK_400_ISP_SUB" "Reserved,XXTI,ACLK_400_ISP,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " ACLK_266_ISP_SUB_SEL ,Selection signal status of MUX_ACLK_266_ISP_SUB" "Reserved,XXTI,ACLK_266_ISP,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " ACLK_266_GSCL_SUB_SEL ,Selection signal status of MUX_ACLK_266_GSCL_SUB" "Reserved,XXTI,ACLK_266_GSCL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " ACLK_200_DISP1_SUB_SEL ,Selection signal status of MUX_ACLK_200_DISP1_SUB" "Reserved,XXTI,ACLK_200_DISP1,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " ACLK_300_DISP1_SUB_SEL ,Selection signal status of MUX_ACLK_300_DISP1_SUB" "Reserved,XXTI,ACLK_300_DISP1,Reserved,On changing,On changing,On changing,On changing"
|
|
tree.end
|
|
width 20.
|
|
tree "Clock Divider Control"
|
|
group.long 0x10510++0x03
|
|
line.long 0x00 "CLK_DIV_TOP0,Set Clock Divider ratio for CMU_TOP (part1)"
|
|
bitfld.long 0x00 28.--30. " ACLK_300_DISP1_RATIO ,DIV_ACLK_300_DISP1 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " ACLK_400_G3D_RATIO ,DIV_ACLK_400_G3D clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " ACLK_333_RATIO ,DIV_ACLK_333 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ACLK_266_RATIO ,DIV_ACLK_266 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " ACLK_200_RATIO ,DIV_ACLK_200 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " ACLK_166_RATIO ,DIV_ACLK_166 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " ACLK_66_RATIO ,DIV_ACLK_66 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10514++0x03
|
|
line.long 0x00 "CLK_DIV_TOP1,Set Clock Divider ratio for CMU_TOP (part2)"
|
|
bitfld.long 0x00 28.--30. " ACLK_MIPI_HSI_TXBASE_RATIO ,DIV_ACLK_MIPI_HSI_TXBASE clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " ACLK_66_PRE_RATIO ,DIV_ACLK_66_PRE clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " ACLK_400_ISP_RATIO ,DIV_ACLK_400_ISP clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ACLK_400_IOP_RATIO ,DIV_ACLK_400_IOP clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " ACLK_300_GSCL_RATIO ,DIV_ACLK_300_GSCL clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10520++0x03
|
|
line.long 0x00 "CLK_DIV_GSCL,Set Clock Divider ratio for GSCL_BLK"
|
|
bitfld.long 0x00 28.--31. " GSCL_WRAP_B_RATIO ,DIV_GSCL_WRAP_B clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " GSCL_WRAP_A_RATIO ,DIV_GSCL_WRAP_A clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " CAM0_RATIO ,DIV_CAM0 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CAM_BAYER_RATIO ,DIV_CAM_BAYER clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1052C++0x03
|
|
line.long 0x00 "CLK_DIV_DISP1_0,Set Clock Divider ratio for DISP1_BLK (part1)"
|
|
bitfld.long 0x00 28.--31. " HDMI_PIXEL_RATIO ,DIV_HDMI_PIXEL clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " DP1_EXT_MST_VID_RATIO ,DIV_DP1_EXT_MST_VID clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " MIPI1_PRE_RATIO ,DIV_MIPI1_PRE clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MIPI1_RATIO ,DIV_MIPI1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FIMD1_RATIO ,DIV_FIMD1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1053C++0x03
|
|
line.long 0x00 "CLK_DIV_GEN,Set Clock Divider ratio for GEN_BLK"
|
|
bitfld.long 0x00 4.--7. " JPEG_RATIO ,DIV_JPEG clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10544++0x03
|
|
line.long 0x00 "CLK_DIV_MAU,Set Clock Divider ratio for MAUDIO_BLK"
|
|
hexmask.long.byte 0x00 4.--11. 1. " PCM0_RATIO ,DIV_PCM0 clock divider Ratio"
|
|
bitfld.long 0x00 0.--3. " AUDIO0_RATIO ,DIV_AUDIO0 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10548++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS0,Set Clock Divider ratio for FSYS_BLK (part1)"
|
|
bitfld.long 0x00 24.--27. " USBDRD30_RATIO ,DIV_USBDRD30 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SATA_RATIO ,DIV_SATA clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1054C++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS1,Set Clock Divider ratio for FSYS_BLK (part2)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MMC1_PRE_RATIO ,DIV_MMC1_PRE clock divider Ratio"
|
|
bitfld.long 0x00 16.--19. " MMC1_RATIO ,DIV_MMC1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMC0_PRE_RATIO ,DIV_MMC0_PRE clock divider Ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MMC0_RATIO ,DIV_MMC0 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10550++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS2,Set Clock Divider ratio for FSYS_BLK (part3)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MMC3_PRE_RATIO ,DIV_MMC3_PRE clock divider Ratio"
|
|
bitfld.long 0x00 16.--19. " MMC3_RATIO ,DIV_MMC3 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMC2_PRE_RATIO ,DIV_MMC2_PRE clock divider Ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MMC2_RATIO ,DIV_MMC2 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10558++0x03
|
|
line.long 0x00 "CLK_DIV_PERIC0,Set Clock Divider ratio for PERIC_BLK (part1)"
|
|
bitfld.long 0x00 12.--15. " UART3_RATIO ,DIV_UART3 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " UART2_RATIO ,DIV_UART2 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " UART1_RATIO ,DIV_UART1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " UART0_RATIO ,DIV_UART0 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1055C++0x03
|
|
line.long 0x00 "CLK_DIV_PERIC1,Set Clock Divider ratio for PERIC_BLK (part2)"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SPI1_PRE_RATIO ,DIV_SPI1_PRE clock divider Ratio"
|
|
bitfld.long 0x00 16.--19. " SPI1_RATIO ,DIV_SPI1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SPI0_PRE_RATIO ,DIV_SPI0_PRE clock divider Ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SPI0_RATIO ,DIV_SPI0 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10560++0x03
|
|
line.long 0x00 "CLK_DIV_PERIC2,Set Clock Divider ratio for PERIC_BLK (part3)"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SPI2_PRE_RATIO ,DIV_SPI2_PRE clock divider Ratio"
|
|
bitfld.long 0x00 0.--3. " SPI2_RATIO ,DIV_SPI2 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10568++0x03
|
|
line.long 0x00 "CLK_DIV_PERIC4,Set Clock Divider ratio for PERIC_BLK (part5)"
|
|
hexmask.long.byte 0x00 20.--27. 1. " PCM2_RATIO ,DIV_PCM2 clock divider Ratio"
|
|
bitfld.long 0x00 16.--19. " AUDIO2_RATIO ,DIV_AUDIO2 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 4.--11. 1. " PCM1_RATIO ,DIV_PCM1 clock divider Ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " AUDIO1_RATIO ,DIV_AUDIO1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1056C++0x03
|
|
line.long 0x00 "CLK_DIV_PERIC5,Set Clock Divider ratio for PERIC_BLK (part6)"
|
|
bitfld.long 0x00 8.--13. " I2S2_RATIO ,DIV_I2S2 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " I2S1_RATIO ,DIV_I2S1 clock divider Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x10580++0x03
|
|
line.long 0x00 "SCLK_DIV_ISP,Set Special Clock Divider ratio for ISP_BLK"
|
|
bitfld.long 0x00 28.--31. " PWM_ISP_RATIO ,DIV_IPWM_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " UART_ISP_RATIO ,DIVUART_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SPI1_ISP_PRE_RATIO ,DIV_SPI1_ISP_PRE clock divider ratio"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI1_ISP_RATIO ,DIV_SPI1_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 4.--11. 1. " SPI0_ISP_PRE_RATIO ,DIV_SPI0_ISP_PRE clock divider ratio"
|
|
bitfld.long 0x00 0.--3. " SPI0_ISP_RATIO ,DIV_SPI0_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10590++0x03
|
|
line.long 0x00 "CLKDIV2_RATIO0,Set PCLK Divider ratio for GSCL,GEN,DISP1 and MFC block"
|
|
bitfld.long 0x00 20. " JPGX_DIV ,PCLK divider ratio in JPGX_DIV (GEN_BLK)" "0,1"
|
|
bitfld.long 0x00 16.--17. " DISP1_BLK ,PCLK divider ratio in DISP1_BLK" "0,1,2,3"
|
|
bitfld.long 0x00 8. " GEN_BLK ,PCLK divider ratio in GEN_BLK" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " GSCL_BLK ,PCLK divider ratio in GSCL_BLK" "0,1,2,3"
|
|
group.long 0x10594++0x03
|
|
line.long 0x00 "CLKDIV2_RATIO1,Set ATCLK, PCLKDBG Divider ratio for FSYS block"
|
|
bitfld.long 0x00 8.--9. " G3D_BLK_PCLK ,PCLK divider ratio in G3D_BLK" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " FSYS_PCLKDBG ,PCLKDBG divider ratio in FSYS_BLK" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " FSYS_ATCLK ,ATCLK divider ratio in FSYS_BLK" "0,1,2,3"
|
|
group.long 0x105A0++0x03
|
|
line.long 0x00 "CLKDIV4_RATIO,Set PCLK Divider Ratio in MFC block"
|
|
bitfld.long 0x00 0.--1. " MFC_BLK ,PCLK divider ratio in MFC_BLK" "0,1,2,3"
|
|
tree.end
|
|
width 20.
|
|
tree "Clock Divider Status"
|
|
rgroup.long 0x10610++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_TOP0,Clock Divider Status for CMU_TOP (part1)"
|
|
bitfld.long 0x00 24. " DIV_ACLK_400_G3D ,DIV_ACLK_400_G3D status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_ACLK_333 ,DIV_ACLK_333 status" "Stable,Changing"
|
|
bitfld.long 0x00 19. " DIV_ACLK_300_GSCL ,DIV_ACLK_300_GSCL status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DIV_ACLK_300_DISP1 ,DIV_ACLK_300_DISP1 status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_ACLK_266 ,DIV_ACLK_266 status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_ACLK_200 ,DIV_ACLK_200 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIV_ACLK_166 ,DIV_ACLK_166 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_ACLK_66 ,DIV_ACLK_66 status" "Stable,Changing"
|
|
rgroup.long 0x10614++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_TOP1,Clock Divider Status for CMU_TOP (part2)"
|
|
bitfld.long 0x00 28. " DIV_ACLK_MIPI_HSI_TXBASE ,DIV_ACLK_MIPI_HSI_TXBASE status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_ACLK_66_PRE ,DIV_ACLK_66_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_ACLK_400_ISP ,DIV_ACLK_400_ISP status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_ACLK_400_IOP ,DIV_ACLK_400_IOP status" "Stable,Changing"
|
|
rgroup.long 0x10620++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_GSCL,Clock Divider Status for GSCL_BLK"
|
|
bitfld.long 0x00 28. " DIV_GSCL_WRAP_B ,DIV_GSCL_WRAP_B status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_GSCL_WRAP_A ,DIV_GSCL_WRAP_A status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_CAM0 ,DIV_CAM0 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DIV_CAM_BAYER ,DIV_CAM_BAYER status" "Stable,Changing"
|
|
rgroup.long 0x1062C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_DISP1_0,Clock Divider Status for DISP1_BLK (part1)"
|
|
bitfld.long 0x00 25. " DIV_HDMI_PIXEL ,DIV_HDMI_PIXEL status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_DP1_EXT_MST_VID ,DIV_DP1_EXT_MST_VID status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_MIPI1_PRE ,DIV_MIPI1_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_MIPI1 ,DIV_MIPI1 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_FIMD1 ,DIV_FIMD1 status" "Stable,Changing"
|
|
rgroup.long 0x1063C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_GEN,Clock Divider Status for GEN_BLK"
|
|
bitfld.long 0x00 4. " DIV_JPEG ,DIV_JPEG status" "Stable,Changing"
|
|
rgroup.long 0x10644++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_MAU,Clock Divider Status for MAUDIO_BLK"
|
|
bitfld.long 0x00 4. " DIV_PCM0 ,DIV_PCM0 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_AUDIO0 ,DIV_AUDIO0 status" "Stable,Changing"
|
|
rgroup.long 0x10648++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS0,Clock Divider Status for FSYS_BLK (part1)"
|
|
bitfld.long 0x00 24. " DIV_USBDRD30 ,DIV_USBDRD30 status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_SATA ,DIV_SATA status" "Stable,Changing"
|
|
rgroup.long 0x1064C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS1,Clock Divider Status for FSYS_BLK (part2)"
|
|
bitfld.long 0x00 24. " DIV_MMC1_PRE ,DIV_MMC1_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_MMC1 ,DIV_MMC1 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_MMC0_PRE ,DIV_MMC0_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_MMC0 ,DIV_MMC0 status" "Stable,Changing"
|
|
rgroup.long 0x10650++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS2,Clock Divider Status for FSYS_BLK (part3)"
|
|
bitfld.long 0x00 24. " DIV_MMC3_PRE ,DIV_MMC3_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_MMC3 ,DIV_MMC3 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_MMC2_PRE ,DIV_MMC2_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_MMC2 ,DIV_MMC2 status" "Stable,Changing"
|
|
rgroup.long 0x10658++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC0,Clock Divider Status for PERIC_BLK (part1)"
|
|
bitfld.long 0x00 12. " DIV_UART3 ,DIV_UART3 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_UART2 ,DIV_UART2 status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_UART1 ,DIV_UART1 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_UART0 ,DIV_UART0 status" "Stable,Changing"
|
|
rgroup.long 0x1065C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC1,Clock Divider Status for PERIC_BLK (part2)"
|
|
bitfld.long 0x00 24. " DIV_SPI1_PRE ,DIV_SPI1_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_SPI1 ,DIV_SPI1 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_SPI0_PRE ,DIV_SPI0_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_SPI0 ,DIV_SPI0 statuss" "Stable,Changing"
|
|
rgroup.long 0x10660++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC2,Clock Divider Status for PERIC_BLK (part3)"
|
|
bitfld.long 0x00 8. " DIV_SPI2_PRE ,DIV_SPI2_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_SPI2 ,DIV_SPI2 status" "Stable,Changing"
|
|
rgroup.long 0x10664++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC3,Clock Divider Status for PERIC_BLK (part4)"
|
|
bitfld.long 0x00 4. " DIV_PWM ,DIV_PWM status" "Stable,Changing"
|
|
rgroup.long 0x10668++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC4,Clock Divider Status for PERIC_BLK (part5)"
|
|
bitfld.long 0x00 20. " DIV_PCM2 ,DIV_PCM2 status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_AUDIO2 ,DIV_AUDIO2 status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_PCM1 ,DIV_PCM1 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_AUDIO1 ,DIV_AUDIO1 status" "Stable,Changing"
|
|
rgroup.long 0x1066C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIC5,Clock Divider Status for PERIC_BLK (part6)"
|
|
bitfld.long 0x00 8. " DIV_I2S2 ,DIV_I2S2 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_I2S1 ,DIV_I2S1 status" "Stable,Changing"
|
|
rgroup.long 0x10680++0x03
|
|
line.long 0x00 "SCLK_DIV_STAT_ISP,Special Clock Divider Status for ISP_BLK"
|
|
bitfld.long 0x00 20. " DIV_PWM_ISP ,DIV_PWM_ISP status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_UART_ISP ,DIVUART_ISP status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_SPI1_ISP_PRE ,DIVSPI1_ISP_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIV_SPI1_ISP ,DIVSPI1_ISP status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_SPI0_ISP_PRE ,DIVSPI0_ISP_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_SPI0_ISP ,DIVSPI0_ISP status" "Stable,Changing"
|
|
rgroup.long 0x10690++0x03
|
|
line.long 0x00 "CLKDIV2_STAT0,PCLK Divider Status for GSCL, GEN, DISP1 and MFC block"
|
|
bitfld.long 0x00 20. " JPGX_DIV ,PCLK divider status in JPGX_DIV (GEN_BLK)" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DISP1_BLK ,PCLK divider status in DISP1_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 8. " GEN_BLK ,PCLK divider status in GEN_BLK" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSCL_BLK ,PCLK divider status in GSCL_BLK" "Stable,Changing"
|
|
rgroup.long 0x10694++0x03
|
|
line.long 0x00 "CLKDIV2_STAT1,ATCLK, PCLKDBG Divider Status for FSYS block"
|
|
bitfld.long 0x00 8. " G3D_BLK_PCLK ,PCLK divider status in G3D_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 4. " FSYS_PCLKDBG ,PCLKDBG divider status in FSYS_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 0. " FSYS_ATCLK ,ATCLK divider status in FSYS_BLK" "Stable,Changing"
|
|
rgroup.long 0x106A0++0x03
|
|
line.long 0x00 "CLKDIV4_STAT,PCLK Divider Status for MFC block"
|
|
bitfld.long 0x00 0. " MFC_BLK ,PCLK divider status in MFC_BLK" "Stable,Changing"
|
|
tree.end
|
|
width 25.
|
|
tree "Control IP Clock Gating"
|
|
group.long 0x10920++0x03
|
|
line.long 0x00 "CLK_GATE_IP_GSCL,Control IP Clock Gating for GSCL_BLK"
|
|
bitfld.long 0x00 20. " CLK_SMMUFIMC_LITE2 ,Gating all Clocks for SMMUFIMC_LITE2" "Masked,Passed"
|
|
bitfld.long 0x00 12. " CLK_SMMUFIMC_LITE1 ,Gating all Clocks for SMMUFIMC_LITE1" "Masked,Passed"
|
|
bitfld.long 0x00 11. " CLK_SMMUFIMC_LITE0 ,Gating all Clocks for SMMUFIMC_LITE0" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLK_SMMUGSCL3 ,Gating all Clocks for SMMUGSCL3" "Masked,Passed"
|
|
bitfld.long 0x00 9. " CLK_SMMUGSCL2 ,Gating all Clocks for SMMUGSCL2" "Masked,Passed"
|
|
bitfld.long 0x00 8. " CLK_SMMUGSCL1 ,Gating all Clocks for SMMUGSCL1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLK_SMMUGSCL0 ,Gating all Clocks for SMMUGSCL0" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_GSCL_WRAP_B ,Gating all Clocks for GSCL_WRAP_B" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_GSCL_WRAP_A ,Gating all Clocks for GSCL_WRAP_A" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_CAMIF_TOP ,Gating all Clocks for CAMIF_TOP" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_GSCL3 ,Gating all Clocks for GSCL3" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_GSCL2 ,Gating all Clocks for GSCL2" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_GSCL1 ,Gating all Clocks for GSCL1" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_GSCL0 ,Gating all Clocks for GSCL0" "Masked,Passed"
|
|
group.long 0x10928++0x03
|
|
line.long 0x00 "CLK_GATE_IP_DISP1,Control IP Clock Gating for DISP1_BLK"
|
|
bitfld.long 0x00 9. " CLK_SMMUTVX ,Gating all Clocks for SMMUTVX" "Masked,Passed"
|
|
bitfld.long 0x00 8. " CLK_SMMUFIMD1X ,Gating all Clocks for SMMUFIMD1X" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_ASYNCTVX ,Gating all Clocks for ASYNCTVX" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLK_HDMI ,Gating all Clocks for HDMI" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_MIXER ,Gating all Clocks for MIXER" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_DP1 ,Gating all Clocks for DP1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLK_DSIM1 ,Gating all Clocks for DSIM1" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_MIE1 ,Gating all Clocks for MIE1" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_FIMD1 ,Gating all Clocks for FIMD1" "Masked,Passed"
|
|
group.long 0x1092C++0x03
|
|
line.long 0x00 "CLK_GATE_IP_MFC,Control IP Clock Gating for MFC_BLK"
|
|
bitfld.long 0x00 2. " CLK_SMMUMFCR ,Gating all Clocks for SMMUMFCR" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_SMMUMFCL ,Gating all Clocks for SMMUMFCL" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_MFC ,Gating all Clocks for MFC" "Masked,Passed"
|
|
group.long 0x10930++0x03
|
|
line.long 0x00 "CLK_GATE_IP_G3D,Control IP Clock Gating for G3D_BLK"
|
|
bitfld.long 0x00 0. " G3D ,Gating all Clocks for G3D" "Masked,Passed"
|
|
group.long 0x10934++0x03
|
|
line.long 0x00 "CLK_GATE_IP_GEN,Control IP Clock Gating for GEN_BLK"
|
|
bitfld.long 0x00 9. " CLK_SMMUMDMA1 ,Gating all Clocks for SMMUMDMA1" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_SMMUJPEG ,Gating all Clocks for SMMUJPEG" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_SMMUROTATOR ,Gating all Clocks for SMMUROTATOR" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_MDMA1 ,Gating all Clocks for MDMA1" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_JPEG ,Gating all Clocks for JPEG" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_ROTATOR ,Gating all Clocks for ROTATOR" "Masked,Passed"
|
|
group.long 0x10944++0x03
|
|
line.long 0x00 "CLK_GATE_IP_FSYS,Control IP Clock Gating for FSYS_BLK"
|
|
bitfld.long 0x00 30. " CLK_WDT_IOP ,Gating all Clocks for WDT_IOP" "Masked,Passed"
|
|
bitfld.long 0x00 26. " CLK_SMMUMCU_IOP ,Gating all Clocks for SMMUMCU_IOP" "Masked,Passed"
|
|
bitfld.long 0x00 25. " CLK_SATA_PHY_I2C ,Gating all Clocks for SATA_PHY_I2C" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CLK_SATA_PHY_CTRL ,Gating all Clocks for SATA_PHY_CTRL" "Masked,Passed"
|
|
bitfld.long 0x00 23. " CLK_MCUCTL_IOP ,Gating all Clocks for MCUCTL_IOP" "Masked,Passed"
|
|
bitfld.long 0x00 22. " CLK_NFCON ,Set 0 to reduce power for deprecated function" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLK_USBDRD30 ,Gating all Clocks for USBDRD30" "Masked,Passed"
|
|
bitfld.long 0x00 18. " CLK_USBHOST20 ,Gating all Clocks for USBHOST20" "Masked,Passed"
|
|
bitfld.long 0x00 17. " CLK_SROMC ,Gating all Clocks for SROMC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLK_SDMMC3 ,Gating all Clocks for SDMMC3" "Masked,Passed"
|
|
bitfld.long 0x00 14. " CLK_SDMMC2 ,Gating all Clocks for SDMMC2" "Masked,Passed"
|
|
bitfld.long 0x00 13. " CLK_SDMMC1 ,Gating all Clocks for SDMMC1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLK_SDMMC0 ,Gating all Clocks for SDMMC0" "Masked,Passed"
|
|
bitfld.long 0x00 11. " CLK_SMMURTIC ,Gating all Clocks for SMMURTIC" "Masked,Passed"
|
|
bitfld.long 0x00 9. " CLK_RTIC ,Gating all Clocks for RTIC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_MIPI_HSI ,Gating all Clocks for MIPI_HSI" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_USBOTG ,Gating all Clocks for USBOTG" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_SATA ,Gating all Clocks for SATA" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_PDMA1 ,Gating all Clocks for PDMA1" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_PDMA0 ,Gating all Clocks for PDMA0" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_MCU_IOP ,Gating all Clocks for MCU_IOP" "Masked,Passed"
|
|
group.long 0x10950++0x03
|
|
line.long 0x00 "CLK_GATE_IP_PERIC,Control IP Clock Gating for PERIC_BLK"
|
|
bitfld.long 0x00 31. " CLK_HS-I2C3 ,Gating all clocks for HS-I2C3" "Masked,Passed"
|
|
bitfld.long 0x00 30. " CLK_HS-I2C2 ,Gating all clocks for HS-I2C2" "Masked,Passed"
|
|
bitfld.long 0x00 29. " CLK_HS-I2C1 ,Gating all clocks for HS-I2C1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CLK_HS-I2C0 ,Gating all clocks for HS-I2C0" "Masked,Passed"
|
|
bitfld.long 0x00 27. " CLK_AC97 ,Gating all clocks for AC97" "Masked,Passed"
|
|
bitfld.long 0x00 26. " CLK_SPDIF ,Gating all clocks for SPDIF" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CLK_PWM ,Gating all clocks for PWM" "Masked,Passed"
|
|
bitfld.long 0x00 23. " CLK_PCM2 ,Gating all clocks for PCM2" "Masked,Passed"
|
|
bitfld.long 0x00 22. " CLK_PCM1 ,Gating all clocks for PCM1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 21. " CLK_I2S2 ,Gating all clocks for I2S2" "Masked,Passed"
|
|
bitfld.long 0x00 20. " CLK_I2S1 ,Gating all clocks for I2S1" "Masked,Passed"
|
|
bitfld.long 0x00 18. " CLK_SPI2 ,Gating all clocks for SPI2" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CLK_SPI1 ,Gating all clocks for SPI1" "Masked,Passed"
|
|
bitfld.long 0x00 16. " CLK_SPI0 ,Gating all clocks for SPI0" "Masked,Passed"
|
|
bitfld.long 0x00 15. " CLK_ADC ,Gating all clocks for ADC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CLK_I2CHDMI ,Gating all clocks for I2CHDMI" "Masked,Passed"
|
|
bitfld.long 0x00 13. " CLK_I2C7 ,Gating all clocks for I2C7" "Masked,Passed"
|
|
bitfld.long 0x00 12. " CLK_I2C6 ,Gating all clocks for I2C6" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CLK_I2C5 ,Gating all clocks for I2C5" "Masked,Passed"
|
|
bitfld.long 0x00 10. " CLK_I2C4 ,Gating all clocks for I2C4" "Masked,Passed"
|
|
bitfld.long 0x00 9. " CLK_I2C3 ,Gating all clocks for I2C3" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_I2C2 ,Gating all clocks for I2C2" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_I2C1 ,Gating all clocks for I2C1" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_I2C0 ,Gating all clocks for I2C0" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLK_UART3 ,Gating all clocks for UART3" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_UART2 ,Gating all clocks for UART2" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_UART1 ,Gating all clocks for UART1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_UART0 ,Gating all clocks for UART0" "Masked,Passed"
|
|
group.long 0x10960++0x03
|
|
line.long 0x00 "CLK_GATE_IP_PERIS,Control IP Clock Gating for PERIS_BLK"
|
|
bitfld.long 0x00 24. " CLK_MONOCNT ,Gating all Clocks for Monotonic Counter" "Masked,Passed"
|
|
bitfld.long 0x00 23. " CLK_PKEY1 ,Gating all Clocks for Provision key 1" "Masked,Passed"
|
|
bitfld.long 0x00 22. " CLK_PKEY0 ,Gating all Clocks for Provision key 0" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 21. " CLK_TMU_APBIF ,Gating all Clocks for TMU_APBIF" "Masked,Passed"
|
|
bitfld.long 0x00 20. " CLK_RTC ,Gating all clocks for RTC" "Masked,Passed"
|
|
bitfld.long 0x00 19. " CLK_WDT ,Gating all clocks for WDT" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLK_ST ,Gating all clocks for ST" "Masked,Passed"
|
|
bitfld.long 0x00 17. " CLK_SECKEY_APBIF ,Gating all clocks for SECKEY_APBIF" "Masked,Passed"
|
|
bitfld.long 0x00 16. " CLK_HDMI_CEC ,Gating all clocks for HDMI_CEC" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLK_TZPC9 ,Gating all clocks for TZPC9" "Masked,Passed"
|
|
bitfld.long 0x00 14. " CLK_TZPC8 ,Gating all clocks for TZPC8" "Masked,Passed"
|
|
bitfld.long 0x00 13. " CLK_TZPC7 ,Gating all clocks for TZPC7" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLK_TZPC6 ,Gating all clocks for TZPC6" "Masked,Passed"
|
|
bitfld.long 0x00 11. " CLK_TZPC5 ,Gating all clocks for TZPC5" "Masked,Passed"
|
|
bitfld.long 0x00 10. " CLK_TZPC4 ,Gating all clocks for TZPC4" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLK_TZPC3 ,Gating all clocks for TZPC3" "Masked,Passed"
|
|
bitfld.long 0x00 8. " CLK_TZPC2 ,Gating all clocks for TZPC2" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_TZPC1 ,Gating all clocks for TZPC1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLK_TZPC0 ,Gating all clocks for TZPC0" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_CMU_MEMPART ,Gating all clocks for CMU_MEMPART" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_CMU_COREPART ,Gating all clocks for CMU_COREPART" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLK_CMU_TOPPART ,Gating all clocks for CMU_TOPPART" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_PMU_APBIF ,Gating all clocks for PMU_APBIF" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_SYSREG ,Gating all clocks for SYSREG" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_CHIPID_APBIF ,Gating all clocks for CHIPID_APBIF" "Masked,Passed"
|
|
group.long 0x10980++0x03
|
|
line.long 0x00 "CLK_GATE_BLOCK,Control Block Clock Gating"
|
|
bitfld.long 0x00 7. " CLK_ACP ,Gating all Clocks for ACP_BLK" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_DISP1 ,Gating all Clocks for DISP1_BLK" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_GSCL ,Gating all Clocks for GSCL_BLK" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_GEN ,Gating all clocks for GEN_BLK" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_G3D ,Gating all Clocks for G3D_BLK" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_MFC ,Gating all Clocks for MFC_BLK" "Masked,Passed"
|
|
group.long 0x109A0++0x03
|
|
line.long 0x00 "MCUIOP_PWR_CTRL,MCUIOP Power Control"
|
|
bitfld.long 0x00 0. " CSCLK_AUTO_ENB_IN_DEBUG ,Force CoreSight Clocks to toggle when debugger is attached" "Disabled,Enabled"
|
|
group.long 0x10A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_TOP,CLKOUT Control Register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,Mode select" "EPLL_FOUT,VPLL_OUT,CPLL_OUT,SCLK_HDMI24M,SCLK_DPTXPHY,SCLK_USBPHY0,SCLK_HDMIPHY,AUDIOCDLK0,AUDIOCDLK1,AUDIOCDLK2,SPDIF_EXTCLK,ACLK_400_G3D,ACLK_333,ACLK_266,GPLL_FOUT,ACLK_400_ISP,ACLK_400_IOP,SCLK_JPEG,RX_HALF_BYTE_CLK_A,RX_HALF_BYTE_CLK_B,CAM_A_PCLK,CAM_B_PCLK,S_RXBYTECLKHS0_2L,S_RXBYTECLKHS0_4L,ACLK_300_DISP1,ACLK_300_GSCL,?..."
|
|
rgroup.long 0x10A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_TOP_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
tree.end
|
|
width 26.
|
|
tree "LEX,R0X,R1X"
|
|
group.long 0x14200++0x03
|
|
line.long 0x00 "CLK_SRC_LEX,Select Clock Source for CMU_LEX"
|
|
bitfld.long 0x00 0. " MUX_ATCLK_LEX ,Control MUX_ATCLK_LEX" "ACLK_200,ACLK_266"
|
|
rgroup.long 0x14400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_LEX,Clock MUX Status for CMU_LEX"
|
|
bitfld.long 0x00 0.--2. " ATCLK_LEX_SEL ,Selection signal status of MUX_ATCLK_LEX" "Reserved,ACLK_200,ACLK_266,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x14500++0x03
|
|
line.long 0x00 "CLK_DIV_LEX,Set Clock Divider ratio for CMU_LEX"
|
|
bitfld.long 0x00 8.--10. " ATCLK_LEX_RATIO ,ATCLK_LEX clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " PCLK_LEX_RATIO ,PCLK_LEX clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x14600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_LEX,Clock Divider Status for CMU_LEX"
|
|
bitfld.long 0x00 8. " DIV_ATCLK_LEX ,DIV_ATCLK_LEX status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_PCLK_LEX ,DIV_PCLK_LEX status" "Stable,Changing"
|
|
group.long 0x14A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_LEX,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--1. " MUX_SEL ,Mode select" "ACLK_266,APLL_DLEX,ACLK_PLEX,?..."
|
|
rgroup.long 0x14A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_LEX_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
group.long 0x18500++0x03
|
|
line.long 0x00 "CLK_DIV_R0X,Set clock Divider Ratio for CMU_R0X"
|
|
bitfld.long 0x00 4.--6. " PCLK_R0X_RATIO ,DIV_PR0X Clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_R0X,Clock Divider Status for CMU_R0X"
|
|
bitfld.long 0x00 4. " DIV_PCLK_R0X ,DIV_PR0X status" "Stable,Changing"
|
|
group.long 0x18A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_R0X,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--1. " MUX_SEL ,Mode select" "ACLK_266,APLL_DR0X,ACLK_PR0X,?..."
|
|
rgroup.long 0x18A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_R0X_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
group.long 0x1C500++0x03
|
|
line.long 0x00 "CLK_DIV_R1X,Set clock Divider ratio for CMU_R1X"
|
|
bitfld.long 0x00 4.--6. " PCLK_R1X_RATIO ,DIV_PR1X Clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1C600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_R1X,Clock Divider Status for CMU_R1X"
|
|
bitfld.long 0x00 4. " DIV_PCLK_R0X ,DIV_PR0X status" "Stable,Changing"
|
|
group.long 0x1CA00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_R1X,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--1. " MUX_SEL ,Mode select" "ACLK_266,APLL_DR1X,ACLK_PR1X,?..."
|
|
rgroup.long 0x1CA04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_R1X_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
tree.end
|
|
width 15.
|
|
tree "BPLL"
|
|
group.long 0x20010++0x03
|
|
line.long 0x00 "MPLL_LOCK,PLL locking period for MPLL"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " PLL_LOCKTIME ,Stable clock output set period"
|
|
group.long 0x20110++0x03
|
|
line.long 0x00 "BPLL_CON0,PLL output frequency for BPLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PDIV ,PLL P divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV ,PLL S divide value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20114++0x03
|
|
line.long 0x00 "BPLL_CON1,PLL AFC control"
|
|
bitfld.long 0x00 21. " DCC_ENB ,DCC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " AFC_ENB ,AFC enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " FSEL ,Monitoring Frequency Select pin" "FREF,FVCO"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FEED_EN ,Enable pin for FEED_OUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " LOCK_CON_OUT ,Detector setting of the output margin" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " LOCK_CON_IN ,Detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " LOCK_CON_DLY ,Detector setting of the detection resolution" "0,1,2,3,?..."
|
|
bitfld.long 0x00 0.--4. " EXTAFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
width 26.
|
|
tree "CDREX"
|
|
group.long 0x20200++0x03
|
|
line.long 0x00 "CLK_SRC_CDREX,Select Clock Source for CMU_CDREX"
|
|
bitfld.long 0x00 8. " MUX_MCLK_DPHY_SEL ,Control MUX_MCLK_DPHY" "SCLK_MPLL,SCLK_BPLL"
|
|
bitfld.long 0x00 4. " MUX_MCLK_CDREX_SEL ,Control MUX_MCLK_CDREX" "SCLK_MPLL,SCLK_BPLL"
|
|
bitfld.long 0x00 0. " MUX_BPLL_SEL ,Control MUX_BPLL" "XXTI,MOUT_BPLL_FOUT"
|
|
rgroup.long 0x20400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_CDREX,Clock MUX Status for CMU_CDREX"
|
|
bitfld.long 0x00 20.--22. " SCLK_MPLL_SEL ,Selection signal (SCLK_MPLL) status of MUX_MPLL" "Reserved,XXTI,MPLL_FOUT_RGT,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " MPLL_FOUT_SEL ,Selection signal status of MUX_MPLL_FOUT" "Reserved,MPLL_FOUT_800,MPLL_FOUT,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 12.--14. " BPLL_FOUT_SEL ,Selection signal status of MUX_BPLL_FOUT" "Reserved,BPLL_FOUT_800,BPLL_FOUT,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " MCLK_DPHY_SEL ,Selection signal status of MUX_MCLK_DPHY" "Reserved,SCLK_MPLL,SCLK_BPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " MCLK_CDREX_SEL ,Selection signal status of MUX_MCLK_CDREX" "Reserved,SCLK_MPLL,SCLK_BPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " BPLL_SEL ,Selection signal status of MUX_BPLL" "Reserved,XXTI,MOUT_BPLL_FOUT,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x20500++0x03
|
|
line.long 0x00 "CLK_DIV_CDREX,Set Clock Divider ratio for CMU_CDREX"
|
|
bitfld.long 0x00 28.--30. " MCLK_CDREX2_RATIO ,DIV_MCLK_CDREX2 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " ACLK_SFRTZASCP_RATIO ,DIV_ACLK_SFRTZASCP clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " MCLK_DPHY_RATIO ,DIV_MCLK_DPHY clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " MCLK_CDREX_RATIO ,DIV_MCLK_CDREX clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " PCLK_CDREX_RATIO ,DIV_PCLK_CDREX clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ACLK_CDREX_RATIO ,DIV_ACLK_CDREX clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_CDREX,Clock Divider Status for CMU_CDREX"
|
|
bitfld.long 0x00 28. " DIV_MCLK_CDREX2 ,DIV_MCLK_CDREX2 status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_ACLK_SFRTZASCP ,DIV_ACLK_SFRTZASCP status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_MCLK_DPHY ,DIV_MCLK_DPHY status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_MCLK_CDREX ,DIV_MCLK_CDREX status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_PCLK_CDREX ,DIV_PCLK_CDREX status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_ACLK_CDREX ,DIV_ACLK_CDREX status" "Stable,Changing"
|
|
group.long 0x20900++0x03
|
|
line.long 0x00 "CLK_GATE_IP_CDREX,Control IP Clock Gating for DMC_BLK (CDREX)"
|
|
bitfld.long 0x00 25. " CLK_TZASC_CBXW ,Gating AXI Clock for TZASC_XCBXW and DRAM controller port1" "Masked,Passed"
|
|
bitfld.long 0x00 24. " CLK_TZASC_CBXR ,Gating AXI Clock for TZASC_XCBXR" "Masked,Passed"
|
|
bitfld.long 0x00 23. " CLK_TZASC_DRBXW ,Gating AXI Clock for TZASC_XDRBXW and DRAM controller port3" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLK_TZASC_DRBXR ,Gating AXI Clock for TZASC_XDRBXR" "Masked,Passed"
|
|
bitfld.long 0x00 21. " CLK_TZASC_XLBXW ,Gating AXI clock for TZASC_XLBXW and DRAM controller port0" "Masked,Passed"
|
|
bitfld.long 0x00 20. " CLK_TZASC_XLBXR ,Gating AXI clock for TZASC_XLBXR" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLK_TZASC_XR1BXW ,GGating AXI clock for TZASC_XR1BXW and DRAM controller port2" "Masked,Passed"
|
|
bitfld.long 0x00 18. " CLK_TZASC_XR1BXR ,Gating AXI clock for TZASC_XR1BXR" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_SFRTZASCP ,Gating all Clocks for AXI2APB_TZASCP and AXI_CNVSX" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLK_DPHY1 ,Gating DLL Clocks for LPDDRHPHY1" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_DPHY0 ,Gating DLL Clocks for LPDDRHPHY0" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_DREX2 ,Gating all Clocks for DRAM controller and clk2x for LPDDRHPHY0 and LPDDRHPHY1" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_SFRCDREXP ,Gating all Clocks for AHB2APB_CDREXP and ASYNCAHBM_PCX_CDREXP" "Masked,Passed"
|
|
group.long 0x20914++0x03
|
|
line.long 0x00 "DMC_FREQ_CTRL,DMC Frequency Control register"
|
|
bitfld.long 0x00 12.--14. " MCLK_CDREX2_RATIO ,DIV_MCLK_CDREX2 clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " MCLK_DPHY_RATIO ,DIV_MCLK_DPHY clock divider Ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2091C++0x03
|
|
line.long 0x00 "DREX2_PAUSE,Pause function for DREX2"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable PAUSE function of DREXII" "Disabled,Enabled"
|
|
group.long 0x20A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CDREX,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--1. " MUX_SEL ,Mode select" "MCLK_CDREX,ACLK_CDREX,PCLK_CDREX,RCLK_CDREX"
|
|
group.long 0x20A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CDREX_DIV_STAT,Clock Divider Status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
group.long 0x20A10++0x03
|
|
line.long 0x00 "LPDDR3PHY_CTRL,Reset for LPDDR3HPHY"
|
|
bitfld.long 0x00 0. " PHY_RESET ,RESET for DDR3 memory" "Disabled,Enabled"
|
|
group.long 0x20A20++0x03
|
|
line.long 0x00 "LPDDR3PHY_CON3,DREX ADDR pin Change"
|
|
bitfld.long 0x00 31. " DRAM_POP_EN ,Set this bit to 1 for POP" "0,1"
|
|
group.long 0x20A24++0x03
|
|
line.long 0x00 "PLL_DIV2_SEL,Selection for PLL_FOUT"
|
|
bitfld.long 0x00 4. " MPLL_FOUT_SEL ,Control MUX_MPLL_FOUT" "MPLL_FOUT/2,MPLL_FOUT"
|
|
bitfld.long 0x00 0. " BPLL_FOUT_SEL ,Control MUX_BPLL_FOUT" "BPLL_FOUT/2,BPLL_FOUT"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Interrupt Controller"
|
|
base ad:0x10480000
|
|
;section
|
|
width 11.
|
|
tree "Distributor"
|
|
if (((d.l(ad:0x10480000+0x04))&0x400)==0x000)
|
|
group.long 0x00++0x03 "Distributor Interrupt Controller"
|
|
line.long 0x00 "GICD_CTLR,Interrupt Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for pending interrupts from the Distributor to the CPU" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GICD_CTLR,Interrupt Distributor Control Register"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 , Global enable for forwarding pending Group 1 interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global enable for forwarding pending Gorup 0 interrupts" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Number of supported Lockable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5.--7. " CPUNO ,Number of supported CPU interfaces" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " ITLINENO ,Number of provided INTIDs" "32,64,96,128,160,192,224,256,288,320,352,384,416,448,480,512,544,576,608,640,672,704,736,768,800,832,864,896,928,960,992,1024"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRODUCTID ,An IMPEMENTATION DEFINED product identifier"
|
|
hexmask.long.byte 0x00 16.--19. 1. " VARIANT ,An IMPEMENTATION DEFINED variant number"
|
|
hexmask.long.byte 0x00 12.--15. 1. " REVISION ,An IMPEMENTATION DEFINED revision number"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,JEP106 code of the company that implemented GIC Distributor"
|
|
width 18.
|
|
tree "Interrupt Security"
|
|
group.long 0x80++0x13
|
|
line.long 0x00 "GICD_IGROUPR0,Interrupt group register 0 (SGI,PPI)"
|
|
bitfld.long 0x00 30. " PPI_GS_14 ,Group status for PPI(14)" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " PPI_GS_13 ,Group status for PPI(13)" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " PPI_GS_11 ,Group status for PPI(11)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_GS_10 ,Group status for PPI(10)" "Group 0,Group 1"
|
|
bitfld.long 0x00 25. " PPI_GS_9 ,Group status for PPI(9)" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " SGI_GS_15 ,Group status for SGI(15)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SGI_GS_14 ,Group status for SGI(14)" "Group 0,Group 1"
|
|
bitfld.long 0x00 13. " SGI_GS_13 ,Group status for SGI(13)" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " SGI_GS_12 ,Group status for SGI(12)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SGI_GS_11 ,Group status for SGI(11)" "Group 0,Group 1"
|
|
bitfld.long 0x00 10. " SGI_GS_10 ,Group status for SGI(10)" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " SGI_GS_9 ,Group status for SGI(9)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SGI_GS_8 ,Group status for SGI(8)" "Group 0,Group 1"
|
|
bitfld.long 0x00 7. " SGI_GS_7 ,Group status for SGI(7)" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " SGI_GS_6 ,Group status for SGI(6)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SGI_GS_5 ,Group status for SGI(5)" "Group 0,Group 1"
|
|
bitfld.long 0x00 4. " SGI_GS_4 ,Group status for SGI(4)" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " SGI_GS_3 ,Group status for SGI(3)" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SGI_GS_2 ,Group status for SGI(2)" "Group 0,Group 1"
|
|
bitfld.long 0x00 1. " SGI_GS_1 ,Group status for SGI(1)" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " SGI_GS_0 ,Group status for SGI(0)" "Group 0,Group 1"
|
|
line.long 0x04 "GICD_IGROUPR1,Interrupt group registers 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_GS_31 ,Group status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x04 30. " SPI_GS_30 ,Group status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x04 29. " SPI_GS_29 ,Group status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_GS_28 ,Group status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x04 27. " SPI_GS_27 ,Group status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x04 26. " SPI_GS_26 ,Group status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_GS_25 ,Group status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x04 24. " SPI_GS_24 ,Group status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x04 23. " SPI_GS_23 ,Group status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_GS_22 ,Group status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x04 21. " SPI_GS_21 ,Group status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x04 20. " SPI_GS_20 ,Group status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_GS_19 ,Group status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x04 18. " SPI_GS_18 ,Group status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x04 17. " SPI_GS_17 ,Group status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_GS_16 ,Group status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x04 15. " SPI_GS_15 ,Group status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x04 14. " SPI_GS_14 ,Group status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_GS_13 ,Group status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x04 12. " SPI_GS_12 ,Group status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x04 11. " SPI_GS_11 ,Group status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_GS_10 ,Group status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x04 9. " SPI_GS_9 ,Group status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x04 8. " SPI_GS_8 ,Group status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_GS_7 ,Group status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x04 6. " SPI_GS_6 ,Group status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x04 5. " SPI_GS_5 ,Group status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_GS_4 ,Group status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x04 3. " SPI_GS_3 ,Group status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x04 2. " SPI_GS_2 ,Group status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_GS_1 ,Group status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x04 0. " SPI_GS_0 ,Group status Bit 0" "Group 0,Group 1"
|
|
line.long 0x08 "GICD_IGROUPR2,Interrupt group registers 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_GS_63 ,Group status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x08 30. " SPI_GS_62 ,Group status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x08 29. " SPI_GS_61 ,Group status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_GS_60 ,Group status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x08 27. " SPI_GS_59 ,Group status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x08 26. " SPI_GS_58 ,Group status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_GS_57 ,Group status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x08 24. " SPI_GS_56 ,Group status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x08 23. " SPI_GS_55 ,Group status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_GS_54 ,Group status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x08 21. " SPI_GS_53 ,Group status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x08 20. " SPI_GS_52 ,Group status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_GS_51 ,Group status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x08 18. " SPI_GS_50 ,Group status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x08 17. " SPI_GS_49 ,Group status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_GS_48 ,Group status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x08 15. " SPI_GS_47 ,Group status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x08 14. " SPI_GS_46 ,Group status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_GS_45 ,Group status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x08 12. " SPI_GS_44 ,Group status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x08 11. " SPI_GS_43 ,Group status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_GS_42 ,Group status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x08 9. " SPI_GS_41 ,Group status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x08 8. " SPI_GS_40 ,Group status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_GS_39 ,Group status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x08 6. " SPI_GS_38 ,Group status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x08 5. " SPI_GS_37 ,Group status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_GS_36 ,Group status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x08 3. " SPI_GS_35 ,Group status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x08 2. " SPI_GS_34 ,Group status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_GS_33 ,Group status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x08 0. " SPI_GS_32 ,Group status Bit 32" "Group 0,Group 1"
|
|
line.long 0x0C "GICD_IGROUPR3,Interrupt group registers 3 SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_GS_95 ,Group status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x0C 30. " SPI_GS_94 ,Group status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x0C 29. " SPI_GS_93 ,Group status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_GS_92 ,Group status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x0C 27. " SPI_GS_91 ,Group status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x0C 26. " SPI_GS_90 ,Group status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_GS_89 ,Group status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x0C 24. " SPI_GS_88 ,Group status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x0C 23. " SPI_GS_87 ,Group status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_GS_86 ,Group status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x0C 21. " SPI_GS_85 ,Group status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x0C 20. " SPI_GS_84 ,Group status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_GS_83 ,Group status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x0C 18. " SPI_GS_82 ,Group status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x0C 17. " SPI_GS_81 ,Group status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_GS_80 ,Group status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x0C 15. " SPI_GS_79 ,Group status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x0C 14. " SPI_GS_78 ,Group status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_GS_77 ,Group status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x0C 12. " SPI_GS_76 ,Group status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x0C 11. " SPI_GS_75 ,Group status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_GS_74 ,Group status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x0C 9. " SPI_GS_73 ,Group status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x0C 8. " SPI_GS_72 ,Group status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_GS_71 ,Group status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x0C 6. " SPI_GS_70 ,Group status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x0C 5. " SPI_GS_69 ,Group status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_GS_68 ,Group status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x0C 3. " SPI_GS_67 ,Group status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x0C 2. " SPI_GS_66 ,Group status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_GS_65 ,Group status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x0C 0. " SPI_GS_64 ,Group status Bit 64" "Group 0,Group 1"
|
|
line.long 0x10 "GICD_IGROUPR4,Interrupt group registers 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_GS_127 ,Group status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x10 30. " SPI_GS_126 ,Group status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x10 29. " SPI_GS_125 ,Group status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_GS_124 ,Group status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x10 27. " SPI_GS_123 ,Group status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x10 26. " SPI_GS_122 ,Group status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_GS_121 ,Group status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x10 24. " SPI_GS_120 ,Group status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x10 23. " SPI_GS_119 ,Group status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_GS_118 ,Group status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x10 21. " SPI_GS_117 ,Group status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x10 20. " SPI_GS_116 ,Group status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_GS_115 ,Group status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x10 18. " SPI_GS_114 ,Group status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x10 17. " SPI_GS_113 ,Group status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_GS_112 ,Group status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x10 15. " SPI_GS_111 ,Group status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x10 14. " SPI_GS_110 ,Group status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_GS_109 ,Group status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x10 12. " SPI_GS_108 ,Group status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x10 11. " SPI_GS_107 ,Group status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_GS_106 ,Group status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x10 9. " SPI_GS_105 ,Group status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x10 8. " SPI_GS_104 ,Group status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_GS_103 ,Group status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x10 6. " SPI_GS_102 ,Group status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x10 5. " SPI_GS_101 ,Group status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_GS_100 ,Group status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x10 3. " SPI_GS_99 ,Group status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x10 2. " SPI_GS_98 ,Group status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_GS_97 ,Group status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x10 0. " SPI_GS_96 ,Group status Bit 96" "Group 0,Group 1"
|
|
tree.end
|
|
tree "Interrupt Set-Enable"
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "GICD_ISENABLER0,Interrupt set-enable register 0 (SGI,PPI)"
|
|
bitfld.long 0x00 30. " PPI_SE_14 ,Set-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_SE_13 ,Set-enable for PPI(13)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_SE_11 ,Set-enable for PPI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_SE_10 ,Set-enable for PPI(10)" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PPI_SE_9 ,Set-enable for PPI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_SE_15 ,Set-enable for SGI(15)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " SGI_SE_14 ,Set-enable for SGI(14)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SGI_SE_13 ,Set-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_SE_12 ,Set-enable for SGI(12)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " SGI_SE_11 ,Set-enable for SGI(11)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " SGI_SE_10 ,Set-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_SE_9 ,Set-enable for SGI(9)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " SGI_SE_8 ,Set-enable for SGI(8)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 7. " SGI_SE_7 ,Set-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_SE_6 ,Set-enable for SGI(6)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " SGI_SE_5 ,Set-enable for SGI(5)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " SGI_SE_4 ,Set-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_SE_3 ,Set-enable for SGI(3)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " SGI_SE_2 ,Set-enable for SGI(2)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " SGI_SE_1 ,Set-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_SE_0 ,Set-enable for SGI(0)" "Disabled,Enabled"
|
|
line.long 0x04 "GICD_ISENABLER1,Interrupt set-enable register 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_SE_31 ,Set Enable Bit 31" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " SPI_SE_30 ,Set Enable Bit 30" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " SPI_SE_29 ,Set Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_SE_28 ,Set Enable Bit 28" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " SPI_SE_27 ,Set Enable Bit 27" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " SPI_SE_26 ,Set Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_SE_25 ,Set Enable Bit 25" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " SPI_SE_24 ,Set Enable Bit 24" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SPI_SE_23 ,Set Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_SE_22 ,Set Enable Bit 22" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " SPI_SE_21 ,Set Enable Bit 21" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SPI_SE_20 ,Set Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_SE_19 ,Set Enable Bit 19" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " SPI_SE_18 ,Set Enable Bit 18" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SPI_SE_17 ,Set Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_SE_16 ,Set Enable Bit 16" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " SPI_SE_15 ,Set Enable Bit 15" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SPI_SE_14 ,Set Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_SE_13 ,Set Enable Bit 13" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " SPI_SE_12 ,Set Enable Bit 12" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SPI_SE_11 ,Set Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_SE_10 ,Set Enable Bit 10" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SPI_SE_9 ,Set Enable Bit 9" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SPI_SE_8 ,Set Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_SE_7 ,Set Enable Bit 7" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SPI_SE_6 ,Set Enable Bit 6" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SPI_SE_5 ,Set Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_SE_4 ,Set Enable Bit 4" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " SPI_SE_3 ,Set Enable Bit 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SPI_SE_2 ,Set Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_SE_1 ,Set Enable Bit 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPI_SE_0 ,Set Enable Bit 0" "Disabled,Enabled"
|
|
line.long 0x08 "GICD_ISENABLER2,Interrupt set-enable register 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_SE_63 ,Set Enable Bit 63" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " SPI_SE_62 ,Set Enable Bit 62" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " SPI_SE_61 ,Set Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_SE_60 ,Set Enable Bit 60" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " SPI_SE_59 ,Set Enable Bit 59" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " SPI_SE_58 ,Set Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_SE_57 ,Set Enable Bit 57" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " SPI_SE_56 ,Set Enable Bit 56" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SPI_SE_55 ,Set Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_SE_54 ,Set Enable Bit 54" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " SPI_SE_53 ,Set Enable Bit 53" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " SPI_SE_52 ,Set Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_SE_51 ,Set Enable Bit 51" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " SPI_SE_50 ,Set Enable Bit 50" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " SPI_SE_49 ,Set Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_SE_48 ,Set Enable Bit 48" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " SPI_SE_47 ,Set Enable Bit 47" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " SPI_SE_46 ,Set Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_SE_45 ,Set Enable Bit 45" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SPI_SE_44 ,Set Enable Bit 44" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " SPI_SE_43 ,Set Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_SE_42 ,Set Enable Bit 42" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SPI_SE_41 ,Set Enable Bit 41" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SPI_SE_40 ,Set Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_SE_39 ,Set Enable Bit 39" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SPI_SE_38 ,Set Enable Bit 38" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SPI_SE_37 ,Set Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_SE_36 ,Set Enable Bit 36" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " SPI_SE_35 ,Set Enable Bit 35" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " SPI_SE_34 ,Set Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_SE_33 ,Set Enable Bit 33" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SPI_SE_32 ,Set Enable Bit 32" "Disabled,Enabled"
|
|
line.long 0x0C "GICD_ISENABLER3,Interrupt set-enable register 3 SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_SE_95 ,Set Enable Bit 95" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " SPI_SE_94 ,Set Enable Bit 94" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " SPI_SE_93 ,Set Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_SE_92 ,Set Enable Bit 92" "Disabled,Enabled"
|
|
bitfld.long 0x0C 27. " SPI_SE_91 ,Set Enable Bit 91" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " SPI_SE_90 ,Set Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_SE_89 ,Set Enable Bit 89" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " SPI_SE_88 ,Set Enable Bit 88" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " SPI_SE_87 ,Set Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_SE_86 ,Set Enable Bit 86" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " SPI_SE_85 ,Set Enable Bit 85" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " SPI_SE_84 ,Set Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_SE_83 ,Set Enable Bit 83" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " SPI_SE_82 ,Set Enable Bit 82" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " SPI_SE_81 ,Set Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_SE_80 ,Set Enable Bit 80" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " SPI_SE_79 ,Set Enable Bit 79" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " SPI_SE_78 ,Set Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_SE_77 ,Set Enable Bit 77" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " SPI_SE_76 ,Set Enable Bit 76" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " SPI_SE_75 ,Set Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_SE_74 ,Set Enable Bit 74" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " SPI_SE_73 ,Set Enable Bit 73" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " SPI_SE_72 ,Set Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_SE_71 ,Set Enable Bit 71" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " SPI_SE_70 ,Set Enable Bit 70" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " SPI_SE_69 ,Set Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_SE_68 ,Set Enable Bit 68" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPI_SE_67 ,Set Enable Bit 67" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " SPI_SE_66 ,Set Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_SE_65 ,Set Enable Bit 65" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SPI_SE_64 ,Set Enable Bit 64" "Disabled,Enabled"
|
|
line.long 0x10 "GICD_ISENABLER4,Interrupt set-enable register 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_SE_127 ,Set Enable Bit 127" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " SPI_SE_126 ,Set Enable Bit 126" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " SPI_SE_125 ,Set Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_SE_124 ,Set Enable Bit 124" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " SPI_SE_123 ,Set Enable Bit 123" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " SPI_SE_122 ,Set Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_SE_121 ,Set Enable Bit 121" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " SPI_SE_120 ,Set Enable Bit 120" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " SPI_SE_119 ,Set Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_SE_118 ,Set Enable Bit 118" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " SPI_SE_117 ,Set Enable Bit 117" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " SPI_SE_116 ,Set Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_SE_115 ,Set Enable Bit 115" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " SPI_SE_114 ,Set Enable Bit 114" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " SPI_SE_113 ,Set Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_SE_112 ,Set Enable Bit 112" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " SPI_SE_111 ,Set Enable Bit 111" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " SPI_SE_110 ,Set Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_SE_109 ,Set Enable Bit 109" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " SPI_SE_108 ,Set Enable Bit 108" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " SPI_SE_107 ,Set Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_SE_106 ,Set Enable Bit 106" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " SPI_SE_105 ,Set Enable Bit 105" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " SPI_SE_104 ,Set Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_SE_103 ,Set Enable Bit 103" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " SPI_SE_102 ,Set Enable Bit 102" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " SPI_SE_101 ,Set Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_SE_100 ,Set Enable Bit 100" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " SPI_SE_99 ,Set Enable Bit 99" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SPI_SE_98 ,Set Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_SE_97 ,Set Enable Bit 97" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " SPI_SE_96 ,Set Enable Bit 96" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Clear-Enable"
|
|
group.long 0x180++0x13
|
|
line.long 0x00 "GICD_ICENABLER0,Interrupt clear-enable register 0 (SGI,PPI)"
|
|
bitfld.long 0x00 30. " PPI_CE_14 ,Clear-enable for PPI(14) [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x00 29. " PPI_CE_13 ,Clear-enable for PPI(13) [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x00 27. " PPI_CE_11 ,Clear-enable for PPI(11) [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_CE_10 ,Clear-enable for PPI(10) [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x00 25. " PPI_CE_9 ,Clear-enable for PPI(9) [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled"
|
|
line.long 0x04 "GICD_ICENABLER1,Interrupt clear-enable register 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_CE_31 ,Clear Enable Bit 31 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 30. " SPI_CE_30 ,Clear Enable Bit 30 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 29. " SPI_CE_29 ,Clear Enable Bit 29 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_CE_28 ,Clear Enable Bit 28 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 27. " SPI_CE_27 ,Clear Enable Bit 27 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 26. " SPI_CE_26 ,Clear Enable Bit 26 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_CE_25 ,Clear Enable Bit 25 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 24. " SPI_CE_24 ,Clear Enable Bit 24 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 23. " SPI_CE_23 ,Clear Enable Bit 23 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_CE_22 ,Clear Enable Bit 22 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 21. " SPI_CE_21 ,Clear Enable Bit 21 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 20. " SPI_CE_20 ,Clear Enable Bit 20 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_CE_19 ,Clear Enable Bit 19 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 18. " SPI_CE_18 ,Clear Enable Bit 18 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 17. " SPI_CE_17 ,Clear Enable Bit 17 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_CE_16 ,Clear Enable Bit 16 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 15. " SPI_CE_15 ,Clear Enable Bit 15 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 14. " SPI_CE_14 ,Clear Enable Bit 14 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_CE_13 ,Clear Enable Bit 13 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 12. " SPI_CE_12 ,Clear Enable Bit 12 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 11. " SPI_CE_11 ,Clear Enable Bit 11 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_CE_10 ,Clear Enable Bit 10 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 9. " SPI_CE_9 ,Clear Enable Bit 9 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 8. " SPI_CE_8 ,Clear Enable Bit 8 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_CE_7 ,Clear Enable Bit 7 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 6. " SPI_CE_6 ,Clear Enable Bit 6 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 5. " SPI_CE_5 ,Clear Enable Bit 5 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_CE_4 ,Clear Enable Bit 4 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 3. " SPI_CE_3 ,Clear Enable Bit 3 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 2. " SPI_CE_2 ,Clear Enable Bit 2 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_CE_1 ,Clear Enable Bit 1 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x04 0. " SPI_CE_0 ,Clear Enable Bit 0 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
line.long 0x08 "GICD_ICENABLER2,Interrupt clear-enable register 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_CE_63 ,Clear Enable Bit 63 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 30. " SPI_CE_62 ,Clear Enable Bit 62 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 29. " SPI_CE_61 ,Clear Enable Bit 61 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_CE_60 ,Clear Enable Bit 60 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 27. " SPI_CE_59 ,Clear Enable Bit 59 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 26. " SPI_CE_58 ,Clear Enable Bit 58 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_CE_57 ,Clear Enable Bit 57 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 24. " SPI_CE_56 ,Clear Enable Bit 56 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 23. " SPI_CE_55 ,Clear Enable Bit 55 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_CE_54 ,Clear Enable Bit 54 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 21. " SPI_CE_53 ,Clear Enable Bit 53 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 20. " SPI_CE_52 ,Clear Enable Bit 52 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_CE_51 ,Clear Enable Bit 51 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 18. " SPI_CE_50 ,Clear Enable Bit 50 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 17. " SPI_CE_49 ,Clear Enable Bit 49 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_CE_48 ,Clear Enable Bit 48 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 15. " SPI_CE_47 ,Clear Enable Bit 47 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 14. " SPI_CE_46 ,Clear Enable Bit 46 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_CE_45 ,Clear Enable Bit 45 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 12. " SPI_CE_44 ,Clear Enable Bit 44 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 11. " SPI_CE_43 ,Clear Enable Bit 43 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_CE_42 ,Clear Enable Bit 42 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 9. " SPI_CE_41 ,Clear Enable Bit 41 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 8. " SPI_CE_40 ,Clear Enable Bit 40 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_CE_39 ,Clear Enable Bit 39 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 6. " SPI_CE_38 ,Clear Enable Bit 38 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 5. " SPI_CE_37 ,Clear Enable Bit 37 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_CE_36 ,Clear Enable Bit 36 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 3. " SPI_CE_35 ,Clear Enable Bit 35 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 2. " SPI_CE_34 ,Clear Enable Bit 34 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_CE_33 ,Clear Enable Bit 33 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x08 0. " SPI_CE_32 ,Clear Enable Bit 32 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
line.long 0x0C "GICD_ICENABLER3,Interrupt clear-enable register 3 SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_CE_95 ,Clear Enable Bit 95 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 30. " SPI_CE_94 ,Clear Enable Bit 94 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 29. " SPI_CE_93 ,Clear Enable Bit 93 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_CE_92 ,Clear Enable Bit 92 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 27. " SPI_CE_91 ,Clear Enable Bit 91 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 26. " SPI_CE_90 ,Clear Enable Bit 90 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_CE_89 ,Clear Enable Bit 89 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 24. " SPI_CE_88 ,Clear Enable Bit 88 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 23. " SPI_CE_87 ,Clear Enable Bit 87 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_CE_86 ,Clear Enable Bit 86 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 21. " SPI_CE_85 ,Clear Enable Bit 85 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 20. " SPI_CE_84 ,Clear Enable Bit 84 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_CE_83 ,Clear Enable Bit 83 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 18. " SPI_CE_82 ,Clear Enable Bit 82 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 17. " SPI_CE_81 ,Clear Enable Bit 81 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_CE_80 ,Clear Enable Bit 80 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 15. " SPI_CE_79 ,Clear Enable Bit 79 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 14. " SPI_CE_78 ,Clear Enable Bit 78 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_CE_77 ,Clear Enable Bit 77 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 12. " SPI_CE_76 ,Clear Enable Bit 76 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 11. " SPI_CE_75 ,Clear Enable Bit 75 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_CE_74 ,Clear Enable Bit 74 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 9. " SPI_CE_73 ,Clear Enable Bit 73 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 8. " SPI_CE_72 ,Clear Enable Bit 72 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_CE_71 ,Clear Enable Bit 71 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 6. " SPI_CE_70 ,Clear Enable Bit 70 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 5. " SPI_CE_69 ,Clear Enable Bit 69 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_CE_68 ,Clear Enable Bit 68 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 3. " SPI_CE_67 ,Clear Enable Bit 67 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 2. " SPI_CE_66 ,Clear Enable Bit 66 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_CE_65 ,Clear Enable Bit 65 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x0C 0. " SPI_CE_64 ,Clear Enable Bit 64 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
line.long 0x10 "GICD_ICENABLER4,Interrupt clear-enable register 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_CE_127 ,Clear Enable Bit 127 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 30. " SPI_CE_126 ,Clear Enable Bit 126 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 29. " SPI_CE_125 ,Clear Enable Bit 125 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_CE_124 ,Clear Enable Bit 124 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 27. " SPI_CE_123 ,Clear Enable Bit 123 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 26. " SPI_CE_122 ,Clear Enable Bit 122 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_CE_121 ,Clear Enable Bit 121 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 24. " SPI_CE_120 ,Clear Enable Bit 120 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 23. " SPI_CE_119 ,Clear Enable Bit 119 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_CE_118 ,Clear Enable Bit 118 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 21. " SPI_CE_117 ,Clear Enable Bit 117 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 20. " SPI_CE_116 ,Clear Enable Bit 116 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_CE_115 ,Clear Enable Bit 115 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 18. " SPI_CE_114 ,Clear Enable Bit 114 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 17. " SPI_CE_113 ,Clear Enable Bit 113 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_CE_112 ,Clear Enable Bit 112 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 15. " SPI_CE_111 ,Clear Enable Bit 111 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 14. " SPI_CE_110 ,Clear Enable Bit 110 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_CE_109 ,Clear Enable Bit 109 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 12. " SPI_CE_108 ,Clear Enable Bit 108 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 11. " SPI_CE_107 ,Clear Enable Bit 107 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_CE_106 ,Clear Enable Bit 106 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 9. " SPI_CE_105 ,Clear Enable Bit 105 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 8. " SPI_CE_104 ,Clear Enable Bit 104 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_CE_103 ,Clear Enable Bit 103 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 6. " SPI_CE_102 ,Clear Enable Bit 102 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 5. " SPI_CE_101 ,Clear Enable Bit 101 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_CE_100 ,Clear Enable Bit 100 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 3. " SPI_CE_99 ,Clear Enable Bit 99 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 2. " SPI_CE_98 ,Clear Enable Bit 98 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_CE_97 ,Clear Enable Bit 97 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
bitfld.long 0x10 0. " SPI_CE_96 ,Clear Enable Bit 96 [read/write]" "Disabled/No effect,Enabled/Clear"
|
|
tree.end
|
|
tree "Interrupt Pending-Set"
|
|
group.long 0x200++0x013
|
|
line.long 0x00 "GICD_ISPENDR0,Interrupt pending-set register 0 (SGI,PPI)"
|
|
bitfld.long 0x00 30. " PPI_SP_14 ,Set-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_SP_13 ,Set-pending for PPI(13)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_SP_11 ,Set-pending for PPI(11)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_SP_10 ,Set-pending for PPI(10)" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PPI_SP_9 ,Set-pending for PPI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending"
|
|
rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending"
|
|
rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending"
|
|
rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending"
|
|
rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending"
|
|
rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending"
|
|
line.long 0x04 "GICD_ISPENDR1,Interrupt set-pending register 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_SP_31 ,Set Pending Bit 31" "Not pending,Pending"
|
|
bitfld.long 0x04 30. " SPI_SP_30 ,Set Pending Bit 30" "Not pending,Pending"
|
|
bitfld.long 0x04 29. " SPI_SP_29 ,Set Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_SP_28 ,Set Pending Bit 28" "Not pending,Pending"
|
|
bitfld.long 0x04 27. " SPI_SP_27 ,Set Pending Bit 27" "Not pending,Pending"
|
|
bitfld.long 0x04 26. " SPI_SP_26 ,Set Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_SP_25 ,Set Pending Bit 25" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " SPI_SP_24 ,Set Pending Bit 24" "Not pending,Pending"
|
|
bitfld.long 0x04 23. " SPI_SP_23 ,Set Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_SP_22 ,Set Pending Bit 22" "Not pending,Pending"
|
|
bitfld.long 0x04 21. " SPI_SP_21 ,Set Pending Bit 21" "Not pending,Pending"
|
|
bitfld.long 0x04 20. " SPI_SP_20 ,Set Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_SP_19 ,Set Pending Bit 19" "Not pending,Pending"
|
|
bitfld.long 0x04 18. " SPI_SP_18 ,Set Pending Bit 18" "Not pending,Pending"
|
|
bitfld.long 0x04 17. " SPI_SP_17 ,Set Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_SP_16 ,Set Pending Bit 16" "Not pending,Pending"
|
|
bitfld.long 0x04 15. " SPI_SP_15 ,Set Pending Bit 15" "Not pending,Pending"
|
|
bitfld.long 0x04 14. " SPI_SP_14 ,Set Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_SP_13 ,Set Pending Bit 13" "Not pending,Pending"
|
|
bitfld.long 0x04 12. " SPI_SP_12 ,Set Pending Bit 12" "Not pending,Pending"
|
|
bitfld.long 0x04 11. " SPI_SP_11 ,Set Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_SP_10 ,Set Pending Bit 10" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " SPI_SP_9 ,Set Pending Bit 9" "Not pending,Pending"
|
|
bitfld.long 0x04 8. " SPI_SP_8 ,Set Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_SP_7 ,Set Pending Bit 7" "Not pending,Pending"
|
|
bitfld.long 0x04 6. " SPI_SP_6 ,Set Pending Bit 6" "Not pending,Pending"
|
|
bitfld.long 0x04 5. " SPI_SP_5 ,Set Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_SP_4 ,Set Pending Bit 4" "Not pending,Pending"
|
|
bitfld.long 0x04 3. " SPI_SP_3 ,Set Pending Bit 3" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " SPI_SP_2 ,Set Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_SP_1 ,Set Pending Bit 1" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " SPI_SP_0 ,Set Pending Bit 0" "Not pending,Pending"
|
|
line.long 0x08 "GICD_ISPENDR2,Interrupt set-pending register 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_SP_63 ,Set Pending Bit 63" "Not pending,Pending"
|
|
bitfld.long 0x08 30. " SPI_SP_62 ,Set Pending Bit 62" "Not pending,Pending"
|
|
bitfld.long 0x08 29. " SPI_SP_61 ,Set Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_SP_60 ,Set Pending Bit 60" "Not pending,Pending"
|
|
bitfld.long 0x08 27. " SPI_SP_59 ,Set Pending Bit 59" "Not pending,Pending"
|
|
bitfld.long 0x08 26. " SPI_SP_58 ,Set Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_SP_57 ,Set Pending Bit 57" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " SPI_SP_56 ,Set Pending Bit 56" "Not pending,Pending"
|
|
bitfld.long 0x08 23. " SPI_SP_55 ,Set Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_SP_54 ,Set Pending Bit 54" "Not pending,Pending"
|
|
bitfld.long 0x08 21. " SPI_SP_53 ,Set Pending Bit 53" "Not pending,Pending"
|
|
bitfld.long 0x08 20. " SPI_SP_52 ,Set Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_SP_51 ,Set Pending Bit 51" "Not pending,Pending"
|
|
bitfld.long 0x08 18. " SPI_SP_50 ,Set Pending Bit 50" "Not pending,Pending"
|
|
bitfld.long 0x08 17. " SPI_SP_49 ,Set Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_SP_48 ,Set Pending Bit 48" "Not pending,Pending"
|
|
bitfld.long 0x08 15. " SPI_SP_47 ,Set Pending Bit 47" "Not pending,Pending"
|
|
bitfld.long 0x08 14. " SPI_SP_46 ,Set Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_SP_45 ,Set Pending Bit 45" "Not pending,Pending"
|
|
bitfld.long 0x08 12. " SPI_SP_44 ,Set Pending Bit 44" "Not pending,Pending"
|
|
bitfld.long 0x08 11. " SPI_SP_43 ,Set Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_SP_42 ,Set Pending Bit 42" "Not pending,Pending"
|
|
bitfld.long 0x08 9. " SPI_SP_41 ,Set Pending Bit 41" "Not pending,Pending"
|
|
bitfld.long 0x08 8. " SPI_SP_40 ,Set Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_SP_39 ,Set Pending Bit 39" "Not pending,Pending"
|
|
bitfld.long 0x08 6. " SPI_SP_38 ,Set Pending Bit 38" "Not pending,Pending"
|
|
bitfld.long 0x08 5. " SPI_SP_37 ,Set Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_SP_36 ,Set Pending Bit 36" "Not pending,Pending"
|
|
bitfld.long 0x08 3. " SPI_SP_35 ,Set Pending Bit 35" "Not pending,Pending"
|
|
bitfld.long 0x08 2. " SPI_SP_34 ,Set Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_SP_33 ,Set Pending Bit 33" "Not pending,Pending"
|
|
bitfld.long 0x08 0. " SPI_SP_32 ,Set Pending Bit 32" "Not pending,Pending"
|
|
line.long 0x0C "GICD_ISPENDR3,Interrupt set-pending register 3 [95:64]"
|
|
bitfld.long 0x0C 31. " SPI_SP_95 ,Set Pending Bit 95" "Not pending,Pending"
|
|
bitfld.long 0x0C 30. " SPI_SP_94 ,Set Pending Bit 94" "Not pending,Pending"
|
|
bitfld.long 0x0C 29. " SPI_SP_93 ,Set Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_SP_92 ,Set Pending Bit 92" "Not pending,Pending"
|
|
bitfld.long 0x0C 27. " SPI_SP_91 ,Set Pending Bit 91" "Not pending,Pending"
|
|
bitfld.long 0x0C 26. " SPI_SP_90 ,Set Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_SP_89 ,Set Pending Bit 89" "Not pending,Pending"
|
|
bitfld.long 0x0C 24. " SPI_SP_88 ,Set Pending Bit 88" "Not pending,Pending"
|
|
bitfld.long 0x0C 23. " SPI_SP_87 ,Set Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_SP_86 ,Set Pending Bit 86" "Not pending,Pending"
|
|
bitfld.long 0x0C 21. " SPI_SP_85 ,Set Pending Bit 85" "Not pending,Pending"
|
|
bitfld.long 0x0C 20. " SPI_SP_84 ,Set Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_SP_83 ,Set Pending Bit 83" "Not pending,Pending"
|
|
bitfld.long 0x0C 18. " SPI_SP_82 ,Set Pending Bit 82" "Not pending,Pending"
|
|
bitfld.long 0x0C 17. " SPI_SP_81 ,Set Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_SP_80 ,Set Pending Bit 80" "Not pending,Pending"
|
|
bitfld.long 0x0C 15. " SPI_SP_79 ,Set Pending Bit 79" "Not pending,Pending"
|
|
bitfld.long 0x0C 14. " SPI_SP_78 ,Set Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_SP_77 ,Set Pending Bit 77" "Not pending,Pending"
|
|
bitfld.long 0x0C 12. " SPI_SP_76 ,Set Pending Bit 76" "Not pending,Pending"
|
|
bitfld.long 0x0C 11. " SPI_SP_75 ,Set Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_SP_74 ,Set Pending Bit 74" "Not pending,Pending"
|
|
bitfld.long 0x0C 9. " SPI_SP_73 ,Set Pending Bit 73" "Not pending,Pending"
|
|
bitfld.long 0x0C 8. " SPI_SP_72 ,Set Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_SP_71 ,Set Pending Bit 71" "Not pending,Pending"
|
|
bitfld.long 0x0C 6. " SPI_SP_70 ,Set Pending Bit 70" "Not pending,Pending"
|
|
bitfld.long 0x0C 5. " SPI_SP_69 ,Set Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_SP_68 ,Set Pending Bit 68" "Not pending,Pending"
|
|
bitfld.long 0x0C 3. " SPI_SP_67 ,Set Pending Bit 67" "Not pending,Pending"
|
|
bitfld.long 0x0C 2. " SPI_SP_66 ,Set Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_SP_65 ,Set Pending Bit 65" "Not pending,Pending"
|
|
bitfld.long 0x0C 0. " SPI_SP_64 ,Set Pending Bit 64" "Not pending,Pending"
|
|
line.long 0x10 "GICD_ISPENDR4,Interrupt set-pending register 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_SP_127 ,Set Pending Bit 127" "Not pending,Pending"
|
|
bitfld.long 0x10 30. " SPI_SP_126 ,Set Pending Bit 126" "Not pending,Pending"
|
|
bitfld.long 0x10 29. " SPI_SP_125 ,Set Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_SP_124 ,Set Pending Bit 124" "Not pending,Pending"
|
|
bitfld.long 0x10 27. " SPI_SP_123 ,Set Pending Bit 123" "Not pending,Pending"
|
|
bitfld.long 0x10 26. " SPI_SP_122 ,Set Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_SP_121 ,Set Pending Bit 121" "Not pending,Pending"
|
|
bitfld.long 0x10 24. " SPI_SP_120 ,Set Pending Bit 120" "Not pending,Pending"
|
|
bitfld.long 0x10 23. " SPI_SP_119 ,Set Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_SP_118 ,Set Pending Bit 118" "Not pending,Pending"
|
|
bitfld.long 0x10 21. " SPI_SP_117 ,Set Pending Bit 117" "Not pending,Pending"
|
|
bitfld.long 0x10 20. " SPI_SP_116 ,Set Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_SP_115 ,Set Pending Bit 115" "Not pending,Pending"
|
|
bitfld.long 0x10 18. " SPI_SP_114 ,Set Pending Bit 114" "Not pending,Pending"
|
|
bitfld.long 0x10 17. " SPI_SP_113 ,Set Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_SP_112 ,Set Pending Bit 112" "Not pending,Pending"
|
|
bitfld.long 0x10 15. " SPI_SP_111 ,Set Pending Bit 111" "Not pending,Pending"
|
|
bitfld.long 0x10 14. " SPI_SP_110 ,Set Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_SP_109 ,Set Pending Bit 109" "Not pending,Pending"
|
|
bitfld.long 0x10 12. " SPI_SP_108 ,Set Pending Bit 108" "Not pending,Pending"
|
|
bitfld.long 0x10 11. " SPI_SP_107 ,Set Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_SP_106 ,Set Pending Bit 106" "Not pending,Pending"
|
|
bitfld.long 0x10 9. " SPI_SP_105 ,Set Pending Bit 105" "Not pending,Pending"
|
|
bitfld.long 0x10 8. " SPI_SP_104 ,Set Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_SP_103 ,Set Pending Bit 103" "Not pending,Pending"
|
|
bitfld.long 0x10 6. " SPI_SP_102 ,Set Pending Bit 102" "Not pending,Pending"
|
|
bitfld.long 0x10 5. " SPI_SP_101 ,Set Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_SP_100 ,Set Pending Bit 100" "Not pending,Pending"
|
|
bitfld.long 0x10 3. " SPI_SP_99 ,Set Pending Bit 99" "Not pending,Pending"
|
|
bitfld.long 0x10 2. " SPI_SP_98 ,Set Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_SP_97 ,Set Pending Bit 97" "Not pending,Pending"
|
|
bitfld.long 0x10 0. " SPI_SP_96 ,Set Pending Bit 96" "Not pending,Pending"
|
|
tree.end
|
|
tree "Interrupt Pending-Clear"
|
|
group.long 0x280++0x13
|
|
line.long 0x00 "GICD_ICPENDR0,Interrupt pending-clear register 0 (SGI,PPI)"
|
|
bitfld.long 0x00 30. " PPI_CP14 ,Clear-pending for PPI(14) [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 29. " PPI_CP13 ,Clear-pending for PPI(13) [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 27. " PPI_CP11 ,Clear-pending for PPI(11) [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_CP10 ,Clear-pending for PPI(10) [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 25. " PPI_CP9 ,Clear-pending for PPI(9) [read/write]" "Not pending/No effect,Pending/Clear"
|
|
rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending"
|
|
rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending"
|
|
rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending"
|
|
rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending"
|
|
rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending"
|
|
rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending"
|
|
line.long 0x04 "GICD_ICPENDR1,Interrupt clear-pending register 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_CP31 ,Clear Pending/Clear Bit 31 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 30. " SPI_CP30 ,Clear Pending/Clear Bit 30 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 29. " SPI_CP29 ,Clear Pending/Clear Bit 29 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_CP28 ,Clear Pending/Clear Bit 28 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 27. " SPI_CP27 ,Clear Pending/Clear Bit 27 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 26. " SPI_CP26 ,Clear Pending/Clear Bit 26 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_CP25 ,Clear Pending/Clear Bit 25 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 24. " SPI_CP24 ,Clear Pending/Clear Bit 24 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 23. " SPI_CP23 ,Clear Pending/Clear Bit 23 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_CP22 ,Clear Pending/Clear Bit 22 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 21. " SPI_CP21 ,Clear Pending/Clear Bit 21 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 20. " SPI_CP20 ,Clear Pending/Clear Bit 20 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_CP19 ,Clear Pending/Clear Bit 19 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 18. " SPI_CP18 ,Clear Pending/Clear Bit 18 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 17. " SPI_CP17 ,Clear Pending/Clear Bit 17 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_CP16 ,Clear Pending/Clear Bit 16 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 15. " SPI_CP15 ,Clear Pending/Clear Bit 15 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 14. " SPI_CP14 ,Clear Pending/Clear Bit 14 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_CP13 ,Clear Pending/Clear Bit 13 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 12. " SPI_CP12 ,Clear Pending/Clear Bit 12 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 11. " SPI_CP11 ,Clear Pending/Clear Bit 11 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_CP10 ,Clear Pending/Clear Bit 10 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 9. " SPI_CP9 ,Clear Pending/Clear Bit 9 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 8. " SPI_CP8 ,Clear Pending/Clear Bit 8 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_CP7 ,Clear Pending/Clear Bit 7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 6. " SPI_CP6 ,Clear Pending/Clear Bit 6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 5. " SPI_CP5 ,Clear Pending/Clear Bit 5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_CP4 ,Clear Pending/Clear Bit 4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 3. " SPI_CP3 ,Clear Pending/Clear Bit 3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 2. " SPI_CP2 ,Clear Pending/Clear Bit 2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_CP1 ,Clear Pending/Clear Bit 1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 0. " SPI_CP0 ,Clear Pending/Clear Bit 0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x08 "GICD_ICPENDR2,Interrupt clear-pending register 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_CP63 ,Clear Pending/Clear Bit 63 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 30. " SPI_CP62 ,Clear Pending/Clear Bit 62 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 29. " SPI_CP61 ,Clear Pending/Clear Bit 61 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_CP60 ,Clear Pending/Clear Bit 60 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 27. " SPI_CP59 ,Clear Pending/Clear Bit 59 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 26. " SPI_CP58 ,Clear Pending/Clear Bit 58 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_CP57 ,Clear Pending/Clear Bit 57 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 24. " SPI_CP56 ,Clear Pending/Clear Bit 56 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 23. " SPI_CP55 ,Clear Pending/Clear Bit 55 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_CP54 ,Clear Pending/Clear Bit 54 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 21. " SPI_CP53 ,Clear Pending/Clear Bit 53 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 20. " SPI_CP52 ,Clear Pending/Clear Bit 52 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_CP51 ,Clear Pending/Clear Bit 51 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 18. " SPI_CP50 ,Clear Pending/Clear Bit 50 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 17. " SPI_CP49 ,Clear Pending/Clear Bit 49 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_CP48 ,Clear Pending/Clear Bit 48 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 15. " SPI_CP47 ,Clear Pending/Clear Bit 47 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 14. " SPI_CP46 ,Clear Pending/Clear Bit 46 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_CP45 ,Clear Pending/Clear Bit 45 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 12. " SPI_CP44 ,Clear Pending/Clear Bit 44 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 11. " SPI_CP43 ,Clear Pending/Clear Bit 43 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_CP42 ,Clear Pending/Clear Bit 42 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 9. " SPI_CP41 ,Clear Pending/Clear Bit 41 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 8. " SPI_CP40 ,Clear Pending/Clear Bit 40 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_CP39 ,Clear Pending/Clear Bit 39 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 6. " SPI_CP38 ,Clear Pending/Clear Bit 38 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 5. " SPI_CP37 ,Clear Pending/Clear Bit 37 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_CP36 ,Clear Pending/Clear Bit 36 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 3. " SPI_CP35 ,Clear Pending/Clear Bit 35 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 2. " SPI_CP34 ,Clear Pending/Clear Bit 34 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_CP33 ,Clear Pending/Clear Bit 33 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 0. " SPI_CP32 ,Clear Pending/Clear Bit 32 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x0C "GICD_ICPENDR3,Interrupt clear-pending register 3 [95:64]"
|
|
bitfld.long 0x0C 31. " SPI_CP95 ,Clear Pending/Clear Bit 95 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 30. " SPI_CP94 ,Clear Pending/Clear Bit 94 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 29. " SPI_CP93 ,Clear Pending/Clear Bit 93 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_CP92 ,Clear Pending/Clear Bit 92 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 27. " SPI_CP91 ,Clear Pending/Clear Bit 91 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 26. " SPI_CP90 ,Clear Pending/Clear Bit 90 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_CP89 ,Clear Pending/Clear Bit 89 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 24. " SPI_CP88 ,Clear Pending/Clear Bit 88 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 23. " SPI_CP87 ,Clear Pending/Clear Bit 87 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_CP86 ,Clear Pending/Clear Bit 86 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 21. " SPI_CP85 ,Clear Pending/Clear Bit 85 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 20. " SPI_CP84 ,Clear Pending/Clear Bit 84 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_CP83 ,Clear Pending/Clear Bit 83 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 18. " SPI_CP82 ,Clear Pending/Clear Bit 82 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 17. " SPI_CP81 ,Clear Pending/Clear Bit 81 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_CP80 ,Clear Pending/Clear Bit 80 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 15. " SPI_CP79 ,Clear Pending/Clear Bit 79 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 14. " SPI_CP78 ,Clear Pending/Clear Bit 78 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_CP77 ,Clear Pending/Clear Bit 77 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 12. " SPI_CP76 ,Clear Pending/Clear Bit 76 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 11. " SPI_CP75 ,Clear Pending/Clear Bit 75 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_CP74 ,Clear Pending/Clear Bit 74 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 9. " SPI_CP73 ,Clear Pending/Clear Bit 73 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 8. " SPI_CP72 ,Clear Pending/Clear Bit 72 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_CP71 ,Clear Pending/Clear Bit 71 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 6. " SPI_CP70 ,Clear Pending/Clear Bit 70 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 5. " SPI_CP69 ,Clear Pending/Clear Bit 69 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_CP68 ,Clear Pending/Clear Bit 68 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 3. " SPI_CP67 ,Clear Pending/Clear Bit 67 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 2. " SPI_CP66 ,Clear Pending/Clear Bit 66 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_CP65 ,Clear Pending/Clear Bit 65 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 0. " SPI_CP64 ,Clear Pending/Clear Bit 64 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x10 "GICD_ICPENDR4,Interrupt clear-pending register 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_CP127 ,Clear Pending/Clear Bit 127 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 30. " SPI_CP126 ,Clear Pending/Clear Bit 126 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 29. " SPI_CP125 ,Clear Pending/Clear Bit 125 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_CP124 ,Clear Pending/Clear Bit 124 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 27. " SPI_CP123 ,Clear Pending/Clear Bit 123 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 26. " SPI_CP122 ,Clear Pending/Clear Bit 122 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_CP121 ,Clear Pending/Clear Bit 121 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 24. " SPI_CP120 ,Clear Pending/Clear Bit 120 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 23. " SPI_CP119 ,Clear Pending/Clear Bit 119 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_CP118 ,Clear Pending/Clear Bit 118 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 21. " SPI_CP117 ,Clear Pending/Clear Bit 117 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 20. " SPI_CP116 ,Clear Pending/Clear Bit 116 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_CP115 ,Clear Pending/Clear Bit 115 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 18. " SPI_CP114 ,Clear Pending/Clear Bit 114 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 17. " SPI_CP113 ,Clear Pending/Clear Bit 113 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_CP112 ,Clear Pending/Clear Bit 112 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 15. " SPI_CP111 ,Clear Pending/Clear Bit 111 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 14. " SPI_CP110 ,Clear Pending/Clear Bit 110 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_CP109 ,Clear Pending/Clear Bit 109 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 12. " SPI_CP108 ,Clear Pending/Clear Bit 108 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 11. " SPI_CP107 ,Clear Pending/Clear Bit 107 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_CP106 ,Clear Pending/Clear Bit 106 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 9. " SPI_CP105 ,Clear Pending/Clear Bit 105 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 8. " SPI_CP104 ,Clear Pending/Clear Bit 104 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_CP103 ,Clear Pending/Clear Bit 103 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 6. " SPI_CP102 ,Clear Pending/Clear Bit 102 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 5. " SPI_CP101 ,Clear Pending/Clear Bit 101 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_CP100 ,Clear Pending/Clear Bit 100 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 3. " SPI_CP99 ,Clear Pending/Clear Bit 99 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 2. " SPI_CP98 ,Clear Pending/Clear Bit 98 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_CP97 ,Clear Pending/Clear Bit 97 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x10 0. " SPI_CP96 ,Clear Pending/Clear Bit 96 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
tree.end
|
|
tree "Active Status"
|
|
group.long 0x300++0x13
|
|
line.long 0x00 "GICD_ISACTIVER0,Interrupt set-active register 0 (SGI/PPI)"
|
|
bitfld.long 0x00 30. " PPI_AS_14 ,Set-active bit for PPI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 29. " PPI_AS_13 ,Set-active bit for PPI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 27. " PPI_AS_11 ,Set-active bit for PPI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PPI_AS_10 ,Set-active bit for PPI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 25. " PPI_AS_9 ,Set-active bit for PPI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 15. " SGI_AS_15 ,Set-active bit for SGI(15)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SGI_AS_14 ,Set-active bit for SGI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 13. " SGI_AS_13 ,Set-active bit for SGI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 12. " SGI_AS_12 ,Set-active bit for SGI(12)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SGI_AS_11 ,Set-active bit for SGI(11)" "Inactive,Active"
|
|
bitfld.long 0x00 10. " SGI_AS_10 ,Set-active bit for SGI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 9. " SGI_AS_9 ,Set-active bit for SGI(9)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SGI_AS_8 ,Set-active bit for SGI(8)" "Inactive,Active"
|
|
bitfld.long 0x00 7. " SGI_AS_7 ,Set-active bit for SGI(7)" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SGI_AS_6 ,Set-active bit for SGI(6)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SGI_AS_5 ,Set-active bit for SGI(5)" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SGI_AS_4 ,Set-active bit for SGI(4)" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SGI_AS_3 ,Set-active bit for SGI(3)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SGI_AS_2 ,Set-active bit for SGI(2)" "Inactive,Active"
|
|
bitfld.long 0x00 1. " SGI_AS_1 ,Set-active bit for SGI(1)" "Inactive,Active"
|
|
bitfld.long 0x00 0. " SGI_AS_0 ,Set-active bit for SGI(0)" "Inactive,Active"
|
|
line.long 0x04 "GICD_ISACTIVER1,Interrupt set-active register 1 SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_AS_31 ,Set-active bit for SPI(31)" "Inactive,Active"
|
|
bitfld.long 0x04 30. " SPI_AS_30 ,Set-active bit for SPI(30)" "Inactive,Active"
|
|
bitfld.long 0x04 29. " SPI_AS_29 ,Set-active bit for SPI(29)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_AS_28 ,Set-active bit for SPI(28)" "Inactive,Active"
|
|
bitfld.long 0x04 27. " SPI_AS_27 ,Set-active bit for SPI(27)" "Inactive,Active"
|
|
bitfld.long 0x04 26. " SPI_AS_26 ,Set-active bit for SPI(26)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_AS_25 ,Set-active bit for SPI(25)" "Inactive,Active"
|
|
bitfld.long 0x04 24. " SPI_AS_24 ,Set-active bit for SPI(24)" "Inactive,Active"
|
|
bitfld.long 0x04 23. " SPI_AS_23 ,Set-active bit for SPI(23)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_AS_22 ,Set-active bit for SPI(22)" "Inactive,Active"
|
|
bitfld.long 0x04 21. " SPI_AS_21 ,Set-active bit for SPI(21)" "Inactive,Active"
|
|
bitfld.long 0x04 20. " SPI_AS_20 ,Set-active bit for SPI(20)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_AS_19 ,Set-active bit for SPI(19)" "Inactive,Active"
|
|
bitfld.long 0x04 18. " SPI_AS_18 ,Set-active bit for SPI(18)" "Inactive,Active"
|
|
bitfld.long 0x04 17. " SPI_AS_17 ,Set-active bit for SPI(17)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_AS_16 ,Set-active bit for SPI(16)" "Inactive,Active"
|
|
bitfld.long 0x04 15. " SPI_AS_15 ,Set-active bit for SPI(15)" "Inactive,Active"
|
|
bitfld.long 0x04 14. " SPI_AS_14 ,Set-active bit for SPI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_AS_13 ,Set-active bit for SPI(13)" "Inactive,Active"
|
|
bitfld.long 0x04 12. " SPI_AS_12 ,Set-active bit for SPI(12)" "Inactive,Active"
|
|
bitfld.long 0x04 11. " SPI_AS_11 ,Set-active bit for SPI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_AS_10 ,Set-active bit for SPI(10)" "Inactive,Active"
|
|
bitfld.long 0x04 9. " SPI_AS_9 ,Set-active bit for SPI(9)" "Inactive,Active"
|
|
bitfld.long 0x04 8. " SPI_AS_8 ,Set-active bit for SPI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_AS_7 ,Set-active bit for SPI(7)" "Inactive,Active"
|
|
bitfld.long 0x04 6. " SPI_AS_6 ,Set-active bit for SPI(6)" "Inactive,Active"
|
|
bitfld.long 0x04 5. " SPI_AS_5 ,Set-active bit for SPI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_AS_4 ,Set-active bit for SPI(4)" "Inactive,Active"
|
|
bitfld.long 0x04 3. " SPI_AS_3 ,Set-active bit for SPI(3)" "Inactive,Active"
|
|
bitfld.long 0x04 2. " SPI_AS_2 ,Set-active bit for SPI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_AS_1 ,Set-active bit for SPI(1)" "Inactive,Active"
|
|
bitfld.long 0x04 0. " SPI_AS_0 ,Set-active bit for SPI(0)" "Inactive,Active"
|
|
line.long 0x08 "GICD_ISACTIVER2,Interrupt set-active register 2 SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_AS_63 ,Set-active bit for SPI(63)" "Inactive,Active"
|
|
bitfld.long 0x08 30. " SPI_AS_62 ,Set-active bit for SPI(62)" "Inactive,Active"
|
|
bitfld.long 0x08 29. " SPI_AS_61 ,Set-active bit for SPI(61)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_AS_60 ,Set-active bit for SPI(60)" "Inactive,Active"
|
|
bitfld.long 0x08 27. " SPI_AS_59 ,Set-active bit for SPI(59)" "Inactive,Active"
|
|
bitfld.long 0x08 26. " SPI_AS_58 ,Set-active bit for SPI(58)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_AS_57 ,Set-active bit for SPI(57)" "Inactive,Active"
|
|
bitfld.long 0x08 24. " SPI_AS_56 ,Set-active bit for SPI(56)" "Inactive,Active"
|
|
bitfld.long 0x08 23. " SPI_AS_55 ,Set-active bit for SPI(55)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_AS_54 ,Set-active bit for SPI(54)" "Inactive,Active"
|
|
bitfld.long 0x08 21. " SPI_AS_53 ,Set-active bit for SPI(53)" "Inactive,Active"
|
|
bitfld.long 0x08 20. " SPI_AS_52 ,Set-active bit for SPI(52)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_AS_51 ,Set-active bit for SPI(51)" "Inactive,Active"
|
|
bitfld.long 0x08 18. " SPI_AS_50 ,Set-active bit for SPI(50)" "Inactive,Active"
|
|
bitfld.long 0x08 17. " SPI_AS_49 ,Set-active bit for SPI(49)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_AS_48 ,Set-active bit for SPI(48)" "Inactive,Active"
|
|
bitfld.long 0x08 15. " SPI_AS_47 ,Set-active bit for SPI(47)" "Inactive,Active"
|
|
bitfld.long 0x08 14. " SPI_AS_46 ,Set-active bit for SPI(46)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_AS_45 ,Set-active bit for SPI(45)" "Inactive,Active"
|
|
bitfld.long 0x08 12. " SPI_AS_44 ,Set-active bit for SPI(44)" "Inactive,Active"
|
|
bitfld.long 0x08 11. " SPI_AS_43 ,Set-active bit for SPI(43)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_AS_42 ,Set-active bit for SPI(42)" "Inactive,Active"
|
|
bitfld.long 0x08 9. " SPI_AS_41 ,Set-active bit for SPI(41)" "Inactive,Active"
|
|
bitfld.long 0x08 8. " SPI_AS_40 ,Set-active bit for SPI(40)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_AS_39 ,Set-active bit for SPI(39)" "Inactive,Active"
|
|
bitfld.long 0x08 6. " SPI_AS_38 ,Set-active bit for SPI(38)" "Inactive,Active"
|
|
bitfld.long 0x08 5. " SPI_AS_37 ,Set-active bit for SPI(37)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_AS_36 ,Set-active bit for SPI(36)" "Inactive,Active"
|
|
bitfld.long 0x08 3. " SPI_AS_35 ,Set-active bit for SPI(35)" "Inactive,Active"
|
|
bitfld.long 0x08 2. " SPI_AS_34 ,Set-active bit for SPI(34)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_AS_33 ,Set-active bit for SPI(33)" "Inactive,Active"
|
|
bitfld.long 0x08 0. " SPI_AS_32 ,Set-active bit for SPI(32)" "Inactive,Active"
|
|
line.long 0x0C "GICD_ISACTIVER3,Interrupt set-active register 3 SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_AS_95 ,Set-active bit for SPI(95)" "Inactive,Active"
|
|
bitfld.long 0x0C 30. " SPI_AS_94 ,Set-active bit for SPI(94)" "Inactive,Active"
|
|
bitfld.long 0x0C 29. " SPI_AS_93 ,Set-active bit for SPI(93)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_AS_92 ,Set-active bit for SPI(92)" "Inactive,Active"
|
|
bitfld.long 0x0C 27. " SPI_AS_91 ,Set-active bit for SPI(91)" "Inactive,Active"
|
|
bitfld.long 0x0C 26. " SPI_AS_90 ,Set-active bit for SPI(90)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_AS_89 ,Set-active bit for SPI(89)" "Inactive,Active"
|
|
bitfld.long 0x0C 24. " SPI_AS_88 ,Set-active bit for SPI(88)" "Inactive,Active"
|
|
bitfld.long 0x0C 23. " SPI_AS_87 ,Set-active bit for SPI(87)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_AS_86 ,Set-active bit for SPI(86)" "Inactive,Active"
|
|
bitfld.long 0x0C 21. " SPI_AS_85 ,Set-active bit for SPI(85)" "Inactive,Active"
|
|
bitfld.long 0x0C 20. " SPI_AS_84 ,Set-active bit for SPI(84)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_AS_83 ,Set-active bit for SPI(83)" "Inactive,Active"
|
|
bitfld.long 0x0C 18. " SPI_AS_82 ,Set-active bit for SPI(82)" "Inactive,Active"
|
|
bitfld.long 0x0C 17. " SPI_AS_81 ,Set-active bit for SPI(81)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_AS_80 ,Set-active bit for SPI(80)" "Inactive,Active"
|
|
bitfld.long 0x0C 15. " SPI_AS_79 ,Set-active bit for SPI(79)" "Inactive,Active"
|
|
bitfld.long 0x0C 14. " SPI_AS_78 ,Set-active bit for SPI(78)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_AS_77 ,Set-active bit for SPI(77)" "Inactive,Active"
|
|
bitfld.long 0x0C 12. " SPI_AS_76 ,Set-active bit for SPI(76)" "Inactive,Active"
|
|
bitfld.long 0x0C 11. " SPI_AS_75 ,Set-active bit for SPI(75)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_AS_74 ,Set-active bit for SPI(74)" "Inactive,Active"
|
|
bitfld.long 0x0C 9. " SPI_AS_73 ,Set-active bit for SPI(73)" "Inactive,Active"
|
|
bitfld.long 0x0C 8. " SPI_AS_72 ,Set-active bit for SPI(72)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_AS_71 ,Set-active bit for SPI(71)" "Inactive,Active"
|
|
bitfld.long 0x0C 6. " SPI_AS_70 ,Set-active bit for SPI(70)" "Inactive,Active"
|
|
bitfld.long 0x0C 5. " SPI_AS_69 ,Set-active bit for SPI(69)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_AS_68 ,Set-active bit for SPI(68)" "Inactive,Active"
|
|
bitfld.long 0x0C 3. " SPI_AS_67 ,Set-active bit for SPI(67)" "Inactive,Active"
|
|
bitfld.long 0x0C 2. " SPI_AS_66 ,Set-active bit for SPI(66)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_AS_65 ,Set-active bit for SPI(65)" "Inactive,Active"
|
|
bitfld.long 0x0C 0. " SPI_AS_64 ,Set-active bit for SPI(64)" "Inactive,Active"
|
|
line.long 0x10 "GICD_ISACTIVER4,Interrupt set-active register 4 SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_AS_127 ,Set-active bit for SPI(127)" "Inactive,Active"
|
|
bitfld.long 0x10 30. " SPI_AS_126 ,Set-active bit for SPI(126)" "Inactive,Active"
|
|
bitfld.long 0x10 29. " SPI_AS_125 ,Set-active bit for SPI(125)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_AS_124 ,Set-active bit for SPI(124)" "Inactive,Active"
|
|
bitfld.long 0x10 27. " SPI_AS_123 ,Set-active bit for SPI(123)" "Inactive,Active"
|
|
bitfld.long 0x10 26. " SPI_AS_122 ,Set-active bit for SPI(122)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_AS_121 ,Set-active bit for SPI(121)" "Inactive,Active"
|
|
bitfld.long 0x10 24. " SPI_AS_120 ,Set-active bit for SPI(120)" "Inactive,Active"
|
|
bitfld.long 0x10 23. " SPI_AS_119 ,Set-active bit for SPI(119)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_AS_118 ,Set-active bit for SPI(118)" "Inactive,Active"
|
|
bitfld.long 0x10 21. " SPI_AS_117 ,Set-active bit for SPI(117)" "Inactive,Active"
|
|
bitfld.long 0x10 20. " SPI_AS_116 ,Set-active bit for SPI(116)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_AS_115 ,Set-active bit for SPI(115)" "Inactive,Active"
|
|
bitfld.long 0x10 18. " SPI_AS_114 ,Set-active bit for SPI(114)" "Inactive,Active"
|
|
bitfld.long 0x10 17. " SPI_AS_113 ,Set-active bit for SPI(113)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_AS_112 ,Set-active bit for SPI(112)" "Inactive,Active"
|
|
bitfld.long 0x10 15. " SPI_AS_111 ,Set-active bit for SPI(111)" "Inactive,Active"
|
|
bitfld.long 0x10 14. " SPI_AS_110 ,Set-active bit for SPI(110)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_AS_109 ,Set-active bit for SPI(109)" "Inactive,Active"
|
|
bitfld.long 0x10 12. " SPI_AS_108 ,Set-active bit for SPI(108)" "Inactive,Active"
|
|
bitfld.long 0x10 11. " SPI_AS_107 ,Set-active bit for SPI(107)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_AS_106 ,Set-active bit for SPI(106)" "Inactive,Active"
|
|
bitfld.long 0x10 9. " SPI_AS_105 ,Set-active bit for SPI(105)" "Inactive,Active"
|
|
bitfld.long 0x10 8. " SPI_AS_104 ,Set-active bit for SPI(104)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_AS_103 ,Set-active bit for SPI(103)" "Inactive,Active"
|
|
bitfld.long 0x10 6. " SPI_AS_102 ,Set-active bit for SPI(102)" "Inactive,Active"
|
|
bitfld.long 0x10 5. " SPI_AS_101 ,Set-active bit for SPI(101)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_AS_100 ,Set-active bit for SPI(100)" "Inactive,Active"
|
|
bitfld.long 0x10 3. " SPI_AS_99 ,Set-active bit for SPI(99)" "Inactive,Active"
|
|
bitfld.long 0x10 2. " SPI_AS_98 ,Set-active bit for SPI(98)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_AS_97 ,Set-active bit for SPI(97)" "Inactive,Active"
|
|
bitfld.long 0x10 0. " SPI_AS_96 ,Set-active bit for SPI(96)" "Inactive,Active"
|
|
group.long 0x380++0x13
|
|
line.long 0x00 "GICD_ICACTIVER0,Interrupt clear-active register 0 (SGI/PPI)"
|
|
eventfld.long 0x00 30. " PPI_CS_14 ,Clear-active bit for PPI(14)" "Inactive,Active"
|
|
eventfld.long 0x00 29. " PPI_CS_13 ,Clear-active bit for PPI(13)" "Inactive,Active"
|
|
eventfld.long 0x00 27. " PPI_CS_11 ,Clear-active bit for PPI(11)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 26. " PPI_CS_10 ,Clear-active bit for PPI(10)" "Inactive,Active"
|
|
eventfld.long 0x00 25. " PPI_CS_9 ,Clear-active bit for PPI(9)" "Inactive,Active"
|
|
eventfld.long 0x00 15. " SGI_CS_15 ,Clear-active bit for SGI(15)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 14. " SGI_CS_14 ,Clear-active bit for SGI(14)" "Inactive,Active"
|
|
eventfld.long 0x00 13. " SGI_CS_13 ,Clear-active bit for SGI(13)" "Inactive,Active"
|
|
eventfld.long 0x00 12. " SGI_CS_12 ,Clear-active bit for SGI(12)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 11. " SGI_CS_11 ,Clear-active bit for SGI(11)" "Inactive,Active"
|
|
eventfld.long 0x00 10. " SGI_CS_10 ,Clear-active bit for SGI(10)" "Inactive,Active"
|
|
eventfld.long 0x00 9. " SGI_CS_9 ,Clear-active bit for SGI(9)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 8. " SGI_CS_8 ,Clear-active bit for SGI(8)" "Inactive,Active"
|
|
eventfld.long 0x00 7. " SGI_CS_7 ,Clear-active bit for SGI(7)" "Inactive,Active"
|
|
eventfld.long 0x00 6. " SGI_CS_6 ,Clear-active bit for SGI(6)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 5. " SGI_CS_5 ,Clear-active bit for SGI(5)" "Inactive,Active"
|
|
eventfld.long 0x00 4. " SGI_CS_4 ,Clear-active bit for SGI(4)" "Inactive,Active"
|
|
eventfld.long 0x00 3. " SGI_CS_3 ,Clear-active bit for SGI(3)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x00 2. " SGI_CS_2 ,Clear-active bit for SGI(2)" "Inactive,Active"
|
|
eventfld.long 0x00 1. " SGI_CS_1 ,Clear-active bit for SGI(1)" "Inactive,Active"
|
|
eventfld.long 0x00 0. " SGI_CS_0 ,Clear-active bit for SGI(0)" "Inactive,Active"
|
|
line.long 0x04 "GICD_ICACTIVER1,Interrupt clear-active register 1 SPI[31:0]"
|
|
eventfld.long 0x04 31. " SPI_CS_31 ,Clear-active bit for SPI(31)" "Inactive,Active"
|
|
eventfld.long 0x04 30. " SPI_CS_30 ,Clear-active bit for SPI(30)" "Inactive,Active"
|
|
eventfld.long 0x04 29. " SPI_CS_29 ,Clear-active bit for SPI(29)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 28. " SPI_CS_28 ,Clear-active bit for SPI(28)" "Inactive,Active"
|
|
eventfld.long 0x04 27. " SPI_CS_27 ,Clear-active bit for SPI(27)" "Inactive,Active"
|
|
eventfld.long 0x04 26. " SPI_CS_26 ,Clear-active bit for SPI(26)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 25. " SPI_CS_25 ,Clear-active bit for SPI(25)" "Inactive,Active"
|
|
eventfld.long 0x04 24. " SPI_CS_24 ,Clear-active bit for SPI(24)" "Inactive,Active"
|
|
eventfld.long 0x04 23. " SPI_CS_23 ,Clear-active bit for SPI(23)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 22. " SPI_CS_22 ,Clear-active bit for SPI(22)" "Inactive,Active"
|
|
eventfld.long 0x04 21. " SPI_CS_21 ,Clear-active bit for SPI(21)" "Inactive,Active"
|
|
eventfld.long 0x04 20. " SPI_CS_20 ,Clear-active bit for SPI(20)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 19. " SPI_CS_19 ,Clear-active bit for SPI(19)" "Inactive,Active"
|
|
eventfld.long 0x04 18. " SPI_CS_18 ,Clear-active bit for SPI(18)" "Inactive,Active"
|
|
eventfld.long 0x04 17. " SPI_CS_17 ,Clear-active bit for SPI(17)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 16. " SPI_CS_16 ,Clear-active bit for SPI(16)" "Inactive,Active"
|
|
eventfld.long 0x04 15. " SPI_CS_15 ,Clear-active bit for SPI(15)" "Inactive,Active"
|
|
eventfld.long 0x04 14. " SPI_CS_14 ,Clear-active bit for SPI(14)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 13. " SPI_CS_13 ,Clear-active bit for SPI(13)" "Inactive,Active"
|
|
eventfld.long 0x04 12. " SPI_CS_12 ,Clear-active bit for SPI(12)" "Inactive,Active"
|
|
eventfld.long 0x04 11. " SPI_CS_11 ,Clear-active bit for SPI(11)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 10. " SPI_CS_10 ,Clear-active bit for SPI(10)" "Inactive,Active"
|
|
eventfld.long 0x04 9. " SPI_CS_9 ,Clear-active bit for SPI(9)" "Inactive,Active"
|
|
eventfld.long 0x04 8. " SPI_CS_8 ,Clear-active bit for SPI(8)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 7. " SPI_CS_7 ,Clear-active bit for SPI(7)" "Inactive,Active"
|
|
eventfld.long 0x04 6. " SPI_CS_6 ,Clear-active bit for SPI(6)" "Inactive,Active"
|
|
eventfld.long 0x04 5. " SPI_CS_5 ,Clear-active bit for SPI(5)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 4. " SPI_CS_4 ,Clear-active bit for SPI(4)" "Inactive,Active"
|
|
eventfld.long 0x04 3. " SPI_CS_3 ,Clear-active bit for SPI(3)" "Inactive,Active"
|
|
eventfld.long 0x04 2. " SPI_CS_2 ,Clear-active bit for SPI(2)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x04 1. " SPI_CS_1 ,Clear-active bit for SPI(1)" "Inactive,Active"
|
|
eventfld.long 0x04 0. " SPI_CS_0 ,Clear-active bit for SPI(0)" "Inactive,Active"
|
|
line.long 0x08 "GICD_ICACTIVER2,Interrupt clear-active register 2 SPI[63:32]"
|
|
eventfld.long 0x08 31. " SPI_CS_63 ,Clear-active bit for SPI(63)" "Inactive,Active"
|
|
eventfld.long 0x08 30. " SPI_CS_62 ,Clear-active bit for SPI(62)" "Inactive,Active"
|
|
eventfld.long 0x08 29. " SPI_CS_61 ,Clear-active bit for SPI(61)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 28. " SPI_CS_60 ,Clear-active bit for SPI(60)" "Inactive,Active"
|
|
eventfld.long 0x08 27. " SPI_CS_59 ,Clear-active bit for SPI(59)" "Inactive,Active"
|
|
eventfld.long 0x08 26. " SPI_CS_58 ,Clear-active bit for SPI(58)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 25. " SPI_CS_57 ,Clear-active bit for SPI(57)" "Inactive,Active"
|
|
eventfld.long 0x08 24. " SPI_CS_56 ,Clear-active bit for SPI(56)" "Inactive,Active"
|
|
eventfld.long 0x08 23. " SPI_CS_55 ,Clear-active bit for SPI(55)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 22. " SPI_CS_54 ,Clear-active bit for SPI(54)" "Inactive,Active"
|
|
eventfld.long 0x08 21. " SPI_CS_53 ,Clear-active bit for SPI(53)" "Inactive,Active"
|
|
eventfld.long 0x08 20. " SPI_CS_52 ,Clear-active bit for SPI(52)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 19. " SPI_CS_51 ,Clear-active bit for SPI(51)" "Inactive,Active"
|
|
eventfld.long 0x08 18. " SPI_CS_50 ,Clear-active bit for SPI(50)" "Inactive,Active"
|
|
eventfld.long 0x08 17. " SPI_CS_49 ,Clear-active bit for SPI(49)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 16. " SPI_CS_48 ,Clear-active bit for SPI(48)" "Inactive,Active"
|
|
eventfld.long 0x08 15. " SPI_CS_47 ,Clear-active bit for SPI(47)" "Inactive,Active"
|
|
eventfld.long 0x08 14. " SPI_CS_46 ,Clear-active bit for SPI(46)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 13. " SPI_CS_45 ,Clear-active bit for SPI(45)" "Inactive,Active"
|
|
eventfld.long 0x08 12. " SPI_CS_44 ,Clear-active bit for SPI(44)" "Inactive,Active"
|
|
eventfld.long 0x08 11. " SPI_CS_43 ,Clear-active bit for SPI(43)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 10. " SPI_CS_42 ,Clear-active bit for SPI(42)" "Inactive,Active"
|
|
eventfld.long 0x08 9. " SPI_CS_41 ,Clear-active bit for SPI(41)" "Inactive,Active"
|
|
eventfld.long 0x08 8. " SPI_CS_40 ,Clear-active bit for SPI(40)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 7. " SPI_CS_39 ,Clear-active bit for SPI(39)" "Inactive,Active"
|
|
eventfld.long 0x08 6. " SPI_CS_38 ,Clear-active bit for SPI(38)" "Inactive,Active"
|
|
eventfld.long 0x08 5. " SPI_CS_37 ,Clear-active bit for SPI(37)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 4. " SPI_CS_36 ,Clear-active bit for SPI(36)" "Inactive,Active"
|
|
eventfld.long 0x08 3. " SPI_CS_35 ,Clear-active bit for SPI(35)" "Inactive,Active"
|
|
eventfld.long 0x08 2. " SPI_CS_34 ,Clear-active bit for SPI(34)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x08 1. " SPI_CS_33 ,Clear-active bit for SPI(33)" "Inactive,Active"
|
|
eventfld.long 0x08 0. " SPI_CS_32 ,Clear-active bit for SPI(32)" "Inactive,Active"
|
|
line.long 0x0C "GICD_ICACTIVER3,Interrupt clear-active register 3 SPI[95:64]"
|
|
eventfld.long 0x0C 31. " SPI_CS_95 ,Clear-active bit for SPI(95)" "Inactive,Active"
|
|
eventfld.long 0x0C 30. " SPI_CS_94 ,Clear-active bit for SPI(94)" "Inactive,Active"
|
|
eventfld.long 0x0C 29. " SPI_CS_93 ,Clear-active bit for SPI(93)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 28. " SPI_CS_92 ,Clear-active bit for SPI(92)" "Inactive,Active"
|
|
eventfld.long 0x0C 27. " SPI_CS_91 ,Clear-active bit for SPI(91)" "Inactive,Active"
|
|
eventfld.long 0x0C 26. " SPI_CS_90 ,Clear-active bit for SPI(90)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 25. " SPI_CS_89 ,Clear-active bit for SPI(89)" "Inactive,Active"
|
|
eventfld.long 0x0C 24. " SPI_CS_88 ,Clear-active bit for SPI(88)" "Inactive,Active"
|
|
eventfld.long 0x0C 23. " SPI_CS_87 ,Clear-active bit for SPI(87)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 22. " SPI_CS_86 ,Clear-active bit for SPI(86)" "Inactive,Active"
|
|
eventfld.long 0x0C 21. " SPI_CS_85 ,Clear-active bit for SPI(85)" "Inactive,Active"
|
|
eventfld.long 0x0C 20. " SPI_CS_84 ,Clear-active bit for SPI(84)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 19. " SPI_CS_83 ,Clear-active bit for SPI(83)" "Inactive,Active"
|
|
eventfld.long 0x0C 18. " SPI_CS_82 ,Clear-active bit for SPI(82)" "Inactive,Active"
|
|
eventfld.long 0x0C 17. " SPI_CS_81 ,Clear-active bit for SPI(81)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 16. " SPI_CS_80 ,Clear-active bit for SPI(80)" "Inactive,Active"
|
|
eventfld.long 0x0C 15. " SPI_CS_79 ,Clear-active bit for SPI(79)" "Inactive,Active"
|
|
eventfld.long 0x0C 14. " SPI_CS_78 ,Clear-active bit for SPI(78)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 13. " SPI_CS_77 ,Clear-active bit for SPI(77)" "Inactive,Active"
|
|
eventfld.long 0x0C 12. " SPI_CS_76 ,Clear-active bit for SPI(76)" "Inactive,Active"
|
|
eventfld.long 0x0C 11. " SPI_CS_75 ,Clear-active bit for SPI(75)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 10. " SPI_CS_74 ,Clear-active bit for SPI(74)" "Inactive,Active"
|
|
eventfld.long 0x0C 9. " SPI_CS_73 ,Clear-active bit for SPI(73)" "Inactive,Active"
|
|
eventfld.long 0x0C 8. " SPI_CS_72 ,Clear-active bit for SPI(72)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 7. " SPI_CS_71 ,Clear-active bit for SPI(71)" "Inactive,Active"
|
|
eventfld.long 0x0C 6. " SPI_CS_70 ,Clear-active bit for SPI(70)" "Inactive,Active"
|
|
eventfld.long 0x0C 5. " SPI_CS_69 ,Clear-active bit for SPI(69)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 4. " SPI_CS_68 ,Clear-active bit for SPI(68)" "Inactive,Active"
|
|
eventfld.long 0x0C 3. " SPI_CS_67 ,Clear-active bit for SPI(67)" "Inactive,Active"
|
|
eventfld.long 0x0C 2. " SPI_CS_66 ,Clear-active bit for SPI(66)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x0C 1. " SPI_CS_65 ,Clear-active bit for SPI(65)" "Inactive,Active"
|
|
eventfld.long 0x0C 0. " SPI_CS_64 ,Clear-active bit for SPI(64)" "Inactive,Active"
|
|
line.long 0x10 "GICD_ICACTIVER4,Interrupt clear-active register 4 SPI[127:96]"
|
|
eventfld.long 0x10 31. " SPI_CS_127 ,Clear-active bit for SPI(127)" "Inactive,Active"
|
|
eventfld.long 0x10 30. " SPI_CS_126 ,Clear-active bit for SPI(126)" "Inactive,Active"
|
|
eventfld.long 0x10 29. " SPI_CS_125 ,Clear-active bit for SPI(125)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 28. " SPI_CS_124 ,Clear-active bit for SPI(124)" "Inactive,Active"
|
|
eventfld.long 0x10 27. " SPI_CS_123 ,Clear-active bit for SPI(123)" "Inactive,Active"
|
|
eventfld.long 0x10 26. " SPI_CS_122 ,Clear-active bit for SPI(122)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 25. " SPI_CS_121 ,Clear-active bit for SPI(121)" "Inactive,Active"
|
|
eventfld.long 0x10 24. " SPI_CS_120 ,Clear-active bit for SPI(120)" "Inactive,Active"
|
|
eventfld.long 0x10 23. " SPI_CS_119 ,Clear-active bit for SPI(119)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 22. " SPI_CS_118 ,Clear-active bit for SPI(118)" "Inactive,Active"
|
|
eventfld.long 0x10 21. " SPI_CS_117 ,Clear-active bit for SPI(117)" "Inactive,Active"
|
|
eventfld.long 0x10 20. " SPI_CS_116 ,Clear-active bit for SPI(116)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 19. " SPI_CS_115 ,Clear-active bit for SPI(115)" "Inactive,Active"
|
|
eventfld.long 0x10 18. " SPI_CS_114 ,Clear-active bit for SPI(114)" "Inactive,Active"
|
|
eventfld.long 0x10 17. " SPI_CS_113 ,Clear-active bit for SPI(113)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 16. " SPI_CS_112 ,Clear-active bit for SPI(112)" "Inactive,Active"
|
|
eventfld.long 0x10 15. " SPI_CS_111 ,Clear-active bit for SPI(111)" "Inactive,Active"
|
|
eventfld.long 0x10 14. " SPI_CS_110 ,Clear-active bit for SPI(110)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 13. " SPI_CS_109 ,Clear-active bit for SPI(109)" "Inactive,Active"
|
|
eventfld.long 0x10 12. " SPI_CS_108 ,Clear-active bit for SPI(108)" "Inactive,Active"
|
|
eventfld.long 0x10 11. " SPI_CS_107 ,Clear-active bit for SPI(107)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 10. " SPI_CS_106 ,Clear-active bit for SPI(106)" "Inactive,Active"
|
|
eventfld.long 0x10 9. " SPI_CS_105 ,Clear-active bit for SPI(105)" "Inactive,Active"
|
|
eventfld.long 0x10 8. " SPI_CS_104 ,Clear-active bit for SPI(104)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 7. " SPI_CS_103 ,Clear-active bit for SPI(103)" "Inactive,Active"
|
|
eventfld.long 0x10 6. " SPI_CS_102 ,Clear-active bit for SPI(102)" "Inactive,Active"
|
|
eventfld.long 0x10 5. " SPI_CS_101 ,Clear-active bit for SPI(101)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 4. " SPI_CS_100 ,Clear-active bit for SPI(100)" "Inactive,Active"
|
|
eventfld.long 0x10 3. " SPI_CS_99 ,Clear-active bit for SPI(99)" "Inactive,Active"
|
|
eventfld.long 0x10 2. " SPI_CS_98 ,Clear-active bit for SPI(98)" "Inactive,Active"
|
|
textline ""
|
|
eventfld.long 0x10 1. " SPI_CS_97 ,Clear-active bit for SPI(97)" "Inactive,Active"
|
|
eventfld.long 0x10 0. " SPI_CS_96 ,Clear-active bit for SPI(96)" "Inactive,Active"
|
|
tree.end
|
|
tree "Priority Level"
|
|
group.long 0x400++0x0F
|
|
line.long 0x0 "GICD_IPRIORITYR0,Priority level register 0 for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "GICD_IPRIORITYR1,Priority level register 1 for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "GICD_IPRIORITYR2,Priority level register 2 for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "GICD_IPRIORITYR3,Priority level register 3 for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
group.long 0x418++0x7
|
|
line.long 0x00 "GICD_IPRIORITYR6,Priority level register 6 for PPI [11:9]"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
line.long 0x04 "GICD_IPRIORITYR6,Priority level register 7 for PPI [14:13]"
|
|
hexmask.long.byte 0x04 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
group.long 0x420++0x7F
|
|
line.long 0x0 "GICD_IPRIORITYR8,Priority level register 8 for SPI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "GICD_IPRIORITYR9,Priority level register 9 for SPI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "GICD_IPRIORITYR10,Priority level register 10 for SPI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "GICD_IPRIORITYR11,Priority level register 11 for SPI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "GICD_IPRIORITYR12,Priority level register 12 for SPI [19:16]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "GICD_IPRIORITYR13,Priority level register 13 for SPI [23:20]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "GICD_IPRIORITYR14,Priority level register 14 for SPI [27:24]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "GICD_IPRIORITYR15,Priority level register 15 for SPI [31:28]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x20 "GICD_IPRIORITYR16,Priority level register 16 for SPI [35:32]"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x24 "GICD_IPRIORITYR17,Priority level register 17 for SPI [39:36]"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x28 "GICD_IPRIORITYR18,Priority level register 18 for SPI [43:40]"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x2C "GICD_IPRIORITYR19,Priority level register 19 for SPI [47:44]"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x30 "GICD_IPRIORITYR20,Priority level register 20 for SPI [51:48]"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x34 "GICD_IPRIORITYR21,Priority level register 21 for SPI [55:52]"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x38 "GICD_IPRIORITYR22,Priority level register 22 for SPI [59:56]"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x3C "GICD_IPRIORITYR23,Priority level register 23 for SPI [63:60]"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x40 "GICD_IPRIORITYR24,Priority level register 24 for SPI [67:64]"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x44 "GICD_IPRIORITYR25,Priority level register 25 for SPI [71:68]"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x48 "GICD_IPRIORITYR26,Priority level register 26 for SPI [75:72]"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4C "GICD_IPRIORITYR27,Priority level register 27 for SPI [79:76]"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x50 "GICD_IPRIORITYR28,Priority level register 28 for SPI [83:80]"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x54 "GICD_IPRIORITYR29,Priority level register 29 for SPI [87:84]"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x58 "GICD_IPRIORITYR30,Priority level register 30 for SPI [91:88]"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x5C "GICD_IPRIORITYR31,Priority level register 31 for SPI [95:92]"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x60 "GICD_IPRIORITYR32,Priority level register 32 for SPI [99:96]"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x64 "GICD_IPRIORITYR33,Priority level register 33 for SPI [103:100]"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x68 "GICD_IPRIORITYR34,Priority level register 34 for SPI [107:104]"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x6C "GICD_IPRIORITYR35,Priority level register 35 for SPI [111:108]"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x70 "GICD_IPRIORITYR36,Priority level register 36 for SPI [115:112]"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x74 "GICD_IPRIORITYR37,Priority level register 37 for SPI [119:116]"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x78 "GICD_IPRIORITYR38,Priority level register 38 for SPI [123:120]"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x7C "GICD_IPRIORITYR39,Priority level register 39 for SPI [127:124]"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
tree "Processor Targets"
|
|
rgroup.long 0x800++0x0F
|
|
line.long 0x0 "GICD_ITARGETSR0,Processor target register 0 for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "GICD_ITARGETSR1,Processor target register 1 for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "GICD_ITARGETSR2,Processor target register 2 for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "GICD_ITARGETSR3,Processor target register 3 for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
group.long 0x818++0x7
|
|
line.long 0x00 "GICD_ITARGETSR6,Processor target register 6 for PPI [11:9]"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
line.long 0x04 "GICD_ITARGETSR6,Processor target register 7 for PPI [14:13]"
|
|
hexmask.long.byte 0x04 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
group.long 0x820++0x7F
|
|
line.long 0x0 "GICD_ITARGETSR8,Processor target register 8 for SPI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "GICD_ITARGETSR9,Processor target register 9 for SPI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "GICD_ITARGETSR10,Processor target register 10 for SPI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "GICD_ITARGETSR11,Processor target register 11 for SPI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "GICD_ITARGETSR12,Processor target register 12 for SPI [19:16]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "GICD_ITARGETSR13,Processor target register 13 for SPI [23:20]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "GICD_ITARGETSR14,Processor target register 14 for SPI [27:24]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "GICD_ITARGETSR15,Processor target register 15 for SPI [31:28]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x20 "GICD_ITARGETSR16,Processor target register 16 for SPI [35:32]"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x24 "GICD_ITARGETSR17,Processor target register 17 for SPI [39:36]"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x28 "GICD_ITARGETSR18,Processor target register 18 for SPI [43:40]"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x2C "GICD_ITARGETSR19,Processor target register 19 for SPI [47:44]"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x30 "GICD_ITARGETSR20,Processor target register 20 for SPI [51:48]"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x34 "GICD_ITARGETSR21,Processor target register 21 for SPI [55:52]"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x38 "GICD_ITARGETSR22,Processor target register 22 for SPI [59:56]"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x3C "GICD_ITARGETSR23,Processor target register 23 for SPI [63:60]"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x40 "GICD_ITARGETSR24,Processor target register 24 for SPI [67:64]"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x44 "GICD_ITARGETSR25,Processor target register 25 for SPI [71:68]"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x48 "GICD_ITARGETSR26,Processor target register 26 for SPI [75:72]"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4C "GICD_ITARGETSR27,Processor target register 27 for SPI [79:76]"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x50 "GICD_ITARGETSR28,Processor target register 28 for SPI [83:80]"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x54 "GICD_ITARGETSR29,Processor target register 29 for SPI [87:84]"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x58 "GICD_ITARGETSR30,Processor target register 30 for SPI [91:88]"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x5C "GICD_ITARGETSR31,Processor target register 31 for SPI [95:92]"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x60 "GICD_ITARGETSR32,Processor target register 32 for SPI [99:96]"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x64 "GICD_ITARGETSR33,Processor target register 33 for SPI [103:100]"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x68 "GICD_ITARGETSR34,Processor target register 34 for SPI [107:104]"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x6C "GICD_ITARGETSR35,Processor target register 35 for SPI [111:108]"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x70 "GICD_ITARGETSR36,Processor target register 36 for SPI [115:112]"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x74 "GICD_ITARGETSR37,Processor target register 37 for SPI [119:116]"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x78 "GICD_ITARGETSR38,Processor target register 38 for SPI [123:120]"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x7C "GICD_ITARGETSR39,Processor target register 39 for SPI [127:124]"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
;section
|
|
tree "Interrupt Configuration"
|
|
group.long 0xC00++0x27
|
|
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration SGI Register 0"
|
|
bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "Level high,Reserved,Rising edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "Level high,Reserved,Rising edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "Level high,Reserved,Rising edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "Level high,Reserved,Rising edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "Level high,Reserved,Rising edge,?..."
|
|
bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "Level high,Reserved,Rising edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "Level high,Reserved,Rising edge,?..."
|
|
line.long 0x04 "GICD_ICFGR1,Interrupt Configuration PPI Register 1"
|
|
bitfld.long 0x04 28.--29. " PPI[14] ,Interrupt Configuration PPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 26.--27. " PPI[13] ,Interrupt Configuration PPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 22.--23. " PPI[11] ,Interrupt Configuration PPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 20.--21. " PPI[10] ,Interrupt Configuration PPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 18.--19. " PPI[9] ,Interrupt Configuration PPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x08 "GICD_ICFGR2,Interrupt configuration register 2 for SPI[15:0]"
|
|
bitfld.long 0x08 30.--31. " SPI[15] ,Interrupt Configuration SPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 28.--29. " SPI[14] ,Interrupt Configuration SPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 26.--27. " SPI[13] ,Interrupt Configuration SPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 24.--25. " SPI[12] ,Interrupt Configuration SPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 22.--23. " SPI[11] ,Interrupt Configuration SPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 20.--21. " SPI[10] ,Interrupt Configuration SPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " SPI[9] ,Interrupt Configuration SPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 16.--17. " SPI[8] ,Interrupt Configuration SPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 14.--15. " SPI[7] ,Interrupt Configuration SPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " SPI[6] ,Interrupt Configuration SPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 10.--11. " SPI[5] ,Interrupt Configuration SPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 8.--9. " SPI[4] ,Interrupt Configuration SPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " SPI[3] ,Interrupt Configuration SPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 4.--5. " SPI[2] ,Interrupt Configuration SPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 2.--3. " SPI[1] ,Interrupt Configuration SPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " SPI[0] ,Interrupt Configuration SPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x0C "GICD_ICFGR3,Interrupt configuration register 3 for SPI[31:16]"
|
|
bitfld.long 0x0C 30.--31. " SPI[31] ,Interrupt Configuration SPI[31]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 28.--29. " SPI[30] ,Interrupt Configuration SPI[30]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 26.--27. " SPI[29] ,Interrupt Configuration SPI[29]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--25. " SPI[28] ,Interrupt Configuration SPI[28]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 22.--23. " SPI[27] ,Interrupt Configuration SPI[27]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 20.--21. " SPI[26] ,Interrupt Configuration SPI[26]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 18.--19. " SPI[25] ,Interrupt Configuration SPI[25]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 16.--17. " SPI[24] ,Interrupt Configuration SPI[24]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 14.--15. " SPI[23] ,Interrupt Configuration SPI[23]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " SPI[22] ,Interrupt Configuration SPI[22]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 10.--11. " SPI[21] ,Interrupt Configuration SPI[21]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 8.--9. " SPI[20] ,Interrupt Configuration SPI[20]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " SPI[19] ,Interrupt Configuration SPI[19]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 4.--5. " SPI[18] ,Interrupt Configuration SPI[18]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 2.--3. " SPI[17] ,Interrupt Configuration SPI[17]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " SPI[16] ,Interrupt Configuration SPI[16]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x10 "GICD_ICFGR4,Interrupt configuration register 4 for SPI[47:32]"
|
|
bitfld.long 0x10 30.--31. " SPI[47] ,Interrupt Configuration SPI[47]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 28.--29. " SPI[46] ,Interrupt Configuration SPI[46]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 26.--27. " SPI[45] ,Interrupt Configuration SPI[45]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 24.--25. " SPI[44] ,Interrupt Configuration SPI[44]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 22.--23. " SPI[43] ,Interrupt Configuration SPI[43]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 20.--21. " SPI[42] ,Interrupt Configuration SPI[42]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " SPI[41] ,Interrupt Configuration SPI[41]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 16.--17. " SPI[40] ,Interrupt Configuration SPI[40]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 14.--15. " SPI[39] ,Interrupt Configuration SPI[39]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 12.--13. " SPI[38] ,Interrupt Configuration SPI[38]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 10.--11. " SPI[37] ,Interrupt Configuration SPI[37]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 8.--9. " SPI[36] ,Interrupt Configuration SPI[36]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " SPI[35] ,Interrupt Configuration SPI[35]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 4.--5. " SPI[34] ,Interrupt Configuration SPI[34]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 2.--3. " SPI[33] ,Interrupt Configuration SPI[33]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " SPI[32] ,Interrupt Configuration SPI[32]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x14 "GICD_ICFGR5,Interrupt configuration register 5 for SPI[63:48]"
|
|
bitfld.long 0x14 30.--31. " SPI[63] ,Interrupt Configuration SPI[63]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 28.--29. " SPI[62] ,Interrupt Configuration SPI[62]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 26.--27. " SPI[61] ,Interrupt Configuration SPI[61]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 24.--25. " SPI[60] ,Interrupt Configuration SPI[60]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 22.--23. " SPI[59] ,Interrupt Configuration SPI[59]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 20.--21. " SPI[58] ,Interrupt Configuration SPI[58]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " SPI[57] ,Interrupt Configuration SPI[57]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 16.--17. " SPI[56] ,Interrupt Configuration SPI[56]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 14.--15. " SPI[55] ,Interrupt Configuration SPI[55]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " SPI[54] ,Interrupt Configuration SPI[54]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 10.--11. " SPI[53] ,Interrupt Configuration SPI[53]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 8.--9. " SPI[52] ,Interrupt Configuration SPI[52]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " SPI[51] ,Interrupt Configuration SPI[51]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 4.--5. " SPI[50] ,Interrupt Configuration SPI[50]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 2.--3. " SPI[49] ,Interrupt Configuration SPI[49]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " SPI[48] ,Interrupt Configuration SPI[48]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x18 "GICD_ICFGR6,Interrupt configuration register 6 for SPI[79:64]"
|
|
bitfld.long 0x18 30.--31. " SPI[79] ,Interrupt Configuration SPI[79]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 28.--29. " SPI[78] ,Interrupt Configuration SPI[78]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 26.--27. " SPI[77] ,Interrupt Configuration SPI[77]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 24.--25. " SPI[76] ,Interrupt Configuration SPI[76]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 22.--23. " SPI[75] ,Interrupt Configuration SPI[75]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 20.--21. " SPI[74] ,Interrupt Configuration SPI[74]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " SPI[73] ,Interrupt Configuration SPI[73]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 16.--17. " SPI[72] ,Interrupt Configuration SPI[72]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 14.--15. " SPI[71] ,Interrupt Configuration SPI[71]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 12.--13. " SPI[70] ,Interrupt Configuration SPI[70]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 10.--11. " SPI[69] ,Interrupt Configuration SPI[69]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 8.--9. " SPI[68] ,Interrupt Configuration SPI[68]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " SPI[67] ,Interrupt Configuration SPI[67]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 4.--5. " SPI[66] ,Interrupt Configuration SPI[66]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 2.--3. " SPI[65] ,Interrupt Configuration SPI[65]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " SPI[64] ,Interrupt Configuration SPI[64]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x1C "GICD_ICFGR7,Interrupt configuration register 7 for SPI[95:80]"
|
|
bitfld.long 0x1C 30.--31. " SPI[95] ,Interrupt Configuration SPI[95]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 28.--29. " SPI[94] ,Interrupt Configuration SPI[94]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 26.--27. " SPI[93] ,Interrupt Configuration SPI[93]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 24.--25. " SPI[92] ,Interrupt Configuration SPI[92]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 22.--23. " SPI[91] ,Interrupt Configuration SPI[91]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 20.--21. " SPI[90] ,Interrupt Configuration SPI[90]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " SPI[89] ,Interrupt Configuration SPI[89]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 16.--17. " SPI[88] ,Interrupt Configuration SPI[88]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 14.--15. " SPI[87] ,Interrupt Configuration SPI[87]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 12.--13. " SPI[86] ,Interrupt Configuration SPI[86]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 10.--11. " SPI[85] ,Interrupt Configuration SPI[85]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 8.--9. " SPI[84] ,Interrupt Configuration SPI[84]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--7. " SPI[83] ,Interrupt Configuration SPI[83]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 4.--5. " SPI[82] ,Interrupt Configuration SPI[82]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 2.--3. " SPI[81] ,Interrupt Configuration SPI[81]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--1. " SPI[80] ,Interrupt Configuration SPI[80]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x20 "GICD_ICFGR8,Interrupt configuration register 8 for SPI[111:96]"
|
|
bitfld.long 0x20 30.--31. " SPI[111] ,Interrupt Configuration SPI[111]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 28.--29. " SPI[110] ,Interrupt Configuration SPI[110]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 26.--27. " SPI[109] ,Interrupt Configuration SPI[109]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " SPI[108] ,Interrupt Configuration SPI[108]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 22.--23. " SPI[107] ,Interrupt Configuration SPI[107]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 20.--21. " SPI[106] ,Interrupt Configuration SPI[106]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " SPI[105] ,Interrupt Configuration SPI[105]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 16.--17. " SPI[104] ,Interrupt Configuration SPI[104]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 14.--15. " SPI[103] ,Interrupt Configuration SPI[103]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " SPI[102] ,Interrupt Configuration SPI[102]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 10.--11. " SPI[101] ,Interrupt Configuration SPI[101]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 8.--9. " SPI[100] ,Interrupt Configuration SPI[100]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " SPI[99] ,Interrupt Configuration SPI[99]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 4.--5. " SPI[98] ,Interrupt Configuration SPI[98]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 2.--3. " SPI[97] ,Interrupt Configuration SPI[97]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " SPI[96] ,Interrupt Configuration SPI[96]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x24 "GICD_ICFGR9,Interrupt configuration register 9 for SPI[127:112]"
|
|
bitfld.long 0x24 30.--31. " SPI[127] ,Interrupt Configuration SPI[127]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 28.--29. " SPI[126] ,Interrupt Configuration SPI[126]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 26.--27. " SPI[125] ,Interrupt Configuration SPI[125]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 24.--25. " SPI[124] ,Interrupt Configuration SPI[124]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 22.--23. " SPI[123] ,Interrupt Configuration SPI[123]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 20.--21. " SPI[122] ,Interrupt Configuration SPI[122]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " SPI[121] ,Interrupt Configuration SPI[121]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 16.--17. " SPI[120] ,Interrupt Configuration SPI[120]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 14.--15. " SPI[119] ,Interrupt Configuration SPI[119]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " SPI[118] ,Interrupt Configuration SPI[118]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 10.--11. " SPI[117] ,Interrupt Configuration SPI[117]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 8.--9. " SPI[116] ,Interrupt Configuration SPI[116]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 6.--7. " SPI[115] ,Interrupt Configuration SPI[115]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 4.--5. " SPI[114] ,Interrupt Configuration SPI[114]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 2.--3. " SPI[113] ,Interrupt Configuration SPI[113]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 0.--1. " SPI[112] ,Interrupt Configuration SPI[112]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; od 0x0D00
|
|
;section
|
|
width 12.
|
|
tree "PPI & SPI Status"
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "GICD_PPISR,PPI Status Register"
|
|
bitfld.long 0x00 14. " PPI_ID30 ,PPI_ID30 Status (interrupt source: nCNTPNSIRQ)" "Low,High"
|
|
bitfld.long 0x00 13. " PPI_ID29 ,PPI_ID29 Status (interrupt source: nCNTPSIRQ)" "Low,High"
|
|
bitfld.long 0x00 11. " PPI_ID27 ,PPI_ID27 Status (interrupt source: nCNTVIRQ)" "Low,High"
|
|
bitfld.long 0x00 10. " PPI_ID26 ,PPI_ID26 Status (interrupt source: nCNTHPIRQ)" "Low,High"
|
|
bitfld.long 0x00 9. " PPI_ID25 ,PPI_ID25 Status (interrupt source: Virtual maintenance interrupt)" "Low,High"
|
|
rgroup.long 0xd04++0x03
|
|
line.long 0x00 "GICD_SPISR0,SPI[31:0] Status Register 0"
|
|
bitfld.long 0x00 31. " SPI[31] ,SPI Status[31]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[30] ,SPI Status[30]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[29] ,SPI Status[29]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[28] ,SPI Status[28]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[27] ,SPI Status[27]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[26] ,SPI Status[26]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[25] ,SPI Status[25]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[24] ,SPI Status[24]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[23] ,SPI Status[23]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[22] ,SPI Status[22]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[21] ,SPI Status[21]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[20] ,SPI Status[20]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[19] ,SPI Status[19]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[18] ,SPI Status[18]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[17] ,SPI Status[17]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[16] ,SPI Status[16]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[15] ,SPI Status[15]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[14] ,SPI Status[14]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[13] ,SPI Status[13]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[12] ,SPI Status[12]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[11] ,SPI Status[11]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[19] ,SPI Status[10]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[9] ,SPI Status[9]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[8] ,SPI Status[8]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[7] ,SPI Status[7]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[6] ,SPI Status[6]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[5] ,SPI Status[5]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[4] ,SPI Status[4]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[3] ,SPI Status[3]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[2] ,SPI Status[2]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[1] ,SPI Status[1]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[0] ,SPI Status[0]" "Low,High"
|
|
rgroup.long 0xd08++0x03
|
|
line.long 0x00 "GICD_SPISR1,SPI[63:32] Status Register 1"
|
|
bitfld.long 0x00 31. " SPI[63] ,SPI Status[63]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[62] ,SPI Status[62]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[61] ,SPI Status[61]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[60] ,SPI Status[60]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[59] ,SPI Status[59]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[58] ,SPI Status[58]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[57] ,SPI Status[57]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[56] ,SPI Status[56]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[55] ,SPI Status[55]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[54] ,SPI Status[54]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[53] ,SPI Status[53]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[52] ,SPI Status[52]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[51] ,SPI Status[51]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[50] ,SPI Status[50]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[49] ,SPI Status[49]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[48] ,SPI Status[48]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[47] ,SPI Status[47]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[46] ,SPI Status[46]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[45] ,SPI Status[45]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[44] ,SPI Status[44]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[43] ,SPI Status[43]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[42] ,SPI Status[42]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[41] ,SPI Status[41]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[40] ,SPI Status[40]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[39] ,SPI Status[39]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[38] ,SPI Status[38]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[37] ,SPI Status[37]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[36] ,SPI Status[36]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[35] ,SPI Status[35]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SPI[34] ,SPI Status[34]" "Low,High"
|
|
bitfld.long 0x00 1. " SPI[33] ,SPI Status[33]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[32] ,SPI Status[32]" "Low,High"
|
|
rgroup.long 0xd0C++0x03
|
|
line.long 0x00 "GICD_SPISR2,SPI[95:64] Status Register 2"
|
|
bitfld.long 0x00 31. " SPI[95] ,SPI Status[95]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[94] ,SPI Status[94]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[93] ,SPI Status[93]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[92] ,SPI Status[92]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[91] ,SPI Status[91]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[90] ,SPI Status[90]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[89] ,SPI Status[89]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[88] ,SPI Status[88]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[87] ,SPI Status[87]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[86] ,SPI Status[86]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[85] ,SPI Status[85]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[84] ,SPI Status[84]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[83] ,SPI Status[83]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[82] ,SPI Status[82]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[81] ,SPI Status[81]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[80] ,SPI Status[80]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[79] ,SPI Status[79]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[78] ,SPI Status[78]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[77] ,SPI Status[77]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[76] ,SPI Status[76]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[75] ,SPI Status[75]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[74] ,SPI Status[74]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[73] ,SPI Status[73]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[72] ,SPI Status[72]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[71] ,SPI Status[71]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[70] ,SPI Status[70]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[69] ,SPI Status[69]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[68] ,SPI Status[68]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[67] ,SPI Status[67]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[66] ,SPI Status[66]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[65] ,SPI Status[65]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[64] ,SPI Status[64]" "Low,High"
|
|
rgroup.long 0xd10++0x03
|
|
line.long 0x00 "GICD_SPISR3,SPI[127:96] Status Register 3"
|
|
bitfld.long 0x00 31. " SPI[127] ,SPI Status[127]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[126] ,SPI Status[126]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[125] ,SPI Status[125]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[124] ,SPI Status[124]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[123] ,SPI Status[123]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[122] ,SPI Status[122]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[121] ,SPI Status[121]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[120] ,SPI Status[120]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[119] ,SPI Status[119]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[118] ,SPI Status[118]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[117] ,SPI Status[117]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[116] ,SPI Status[116]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[115] ,SPI Status[115]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[114] ,SPI Status[114]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[113] ,SPI Status[113]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[112] ,SPI Status[112]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[111] ,SPI Status[111]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[110] ,SPI Status[110]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[109] ,SPI Status[109]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[108] ,SPI Status[108]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[107] ,SPI Status[107]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[106] ,SPI Status[106]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[105] ,SPI Status[105]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[104] ,SPI Status[104]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[103] ,SPI Status[103]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[102] ,SPI Status[102]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[101] ,SPI Status[101]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[100] ,SPI Status[100]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[99] ,SPI Status[99]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[98] ,SPI Status[98]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[97] ,SPI Status[97]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[96] ,SPI Status[96]" "Low,High"
|
|
tree.end
|
|
width 9.
|
|
wgroup.long 0xF00++0x03 "Software Generated Interrupt"
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TRG_LIST_FLT ,Distributor SGI processing" "CPUTargetList,All interfaces,Requested only,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPU_TRG_LIST ,CPU Target List"
|
|
bitfld.long 0x00 15. " NSATT ,Security value of the SGI" "Group 0,Group 1"
|
|
bitfld.long 0x00 0.--3. " SGIINTID ,Interrupt ID of the SGI to forward to the specified CPU interfaces" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "SGI pending registers"
|
|
width 16.
|
|
group.long 0xF10++0x0F
|
|
line.long 0x00 "GICD_CPENDSGIR0,Clear-pending register 0 for SGI [3:0]"
|
|
bitfld.long 0x00 31. " SGI_CP3_7 ,Clear Pending Bit 3_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 30. " SGI_CP3_6 ,Clear Pending Bit 3_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 29. " SGI_CP3_5 ,Clear Pending Bit 3_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SGI_CP3_4 ,Clear Pending Bit 3_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 27. " SGI_CP3_3 ,Clear Pending Bit 3_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 26. " SGI_CP3_2 ,Clear Pending Bit 3_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SGI_CP3_1 ,Clear Pending Bit 3_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 24. " SGI_CP3_0 ,Clear Pending Bit 3_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 23. " SGI_CP2_7 ,Clear Pending Bit 2_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SGI_CP2_6 ,Clear Pending Bit 2_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 21. " SGI_CP2_5 ,Clear Pending Bit 2_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 20. " SGI_CP2_4 ,Clear Pending Bit 2_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SGI_CP2_3 ,Clear Pending Bit 2_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 18. " SGI_CP2_2 ,Clear Pending Bit 2_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 17. " SGI_CP2_1 ,Clear Pending Bit 2_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGI_CP2_0 ,Clear Pending Bit 2_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 15. " SGI_CP1_7 ,Clear Pending Bit 1_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 14. " SGI_CP1_6 ,Clear Pending Bit 1_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_CP1_5 ,Clear Pending Bit 1_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 12. " SGI_CP1_4 ,Clear Pending Bit 1_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 11. " SGI_CP1_3 ,Clear Pending Bit 1_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_CP1_2 ,Clear Pending Bit 1_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 9. " SGI_CP1_1 ,Clear Pending Bit 1_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 8. " SGI_CP1_0 ,Clear Pending Bit 1_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_CP0_7 ,Clear Pending Bit 0_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 6. " SGI_CP0_6 ,Clear Pending Bit 0_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 5. " SGI_CP0_5 ,Clear Pending Bit 0_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_CP0_4 ,Clear Pending Bit 0_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 3. " SGI_CP0_3 ,Clear Pending Bit 0_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 2. " SGI_CP0_2 ,Clear Pending Bit 0_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_CP0_1 ,Clear Pending Bit 0_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x00 0. " SGI_CP0_0 ,Clear Pending Bit 0_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x04 "GICD_CPENDSGIR1,Clear-pending register 1 for SGI [7:4]"
|
|
bitfld.long 0x04 31. " SGI_CP7_7 ,Clear Pending Bit 7_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 30. " SGI_CP7_6 ,Clear Pending Bit 7_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 29. " SGI_CP7_5 ,Clear Pending Bit 7_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SGI_CP7_4 ,Clear Pending Bit 7_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 27. " SGI_CP7_3 ,Clear Pending Bit 7_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 26. " SGI_CP7_2 ,Clear Pending Bit 7_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SGI_CP7_1 ,Clear Pending Bit 7_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 24. " SGI_CP7_0 ,Clear Pending Bit 7_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 23. " SGI_CP6_7 ,Clear Pending Bit 6_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SGI_CP6_6 ,Clear Pending Bit 6_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 21. " SGI_CP6_5 ,Clear Pending Bit 6_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 20. " SGI_CP6_4 ,Clear Pending Bit 6_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SGI_CP6_3 ,Clear Pending Bit 6_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 18. " SGI_CP6_2 ,Clear Pending Bit 6_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 17. " SGI_CP6_1 ,Clear Pending Bit 6_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SGI_CP6_0 ,Clear Pending Bit 6_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 15. " SGI_CP5_7 ,Clear Pending Bit 5_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 14. " SGI_CP5_6 ,Clear Pending Bit 5_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SGI_CP5_5 ,Clear Pending Bit 5_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 12. " SGI_CP5_4 ,Clear Pending Bit 5_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 11. " SGI_CP5_3 ,Clear Pending Bit 5_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SGI_CP5_2 ,Clear Pending Bit 5_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 9. " SGI_CP5_1 ,Clear Pending Bit 5_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 8. " SGI_CP5_0 ,Clear Pending Bit 5_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SGI_CP4_7 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 6. " SGI_CP4_6 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 5. " SGI_CP4_5 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SGI_CP4_4 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 3. " SGI_CP4_3 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 2. " SGI_CP4_2 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SGI_CP4_1 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x04 0. " SGI_CP4_0 ,Clear Pending Bit 4_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x08 "GICD_CPENDSGIR2,Clear-pending register 2 for SGI [11:8]"
|
|
bitfld.long 0x08 31. " SGI_CP11_7 ,Clear Pending Bit 11_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 30. " SGI_CP11_6 ,Clear Pending Bit 11_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 29. " SGI_CP11_5 ,Clear Pending Bit 11_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SGI_CP11_4 ,Clear Pending Bit 11_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 27. " SGI_CP11_3 ,Clear Pending Bit 11_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 26. " SGI_CP11_2 ,Clear Pending Bit 11_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SGI_CP11_1 ,Clear Pending Bit 11_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 24. " SGI_CP11_0 ,Clear Pending Bit 11_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 23. " SGI_CP10_7 ,Clear Pending Bit 10_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SGI_CP10_6 ,Clear Pending Bit 10_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 21. " SGI_CP10_5 ,Clear Pending Bit 10_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 20. " SGI_CP10_4 ,Clear Pending Bit 10_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SGI_CP10_3 ,Clear Pending Bit 10_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 18. " SGI_CP10_2 ,Clear Pending Bit 10_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 17. " SGI_CP10_1 ,Clear Pending Bit 10_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SGI_CP10_0 ,Clear Pending Bit 10_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 15. " SGI_CP9_7 ,Clear Pending Bit 9_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 14. " SGI_CP9_6 ,Clear Pending Bit 9_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SGI_CP9_5 ,Clear Pending Bit 9_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 12. " SGI_CP9_4 ,Clear Pending Bit 9_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 11. " SGI_CP9_3 ,Clear Pending Bit 9_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SGI_CP9_2 ,Clear Pending Bit 9_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 9. " SGI_CP9_1 ,Clear Pending Bit 9_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 8. " SGI_CP9_0 ,Clear Pending Bit 9_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SGI_CP8_7 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 6. " SGI_CP8_6 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 5. " SGI_CP8_5 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SGI_CP8_4 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 3. " SGI_CP8_3 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 2. " SGI_CP8_2 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SGI_CP8_1 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x08 0. " SGI_CP8_0 ,Clear Pending Bit 8_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
line.long 0x0C "GICD_CPENDSGIR3,Clear-pending register 3 for SGI [15:12]"
|
|
bitfld.long 0x0C 31. " SGI_CP15_7 ,Clear Pending Bit 15_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 30. " SGI_CP15_6 ,Clear Pending Bit 15_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 29. " SGI_CP15_5 ,Clear Pending Bit 15_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SGI_CP15_4 ,Clear Pending Bit 15_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 27. " SGI_CP15_3 ,Clear Pending Bit 15_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 26. " SGI_CP15_2 ,Clear Pending Bit 15_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SGI_CP15_1 ,Clear Pending Bit 15_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 24. " SGI_CP15_0 ,Clear Pending Bit 15_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 23. " SGI_CP14_7 ,Clear Pending Bit 14_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SGI_CP14_6 ,Clear Pending Bit 14_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 21. " SGI_CP14_5 ,Clear Pending Bit 14_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 20. " SGI_CP14_4 ,Clear Pending Bit 14_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SGI_CP14_3 ,Clear Pending Bit 14_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 18. " SGI_CP14_2 ,Clear Pending Bit 14_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 17. " SGI_CP14_1 ,Clear Pending Bit 14_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SGI_CP14_0 ,Clear Pending Bit 14_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 15. " SGI_CP13_7 ,Clear Pending Bit 13_7 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 14. " SGI_CP13_6 ,Clear Pending Bit 13_6 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SGI_CP13_5 ,Clear Pending Bit 13_5 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 12. " SGI_CP13_4 ,Clear Pending Bit 13_4 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 11. " SGI_CP13_3 ,Clear Pending Bit 13_3 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SGI_CP13_2 ,Clear Pending Bit 13_2 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 9. " SGI_CP13_1 ,Clear Pending Bit 13_1 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 8. " SGI_CP13_0 ,Clear Pending Bit 13_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SGI_CP12_7 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 6. " SGI_CP12_6 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 5. " SGI_CP12_5 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SGI_CP12_4 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 3. " SGI_CP12_3 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 2. " SGI_CP12_2 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SGI_CP12_1 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
bitfld.long 0x0C 0. " SGI_CP12_0 ,Clear Pending Bit 12_0 [read/write]" "Not pending/No effect,Pending/Clear"
|
|
group.long 0xF20++0x0F
|
|
line.long 0x00 "GICD_SPENDSGIR0,Set-Pending register 0 for SGI [3:0]"
|
|
bitfld.long 0x00 31. " SGI_CP3_7 ,Set Pending Bit 3_7" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SGI_CP3_6 ,Set Pending Bit 3_6" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SGI_CP3_5 ,Set Pending Bit 3_5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SGI_CP3_4 ,Set Pending Bit 3_4" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SGI_CP3_3 ,Set Pending Bit 3_3" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SGI_CP3_2 ,Set Pending Bit 3_2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SGI_CP3_1 ,Set Pending Bit 3_1" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SGI_CP3_0 ,Set Pending Bit 3_0" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SGI_CP2_7 ,Set Pending Bit 2_7" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SGI_CP2_6 ,Set Pending Bit 2_6" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SGI_CP2_5 ,Set Pending Bit 2_5" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SGI_CP2_4 ,Set Pending Bit 2_4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SGI_CP2_3 ,Set Pending Bit 2_3" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SGI_CP2_2 ,Set Pending Bit 2_2" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " SGI_CP2_1 ,Set Pending Bit 2_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGI_CP2_0 ,Set Pending Bit 2_0" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SGI_CP1_7 ,Set Pending Bit 1_7" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SGI_CP1_6 ,Set Pending Bit 1_6" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_CP1_5 ,Set Pending Bit 1_5" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SGI_CP1_4 ,Set Pending Bit 1_4" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SGI_CP1_3 ,Set Pending Bit 1_3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_CP1_2 ,Set Pending Bit 1_2" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SGI_CP1_1 ,Set Pending Bit 1_1" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SGI_CP1_0 ,Set Pending Bit 1_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_CP0_7 ,Set Pending Bit 0_7" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SGI_CP0_6 ,Set Pending Bit 0_6" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SGI_CP0_5 ,Set Pending Bit 0_5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_CP0_4 ,Set Pending Bit 0_4" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SGI_CP0_3 ,Set Pending Bit 0_3" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SGI_CP0_2 ,Set Pending Bit 0_2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_CP0_1 ,Set Pending Bit 0_1" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SGI_CP0_0 ,Set Pending Bit 0_0" "Not pending,Pending"
|
|
line.long 0x04 "GICD_SPENDSGIR1,Set-Pending register 1 for SGI [7:4]"
|
|
bitfld.long 0x04 31. " SGI_CP7_7 ,Set Pending Bit 7_7" "Not pending,Pending"
|
|
bitfld.long 0x04 30. " SGI_CP7_6 ,Set Pending Bit 7_6" "Not pending,Pending"
|
|
bitfld.long 0x04 29. " SGI_CP7_5 ,Set Pending Bit 7_5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SGI_CP7_4 ,Set Pending Bit 7_4" "Not pending,Pending"
|
|
bitfld.long 0x04 27. " SGI_CP7_3 ,Set Pending Bit 7_3" "Not pending,Pending"
|
|
bitfld.long 0x04 26. " SGI_CP7_2 ,Set Pending Bit 7_2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SGI_CP7_1 ,Set Pending Bit 7_1" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " SGI_CP7_0 ,Set Pending Bit 7_0" "Not pending,Pending"
|
|
bitfld.long 0x04 23. " SGI_CP6_7 ,Set Pending Bit 6_7" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SGI_CP6_6 ,Set Pending Bit 6_6" "Not pending,Pending"
|
|
bitfld.long 0x04 21. " SGI_CP6_5 ,Set Pending Bit 6_5" "Not pending,Pending"
|
|
bitfld.long 0x04 20. " SGI_CP6_4 ,Set Pending Bit 6_4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SGI_CP6_3 ,Set Pending Bit 6_3" "Not pending,Pending"
|
|
bitfld.long 0x04 18. " SGI_CP6_2 ,Set Pending Bit 6_2" "Not pending,Pending"
|
|
bitfld.long 0x04 17. " SGI_CP6_1 ,Set Pending Bit 6_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SGI_CP6_0 ,Set Pending Bit 6_0" "Not pending,Pending"
|
|
bitfld.long 0x04 15. " SGI_CP5_7 ,Set Pending Bit 5_7" "Not pending,Pending"
|
|
bitfld.long 0x04 14. " SGI_CP5_6 ,Set Pending Bit 5_6" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SGI_CP5_5 ,Set Pending Bit 5_5" "Not pending,Pending"
|
|
bitfld.long 0x04 12. " SGI_CP5_4 ,Set Pending Bit 5_4" "Not pending,Pending"
|
|
bitfld.long 0x04 11. " SGI_CP5_3 ,Set Pending Bit 5_3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SGI_CP5_2 ,Set Pending Bit 5_2" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " SGI_CP5_1 ,Set Pending Bit 5_1" "Not pending,Pending"
|
|
bitfld.long 0x04 8. " SGI_CP5_0 ,Set Pending Bit 5_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SGI_CP4_7 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
bitfld.long 0x04 6. " SGI_CP4_6 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
bitfld.long 0x04 5. " SGI_CP4_5 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SGI_CP4_4 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
bitfld.long 0x04 3. " SGI_CP4_3 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " SGI_CP4_2 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SGI_CP4_1 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " SGI_CP4_0 ,Set Pending Bit 4_0" "Not pending,Pending"
|
|
line.long 0x08 "GICD_SPENDSGIR2,Set-Pending register 2 for SGI [11:8]"
|
|
bitfld.long 0x08 31. " SGI_CP11_7 ,Set Pending Bit 11_7" "Not pending,Pending"
|
|
bitfld.long 0x08 30. " SGI_CP11_6 ,Set Pending Bit 11_6" "Not pending,Pending"
|
|
bitfld.long 0x08 29. " SGI_CP11_5 ,Set Pending Bit 11_5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SGI_CP11_4 ,Set Pending Bit 11_4" "Not pending,Pending"
|
|
bitfld.long 0x08 27. " SGI_CP11_3 ,Set Pending Bit 11_3" "Not pending,Pending"
|
|
bitfld.long 0x08 26. " SGI_CP11_2 ,Set Pending Bit 11_2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SGI_CP11_1 ,Set Pending Bit 11_1" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " SGI_CP11_0 ,Set Pending Bit 11_0" "Not pending,Pending"
|
|
bitfld.long 0x08 23. " SGI_CP10_7 ,Set Pending Bit 10_7" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SGI_CP10_6 ,Set Pending Bit 10_6" "Not pending,Pending"
|
|
bitfld.long 0x08 21. " SGI_CP10_5 ,Set Pending Bit 10_5" "Not pending,Pending"
|
|
bitfld.long 0x08 20. " SGI_CP10_4 ,Set Pending Bit 10_4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SGI_CP10_3 ,Set Pending Bit 10_3" "Not pending,Pending"
|
|
bitfld.long 0x08 18. " SGI_CP10_2 ,Set Pending Bit 10_2" "Not pending,Pending"
|
|
bitfld.long 0x08 17. " SGI_CP10_1 ,Set Pending Bit 10_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SGI_CP10_0 ,Set Pending Bit 10_0" "Not pending,Pending"
|
|
bitfld.long 0x08 15. " SGI_CP9_7 ,Set Pending Bit 9_7" "Not pending,Pending"
|
|
bitfld.long 0x08 14. " SGI_CP9_6 ,Set Pending Bit 9_6" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SGI_CP9_5 ,Set Pending Bit 9_5" "Not pending,Pending"
|
|
bitfld.long 0x08 12. " SGI_CP9_4 ,Set Pending Bit 9_4" "Not pending,Pending"
|
|
bitfld.long 0x08 11. " SGI_CP9_3 ,Set Pending Bit 9_3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SGI_CP9_2 ,Set Pending Bit 9_2" "Not pending,Pending"
|
|
bitfld.long 0x08 9. " SGI_CP9_1 ,Set Pending Bit 9_1" "Not pending,Pending"
|
|
bitfld.long 0x08 8. " SGI_CP9_0 ,Set Pending Bit 9_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SGI_CP8_7 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
bitfld.long 0x08 6. " SGI_CP8_6 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
bitfld.long 0x08 5. " SGI_CP8_5 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SGI_CP8_4 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
bitfld.long 0x08 3. " SGI_CP8_3 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
bitfld.long 0x08 2. " SGI_CP8_2 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SGI_CP8_1 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
bitfld.long 0x08 0. " SGI_CP8_0 ,Set Pending Bit 8_0" "Not pending,Pending"
|
|
line.long 0x0C "GICD_SPENDSGIR3,Set-Pending register 3 for SGI [15:12]"
|
|
bitfld.long 0x0C 31. " SGI_CP15_7 ,Set Pending Bit 15_7" "Not pending,Pending"
|
|
bitfld.long 0x0C 30. " SGI_CP15_6 ,Set Pending Bit 15_6" "Not pending,Pending"
|
|
bitfld.long 0x0C 29. " SGI_CP15_5 ,Set Pending Bit 15_5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SGI_CP15_4 ,Set Pending Bit 15_4" "Not pending,Pending"
|
|
bitfld.long 0x0C 27. " SGI_CP15_3 ,Set Pending Bit 15_3" "Not pending,Pending"
|
|
bitfld.long 0x0C 26. " SGI_CP15_2 ,Set Pending Bit 15_2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SGI_CP15_1 ,Set Pending Bit 15_1" "Not pending,Pending"
|
|
bitfld.long 0x0C 24. " SGI_CP15_0 ,Set Pending Bit 15_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 23. " SGI_CP14_7 ,Set Pending Bit 14_7" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SGI_CP14_6 ,Set Pending Bit 14_6" "Not pending,Pending"
|
|
bitfld.long 0x0C 21. " SGI_CP14_5 ,Set Pending Bit 14_5" "Not pending,Pending"
|
|
bitfld.long 0x0C 20. " SGI_CP14_4 ,Set Pending Bit 14_4" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SGI_CP14_3 ,Set Pending Bit 14_3" "Not pending,Pending"
|
|
bitfld.long 0x0C 18. " SGI_CP14_2 ,Set Pending Bit 14_2" "Not pending,Pending"
|
|
bitfld.long 0x0C 17. " SGI_CP14_1 ,Set Pending Bit 14_1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SGI_CP14_0 ,Set Pending Bit 14_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 15. " SGI_CP13_7 ,Set Pending Bit 13_7" "Not pending,Pending"
|
|
bitfld.long 0x0C 14. " SGI_CP13_6 ,Set Pending Bit 13_6" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SGI_CP13_5 ,Set Pending Bit 13_5" "Not pending,Pending"
|
|
bitfld.long 0x0C 12. " SGI_CP13_4 ,Set Pending Bit 13_4" "Not pending,Pending"
|
|
bitfld.long 0x0C 11. " SGI_CP13_3 ,Set Pending Bit 13_3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SGI_CP13_2 ,Set Pending Bit 13_2" "Not pending,Pending"
|
|
bitfld.long 0x0C 9. " SGI_CP13_1 ,Set Pending Bit 13_1" "Not pending,Pending"
|
|
bitfld.long 0x0C 8. " SGI_CP13_0 ,Set Pending Bit 13_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SGI_CP12_7 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 6. " SGI_CP12_6 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 5. " SGI_CP12_5 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SGI_CP12_4 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 3. " SGI_CP12_3 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 2. " SGI_CP12_2 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SGI_CP12_1 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
bitfld.long 0x0C 0. " SGI_CP12_0 ,Set Pending Bit 12_0" "Not pending,Pending"
|
|
tree.end
|
|
tree "ID registers"
|
|
width 12.
|
|
rgroup.long 0x0FD0++0x03
|
|
line.long 0x00 "GICD_PIDR4,Peripheral ID 4 register"
|
|
bitfld.long 0x00 0.--3. " PIDR4 ,ARM-defined revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hgroup.long 0x0FD4++0x0B
|
|
hide.long 0x00 "GICD_PIDR5,Peripheral ID 5 register"
|
|
hide.long 0x04 "GICD_PIDR6,Peripheral ID 6 register"
|
|
hide.long 0x08 "GICD_PIDR7,Peripheral ID 7 register"
|
|
rgroup.long 0x0FE0++0x0F
|
|
line.long 0x00 "GICD_PIDR0,Peripheral ID 0 register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIDR0 ,ARM-defined DevID field"
|
|
line.long 0x04 "GICD_PIDR1,Peripheral ID 1 register"
|
|
bitfld.long 0x04 4.--7. " PIDR1_ARC ,ARM-defined ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PIDR1_DEV ,ARM-defined DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "GICD_PIDR2,Peripheral ID 2 register"
|
|
bitfld.long 0x08 4.--7. " PIDR2_ARCR ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 3. " PIDR2_JEP ,ARM-defined UsesJEPcode field" "0,1"
|
|
bitfld.long 0x08 0.--2. " PIDR_ARC ,ARM-defined ArchID field" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "GICD_PIDR3,Peripheral ID 3 register"
|
|
bitfld.long 0x0C 4.--7. " PIDR3_REV ,ARM-defined revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x0FF0++0x0F
|
|
line.long 0x0 "GICD_CIDR0,Component ID 0 register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CIDR0 ,ARM-defined fixed values for the preamble for the component discovery"
|
|
line.long 0x4 "GICD_CIDR1,Component ID 1 register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CIDR1 ,ARM-defined fixed values for the preamble for the component discovery"
|
|
line.long 0x8 "GICD_CIDR2,Component ID 2 register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CIDR2 ,ARM-defined fixed values for the preamble for the component discovery"
|
|
line.long 0xC "GICD_CIDR3,Component ID 3 register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CIDR3 ,ARM-defined fixed values for the preamble for the component discovery"
|
|
tree.end
|
|
tree.end
|
|
tree "CPU Interface"
|
|
base ad:0x10482000
|
|
width 15.
|
|
if (((d.l(ad:0x10480000+0x04))&0x400)==0x400)
|
|
group.long 0x00++0x03 "Interrupt Controller Physical CPU Interface"
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 9. " EOIMODENS ,Behaviour of non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate interrupt,Priority drop only"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP1 ,Determine if bypass IRQ signal is signalled to the processor" "Yes,No"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,Determine if bypass FIQ signal is signalled to the processor" "Yes,No"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03 "Interrupt Controller Physical CPU Interface"
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 10. " EOIMODENS ,Behaviour of secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate interrupt,Priority drop only"
|
|
bitfld.long 0x00 9. " EOIMODES ,Behaviour of accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate interrupt,Priority drop only"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IRQBYPDISGRP1 ,Determine if bypass IRQ signal is signalled to the processor" "Yes,No"
|
|
bitfld.long 0x00 7. " FIQBYPDISGRP0 ,Determine if bypass FIQ signal is signalled to the processor" "Yes,No"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,Determine if bypass IRQ signal is signalled to the processor" "Yes,No"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,Determine if bypass FIQ signal is signalled to the processor" "Yes,No"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CBPR ,Group interrupts control" "BPR and ABPR,BPR"
|
|
bitfld.long 0x00 3. " FIQEN ,Group 0 interrupts signal control" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ACKCTL ,IAR and HPPIR control" "0,1"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for signalling interrupts of group 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for signalling interrupts of group 0" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GICC_AIAR,Aliased interrupt acknowledge Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "GICC_AEOIR,Aliased end of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID value from the corresponding GICC_AIAR access"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "GICC_AHPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "GICC_APR0,Active priority register"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "GICC_NSAPR0,Non-secure active priority register"
|
|
rgroup.long 0xFC++0x03 "CPU Interface Identification"
|
|
line.long 0x00 "GICC_IIDR,CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODUCTID ,An IMPLEMENTATION DEFINED product identifier"
|
|
bitfld.long 0x00 16.--19. " ARCHIT_VER ,GIC architecture version" "Reserved,Reserved,GICv2,?..."
|
|
hexmask.long.byte 0x00 12.--15. 1. " REV ,An IMPLEMENTATION DEFINED revision number for the CPU interface"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,Contains the JEP106 code of the company"
|
|
wgroup.long 0x1000++0x03 "Interrupt Deactivation"
|
|
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID"
|
|
tree.end
|
|
tree "Virtual Interface Control"
|
|
width 12.
|
|
base ad:0x10484000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GICH_HCR,Hypervisor control register"
|
|
bitfld.long 0x00 27.--31. " EOICOUNT ,Number of EOIs received without entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. " VGRP1DIE ,VM disable group 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VGRP1EIE ,VM enable group 1 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VGRP0DIE ,VM disable group 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VGRP0EIE ,VM enable group 0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NPIE ,No pending interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LRENPIE ,List register entry not present interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UIE ,Underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Virtual CPU interface enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "GICH_VTR,VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
|
|
bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
|
|
bitfld.long 0x00 0.--5. " LSITREGS ,Number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GICH_VMCR,Virtual machine control register"
|
|
bitfld.long 0x00 27.--31. " VMPRIMASK ,Virtual interrupt priority filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--23. " VMBP ,VM binary point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " VMABP ,VM aliased binary point" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VEM ,GICV_EOIR/GICV_AEOIR and GICV_DIR behaviour control" "0,1"
|
|
bitfld.long 0x00 4. " VMCBPR ,GICV_BPR group control" "Group 0,Group 0 and 1"
|
|
bitfld.long 0x00 3. " VMFIQEN ,Group 0 interrupts control" "Virtual IRQs,Virtual FIQs"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VMACKCTL ,CPU interrupt acknowledgement" "0,1"
|
|
bitfld.long 0x00 1. " VMGRP1EN ,Group 1 virtual interrupts enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VMGRP0EN ,Group 0 virtual interrupts enable" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "GICH_MISR,Maintenance interrupt status register"
|
|
bitfld.long 0x00 7. " VGR1D ,Disabled group 1 maintenance interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VGR1E ,Enabled group 1 maintenance interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VGR0D ,Disabled group 0 maintenance interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VGR0E ,Enabled group 0 maintenance interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NP ,No pending maintenance interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LRENP ,List register entry not present maintenance interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "Disabled,Enabled"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GICH_EISR0,End of interrupt status register"
|
|
bitfld.long 0x00 31. " REG31 ,List register EOI status bit 31" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 30. " REG30 ,List register EOI status bit 30" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 29. " REG29 ,List register EOI status bit 29" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 28. " REG28 ,List register EOI status bit 28" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REG27 ,List register EOI status bit 27" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 26. " REG26 ,List register EOI status bit 26" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 25. " REG25 ,List register EOI status bit 25" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 24. " REG24 ,List register EOI status bit 24" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REG23 ,List register EOI status bit 23" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 22. " REG22 ,List register EOI status bit 22" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 21. " REG21 ,List register EOI status bit 21" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 20. " REG20 ,List register EOI status bit 20" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REG19 ,List register EOI status bit 19" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 18. " REG18 ,List register EOI status bit 18" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 17. " REG17 ,List register EOI status bit 17" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 16. " REG16 ,List register EOI status bit 16" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 15. " REG15 ,List register EOI status bit 15" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 14. " REG14 ,List register EOI status bit 14" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 13. " REG13 ,List register EOI status bit 13" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 12. " REG12 ,List register EOI status bit 12" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REG11 ,List register EOI status bit 11" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 10. " REG10 ,List register EOI status bit 10" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 9. " REG9 ,List register EOI status bit 9" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 8. " REG8 ,List register EOI status bit 8" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REG7 ,List register EOI status bit 7" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 6. " REG6 ,List register EOI status bit 6" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 5. " REG5 ,List register EOI status bit 5" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 4. " REG4 ,List register EOI status bit 4" "Has no EOI,Has EOI"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REG3 ,List register EOI status bit 3" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 2. " REG2 ,List register EOI status bit 2" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 1. " REG1 ,List register EOI status bit 1" "Has no EOI,Has EOI"
|
|
bitfld.long 0x00 0. " REG0 ,List register EOI status bit 0" "Has no EOI,Has EOI"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "GICH_ELSER0,Empty list register status register"
|
|
bitfld.long 0x00 31. " REG31 ,List register status bit 31" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 30. " REG30 ,List register status bit 30" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 29. " REG29 ,List register status bit 29" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 28. " REG28 ,List register status bit 28" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REG27 ,List register status bit 27" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 26. " REG26 ,List register status bit 26" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 25. " REG25 ,List register status bit 25" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 24. " REG24 ,List register status bit 24" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REG23 ,List register status bit 23" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 22. " REG22 ,List register status bit 22" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 21. " REG21 ,List register status bit 21" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 20. " REG20 ,List register status bit 20" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REG19 ,List register status bit 19" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 18. " REG18 ,List register status bit 18" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 17. " REG17 ,List register status bit 17" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 16. " REG16 ,List register status bit 16" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " REG15 ,List register status bit 15" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 14. " REG14 ,List register status bit 14" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 13. " REG13 ,List register status bit 13" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 12. " REG12 ,List register status bit 12" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REG11 ,List register status bit 11" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 10. " REG10 ,List register status bit 10" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 9. " REG9 ,List register status bit 9" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 8. " REG8 ,List register status bit 8" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " REG7 ,List register status bit 7" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 6. " REG6 ,List register status bit 6" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 5. " REG5 ,List register status bit 5" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 4. " REG4 ,List register status bit 4" "Has interrupt,Has no interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " REG3 ,List register status bit 3" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 2. " REG2 ,List register status bit 2" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 1. " REG1 ,List register status bit 1" "Has interrupt,Has no interrupt"
|
|
bitfld.long 0x00 0. " REG0 ,List register status bit 0" "Has interrupt,Has no interrupt"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "GICH_APR0,Active priority register"
|
|
bitfld.long 0x00 31. " APR31 ,Bit31 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 30. " APR30 ,Bit30 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 29. " APR29 ,Bit29 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 28. " APR28 ,Bit28 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " APR27 ,Bit27 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 26. " APR26 ,Bit26 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 25. " APR25 ,Bit25 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 24. " APR24 ,Bit24 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " APR23 ,Bit23 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 22. " APR22 ,Bit22 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 21. " APR21 ,Bit21 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 20. " APR20 ,Bit20 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " APR19 ,Bit19 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 18. " APR18 ,Bit18 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 17. " APR17 ,Bit17 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 16. " APR16 ,Bit16 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " APR15 ,Bit15 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 14. " APR14 ,Bit14 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 13. " APR13 ,Bit13 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 12. " APR12 ,Bit12 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " APR11 ,Bit11 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 10. " APR10 ,Bit10 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 9. " APR9 ,Bit9 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 8. " APR8 ,Bit8 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " APR7 ,Bit7 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 6. " APR6 ,Bit6 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 5. " APR5 ,Bit5 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 4. " APR4 ,Bit4 preemption level activation" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APR3 ,Bit3 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 2. " APR2 ,Bit2 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 1. " APR1 ,Bit1 preemption level activation" "Not active,Active"
|
|
bitfld.long 0x00 0. " APR0 ,Bit0 preemption level activation" "Not active,Active"
|
|
if (((d.l(ad:0x10484000+0x100))&0x80000000)==0x00000000)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "GICH_LR0,List register 0"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,EOI maintenance interrupt trigger" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
else
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "GICH_LR0,List register 0"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Physical interrupt ID"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
endif
|
|
if (((d.l(ad:0x10484000+0x104))&0x80000000)==0x00000000)
|
|
group.long 0x104++0x0F
|
|
line.long 0x00 "GICH_LR1,List register 1"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,EOI maintenance interrupt trigger" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
else
|
|
group.long 0x104++0x0F
|
|
line.long 0x00 "GICH_LR1,List register 1"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Physical interrupt ID"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
endif
|
|
if (((d.l(ad:0x10484000+0x108))&0x80000000)==0x00000000)
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "GICH_LR2,List register 2"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,EOI maintenance interrupt trigger" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
else
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "GICH_LR2,List register 2"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Physical interrupt ID"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
endif
|
|
if (((d.l(ad:0x10484000+0x10C))&0x80000000)==0x00000000)
|
|
group.long 0x10C++0x0F
|
|
line.long 0x00 "GICH_LR3,List register 3"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,EOI maintenance interrupt trigger" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
else
|
|
group.long 0x10C++0x0F
|
|
line.long 0x00 "GICH_LR3,List register 3"
|
|
bitfld.long 0x00 31. " HW ,Virtual interrupt hardware/software mode" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Group virtual interrupt switch" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,State of interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Physical interrupt ID"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,VirtualID for CPU interface"
|
|
endif
|
|
tree.end
|
|
width 13.
|
|
tree "Virtual CPU Interface"
|
|
base ad:0x10486000
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "GICV_CTLR,Virtual machine control register"
|
|
bitfld.long 0x00 9. " EOIMODES ,Behaviour of accesses to the GICV_EOIR/GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate interrupt,Priority drop only"
|
|
bitfld.long 0x00 4. " CBPR ,Group interrupts control" "BPR and ABPR,BPR"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FIQEN ,Group 0 interrupts signal control" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ACKCTL ,GICV_IAR" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for signalling interrupts of group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for signalling interrupts of group 0" "Disabled,Enabled"
|
|
line.long 0x04 "GICV_PMR,VM priority mask register"
|
|
bitfld.long 0x04 3.--7. " PRIORITY ,Virtual interrupt priority filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "GICV_BPR,VM binary point register"
|
|
bitfld.long 0x08 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "GICV_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "GICV_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding GICV_IAR access"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "GICV_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority virtual interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "GICV_HPPIR,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "GICV_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "GICV_AIAR,Aliased interrupt acknowledge Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "GICV_AEOIR,Aliased end of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID value from the corresponding GICV_AIAR access"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "GICV_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "GICV_APR0,Active priority register"
|
|
rgroup.long 0xFC++0x03 "CPU Interface Identification"
|
|
line.long 0x00 "GICV_IIDR,CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODUCTID ,An IMPLEMENTATION DEFINED product identifier"
|
|
bitfld.long 0x00 16.--19. " ARCHIT_VER ,GIC architecture version" "Reserved,Reserved,GICv2,?..."
|
|
bitfld.long 0x00 12.--15. " REVISION ,An IMPLEMENTATION DEFINED revision number for the CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,Contains the JEP106 code of the company"
|
|
wgroup.long 0x1000++0x03 "Interrupt Deactivation"
|
|
line.long 0x00 "GICV_DIR,Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTERRUPTID ,Interrupt ID"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Interrupt Combiner"
|
|
tree "Main CPU"
|
|
base ad:0x10440000
|
|
width 7.
|
|
group.long 0x08++0x03 "INTC0"
|
|
line.long 0x00 "ISTR0,Interrupt Status Register 0"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SYSMMU_SCALERPISP[1]_set/clr ,SYSMMU_SCALERPISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SYSMMU_SCALERPISP[0]_set/clr ,SYSMMU_SCALERPISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " SYSMMU_FIMC_LITE0[1]_set/clr ,SYSMMU_FIMC_LITE0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " SYSMMU_FIMC_LITE0[0]_set/clr ,SYSMMU_FIMC_LITE0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " SYSMMU_DISP1_M0[1]_set/clr ,SYSMMU_DISP1_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " SYSMMU_DISP1_M0[0]_set/clr ,SYSMMU_DISP1_M0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_FIMC_LITE2[1]_set/clr ,SYSMMU_FIMC_LITE2[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_FIMC_LITE2[0]_set/clr ,SYSMMU_FIMC_LITE2[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_GSCL3[1]_set/clr ,SYSMMU_GSCL3[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_GSCL3[0]_set/clr ,SYSMMU_GSCL3[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_GSCL2[1]_set/clr ,SYSMMU_GSCL2[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_GSCL2[0]_set/clr ,SYSMMU_GSCL2[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " SYSMMU_GSCL1[1]_set/clr ,SYSMMU_GSCL1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " SYSMMU_GSCL1[0]_set/clr ,SYSMMU_GSCL1[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " SYSMMU_GSCL0[1]_set/clr ,SYSMMU_GSCL0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " SYSMMU_GSCL0[0]_set/clr ,SYSMMU_GSCL0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CPU_NCNTVIRQ[0]_set/clr ,CPU_nCNTVIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CPU_NCNTPSIRQ[0]_set/clr ,CPU_nCNTPSIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CPU_NCNTPSNIRQ[0]_set/clr ,CPU_nCNTPSNIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CPU_NCNTHPIRQ[0]_set/clr ,CPU_nCNTHPIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CPU_NCTIIRQ[0]_set/clr ,CPU_nCTIIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPU_NPMUIRQ[0]_set/clr ,CPU_nPMUIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CPU_PARITYFAILSCU[0]_set/clr ,CPU_PARITYFAILSCU[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CPU_PARITYFAIL0_set/clr ,CPU_PARITYFAIL0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " TZASC_XR1BXW_set/clr ,TZASC_XR1BXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TZASC_XR1BXR_set/clr ,TZASC_XR1BXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " TZASC_XLBXW_set/clr ,TZASC_XLBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TZASC_XLBXR_set/clr ,TZASC_XLBXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TZASC_DRBXW_set/clr ,TZASC_DRBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TZASC_DRBXR_set/clr ,TZASC_DRBXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TZASC_CBXW_set/clr ,TZASC_CBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TZASC_CBXR_set/clr ,TZASC_CBXR interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IMSR0,Interrupt Masked Status Register 0"
|
|
bitfld.long 0x00 31. " SYSMMU_SCALERPISP[1] ,SYSMMU_SCALERPISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SYSMMU_SCALERPISP[0] ,SYSMMU_SCALERPISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SYSMMU_FIMC_LITE0[1] ,SYSMMU_FIMC_LITE0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " SYSMMU_FIMC_LITE0[0] ,SYSMMU_FIMC_LITE0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SYSMMU_DISP1_M0[1] ,SYSMMU_DISP1_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SYSMMU_DISP1_M0[0] ,SYSMMU_DISP1_M0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SYSMMU_FIMC_LITE2[1] ,SYSMMU_FIMC_LITE2[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SYSMMU_FIMC_LITE2[0] ,SYSMMU_FIMC_LITE2[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYSMMU_GSCL3[1] ,SYSMMU_GSCL3[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_GSCL3[0] ,SYSMMU_GSCL3[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SYSMMU_GSCL2[1] ,SYSMMU_GSCL2[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SYSMMU_GSCL2[0] ,SYSMMU_GSCL2[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SYSMMU_GSCL1[1] ,SYSMMU_GSCL1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SYSMMU_GSCL1[0] ,SYSMMU_GSCL1[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SYSMMU_GSCL0[1] ,SYSMMU_GSCL0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " SYSMMU_GSCL0[0] ,SYSMMU_GSCL0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CPU_NCNTVIRQ[0] ,CPU_nCNTVIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " CPU_NCNTPSIRQ[0] ,CPU_nCNTPSIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CPU_NCNTPSNIRQ[0] ,CPU_nCNTPSNIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " CPU_NCNTHPIRQ[0] ,CPU_nCNTHPIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CPU_NCTIIRQ[0] ,CPU_nCTIIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " CPU_NPMUIRQ[0] ,CPU_nPMUIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPU_PARITYFAILSCU[0] ,CPU_PARITYFAILSCU[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " CPU_PARITYFAIL0 ,CPU_PARITYFAIL0 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TZASC_XR1BXW ,TZASC_XR1BXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " TZASC_XR1BXR ,TZASC_XR1BXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TZASC_XLBXW ,TZASC_XLBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " TZASC_XLBXR ,TZASC_XLBXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TZASC_DRBXW ,TZASC_DRBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " TZASC_DRBXR ,TZASC_DRBXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TZASC_CBXW ,TZASC_CBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " TZASC_CBXR ,TZASC_CBXR interrupt" "Not pending,Pending"
|
|
group.long 0x18++0x03 "INTC1"
|
|
line.long 0x00 "ISTR1,Interrupt Status Register 1"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " SYSMMU_TV_M0[1]_set/clr ,SYSMMU_TV_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " SYSMMU_TV_M0[0]_set/clr ,SYSMMU_TV_M0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " SYSMMU_MDMA1[1]_set/clr ,SYSMMU_MDMA1[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " SYSMMU_MDMA1[0]_set/clr ,SYSMMU_MDMA1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_MDMA0[1]_set/clr ,SYSMMU_MDMA0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_MDMA0[0]_set/clr ,SYSMMU_MDMA0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_SSS[1]_set/clr ,SYSMMU_SSS[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_SSS[0]_set/clr ,SYSMMU_SSS[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_RTIC[1]_set/clr ,SYSMMU_RTIC[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_RTIC[0]_set/clr ,SYSMMU_RTIC[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " SYSMMU_MFCR[1]_set/clr ,SYSMMU_MFCR[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " SYSMMU_MFCR[0]_set/clr ,SYSMMU_MFCR[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " SYSMMU_ARM[1]_set/clr ,SYSMMU_ARM[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " SYSMMU_ARM[0]_set/clr ,SYSMMU_ARM[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " SYSMMU_3DNR[1]_set/clr ,SYSMMU_3DNR[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " SYSMMU_3DNR[0]_set/clr ,SYSMMU_3DNR[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_MCUISP[1]_set/clr ,SYSMMU_MCUISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_MCUISP[0]_set/clr ,SYSMMU_MCUISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SYSMMU_SCALERCISP[0]_set/clr ,SYSMMU_SCALERCISP[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SYSMMU_FDISP[1]_set/clr ,SYSMMU_FDISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SYSMMU_FDISP[0]_set/clr ,SYSMMU_FDISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MCUIOP_CTIIRQ_set/clr ,MCUIOP_CTIIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " MCUIOP_PMUIRQ_set/clr ,MCUIOP_PMUIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " MCUISP_CTIIRQ_set/clr ,MCUISP_CTIIRQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " MCUISP_PMUIRQ_set/clr ,MCUISP_PMUIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " SYSMMU_JPEGX[1]_set/clr ,SYSMMU_JPEGX[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_JPEGX[0]_set/clr ,SYSMMU_JPEGX[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_ROTATOR[1]_set/clr ,SYSMMU_ROTATOR[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " SYSMMU_ROTATOR[0]_set/clr ,SYSMMU_ROTATOR[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IMSR1,Interrupt Masked Status Register 1"
|
|
bitfld.long 0x00 29. " SYSMMU_TV_M0[1] ,SYSMMU_TV_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " SYSMMU_TV_M0[0] ,SYSMMU_TV_M0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SYSMMU_MDMA1[1] ,SYSMMU_MDMA1[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SYSMMU_MDMA1[0] ,SYSMMU_MDMA1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " SYSMMU_MDMA0[1] ,SYSMMU_MDMA0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SYSMMU_MDMA0[0] ,SYSMMU_MDMA0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYSMMU_SSS[1] ,SYSMMU_SSS[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_SSS[0] ,SYSMMU_SSS[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SYSMMU_RTIC[1] ,SYSMMU_RTIC[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYSMMU_RTIC[0] ,SYSMMU_RTIC[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " SYSMMU_MFCR[1] ,SYSMMU_MFCR[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SYSMMU_MFCR[0] ,SYSMMU_MFCR[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SYSMMU_ARM[1] ,SYSMMU_ARM[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " SYSMMU_ARM[0] ,SYSMMU_ARM[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SYSMMU_3DNR[1] ,SYSMMU_3DNR[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SYSMMU_3DNR[0] ,SYSMMU_3DNR[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SYSMMU_MCUISP[1] ,SYSMMU_MCUISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_MCUISP[0] ,SYSMMU_MCUISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SYSMMU_SCALERCISP[0] ,SYSMMU_SCALERCISP[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SYSMMU_FDISP[1] ,SYSMMU_FDISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SYSMMU_FDISP[0] ,SYSMMU_FDISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MCUIOP_CTIIRQ ,MCUIOP_CTIIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " MCUIOP_PMUIRQ ,MCUIOP_PMUIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " MCUISP_CTIIRQ ,MCUISP_CTIIRQ interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MCUISP_PMUIRQ ,MCUISP_PMUIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SYSMMU_JPEGX[1] ,SYSMMU_JPEGX[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_JPEGX[0] ,SYSMMU_JPEGX[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SYSMMU_ROTATOR[1] ,SYSMMU_ROTATOR[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SYSMMU_ROTATOR[0] ,SYSMMU_ROTATOR[0] interrupt" "Not pending,Pending"
|
|
group.long 0x28++0x03 "INTC2"
|
|
line.long 0x00 "ISTR2,Interrupt Status Register 2"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SYSMMU_DRCISP[1]_set/clr ,SYSMMU_DRCISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SYSMMU_DRCISP[0]_set/clr ,SYSMMU_DRCISP[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_ODC[1]_set/clr ,SYSMMU_ODC[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_ODC[0]_set/clr ,SYSMMU_ODC[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_ISP[1]_set/clr ,SYSMMU_ISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_ISP[0]_set/clr ,SYSMMU_ISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_DIS0[1]_set/clr ,SYSMMU_DIS0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_DIS0[0]_set/clr ,SYSMMU_DIS0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " DP1_set/clr ,DP1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_DIS1[1]_set/clr ,SYSMMU_DIS1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_DIS1[1]_set/clr ,SYSMMU_DIS1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " SYSMMU_MFCL[1]_set/clr ,SYSMMU_MFCL[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_MFCL[0]_set/clr ,SYSMMU_MFCL[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x02C++0x03
|
|
line.long 0x00 "IMSR2,Interrupt Masked Status Register"
|
|
bitfld.long 0x00 31. " SYSMMU_DRCISP[1] ,SYSMMU_DRCISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SYSMMU_DRCISP[0] ,SYSMMU_DRCISP[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " SYSMMU_ODC[1] ,SYSMMU_ODC[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SYSMMU_ODC[0] ,SYSMMU_ODC[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SYSMMU_ISP[1] ,SYSMMU_ISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_ISP[0] ,SYSMMU_ISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SYSMMU_DIS0[1] ,SYSMMU_DIS0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SYSMMU_DIS0[0] ,SYSMMU_DIS0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " DP1 ,DP1 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SYSMMU_DIS1[1] ,SYSMMU_DIS1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_DIS1[1] ,SYSMMU_DIS1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SYSMMU_MFCL[1] ,SYSMMU_MFCL[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SYSMMU_MFCL[0] ,SYSMMU_MFCL[0] interrupt" "Not pending,Pending"
|
|
group.long 0x38++0x03 "INTC3"
|
|
line.long 0x00 "ISTR3,Interrupt Status Register 3"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " MDMA0_ABORT_set/clr ,MDMA0_ABORT interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " MDMA1_ABORT_set/clr ,MDMA1_ABORT interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IMSR3,Interrupt Masked Status Register 3"
|
|
bitfld.long 0x00 27. " MDMA0_ABORT ,MDMA0_ABORT interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " MDMA1_ABORT ,MDMA1_ABORT interrupt" "Not pending,Pending"
|
|
group.long 0x48++0x03 "INTC4"
|
|
line.long 0x00 "ISTR4,Interrupt Status Register 4"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CPU_NRAMERRIRQ_set/clr ,CPU_nRAMERRIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CPU_NAXIERRIRQ_set/clr ,CPU_nAXIERRIRQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " INT_COMB_ISP_GIC_set/clr ,INT_COMB_ISP_GIC interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " INT_COMB_IOP_GIC_set/clr ,INT_COMB_IOP_GIC interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CCI_NERRORIRQ_set/clr ,CCI_nERRORIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " INT_COMB_ARMISP_GIC_set/clr ,INT_COMB_ARMISP_GIC interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " INT_COMB_ARMIOP_GIC_set/clr ,INT_COMB_ARMIOP_GIC interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " DISP1[3]_set/clr ,DISP1[3] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " DISP1[2]_set/clr ,DISP1[2] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " DISP1[1]_set/clr ,DISP1[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " DISP1[0]_set/clr ,DISP1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " SSCM_PULSE_IRQ_C2CIF[1]_set/clr ,SSCM_PULSE_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SSCM_PULSE_IRQ_C2CIF[0]_set/clr ,SSCM_PULSE_IRQ_C2CIF[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SSCM_IRQ_C2CIF[1]_set/clr ,SSCM_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SSCM_IRQ_C2CIF[1]_set/clr ,SSCM_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEREV_M1_CDREX_set/clr ,PEREV_M1_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PEREV_M0_CDREX_set/clr ,PEREV_M0_CDREX interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEREV_A1_CDREX_set/clr ,PEREV_A1_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PEREV_A0_CDREX_set/clr ,PEREV_A0_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "IMSR4,Interrupt Masked Status Register 4"
|
|
bitfld.long 0x00 31. " CPU_NRAMERRIRQ ,CPU_nRAMERRIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " CPU_NAXIERRIRQ ,CPU_nAXIERRIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " INT_COMB_ISP_GIC ,INT_COMB_ISP_GIC interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_COMB_IOP_GIC ,INT_COMB_IOP_GIC interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " CCI_NERRORIRQ ,CCI_nERRORIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " INT_COMB_ARMISP_GIC ,INT_COMB_ARMISP_GIC interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " INT_COMB_ARMIOP_GIC ,INT_COMB_ARMIOP_GIC interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " DISP1[3] ,DISP1[3] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " DISP1[2] ,DISP1[2] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DISP1[1] ,DISP1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " DISP1[0] ,DISP1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SSCM_PULSE_IRQ_C2CIF[1] ,SSCM_PULSE_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SSCM_PULSE_IRQ_C2CIF[0] ,SSCM_PULSE_IRQ_C2CIF[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SSCM_IRQ_C2CIF[1] ,SSCM_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SSCM_IRQ_C2CIF[1] ,SSCM_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " PEREV_M1_CDREX ,PEREV_M1_CDREX interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " PEREV_M0_CDREX ,PEREV_M0_CDREX interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEREV_A1_CDREX ,PEREV_A1_CDREX interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " PEREV_A0_CDREX ,PEREV_A0_CDREX interrupt" "Not pending,Pending"
|
|
group.long 0x58++0x03 "INTC5"
|
|
line.long 0x00 "ISTR5,Interrupt Status Register 5"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " MCT_G1_set/clr ,MCT_G1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " MCT_G0_set/clr ,MCT_G0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[0]_set/clr ,EINT[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CPU_NCNTVIRQ[1]_set/clr ,CPU_nCNTVIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CPU_NCTIIRQ[1]_set/clr ,CPU_nCTIIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CPU_NCNTPSIRQ[1]_set/clr ,CPU_nCNTPSIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CPU_NPMUIRQ[1]_set/clr ,CPU_nPMUIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CPU_NCNTPNSIRQ[1]_set/clr ,CPU_nCNTPNSIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CPU_PARITYFAILSCU[1]_set/clr ,CPU_PARITYFAILSCU[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CPU_NCNTHPIRQ[1]_set/clr ,CPU_nCNTHPIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CPU_PARITYFAIL[1]_set/clr ,CPU_PARITYFAIL[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CPU_NIRQ[1]_set/clr ,CPU_nIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CPU_NIRQ[0]_set/clr ,CPU_nIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "IMSR5,Interrupt Masked Status Register 5"
|
|
bitfld.long 0x00 28. " MCT_G1 ,MCT_G1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " MCT_G0 ,MCT_G0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[0] ,EINT[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CPU_NCNTVIRQ[1] ,CPU_nCNTVIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " CPU_NCTIIRQ[1] ,CPU_nCTIIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " CPU_NCNTPSIRQ[1] ,CPU_nCNTPSIRQ[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CPU_NPMUIRQ[1] ,CPU_nPMUIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " CPU_NCNTPNSIRQ[1] ,CPU_nCNTPNSIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " CPU_PARITYFAILSCU[1] ,CPU_PARITYFAILSCU[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPU_NCNTHPIRQ[1] ,CPU_nCNTHPIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " CPU_PARITYFAIL[1] ,CPU_PARITYFAIL[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " CPU_NIRQ[1] ,CPU_nIRQ[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU_NIRQ[0] ,CPU_nIRQ[0] interrupt" "Not pending,Pending"
|
|
group.long 0x68++0x03 "INTC6"
|
|
line.long 0x00 "ISTR6,Interrupt Status Register 6"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " EINT[7]_set/clr ,EINT[7] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[6]_set/clr ,EINT[6] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " EINT[5]_set/clr ,EINT[5] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " EINT[4]_set/clr ,EINT[4] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " MCT_G3_set/clr ,MCT_G3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " MCT_G2_set/clr ,MCT_G2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " EINT[3]_set/clr ,EINT[3] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " EINT[2]/clr ,EINT[2] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " SYSMMU_G2D[1]_set/clr ,SYSMMU_G2D[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_G2D[0]_set/clr ,SYSMMU_G2D[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_FIMC_LITE1[1]_set/clr ,SYSMMU_FIMC_LITE1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_FIMC_LITE1[0]_set/clr ,SYSMMU_FIMC_LITE1[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EINT[1]_set/clr ,EINT[1] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "IMSR6,Interrupt Masked Status Register 6"
|
|
bitfld.long 0x00 25. " EINT[7] ,EINT[7] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[6] ,EINT[6] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " EINT[5] ,EINT[5] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT[4] ,EINT[4] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " MCT_G3 ,MCT_G3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " MCT_G2 ,MCT_G2 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EINT[3] ,EINT[3] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " EINT[2]/clr ,EINT[2] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SYSMMU_G2D[1] ,SYSMMU_G2D[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SYSMMU_G2D[0] ,SYSMMU_G2D[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_FIMC_LITE1[1] ,SYSMMU_FIMC_LITE1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " SYSMMU_FIMC_LITE1[0] ,SYSMMU_FIMC_LITE1[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EINT[1] ,EINT[1] interrupt" "Not pending,Pending"
|
|
group.long 0x78++0x03 "INTC7"
|
|
line.long 0x00 "ISTR7,Interrupt Status Register 7"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " EINT[15]_set/clr ,EINT[15] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[14]_set/clr ,EINT[14] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " EINT[13]_set/clr ,EINT[13] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " EINT[12]_set/clr ,EINT[12] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " EINT[11]_set/clr ,EINT[11] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " EINT[10]/clr ,EINT[10] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " EINT[9]_set/clr ,EINT[9] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EINT[8]_set/clr ,EINT[8] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "IMSR7,Interrupt Masked Status Register 7"
|
|
bitfld.long 0x00 25. " EINT[15] ,EINT[15] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[14] ,EINT[14] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " EINT[13] ,EINT[13] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT[12] ,EINT[12] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " EINT[11] ,EINT[11] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " EINT[10]/clr ,EINT[10] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT[9] ,EINT[9] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " EINT[8] ,EINT[8] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
width 8.
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "CIPSR0,Current interrupt pending status register 0"
|
|
bitfld.long 0x00 31. " INT31 ,INT31 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " INT30 ,INT30 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " INT29 ,INT29 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " INT28 ,INT28 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " INT27 ,INT27 combined interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INT26 ,INT26 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " INT25 ,INT25 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " INT24 ,INT24 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " INT23 ,INT23 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " INT22 ,INT22 combined interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT21 ,INT21 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " INT20 ,INT20 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " INT19 ,INT19 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " INT18 ,INT18 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " INT17 ,INT17 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT16 ,INT16 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " INT15 ,INT15 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " INT14 ,INT14 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " INT13 ,INT13 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " INT12 ,INT12 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT11 ,INT11 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " INT10 ,INT10 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " INT9 ,INT9 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " INT8 ,INT8 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " INT7 ,INT7 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INT6 ,INT6 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " INT5 ,INT5 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " INT4 ,INT4 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " INT3 ,INT3 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " INT2 ,INT2 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT1 ,INT1 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT0 ,INT0 combined interrupt pending status" "Not pending,Pending"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IOP"
|
|
base ad:0x10450000
|
|
width 7.
|
|
group.long 0x08++0x03 "INTC0"
|
|
line.long 0x00 "ISTR0,Interrupt Status Register 0"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SYSMMU_SCALERPISP[1]_set/clr ,SYSMMU_SCALERPISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SYSMMU_SCALERPISP[0]_set/clr ,SYSMMU_SCALERPISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " SYSMMU_FIMC_LITE0[1]_set/clr ,SYSMMU_FIMC_LITE0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " SYSMMU_FIMC_LITE0[0]_set/clr ,SYSMMU_FIMC_LITE0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " SYSMMU_DISP1_M0[1]_set/clr ,SYSMMU_DISP1_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " SYSMMU_DISP1_M0[0]_set/clr ,SYSMMU_DISP1_M0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_FIMC_LITE2[1]_set/clr ,SYSMMU_FIMC_LITE2[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_FIMC_LITE2[0]_set/clr ,SYSMMU_FIMC_LITE2[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_GSCL3[1]_set/clr ,SYSMMU_GSCL3[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_GSCL3[0]_set/clr ,SYSMMU_GSCL3[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_GSCL2[1]_set/clr ,SYSMMU_GSCL2[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_GSCL2[0]_set/clr ,SYSMMU_GSCL2[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " SYSMMU_GSCL1[1]_set/clr ,SYSMMU_GSCL1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " SYSMMU_GSCL1[0]_set/clr ,SYSMMU_GSCL1[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " SYSMMU_GSCL0[1]_set/clr ,SYSMMU_GSCL0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " SYSMMU_GSCL0[0]_set/clr ,SYSMMU_GSCL0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CPU_NCNTVIRQ[0]_set/clr ,CPU_nCNTVIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CPU_NCNTPSIRQ[0]_set/clr ,CPU_nCNTPSIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CPU_NCNTPSNIRQ[0]_set/clr ,CPU_nCNTPSNIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CPU_NCNTHPIRQ[0]_set/clr ,CPU_nCNTHPIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CPU_NCTIIRQ[0]_set/clr ,CPU_nCTIIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPU_NPMUIRQ[0]_set/clr ,CPU_nPMUIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CPU_PARITYFAILSCU[0]_set/clr ,CPU_PARITYFAILSCU[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CPU_PARITYFAIL0_set/clr ,CPU_PARITYFAIL0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " TZASC_XR1BXW_set/clr ,TZASC_XR1BXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " TZASC_XR1BXR_set/clr ,TZASC_XR1BXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " TZASC_XLBXW_set/clr ,TZASC_XLBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " TZASC_XLBXR_set/clr ,TZASC_XLBXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TZASC_DRBXW_set/clr ,TZASC_DRBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TZASC_DRBXR_set/clr ,TZASC_DRBXR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TZASC_CBXW_set/clr ,TZASC_CBXW interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TZASC_CBXR_set/clr ,TZASC_CBXR interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IMSR0,Interrupt Masked Status Register 0"
|
|
bitfld.long 0x00 31. " SYSMMU_SCALERPISP[1] ,SYSMMU_SCALERPISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SYSMMU_SCALERPISP[0] ,SYSMMU_SCALERPISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SYSMMU_FIMC_LITE0[1] ,SYSMMU_FIMC_LITE0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " SYSMMU_FIMC_LITE0[0] ,SYSMMU_FIMC_LITE0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SYSMMU_DISP1_M0[1] ,SYSMMU_DISP1_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " SYSMMU_DISP1_M0[0] ,SYSMMU_DISP1_M0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SYSMMU_FIMC_LITE2[1] ,SYSMMU_FIMC_LITE2[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SYSMMU_FIMC_LITE2[0] ,SYSMMU_FIMC_LITE2[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYSMMU_GSCL3[1] ,SYSMMU_GSCL3[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_GSCL3[0] ,SYSMMU_GSCL3[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SYSMMU_GSCL2[1] ,SYSMMU_GSCL2[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SYSMMU_GSCL2[0] ,SYSMMU_GSCL2[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SYSMMU_GSCL1[1] ,SYSMMU_GSCL1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SYSMMU_GSCL1[0] ,SYSMMU_GSCL1[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SYSMMU_GSCL0[1] ,SYSMMU_GSCL0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " SYSMMU_GSCL0[0] ,SYSMMU_GSCL0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CPU_NCNTVIRQ[0] ,CPU_nCNTVIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " CPU_NCNTPSIRQ[0] ,CPU_nCNTPSIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CPU_NCNTPSNIRQ[0] ,CPU_nCNTPSNIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " CPU_NCNTHPIRQ[0] ,CPU_nCNTHPIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CPU_NCTIIRQ[0] ,CPU_nCTIIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " CPU_NPMUIRQ[0] ,CPU_nPMUIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CPU_PARITYFAILSCU[0] ,CPU_PARITYFAILSCU[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " CPU_PARITYFAIL0 ,CPU_PARITYFAIL0 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TZASC_XR1BXW ,TZASC_XR1BXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " TZASC_XR1BXR ,TZASC_XR1BXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TZASC_XLBXW ,TZASC_XLBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " TZASC_XLBXR ,TZASC_XLBXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TZASC_DRBXW ,TZASC_DRBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " TZASC_DRBXR ,TZASC_DRBXR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TZASC_CBXW ,TZASC_CBXW interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " TZASC_CBXR ,TZASC_CBXR interrupt" "Not pending,Pending"
|
|
group.long 0x18++0x03 "INTC1"
|
|
line.long 0x00 "ISTR1,Interrupt Status Register 1"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " SYSMMU_TV_M0[1]_set/clr ,SYSMMU_TV_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " SYSMMU_TV_M0[0]_set/clr ,SYSMMU_TV_M0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " SYSMMU_MDMA1[1]_set/clr ,SYSMMU_MDMA1[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " SYSMMU_MDMA1[0]_set/clr ,SYSMMU_MDMA1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_MDMA0[1]_set/clr ,SYSMMU_MDMA0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_MDMA0[0]_set/clr ,SYSMMU_MDMA0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_SSS[1]_set/clr ,SYSMMU_SSS[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_SSS[0]_set/clr ,SYSMMU_SSS[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_RTIC[1]_set/clr ,SYSMMU_RTIC[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_RTIC[0]_set/clr ,SYSMMU_RTIC[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " SYSMMU_MFCR[1]_set/clr ,SYSMMU_MFCR[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " SYSMMU_MFCR[0]_set/clr ,SYSMMU_MFCR[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " SYSMMU_ARM[1]_set/clr ,SYSMMU_ARM[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " SYSMMU_ARM[0]_set/clr ,SYSMMU_ARM[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " SYSMMU_3DNR[1]_set/clr ,SYSMMU_3DNR[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " SYSMMU_3DNR[0]_set/clr ,SYSMMU_3DNR[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_MCUISP[1]_set/clr ,SYSMMU_MCUISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_MCUISP[0]_set/clr ,SYSMMU_MCUISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SYSMMU_SCALERCISP[0]_set/clr ,SYSMMU_SCALERCISP[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SYSMMU_FDISP[1]_set/clr ,SYSMMU_FDISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SYSMMU_FDISP[0]_set/clr ,SYSMMU_FDISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MCUIOP_CTIIRQ_set/clr ,MCUIOP_CTIIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " MCUIOP_PMUIRQ_set/clr ,MCUIOP_PMUIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " MCUISP_CTIIRQ_set/clr ,MCUISP_CTIIRQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " MCUISP_PMUIRQ_set/clr ,MCUISP_PMUIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " SYSMMU_JPEGX[1]_set/clr ,SYSMMU_JPEGX[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_JPEGX[0]_set/clr ,SYSMMU_JPEGX[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_ROTATOR[1]_set/clr ,SYSMMU_ROTATOR[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " SYSMMU_ROTATOR[0]_set/clr ,SYSMMU_ROTATOR[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IMSR1,Interrupt Masked Status Register 1"
|
|
bitfld.long 0x00 29. " SYSMMU_TV_M0[1] ,SYSMMU_TV_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " SYSMMU_TV_M0[0] ,SYSMMU_TV_M0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " SYSMMU_MDMA1[1] ,SYSMMU_MDMA1[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SYSMMU_MDMA1[0] ,SYSMMU_MDMA1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " SYSMMU_MDMA0[1] ,SYSMMU_MDMA0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SYSMMU_MDMA0[0] ,SYSMMU_MDMA0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYSMMU_SSS[1] ,SYSMMU_SSS[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_SSS[0] ,SYSMMU_SSS[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SYSMMU_RTIC[1] ,SYSMMU_RTIC[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYSMMU_RTIC[0] ,SYSMMU_RTIC[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " SYSMMU_MFCR[1] ,SYSMMU_MFCR[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SYSMMU_MFCR[0] ,SYSMMU_MFCR[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SYSMMU_ARM[1] ,SYSMMU_ARM[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " SYSMMU_ARM[0] ,SYSMMU_ARM[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " SYSMMU_3DNR[1] ,SYSMMU_3DNR[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SYSMMU_3DNR[0] ,SYSMMU_3DNR[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SYSMMU_MCUISP[1] ,SYSMMU_MCUISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_MCUISP[0] ,SYSMMU_MCUISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SYSMMU_SCALERCISP[0] ,SYSMMU_SCALERCISP[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SYSMMU_FDISP[1] ,SYSMMU_FDISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SYSMMU_FDISP[0] ,SYSMMU_FDISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MCUIOP_CTIIRQ ,MCUIOP_CTIIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " MCUIOP_PMUIRQ ,MCUIOP_PMUIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " MCUISP_CTIIRQ ,MCUISP_CTIIRQ interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MCUISP_PMUIRQ ,MCUISP_PMUIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " SYSMMU_JPEGX[1] ,SYSMMU_JPEGX[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_JPEGX[0] ,SYSMMU_JPEGX[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SYSMMU_ROTATOR[1] ,SYSMMU_ROTATOR[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " SYSMMU_ROTATOR[0] ,SYSMMU_ROTATOR[0] interrupt" "Not pending,Pending"
|
|
group.long 0x28++0x03 "INTC2"
|
|
line.long 0x00 "ISTR2,Interrupt Status Register 2"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SYSMMU_DRCISP[1]_set/clr ,SYSMMU_DRCISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SYSMMU_DRCISP[0]_set/clr ,SYSMMU_DRCISP[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_ODC[1]_set/clr ,SYSMMU_ODC[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_ODC[0]_set/clr ,SYSMMU_ODC[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_ISP[1]_set/clr ,SYSMMU_ISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_ISP[0]_set/clr ,SYSMMU_ISP[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_DIS0[1]_set/clr ,SYSMMU_DIS0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_DIS0[0]_set/clr ,SYSMMU_DIS0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " DP1_set/clr ,DP1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_DIS1[1]_set/clr ,SYSMMU_DIS1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_DIS1[1]_set/clr ,SYSMMU_DIS1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " SYSMMU_MFCL[1]_set/clr ,SYSMMU_MFCL[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_MFCL[0]_set/clr ,SYSMMU_MFCL[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x02C++0x03
|
|
line.long 0x00 "IMSR2,Interrupt Masked Status Register"
|
|
bitfld.long 0x00 31. " SYSMMU_DRCISP[1] ,SYSMMU_DRCISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SYSMMU_DRCISP[0] ,SYSMMU_DRCISP[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " SYSMMU_ODC[1] ,SYSMMU_ODC[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SYSMMU_ODC[0] ,SYSMMU_ODC[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " SYSMMU_ISP[1] ,SYSMMU_ISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_ISP[0] ,SYSMMU_ISP[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SYSMMU_DIS0[1] ,SYSMMU_DIS0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " SYSMMU_DIS0[0] ,SYSMMU_DIS0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " DP1 ,DP1 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SYSMMU_DIS1[1] ,SYSMMU_DIS1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_DIS1[1] ,SYSMMU_DIS1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SYSMMU_MFCL[1] ,SYSMMU_MFCL[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SYSMMU_MFCL[0] ,SYSMMU_MFCL[0] interrupt" "Not pending,Pending"
|
|
group.long 0x38++0x03 "INTC3"
|
|
line.long 0x00 "ISTR3,Interrupt Status Register 3"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " MDMA0_ABORT_set/clr ,MDMA0_ABORT interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " MDMA1_ABORT_set/clr ,MDMA1_ABORT interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IMSR3,Interrupt Masked Status Register 3"
|
|
bitfld.long 0x00 27. " MDMA0_ABORT ,MDMA0_ABORT interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " MDMA1_ABORT ,MDMA1_ABORT interrupt" "Not pending,Pending"
|
|
group.long 0x48++0x03 "INTC4"
|
|
line.long 0x00 "ISTR4,Interrupt Status Register 4"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CPU_NRAMERRIRQ_set/clr ,CPU_nRAMERRIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CPU_NAXIERRIRQ_set/clr ,CPU_nAXIERRIRQ interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " INT_COMB_ISP_GIC_set/clr ,INT_COMB_ISP_GIC interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " INT_COMB_IOP_GIC_set/clr ,INT_COMB_IOP_GIC interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CCI_NERRORIRQ_set/clr ,CCI_nERRORIRQ interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " INT_COMB_ARMISP_GIC_set/clr ,INT_COMB_ARMISP_GIC interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " INT_COMB_ARMIOP_GIC_set/clr ,INT_COMB_ARMIOP_GIC interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " DISP1[3]_set/clr ,DISP1[3] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " DISP1[2]_set/clr ,DISP1[2] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " DISP1[1]_set/clr ,DISP1[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " DISP1[0]_set/clr ,DISP1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " SSCM_PULSE_IRQ_C2CIF[1]_set/clr ,SSCM_PULSE_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SSCM_PULSE_IRQ_C2CIF[0]_set/clr ,SSCM_PULSE_IRQ_C2CIF[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SSCM_IRQ_C2CIF[1]_set/clr ,SSCM_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SSCM_IRQ_C2CIF[1]_set/clr ,SSCM_IRQ_C2CIF[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEREV_M1_CDREX_set/clr ,PEREV_M1_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PEREV_M0_CDREX_set/clr ,PEREV_M0_CDREX interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEREV_A1_CDREX_set/clr ,PEREV_A1_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PEREV_A0_CDREX_set/clr ,PEREV_A0_CDREX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "IMSR4,Interrupt Masked Status Register 4"
|
|
bitfld.long 0x00 31. " CPU_NRAMERRIRQ ,CPU_nRAMERRIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " CPU_NAXIERRIRQ ,CPU_nAXIERRIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " INT_COMB_ISP_GIC ,INT_COMB_ISP_GIC interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_COMB_IOP_GIC ,INT_COMB_IOP_GIC interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " CCI_NERRORIRQ ,CCI_nERRORIRQ interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " INT_COMB_ARMISP_GIC ,INT_COMB_ARMISP_GIC interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " INT_COMB_ARMIOP_GIC ,INT_COMB_ARMIOP_GIC interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " DISP1[3] ,DISP1[3] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " DISP1[2] ,DISP1[2] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DISP1[1] ,DISP1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " DISP1[0] ,DISP1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " SSCM_PULSE_IRQ_C2CIF[1] ,SSCM_PULSE_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SSCM_PULSE_IRQ_C2CIF[0] ,SSCM_PULSE_IRQ_C2CIF[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SSCM_IRQ_C2CIF[1] ,SSCM_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SSCM_IRQ_C2CIF[1] ,SSCM_IRQ_C2CIF[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " PEREV_M1_CDREX ,PEREV_M1_CDREX interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " PEREV_M0_CDREX ,PEREV_M0_CDREX interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEREV_A1_CDREX ,PEREV_A1_CDREX interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " PEREV_A0_CDREX ,PEREV_A0_CDREX interrupt" "Not pending,Pending"
|
|
group.long 0x58++0x03 "INTC5"
|
|
line.long 0x00 "ISTR5,Interrupt Status Register 5"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " MCT_G1_set/clr ,MCT_G1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " MCT_G0_set/clr ,MCT_G0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[0]_set/clr ,EINT[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CPU_NCNTVIRQ[1]_set/clr ,CPU_nCNTVIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CPU_NCTIIRQ[1]_set/clr ,CPU_nCTIIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CPU_NCNTPSIRQ[1]_set/clr ,CPU_nCNTPSIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CPU_NPMUIRQ[1]_set/clr ,CPU_nPMUIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CPU_NCNTPNSIRQ[1]_set/clr ,CPU_nCNTPNSIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CPU_PARITYFAILSCU[1]_set/clr ,CPU_PARITYFAILSCU[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CPU_NCNTHPIRQ[1]_set/clr ,CPU_nCNTHPIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CPU_PARITYFAIL[1]_set/clr ,CPU_PARITYFAIL[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CPU_NIRQ[1]_set/clr ,CPU_nIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CPU_NIRQ[0]_set/clr ,CPU_nIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "IMSR5,Interrupt Masked Status Register 5"
|
|
bitfld.long 0x00 28. " MCT_G1 ,MCT_G1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " MCT_G0 ,MCT_G0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[0] ,EINT[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CPU_NCNTVIRQ[1] ,CPU_nCNTVIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " CPU_NCTIIRQ[1] ,CPU_nCTIIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " CPU_NCNTPSIRQ[1] ,CPU_nCNTPSIRQ[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CPU_NPMUIRQ[1] ,CPU_nPMUIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " CPU_NCNTPNSIRQ[1] ,CPU_nCNTPNSIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " CPU_PARITYFAILSCU[1] ,CPU_PARITYFAILSCU[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPU_NCNTHPIRQ[1] ,CPU_nCNTHPIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " CPU_PARITYFAIL[1] ,CPU_PARITYFAIL[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " CPU_NIRQ[1] ,CPU_nIRQ[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU_NIRQ[0] ,CPU_nIRQ[0] interrupt" "Not pending,Pending"
|
|
group.long 0x68++0x03 "INTC6"
|
|
line.long 0x00 "ISTR6,Interrupt Status Register 6"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " EINT[7]_set/clr ,EINT[7] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[6]_set/clr ,EINT[6] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " EINT[5]_set/clr ,EINT[5] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " EINT[4]_set/clr ,EINT[4] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " MCT_G3_set/clr ,MCT_G3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " MCT_G2_set/clr ,MCT_G2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " EINT[3]_set/clr ,EINT[3] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " EINT[2]/clr ,EINT[2] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " SYSMMU_G2D[1]_set/clr ,SYSMMU_G2D[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_G2D[0]_set/clr ,SYSMMU_G2D[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_FIMC_LITE1[1]_set/clr ,SYSMMU_FIMC_LITE1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_FIMC_LITE1[0]_set/clr ,SYSMMU_FIMC_LITE1[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EINT[1]_set/clr ,EINT[1] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "IMSR6,Interrupt Masked Status Register 6"
|
|
bitfld.long 0x00 25. " EINT[7] ,EINT[7] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[6] ,EINT[6] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " EINT[5] ,EINT[5] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT[4] ,EINT[4] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " MCT_G3 ,MCT_G3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " MCT_G2 ,MCT_G2 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EINT[3] ,EINT[3] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " EINT[2]/clr ,EINT[2] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " SYSMMU_G2D[1] ,SYSMMU_G2D[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SYSMMU_G2D[0] ,SYSMMU_G2D[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_FIMC_LITE1[1] ,SYSMMU_FIMC_LITE1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " SYSMMU_FIMC_LITE1[0] ,SYSMMU_FIMC_LITE1[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EINT[1] ,EINT[1] interrupt" "Not pending,Pending"
|
|
group.long 0x78++0x03 "INTC7"
|
|
line.long 0x00 "ISTR7,Interrupt Status Register 7"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " EINT[15]_set/clr ,EINT[15] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " EINT[14]_set/clr ,EINT[14] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " EINT[13]_set/clr ,EINT[13] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " EINT[12]_set/clr ,EINT[12] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " EINT[11]_set/clr ,EINT[11] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " EINT[10]/clr ,EINT[10] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " EINT[9]_set/clr ,EINT[9] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EINT[8]_set/clr ,EINT[8] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "IMSR7,Interrupt Masked Status Register 7"
|
|
bitfld.long 0x00 25. " EINT[15] ,EINT[15] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " EINT[14] ,EINT[14] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " EINT[13] ,EINT[13] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT[12] ,EINT[12] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " EINT[11] ,EINT[11] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " EINT[10]/clr ,EINT[10] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT[9] ,EINT[9] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " EINT[8] ,EINT[8] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
width 8.
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "CIPSR0,Current interrupt pending status register 0"
|
|
bitfld.long 0x00 31. " INT31 ,INT31 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " INT30 ,INT30 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " INT29 ,INT29 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " INT28 ,INT28 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " INT27 ,INT27 combined interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INT26 ,INT26 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " INT25 ,INT25 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " INT24 ,INT24 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " INT23 ,INT23 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " INT22 ,INT22 combined interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT21 ,INT21 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " INT20 ,INT20 combined interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " INT19 ,INT19 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " INT18 ,INT18 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " INT17 ,INT17 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT16 ,INT16 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " INT15 ,INT15 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " INT14 ,INT14 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " INT13 ,INT13 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " INT12 ,INT12 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT11 ,INT11 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " INT10 ,INT10 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " INT9 ,INT9 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " INT8 ,INT8 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " INT7 ,INT7 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INT6 ,INT6 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " INT5 ,INT5 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " INT4 ,INT4 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " INT3 ,INT3 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " INT2 ,INT2 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT1 ,INT1 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT0 ,INT0 combined interrupt pending status" "Not pending,Pending"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "DMA Controller"
|
|
tree "MDMA0"
|
|
base ad:0x10800000
|
|
width 13.
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
else
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DS,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "ES,Event status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTSTATUS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Clear"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "FSM,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS[7] ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS[6] ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS[5] ,Fault status of the channel 5" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FAULT_STATUS[4] ,Fault status of the channel 4" "Not present,Present"
|
|
bitfld.long 0x04 3. " FAULT_STATUS[3] ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS[2] ,Fault status of the channel 2" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT_STATUS[1] ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS[0] ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTM,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA0"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "FTC0,Fault type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "CS0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x00 "SA_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CC_0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "FTC1,Fault type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x108++0x07
|
|
line.long 0x00 "CS1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
rgroup.long 0x420++0x13
|
|
line.long 0x00 "SA_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CC_1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA2"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FTC2,Fault type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "CS2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
rgroup.long 0x440++0x13
|
|
line.long 0x00 "SA_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CC_2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA3"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "FTC3,Fault type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x118++0x07
|
|
line.long 0x00 "CS3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
rgroup.long 0x460++0x13
|
|
line.long 0x00 "SA_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CC_3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA4"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FTC4,Fault type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "CS4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
rgroup.long 0x480++0x13
|
|
line.long 0x00 "SA_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CC_4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA5"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "FTC5,Fault type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x128++0x07
|
|
line.long 0x00 "CS5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
rgroup.long 0x4A0++0x13
|
|
line.long 0x00 "SA_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CC_5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA6"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FTC6,Fault type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x130++0x07
|
|
line.long 0x00 "CS6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
rgroup.long 0x4C0++0x13
|
|
line.long 0x00 "SA_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CC_6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA7"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FTC7,Fault type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x138++0x07
|
|
line.long 0x00 "CS7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
rgroup.long 0x4E0++0x13
|
|
line.long 0x00 "SA_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CC_7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0x10800000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
rgroup.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRDn,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,DMAC response on detected look-up condition" "Abort DMAC channels,Sets IRQ_ABORT high"
|
|
endif
|
|
rgroup.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision number" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree "MDMA1"
|
|
base ad:0x12680000
|
|
width 13.
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
else
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DS,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "ES,Event status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTSTATUS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Clear"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "FSM,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS[7] ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS[6] ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS[5] ,Fault status of the channel 5" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FAULT_STATUS[4] ,Fault status of the channel 4" "Not present,Present"
|
|
bitfld.long 0x04 3. " FAULT_STATUS[3] ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS[2] ,Fault status of the channel 2" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT_STATUS[1] ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS[0] ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTM,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA0"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "FTC0,Fault type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "CS0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x00 "SA_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CC_0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "FTC1,Fault type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x108++0x07
|
|
line.long 0x00 "CS1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
rgroup.long 0x420++0x13
|
|
line.long 0x00 "SA_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CC_1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA2"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FTC2,Fault type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "CS2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
rgroup.long 0x440++0x13
|
|
line.long 0x00 "SA_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CC_2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA3"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "FTC3,Fault type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x118++0x07
|
|
line.long 0x00 "CS3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
rgroup.long 0x460++0x13
|
|
line.long 0x00 "SA_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CC_3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA4"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FTC4,Fault type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "CS4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
rgroup.long 0x480++0x13
|
|
line.long 0x00 "SA_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CC_4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA5"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "FTC5,Fault type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x128++0x07
|
|
line.long 0x00 "CS5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
rgroup.long 0x4A0++0x13
|
|
line.long 0x00 "SA_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CC_5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA6"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FTC6,Fault type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x130++0x07
|
|
line.long 0x00 "CS6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
rgroup.long 0x4C0++0x13
|
|
line.long 0x00 "SA_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CC_6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA7"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FTC7,Fault type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x138++0x07
|
|
line.long 0x00 "CS7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
rgroup.long 0x4E0++0x13
|
|
line.long 0x00 "SA_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CC_7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0x12680000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
rgroup.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRDn,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,DMAC response on detected look-up condition" "Abort DMAC channels,Sets IRQ_ABORT high"
|
|
endif
|
|
rgroup.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision number" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree "PDMA0"
|
|
base ad:0x121A0000
|
|
width 15.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "INT_EVENT_RIS,Event status register"
|
|
line.long 0x04 "INTMIS,Interrupt status register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "FSRD,Fault status DMA manager register"
|
|
line.long 0x04 "FSRC,Fault status DMA channel register"
|
|
line.long 0x08 "FTRD,Fault type DMA manager register"
|
|
tree "DMA0"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FTR0,Fault type for DMA channel 0"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "CSR0,Channel status for DMA channel 0"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "SAR_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CCR_0,Channel control for DMA channel 0"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
tree.end
|
|
tree "DMA1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FTR1,Fault type for DMA channel 1"
|
|
group.long 0x108++0x07
|
|
line.long 0x00 "CSR1,Channel status for DMA channel 1"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
group.long 0x420++0x13
|
|
line.long 0x00 "SAR_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CCR_1,Channel control for DMA channel 1"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
tree.end
|
|
tree "DMA2"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FTR2,Fault type for DMA channel 2"
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "CSR2,Channel status for DMA channel 2"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
group.long 0x440++0x13
|
|
line.long 0x00 "SAR_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CCR_2,Channel control for DMA channel 2"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
tree.end
|
|
tree "DMA3"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "FTR3,Fault type for DMA channel 3"
|
|
group.long 0x118++0x07
|
|
line.long 0x00 "CSR3,Channel status for DMA channel 3"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
group.long 0x460++0x13
|
|
line.long 0x00 "SAR_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CCR_3,Channel control for DMA channel 3"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
tree.end
|
|
tree "DMA4"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FTR4,Fault type for DMA channel 4"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "CSR4,Channel status for DMA channel 4"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
group.long 0x480++0x13
|
|
line.long 0x00 "SAR_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CCR_4,Channel control for DMA channel 4"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
tree.end
|
|
tree "DMA5"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTR5,Fault type for DMA channel 5"
|
|
group.long 0x128++0x07
|
|
line.long 0x00 "CSR5,Channel status for DMA channel 5"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
group.long 0x4A0++0x13
|
|
line.long 0x00 "SAR_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CCR_5,Channel control for DMA channel 5"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
tree.end
|
|
tree "DMA6"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTR6,Fault type for DMA channel 6"
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CSR6,Channel status for DMA channel 6"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x00 "SAR_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CCR_6,Channel control for DMA channel 6"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
tree.end
|
|
tree "DMA7"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTR7,Fault type for DMA channel 7"
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "CSR7,Channel status for DMA channel 7"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
group.long 0x4E0++0x13
|
|
line.long 0x00 "SAR_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CCR_7,Channel control for DMA channel 7"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
group.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
line.long 0x10 "CRD,DMA configuration register"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
group.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
width 12.
|
|
tree.end
|
|
tree "PDMA1"
|
|
base ad:0x121B0000
|
|
width 15.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "INT_EVENT_RIS,Event status register"
|
|
line.long 0x04 "INTMIS,Interrupt status register"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "FSRD,Fault status DMA manager register"
|
|
line.long 0x04 "FSRC,Fault status DMA channel register"
|
|
line.long 0x08 "FTRD,Fault type DMA manager register"
|
|
tree "DMA0"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FTR0,Fault type for DMA channel 0"
|
|
group.long 0x100++0x07
|
|
line.long 0x00 "CSR0,Channel status for DMA channel 0"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "SAR_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CCR_0,Channel control for DMA channel 0"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
tree.end
|
|
tree "DMA1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FTR1,Fault type for DMA channel 1"
|
|
group.long 0x108++0x07
|
|
line.long 0x00 "CSR1,Channel status for DMA channel 1"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
group.long 0x420++0x13
|
|
line.long 0x00 "SAR_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CCR_1,Channel control for DMA channel 1"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
tree.end
|
|
tree "DMA2"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "FTR2,Fault type for DMA channel 2"
|
|
group.long 0x110++0x07
|
|
line.long 0x00 "CSR2,Channel status for DMA channel 2"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
group.long 0x440++0x13
|
|
line.long 0x00 "SAR_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CCR_2,Channel control for DMA channel 2"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
tree.end
|
|
tree "DMA3"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "FTR3,Fault type for DMA channel 3"
|
|
group.long 0x118++0x07
|
|
line.long 0x00 "CSR3,Channel status for DMA channel 3"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
group.long 0x460++0x13
|
|
line.long 0x00 "SAR_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CCR_3,Channel control for DMA channel 3"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
tree.end
|
|
tree "DMA4"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "FTR4,Fault type for DMA channel 4"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "CSR4,Channel status for DMA channel 4"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
group.long 0x480++0x13
|
|
line.long 0x00 "SAR_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CCR_4,Channel control for DMA channel 4"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
tree.end
|
|
tree "DMA5"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "FTR5,Fault type for DMA channel 5"
|
|
group.long 0x128++0x07
|
|
line.long 0x00 "CSR5,Channel status for DMA channel 5"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
group.long 0x4A0++0x13
|
|
line.long 0x00 "SAR_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CCR_5,Channel control for DMA channel 5"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
tree.end
|
|
tree "DMA6"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FTR6,Fault type for DMA channel 6"
|
|
group.long 0x130++0x07
|
|
line.long 0x00 "CSR6,Channel status for DMA channel 6"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
group.long 0x4C0++0x13
|
|
line.long 0x00 "SAR_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CCR_6,Channel control for DMA channel 6"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
tree.end
|
|
tree "DMA7"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "FTR7,Fault type for DMA channel 7"
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "CSR7,Channel status for DMA channel 7"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
group.long 0x4E0++0x13
|
|
line.long 0x00 "SAR_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DAR_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CCR_7,Channel control for DMA channel 7"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
group.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
line.long 0x10 "CRD,DMA configuration register"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
group.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "SROMC (SROM Controller)"
|
|
base ad:0x12250000
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SROM_BW,SROM Bus Width & Wait Control Register"
|
|
bitfld.long 0x00 15. " BYTEENABLE3 ,nWBE/ nBE (for UB/LB) control for Memory Bank3" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WAITENABLE3 ,Wait enable control for Memory Bank3" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADDRMODE3 ,Select SROM ADDR Base for Memory Bank3" "Half-word,Byte"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAWIDTH3 ,Data bus width control for Memory Bank3" "8-bit,16-bit"
|
|
bitfld.long 0x00 11. " BYTEENABLE2 ,nWBE/ nBE (for UB/LB) control for Memory Bank2" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " WAITENABLE2 ,Wait enable control for Memory Bank2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADDRMODE2 ,Select SROM ADDR Base for Memory Bank2" "Half-word,Byte"
|
|
bitfld.long 0x00 8. " DATAWIDTH2 ,Data bus width control for Memory Bank2" "8-bit,16-bit"
|
|
bitfld.long 0x00 7. " BYTEENABLE1 ,nWBE/ nBE (for UB/LB) control for Memory Bank1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WAITENABLE1 ,Wait enable control for Memory Bank1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADDRMODE1 ,Select SROM ADDR Base for Memory Bank1" "Half-word,Byte"
|
|
bitfld.long 0x00 4. " DATAWIDTH1 ,Data bus width control for Memory Bank1" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYTEENABLE0 ,nWBE/ nBE (for UB/LB) control for Memory Bank0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WAITENABLE0 ,Wait enable control for Memory Bank0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADDRMODE0 ,Select SROM ADDR Base for Memory Bank0" "Half-word,Byte"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATAWIDTH0 ,Data bus width control for Memory Bank0" "8-bit,16-bit"
|
|
group.long 0x04++0xF
|
|
line.long 0x0 "SROM_BC0,SROM Bank Control Register 0"
|
|
bitfld.long 0x0 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 24.--27. " TCOS ,Chip selection set-up before 0OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0x4 "SROM_BC1,SROM Bank Control Register 1"
|
|
bitfld.long 0x4 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 24.--27. " TCOS ,Chip selection set-up before 1OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0x8 "SROM_BC2,SROM Bank Control Register 2"
|
|
bitfld.long 0x8 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 24.--27. " TCOS ,Chip selection set-up before 2OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0xC "SROM_BC3,SROM Bank Control Register 3"
|
|
bitfld.long 0xC 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 24.--27. " TCOS ,Chip selection set-up before 3OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
width 0xB
|
|
tree.end
|
|
tree.open "PWM Timer"
|
|
tree "PWM"
|
|
base ad:0x12DD0000
|
|
width 12.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "TCFG0,Timer Configuration Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2, 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,Timer Configuration Register 1"
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCON,Timer Control Register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group.long 0xC++0x7 "Timer 0"
|
|
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
|
|
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
|
|
rgroup.long (0xC+0x8)++0x3
|
|
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
|
|
group.long 0x18++0x7 "Timer 1"
|
|
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
|
|
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
|
|
rgroup.long (0x18+0x8)++0x3
|
|
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
|
|
group.long 0x24++0x7 "Timer 2"
|
|
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
|
|
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
|
|
rgroup.long (0x24+0x8)++0x3
|
|
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
|
|
group.long 0x30++0x7 "Timer 3"
|
|
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
|
|
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
|
|
rgroup.long (0x30+0x8)++0x3
|
|
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
|
|
group.long 0x3c++0x3 "Timer 4"
|
|
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
|
|
textline " "
|
|
textline " "
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "TINT_CSTAT,Interrupt Control and Status Register"
|
|
eventfld.long 0x00 9. " TIM4IS ,Timer 4 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIM3IS ,Timer 3 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " TIM2IS ,Timer 2 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TIM1IS ,Timer 1 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " TIM0IS ,Timer 0 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIM4IE ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIM3IE ,Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TIM2IE ,Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIM1IE ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIM0IE ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM_ISP"
|
|
base ad:0x13160000
|
|
width 12.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "TCFG0,Timer Configuration Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2, 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,Timer Configuration Register 1"
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCON,Timer Control Register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group.long 0xC++0x7 "Timer 0"
|
|
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
|
|
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
|
|
rgroup.long (0xC+0x8)++0x3
|
|
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
|
|
group.long 0x18++0x7 "Timer 1"
|
|
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
|
|
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
|
|
rgroup.long (0x18+0x8)++0x3
|
|
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
|
|
group.long 0x24++0x7 "Timer 2"
|
|
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
|
|
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
|
|
rgroup.long (0x24+0x8)++0x3
|
|
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
|
|
group.long 0x30++0x7 "Timer 3"
|
|
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
|
|
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
|
|
rgroup.long (0x30+0x8)++0x3
|
|
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
|
|
group.long 0x3c++0x3 "Timer 4"
|
|
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
|
|
textline " "
|
|
textline " "
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "TINT_CSTAT,Interrupt Control and Status Register"
|
|
eventfld.long 0x00 9. " TIM4IS ,Timer 4 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIM3IS ,Timer 3 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " TIM2IS ,Timer 2 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TIM1IS ,Timer 1 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " TIM0IS ,Timer 0 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIM4IE ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIM3IE ,Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TIM2IE ,Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIM1IE ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIM0IE ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0x101D0000
|
|
width 10.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "WTCON,Watchdog Timer Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PV ,Prescaler Value"
|
|
bitfld.long 0x00 5. " WDT ,Watchdog timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3.--4. " CLKSEL ,Clock division factor" "16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INTGEN ,Interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RSTEN ,Reset enable" "Disabled,Enabled"
|
|
line.long 0x04 "WTDAT,Watchdog Timer Data Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CNTRL ,Count reload value"
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "WTCNT,Watchdog Timer Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNTVAL ,Count value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "WTCNT,Watchdog Timer Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNTVAL ,Count value"
|
|
endif
|
|
wgroup.long 0x0C++0x3
|
|
line.long 0x00 "WTCLRINT,Interrupt clear"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver and Transmitter)"
|
|
tree "UART0"
|
|
base ad:0x13800000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON0, UART Line Control Register 0"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13800000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON0,UART Control Register 0"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON0,UART Control Register 0"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON0,UART FIFO Control Register 0"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,32 bytes,64 bytes,96 bytes,128 bytes,160 bytes,192 bytes,224 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "32 bytes,64 bytes,96 bytes,128 bytes,160 bytes,192 bytes,224 bytes,256 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON0,UART Modem Control Register 0"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "255 bytes,224 bytes,192 bytes,160 bytes,128 bytes,96 bytes,64 bytes,32 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT0,UART Tx/Rx Status Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT0,UART Error Status Register 0"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT0,Uart FIFO Status Register 0"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT0,Uart Modem Status Register 0"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH0,UART Transmit Buffer (Holding & FIFO) Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH0 ,Transmit data for UART0"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH0,UART Transmit Buffer (Holding & FIFO) Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH0 ,Transmit data for UART0"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH0,Receive data for UART0"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV0,UART Channel Baud Rate Division Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV0 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL0,UART Channel Divisor Fractional Value Register 0"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL0 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP0,UART Interrupt Pending Register 0"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP0,UART Interrupt Source Pending Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM0,UART Interrupt Mask Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP0,UART Interrupt Source Pending Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM0,UART Interrupt Mask Register 0"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x13810000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON1, UART Line Control Register 1"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13810000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON1,UART Control Register 1"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON1,UART Control Register 1"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART FIFO Control Register 1"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART FIFO Control Register 1"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON1,UART Modem Control Register 1"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON1,UART Modem Control Register 1"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT1,UART Tx/Rx Status Register 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT1,UART Error Status Register 1"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT1,Uart FIFO Status Register 1"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT1,Uart Modem Status Register 1"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH1,UART Transmit Buffer (Holding & FIFO) Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH1 ,Transmit data for UART1"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH1,UART Transmit Buffer (Holding & FIFO) Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH1 ,Transmit data for UART1"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH1,Receive data for UART1"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV1,UART Channel Baud Rate Division Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV1 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL1,UART Channel Divisor Fractional Value Register 1"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL1 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP1,UART Interrupt Pending Register 1"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP1,UART Interrupt Source Pending Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM1,UART Interrupt Mask Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP1,UART Interrupt Source Pending Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM1,UART Interrupt Mask Register 1"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x13820000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON2, UART Line Control Register 2"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13820000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON2,UART Control Register 2"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON2,UART Control Register 2"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON2,UART FIFO Control Register 2"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes,16 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON2,UART Modem Control Register 2"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "15 bytes,14 bytes,12 bytes,10 bytes,8 bytes,6 bytes,4 bytes,2 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT2,UART Tx/Rx Status Register 2"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT2,UART Error Status Register 2"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT2,Uart FIFO Status Register 2"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT2,Uart Modem Status Register 2"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH2,UART Transmit Buffer (Holding & FIFO) Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH2 ,Transmit data for UART2"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH2,UART Transmit Buffer (Holding & FIFO) Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH2 ,Transmit data for UART2"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH2,Receive data for UART2"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV2,UART Channel Baud Rate Division Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV2 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL2,UART Channel Divisor Fractional Value Register 2"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL2 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP2,UART Interrupt Pending Register 2"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP2,UART Interrupt Source Pending Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM2,UART Interrupt Mask Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP2,UART Interrupt Source Pending Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM2,UART Interrupt Mask Register 2"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART3"
|
|
base ad:0x13830000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON3, UART Line Control Register 3"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13830000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON3,UART Control Register 3"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON3,UART Control Register 3"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON3,UART FIFO Control Register 3"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes,16 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT3,UART Tx/Rx Status Register 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT3,UART Error Status Register 3"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT3,Uart FIFO Status Register 3"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH3,UART Transmit Buffer (Holding & FIFO) Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH3 ,Transmit data for UART3"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH3,UART Transmit Buffer (Holding & FIFO) Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH3 ,Transmit data for UART3"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH3,Receive data for UART3"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV3,UART Channel Baud Rate Division Register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV3 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL3,UART Channel Divisor Fractional Value Register 3"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL3 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP3,UART Interrupt Pending Register 3"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP3,UART Interrupt Source Pending Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM3,UART Interrupt Mask Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP3,UART Interrupt Source Pending Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM3,UART Interrupt Mask Register 3"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "ISP-UART"
|
|
base ad:0x13190000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON4, UART Line Control Register 4"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13190000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON4,UART Control Register 4"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON4,UART Control Register 4"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON4,UART FIFO Control Register 4"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON4,UART FIFO Control Register 4"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON4,UART Modem Control Register 4"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON4,UART Modem Control Register 4"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT4,UART Tx/Rx Status Register 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT4,UART Error Status Register 4"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT4,Uart FIFO Status Register 4"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT4,Uart Modem Status Register 4"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH4,UART Transmit Buffer (Holding & FIFO) Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH4 ,Transmit data for UART4"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH4,UART Transmit Buffer (Holding & FIFO) Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH4 ,Transmit data for UART4"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH4,Receive data for UART4"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV4,UART Channel Baud Rate Division Register 4"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV4 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL4,UART Channel Divisor Fractional Value Register 4"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL4 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP4,UART Interrupt Pending Register 4"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP4,UART Interrupt Source Pending Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM4,UART Interrupt Mask Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP4,UART Interrupt Source Pending Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM4,UART Interrupt Mask Register 4"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
; tree.open "Inter-Integrated Circuit Bus Interface"
|
|
; base ad:0x12C60000
|
|
; %include exynos5250/iic.ph 0x12C60000 0 ; I2C 0-7
|
|
; base ad:0x12CE0000
|
|
; %include exynos5250/iic.ph 0x12CE0000 1 ; I2C_HDMI
|
|
; base ad:0x13130000
|
|
; %include exynos5250/iic.ph 0x13130000 2 ; I2C_SPI
|
|
; base ad:0x121D0000
|
|
; %include exynos5250/iic.ph 0x121D0000 3 ; I2C_SATAPHY
|
|
; tree.end
|
|
tree.open "Inter-Integrated Circuit Bus Interface"
|
|
tree "I2C0"
|
|
base ad:0x12C60000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT0,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x12C70000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON1,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT1,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD1,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS1,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC1,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C2"
|
|
base ad:0x12C80000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON2,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT2,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD2,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS2,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC2,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C3"
|
|
base ad:0x12C90000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON3,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT3,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD3,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS3,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC3,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C4"
|
|
base ad:0x12CA0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON4,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT4,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD4,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS4,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC4,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C5"
|
|
base ad:0x12CB0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON5,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT5,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD5,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS5,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC5,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C6"
|
|
base ad:0x12CC0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON6,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT6,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD6,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS6,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC6,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C7"
|
|
base ad:0x12CD0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON7,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT7,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD7,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS7,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC7,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C_HDMI"
|
|
base ad:0x12CE0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0x12CE0000,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT0x12CE0000,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0x12CE0000,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0x12CE0000,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0x12CE0000,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C0_ISP"
|
|
base ad:0x13130000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0x13130000,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT0x13130000,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0x13130000,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0x13130000,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0x13130000,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C1_ISP"
|
|
base ad:0x13140000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0x13130000,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT0x13130000,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0x13130000,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0x13130000,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0x13130000,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C_SATAPHY"
|
|
base ad:0x121D0000
|
|
width 17.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0x121D0000,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
line.long 0x04 "I2CSTAT0x121D0000,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0x121D0000,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0x121D0000,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0x121D0000,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Serial Peripheral Interface"
|
|
tree "SPI 0"
|
|
base ad:0x12D20000
|
|
width 18.
|
|
if (((d.l(ad:0x12D20000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG0,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG0,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG0,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x12D20000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG0,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG0,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN0,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x12D20000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS0,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS0,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA0,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA0,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN0,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG0,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG0,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL0,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 1"
|
|
base ad:0x12D30000
|
|
width 18.
|
|
if (((d.l(ad:0x12D30000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG1,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG1,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG1,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x12D30000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG1,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG1,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN1,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x12D30000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS1,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS1,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA1,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA1,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN1,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG1,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG1,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL1,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 2"
|
|
base ad:0x12D40000
|
|
width 18.
|
|
if (((d.l(ad:0x12D40000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG2,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG2,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG2,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x12D40000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG2,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG2,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN2,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x12D40000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS2,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS2,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA2,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA2,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN2,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG2,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG2,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL2,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ISP-SPI 0"
|
|
base ad:0x131A0000
|
|
width 18.
|
|
if (((d.l(ad:0x131A0000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG3,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG3,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG3,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x131A0000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG3,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG3,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN3,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x131A0000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS3,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS3,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA3,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA3,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN3,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG3,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG3,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL3,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ISP-SPI 1"
|
|
base ad:0x131B0000
|
|
width 18.
|
|
if (((d.l(ad:0x131B0000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG4,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG4,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG4,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x131B0000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG4,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG4,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN4,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x131B0000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS4,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS4,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA4,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA4,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN4,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG4,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG4,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL4,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "Display Controller"
|
|
base ad:0x14400000
|
|
width 10.
|
|
group.long 0x00++0x07 "Video Control"
|
|
line.long 0x00 "VIDCON0,Video output format"
|
|
bitfld.long 0x00 30. " I80_EN ,Enables I80 interface" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CLKVALUP , CLKVAL_F update timing control" "Always,Start of frame"
|
|
hexmask.long.byte 0x00 6.--13. 1. " CLKVAL_F ,Rates of VCLK and CLKVAL"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VCLKFREE ,Controls VCLK Free Run mode" "Normal,Free-run"
|
|
bitfld.long 0x00 1. " ENVID ,Video output and logic control signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENVID_F ,Video output and logic control signal at current frame end" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "VIDCON2,Output date format control"
|
|
bitfld.long 0x00 12.--13. " TVFORMATSEL ,Output format of YUV data" "Reserved,Reserved,YUV444,YUV444"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ORGYCBCR ,Order of YUV data" "Y-CbCr,CbCr-Y"
|
|
bitfld.long 0x00 7. " YUVORD ,Order of Chroma data" "Cb-Cr,Cr-Cb"
|
|
bitfld.long 0x00 0.--4. " WB_FRAME_SKIP ,WB frame skip rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16,1:17,1:18,1:19,1:20,1:21,1:22,1:23,1:24,1:25,1:26,1:27,1:28,1:29,1:30,?..."
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "VIDCON3,Image enhancement control"
|
|
bitfld.long 0x00 18. " CG_ON ,Control color gain" "Disabled,Enabled"
|
|
width 9.
|
|
tree "Video Window Control"
|
|
if (((d.l(ad:0x14400000+0x20))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x20))&0x4000)==0x0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x20))&0x40)==0x40)&&(((d.l(ad:0x14400000+0x20))&0x4000)==0x0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x20))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x20))&0x4000)==0x4000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x14400000+0x24))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x24))&0x4000)==0x0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x24))&0x40)==0x40)&&(((d.l(ad:0x14400000+0x24))&0x4000)==0x0000)
|
|
group.long 0x24++0x03
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x24))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x24))&0x4000)==0x4000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x24++0x03
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x14400000+0x28))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x28))&0x4000)==0x0000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x28))&0x40)==0x40)&&(((d.l(ad:0x14400000+0x28))&0x4000)==0x0000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x28))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x28))&0x4000)==0x4000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x14400000+0x2C))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x2C))&0x4000)==0x0000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x2C))&0x40)==0x40)&&(((d.l(ad:0x14400000+0x2C))&0x4000)==0x0000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x2C))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x2C))&0x4000)==0x4000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x14400000+0x30))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x30))&0x4000)==0x0000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x30))&0x40)==0x40)&&(((d.l(ad:0x14400000+0x30))&0x4000)==0x0000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x14400000+0x30))&0x40)==0x00)&&(((d.l(ad:0x14400000+0x30))&0x4000)==0x4000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
tree.end
|
|
width 11.
|
|
tree "Window Shadow & Position Control"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SHADOWCON,Window shadow control register"
|
|
bitfld.long 0x00 14. " W4_SHADOW_PROTECT ,Protects to update window 4's shadow register" "Not protected,Protected"
|
|
bitfld.long 0x00 13. " W3_SHADOW_PROTECT ,Protects to update window 3's shadow register" "Not protected,Protected"
|
|
bitfld.long 0x00 12. " W2_SHADOW_PROTECT ,Protects to update window 2's shadow register" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " W1_SHADOW_PROTECT ,Protects to update window 1's shadow register" "Not protected,Protected"
|
|
bitfld.long 0x00 10. " W0_SHADOW_PROTECT ,Protects to update window 0's shadow register" "Not protected,Protected"
|
|
bitfld.long 0x00 7. " C2_ENLOCAL_F ,Enables Channel 2 Local Path" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " C1_ENLOCAL_F ,Enables Channel 1 Local Path" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " C0_ENLOCAL_F ,Enables Channel 0 Local Path" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " C4_EN_F ,Enables Channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C3_EN_F ,Enables Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " C2_EN_F ,Enables Channel 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " C1_EN_F ,Enables Channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C0_EN_F ,Enables Channel 0" "Disabled,Enabled"
|
|
width 11.
|
|
group.long 0x40++0x0B
|
|
line.long 0x00 "VIDOSD0A,Window 0 position control A register"
|
|
bitfld.long 0x00 23. " OSD_LEFTTOPX_F_E ,Extended horizontal screen coordinate for left top pixel" "0,1"
|
|
bitfld.long 0x00 22. " OSD_LEFTTOPY_F_E ,Extended vertical screen coordinate for left top pixel" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD0B,Window 0 position control B register"
|
|
bitfld.long 0x04 23. " OSD_RIGHTBOTX_F_E ,Extended horizontal screen coordinate for right bottom pixel" "0,1"
|
|
bitfld.long 0x04 22. " OSD_RIGHTBOTY_F_E ,Extended vertical screen coordinate for right bottom pixel" "0,1"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD0C,Window 0 position control C register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " OSDSIZE ,Window size"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "VIDOSD1A,Window 1 position control A register"
|
|
bitfld.long 0x00 23. " OSD_LEFTTOPX_F_E ,Extended horizontal screen coordinate for left top pixel" "0,1"
|
|
bitfld.long 0x00 22. " OSD_LEFTTOPY_F_E ,Extended vertical screen coordinate for left top pixel" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD1B,Window 1 position control B register"
|
|
bitfld.long 0x04 23. " OSD_RIGHTBOTX_F_E ,Extended horizontal screen coordinate for right bottom pixel" "0,1"
|
|
bitfld.long 0x04 22. " OSD_RIGHTBOTY_F_E ,Extended vertical screen coordinate for right bottom pixel" "0,1"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD1C,Window 1 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "VIDOSD1D,Window 1 position control D register"
|
|
hexmask.long 0x0C 0.--25. 1. " OSDSIZE ,Window size"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "VIDOSD2A,Window 2 position control A register"
|
|
bitfld.long 0x00 23. " OSD_LEFTTOPX_F_E ,Extended horizontal screen coordinate for left top pixel" "0,1"
|
|
bitfld.long 0x00 22. " OSD_LEFTTOPY_F_E ,Extended vertical screen coordinate for left top pixel" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD2B,Window 2 position control B register"
|
|
bitfld.long 0x04 23. " OSD_RIGHTBOTX_F_E ,Extended horizontal screen coordinate for right bottom pixel" "0,1"
|
|
bitfld.long 0x04 22. " OSD_RIGHTBOTY_F_E ,Extended vertical screen coordinate for right bottom pixel" "0,1"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD2C,Window 2 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "VIDOSD2D,Window 2 position control D register"
|
|
hexmask.long 0x0C 0.--25. 1. " OSDSIZE ,Window size"
|
|
group.long 0x70++0x0B
|
|
line.long 0x00 "VIDOSD3A,Window 3 position control A register"
|
|
bitfld.long 0x00 23. " OSD_LEFTTOPX_F_E ,Extended horizontal screen coordinate for left top pixel" "0,1"
|
|
bitfld.long 0x00 22. " OSD_LEFTTOPY_F_E ,Extended vertical screen coordinate for left top pixel" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD3B,Window 3 position control B register"
|
|
bitfld.long 0x04 23. " OSD_RIGHTBOTX_F_E ,Extended horizontal screen coordinate for right bottom pixel" "0,1"
|
|
bitfld.long 0x04 22. " OSD_RIGHTBOTY_F_E ,Extended vertical screen coordinate for right bottom pixel" "0,1"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD3C,Window 3 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x80++0x0B
|
|
line.long 0x00 "VIDOSD4A,Window 4 position control A register"
|
|
bitfld.long 0x00 23. " OSD_LEFTTOPX_F_E ,Extended horizontal screen coordinate for left top pixel" "0,1"
|
|
bitfld.long 0x00 22. " OSD_LEFTTOPY_F_E ,Extended vertical screen coordinate for left top pixel" "0,1"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD4B,Window 4 position control B register"
|
|
bitfld.long 0x04 23. " OSD_RIGHTBOTX_F_E ,Extended horizontal screen coordinate for right bottom pixel" "0,1"
|
|
bitfld.long 0x04 22. " OSD_RIGHTBOTY_F_E ,Extended vertical screen coordinate for right bottom pixel" "0,1"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD4C,Window 4 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 14.
|
|
tree "Frame Buffer"
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "VIDW00ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW00ADD0B1,Frame buffer address register"
|
|
group.long 0x20A0++0x03
|
|
line.long 0x00 "VIDW00ADD0B2,Frame buffer address register"
|
|
group.long 0xA8++0x07
|
|
line.long 0x00 "VIDW01ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW01ADD0B1,Frame buffer address register"
|
|
group.long 0x20A8++0x03
|
|
line.long 0x00 "VIDW01ADD0B2,Frame buffer address register"
|
|
group.long 0xB0++0x07
|
|
line.long 0x00 "VIDW02ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW02ADD0B1,Frame buffer address register"
|
|
group.long 0x20B0++0x03
|
|
line.long 0x00 "VIDW02ADD0B2,Frame buffer address register"
|
|
group.long 0xB8++0x07
|
|
line.long 0x00 "VIDW03ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW03ADD0B1,Frame buffer address register"
|
|
group.long 0x20B8++0x03
|
|
line.long 0x00 "VIDW03ADD0B2,Frame buffer address register"
|
|
group.long 0xC0++0x07
|
|
line.long 0x00 "VIDW04ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW04ADD0B1,Frame buffer address register"
|
|
group.long 0x20C0++0x03
|
|
line.long 0x00 "VIDW04ADD0B2,Frame buffer address register"
|
|
group.long 0xD0++0x07
|
|
line.long 0x00 "VIDW00ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW00ADD1B1,Frame buffer address register"
|
|
group.long 0x20D0++0x03
|
|
line.long 0x00 "VIDW00ADD1B2,Frame buffer address register"
|
|
group.long 0xD8++0x07
|
|
line.long 0x00 "VIDW01ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW01ADD1B1,Frame buffer address register"
|
|
group.long 0x20D8++0x03
|
|
line.long 0x00 "VIDW01ADD1B2,Frame buffer address register"
|
|
group.long 0xE0++0x07
|
|
line.long 0x00 "VIDW02ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW02ADD1B1,Frame buffer address register"
|
|
group.long 0x20E0++0x03
|
|
line.long 0x00 "VIDW02ADD1B2,Frame buffer address register"
|
|
group.long 0xE8++0x07
|
|
line.long 0x00 "VIDW03ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW03ADD1B1,Frame buffer address register"
|
|
group.long 0x20E8++0x03
|
|
line.long 0x00 "VIDW03ADD1B2,Frame buffer address register"
|
|
group.long 0xF0++0x07
|
|
line.long 0x00 "VIDW04ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW04ADD1B1,Frame buffer address register"
|
|
group.long 0x20F0++0x03
|
|
line.long 0x00 "VIDW04ADD1B2,Frame buffer address register"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VIDW00ADD2,Frame buffer address 2"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VIDW01ADD2,Frame buffer address 2"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VIDW02ADD2,Frame buffer address 2"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VIDW03ADD2,Frame buffer address 2"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VIDW04ADD2,Frame buffer address 2"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
tree.end
|
|
width 14.
|
|
tree "Video Interrupt & Color Control"
|
|
if (((d.l(ad:0x14400000+0x130))&0x1)==0x1)&&(((d.l(ad:0x14400000+0x130))&0x20000)==0x20000)&&(((d.l(ad:0x14400000+0x130))&0x2)==0x2)
|
|
group.long 0x0130++0x03
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
bitfld.long 0x00 20.--25. " FIFOINTERVAL ,Interval of the FIFO interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 19. " SYSMAINCON ,Interrupt enable bit to main LCD" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SYSSUBCON ,Interrupt enable bit to sub LCD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " FIFOSEL_WIN4 ,Window 4 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FIFOSEL_WIN3 ,Window 3 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FIFOSEL_WIN2 ,Window 2 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FIFOSEL_WIN1 ,Window 1 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " FIFOSEL_WIN0 ,Window 0 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
elif (((d.l(ad:0x14400000+0x130))&0x1)==0x1)&&(((d.l(ad:0x14400000+0x130))&0x20000)==0x20000)&&(((d.l(ad:0x14400000+0x130))&0x2)==0x0)
|
|
group.long 0x0130++0x03
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 19. " SYSMAINCON ,Interrupt enable bit to main LCD" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SYSSUBCON ,Interrupt enable bit to Sub LCD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
elif (((d.l(ad:0x14400000+0x130))&0x1)==0x1)&&(((d.l(ad:0x14400000+0x130))&0x20000)==0x00000)&&(((d.l(ad:0x14400000+0x130))&0x2)==0x2)
|
|
group.long 0x0130++0x03
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " FIFOSEL_WIN4 ,Window 4 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FIFOSEL_WIN3 ,Window 3 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FIFOSEL_WIN2 ,Window 2 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FIFOSEL_WIN1 ,Window 1 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIFOSEL_WIN0 ,Window 0 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
elif (((d.l(ad:0x14400000+0x130))&0x1)==0x1)&&(((d.l(ad:0x14400000+0x130))&0x20000)==0x00000)&&(((d.l(ad:0x14400000+0x130))&0x2)==0x0)
|
|
group.long 0x0130++0x03
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
elif (((d.l(ad:0x14400000+0x130))&0x1)==0x0)
|
|
group.long 0x0130++0x03
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x0134++0x03
|
|
line.long 0x00 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x00 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x00 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x00 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
textline " "
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "W1KEYCON0,Win1 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W1KEYCON1,Win1 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x148++0x07
|
|
line.long 0x00 "W2KEYCON0,Win2 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W2KEYCON1,Win2 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "W3KEYCON0,Win3 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W3KEYCON1,Win3 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x158++0x07
|
|
line.long 0x00 "W4KEYCON0,Win4 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W4KEYCON1,Win4 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "W1KEYALPHA,Win1 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "W2KEYALPHA,Win2 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "W3KEYALPHA,Win3 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "W4KEYALPHA,Win4 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "WIN0MAP,Win0 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "WIN1MAP,Win1 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "WIN2MAP,Win2 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "WIN3MAP,Win3 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "WIN4MAP,Win4 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x019C++0x07
|
|
line.long 0x00 "WPALCON_H,Window palette control register"
|
|
bitfld.long 0x00 17.--18. " W4PAL_H ,Size of palette data format of window 4" "00,01,10,11"
|
|
bitfld.long 0x00 13.--14. " W3PAL_H ,Size of palette data format of window 3" "00,01,10,11"
|
|
bitfld.long 0x00 9.--10. " W2PAL_H ,Size of palette data format of window 2" "00,01,10,11"
|
|
line.long 0x04 "WPALCON_L,Window palette control register"
|
|
bitfld.long 0x04 9. " PALUPDATEEN ,Palette update" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " W4PAL_L ,Size of palette data format of window 4" "0,1"
|
|
bitfld.long 0x04 7. " W3PAL_L ,Size of palette data format of window 3" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " W2PAL_L ,Size of palette data format of window 2" "0,1"
|
|
bitfld.long 0x04 3.--5. " W1PAL_L ,Size of palette data format of window 1" "000,001,010,011,100,101,110,111"
|
|
bitfld.long 0x04 0.--2. " W0PAL_L ,Size of palette data format of window 0" "000,001,010,011,100,101,110,111"
|
|
textline " "
|
|
width 15.
|
|
group.long 0x01C0++0x03
|
|
line.long 0x00 "LAYERSYNC_CON,LayerSync for 3D display control register"
|
|
bitfld.long 0x00 6. " SYNC_UPDATE ,Enabled layersync channel update control" "No update,Update"
|
|
bitfld.long 0x00 5. " ALL_SYNC_ON ,All channel layersync enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " W4_SYNC_ON ,Channel 4 layersync enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " W3_SYNC_ON ,Channel 3 layersync enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " W2_SYNC_ON ,Channel 2 layersync enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " W1_SYNC_ON ,Channel 1 layersync enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " W0_SYNC_ON ,Channel 0 layersync enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 13.
|
|
tree "Window Alpha & Blending Control"
|
|
group.long 0x021C++0x27
|
|
line.long 0x00 "VIDW0ALPHA0,Window 0 Alpha0 control register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ALPHA0_R_F ,Red Alpha value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ALPHA0_G_F ,Green Alpha value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ALPHA0_B_F ,Blue Alpha value"
|
|
line.long 0x04 "VIDW0ALPHA1,Window 0 Alpha1 control register"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ALPHA1_R_F ,Red Alpha value"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ALPHA1_G_F ,Green Alpha value"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ALPHA1_B_F ,Blue Alpha value"
|
|
line.long 0x08 "VIDW1ALPHA0,Window 1 Alpha0 control register"
|
|
hexmask.long.byte 0x08 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x08 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x08 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x0C "VIDW1ALPHA1,Window 1 Alpha1 control register"
|
|
hexmask.long.byte 0x0C 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x0C 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x10 "VIDW2ALPHA0,Window 2 Alpha0 control register"
|
|
hexmask.long.byte 0x10 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x10 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x10 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x14 "VIDW2ALPHA1,Window 2 Alpha1 control register"
|
|
hexmask.long.byte 0x14 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x14 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x14 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x18 "VIDW3ALPHA0,Window 3 Alpha0 control register"
|
|
hexmask.long.byte 0x18 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x18 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x18 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x1C "VIDW3ALPHA1,Window 3 Alpha1 control register"
|
|
hexmask.long.byte 0x1C 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x1C 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x1C 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x20 "VIDW4ALPHA0,Window 4 Alpha0 control register"
|
|
hexmask.long.byte 0x20 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x20 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x20 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x24 "VIDW4ALPHA1,Window 4 Alpha1 control register"
|
|
hexmask.long.byte 0x24 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x24 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x24 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "BLENDEQ1,Window 1 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "BLENDEQ2,Window 2 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "BLENDEQ3,Window 3 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "BLENDEQ4,Window 4 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x0260++0x03
|
|
line.long 0x00 "BLENDCON,Blending equation control register"
|
|
bitfld.long 0x00 0. " BLEND_NEW ,Alpha value width" "4-bit,8-bit"
|
|
tree.end
|
|
width 16.
|
|
tree "Window 3D & Buffer Control"
|
|
group.long 0x0254++0x03
|
|
line.long 0x00 "W013DSTERECON,Window 0 and 1 3d stereoscopic control register"
|
|
hexmask.long.word 0x00 7.--18. 1. " WIDTH ,Width of frame image"
|
|
bitfld.long 0x00 6. " MERGE_EN ,Signal enable for left and right frame" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " A_L_FIRST ,Left first signal for alpha data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " R_L_FIRST ,Left first signal for red data" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " G_L_FIRST ,Left first signal for green data" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " B_L_FIRST ,Left first signal for blue data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTERPOL_EN ,Interpolation signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LINE_SWAP ,Line swapping signal enable" "Disabled,Enabled"
|
|
group.long 0x0258++0x03
|
|
line.long 0x00 "W233DSTERECON,Window 2 and 3 3d stereoscopic control register"
|
|
hexmask.long.word 0x00 7.--18. 1. " WIDTH ,Width of frame image"
|
|
bitfld.long 0x00 6. " MERGE_EN ,Signal enable for left and right frame" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " A_L_FIRST ,Left first signal for alpha data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " R_L_FIRST ,Left first signal for red data" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " G_L_FIRST ,Left first signal for green data" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " B_L_FIRST ,Left first signal for blue data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTERPOL_EN ,Interpolation signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LINE_SWAP ,Line swapping signal enable" "Disabled,Enabled"
|
|
width 16.
|
|
textline " "
|
|
rgroup.long 0x40A0++0x03
|
|
line.long 0x00 "SHD_VIDW00ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40A8++0x03
|
|
line.long 0x00 "SHD_VIDW01ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40B0++0x03
|
|
line.long 0x00 "SHD_VIDW02ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40B8++0x03
|
|
line.long 0x00 "SHD_VIDW03ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40C0++0x03
|
|
line.long 0x00 "SHD_VIDW04ADD0,Frame buffer address 0 shadow register"
|
|
textline " "
|
|
rgroup.long 0x40D0++0x03
|
|
line.long 0x00 "SHD_VIDW00ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40D8++0x03
|
|
line.long 0x00 "SHD_VIDW01ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40E0++0x03
|
|
line.long 0x00 "SHD_VIDW02ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40E8++0x03
|
|
line.long 0x00 "SHD_VIDW03ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40F0++0x03
|
|
line.long 0x00 "SHD_VIDW04ADD1,Frame buffer address 1 shadow register"
|
|
textline " "
|
|
rgroup.long 0x4100++0x03
|
|
line.long 0x00 "SHD_VIDW00ADD2,Frame buffer address 0 shadow register"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width size" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4104++0x03
|
|
line.long 0x00 "SHD_VIDW01ADD2,Frame buffer address 1 shadow register"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width size" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4108++0x03
|
|
line.long 0x00 "SHD_VIDW02ADD2,Frame buffer address 2 shadow register"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width size" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x410C++0x03
|
|
line.long 0x00 "SHD_VIDW03ADD2,Frame buffer address 3 shadow register"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width size" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4110++0x03
|
|
line.long 0x00 "SHD_VIDW04ADD2,Frame buffer address 4 shadow register"
|
|
bitfld.long 0x00 27. " OFFSIZE_F_E ,Extended virtual screen offset size" "0,1"
|
|
bitfld.long 0x00 26. " PAGEWIDTH_F_E ,Extended virtual screen page width size" "0,1"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
tree.end
|
|
tree "Palette Memory"
|
|
group.long 0x2400++0x03
|
|
line.long 0x00 "Win0_PAL_RAM_ADD,Window 0 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x14400000+0x2400)--(ad:0x14400000+0x27FF) /long"
|
|
group.long 0x2800++0x03
|
|
line.long 0x00 "Win1_PAL_RAM_ADD,Window 1 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x14400000+0x2800)--(ad:0x14400000+0x2BFF) /long"
|
|
group.long 0x2C00++0x03
|
|
line.long 0x00 "Win2_PAL_RAM_ADD,Window 2 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x14400000+0x2C00)--(ad:0x14400000+0x2FFF) /long"
|
|
group.long 0x3000++0x03
|
|
line.long 0x00 "Win3_PAL_RAM_ADD,Window 3 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x14400000+0x3000)--(ad:0x14400000+0x33FF) /long"
|
|
tree.end
|
|
width 12.
|
|
base ad:0x14410000
|
|
group.long 0x01C0++0x03 "Enhancer Register"
|
|
line.long 0x00 "COLORGAIN,Color gain register"
|
|
hexmask.long.word 0x00 20.--29. 1. " CG_RGAIN ,Color gain value of red data"
|
|
hexmask.long.word 0x00 10.--19. 1. " CG_GGAIN ,Color gain value of green data"
|
|
hexmask.long.word 0x00 0.--9. 1. " CG_BGAIN ,Color gain value of blue data"
|
|
base ad:0x14420000
|
|
width 12.
|
|
tree "LCDIF"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "VIDOUT_CON,Display mode change control"
|
|
bitfld.long 0x00 16. " VIDOUT_UP ,VIDOUT_F update timing control select" "Always,Start of frame"
|
|
bitfld.long 0x00 8.--10. " VIDOUT_F ,Output format of Video Controller" "RGB,Reserved,I80 for LDI0,I80 for LDI1,WB and RGB,Reserved,WB and i80 for LDI0,WB and i80 for LDI1"
|
|
line.long 0x04 "VIDCON1,RGB I/F control signal"
|
|
hexmask.long.word 0x04 16.--26. 1. " LINECNT ,Status of the line counter"
|
|
rbitfld.long 0x04 15. " FSTATUS ,Field status" "ODD,EVEN"
|
|
rbitfld.long 0x04 13.--14. " VSTATUS ,Vertical status" "VSYNC,BACK Porch,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x04 9.--10. " FIXVCLK ,VCLK hold scheme at data under-flow" "Hold,Running,Reserved,Running and VDEN disable"
|
|
bitfld.long 0x04 7. " IVCLK ,Polarity of the VCLK active edge" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 6. " IHSYNC ,HSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IVSYNC ,VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x04 4. " IVDEN ,VDEN pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
width 13.
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "VIDTCON0,Video time control 0 register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBPDE ,Vertical back porch for even field"
|
|
hexmask.long.byte 0x00 16.--23. 1. " VBPD ,Vertical back porch"
|
|
hexmask.long.byte 0x00 8.--15. 1. " VFPD ,Vertical front porch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VSPW ,Vertical sync pulse width"
|
|
line.long 0x04 "VIDTCON1,Video time control 1 register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VFPDE ,Vertical front porch for even field"
|
|
hexmask.long.byte 0x04 16.--23. 1. " HBPD ,Horizontal back porch"
|
|
hexmask.long.byte 0x04 8.--15. 1. " HFPD ,Horizontal front porch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " HSPW ,Horizontal sync pulse width"
|
|
line.long 0x08 "VIDTCON2,Video time control 2 register"
|
|
bitfld.long 0x08 23. " LINEVAL_E ,Extended vertical size of display" "0,1"
|
|
bitfld.long 0x08 22. " HOZEVAL_E ,Extended horizontal size of display" "0,1"
|
|
hexmask.long.word 0x08 11.--21. 1. " LINEVAL ,Vertical size of display"
|
|
hexmask.long.word 0x08 0.--10. 1. " HOZVAL ,Horizontal size of display"
|
|
line.long 0x0C "VIDTCON3,Video time control 3 register"
|
|
bitfld.long 0x0C 31. " VSYNCEN ,VSYNC signal output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " FRMEN ,FRM signal output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " INVFRM ,Polarity of FRM pulse" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--27. " FRMVRATE ,FRM issue rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " FRMVFPD ,Number of line between data active and FRM signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " FRNVSPW ,Number of line of FRM signal width"
|
|
group.long 0x01A4++0x03
|
|
line.long 0x00 "TRIGCON,I80/RGB trigger control register"
|
|
bitfld.long 0x00 26. " SWTRGCMD_W4BUF ,Window 4 double buffer software trigger command (when TRGMODE_W4BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " TRGMODE_W4BUF ,Window 4 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SWTRGCMD_W3BUF ,Window 3 double buffer software trigger command (when TRGMODE_W3BUF is 1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TRGMODE_W3BUF ,Window 3 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWTRGCMD_W2BUF ,Window 2 double buffer software trigger command (when TRGMODE_W2BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TRGMODE_W2BUF ,Window 2 double buffer trigger" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWTRGCMD_W1BUF ,Window 1 double buffer software trigger command (when TRGMODE_W1BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TRGMODE_W1BUF ,Window 1 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SWTRGCMD_W0BUF ,Window 0 double buffer software trigger command (when TRGMODE_W0BUF is 1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRGMODE_W0BUF ,Window 0 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " HWTRGMASK_I80 ,HW triggering mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " HWTRGEN_I80 ,Enable I80 start trigger (when TRGMODE is 0)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SWTRGCMD_I80_RGB ,I80 start software trigger command (when TRGMODE is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TRGMODE_I80 ,I80 start trigger" "Disabled,Enabled"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "I80IFCONA0,LCD I80 Interface Control 0"
|
|
bitfld.long 0x00 16.--19. " LCD_CS_SETUP ,CLK cycles of address signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " LCD_WR_SETUP ,CLK cycles of CS signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " LCD_WR_ACT ,CLK cycles of chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " LCD_WR_HOLD ,CLK cycles of chip select disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " RSPOL ,Polarity of RS signal" "Low,High"
|
|
bitfld.long 0x00 0. " I80IFEN ,LCD I80 Interface" "Disabled,Enabled"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "I80IFCONA1,LCD I80 Interface Control 1"
|
|
bitfld.long 0x00 16.--19. " LCD_CS_SETUP ,CLK cycles of address signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " LCD_WR_SETUP ,CLK cycles of CS signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " LCD_WR_ACT ,CLK cycles of chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " LCD_WR_HOLD ,CLK cycles of chip select disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " RSPOL ,Polarity of RS signal" "Low,High"
|
|
bitfld.long 0x00 0. " I80IFEN ,LCD I80 Interface" "Disabled,Enabled"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "I80IFCONB0,LCD I80 Interface Control 0"
|
|
bitfld.long 0x00 9. " NORMAL_CMD_ST ,Normal command start" "Off,On"
|
|
bitfld.long 0x00 5.--6. " FRAME_SKIP ,I80 interface output frame decimation factor" "1,2,3,?..."
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "I80IFCONB1,LCD I80 Interface Control 1"
|
|
bitfld.long 0x00 9. " NORMAL_CMD_ST ,Normal command start" "Off,On"
|
|
bitfld.long 0x00 5.--6. " FRAME_SKIP ,I80 interface output frame decimation factor" "1,2,3,?..."
|
|
width 13.
|
|
group.long 0x01D0++0x07
|
|
line.long 0x00 "LDI_CMDCON0,LCD i80 interface command control 0"
|
|
bitfld.long 0x00 22.--23. " CMD11_EN ,Normal command enable 11" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 20.--21. " CMD10_EN ,Normal command enable 10" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 18.--19. " CMD9_EN ,Normal command enable 9" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 16.--17. " CMD8_EN ,Normal command enable 8" "Disabled,Enabled,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CMD7_EN ,Normal command enable 7" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 12.--13. " CMD6_EN ,Normal command enable 6" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 10.--11. " CMD5_EN ,Normal command enable 5" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 8.--9. " CMD4_EN ,Normal command enable 4" "Disabled,Enabled,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CMD3_EN ,Normal command enable 3" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 4.--5. " CMD2_EN ,Normal command enable 2" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 2.--3. " CMD1_EN ,Normal command enable 1" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 0.--1. " CMD0_EN ,Normal command enable 0" "Disabled,Enabled,?..."
|
|
line.long 0x04 "LDI_CMDCON1,LCD i80 interface command control 1"
|
|
bitfld.long 0x04 11. " CMD11_RS ,Controls Command 11 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " CMD10_RS ,Controls Command 10 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " CMD9_RS ,Controls Command 9 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " CMD8_RS ,Controls Command 8 RS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CMD7_RS ,Controls Command 7 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CMD6_RS ,Controls Command 6 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CMD5_RS ,Controls Command 5 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CMD4_RS ,Controls Command 4 RS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CMD3_RS ,Controls Command 3 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CMD2_RS ,Controls Command 2 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CMD1_RS ,Controls Command 1 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CMD0_RS ,Controls Command 0 RS" "Disabled,Enabled"
|
|
group.long 0x01E0++0x0B
|
|
line.long 0x00 "SIFCCON0,I80 system interface manual command control 0"
|
|
bitfld.long 0x00 6. " SYS_ST_CON ,ST Signal" "Low,High"
|
|
bitfld.long 0x00 5. " SYS_RS_CON ,RS Signal" "Low,High"
|
|
bitfld.long 0x00 4. " SYS_NCS0_CON ,nCS0 Signal" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYS_NCS1_CON ,nCS1 Signal" "High,Low"
|
|
bitfld.long 0x00 2. " SYS_NOE_CON ,nOE Signal" "High,Low"
|
|
bitfld.long 0x00 1. " SYS_NWE_CON ,nWE Signal" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SCOMEN ,Command mode" "Normal,Manual"
|
|
line.long 0x04 "SIFCCON1,I80 system interface manual command control 1"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " SYS_WDATA ,LCD i80 system interface write data"
|
|
rgroup.long 0x01E8++0x03
|
|
line.long 0x00 "SIFCCON2,I80 system interface manual command control 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " SYS_RDATA ,LCD i80 system interface read data"
|
|
rgroup.long 0x0258++0x03
|
|
line.long 0x00 "CRCDATA,CRC read data"
|
|
hexmask.long.word 0x00 0.--15. 1. " CRCDATA ,CRC read data"
|
|
group.long 0x025C++0x03
|
|
line.long 0x00 "CRCCTRL,CRC control register"
|
|
bitfld.long 0x00 19. " CRCIVSYNC ,CRC_VSYNC polarity" "Non-inverted,Inverted"
|
|
bitfld.long 0x00 18. " CRCIHSYNC ,CRC_HSYNC polarity" "Non-inverted,Inverted"
|
|
bitfld.long 0x00 17. " CRCIVDEN ,CRC_VDEN polarity" "Non-inverted,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CECIVCLK ,CEC_VCLK polarity" "Non-inverted,Inverted"
|
|
bitfld.long 0x00 4.--8. " CRCMXSEL ,CRC data mux selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
bitfld.long 0x00 2. " CECCLKEN ,CECCLK enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CRCSTART_F ,CRC start control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CRCEN ,CRC check enable" "Disabled,Enabled"
|
|
rgroup.long 0x280++0x03
|
|
line.long 0x00 "I80IFCON0,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD0 ,Specifies the LDI command"
|
|
rgroup.long 0x284++0x03
|
|
line.long 0x00 "I80IFCON1,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD1 ,Specifies the LDI command"
|
|
rgroup.long 0x288++0x03
|
|
line.long 0x00 "I80IFCON2,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD2 ,Specifies the LDI command"
|
|
rgroup.long 0x28C++0x03
|
|
line.long 0x00 "I80IFCON3,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD3 ,Specifies the LDI command"
|
|
rgroup.long 0x290++0x03
|
|
line.long 0x00 "I80IFCON4,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD4 ,Specifies the LDI command"
|
|
rgroup.long 0x294++0x03
|
|
line.long 0x00 "I80IFCON5,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD5 ,Specifies the LDI command"
|
|
rgroup.long 0x298++0x03
|
|
line.long 0x00 "I80IFCON6,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD6 ,Specifies the LDI command"
|
|
rgroup.long 0x29C++0x03
|
|
line.long 0x00 "I80IFCON7,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD7 ,Specifies the LDI command"
|
|
rgroup.long 0x2A0++0x03
|
|
line.long 0x00 "I80IFCON8,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD8 ,Specifies the LDI command"
|
|
rgroup.long 0x2A4++0x03
|
|
line.long 0x00 "I80IFCON9,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD9 ,Specifies the LDI command"
|
|
rgroup.long 0x2A8++0x03
|
|
line.long 0x00 "I80IFCON10,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD10 ,Specifies the LDI command"
|
|
rgroup.long 0x2AC++0x03
|
|
line.long 0x00 "I80IFCON11,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD11 ,Specifies the LDI command"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC"
|
|
base ad:0x12D10000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCCON,ADC control register"
|
|
bitfld.long 0x00 16. " RES ,ADC output resolution selection" "10-bit,12-bit"
|
|
rbitfld.long 0x00 15. " ECFLG ,End of conversion flag" "Ongoing,Finished"
|
|
bitfld.long 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value"
|
|
bitfld.long 0x00 2. " STANDBY ,Standby mode select" "Normal mode,Standby mode"
|
|
bitfld.long 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled"
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|
textline " "
|
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bitfld.long 0x00 0. " ENABLE_START ,A/D conversion starts by enable" "No operation,A/D conversion"
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ADCDLY,ADC start or interval delay register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Conversion delay value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ADCDATX,ADC Conversion data register"
|
|
hexmask.long.word 0x00 0.--11. 1. " XPDATA ,ADC conversion data value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ADCDLY,ADC start or interval delay register"
|
|
bitfld.long 0x00 16. " FILCLKSRC ,Clock source for delay" "X-tal,RTC"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Conversion delay value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ADCDAT,ADC Conversion data register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,ADC conversion data value"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CLRINTADC,Clear ADC interrupt"
|
|
bitfld.long 0x00 0. " INTADCCLR ,INT_ADC Interrupt Clear" "Clear,Clear"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADCMUX,Analog input channel selection"
|
|
sif cpu()=="Exynos5250"
|
|
bitfld.long 0x00 0.--3. " SEL_MUX ,Analog input channel" "AIN 0,AIN 1,AIN 2,AIN 3,AIN 4,AIN 5,AIN 6,AIN 7,Reserved..."
|
|
else
|
|
bitfld.long 0x00 0.--3. " SEL_MUX ,Analog input channel" "AIN 0,AIN 1,AIN 2,AIN 3,Reserved..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
textline ""
|