35386 lines
2.4 MiB
35386 lines
2.4 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: Exynos4412 On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: KAP, KRW
|
|
; @Changelog: 2013-11-05
|
|
; @Manufacturer: SAMSUNG - Samsung Semiconductor
|
|
; @Doc: Exynos_4_Quad_User_Manaul_Public_REV100-0.pdf
|
|
; IHI0048B_b_gic_architecture_specification.pdf
|
|
; DDI0416B_gic_pl390_r0p0_trm.pdf
|
|
; @Core: Cortex-A9
|
|
; @Chip: EXYNOS4412
|
|
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: perexynos4412.per 12761 2021-01-18 10:24:52Z pegold $
|
|
|
|
; Known Problems :
|
|
; Display Controller
|
|
; Exynos4412, page 16-61, Skip rate in WB_FRAME_SKIP 1:30 or 1:0
|
|
config 16. 8.
|
|
tree "Core Registers (Cortex-A9MPCore)"
|
|
width 0x8
|
|
; --------------------------------------------------------------------------------
|
|
; Identification registers
|
|
; --------------------------------------------------------------------------------
|
|
tree "ID Registers"
|
|
rgroup.long c15:0x0++0x0
|
|
line.long 0x0 "MIDR,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
|
|
textline " "
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
|
|
bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c15:0x100++0x0
|
|
line.long 0x0 "CTR,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
|
|
bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
|
|
rgroup.long c15:0x200++0x0
|
|
line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register"
|
|
rgroup.long c15:0x300++0x0
|
|
line.long 0x0 "TLBTR,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
|
|
bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
|
|
textline " "
|
|
bitfld.long 0x0 0. " nU ,Unified or Separate TLBs" "Unified,Separate"
|
|
rgroup.long c15:0x500++0x0
|
|
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
|
|
bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
|
|
bitfld.long 0x00 8.--11. " ClusterID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3"
|
|
rgroup.long c15:0x0410++0x00
|
|
line.long 0x00 "MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
|
|
bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
|
|
bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
|
|
rgroup.long c15:0x0510++0x00
|
|
line.long 0x00 "MMFR1,Memory Model Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup.long c15:0x0610++0x00
|
|
line.long 0x00 "MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0710++0x00
|
|
line.long 0x00 "MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported"
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0020++0x00
|
|
line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0120++0x00
|
|
line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0220++0x00
|
|
line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0320++0x00
|
|
line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0420++0x00
|
|
line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
|
|
rgroup.long c15:0x0010++0x00
|
|
line.long 0x00 "PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0110++0x00
|
|
line.long 0x00 "PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
|
|
tree.end
|
|
width 0x8
|
|
tree "System Control and Configuration"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.long c15:0x101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " PARON ,Parity On" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ALIOW ,Enable allocation in one cache way only" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EXCL ,Exclusive cache Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SMP ,Signals if the Cortex-A9 processor is taking part in coherency or not" "0,1"
|
|
bitfld.long 0x00 3. " FOZ ,Full Of Zero mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DP1 ,L1 Dside prefetch Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PH2 ,L2 prefetch hint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FW ,Cache and TLB maintenance broadcast" "Disabled,Enabled"
|
|
group.long c15:0x201++0x0
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes"
|
|
bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
|
|
textline " "
|
|
group.long c15:0x11++0x0
|
|
line.long 0x0 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 6. " nET ,Not early termination" "Not early,Early"
|
|
bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
|
|
group.long c15:0x111++0x0
|
|
line.long 0x0 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted"
|
|
bitfld.long 0x00 16. " PLE ,NS accesses to the Preload Engine resources control" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "No,Yes"
|
|
bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
group.long c15:0x0311++0x00
|
|
line.long 0x00 "VCR,Virtualization Control Register"
|
|
bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1"
|
|
bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1"
|
|
bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1"
|
|
group.long c15:0xf++0x0
|
|
line.long 0x00 "PCR,Power Control Register"
|
|
bitfld.long 0x00 8.--10. " MCL ,Max Clock Latency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " EDCG ,Enable Dynamic Clock Gating" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x000c++0x00
|
|
line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group.long c15:0x10c++0x00
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address"
|
|
rgroup.long c15:0x1C++0x0
|
|
line.long 0x0 "ISR,Interrupt status Register"
|
|
bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending"
|
|
bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending"
|
|
bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending"
|
|
group.long c15:0x11c++0x0
|
|
line.long 0x00 "VIR,Virtualization Interrupt Register"
|
|
bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1"
|
|
bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1"
|
|
bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1"
|
|
tree.end
|
|
width 0x0d
|
|
tree "Memory Management Unit"
|
|
group.long c15:0x1++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
|
|
bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin"
|
|
textline " "
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled"
|
|
textline " "
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
|
|
bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated"
|
|
bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable"
|
|
bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable"
|
|
bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000"
|
|
textline " "
|
|
group.long c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address"
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR"
|
|
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address"
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status"
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "AIFSR,AuxiliaryInstruction Fault Status Register"
|
|
hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status"
|
|
textline " "
|
|
group.long c15:0xa++0x0
|
|
line.long 0x0 "TLBLR,TLB Lockdown Register"
|
|
bitfld.long 0x0 28.--29. " VICTIM ,Victim Value Increments after Each Tabel Walk" "0,1,2,3"
|
|
bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown"
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,PA Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress"
|
|
bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable"
|
|
textline " "
|
|
bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured"
|
|
bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back"
|
|
bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful"
|
|
textline " "
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attribute 7" "Outer,Inner"
|
|
bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attribute 6" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attribute 5" "Outer,Inner"
|
|
bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attribute 4" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attribute 3" "Outer,Inner"
|
|
bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attribute 2" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attribute 1" "Outer,Inner"
|
|
bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attribute 0" "Outer,Inner"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..."
|
|
bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..."
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
group.long c15:0x400f++0x0
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address"
|
|
textline " "
|
|
rgroup.long c15:0x000d++0x00
|
|
line.long 0x00 "FCSEIDR,FCSE PID Register"
|
|
hexmask.long.byte 0x00 25.--31. 0x02 " PID ,Process for Fast Context Switch Identification and Specification"
|
|
group.long c15:0x10d++0x0
|
|
line.long 0x0 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID"
|
|
group.long c15:0x020d++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURW ,User Read/Write Thread ID"
|
|
group.long c15:0x030d++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRURO ,User Read-only Thread ID"
|
|
group.long c15:0x040d++0x00
|
|
line.long 0x00 "TPIDRPRW,Privileged Only Thread ID Register"
|
|
hexmask.long 0x00 0.--31. 1. " TPIDRPRW ,Privileged Only Thread ID"
|
|
tree.end
|
|
width 0xC
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 18.--20. " CType7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15.--17. " CType6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 12.--14. " CType5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CType4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 6.--8. " CType3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CType2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
bitfld.long 0x00 0.--2. " CType1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..."
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported"
|
|
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported"
|
|
textline " "
|
|
hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words"
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
|
|
bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction"
|
|
tree.end
|
|
width 12.
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xC9++0x0
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
|
|
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
|
|
group.long c15:0x1C9++0x0
|
|
line.long 0x0 "PMCNTENSET,Count Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x2C9++0x0
|
|
line.long 0x0 "PMCNTENCLR,Count Enable Clear Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled"
|
|
group.long c15:0x3C9++0x0
|
|
line.long 0x0 "PMOVSR,Overflow Flag Status Register"
|
|
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
|
|
eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4C9++0x0
|
|
line.long 0x0 "PMSWINC,Software Increment Register"
|
|
eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment"
|
|
eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
|
|
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
|
|
textline " "
|
|
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
|
|
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5C9++0x0
|
|
line.long 0x0 "PMSELR,Performance Counter Selection Register"
|
|
bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..."
|
|
group.long c15:0xD9++0x0
|
|
line.long 0x00 "PMCCNTR,Cycle Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count"
|
|
group.long c15:0x01d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Event Type Select Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EVCNT ,Event to count"
|
|
group.long c15:0x02d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Event Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " PMNX ,Event Count"
|
|
group.long c15:0xE9++0x0
|
|
line.long 0x0 "PMUSERENR,User Enable Register"
|
|
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
|
|
group.long c15:0x1E9++0x0
|
|
line.long 0x0 "PMINTENSET,Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2E9++0x0
|
|
line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register"
|
|
eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
tree "Preload Engine"
|
|
rgroup.long c15:0x000b++0x00
|
|
line.long 0x00 "PLEIDR,PLE ID Register"
|
|
bitfld.long 0x00 16.--20. " FIFOS ,PLE FIFO size" "Not present,Reserved,Reserved,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,?..."
|
|
bitfld.long 0x00 0. " PEP ,Preload Engine presence" "Not present,Present"
|
|
rgroup.long c15:0x020b++0x00
|
|
line.long 0x00 "PLEASR,PLE Activity Status Register"
|
|
bitfld.long 0x00 0. " R ,PLE Channel running" "Not running,Running"
|
|
rgroup.long c15:0x040b++0x00
|
|
line.long 0x00 "PLEFSR,PLE FIFO Status Register"
|
|
bitfld.long 0x00 0.--4. " AE ,Number of available entries in the PLE FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x001b++0x00
|
|
line.long 0x00 "PLEUAR,Preload Engine User Accessibility Register"
|
|
bitfld.long 0x00 0. " U ,User accessibility" "Not permited,Permited"
|
|
group.long c15:0x011b++0x00
|
|
line.long 0x00 "PLEPCR,Preload Engine Parameters Control Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " BSM ,Block size mask"
|
|
hexmask.long.byte 0x00 8.--15. 1. " BNM ,Block number mask"
|
|
hexmask.long.byte 0x00 0.--7. 1. " WS ,PLE wait states"
|
|
tree.end
|
|
tree "NEON"
|
|
rgroup.long c15:0x000f++0x00
|
|
line.long 0x00 "NEON,NEON busy Register"
|
|
bitfld.long 0x00 0. " Busy ,NEON busy" "Not busy,Busy"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
tree "Debug Registers"
|
|
tree "Jazelle Register"
|
|
group.long c14:0x7000++0x0
|
|
line.long 0x00 "JIDR,Jazelle ID Register"
|
|
bitfld.long 0x00 28.--31. " ARCH ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. " DESIGN ,Implementor code of the designer of the subarchitecture"
|
|
textline " "
|
|
hexmask.long.byte 0x00 12.--19. 1. " SAMAJ ,The subarchitecture code"
|
|
bitfld.long 0x00 8.--11. " SAMIN ,The subarchitecture minor code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TRTBFR ,Format of the Jazelle Configurable Opcode Translation Table Register" "0,1"
|
|
bitfld.long 0x00 0.--5. " TRTBSZ ,Size of the Jazelle Configurable Opcode Translation Table Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long c14:0x7001++0x0
|
|
line.long 0x00 "JOSCR,Jazelle OS Control Register"
|
|
bitfld.long 0x00 1. " CV ,Configuration Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CD ,Configuration Disabled" "No,Yes"
|
|
group.long c14:0x7002++0x0
|
|
line.long 0x00 "JMCR,Jazelle Main Configuration Register"
|
|
bitfld.long 0x00 31. " nAR ,Not Array Operations" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FP ,Floating-point opcodes handler" "VM implementation,VFP instructions"
|
|
bitfld.long 0x00 29. " AP ,Array Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 28. " OP ,Object Pointer" "Handler,Pointer"
|
|
bitfld.long 0x00 27. " IS ,Index Size" "8 bits,16 bits"
|
|
bitfld.long 0x00 26. " SP ,Static Pointer" "Handler,Pointer"
|
|
textline " "
|
|
bitfld.long 0x00 0. " JE ,Jazelle Enable" "Disabled,Enabled"
|
|
group.long c14:0x7003++0x0
|
|
line.long 0x00 "JPR,Jazelle Parameters Register"
|
|
bitfld.long 0x00 17.--21. " BSH ,Bounds SHift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12.--16. " sADO ,Signed Array Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--11. " ARO ,Array Reference Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " STO ,STatic Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " ODO ,Object Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long c14:0x7004++0x0
|
|
line.long 0x00 "JCOTTRR,Jazelle Configurable Opcode Translation Table Register"
|
|
bitfld.long 0x00 10.--15. " OPCODE ,Bottom bits of the configurable opcode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " OPERATION ,Code for the operation" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
tree.end
|
|
width 11.
|
|
tree "Processor Identifier Registers"
|
|
rgroup c14:0x340--0x340
|
|
line.long 0x00 "CPUID,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture"
|
|
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
|
|
rgroup c14:0x341--0x341
|
|
line.long 0x00 "CACHETYPE,Cache Type Register"
|
|
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
|
|
bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
|
|
rgroup c14:0x343--0x343
|
|
line.long 0x00 "TLBTYPE,TLB Type Register"
|
|
hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries"
|
|
hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128"
|
|
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
|
|
rgroup c14:0x348--0x348
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x349--0x349
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34a--0x34a
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..."
|
|
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..."
|
|
rgroup c14:0x34c--0x34c
|
|
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..."
|
|
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..."
|
|
bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..."
|
|
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..."
|
|
rgroup c14:0x34d--0x34d
|
|
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..."
|
|
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup c14:0x34e--0x34e
|
|
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x34f--0x34f
|
|
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup c14:0x350--0x350
|
|
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x351--0x351
|
|
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
|
|
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x352--0x352
|
|
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
|
|
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x353--0x353
|
|
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
|
|
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..."
|
|
rgroup c14:0x354--0x354
|
|
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
|
|
bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..."
|
|
tree.end
|
|
tree "Coresight Management Registers"
|
|
width 0xC
|
|
textline " "
|
|
group c14:0x3c0--0x3c0
|
|
line.long 0x0 "ITCTRL,Integration Mode Control Register"
|
|
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
|
|
group c14:0x3e8--0x3e8
|
|
line.long 0x0 "CLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
|
|
group c14:0x3e9--0x3e9
|
|
line.long 0x0 "CLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
|
|
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
|
|
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
|
|
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
|
|
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
|
|
wgroup c14:0x3ec--0x3ec
|
|
line.long 0x0 "LAR,Lock Access Register"
|
|
hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key"
|
|
rgroup c14:0x3ed--0x3ed
|
|
line.long 0x0 "LSR,Lock Status Register"
|
|
bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed"
|
|
bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored"
|
|
textline " "
|
|
bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required"
|
|
width 0xc
|
|
rgroup c14:0x3ee--0x3ee
|
|
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
|
|
bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
|
|
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
|
|
width 0xc
|
|
rgroup c14:0x3f2--0x3f2
|
|
line.long 0x0 "DEVID,Device Identifier"
|
|
bitfld.long 0x00 0.--3. " PCSAMPLE ,Level of Program Counter sampling support (DBGPCSR and DBGCIDSR)" "Not implemented,DBGPCSR,Both,?..."
|
|
rgroup c14:0x3f3--0x3f3
|
|
line.long 0x0 "DEVTYPE,Device Type"
|
|
hexmask.long.byte 0x0 4.--7. 1. " STPC ,Sub Type: Processor Core"
|
|
hexmask.long.byte 0x0 0.--3. 1. " MCDL ,Main Class: Debug Logic"
|
|
rgroup c14:0x3f8--0x3f8
|
|
line.long 0x0 "PID0,Peripherial ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]"
|
|
rgroup c14:0x3f9--0x3f9
|
|
line.long 0x0 "PID1,Peripherial ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]"
|
|
rgroup c14:0x3fa--0x3fa
|
|
line.long 0x0 "PID2,Peripherial ID2"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
|
|
bitfld.long 0x00 3. " JEPCD ,JEP 106 ID code" "Not used,Used"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
|
|
rgroup c14:0x3fb--0x3fb
|
|
line.long 0x0 "PID3,Peripherial ID3"
|
|
hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd"
|
|
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
|
|
rgroup c14:0x3f4--0x3f4
|
|
line.long 0x0 "PID4,Peripherial ID4"
|
|
bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
rgroup c14:0x3fc--0x3fc
|
|
line.long 0x0 "COMPONENTID0,Component ID0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fd--0x3fd
|
|
line.long 0x0 "COMPONENTID1,Component ID1"
|
|
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
|
|
hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3fe--0x3fe
|
|
line.long 0x0 "COMPONENTID2,Component ID2"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
rgroup c14:0x3ff--0x3ff
|
|
line.long 0x0 "COMPONENTID3,Component ID3"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
|
|
tree.end
|
|
textline " "
|
|
width 0x7
|
|
rgroup c14:0x000--0x000
|
|
line.long 0x0 "DIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,ARMv7 no ext.,?..."
|
|
textline " "
|
|
bitfld.long 0x0 15. " DEVID_IMP ,Debug Device ID Register DBGDEVID implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 14. " NSUHD_IMP ,Secure User halting debug implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 13. " PCSR_IMP ,Program Counter Sampling Register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. " SE_IMP ,Security Extensions implemented" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x7
|
|
group c14:0x22--0x22
|
|
line.long 0x0 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full"
|
|
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full"
|
|
bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full"
|
|
textline " "
|
|
bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired"
|
|
bitfld.long 0x0 24. " INSTRCOMPL_L ,Latched Instruction Complete" "Executing,Not executing"
|
|
textline " "
|
|
bitfld.long 0x0 20.--21. " EXTDCCMODE ,External DCC access mode" "Non-blocking,Stall,Fast,?..."
|
|
bitfld.long 0x0 19. " ADADISCARD ,Asynchronous Data Aborts Discarded" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
|
|
bitfld.long 0x0 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disabled" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SPIDDIS ,Secure Privileged Invasive Debug Disabled" "No,Yes"
|
|
bitfld.long 0x0 15. " MDBGEN ,Monitor Debug-mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " UDCCDIS ,User mode access to Comms Channel disable" "No,Yes"
|
|
bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced"
|
|
bitfld.long 0x0 8. " UND_l ,Sticky Undefined Instruction" "No exception,Exception"
|
|
textline " "
|
|
bitfld.long 0x0 7. " ADABORT_l ,Sticky Asynchronous Data Abort" "Not aborted,Aborted"
|
|
bitfld.long 0x0 6. " SDABORT_l ,Sticky Synchronous Data Abort" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt request,Breakpoint,Asynchronous Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Synchronous Watchpoint,?..."
|
|
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
|
|
textline " "
|
|
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
|
|
width 0x7
|
|
if (((data.long(c14:0x00))&0x01000)==0x00000)
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
else
|
|
group c14:0x007--0x007
|
|
line.long 0x0 "VCR,Vector Catch Register"
|
|
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
|
|
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
|
|
endif
|
|
;rgroup c14:0x1++0x1
|
|
; line.long 0x0 "DRAR,Debug ROM Address Register"
|
|
; hexmask.long 0x0 12.--31. 0x1000 " DBROMPA ,Debug bus ROM physical address"
|
|
; bitfld.long 0x0 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
; line.long 0x4 "DSAR,Debug Self Address Offset Register"
|
|
; hexmask.long 0x4 12.--31. 0x1000 " DBSAOV ,Debug bus self-address offset value"
|
|
; bitfld.long 0x4 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid"
|
|
;hgroup c14:0x50++0x0
|
|
; hide.long 0x0 "DTR,Data Transfer Register"
|
|
; in
|
|
width 0x7
|
|
hgroup c14:0x020--0x020
|
|
hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register"
|
|
in
|
|
group c14:0x023--0x023
|
|
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data"
|
|
wgroup c14:0x21++0x00
|
|
line.long 0x00 "ITR,Instruction Transfer Register"
|
|
hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute"
|
|
wgroup c14:0x24++0x00
|
|
line.long 0x00 "DRCR,Debug Run Control Register"
|
|
bitfld.long 0x00 4. " CBIUR , Cancel Bus Interface Unit Requests" "Not canceled,Canceled"
|
|
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
|
|
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
|
|
rgroup c14:0xc4++0x00
|
|
line.long 0x00 "PRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " WRR ,Warm reset request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
|
|
hgroup c14:0xc5++0x00
|
|
hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register"
|
|
in
|
|
tree.end
|
|
width 6.
|
|
tree "Breakpoint Registers"
|
|
group c14:0x40++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
|
|
group c14:0x50++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x41++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
|
|
group c14:0x51++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x42++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
|
|
group c14:0x52++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x43++0x00
|
|
line.long 0x00 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
|
|
group c14:0x53++0x00
|
|
line.long 0x00 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x44++0x00
|
|
line.long 0x00 "BVR4,Breakpoint Value Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
|
|
group c14:0x54++0x00
|
|
line.long 0x00 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
group c14:0x45++0x00
|
|
line.long 0x00 "BVR5,Breakpoint Value Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
|
|
group c14:0x55++0x00
|
|
line.long 0x00 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..."
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
|
|
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 6.
|
|
tree "Watchpoint Control Registers"
|
|
group c14:0x60++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
|
|
group c14:0x70--0x70
|
|
line.long 0x0 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x61++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
|
|
group c14:0x71--0x71
|
|
line.long 0x0 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x62++0x00
|
|
line.long 0x00 "WVR2,Watchpoint Value Register 2"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2"
|
|
group c14:0x72--0x72
|
|
line.long 0x0 "WCR2,Watchpoint Control Register 2"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x63++0x00
|
|
line.long 0x00 "WVR3,Watchpoint Value Register 3"
|
|
hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3"
|
|
group c14:0x73--0x73
|
|
line.long 0x0 "WCR3,Watchpoint Control Register 3"
|
|
bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
|
|
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
|
|
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
|
|
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x006--0x006
|
|
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
|
|
hexmask.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
|
|
tree.end
|
|
width 0xb
|
|
width 9.
|
|
base ad:(d.l(c15:0x400f))
|
|
tree "Snoop Control Unit (SCU)"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCUCR,SCU Control Register"
|
|
bitfld.long 0x00 6. " ICSE ,IC standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCUSE ,SCU standby enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FADTP0E ,Force all Device to port0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCUSLE ,SCU Speculative linefills enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SCURPE ,SCU RAMs Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " AFE ,Address filtering enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SCUE ,SCU enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SCUCON,SCU Configuration Register"
|
|
bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,64KB,?..."
|
|
bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP"
|
|
bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SCUSTAT,SCU CPU Power Status Register"
|
|
bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off"
|
|
wgroup.long 0x0c++0x03
|
|
line.long 0x00 "INV,SCU Invalidate All Register"
|
|
bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FSAR,Filtering Start Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "FEAR,Filtering End Address Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SAC,SCU Access Control Register"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SSAC,SCU Secure Access Control Register"
|
|
bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure"
|
|
bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access"
|
|
bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access"
|
|
tree.end
|
|
width 0xb
|
|
width 8.
|
|
tree "Timer and Watchdog Blocks"
|
|
base ad:(d.l(c15:0x400f))+0x600
|
|
group.long 0x00++0xb "Timer"
|
|
line.long 0x00 "TLR,Timer Load Register"
|
|
line.long 0x04 "TCR,Timer Counter Register"
|
|
line.long 0x08 "TCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto reload" "Single shot,Auto-reload"
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "TISR,Timer Interrupt Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x20++0x13 "Watchdog"
|
|
line.long 0x00 "WLR,Watchdog Load Register"
|
|
line.long 0x04 "WCR,Watchdog Counter Register"
|
|
line.long 0x08 "WCONR,Watchdog Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog"
|
|
bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload"
|
|
textline " "
|
|
bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled"
|
|
line.long 0x0c "WISR,Watchdog Interrupt Status Register"
|
|
eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1"
|
|
line.long 0x10 "WRSR,Watchdog Reset Sent Register"
|
|
eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "WDR,Watchdog Disable Register"
|
|
base ad:(d.l(c15:0x400f))+0x200
|
|
group.long 0x00++0xb "Global Timer"
|
|
line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register"
|
|
line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register"
|
|
line.long 0x08 "GTCONR,Timer Control Register"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler"
|
|
bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment"
|
|
bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GTSR,Timer Status Register"
|
|
eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register"
|
|
line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register"
|
|
line.long 0x08 "GTINCR,Auto-increment Register for Comparator"
|
|
tree.end
|
|
width 11.
|
|
tree.open "Interrupt Controller (PL-390)"
|
|
width 17.
|
|
base AD:0x10490000
|
|
tree "Distributor Interface"
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x400)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x400)
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
else
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
endif
|
|
rgroup.long 0x0008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
|
|
hexmask.long.word 0x00 12.--23. 1. " REV_NUM ,Returns the revision number of the GIC"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
|
|
width 17.
|
|
tree "Group/Security Registers"
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0084++0x03
|
|
hide.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0088++0x03
|
|
hide.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x008C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0090++0x03
|
|
hide.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0094++0x03
|
|
hide.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0098++0x03
|
|
hide.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x009C++0x03
|
|
hide.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00A8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00AC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00B8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00BC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00C8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00CC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00D8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00DC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0E0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00E8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00EC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x0F0++0x03
|
|
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F4++0x03
|
|
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00F8++0x03
|
|
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1"
|
|
else
|
|
hgroup.long 0x00FC++0x03
|
|
hide.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
endif
|
|
width 24.
|
|
tree "Set/Clear Enable Registers"
|
|
group.long 0x0100++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled"
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0104++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0108++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x010C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0110++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0114++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0118++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x011C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0120++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0124++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0128++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x012C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0130++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0134++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0138++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x013C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0140++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0144++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0148++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x014C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0150++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0154++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0158++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x015C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0160++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0164++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0168++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x016C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0170++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0174++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0178++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x017C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 22.
|
|
tree "Set/Clear Pending Registers"
|
|
group.long 0x0200++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Disabled,Enabled"
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0204++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0208++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x020C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0210++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0214++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0218++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x021C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0220++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0224++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0228++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x022C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0230++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0234++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0238++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x023C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0240++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0244++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0248++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x024C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0250++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0254++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0258++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x025C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0260++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0264++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0268++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x026C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0270++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0274++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x0278++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x027C++0x03
|
|
hide.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Set/Clear Active Registers"
|
|
rgroup.long 0x0300++0x03
|
|
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
|
|
bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active"
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0304++0x03
|
|
hide.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0308++0x03
|
|
hide.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active"
|
|
else
|
|
hgroup.long 0x030C++0x03
|
|
hide.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0310++0x03
|
|
hide.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0314++0x03
|
|
hide.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0318++0x03
|
|
hide.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active"
|
|
else
|
|
hgroup.long 0x031C++0x03
|
|
hide.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0320++0x03
|
|
hide.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0324++0x03
|
|
hide.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0328++0x03
|
|
hide.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active"
|
|
else
|
|
hgroup.long 0x032C++0x03
|
|
hide.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0330++0x03
|
|
hide.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0334++0x03
|
|
hide.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0338++0x03
|
|
hide.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active"
|
|
else
|
|
hgroup.long 0x033C++0x03
|
|
hide.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0340++0x03
|
|
hide.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0344++0x03
|
|
hide.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0348++0x03
|
|
hide.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active"
|
|
else
|
|
hgroup.long 0x034C++0x03
|
|
hide.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0350++0x03
|
|
hide.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0354++0x03
|
|
hide.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0358++0x03
|
|
hide.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active"
|
|
else
|
|
hgroup.long 0x035C++0x03
|
|
hide.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0360++0x03
|
|
hide.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0364++0x03
|
|
hide.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0368++0x03
|
|
hide.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active"
|
|
else
|
|
hgroup.long 0x036C++0x03
|
|
hide.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0370++0x03
|
|
hide.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0374++0x03
|
|
hide.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active"
|
|
else
|
|
hgroup.long 0x0378++0x03
|
|
hide.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)==0x1F)
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active"
|
|
else
|
|
hgroup.long 0x037C++0x03
|
|
hide.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 20.
|
|
tree "Priority Registers"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 "
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 "
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 "
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 "
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 "
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 "
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 "
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 "
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 "
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 "
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 "
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 "
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 "
|
|
group.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 "
|
|
group.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 "
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x420++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hgroup.long 0x424++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hgroup.long 0x428++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hgroup.long 0x42C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hgroup.long 0x430++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hgroup.long 0x434++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hgroup.long 0x438++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hgroup.long 0x43C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 "
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 "
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 "
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 "
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 "
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 "
|
|
group.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 "
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x440++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hgroup.long 0x444++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hgroup.long 0x448++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hgroup.long 0x44C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hgroup.long 0x450++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hgroup.long 0x454++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hgroup.long 0x458++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hgroup.long 0x45C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 "
|
|
group.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 "
|
|
group.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 "
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 "
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 "
|
|
group.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 "
|
|
group.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 "
|
|
group.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x460++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hgroup.long 0x464++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hgroup.long 0x468++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hgroup.long 0x46C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hgroup.long 0x470++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hgroup.long 0x474++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hgroup.long 0x478++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hgroup.long 0x47C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 "
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 "
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 "
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 "
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 "
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 "
|
|
group.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 "
|
|
group.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x480++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hgroup.long 0x484++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hgroup.long 0x488++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hgroup.long 0x48C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hgroup.long 0x490++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hgroup.long 0x494++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hgroup.long 0x498++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hgroup.long 0x49C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 "
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 "
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 "
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 "
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 "
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 "
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 "
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x4A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hgroup.long 0x4A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hgroup.long 0x4A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hgroup.long 0x4AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hgroup.long 0x4B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hgroup.long 0x4B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hgroup.long 0x4B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hgroup.long 0x4BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 "
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 "
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 "
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 "
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 "
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 "
|
|
group.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 "
|
|
group.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x4C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hgroup.long 0x4C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hgroup.long 0x4C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hgroup.long 0x4CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hgroup.long 0x4D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hgroup.long 0x4D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hgroup.long 0x4D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hgroup.long 0x4DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 "
|
|
group.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 "
|
|
group.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 "
|
|
group.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 "
|
|
group.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 "
|
|
group.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 "
|
|
group.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 "
|
|
group.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x4E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hgroup.long 0x4E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hgroup.long 0x4E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hgroup.long 0x4EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hgroup.long 0x4F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hgroup.long 0x4F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hgroup.long 0x4F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hgroup.long 0x4FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 "
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 "
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 "
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 "
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 "
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 "
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 "
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x500++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hgroup.long 0x504++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hgroup.long 0x508++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hgroup.long 0x50C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hgroup.long 0x510++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hgroup.long 0x514++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hgroup.long 0x518++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hgroup.long 0x51C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 "
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 "
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 "
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 "
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 "
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 "
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 "
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x520++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hgroup.long 0x524++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hgroup.long 0x528++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hgroup.long 0x52C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hgroup.long 0x530++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hgroup.long 0x534++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hgroup.long 0x538++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hgroup.long 0x53C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 "
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 "
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 "
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 "
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 "
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 "
|
|
group.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 "
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x540++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hgroup.long 0x544++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hgroup.long 0x548++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hgroup.long 0x54C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hgroup.long 0x550++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hgroup.long 0x554++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hgroup.long 0x558++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hgroup.long 0x55C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 "
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 "
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 "
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 "
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 "
|
|
group.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 "
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 "
|
|
group.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x560++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hgroup.long 0x564++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hgroup.long 0x568++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hgroup.long 0x56C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hgroup.long 0x570++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hgroup.long 0x574++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hgroup.long 0x578++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hgroup.long 0x57C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 "
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 "
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 "
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 "
|
|
group.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 "
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 "
|
|
group.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 "
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x580++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hgroup.long 0x584++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hgroup.long 0x588++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hgroup.long 0x58C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hgroup.long 0x590++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hgroup.long 0x594++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hgroup.long 0x598++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hgroup.long 0x59C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 "
|
|
group.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 "
|
|
group.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 "
|
|
group.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 "
|
|
group.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 "
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 "
|
|
group.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 "
|
|
group.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x5A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hgroup.long 0x5A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hgroup.long 0x5A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hgroup.long 0x5AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hgroup.long 0x5B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hgroup.long 0x5B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hgroup.long 0x5B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hgroup.long 0x5BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 "
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 "
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 "
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 "
|
|
group.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 "
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 "
|
|
group.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 "
|
|
group.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x5C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hgroup.long 0x5C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hgroup.long 0x5C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hgroup.long 0x5CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hgroup.long 0x5D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hgroup.long 0x5D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hgroup.long 0x5D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hgroup.long 0x5DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 "
|
|
group.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 "
|
|
group.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 "
|
|
group.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 "
|
|
group.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 "
|
|
group.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 "
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 "
|
|
group.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x5E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hgroup.long 0x5E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hgroup.long 0x5E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hgroup.long 0x5EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hgroup.long 0x5F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hgroup.long 0x5F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hgroup.long 0x5F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hgroup.long 0x5FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 "
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 "
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 "
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 "
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 "
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 "
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 "
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 "
|
|
else
|
|
hgroup.long 0x600++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hgroup.long 0x604++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hgroup.long 0x608++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hgroup.long 0x60C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hgroup.long 0x610++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hgroup.long 0x614++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hgroup.long 0x618++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hgroup.long 0x61C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 "
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 "
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 "
|
|
group.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 "
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 "
|
|
group.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 "
|
|
group.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 "
|
|
group.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 "
|
|
else
|
|
hgroup.long 0x620++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hgroup.long 0x624++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hgroup.long 0x628++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hgroup.long 0x62C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hgroup.long 0x630++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hgroup.long 0x634++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hgroup.long 0x638++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hgroup.long 0x63C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 "
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 "
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 "
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 "
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 "
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 "
|
|
group.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 "
|
|
group.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 "
|
|
else
|
|
hgroup.long 0x640++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hgroup.long 0x644++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hgroup.long 0x648++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hgroup.long 0x64C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hgroup.long 0x650++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hgroup.long 0x654++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hgroup.long 0x658++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hgroup.long 0x65C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 "
|
|
group.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 "
|
|
group.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 "
|
|
group.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 "
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 "
|
|
group.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 "
|
|
group.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 "
|
|
group.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 "
|
|
else
|
|
hgroup.long 0x660++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hgroup.long 0x664++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hgroup.long 0x668++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hgroup.long 0x66C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hgroup.long 0x670++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hgroup.long 0x674++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hgroup.long 0x678++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hgroup.long 0x67C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 "
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 "
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 "
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 "
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 "
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 "
|
|
group.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 "
|
|
group.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 "
|
|
else
|
|
hgroup.long 0x680++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hgroup.long 0x684++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hgroup.long 0x688++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hgroup.long 0x68C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hgroup.long 0x690++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hgroup.long 0x694++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hgroup.long 0x698++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hgroup.long 0x69C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 "
|
|
group.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 "
|
|
group.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 "
|
|
group.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 "
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 "
|
|
group.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 "
|
|
group.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 "
|
|
group.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 "
|
|
else
|
|
hgroup.long 0x6A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hgroup.long 0x6A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hgroup.long 0x6A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hgroup.long 0x6AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hgroup.long 0x6B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hgroup.long 0x6B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hgroup.long 0x6B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hgroup.long 0x6BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 "
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 "
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 "
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 "
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 "
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 "
|
|
group.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 "
|
|
group.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 "
|
|
else
|
|
hgroup.long 0x6C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hgroup.long 0x6C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hgroup.long 0x6C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hgroup.long 0x6CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hgroup.long 0x6D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hgroup.long 0x6D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hgroup.long 0x6D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hgroup.long 0x6DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 "
|
|
group.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 "
|
|
group.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 "
|
|
group.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 "
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 "
|
|
group.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 "
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 "
|
|
group.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 "
|
|
else
|
|
hgroup.long 0x6E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hgroup.long 0x6E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hgroup.long 0x6E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hgroup.long 0x6EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hgroup.long 0x6F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hgroup.long 0x6F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hgroup.long 0x6F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hgroup.long 0x6FC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 "
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 "
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 "
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 "
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 "
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 "
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 "
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 "
|
|
else
|
|
hgroup.long 0x700++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hgroup.long 0x704++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hgroup.long 0x708++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hgroup.long 0x70C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hgroup.long 0x710++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hgroup.long 0x714++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hgroup.long 0x718++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hgroup.long 0x71C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 "
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 "
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 "
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 "
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 "
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 "
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 "
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 "
|
|
else
|
|
hgroup.long 0x720++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hgroup.long 0x724++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hgroup.long 0x728++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hgroup.long 0x72C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hgroup.long 0x730++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hgroup.long 0x734++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hgroup.long 0x738++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hgroup.long 0x73C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 "
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 "
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 "
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 "
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 "
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 "
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 "
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 "
|
|
else
|
|
hgroup.long 0x740++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hgroup.long 0x744++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hgroup.long 0x748++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hgroup.long 0x74C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hgroup.long 0x750++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hgroup.long 0x754++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hgroup.long 0x758++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hgroup.long 0x75C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 "
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 "
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 "
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 "
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 "
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 "
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 "
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 "
|
|
else
|
|
hgroup.long 0x760++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hgroup.long 0x764++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hgroup.long 0x768++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hgroup.long 0x76C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hgroup.long 0x770++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hgroup.long 0x774++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hgroup.long 0x778++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hgroup.long 0x77C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 "
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 "
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 "
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 "
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 "
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 "
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 "
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 "
|
|
else
|
|
hgroup.long 0x780++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hgroup.long 0x784++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hgroup.long 0x788++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hgroup.long 0x78C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hgroup.long 0x790++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hgroup.long 0x794++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hgroup.long 0x798++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hgroup.long 0x79C++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 "
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 "
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 "
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 "
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 "
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 "
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 "
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 "
|
|
else
|
|
hgroup.long 0x7A0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hgroup.long 0x7A4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hgroup.long 0x7A8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hgroup.long 0x7AC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hgroup.long 0x7B0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hgroup.long 0x7B4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hgroup.long 0x7B8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hgroup.long 0x7BC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 "
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 "
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 "
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 "
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 "
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 "
|
|
group.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 "
|
|
group.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 "
|
|
else
|
|
hgroup.long 0x7C0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hgroup.long 0x7C4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hgroup.long 0x7C8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hgroup.long 0x7CC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hgroup.long 0x7D0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hgroup.long 0x7D4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hgroup.long 0x7D8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hgroup.long 0x7DC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 "
|
|
group.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 "
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000"
|
|
group.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008"
|
|
group.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012"
|
|
group.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016"
|
|
else
|
|
hgroup.long 0x7E0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hgroup.long 0x7E4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hgroup.long 0x7E8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hgroup.long 0x7EC++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hgroup.long 0x7F0++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hgroup.long 0x7F4++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hgroup.long 0x7F8++0x03
|
|
hide.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "Processor Targets Registers"
|
|
if (((d.l(AD:0x10490000+0x04))&0x000000E0)>0x1)
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 "
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 "
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 "
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 "
|
|
group.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 "
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 "
|
|
group.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 "
|
|
group.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 "
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 "
|
|
else
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 "
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 "
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 "
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 "
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 "
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 "
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 "
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 "
|
|
else
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 "
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 "
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 "
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 "
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 "
|
|
group.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 "
|
|
group.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 "
|
|
group.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 "
|
|
else
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 "
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 "
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 "
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 "
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 "
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 "
|
|
group.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 "
|
|
group.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 "
|
|
else
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 "
|
|
group.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 "
|
|
group.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 "
|
|
group.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 "
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 "
|
|
group.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 "
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 "
|
|
group.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 "
|
|
else
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 "
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 "
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 "
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 "
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 "
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 "
|
|
group.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 "
|
|
group.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 "
|
|
else
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 "
|
|
group.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 "
|
|
group.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 "
|
|
group.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 "
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 "
|
|
group.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 "
|
|
group.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 "
|
|
group.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 "
|
|
else
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 "
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 "
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 "
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 "
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 "
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 "
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 "
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 "
|
|
else
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 "
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 "
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 "
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 "
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 "
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 "
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 "
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 "
|
|
else
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 "
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 "
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 "
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 "
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 "
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 "
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 "
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 "
|
|
else
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 "
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 "
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 "
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 "
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 "
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 "
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 "
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 "
|
|
else
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 "
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 "
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 "
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 "
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 "
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 "
|
|
group.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 "
|
|
group.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 "
|
|
else
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 "
|
|
group.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 "
|
|
group.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 "
|
|
group.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 "
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 "
|
|
group.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 "
|
|
group.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 "
|
|
group.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 "
|
|
else
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 "
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 "
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 "
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 "
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 "
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 "
|
|
group.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 "
|
|
group.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 "
|
|
else
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 "
|
|
group.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 "
|
|
group.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 "
|
|
group.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 "
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 "
|
|
group.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 "
|
|
group.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 "
|
|
group.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 "
|
|
else
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 "
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 "
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 "
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 "
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 "
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 "
|
|
group.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 "
|
|
group.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 "
|
|
else
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 "
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 "
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 "
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 "
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 "
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 "
|
|
group.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 "
|
|
group.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 "
|
|
else
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 "
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 "
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 "
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 "
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 "
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 "
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 "
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 "
|
|
else
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 "
|
|
group.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 "
|
|
group.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 "
|
|
group.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 "
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 "
|
|
group.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 "
|
|
group.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 "
|
|
group.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 "
|
|
else
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 "
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 "
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 "
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 "
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 "
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 "
|
|
group.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 "
|
|
group.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 "
|
|
else
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 "
|
|
group.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 "
|
|
group.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 "
|
|
group.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 "
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 "
|
|
group.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 "
|
|
group.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 "
|
|
group.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 "
|
|
else
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 "
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 "
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 "
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 "
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 "
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 "
|
|
group.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 "
|
|
group.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 "
|
|
else
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 "
|
|
group.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 "
|
|
group.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 "
|
|
group.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 "
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 "
|
|
group.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 "
|
|
group.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 "
|
|
group.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 "
|
|
else
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 "
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 "
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 "
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 "
|
|
group.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 "
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 "
|
|
group.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 "
|
|
group.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 "
|
|
else
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 "
|
|
group.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 "
|
|
group.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 "
|
|
group.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 "
|
|
group.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 "
|
|
group.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 "
|
|
group.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 "
|
|
group.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 "
|
|
else
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 "
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 "
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 "
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 "
|
|
group.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 "
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 "
|
|
group.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 "
|
|
group.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 "
|
|
else
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 "
|
|
group.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 "
|
|
group.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 "
|
|
group.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 "
|
|
group.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 "
|
|
group.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 "
|
|
group.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 "
|
|
group.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 "
|
|
else
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 "
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 "
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 "
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 "
|
|
group.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 "
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 "
|
|
group.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 "
|
|
group.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 "
|
|
else
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 "
|
|
group.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 "
|
|
group.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 "
|
|
group.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 "
|
|
group.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 "
|
|
group.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 "
|
|
group.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 "
|
|
group.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 "
|
|
else
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 "
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 "
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 "
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 "
|
|
group.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 "
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 "
|
|
group.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 "
|
|
group.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 "
|
|
else
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 "
|
|
group.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 "
|
|
group.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000"
|
|
group.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004"
|
|
group.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008"
|
|
group.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012"
|
|
group.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016"
|
|
else
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
else
|
|
hgroup.long 0x800++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 "
|
|
hgroup.long 0x804++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 "
|
|
hgroup.long 0x808++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 "
|
|
hgroup.long 0x80C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 "
|
|
hgroup.long 0x810++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 "
|
|
hgroup.long 0x814++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 "
|
|
hgroup.long 0x818++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 "
|
|
hgroup.long 0x81C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 "
|
|
hgroup.long 0x820++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 "
|
|
hgroup.long 0x824++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 "
|
|
hgroup.long 0x828++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
|
|
hgroup.long 0x82C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
|
|
hgroup.long 0x830++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
|
|
hgroup.long 0x834++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
|
|
hgroup.long 0x838++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
|
|
hgroup.long 0x83C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
|
|
hgroup.long 0x840++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
|
|
hgroup.long 0x844++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
|
|
hgroup.long 0x848++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
|
|
hgroup.long 0x84C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
|
|
hgroup.long 0x850++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
|
|
hgroup.long 0x854++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
|
|
hgroup.long 0x858++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
|
|
hgroup.long 0x85C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
|
|
hgroup.long 0x860++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
|
|
hgroup.long 0x864++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
|
|
hgroup.long 0x868++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
|
|
hgroup.long 0x86C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
|
|
hgroup.long 0x870++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
|
|
hgroup.long 0x874++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
|
|
hgroup.long 0x878++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
|
|
hgroup.long 0x87C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
|
|
hgroup.long 0x884++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
|
|
hgroup.long 0x888++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
|
|
hgroup.long 0x88C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
|
|
hgroup.long 0x890++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
|
|
hgroup.long 0x894++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
|
|
hgroup.long 0x898++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
|
|
hgroup.long 0x89C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
|
|
hgroup.long 0x8A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
|
|
hgroup.long 0x8A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
|
|
hgroup.long 0x8A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
|
|
hgroup.long 0x8AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
|
|
hgroup.long 0x8B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
|
|
hgroup.long 0x8B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
|
|
hgroup.long 0x8B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
|
|
hgroup.long 0x8BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
|
|
hgroup.long 0x8C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
|
|
hgroup.long 0x8C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
|
|
hgroup.long 0x8C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
|
|
hgroup.long 0x8CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
|
|
hgroup.long 0x8D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
|
|
hgroup.long 0x8D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
|
|
hgroup.long 0x8D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
|
|
hgroup.long 0x8DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
|
|
hgroup.long 0x8E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
|
|
hgroup.long 0x8E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
|
|
hgroup.long 0x8E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
|
|
hgroup.long 0x8EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
|
|
hgroup.long 0x8F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
|
|
hgroup.long 0x8F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
|
|
hgroup.long 0x8F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
|
|
hgroup.long 0x8FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
|
|
hgroup.long 0x900++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
|
|
hgroup.long 0x904++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
|
|
hgroup.long 0x908++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
|
|
hgroup.long 0x90C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
|
|
hgroup.long 0x910++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
|
|
hgroup.long 0x914++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
|
|
hgroup.long 0x918++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
|
|
hgroup.long 0x91C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
|
|
hgroup.long 0x920++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
|
|
hgroup.long 0x924++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
|
|
hgroup.long 0x928++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
|
|
hgroup.long 0x92C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
|
|
hgroup.long 0x930++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
|
|
hgroup.long 0x934++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
|
|
hgroup.long 0x938++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
|
|
hgroup.long 0x93C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
|
|
hgroup.long 0x940++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
|
|
hgroup.long 0x944++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
|
|
hgroup.long 0x948++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
|
|
hgroup.long 0x94C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
|
|
hgroup.long 0x950++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
|
|
hgroup.long 0x954++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
|
|
hgroup.long 0x958++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
|
|
hgroup.long 0x95C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
|
|
hgroup.long 0x960++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
|
|
hgroup.long 0x964++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
|
|
hgroup.long 0x968++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
|
|
hgroup.long 0x96C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
|
|
hgroup.long 0x970++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
|
|
hgroup.long 0x974++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
|
|
hgroup.long 0x978++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
|
|
hgroup.long 0x97C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
|
|
hgroup.long 0x980++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
|
|
hgroup.long 0x984++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
|
|
hgroup.long 0x988++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
|
|
hgroup.long 0x98C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
|
|
hgroup.long 0x990++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hgroup.long 0x994++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hgroup.long 0x998++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hgroup.long 0x99C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hgroup.long 0x9A0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hgroup.long 0x9A4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hgroup.long 0x9A8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hgroup.long 0x9AC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hgroup.long 0x9B0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hgroup.long 0x9B4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hgroup.long 0x9B8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hgroup.long 0x9BC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hgroup.long 0x9C0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hgroup.long 0x9C4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hgroup.long 0x9C8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hgroup.long 0x9CC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hgroup.long 0x9D0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hgroup.long 0x9D4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hgroup.long 0x9D8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hgroup.long 0x9DC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hgroup.long 0x9E0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hgroup.long 0x9E4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hgroup.long 0x9E8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hgroup.long 0x9EC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hgroup.long 0x9F0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hgroup.long 0x9F4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hgroup.long 0x9F8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hgroup.long 0x9FC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hgroup.long 0xA00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hgroup.long 0xA04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hgroup.long 0xA08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hgroup.long 0xA0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hgroup.long 0xA10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hgroup.long 0xA14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hgroup.long 0xA18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hgroup.long 0xA1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hgroup.long 0xA20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hgroup.long 0xA24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hgroup.long 0xA28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hgroup.long 0xA2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hgroup.long 0xA30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hgroup.long 0xA34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hgroup.long 0xA38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hgroup.long 0xA3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hgroup.long 0xA40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hgroup.long 0xA44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hgroup.long 0xA48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hgroup.long 0xA4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hgroup.long 0xA50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hgroup.long 0xA54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hgroup.long 0xA58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hgroup.long 0xA5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hgroup.long 0xA60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hgroup.long 0xA64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hgroup.long 0xA68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hgroup.long 0xA6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hgroup.long 0xA70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hgroup.long 0xA74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hgroup.long 0xA78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hgroup.long 0xA7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hgroup.long 0xA80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hgroup.long 0xA84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hgroup.long 0xA88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hgroup.long 0xA8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hgroup.long 0xA90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hgroup.long 0xA94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hgroup.long 0xA98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hgroup.long 0xA9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hgroup.long 0xAA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hgroup.long 0xAA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hgroup.long 0xAA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hgroup.long 0xAAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hgroup.long 0xAB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hgroup.long 0xAB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hgroup.long 0xAB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hgroup.long 0xABC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hgroup.long 0xAC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hgroup.long 0xAC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hgroup.long 0xAC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hgroup.long 0xACC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hgroup.long 0xAD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hgroup.long 0xAD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hgroup.long 0xAD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hgroup.long 0xADC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hgroup.long 0xAE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hgroup.long 0xAE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hgroup.long 0xAE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hgroup.long 0xAEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hgroup.long 0xAF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hgroup.long 0xAF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hgroup.long 0xAF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hgroup.long 0xAFC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hgroup.long 0xB00++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hgroup.long 0xB04++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hgroup.long 0xB08++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hgroup.long 0xB0C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hgroup.long 0xB10++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hgroup.long 0xB14++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hgroup.long 0xB18++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hgroup.long 0xB1C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hgroup.long 0xB20++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hgroup.long 0xB24++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hgroup.long 0xB28++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hgroup.long 0xB2C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hgroup.long 0xB30++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hgroup.long 0xB34++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hgroup.long 0xB38++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hgroup.long 0xB3C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hgroup.long 0xB40++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hgroup.long 0xB44++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hgroup.long 0xB48++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hgroup.long 0xB4C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hgroup.long 0xB50++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hgroup.long 0xB54++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hgroup.long 0xB58++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hgroup.long 0xB5C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hgroup.long 0xB60++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hgroup.long 0xB64++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hgroup.long 0xB68++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hgroup.long 0xB6C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hgroup.long 0xB70++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hgroup.long 0xB74++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hgroup.long 0xB78++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hgroup.long 0xB7C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hgroup.long 0xB80++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hgroup.long 0xB84++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hgroup.long 0xB88++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hgroup.long 0xB8C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hgroup.long 0xB90++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hgroup.long 0xB94++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hgroup.long 0xB98++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hgroup.long 0xB9C++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hgroup.long 0xBA0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hgroup.long 0xBA4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hgroup.long 0xBA8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hgroup.long 0xBAC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hgroup.long 0xBB0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hgroup.long 0xBB4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hgroup.long 0xBB8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hgroup.long 0xBBC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hgroup.long 0xBC0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hgroup.long 0xBC4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hgroup.long 0xBC8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hgroup.long 0xBCC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hgroup.long 0xBD0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hgroup.long 0xBD4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hgroup.long 0xBD8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hgroup.long 0xBDC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hgroup.long 0xBE0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hgroup.long 0xBE4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hgroup.long 0xBE8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hgroup.long 0xBEC++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hgroup.long 0xBF0++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hgroup.long 0xBF4++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hgroup.long 0xBF8++0x03
|
|
hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree "Configuration Registers"
|
|
hgroup.long 0xC00++0x03
|
|
hide.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
|
|
textline " "
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1)
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC08++0x03
|
|
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
hgroup.long 0xC0C++0x03
|
|
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x2)
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC10++0x03
|
|
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
hgroup.long 0xC14++0x03
|
|
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x3)
|
|
group.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC18++0x03
|
|
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
hgroup.long 0xC1C++0x03
|
|
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x4)
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC20++0x03
|
|
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
hgroup.long 0xC24++0x03
|
|
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x5)
|
|
group.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC28++0x03
|
|
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
hgroup.long 0xC2C++0x03
|
|
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x6)
|
|
group.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC30++0x03
|
|
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
hgroup.long 0xC34++0x03
|
|
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x7)
|
|
group.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC38++0x03
|
|
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
hgroup.long 0xC3C++0x03
|
|
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x8)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC40++0x03
|
|
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
hgroup.long 0xC44++0x03
|
|
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x9)
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC48++0x03
|
|
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
hgroup.long 0xC4C++0x03
|
|
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xA)
|
|
group.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC50++0x03
|
|
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
hgroup.long 0xC54++0x03
|
|
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xB)
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC58++0x03
|
|
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
hgroup.long 0xC5C++0x03
|
|
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xC)
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC60++0x03
|
|
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
hgroup.long 0xC64++0x03
|
|
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xD)
|
|
group.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC68++0x03
|
|
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
hgroup.long 0xC6C++0x03
|
|
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xE)
|
|
group.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC70++0x03
|
|
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
hgroup.long 0xC74++0x03
|
|
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0xF)
|
|
group.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC78++0x03
|
|
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
hgroup.long 0xC7C++0x03
|
|
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC80++0x03
|
|
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
hgroup.long 0xC84++0x03
|
|
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC88++0x03
|
|
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
hgroup.long 0xC8C++0x03
|
|
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC90++0x03
|
|
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
hgroup.long 0xC94++0x03
|
|
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xC98++0x03
|
|
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
hgroup.long 0xC9C++0x03
|
|
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA0++0x03
|
|
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
hgroup.long 0xCA4++0x03
|
|
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCA8++0x03
|
|
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
hgroup.long 0xCAC++0x03
|
|
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB0++0x03
|
|
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
hgroup.long 0xCB4++0x03
|
|
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCB8++0x03
|
|
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
hgroup.long 0xCBC++0x03
|
|
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC0++0x03
|
|
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
hgroup.long 0xCC4++0x03
|
|
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCC8++0x03
|
|
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
hgroup.long 0xCCC++0x03
|
|
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD0++0x03
|
|
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
hgroup.long 0xCD4++0x03
|
|
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCD8++0x03
|
|
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
hgroup.long 0xCDC++0x03
|
|
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE0++0x03
|
|
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
hgroup.long 0xCE4++0x03
|
|
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCE8++0x03
|
|
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
hgroup.long 0xCEC++0x03
|
|
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF0++0x03
|
|
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
hgroup.long 0xCF4++0x03
|
|
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
hgroup.long 0xCF8++0x03
|
|
hide.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
hgroup.long 0xCFC++0x03
|
|
hide.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x0D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI_C[15] ,Returns the status of the ppi_c[15] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 14. " PPI_C[14] ,Returns the status of the ppi_c[14] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 13. " PPI_C[13] ,Returns the status of the ppi_c[13] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 12. " PPI_C[12] ,Returns the status of the ppi_c[12] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI_C[11] ,Returns the status of the ppi_c[11] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 10. " PPI_C[10] ,Returns the status of the ppi_c[10] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 9. " PPI_C[9] ,Returns the status of the ppi_c[9] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 8. " PPI_C[8] ,Returns the status of the ppi_c[8] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PPI_C[7] ,Returns the status of the ppi_c[7] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 6. " PPI_C[6] ,Returns the status of the ppi_c[6] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 5. " PPI_C[5] ,Returns the status of the ppi_c[5] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 4. " PPI_C[4] ,Returns the status of the ppi_c[4] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PPI_C[3] ,Returns the status of the ppi_c[3] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 2. " PPI_C[2] ,Returns the status of the ppi_c[2] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 1. " PPI_C[1] ,Returns the status of the ppi_c[1] inputs on the Distributor" "Low,High"
|
|
bitfld.long 0x00 0. " PPI_C[0] ,Returns the status of the ppi_c[0] inputs on the Distributor" "Low,High"
|
|
textline " "
|
|
width 22.
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x0D04++0x03
|
|
hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High"
|
|
else
|
|
hgroup.long 0x0D08++0x03
|
|
hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High"
|
|
else
|
|
hgroup.long 0x0D0C++0x03
|
|
hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High"
|
|
else
|
|
hgroup.long 0x0D10++0x03
|
|
hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High"
|
|
else
|
|
hgroup.long 0x0D14++0x03
|
|
hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High"
|
|
else
|
|
hgroup.long 0x0D18++0x03
|
|
hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High"
|
|
else
|
|
hgroup.long 0x0D1C++0x03
|
|
hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High"
|
|
else
|
|
hgroup.long 0x0D20++0x03
|
|
hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High"
|
|
else
|
|
hgroup.long 0x0D24++0x03
|
|
hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High"
|
|
else
|
|
hgroup.long 0x0D28++0x03
|
|
hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High"
|
|
else
|
|
hgroup.long 0x0D2C++0x03
|
|
hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High"
|
|
else
|
|
hgroup.long 0x0D30++0x03
|
|
hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High"
|
|
else
|
|
hgroup.long 0x0D34++0x03
|
|
hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High"
|
|
else
|
|
hgroup.long 0x0D38++0x03
|
|
hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High"
|
|
else
|
|
hgroup.long 0x0D3C++0x03
|
|
hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High"
|
|
else
|
|
hgroup.long 0x0D40++0x03
|
|
hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High"
|
|
else
|
|
hgroup.long 0x0D44++0x03
|
|
hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High"
|
|
else
|
|
hgroup.long 0x0D48++0x03
|
|
hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High"
|
|
else
|
|
hgroup.long 0x0D4C++0x03
|
|
hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High"
|
|
else
|
|
hgroup.long 0x0D50++0x03
|
|
hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High"
|
|
else
|
|
hgroup.long 0x0D54++0x03
|
|
hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High"
|
|
else
|
|
hgroup.long 0x0D58++0x03
|
|
hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High"
|
|
else
|
|
hgroup.long 0x0D5C++0x03
|
|
hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x060++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High"
|
|
else
|
|
hgroup.long 0x0D60++0x03
|
|
hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High"
|
|
else
|
|
hgroup.long 0x0D64++0x03
|
|
hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High"
|
|
else
|
|
hgroup.long 0x0D68++0x03
|
|
hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High"
|
|
else
|
|
hgroup.long 0x0D6C++0x03
|
|
hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High"
|
|
else
|
|
hgroup.long 0x0D70++0x03
|
|
hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High"
|
|
else
|
|
hgroup.long 0x0D74++0x03
|
|
hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High"
|
|
else
|
|
hgroup.long 0x0D78++0x03
|
|
hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((d.l(AD:0x10490000+0x04))&0x0000001F)>=0x1F)
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High"
|
|
else
|
|
hgroup.long 0x0D7C++0x03
|
|
hide.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Software Generated Interrupt"
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral/Component ID Registers"
|
|
rgroup.byte 0x0FE0++0x00
|
|
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Returns 0x90"
|
|
rgroup.byte 0x0FE4++0x00
|
|
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.byte 0x00 4.--7. " JEP106_ID_3_0 ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " PART_NUMBER_1 ,Returns 0x3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FE8++0x00
|
|
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHITECTURE ,Identifies the architecture version of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. " JEDEC_USED ,This indicates that the GIC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Low,High"
|
|
bitfld.byte 0x00 0.--2. " JEP106_ID_CODE ,JEP106 identity code field" "0,1,2,3,4,5,6,7"
|
|
rgroup.byte 0x0FEC++0x00
|
|
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.byte 0x00 4.--7. " REVAND ,The top-level RTL provides four AND gates that are tied-off to provide an output value of 0x0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD0++0x00
|
|
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.byte 0x00 4.--7. " 4KB_COUNT ,The number of 4KB address blocks you require to access the registers expressed in powers of 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " JEP106_C_CODE ,The JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD4++0x00
|
|
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
bitfld.byte 0x00 5.--7. " PPI_NUMBER_0 ,The LSBs of the number of PPIs that the GIC provides" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. " SGI_NUMBER ,The number of SGIs that the GIC provides" "None,INTID0,INTID[1:0],INTID[2:0],INTID[3:0],INTID[4:0],INTID[5:0],INTID[6:0],INTID[7:0],INTID[8:0],INTID[9:0],INTID[10:0],INTID[11:0],INTID[12:0],INTID[13:0],INTID[14:0],INTID[15:0],?..."
|
|
rgroup.byte 0x0FD8++0x00
|
|
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
bitfld.byte 0x00 2.--7. " SPI_NUMBER_0 ,The LSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.byte 0x00 0.--1. " PPI_NUMBER_1 ,The MSBs of the number of PPIs that the GIC provides" "0,1,2,3"
|
|
rgroup.byte 0x0FDC++0x00
|
|
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
bitfld.byte 0x00 7. " TZ ,Identifies the number of security states that the GIC supports" "S,NS&S"
|
|
bitfld.byte 0x00 4.--6. " PRIORITY ,The number of priority levels that the GIC provides" "16,32,64,128,256,?..."
|
|
bitfld.byte 0x00 0.--3. " SPI_NUMBER_1 ,The MSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FC0++0x00
|
|
line.byte 0x00 "GICD_PIDR8,Peripheral ID8 Register"
|
|
bitfld.byte 0x00 7. " IDENTIFIER ,Identifies the AMBA interface that this register belongs to" "Distributor,CPU Interface"
|
|
bitfld.byte 0x00 5.--6. " IF_TYPE ,Identifies the AMBA protocol that the GIC supports" "AXI,AHB-Lite,?..."
|
|
bitfld.byte 0x00 2.--4. " CPU_IF ,Identifies the number of CPU Interfaces that the GIC contains" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FIQ_LEGACY ,Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface" "Not supported,Supported"
|
|
bitfld.byte 0x00 0. " IRQ_LEGACY ,Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface" "Not supported,Supported"
|
|
tree.end
|
|
tree.end
|
|
base AD:0x10480000+(core.logicaltophysical(core())-1.)*0x4000
|
|
width 17.
|
|
tree "CPU Interface"
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x0)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x400)
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
if (((d.l(AD:0x10490000+0x04))&0x400)==0x400)
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
hgroup.long 0x001C++0x03
|
|
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
endif
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "Chip ID"
|
|
base ad:0x10000000
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PRO_ID,Product ID Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " PID ,Product ID"
|
|
bitfld.long 0x00 8.--9. " PACKAGE ,Package" "0,1,2,3"
|
|
bitfld.long 0x00 4.--7. " MAINREV ,Main Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SUBREV ,Sub Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "PKG_ID,Package ID Register"
|
|
else
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "PKG_ID,Package ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " Ids_ARM ,Static current of VDD_ARM @1.1V"
|
|
hexmask.long.byte 0x00 17.--23. 1. " Ids_INT ,Static current of VDD_INT @ 1.1V"
|
|
bitfld.long 0x00 12.--16. " S_CODE ,Speed Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " PACKAGEID ,Package information (POP Type, package)"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "OP_MODE,OP_MODE Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " XOM ,XOM"
|
|
group.long 0x14++0x7
|
|
line.long 0x00 "LOT_ID_0,Lot & wafer information [31:0]"
|
|
line.long 0x04 "LOT_ID_1,Lot & wafer information [47:32]"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOT_ID[47:32] ,Lot & wafer information [47:32]"
|
|
group.long 0x100000++0xF
|
|
line.long 0x00 "ROOTKEY0,Root Key [31:0]"
|
|
line.long 0x04 "ROOTKEY1,Root Key [63:32]"
|
|
line.long 0x08 "ROOTKEY2,Root Key [95:64]"
|
|
line.long 0x0C "ROOTKEY3,Root Key [127:96]"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.open "General Purpose IO (GPIO)"
|
|
base ad:0x11400000
|
|
width 15.
|
|
tree "GPA0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPA0CON,Port Group GPA0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPA0CON[7] ,GPA0 Pin 7 Configuration" "Input,Output,UART_1_RTSn,I2C_2_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[7]"
|
|
bitfld.long 0x00 24.--27. " GPA0CON[6] ,GPA0 Pin 6 Configuration" "Input,Output,UART_1_CTSn,I2C_2_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[6]"
|
|
bitfld.long 0x00 20.--23. " GPA0CON[5] ,GPA0 Pin 5 Configuration" "Input,Output,UART_1_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[5]"
|
|
bitfld.long 0x00 16.--19. " GPA0CON[4] ,GPA0 Pin 4 Configuration" "Input,Output,UART_1_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPA0CON[3] ,GPA0 Pin 3 Configuration" "Input,Output,UART_0_RTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[3]"
|
|
bitfld.long 0x00 8.--11. " GPA0CON[2] ,GPA0 Pin 2 Configuration" "Input,Output,UART_0_CTSn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[2]"
|
|
bitfld.long 0x00 4.--7. " GPA0CON[1] ,GPA0 Pin 1 Configuration" "Input,Output,UART_0_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[1]"
|
|
bitfld.long 0x00 0.--3. " GPA0CON[0] ,GPA0 Pin 0 Configuration" "Input,Output,UART_0_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT1[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPA0DAT,Port Group GPA0 Data Register"
|
|
bitfld.byte 0x00 7. " GPA0DAT[7] ,GPA0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPA0DAT[6] ,GPA0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPA0DAT[5] ,GPA0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPA0DAT[4] ,GPA0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPA0DAT[3] ,GPA0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPA0DAT[2] ,GPA0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPA0DAT[1] ,GPA0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPA0DAT[0] ,GPA0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPA0PUD,Port Group GPA0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA0PUD[7] ,GPA0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA0PUD[6] ,GPA0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA0PUD[5] ,GPA0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA0PUD[4] ,GPA0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0PUD[3] ,GPA0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA0PUD[2] ,GPA0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA0PUD[1] ,GPA0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA0PUD[0] ,GPA0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPA0DRV,Port Group GPA0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPA0DRV[7] ,GPA0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPA0DRV[6] ,GPA0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPA0DRV[5] ,GPA0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPA0DRV[4] ,GPA0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPA0DRV[3] ,GPA0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPA0DRV[2] ,GPA0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPA0DRV[1] ,GPA0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPA0DRV[0] ,GPA0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPA0CONPDN,Port Group GPA0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPA0[7] ,GPA0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPA0[6] ,GPA0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPA0[5] ,GPA0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPA0[4] ,GPA0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0[3] ,GPA0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPA0[2] ,GPA0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPA0[1] ,GPA0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPA0[0] ,GPA0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPA0PUDPDN,Port Group GPA0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPA0[7] ,GPA0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPA0[6] ,GPA0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPA0[5] ,GPA0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA0[4] ,GPA0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPA0[3] ,GPA0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPA0[2] ,GPA0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA0[1] ,GPA0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA0[0] ,GPA0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPA1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPA1CON,Port Group GPA1 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPA1CON[5] ,GPA1 Pin 5 Configuration" "Input,Output,UART_3_TXDn,Reserved,UART_AUDIO_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[5]"
|
|
bitfld.long 0x00 16.--19. " GPA1CON[4] ,GPA1 Pin 4 Configuration" "Input,Output,UART_3_RXD,Reserved,UART_AUDIO_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[4]"
|
|
bitfld.long 0x00 12.--15. " GPA1CON[3] ,GPA1 Pin 3 Configuration" "Input,Output,UART_2_RTSn,I2C_3_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPA1CON[2] ,GPA1 Pin 2 Configuration" "Input,Output,UART_2_CTSn,I2C_3_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[2]"
|
|
bitfld.long 0x00 4.--7. " GPA1CON[1] ,GPA1 Pin 1 Configuration" "Input,Output,UART_2_TXD,Reserved,UART_AUDIO_TXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[1]"
|
|
bitfld.long 0x00 0.--3. " GPA1CON[0] ,GPA1 Pin 0 Configuration" "Input,Output,UART_2_RXD,Reserved,UART_AUDIO_RXD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT2[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPA1DAT,Port Group GPA1 Data Register"
|
|
bitfld.byte 0x00 5. " GPA1DAT[5] ,GPA1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPA1DAT[4] ,GPA1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPA1DAT[3] ,GPA1 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPA1DAT[2] ,GPA1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPA1DAT[1] ,GPA1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPA1DAT[0] ,GPA1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPA1PUD,Port Group GPA1 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPA1PUD[5] ,GPA1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA1PUD[4] ,GPA1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPA1PUD[3] ,GPA1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1PUD[2] ,GPA1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA1PUD[1] ,GPA1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA1PUD[0] ,GPA1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPA1DRV,Port Group GPA1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPA1DRV[5] ,GPA1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPA1DRV[4] ,GPA1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPA1DRV[3] ,GPA1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPA1DRV[2] ,GPA1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPA1DRV[1] ,GPA1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPA1DRV[0] ,GPA1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPA1CONPDN,Port Group GPA1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPA1[5] ,GPA1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPA1[4] ,GPA1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPA1[3] ,GPA1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1[2] ,GPA1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPA1[1] ,GPA1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPA1[0] ,GPA1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPA1PUDPDN,Port Group GPA1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPA1[5] ,GPA1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPA1[4] ,GPA1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPA1[3] ,GPA1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPA1[2] ,GPA1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPA1[1] ,GPA1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPA1[0] ,GPA1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPB"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "GPBCON,Port Group GPB Configuration Register"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
bitfld.long 0x00 28.--31. " GPBCON[7] ,GPB Pin 7 Configuration" "Input,Output,SPI_1_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[7]"
|
|
bitfld.long 0x00 24.--27. " GPBCON[6] ,GPB Pin 6 Configuration" "Input,Output,SPI_1_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[6]"
|
|
elif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPBCON[7] ,GPB Pin 7 Configuration" "Input,Output,SPI_1_MOSI,I2C_5_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[7]"
|
|
bitfld.long 0x00 24.--27. " GPBCON[6] ,GPB Pin 6 Configuration" "Input,Output,SPI_1_MISO,I2C_5_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[6]"
|
|
endif
|
|
bitfld.long 0x00 20.--23. " GPBCON[5] ,GPB Pin 5 Configuration" "Input,Output,SPI_1_nSS,Reserved,IEM_SPWI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[5]"
|
|
bitfld.long 0x00 16.--19. " GPBCON[4] ,GPB Pin 4 Configuration" "Input,Output,SPI_1_CLK,Reserved,IEM_SCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[4]"
|
|
textline " "
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
bitfld.long 0x00 12.--15. " GPBCON[3] ,GPB Pin 3 Configuration" "Input,Output,SPI_0_MOSI,I2C_5_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[3]"
|
|
bitfld.long 0x00 8.--11. " GPBCON[2] ,GPB Pin 2 Configuration" "Input,Output,SPI_0_MISO,I2C_5_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[2]"
|
|
bitfld.long 0x00 4.--7. " GPBCON[1] ,GPB Pin 1 Configuration" "Input,Output,SPI_0_nSS,I2C_4_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[1]"
|
|
bitfld.long 0x00 0.--3. " GPBCON[0] ,GPB Pin 0 Configuration" "Input,Output,SPI_0_CLK,I2C_4_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[0]"
|
|
elif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 12.--15. " GPBCON[3] ,GPB Pin 3 Configuration" "Input,Output,SPI_0_MOSI,I2C_4_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[3]"
|
|
bitfld.long 0x00 8.--11. " GPBCON[2] ,GPB Pin 2 Configuration" "Input,Output,SPI_0_MISO,I2C_4_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[2]"
|
|
bitfld.long 0x00 4.--7. " GPBCON[1] ,GPB Pin 1 Configuration" "Input,Output,SPI_0_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[1]"
|
|
bitfld.long 0x00 0.--3. " GPBCON[0] ,GPB Pin 0 Configuration" "Input,Output,SPI_0_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT3[0]"
|
|
endif
|
|
group.byte 0x044++0x00
|
|
line.byte 0x00 "GPBDAT,Port Group GPB Data Register"
|
|
bitfld.byte 0x00 7. " GPBDAT[7] ,GPB Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPBDAT[6] ,GPB Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPBDAT[5] ,GPB Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPBDAT[4] ,GPB Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPBDAT[3] ,GPB Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPBDAT[2] ,GPB Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPBDAT[1] ,GPB Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPBDAT[0] ,GPB Pin 0 Data" "Low,High"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "GPBPUD,Port Group GPB Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPBPUD[7] ,GPB Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPBPUD[6] ,GPB Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPBPUD[5] ,GPB Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPBPUD[4] ,GPB Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPBPUD[3] ,GPB Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPBPUD[2] ,GPB Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPBPUD[1] ,GPB Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPBPUD[0] ,GPB Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "GPBDRV,Port Group GPB Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPBDRV[7] ,GPB Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPBDRV[6] ,GPB Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPBDRV[5] ,GPB Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPBDRV[4] ,GPB Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPBDRV[3] ,GPB Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPBDRV[2] ,GPB Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPBDRV[1] ,GPB Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPBDRV[0] ,GPB Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x050++0x01
|
|
line.word 0x00 "GPBCONPDN,Port Group GPB Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPB[7] ,GPB Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPB[6] ,GPB Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPB[5] ,GPB Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPB[4] ,GPB Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPB[3] ,GPB Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPB[2] ,GPB Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPB[1] ,GPB Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPB[0] ,GPB Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x054++0x01
|
|
line.word 0x00 "GPBPUDPDN,Port Group GPB Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPB[7] ,GPB Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPB[6] ,GPB Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPB[5] ,GPB Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPB[4] ,GPB Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPB[3] ,GPB Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPB[2] ,GPB Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPB[1] ,GPB Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPB[0] ,GPB Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC0"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPC0CON,Port Group GPC0 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPC0CON[4] ,GPC0 Pin 4 Configuration" "Input,Output,I2S_1_SDO,PCM_1_SOUT,AC97SDO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[4]"
|
|
bitfld.long 0x00 12.--15. " GPC0CON[3] ,GPC0 Pin 3 Configuration" "Input,Output,I2S_1_SDI,PCM_1_SIN,AC97SDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[3]"
|
|
bitfld.long 0x00 8.--11. " GPC0CON[2] ,GPC0 Pin 2 Configuration" "Input,Output,I2S_1_LRCK,PCM_1_FSYNC,AC97SYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPC0CON[1] ,GPC0 Pin 1 Configuration" "Input,Output,I2S_1_CDCLK,PCM_1_EXTCLK,AC97RESETn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[1]"
|
|
bitfld.long 0x00 0.--3. " GPC0CON[0] ,GPC0 Pin 0 Configuration" "Input,Output,I2S_1_SCLK,PCM_1_SCLK,AC97BITCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT4[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPC0DAT,Port Group GPC0 Data Register"
|
|
bitfld.byte 0x00 4. " GPC0DAT[4] ,GPC0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPC0DAT[3] ,GPC0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC0DAT[2] ,GPC0 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPC0DAT[1] ,GPC0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC0DAT[0] ,GPC0 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPC0PUD,Port Group GPC0 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPC0PUD[4] ,GPC0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPC0PUD[3] ,GPC0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC0PUD[2] ,GPC0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC0PUD[1] ,GPC0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC0PUD[0] ,GPC0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPC0DRV,Port Group GPC0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPC0DRV[4] ,GPC0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPC0DRV[3] ,GPC0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC0DRV[2] ,GPC0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPC0DRV[1] ,GPC0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC0DRV[0] ,GPC0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPC0CONPDN,Port Group GPC0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPC0[4] ,GPC0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPC0[3] ,GPC0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC0[2] ,GPC0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC0[1] ,GPC0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC0[0] ,GPC0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPC0PUDPDN,Port Group GPC0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPC0[4] ,GPC0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPC0[3] ,GPC0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC0[2] ,GPC0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC0[1] ,GPC0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC0[0] ,GPC0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPC1"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPC1CON,Port Group GPC1 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPC1CON[4] ,GPC1 Pin 4 Configuration" "Input,Output,I2S_2_SDO,PCM_2_SOUT,I2C_6_SCL,SPI_2_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[4]"
|
|
bitfld.long 0x00 12.--15. " GPC1CON[3] ,GPC1 Pin 3 Configuration" "Input,Output,I2S_2_SDI,PCM_2_SIN,I2C_6_SDA,SPI_2_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[3]"
|
|
bitfld.long 0x00 8.--11. " GPC1CON[2] ,GPC1 Pin 2 Configuration" "Input,Output,I2S_2_LRCK,PCM_2_FSYNC,Reserved,SPI_2_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPC1CON[1] ,GPC1 Pin 1 Configuration" "Input,Output,I2S_2_CDCLK,PCM_2_EXTCLK,SPDIF_EXTCLK,SPI_2_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[1]"
|
|
bitfld.long 0x00 0.--3. " GPC1CON[0] ,GPC1 Pin 0 Configuration" "Input,Output,I2S_2_SCLK,PCM_2_SCLK,SPDIF_0_OUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT5[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPC1DAT,Port Group GPC1 Data Register"
|
|
bitfld.byte 0x00 4. " GPC1DAT[4] ,GPC1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPC1DAT[3] ,GPC1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPC1DAT[2] ,GPC1 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPC1DAT[1] ,GPC1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPC1DAT[0] ,GPC1 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPC1PUD,Port Group GPC1 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPC1PUD[4] ,GPC1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPC1PUD[3] ,GPC1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC1PUD[2] ,GPC1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC1PUD[1] ,GPC1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC1PUD[0] ,GPC1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPC1DRV,Port Group GPC1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPC1DRV[4] ,GPC1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPC1DRV[3] ,GPC1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPC1DRV[2] ,GPC1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPC1DRV[1] ,GPC1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPC1DRV[0] ,GPC1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPC1CONPDN,Port Group GPC1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPC1[4] ,GPC1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPC1[3] ,GPC1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPC1[2] ,GPC1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC1[1] ,GPC1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPC1[0] ,GPC1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPC1PUDPDN,Port Group GPC1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPC1[4] ,GPC1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPC1[3] ,GPC1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPC1[2] ,GPC1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPC1[1] ,GPC1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPC1[0] ,GPC1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPD0"
|
|
group.long 0x0A0++0x03
|
|
line.long 0x00 "GPD0CON,Port Group GPD0 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPD0CON[3] ,GPD0 Pin 3 Configuration" "Input,Output,TOUT_3,I2C_7_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT6[3]"
|
|
bitfld.long 0x00 8.--11. " GPD0CON[2] ,GPD0 Pin 2 Configuration" "Input,Output,TOUT_2,I2C_7_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT6[2]"
|
|
bitfld.long 0x00 4.--7. " GPD0CON[1] ,GPD0 Pin 1 Configuration" "Input,Output,TOUT_1,LCD_PWM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT6[1]"
|
|
bitfld.long 0x00 0.--3. " GPD0CON[0] ,GPD0 Pin 0 Configuration" "Input,Output,TOUT_0,LCD_FRM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT6[0]"
|
|
group.byte 0x0A4++0x00
|
|
line.byte 0x00 "GPD0DAT,Port Group GPD0 Data Register"
|
|
bitfld.byte 0x00 3. " GPD0DAT[3] ,GPD0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPD0DAT[2] ,GPD0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPD0DAT[1] ,GPD0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPD0DAT[0] ,GPD0 Pin 0 Data" "Low,High"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "GPD0PUD,Port Group GPD0 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD0PUD[3] ,GPD0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD0PUD[2] ,GPD0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD0PUD[1] ,GPD0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD0PUD[0] ,GPD0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "GPD0DRV,Port Group GPD0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPD0DRV[3] ,GPD0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPD0DRV[2] ,GPD0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPD0DRV[1] ,GPD0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPD0DRV[0] ,GPD0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0B0++0x01
|
|
line.word 0x00 "GPD0CONPDN,Port Group GPD0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPD0[3] ,GPD0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPD0[2] ,GPD0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPD0[1] ,GPD0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPD0[0] ,GPD0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0B4++0x01
|
|
line.word 0x00 "GPD0PUDPDN,Port Group GPD0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD0[3] ,GPD0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD0[2] ,GPD0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD0[1] ,GPD0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD0[0] ,GPD0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPD1"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPD1CON,Port Group GPD1 Configuration Register"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
bitfld.long 0x00 12.--15. " GPD1CON[3] ,GPD1 Pin 3 Configuration" "Input,Output,I2C_1_SCL,MIPI1_ESC_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[3]"
|
|
bitfld.long 0x00 8.--11. " GPD1CON[2] ,GPD1 Pin 2 Configuration" "Input,Output,I2C_1_SDA,MIPI1_BYTE_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[2]"
|
|
bitfld.long 0x00 4.--7. " GPD1CON[1] ,GPD1 Pin 1 Configuration" "Input,Output,I2C_0_SCL,MIPI0_ESC_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[1]"
|
|
bitfld.long 0x00 0.--3. " GPD1CON[0] ,GPD1 Pin 0 Configuration" "Input,Output,I2C_0_SDA,MIPI0_BYTE_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[0]"
|
|
elif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 12.--15. " GPD1CON[3] ,GPD1 Pin 3 Configuration" "Input,Output,I2C_1_SCL,MIPI_2L_ESC_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[3]"
|
|
bitfld.long 0x00 8.--11. " GPD1CON[2] ,GPD1 Pin 2 Configuration" "Input,Output,I2C_1_SDA,MIPI_2L_BYTE_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[2]"
|
|
bitfld.long 0x00 4.--7. " GPD1CON[1] ,GPD1 Pin 1 Configuration" "Input,Output,I2C_0_SCL,MIPI_ESC_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[1]"
|
|
bitfld.long 0x00 0.--3. " GPD1CON[0] ,GPD1 Pin 0 Configuration" "Input,Output,I2C_0_SDA,MIPI_BYTE_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT7[0]"
|
|
endif
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPD1DAT,Port Group GPD1 Data Register"
|
|
bitfld.byte 0x00 3. " GPD1DAT[3] ,GPD1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPD1DAT[2] ,GPD1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPD1DAT[1] ,GPD1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPD1DAT[0] ,GPD1 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPD1PUD,Port Group GPD1 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD1PUD[3] ,GPD1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD1PUD[2] ,GPD1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD1PUD[1] ,GPD1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD1PUD[0] ,GPD1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPD1DRV,Port Group GPD1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPD1DRV[3] ,GPD1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPD1DRV[2] ,GPD1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPD1DRV[1] ,GPD1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPD1DRV[0] ,GPD1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPD1CONPDN,Port Group GPD1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPD1[3] ,GPD1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPD1[2] ,GPD1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPD1[1] ,GPD1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPD1[0] ,GPD1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPD1PUDPDN,Port Group GPD1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPD1[3] ,GPD1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPD1[2] ,GPD1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPD1[1] ,GPD1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPD1[0] ,GPD1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
sif (cpu()=="Exynos4210")
|
|
tree "GPE0"
|
|
group.long 0x0E0++0x03
|
|
line.long 0x00 "GPE0CON,Port Group GPE0 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPE0CON[4] ,GPE0 Pin 4 Configuration" "Input,Output,MDM_ADVN,CAM_B_CLKOUT,TS_ERROR,LCD_B_VDEN,TraceData[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[4]"
|
|
bitfld.long 0x00 12.--15. " GPE0CON[3] ,GPE0 Pin 3 Configuration" "Input,Output,MDM_IRQn,CAM_B_FIELD,TS_DATA,LCD_B_VSYNC,TraceData[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[3]"
|
|
bitfld.long 0x00 8.--11. " GPE0CON[2] ,GPE0 Pin 2 Configuration" "Input,Output,MDM_Rn,CAM_B_HREF,TS_VAL,LCD_B_HSYNC,TraceCtl,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPE0CON[1] ,GPE0 Pin 1 Configuration" "Input,Output,MDM_CSn,CAM_B_VSYNC,TS_SYNC,LCD_B_FRM,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[1]"
|
|
bitfld.long 0x00 0.--3. " GPE0CON[0] ,GPE0 Pin 0 Configuration" "Input,Output,MDM_WEn,CAM_B_PCLK,TS_CLK,LCD_B_VCLK,TraceClk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[0]"
|
|
group.byte 0x0E4++0x00
|
|
line.byte 0x00 "GPE0DAT,Port Group GPE0 Data Register"
|
|
bitfld.byte 0x00 4. " GPE0DAT[4] ,GPE0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPE0DAT[3] ,GPE0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPE0DAT[2] ,GPE0 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPE0DAT[1] ,GPE0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE0DAT[0] ,GPE0 Pin 0 Data" "Low,High"
|
|
group.word 0x0E8++0x01
|
|
line.word 0x00 "GPE0PUD,Port Group GPE0 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPE0PUD[4] ,GPE0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPE0PUD[3] ,GPE0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE0PUD[2] ,GPE0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPE0PUD[1] ,GPE0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE0PUD[0] ,GPE0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0EC++0x02
|
|
line.tbyte 0x00 "GPE0DRV,Port Group GPE0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPE0DRV[4] ,GPE0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPE0DRV[3] ,GPE0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPE0DRV[2] ,GPE0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPE0DRV[1] ,GPE0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE0DRV[0] ,GPE0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0F0++0x01
|
|
line.word 0x00 "GPE0CONPDN,Port Group GPE0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPE0[4] ,GPE0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPE0[3] ,GPE0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPE0[2] ,GPE0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPE0[1] ,GPE0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE0[0] ,GPE0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0F4++0x01
|
|
line.word 0x00 "GPE0PUDPDN,Port Group GPE0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPE0[4] ,GPE0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPE0[3] ,GPE0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE0[2] ,GPE0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPE0[1] ,GPE0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE0[0] ,GPE0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPE1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GPE1CON,Port Group GPE1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPE1CON[7] ,GPE1 Pin 7 Configuration" "Input,Output,MDM_ADDR[7],CAM_B_DATA[7],Reserved,LCD_B_VD[7],TraceData[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[7]"
|
|
bitfld.long 0x00 24.--27. " GPE1CON[6] ,GPE1 Pin 6 Configuration" "Input,Output,MDM_ADDR[6],CAM_B_DATA[6],Reserved,LCD_B_VD[6],TraceData[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[6]"
|
|
bitfld.long 0x00 20.--23. " GPE1CON[5] ,GPE1 Pin 5 Configuration" "Input,Output,MDM_ADDR[5],CAM_B_DATA[5],Reserved,LCD_B_VD[5],TraceData[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[5]"
|
|
bitfld.long 0x00 16.--19. " GPE1CON[4] ,GPE1 Pin 4 Configuration" "Input,Output,MDM_ADDR[4],CAM_B_DATA[4],Reserved,LCD_B_VD[4],TraceData[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPE1CON[3] ,GPE1 Pin 3 Configuration" "Input,Output,MDM_ADDR[3],CAM_B_DATA[3],Reserved,LCD_B_VD[3],TraceData[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[3]"
|
|
bitfld.long 0x00 8.--11. " GPE1CON[2] ,GPE1 Pin 2 Configuration" "Input,Output,MDM_ADDR[2],CAM_B_DATA[2],Reserved,LCD_B_VD[2],TraceData[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[2]"
|
|
bitfld.long 0x00 4.--7. " GPE1CON[1] ,GPE1 Pin 1 Configuration" "Input,Output,MDM_ADDR[1],CAM_B_DATA[1],Reserved,LCD_B_VD[1],TraceData[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[1]"
|
|
bitfld.long 0x00 0.--3. " GPE1CON[0] ,GPE1 Pin 0 Configuration" "Input,Output,MDM_ADDR[0],CAM_B_DATA[0],Reserved,LCD_B_VD[0],TraceData[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[0]"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "GPE1DAT,Port Group GPE1 Data Register"
|
|
bitfld.byte 0x00 7. " GPE1DAT[7] ,GPE1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPE1DAT[6] ,GPE1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPE1DAT[5] ,GPE1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPE1DAT[4] ,GPE1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPE1DAT[3] ,GPE1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPE1DAT[2] ,GPE1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPE1DAT[1] ,GPE1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE1DAT[0] ,GPE1 Pin 0 Data" "Low,High"
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "GPE1PUD,Port Group GPE1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE1PUD[7] ,GPE1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE1PUD[6] ,GPE1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE1PUD[5] ,GPE1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE1PUD[4] ,GPE1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE1PUD[3] ,GPE1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE1PUD[2] ,GPE1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE1PUD[1] ,GPE1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE1PUD[0] ,GPE1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x10C++0x02
|
|
line.tbyte 0x00 "GPE1DRV,Port Group GPE1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPE1DRV[7] ,GPE1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPE1DRV[6] ,GPE1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPE1DRV[5] ,GPE1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPE1DRV[4] ,GPE1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPE1DRV[3] ,GPE1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPE1DRV[2] ,GPE1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPE1DRV[1] ,GPE1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE1DRV[0] ,GPE1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "GPE1CONPDN,Port Group GPE1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPE1[7] ,GPE1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPE1[6] ,GPE1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPE1[5] ,GPE1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPE1[4] ,GPE1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE1[3] ,GPE1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPE1[2] ,GPE1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPE1[1] ,GPE1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE1[0] ,GPE1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "GPE1PUDPDN,Port Group GPE1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE1[7] ,GPE1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE1[6] ,GPE1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE1[5] ,GPE1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE1[4] ,GPE1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE1[3] ,GPE1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE1[2] ,GPE1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE1[1] ,GPE1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE1[0] ,GPE1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPE2"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GPE2CON,Port Group GPE2 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPE2CON[5] ,GPE2 Pin 5 Configuration" "Input,Output,MDM_ADDR[13],Reserved,Reserved,LCD_B_VD[13],TraceData[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[5]"
|
|
bitfld.long 0x00 16.--19. " GPE2CON[4] ,GPE2 Pin 4 Configuration" "Input,Output,MDM_ADDR[12],Reserved,Reserved,LCD_B_VD[12],TraceData[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[4]"
|
|
bitfld.long 0x00 12.--15. " GPE2CON[3] ,GPE2 Pin 3 Configuration" "Input,Output,MDM_ADDR[11],Reserved,Reserved,LCD_B_VD[11],TraceData[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPE2CON[2] ,GPE2 Pin 2 Configuration" "Input,Output,MDM_ADDR[10],Reserved,Reserved,LCD_B_VD[10],TraceData[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[2]"
|
|
bitfld.long 0x00 4.--7. " GPE2CON[1] ,GPE2 Pin 1 Configuration" "Input,Output,MDM_ADDR[9],Reserved,Reserved,LCD_B_VD[9],TraceData[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[1]"
|
|
bitfld.long 0x00 0.--3. " GPE2CON[0] ,GPE2 Pin 0 Configuration" "Input,Output,MDM_ADDR[8],Reserved,Reserved,LCD_B_VD[8],TraceData[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[0]"
|
|
group.byte 0x124++0x00
|
|
line.byte 0x00 "GPE2DAT,Port Group GPE2 Data Register"
|
|
bitfld.byte 0x00 5. " GPE2DAT[5] ,GPE2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPE2DAT[4] ,GPE2 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPE2DAT[3] ,GPE2 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPE2DAT[2] ,GPE2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPE2DAT[1] ,GPE2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE2DAT[0] ,GPE2 Pin 0 Data" "Low,High"
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "GPE2PUD,Port Group GPE2 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPE2PUD[5] ,GPE2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE2PUD[4] ,GPE2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPE2PUD[3] ,GPE2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPE2PUD[2] ,GPE2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE2PUD[1] ,GPE2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE2PUD[0] ,GPE2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x12C++0x02
|
|
line.tbyte 0x00 "GPE2DRV,Port Group GPE2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPE2DRV[5] ,GPE2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPE2DRV[4] ,GPE2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPE2DRV[3] ,GPE2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPE2DRV[2] ,GPE2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPE2DRV[1] ,GPE2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE2DRV[0] ,GPE2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "GPE2CONPDN,Port Group GPE2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPE2[5] ,GPE2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPE2[4] ,GPE2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPE2[3] ,GPE2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPE2[2] ,GPE2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPE2[1] ,GPE2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE2[0] ,GPE2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "GPE2PUDPDN,Port Group GPE2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPE2[5] ,GPE2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE2[4] ,GPE2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPE2[3] ,GPE2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPE2[2] ,GPE2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE2[1] ,GPE2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE2[0] ,GPE2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPE3"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "GPE3CON,Port Group GPE3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPE3CON[7] ,GPE3 Pin 7 Configuration" "Input,Output,MDM_DATA[7],Reserved,Reserved,LCD_B_VD[21],TraceData[23],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[7]"
|
|
bitfld.long 0x00 24.--27. " GPE3CON[6] ,GPE3 Pin 6 Configuration" "Input,Output,MDM_DATA[7],Reserved,Reserved,LCD_B_VD[20],TraceData[22],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[6]"
|
|
bitfld.long 0x00 20.--23. " GPE3CON[5] ,GPE3 Pin 5 Configuration" "Input,Output,MDM_DATA[5],Reserved,Reserved,LCD_B_VD[19],TraceData[21],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[5]"
|
|
bitfld.long 0x00 16.--19. " GPE3CON[4] ,GPE3 Pin 4 Configuration" "Input,Output,MDM_DATA[4],Reserved,Reserved,LCD_B_VD[18],TraceData[20],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPE3CON[3] ,GPE3 Pin 3 Configuration" "Input,Output,MDM_DATA[3],Reserved,Reserved,LCD_B_VD[17],TraceData[19],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[3]"
|
|
bitfld.long 0x00 8.--11. " GPE3CON[2] ,GPE3 Pin 2 Configuration" "Input,Output,MDM_DATA[2],Reserved,Reserved,LCD_B_VD[16],TraceData[18],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[2]"
|
|
bitfld.long 0x00 4.--7. " GPE3CON[1] ,GPE3 Pin 1 Configuration" "Input,Output,MDM_DATA[1],Reserved,Reserved,LCD_B_VD[15],TraceData[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[1]"
|
|
bitfld.long 0x00 0.--3. " GPE3CON[0] ,GPE3 Pin 0 Configuration" "Input,Output,MDM_DATA[0],Reserved,Reserved,LCD_B_VD[14],TraceData[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[0]"
|
|
group.byte 0x144++0x00
|
|
line.byte 0x00 "GPE3DAT,Port Group GPE3 Data Register"
|
|
bitfld.byte 0x00 7. " GPE3DAT[7] ,GPE3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPE3DAT[6] ,GPE3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPE3DAT[5] ,GPE3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPE3DAT[4] ,GPE3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPE3DAT[3] ,GPE3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPE3DAT[2] ,GPE3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPE3DAT[1] ,GPE3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE3DAT[0] ,GPE3 Pin 0 Data" "Low,High"
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "GPE3PUD,Port Group GPE3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE3PUD[7] ,GPE3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE3PUD[6] ,GPE3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE3PUD[5] ,GPE3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE3PUD[4] ,GPE3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE3PUD[3] ,GPE3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE3PUD[2] ,GPE3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE3PUD[1] ,GPE3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE3PUD[0] ,GPE3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x14C++0x02
|
|
line.tbyte 0x00 "GPE3DRV,Port Group GPE3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPE3DRV[7] ,GPE3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPE3DRV[6] ,GPE3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPE3DRV[5] ,GPE3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPE3DRV[4] ,GPE3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPE3DRV[3] ,GPE3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPE3DRV[2] ,GPE3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPE3DRV[1] ,GPE3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE3DRV[0] ,GPE3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "GPE3CONPDN,Port Group GPE3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPE3[7] ,GPE3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPE3[6] ,GPE3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPE3[5] ,GPE3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPE3[4] ,GPE3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE3[3] ,GPE3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPE3[2] ,GPE3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPE3[1] ,GPE3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE3[0] ,GPE3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "GPE3PUDPDN,Port Group GPE3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE3[7] ,GPE3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE3[6] ,GPE3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE3[5] ,GPE3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE3[4] ,GPE3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE3[3] ,GPE3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE3[2] ,GPE3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE3[1] ,GPE3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE3[0] ,GPE3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPE4"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "GPE4CON,Port Group GPE4 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPE4CON[7] ,GPE4 Pin 7 Configuration" "Input,Output,MDM_DATA[15],Reserved,Reserved,Reserved,TraceData[31],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[7]"
|
|
bitfld.long 0x00 24.--27. " GPE4CON[6] ,GPE4 Pin 6 Configuration" "Input,Output,MDM_DATA[14],Reserved,Reserved,Reserved,TraceData[30],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[6]"
|
|
bitfld.long 0x00 20.--23. " GPE4CON[5] ,GPE4 Pin 5 Configuration" "Input,Output,MDM_DATA[13],Reserved,Reserved,Reserved,TraceData[29],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[5]"
|
|
bitfld.long 0x00 16.--19. " GPE4CON[4] ,GPE4 Pin 4 Configuration" "Input,Output,MDM_DATA[12],Reserved,Reserved,LCD_B_PWM,TraceData[28],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPE4CON[3] ,GPE4 Pin 3 Configuration" "Input,Output,MDM_DATA[11],Reserved,Reserved,SYS_OE_B,TraceData[27],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[3]"
|
|
bitfld.long 0x00 8.--11. " GPE4CON[2] ,GPE4 Pin 2 Configuration" "Input,Output,MDM_DATA[10],Reserved,Reserved,VSYNC_LDI_B,TraceData[26],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[2]"
|
|
bitfld.long 0x00 4.--7. " GPE4CON[1] ,GPE4 Pin 1 Configuration" "Input,Output,MDM_DATA[9],Reserved,Reserved,LCD_B_VD[23],TraceData[25],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[1]"
|
|
bitfld.long 0x00 0.--3. " GPE4CON[0] ,GPE4 Pin 0 Configuration" "Input,Output,MDM_DATA[8],Reserved,Reserved,LCD_B_VD[22],TraceData[24],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[0]"
|
|
group.byte 0x164++0x00
|
|
line.byte 0x00 "GPE4DAT,Port Group GPE4 Data Register"
|
|
bitfld.byte 0x00 7. " GPE4DAT[7] ,GPE4 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPE4DAT[6] ,GPE4 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPE4DAT[5] ,GPE4 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPE4DAT[4] ,GPE4 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPE4DAT[3] ,GPE4 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPE4DAT[2] ,GPE4 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPE4DAT[1] ,GPE4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPE4DAT[0] ,GPE4 Pin 0 Data" "Low,High"
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "GPE4PUD,Port Group GPE4 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE4PUD[7] ,GPE4 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE4PUD[6] ,GPE4 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE4PUD[5] ,GPE4 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE4PUD[4] ,GPE4 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE4PUD[3] ,GPE4 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE4PUD[2] ,GPE4 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE4PUD[1] ,GPE4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE4PUD[0] ,GPE4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x16C++0x02
|
|
line.tbyte 0x00 "GPE4DRV,Port Group GPE4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPE4DRV[7] ,GPE4 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPE4DRV[6] ,GPE4 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPE4DRV[5] ,GPE4 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPE4DRV[4] ,GPE4 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPE4DRV[3] ,GPE4 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPE4DRV[2] ,GPE4 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPE4DRV[1] ,GPE4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPE4DRV[0] ,GPE4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "GPE4CONPDN,Port Group GPE4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPE4[7] ,GPE4 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPE4[6] ,GPE4 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPE4[5] ,GPE4 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPE4[4] ,GPE4 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE4[3] ,GPE4 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPE4[2] ,GPE4 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPE4[1] ,GPE4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPE4[0] ,GPE4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "GPE4PUDPDN,Port Group GPE4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPE4[7] ,GPE4 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPE4[6] ,GPE4 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPE4[5] ,GPE4 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPE4[4] ,GPE4 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPE4[3] ,GPE4 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPE4[2] ,GPE4 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPE4[1] ,GPE4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPE4[0] ,GPE4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
endif
|
|
tree "GPF0"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "GPF0CON,Port Group GPF0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPF0CON[7] ,GPF0 Pin 7 Configuration" "Input,Output,LCD_VD[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[7]"
|
|
bitfld.long 0x00 24.--27. " GPF0CON[6] ,GPF0 Pin 6 Configuration" "Input,Output,LCD_VD[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[6]"
|
|
bitfld.long 0x00 20.--23. " GPF0CON[5] ,GPF0 Pin 5 Configuration" "Input,Output,LCD_VD[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[5]"
|
|
bitfld.long 0x00 16.--19. " GPF0CON[4] ,GPF0 Pin 4 Configuration" "Input,Output,LCD_VD[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPF0CON[3] ,GPF0 Pin 3 Configuration" "Input,Output,LCD_VCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[3]"
|
|
bitfld.long 0x00 8.--11. " GPF0CON[2] ,GPF0 Pin 2 Configuration" "Input,Output,LCD_VDEN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[2]"
|
|
bitfld.long 0x00 4.--7. " GPF0CON[1] ,GPF0 Pin 1 Configuration" "Input,Output,LCD_VSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[1]"
|
|
bitfld.long 0x00 0.--3. " GPF0CON[0] ,GPF0 Pin 0 Configuration" "Input,Output,LCD_HSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT13[0]"
|
|
group.byte 0x184++0x00
|
|
line.byte 0x00 "GPF0DAT,Port Group GPF0 Data Register"
|
|
bitfld.byte 0x00 7. " GPF0DAT[7] ,GPF0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPF0DAT[6] ,GPF0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPF0DAT[5] ,GPF0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPF0DAT[4] ,GPF0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPF0DAT[3] ,GPF0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPF0DAT[2] ,GPF0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF0DAT[1] ,GPF0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF0DAT[0] ,GPF0 Pin 0 Data" "Low,High"
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "GPF0PUD,Port Group GPF0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF0PUD[7] ,GPF0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF0PUD[6] ,GPF0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF0PUD[5] ,GPF0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF0PUD[4] ,GPF0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF0PUD[3] ,GPF0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF0PUD[2] ,GPF0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF0PUD[1] ,GPF0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF0PUD[0] ,GPF0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x18C++0x02
|
|
line.tbyte 0x00 "GPF0DRV,Port Group GPF0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPF0DRV[7] ,GPF0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPF0DRV[6] ,GPF0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPF0DRV[5] ,GPF0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPF0DRV[4] ,GPF0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPF0DRV[3] ,GPF0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPF0DRV[2] ,GPF0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF0DRV[1] ,GPF0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF0DRV[0] ,GPF0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "GPF0CONPDN,Port Group GPF0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPF0[7] ,GPF0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPF0[6] ,GPF0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPF0[5] ,GPF0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPF0[4] ,GPF0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF0[3] ,GPF0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPF0[2] ,GPF0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF0[1] ,GPF0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF0[0] ,GPF0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "GPF0PUDPDN,Port Group GPF0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF0[7] ,GPF0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF0[6] ,GPF0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF0[5] ,GPF0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF0[4] ,GPF0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF0[3] ,GPF0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF0[2] ,GPF0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF0[1] ,GPF0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF0[0] ,GPF0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPF1"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "GPF1CON,Port Group GPF1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPF1CON[7] ,GPF1 Pin 7 Configuration" "Input,Output,LCD_VD[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[7]"
|
|
bitfld.long 0x00 24.--27. " GPF1CON[6] ,GPF1 Pin 6 Configuration" "Input,Output,LCD_VD[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[6]"
|
|
bitfld.long 0x00 20.--23. " GPF1CON[5] ,GPF1 Pin 5 Configuration" "Input,Output,LCD_VD[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[5]"
|
|
bitfld.long 0x00 16.--19. " GPF1CON[4] ,GPF1 Pin 4 Configuration" "Input,Output,LCD_VD[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPF1CON[3] ,GPF1 Pin 3 Configuration" "Input,Output,LCD_VD[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[3]"
|
|
bitfld.long 0x00 8.--11. " GPF1CON[2] ,GPF1 Pin 2 Configuration" "Input,Output,LCD_VD[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[2]"
|
|
bitfld.long 0x00 4.--7. " GPF1CON[1] ,GPF1 Pin 1 Configuration" "Input,Output,LCD_VD[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[1]"
|
|
bitfld.long 0x00 0.--3. " GPF1CON[0] ,GPF1 Pin 0 Configuration" "Input,Output,LCD_VD[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT14[0]"
|
|
group.byte 0x1A4++0x00
|
|
line.byte 0x00 "GPF1DAT,Port Group GPF1 Data Register"
|
|
bitfld.byte 0x00 7. " GPF1DAT[7] ,GPF1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPF1DAT[6] ,GPF1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPF1DAT[5] ,GPF1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPF1DAT[4] ,GPF1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPF1DAT[3] ,GPF1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPF1DAT[2] ,GPF1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF1DAT[1] ,GPF1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF1DAT[0] ,GPF1 Pin 0 Data" "Low,High"
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "GPF1PUD,Port Group GPF1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF1PUD[7] ,GPF1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF1PUD[6] ,GPF1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF1PUD[5] ,GPF1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF1PUD[4] ,GPF1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF1PUD[3] ,GPF1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF1PUD[2] ,GPF1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF1PUD[1] ,GPF1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF1PUD[0] ,GPF1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1AC++0x02
|
|
line.tbyte 0x00 "GPF1DRV,Port Group GPF1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPF1DRV[7] ,GPF1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPF1DRV[6] ,GPF1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPF1DRV[5] ,GPF1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPF1DRV[4] ,GPF1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPF1DRV[3] ,GPF1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPF1DRV[2] ,GPF1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF1DRV[1] ,GPF1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF1DRV[0] ,GPF1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "GPF1CONPDN,Port Group GPF1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPF1[7] ,GPF1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPF1[6] ,GPF1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPF1[5] ,GPF1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPF1[4] ,GPF1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF1[3] ,GPF1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPF1[2] ,GPF1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF1[1] ,GPF1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF1[0] ,GPF1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "GPF1PUDPDN,Port Group GPF1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF1[7] ,GPF1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF1[6] ,GPF1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF1[5] ,GPF1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF1[4] ,GPF1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF1[3] ,GPF1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF1[2] ,GPF1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF1[1] ,GPF1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF1[0] ,GPF1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPF2"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "GPF2CON,Port Group GPF2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPF2CON[7] ,GPF2 Pin 7 Configuration" "Input,Output,LCD_VD[19],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[7]"
|
|
bitfld.long 0x00 24.--27. " GPF2CON[6] ,GPF2 Pin 6 Configuration" "Input,Output,LCD_VD[18],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[6]"
|
|
bitfld.long 0x00 20.--23. " GPF2CON[5] ,GPF2 Pin 5 Configuration" "Input,Output,LCD_VD[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[5]"
|
|
bitfld.long 0x00 16.--19. " GPF2CON[4] ,GPF2 Pin 4 Configuration" "Input,Output,LCD_VD[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPF2CON[3] ,GPF2 Pin 3 Configuration" "Input,Output,LCD_VD[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[3]"
|
|
bitfld.long 0x00 8.--11. " GPF2CON[2] ,GPF2 Pin 2 Configuration" "Input,Output,LCD_VD[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[2]"
|
|
bitfld.long 0x00 4.--7. " GPF2CON[1] ,GPF2 Pin 1 Configuration" "Input,Output,LCD_VD[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[1]"
|
|
bitfld.long 0x00 0.--3. " GPF2CON[0] ,GPF2 Pin 0 Configuration" "Input,Output,LCD_VD[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT15[0]"
|
|
group.byte 0x1C4++0x00
|
|
line.byte 0x00 "GPF2DAT,Port Group GPF2 Data Register"
|
|
bitfld.byte 0x00 7. " GPF2DAT[7] ,GPF2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPF2DAT[6] ,GPF2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPF2DAT[5] ,GPF2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPF2DAT[4] ,GPF2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPF2DAT[3] ,GPF2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPF2DAT[2] ,GPF2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF2DAT[1] ,GPF2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF2DAT[0] ,GPF2 Pin 0 Data" "Low,High"
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "GPF2PUD,Port Group GPF2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF2PUD[7] ,GPF2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF2PUD[6] ,GPF2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF2PUD[5] ,GPF2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF2PUD[4] ,GPF2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF2PUD[3] ,GPF2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF2PUD[2] ,GPF2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF2PUD[1] ,GPF2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF2PUD[0] ,GPF2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1CC++0x02
|
|
line.tbyte 0x00 "GPF2DRV,Port Group GPF2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPF2DRV[7] ,GPF2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPF2DRV[6] ,GPF2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPF2DRV[5] ,GPF2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPF2DRV[4] ,GPF2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPF2DRV[3] ,GPF2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPF2DRV[2] ,GPF2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF2DRV[1] ,GPF2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF2DRV[0] ,GPF2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "GPF2CONPDN,Port Group GPF2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPF2[7] ,GPF2 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPF2[6] ,GPF2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPF2[5] ,GPF2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPF2[4] ,GPF2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF2[3] ,GPF2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPF2[2] ,GPF2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF2[1] ,GPF2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF2[0] ,GPF2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "GPF2PUDPDN,Port Group GPF2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPF2[7] ,GPF2 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPF2[6] ,GPF2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPF2[5] ,GPF2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF2[4] ,GPF2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPF2[3] ,GPF2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPF2[2] ,GPF2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF2[1] ,GPF2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF2[0] ,GPF2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPF3"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "GPF3CON,Port Group GPF3 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPF3CON[5] ,GPF3 Pin 5 Configuration" "Input,Output,SYS_OE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[5]"
|
|
bitfld.long 0x00 16.--19. " GPF3CON[4] ,GPF3 Pin 4 Configuration" "Input,Output,VSYNC_LDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[4]"
|
|
bitfld.long 0x00 12.--15. " GPF3CON[3] ,GPF3 Pin 3 Configuration" "Input,Output,LCD_VD[23],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPF3CON[2] ,GPF3 Pin 2 Configuration" "Input,Output,LCD_VD[22],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[2]"
|
|
bitfld.long 0x00 4.--7. " GPF3CON[1] ,GPF3 Pin 1 Configuration" "Input,Output,LCD_VD[21],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[1]"
|
|
bitfld.long 0x00 0.--3. " GPF3CON[0] ,GPF3 Pin 0 Configuration" "Input,Output,LCD_VD[20],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT16[0]"
|
|
group.byte 0x1E4++0x00
|
|
line.byte 0x00 "GPF3DAT,Port Group GPF3 Data Register"
|
|
bitfld.byte 0x00 5. " GPF3DAT[5] ,GPF3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPF3DAT[4] ,GPF3 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPF3DAT[3] ,GPF3 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPF3DAT[2] ,GPF3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPF3DAT[1] ,GPF3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPF3DAT[0] ,GPF3 Pin 0 Data" "Low,High"
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "GPF3PUD,Port Group GPF3 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPF3PUD[5] ,GPF3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF3PUD[4] ,GPF3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPF3PUD[3] ,GPF3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPF3PUD[2] ,GPF3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF3PUD[1] ,GPF3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF3PUD[0] ,GPF3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1EC++0x02
|
|
line.tbyte 0x00 "GPF3DRV,Port Group GPF3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPF3DRV[5] ,GPF3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPF3DRV[4] ,GPF3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPF3DRV[3] ,GPF3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPF3DRV[2] ,GPF3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPF3DRV[1] ,GPF3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPF3DRV[0] ,GPF3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "GPF3CONPDN,Port Group GPF3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPF3[5] ,GPF3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPF3[4] ,GPF3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPF3[3] ,GPF3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPF3[2] ,GPF3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPF3[1] ,GPF3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPF3[0] ,GPF3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "GPF3PUDPDN,Port Group GPF3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPF3[5] ,GPF3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPF3[4] ,GPF3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPF3[3] ,GPF3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPF3[2] ,GPF3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPF3[1] ,GPF3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPF3[0] ,GPF3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
sif (cpu()=="Exynos4210")
|
|
tree "ETC0"
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "ETC0PUD,Port group ETC0 pull-up/down register"
|
|
bitfld.word 0x00 10.--11. " ETC0PUD[5] ,ETC0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " ETC0PUD[4] ,ETC0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " ETC0PUD[3] ,ETC0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " ETC0PUD[2] ,ETC0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " ETC0PUD[1] ,ETC0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC0PUD[0] ,ETC0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x20C++0x02
|
|
line.tbyte 0x00 "ETC0DRV,Port group ETC0 drive strength control register"
|
|
bitfld.tbyte 0x00 10.--11. " ETC0DRV[5] ,ETC0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " ETC0DRV[4] ,ETC0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " ETC0DRV[3] ,ETC0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " ETC0DRV[2] ,ETC0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " ETC0DRV[1] ,ETC0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC0DRV[0] ,ETC0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
endif
|
|
tree "ETC1"
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "ETC1PUD,Port group ETC1 pull-up/down register"
|
|
bitfld.word 0x00 2.--3. " ETC1PUD[1] ,ETC1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC1PUD[0] ,ETC1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x22C++0x02
|
|
line.tbyte 0x00 "ETC1DRV,Port group ETC1 drive strength control register"
|
|
bitfld.tbyte 0x00 2.--3. " ETC1DRV[1] ,ETC1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC1DRV[0] ,ETC1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
tree "GPJ0"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "GPJ0CON,Port Group GPJ0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPJ0CON[7] ,GPJ0 Pin 7 Configuration" "Input,Output,CAM_A_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[7]"
|
|
bitfld.long 0x00 24.--27. " GPJ0CON[6] ,GPJ0 Pin 6 Configuration" "Input,Output,CAM_A_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[6]"
|
|
bitfld.long 0x00 20.--23. " GPJ0CON[5] ,GPJ0 Pin 5 Configuration" "Input,Output,CAM_A_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[5]"
|
|
bitfld.long 0x00 16.--19. " GPJ0CON[4] ,GPJ0 Pin 4 Configuration" "Input,Output,CAM_A_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPJ0CON[3] ,GPJ0 Pin 3 Configuration" "Input,Output,CAM_A_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[3]"
|
|
bitfld.long 0x00 8.--11. " GPJ0CON[2] ,GPJ0 Pin 2 Configuration" "Input,Output,CAM_A_HREF,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[2]"
|
|
bitfld.long 0x00 4.--7. " GPJ0CON[1] ,GPJ0 Pin 1 Configuration" "Input,Output,CAM_A_VSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[1]"
|
|
bitfld.long 0x00 0.--3. " GPJ0CON[0] ,GPJ0 Pin 0 Configuration" "Input,Output,CAM_A_PCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[0]"
|
|
group.byte 0x244++0x00
|
|
line.byte 0x00 "GPJ0DAT,Port Group GPJ0 Data Register"
|
|
bitfld.byte 0x00 7. " GPJ0DAT[7] ,GPJ0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPJ0DAT[6] ,GPJ0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPJ0DAT[5] ,GPJ0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPJ0DAT[4] ,GPJ0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPJ0DAT[3] ,GPJ0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPJ0DAT[2] ,GPJ0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPJ0DAT[1] ,GPJ0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPJ0DAT[0] ,GPJ0 Pin 0 Data" "Low,High"
|
|
group.word 0x248++0x01
|
|
line.word 0x00 "GPJ0PUD,Port Group GPJ0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0PUD[7] ,GPJ0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPJ0PUD[6] ,GPJ0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPJ0PUD[5] ,GPJ0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPJ0PUD[4] ,GPJ0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0PUD[3] ,GPJ0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ0PUD[2] ,GPJ0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPJ0PUD[1] ,GPJ0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ0PUD[0] ,GPJ0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x24C++0x02
|
|
line.tbyte 0x00 "GPJ0DRV,Port Group GPJ0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPJ0DRV[7] ,GPJ0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPJ0DRV[6] ,GPJ0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPJ0DRV[5] ,GPJ0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPJ0DRV[4] ,GPJ0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPJ0DRV[3] ,GPJ0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPJ0DRV[2] ,GPJ0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPJ0DRV[1] ,GPJ0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPJ0DRV[0] ,GPJ0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x250++0x01
|
|
line.word 0x00 "GPJ0CONPDN,Port Group GPJ0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0[7] ,GPJ0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPJ0[6] ,GPJ0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPJ0[5] ,GPJ0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPJ0[4] ,GPJ0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0[3] ,GPJ0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPJ0[2] ,GPJ0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPJ0[1] ,GPJ0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPJ0[0] ,GPJ0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x254++0x01
|
|
line.word 0x00 "GPJ0PUDPDN,Port Group GPJ0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0[7] ,GPJ0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPJ0[6] ,GPJ0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPJ0[5] ,GPJ0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPJ0[4] ,GPJ0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0[3] ,GPJ0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ0[2] ,GPJ0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPJ0[1] ,GPJ0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ0[0] ,GPJ0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPJ1"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "GPJ1CON,Port Group GPJ1 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPJ1CON[4] ,GPJ1 Pin 4 Configuration" "Input,Output,CAM_A_FIELD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[4]"
|
|
bitfld.long 0x00 12.--15. " GPJ1CON[3] ,GPJ1 Pin 3 Configuration" "Input,Output,CAM_A_CLKOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[3]"
|
|
bitfld.long 0x00 8.--11. " GPJ1CON[2] ,GPJ1 Pin 2 Configuration" "Input,Output,CAM_A_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPJ1CON[1] ,GPJ1 Pin 1 Configuration" "Input,Output,CAM_A_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[1]"
|
|
bitfld.long 0x00 0.--3. " GPJ1CON[0] ,GPJ1 Pin 0 Configuration" "Input,Output,CAM_A_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[0]"
|
|
group.byte 0x264++0x00
|
|
line.byte 0x00 "GPJ1DAT,Port Group GPJ1 Data Register"
|
|
bitfld.byte 0x00 4. " GPJ1DAT[4] ,GPJ1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPJ1DAT[3] ,GPJ1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPJ1DAT[2] ,GPJ1 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPJ1DAT[1] ,GPJ1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPJ1DAT[0] ,GPJ1 Pin 0 Data" "Low,High"
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "GPJ1PUD,Port Group GPJ1 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1PUD[4] ,GPJ1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPJ1PUD[3] ,GPJ1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ1PUD[2] ,GPJ1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1PUD[1] ,GPJ1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ1PUD[0] ,GPJ1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x26C++0x02
|
|
line.tbyte 0x00 "GPJ1DRV,Port Group GPJ1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPJ1DRV[4] ,GPJ1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPJ1DRV[3] ,GPJ1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPJ1DRV[2] ,GPJ1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPJ1DRV[1] ,GPJ1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPJ1DRV[0] ,GPJ1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "GPJ1CONPDN,Port Group GPJ1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1[4] ,GPJ1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPJ1[3] ,GPJ1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPJ1[2] ,GPJ1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1[1] ,GPJ1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPJ1[0] ,GPJ1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "GPJ1PUDPDN,Port Group GPJ1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1[4] ,GPJ1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPJ1[3] ,GPJ1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ1[2] ,GPJ1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1[1] ,GPJ1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ1[0] ,GPJ1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
endif
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++63.
|
|
line.long 0x00 "EXT_INT1_CON,External interrupt EXT_INT1 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT1_CON[7] ,Setting the signaling method of EXT_INT1[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT1_CON[6] ,Setting the signaling method of EXT_INT1[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT1_CON[5] ,Setting the signaling method of EXT_INT1[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT1_CON[4] ,Setting the signaling method of EXT_INT1[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT1_CON[3] ,Setting the signaling method of EXT_INT1[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT1_CON[2] ,Setting the signaling method of EXT_INT1[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT1_CON[1] ,Setting the signaling method of EXT_INT1[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT1_CON[0] ,Setting the signaling method of EXT_INT1[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x04 "EXT_INT2_CON,External interrupt EXT_INT2 configuration register"
|
|
bitfld.long 0x04 20.--22. " EXT_INT2_CON[5] ,Setting the signaling method of EXT_INT2[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 16.--18. " EXT_INT2_CON[4] ,Setting the signaling method of EXT_INT2[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 12.--14. " EXT_INT2_CON[3] ,Setting the signaling method of EXT_INT2[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--10. " EXT_INT2_CON[2] ,Setting the signaling method of EXT_INT2[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 4.--6. " EXT_INT2_CON[1] ,Setting the signaling method of EXT_INT2[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 0.--2. " EXT_INT2_CON[0] ,Setting the signaling method of EXT_INT2[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x08 "EXT_INT3_CON,External interrupt EXT_INT3 configuration register"
|
|
bitfld.long 0x08 28.--30. " EXT_INT3_CON[7] ,Setting the signaling method of EXT_INT3[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 24.--26. " EXT_INT3_CON[6] ,Setting the signaling method of EXT_INT3[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 20.--22. " EXT_INT3_CON[5] ,Setting the signaling method of EXT_INT3[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " EXT_INT3_CON[4] ,Setting the signaling method of EXT_INT3[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 12.--14. " EXT_INT3_CON[3] ,Setting the signaling method of EXT_INT3[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 8.--10. " EXT_INT3_CON[2] ,Setting the signaling method of EXT_INT3[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " EXT_INT3_CON[1] ,Setting the signaling method of EXT_INT3[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 0.--2. " EXT_INT3_CON[0] ,Setting the signaling method of EXT_INT3[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x0C "EXT_INT4_CON,External interrupt EXT_INT4 configuration register"
|
|
bitfld.long 0x0C 16.--18. " EXT_INT4_CON[4] ,Setting the signaling method of EXT_INT4[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 12.--14. " EXT_INT4_CON[3] ,Setting the signaling method of EXT_INT4[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 8.--10. " EXT_INT4_CON[2] ,Setting the signaling method of EXT_INT4[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 4.--6. " EXT_INT4_CON[1] ,Setting the signaling method of EXT_INT4[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 0.--2. " EXT_INT4_CON[0] ,Setting the signaling method of EXT_INT4[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x10 "EXT_INT5_CON,External interrupt EXT_INT5 configuration register"
|
|
bitfld.long 0x10 16.--18. " EXT_INT5_CON[4] ,Setting the signaling method of EXT_INT5[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 12.--14. " EXT_INT5_CON[3] ,Setting the signaling method of EXT_INT5[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 8.--10. " EXT_INT5_CON[2] ,Setting the signaling method of EXT_INT5[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " EXT_INT5_CON[1] ,Setting the signaling method of EXT_INT5[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 0.--2. " EXT_INT5_CON[0] ,Setting the signaling method of EXT_INT5[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x14 "EXT_INT6_CON,External interrupt EXT_INT6 configuration register"
|
|
bitfld.long 0x14 12.--14. " EXT_INT6_CON[3] ,Setting the signaling method of EXT_INT6[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 8.--10. " EXT_INT6_CON[2] ,Setting the signaling method of EXT_INT6[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 4.--6. " EXT_INT6_CON[1] ,Setting the signaling method of EXT_INT6[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x14 0.--2. " EXT_INT6_CON[0] ,Setting the signaling method of EXT_INT6[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x18 "EXT_INT7_CON,External interrupt EXT_INT7 configuration register"
|
|
bitfld.long 0x18 12.--14. " EXT_INT7_CON[3] ,Setting the signaling method of EXT_INT7[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 8.--10. " EXT_INT7_CON[2] ,Setting the signaling method of EXT_INT7[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 4.--6. " EXT_INT7_CON[1] ,Setting the signaling method of EXT_INT7[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x18 0.--2. " EXT_INT7_CON[0] ,Setting the signaling method of EXT_INT7[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x1C "EXT_INT8_CON,External interrupt EXT_INT8 configuration register"
|
|
bitfld.long 0x1C 16.--18. " EXT_INT8_CON[4] ,Setting the signaling method of EXT_INT8[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 12.--14. " EXT_INT8_CON[3] ,Setting the signaling method of EXT_INT8[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 8.--10. " EXT_INT8_CON[2] ,Setting the signaling method of EXT_INT8[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x1C 4.--6. " EXT_INT8_CON[1] ,Setting the signaling method of EXT_INT8[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 0.--2. " EXT_INT8_CON[0] ,Setting the signaling method of EXT_INT8[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x20 "EXT_INT9_CON,External interrupt EXT_INT9 configuration register"
|
|
bitfld.long 0x20 28.--30. " EXT_INT9_CON[7] ,Setting the signaling method of EXT_INT9[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 24.--26. " EXT_INT9_CON[6] ,Setting the signaling method of EXT_INT9[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 20.--22. " EXT_INT9_CON[5] ,Setting the signaling method of EXT_INT9[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 16.--18. " EXT_INT9_CON[4] ,Setting the signaling method of EXT_INT9[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 12.--14. " EXT_INT9_CON[3] ,Setting the signaling method of EXT_INT9[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 8.--10. " EXT_INT9_CON[2] ,Setting the signaling method of EXT_INT9[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 4.--6. " EXT_INT9_CON[1] ,Setting the signaling method of EXT_INT9[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 0.--2. " EXT_INT9_CON[0] ,Setting the signaling method of EXT_INT9[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x24 "EXT_INT10_CON,External interrupt EXT_INT10 configuration register"
|
|
bitfld.long 0x24 20.--22. " EXT_INT10_CON[5] ,Setting the signaling method of EXT_INT10[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x24 16.--18. " EXT_INT10_CON[4] ,Setting the signaling method of EXT_INT10[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x24 12.--14. " EXT_INT10_CON[3] ,Setting the signaling method of EXT_INT10[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x24 8.--10. " EXT_INT10_CON[2] ,Setting the signaling method of EXT_INT10[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x24 4.--6. " EXT_INT10_CON[1] ,Setting the signaling method of EXT_INT10[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x24 0.--2. " EXT_INT10_CON[0] ,Setting the signaling method of EXT_INT10[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x28 "EXT_INT11_CON,External interrupt EXT_INT11 configuration register"
|
|
bitfld.long 0x28 28.--30. " EXT_INT11_CON[7] ,Setting the signaling method of EXT_INT11[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 24.--26. " EXT_INT11_CON[6] ,Setting the signaling method of EXT_INT11[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 20.--22. " EXT_INT11_CON[5] ,Setting the signaling method of EXT_INT11[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x28 16.--18. " EXT_INT11_CON[4] ,Setting the signaling method of EXT_INT11[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 12.--14. " EXT_INT11_CON[3] ,Setting the signaling method of EXT_INT11[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 8.--10. " EXT_INT11_CON[2] ,Setting the signaling method of EXT_INT11[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x28 4.--6. " EXT_INT11_CON[1] ,Setting the signaling method of EXT_INT11[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x28 0.--2. " EXT_INT11_CON[0] ,Setting the signaling method of EXT_INT11[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x2C "EXT_INT12_CON,External interrupt EXT_INT12 configuration register"
|
|
bitfld.long 0x2C 28.--30. " EXT_INT12_CON[7] ,Setting the signaling method of EXT_INT12[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 24.--26. " EXT_INT12_CON[6] ,Setting the signaling method of EXT_INT12[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 20.--22. " EXT_INT12_CON[5] ,Setting the signaling method of EXT_INT12[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x2C 16.--18. " EXT_INT12_CON[4] ,Setting the signaling method of EXT_INT12[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 12.--14. " EXT_INT12_CON[3] ,Setting the signaling method of EXT_INT12[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 8.--10. " EXT_INT12_CON[2] ,Setting the signaling method of EXT_INT12[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x2C 4.--6. " EXT_INT12_CON[1] ,Setting the signaling method of EXT_INT12[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x2C 0.--2. " EXT_INT12_CON[0] ,Setting the signaling method of EXT_INT12[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
endif
|
|
line.long 0x30 "EXT_INT13_CON,External interrupt EXT_INT13 configuration register"
|
|
bitfld.long 0x30 28.--30. " EXT_INT13_CON[7] ,Setting the signaling method of EXT_INT13[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 24.--26. " EXT_INT13_CON[6] ,Setting the signaling method of EXT_INT13[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 20.--22. " EXT_INT13_CON[5] ,Setting the signaling method of EXT_INT13[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x30 16.--18. " EXT_INT13_CON[4] ,Setting the signaling method of EXT_INT13[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 12.--14. " EXT_INT13_CON[3] ,Setting the signaling method of EXT_INT13[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 8.--10. " EXT_INT13_CON[2] ,Setting the signaling method of EXT_INT13[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x30 4.--6. " EXT_INT13_CON[1] ,Setting the signaling method of EXT_INT13[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x30 0.--2. " EXT_INT13_CON[0] ,Setting the signaling method of EXT_INT13[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x34 "EXT_INT14_CON,External interrupt EXT_INT14 configuration register"
|
|
bitfld.long 0x34 28.--30. " EXT_INT14_CON[7] ,Setting the signaling method of EXT_INT14[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 24.--26. " EXT_INT14_CON[6] ,Setting the signaling method of EXT_INT14[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 20.--22. " EXT_INT14_CON[5] ,Setting the signaling method of EXT_INT14[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x34 16.--18. " EXT_INT14_CON[4] ,Setting the signaling method of EXT_INT14[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 12.--14. " EXT_INT14_CON[3] ,Setting the signaling method of EXT_INT14[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 8.--10. " EXT_INT14_CON[2] ,Setting the signaling method of EXT_INT14[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x34 4.--6. " EXT_INT14_CON[1] ,Setting the signaling method of EXT_INT14[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x34 0.--2. " EXT_INT14_CON[0] ,Setting the signaling method of EXT_INT14[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x38 "EXT_INT15_CON,External interrupt EXT_INT15 configuration register"
|
|
bitfld.long 0x38 28.--30. " EXT_INT15_CON[7] ,Setting the signaling method of EXT_INT15[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x38 24.--26. " EXT_INT15_CON[6] ,Setting the signaling method of EXT_INT15[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x38 20.--22. " EXT_INT15_CON[5] ,Setting the signaling method of EXT_INT15[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x38 16.--18. " EXT_INT15_CON[4] ,Setting the signaling method of EXT_INT15[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x38 12.--14. " EXT_INT15_CON[3] ,Setting the signaling method of EXT_INT15[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x38 8.--10. " EXT_INT15_CON[2] ,Setting the signaling method of EXT_INT15[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x38 4.--6. " EXT_INT15_CON[1] ,Setting the signaling method of EXT_INT15[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x38 0.--2. " EXT_INT15_CON[0] ,Setting the signaling method of EXT_INT15[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x3C "EXT_INT16_CON,External interrupt EXT_INT16 configuration register"
|
|
bitfld.long 0x3C 20.--22. " EXT_INT16_CON[5] ,Setting the signaling method of EXT_INT16[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x3C 16.--18. " EXT_INT16_CON[4] ,Setting the signaling method of EXT_INT16[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x3C 12.--14. " EXT_INT16_CON[3] ,Setting the signaling method of EXT_INT16[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x3C 8.--10. " EXT_INT16_CON[2] ,Setting the signaling method of EXT_INT16[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x3C 4.--6. " EXT_INT16_CON[1] ,Setting the signaling method of EXT_INT16[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x3C 0.--2. " EXT_INT16_CON[0] ,Setting the signaling method of EXT_INT16[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x744++0x07
|
|
line.long 0x00 "EXT_INT21_CON,External interrupt EXT_INT21 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT21_CON[7] ,Setting the signaling method of EXT_INT21[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT21_CON[6] ,Setting the signaling method of EXT_INT21[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT21_CON[5] ,Setting the signaling method of EXT_INT21[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT21_CON[4] ,Setting the signaling method of EXT_INT21[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT21_CON[3] ,Setting the signaling method of EXT_INT21[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT21_CON[2] ,Setting the signaling method of EXT_INT21[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT21_CON[1] ,Setting the signaling method of EXT_INT21[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT21_CON[0] ,Setting the signaling method of EXT_INT21[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x04 "EXT_INT22_CON,External interrupt EXT_INT22 configuration register"
|
|
bitfld.long 0x04 16.--18. " EXT_INT22_CON[4] ,Setting the signaling method of EXT_INT22[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 12.--14. " EXT_INT22_CON[3] ,Setting the signaling method of EXT_INT22[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 8.--10. " EXT_INT22_CON[2] ,Setting the signaling method of EXT_INT22[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " EXT_INT22_CON[1] ,Setting the signaling method of EXT_INT22[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 0.--2. " EXT_INT22_CON[0] ,Setting the signaling method of EXT_INT22[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++127.
|
|
sif !((cpu()=="Exynos4212")&&((1.==8.)||(1.==9.)||(1.==10.)||(1.==11.)||(1.==12.)))
|
|
line.long 0. "EXT_INT1_FLTCON0"
|
|
bitfld.long 0. 31. " FLTEN1[3] ,Filter Enable for EXT_INT1[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT1[3]"
|
|
bitfld.long 0. 23. " FLTEN1[2] ,Filter Enable for EXT_INT1[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT1[2]"
|
|
textline " "
|
|
bitfld.long 0. 15. " FLTEN1[1] ,Filter Enable for EXT_INT1[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT1[1]"
|
|
bitfld.long 0. 7. " FLTEN1[0] ,Filter Enable for EXT_INT1[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT1[0]"
|
|
line.long 0.+0x04 "EXT_INT1_FLTCON1"
|
|
bitfld.long 0.+0x04 31. " FLTEN1[7] ,Filter Enable for EXT_INT1[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT1[7]"
|
|
bitfld.long 0.+0x04 23. " FLTEN1[6] ,Filter Enable for EXT_INT1[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT1[6]"
|
|
textline " "
|
|
bitfld.long 0.+0x04 15. " FLTEN1[5] ,Filter Enable for EXT_INT1[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT1[5]"
|
|
bitfld.long 0.+0x04 7. " FLTEN1[4] ,Filter Enable for EXT_INT1[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT1[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((2.==8.)||(2.==9.)||(2.==10.)||(2.==11.)||(2.==12.)))
|
|
line.long 8. "EXT_INT2_FLTCON0"
|
|
bitfld.long 8. 31. " FLTEN2[3] ,Filter Enable for EXT_INT2[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 24.--30. 1. " FLTWIDTH2[3] ,Filtering width of EXT_INT2[3]"
|
|
bitfld.long 8. 23. " FLTEN2[2] ,Filter Enable for EXT_INT2[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 16.--22. 1. " FLTWIDTH2[2] ,Filtering width of EXT_INT2[2]"
|
|
textline " "
|
|
bitfld.long 8. 15. " FLTEN2[1] ,Filter Enable for EXT_INT2[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT2[1]"
|
|
bitfld.long 8. 7. " FLTEN2[0] ,Filter Enable for EXT_INT2[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT2[0]"
|
|
line.long 8.+0x04 "EXT_INT2_FLTCON1"
|
|
bitfld.long 8.+0x04 15. " FLTEN2[5] ,Filter Enable for EXT_INT2[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 8.+0x04 8.--14. 1. " FLTWIDTH2[5] ,Filtering width of EXT_INT2[5]"
|
|
bitfld.long 8.+0x04 7. " FLTEN2[4] ,Filter Enable for EXT_INT2[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 8.+0x04 0.--6. 1. " FLTWIDTH2[4] ,Filtering width of EXT_INT2[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((3.==8.)||(3.==9.)||(3.==10.)||(3.==11.)||(3.==12.)))
|
|
line.long 16. "EXT_INT3_FLTCON0"
|
|
bitfld.long 16. 31. " FLTEN3[3] ,Filter Enable for EXT_INT3[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT3[3]"
|
|
bitfld.long 16. 23. " FLTEN3[2] ,Filter Enable for EXT_INT3[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT3[2]"
|
|
textline " "
|
|
bitfld.long 16. 15. " FLTEN3[1] ,Filter Enable for EXT_INT3[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT3[1]"
|
|
bitfld.long 16. 7. " FLTEN3[0] ,Filter Enable for EXT_INT3[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT3[0]"
|
|
line.long 16.+0x04 "EXT_INT3_FLTCON1"
|
|
bitfld.long 16.+0x04 31. " FLTEN3[7] ,Filter Enable for EXT_INT3[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 24.--30. 1. " FLTWIDTH3[7] ,Filtering width of EXT_INT3[7]"
|
|
bitfld.long 16.+0x04 23. " FLTEN3[6] ,Filter Enable for EXT_INT3[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 16.--22. 1. " FLTWIDTH3[6] ,Filtering width of EXT_INT3[6]"
|
|
textline " "
|
|
bitfld.long 16.+0x04 15. " FLTEN3[5] ,Filter Enable for EXT_INT3[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 8.--14. 1. " FLTWIDTH3[5] ,Filtering width of EXT_INT3[5]"
|
|
bitfld.long 16.+0x04 7. " FLTEN3[4] ,Filter Enable for EXT_INT3[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 0.--6. 1. " FLTWIDTH3[4] ,Filtering width of EXT_INT3[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((4.==8.)||(4.==9.)||(4.==10.)||(4.==11.)||(4.==12.)))
|
|
line.long 24. "EXT_INT4_FLTCON0"
|
|
bitfld.long 24. 31. " FLTEN4[3] ,Filter Enable for EXT_INT4[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT4[3]"
|
|
bitfld.long 24. 23. " FLTEN4[2] ,Filter Enable for EXT_INT4[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT4[2]"
|
|
textline " "
|
|
bitfld.long 24. 15. " FLTEN4[1] ,Filter Enable for EXT_INT4[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT4[1]"
|
|
bitfld.long 24. 7. " FLTEN4[0] ,Filter Enable for EXT_INT4[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT4[0]"
|
|
line.long 24.+0x04 "EXT_INT4_FLTCON1"
|
|
bitfld.long 24.+0x04 7. " FLTEN4[4] ,Filter Enable for EXT_INT4[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 24.+0x04 0.--6. 1. " FLTWIDTH4[4] ,Filtering width of EXT_INT4[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((5.==8.)||(5.==9.)||(5.==10.)||(5.==11.)||(5.==12.)))
|
|
line.long 32. "EXT_INT5_FLTCON0"
|
|
bitfld.long 32. 31. " FLTEN5[3] ,Filter Enable for EXT_INT5[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 24.--30. 1. " FLTWIDTH5[3] ,Filtering width of EXT_INT5[3]"
|
|
bitfld.long 32. 23. " FLTEN5[2] ,Filter Enable for EXT_INT5[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 16.--22. 1. " FLTWIDTH5[2] ,Filtering width of EXT_INT5[2]"
|
|
textline " "
|
|
bitfld.long 32. 15. " FLTEN5[1] ,Filter Enable for EXT_INT5[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT5[1]"
|
|
bitfld.long 32. 7. " FLTEN5[0] ,Filter Enable for EXT_INT5[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT5[0]"
|
|
line.long 32.+0x04 "EXT_INT5_FLTCON1"
|
|
bitfld.long 32.+0x04 7. " FLTEN5[4] ,Filter Enable for EXT_INT5[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 32.+0x04 0.--6. 1. " FLTWIDTH5[4] ,Filtering width of EXT_INT5[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((6.==8.)||(6.==9.)||(6.==10.)||(6.==11.)||(6.==12.)))
|
|
line.long 40. "EXT_INT6_FLTCON0"
|
|
bitfld.long 40. 31. " FLTEN6[3] ,Filter Enable for EXT_INT6[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 24.--30. 1. " FLTWIDTH6[3] ,Filtering width of EXT_INT6[3]"
|
|
bitfld.long 40. 23. " FLTEN6[2] ,Filter Enable for EXT_INT6[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 16.--22. 1. " FLTWIDTH6[2] ,Filtering width of EXT_INT6[2]"
|
|
textline " "
|
|
bitfld.long 40. 15. " FLTEN6[1] ,Filter Enable for EXT_INT6[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 8.--14. 1. " FLTWIDTH6[1] ,Filtering width of EXT_INT6[1]"
|
|
bitfld.long 40. 7. " FLTEN6[0] ,Filter Enable for EXT_INT6[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 0.--6. 1. " FLTWIDTH6[0] ,Filtering width of EXT_INT6[0]"
|
|
hide.long 40.+0x04 "EXT_INT6_FLTCON1"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((7.==8.)||(7.==9.)||(7.==10.)||(7.==11.)||(7.==12.)))
|
|
line.long 48. "EXT_INT7_FLTCON0"
|
|
bitfld.long 48. 31. " FLTEN7[3] ,Filter Enable for EXT_INT7[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 24.--30. 1. " FLTWIDTH7[3] ,Filtering width of EXT_INT7[3]"
|
|
bitfld.long 48. 23. " FLTEN7[2] ,Filter Enable for EXT_INT7[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 16.--22. 1. " FLTWIDTH7[2] ,Filtering width of EXT_INT7[2]"
|
|
textline " "
|
|
bitfld.long 48. 15. " FLTEN7[1] ,Filter Enable for EXT_INT7[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 8.--14. 1. " FLTWIDTH7[1] ,Filtering width of EXT_INT7[1]"
|
|
bitfld.long 48. 7. " FLTEN7[0] ,Filter Enable for EXT_INT7[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 0.--6. 1. " FLTWIDTH7[0] ,Filtering width of EXT_INT7[0]"
|
|
hide.long 48.+0x04 "EXT_INT7_FLTCON1"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((8.==8.)||(8.==9.)||(8.==10.)||(8.==11.)||(8.==12.)))
|
|
line.long 56. "EXT_INT8_FLTCON0"
|
|
bitfld.long 56. 31. " FLTEN8[3] ,Filter Enable for EXT_INT8[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 24.--30. 1. " FLTWIDTH8[3] ,Filtering width of EXT_INT8[3]"
|
|
bitfld.long 56. 23. " FLTEN8[2] ,Filter Enable for EXT_INT8[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 16.--22. 1. " FLTWIDTH8[2] ,Filtering width of EXT_INT8[2]"
|
|
textline " "
|
|
bitfld.long 56. 15. " FLTEN8[1] ,Filter Enable for EXT_INT8[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 8.--14. 1. " FLTWIDTH8[1] ,Filtering width of EXT_INT8[1]"
|
|
bitfld.long 56. 7. " FLTEN8[0] ,Filter Enable for EXT_INT8[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 0.--6. 1. " FLTWIDTH8[0] ,Filtering width of EXT_INT8[0]"
|
|
line.long 56.+0x04 "EXT_INT8_FLTCON1"
|
|
bitfld.long 56.+0x04 7. " FLTEN8[4] ,Filter Enable for EXT_INT8[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 56.+0x04 0.--6. 1. " FLTWIDTH8[4] ,Filtering width of EXT_INT8[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((9.==8.)||(9.==9.)||(9.==10.)||(9.==11.)||(9.==12.)))
|
|
line.long 64. "EXT_INT9_FLTCON0"
|
|
bitfld.long 64. 31. " FLTEN9[3] ,Filter Enable for EXT_INT9[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 24.--30. 1. " FLTWIDTH9[3] ,Filtering width of EXT_INT9[3]"
|
|
bitfld.long 64. 23. " FLTEN9[2] ,Filter Enable for EXT_INT9[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 16.--22. 1. " FLTWIDTH9[2] ,Filtering width of EXT_INT9[2]"
|
|
textline " "
|
|
bitfld.long 64. 15. " FLTEN9[1] ,Filter Enable for EXT_INT9[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 8.--14. 1. " FLTWIDTH9[1] ,Filtering width of EXT_INT9[1]"
|
|
bitfld.long 64. 7. " FLTEN9[0] ,Filter Enable for EXT_INT9[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 0.--6. 1. " FLTWIDTH9[0] ,Filtering width of EXT_INT9[0]"
|
|
line.long 64.+0x04 "EXT_INT9_FLTCON1"
|
|
bitfld.long 64.+0x04 31. " FLTEN9[7] ,Filter Enable for EXT_INT9[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 24.--30. 1. " FLTWIDTH9[7] ,Filtering width of EXT_INT9[7]"
|
|
bitfld.long 64.+0x04 23. " FLTEN9[6] ,Filter Enable for EXT_INT9[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 16.--22. 1. " FLTWIDTH9[6] ,Filtering width of EXT_INT9[6]"
|
|
textline " "
|
|
bitfld.long 64.+0x04 15. " FLTEN9[5] ,Filter Enable for EXT_INT9[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 8.--14. 1. " FLTWIDTH9[5] ,Filtering width of EXT_INT9[5]"
|
|
bitfld.long 64.+0x04 7. " FLTEN9[4] ,Filter Enable for EXT_INT9[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 0.--6. 1. " FLTWIDTH9[4] ,Filtering width of EXT_INT9[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((10.==8.)||(10.==9.)||(10.==10.)||(10.==11.)||(10.==12.)))
|
|
line.long 72. "EXT_INT10_FLTCON0"
|
|
bitfld.long 72. 31. " FLTEN10[3] ,Filter Enable for EXT_INT10[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 72. 24.--30. 1. " FLTWIDTH10[3] ,Filtering width of EXT_INT10[3]"
|
|
bitfld.long 72. 23. " FLTEN10[2] ,Filter Enable for EXT_INT10[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 72. 16.--22. 1. " FLTWIDTH10[2] ,Filtering width of EXT_INT10[2]"
|
|
textline " "
|
|
bitfld.long 72. 15. " FLTEN10[1] ,Filter Enable for EXT_INT10[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 72. 8.--14. 1. " FLTWIDTH10[1] ,Filtering width of EXT_INT10[1]"
|
|
bitfld.long 72. 7. " FLTEN10[0] ,Filter Enable for EXT_INT10[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 72. 0.--6. 1. " FLTWIDTH10[0] ,Filtering width of EXT_INT10[0]"
|
|
line.long 72.+0x04 "EXT_INT10_FLTCON1"
|
|
bitfld.long 72.+0x04 15. " FLTEN10[5] ,Filter Enable for EXT_INT10[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 72.+0x04 8.--14. 1. " FLTWIDTH10[5] ,Filtering width of EXT_INT10[5]"
|
|
bitfld.long 72.+0x04 7. " FLTEN10[4] ,Filter Enable for EXT_INT10[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 72.+0x04 0.--6. 1. " FLTWIDTH10[4] ,Filtering width of EXT_INT10[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((11.==8.)||(11.==9.)||(11.==10.)||(11.==11.)||(11.==12.)))
|
|
line.long 80. "EXT_INT11_FLTCON0"
|
|
bitfld.long 80. 31. " FLTEN11[3] ,Filter Enable for EXT_INT11[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 80. 24.--30. 1. " FLTWIDTH11[3] ,Filtering width of EXT_INT11[3]"
|
|
bitfld.long 80. 23. " FLTEN11[2] ,Filter Enable for EXT_INT11[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 80. 16.--22. 1. " FLTWIDTH11[2] ,Filtering width of EXT_INT11[2]"
|
|
textline " "
|
|
bitfld.long 80. 15. " FLTEN11[1] ,Filter Enable for EXT_INT11[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 80. 8.--14. 1. " FLTWIDTH11[1] ,Filtering width of EXT_INT11[1]"
|
|
bitfld.long 80. 7. " FLTEN11[0] ,Filter Enable for EXT_INT11[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 80. 0.--6. 1. " FLTWIDTH11[0] ,Filtering width of EXT_INT11[0]"
|
|
line.long 80.+0x04 "EXT_INT11_FLTCON1"
|
|
bitfld.long 80.+0x04 31. " FLTEN11[7] ,Filter Enable for EXT_INT11[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 80.+0x04 24.--30. 1. " FLTWIDTH11[7] ,Filtering width of EXT_INT11[7]"
|
|
bitfld.long 80.+0x04 23. " FLTEN11[6] ,Filter Enable for EXT_INT11[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 80.+0x04 16.--22. 1. " FLTWIDTH11[6] ,Filtering width of EXT_INT11[6]"
|
|
textline " "
|
|
bitfld.long 80.+0x04 15. " FLTEN11[5] ,Filter Enable for EXT_INT11[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 80.+0x04 8.--14. 1. " FLTWIDTH11[5] ,Filtering width of EXT_INT11[5]"
|
|
bitfld.long 80.+0x04 7. " FLTEN11[4] ,Filter Enable for EXT_INT11[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 80.+0x04 0.--6. 1. " FLTWIDTH11[4] ,Filtering width of EXT_INT11[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((12.==8.)||(12.==9.)||(12.==10.)||(12.==11.)||(12.==12.)))
|
|
line.long 88. "EXT_INT12_FLTCON0"
|
|
bitfld.long 88. 31. " FLTEN12[3] ,Filter Enable for EXT_INT12[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 88. 24.--30. 1. " FLTWIDTH12[3] ,Filtering width of EXT_INT12[3]"
|
|
bitfld.long 88. 23. " FLTEN12[2] ,Filter Enable for EXT_INT12[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 88. 16.--22. 1. " FLTWIDTH12[2] ,Filtering width of EXT_INT12[2]"
|
|
textline " "
|
|
bitfld.long 88. 15. " FLTEN12[1] ,Filter Enable for EXT_INT12[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 88. 8.--14. 1. " FLTWIDTH12[1] ,Filtering width of EXT_INT12[1]"
|
|
bitfld.long 88. 7. " FLTEN12[0] ,Filter Enable for EXT_INT12[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 88. 0.--6. 1. " FLTWIDTH12[0] ,Filtering width of EXT_INT12[0]"
|
|
line.long 88.+0x04 "EXT_INT12_FLTCON1"
|
|
bitfld.long 88.+0x04 31. " FLTEN12[7] ,Filter Enable for EXT_INT12[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 88.+0x04 24.--30. 1. " FLTWIDTH12[7] ,Filtering width of EXT_INT12[7]"
|
|
bitfld.long 88.+0x04 23. " FLTEN12[6] ,Filter Enable for EXT_INT12[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 88.+0x04 16.--22. 1. " FLTWIDTH12[6] ,Filtering width of EXT_INT12[6]"
|
|
textline " "
|
|
bitfld.long 88.+0x04 15. " FLTEN12[5] ,Filter Enable for EXT_INT12[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 88.+0x04 8.--14. 1. " FLTWIDTH12[5] ,Filtering width of EXT_INT12[5]"
|
|
bitfld.long 88.+0x04 7. " FLTEN12[4] ,Filter Enable for EXT_INT12[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 88.+0x04 0.--6. 1. " FLTWIDTH12[4] ,Filtering width of EXT_INT12[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((13.==8.)||(13.==9.)||(13.==10.)||(13.==11.)||(13.==12.)))
|
|
line.long 96. "EXT_INT13_FLTCON0"
|
|
bitfld.long 96. 31. " FLTEN13[3] ,Filter Enable for EXT_INT13[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 96. 24.--30. 1. " FLTWIDTH13[3] ,Filtering width of EXT_INT13[3]"
|
|
bitfld.long 96. 23. " FLTEN13[2] ,Filter Enable for EXT_INT13[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 96. 16.--22. 1. " FLTWIDTH13[2] ,Filtering width of EXT_INT13[2]"
|
|
textline " "
|
|
bitfld.long 96. 15. " FLTEN13[1] ,Filter Enable for EXT_INT13[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 96. 8.--14. 1. " FLTWIDTH13[1] ,Filtering width of EXT_INT13[1]"
|
|
bitfld.long 96. 7. " FLTEN13[0] ,Filter Enable for EXT_INT13[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 96. 0.--6. 1. " FLTWIDTH13[0] ,Filtering width of EXT_INT13[0]"
|
|
line.long 96.+0x04 "EXT_INT13_FLTCON1"
|
|
bitfld.long 96.+0x04 31. " FLTEN13[7] ,Filter Enable for EXT_INT13[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 96.+0x04 24.--30. 1. " FLTWIDTH13[7] ,Filtering width of EXT_INT13[7]"
|
|
bitfld.long 96.+0x04 23. " FLTEN13[6] ,Filter Enable for EXT_INT13[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 96.+0x04 16.--22. 1. " FLTWIDTH13[6] ,Filtering width of EXT_INT13[6]"
|
|
textline " "
|
|
bitfld.long 96.+0x04 15. " FLTEN13[5] ,Filter Enable for EXT_INT13[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 96.+0x04 8.--14. 1. " FLTWIDTH13[5] ,Filtering width of EXT_INT13[5]"
|
|
bitfld.long 96.+0x04 7. " FLTEN13[4] ,Filter Enable for EXT_INT13[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 96.+0x04 0.--6. 1. " FLTWIDTH13[4] ,Filtering width of EXT_INT13[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((14.==8.)||(14.==9.)||(14.==10.)||(14.==11.)||(14.==12.)))
|
|
line.long 104. "EXT_INT14_FLTCON0"
|
|
bitfld.long 104. 31. " FLTEN14[3] ,Filter Enable for EXT_INT14[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 104. 24.--30. 1. " FLTWIDTH14[3] ,Filtering width of EXT_INT14[3]"
|
|
bitfld.long 104. 23. " FLTEN14[2] ,Filter Enable for EXT_INT14[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 104. 16.--22. 1. " FLTWIDTH14[2] ,Filtering width of EXT_INT14[2]"
|
|
textline " "
|
|
bitfld.long 104. 15. " FLTEN14[1] ,Filter Enable for EXT_INT14[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 104. 8.--14. 1. " FLTWIDTH14[1] ,Filtering width of EXT_INT14[1]"
|
|
bitfld.long 104. 7. " FLTEN14[0] ,Filter Enable for EXT_INT14[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 104. 0.--6. 1. " FLTWIDTH14[0] ,Filtering width of EXT_INT14[0]"
|
|
line.long 104.+0x04 "EXT_INT14_FLTCON1"
|
|
bitfld.long 104.+0x04 31. " FLTEN14[7] ,Filter Enable for EXT_INT14[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 104.+0x04 24.--30. 1. " FLTWIDTH14[7] ,Filtering width of EXT_INT14[7]"
|
|
bitfld.long 104.+0x04 23. " FLTEN14[6] ,Filter Enable for EXT_INT14[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 104.+0x04 16.--22. 1. " FLTWIDTH14[6] ,Filtering width of EXT_INT14[6]"
|
|
textline " "
|
|
bitfld.long 104.+0x04 15. " FLTEN14[5] ,Filter Enable for EXT_INT14[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 104.+0x04 8.--14. 1. " FLTWIDTH14[5] ,Filtering width of EXT_INT14[5]"
|
|
bitfld.long 104.+0x04 7. " FLTEN14[4] ,Filter Enable for EXT_INT14[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 104.+0x04 0.--6. 1. " FLTWIDTH14[4] ,Filtering width of EXT_INT14[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((15.==8.)||(15.==9.)||(15.==10.)||(15.==11.)||(15.==12.)))
|
|
line.long 112. "EXT_INT15_FLTCON0"
|
|
bitfld.long 112. 31. " FLTEN15[3] ,Filter Enable for EXT_INT15[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 112. 24.--30. 1. " FLTWIDTH15[3] ,Filtering width of EXT_INT15[3]"
|
|
bitfld.long 112. 23. " FLTEN15[2] ,Filter Enable for EXT_INT15[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 112. 16.--22. 1. " FLTWIDTH15[2] ,Filtering width of EXT_INT15[2]"
|
|
textline " "
|
|
bitfld.long 112. 15. " FLTEN15[1] ,Filter Enable for EXT_INT15[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 112. 8.--14. 1. " FLTWIDTH15[1] ,Filtering width of EXT_INT15[1]"
|
|
bitfld.long 112. 7. " FLTEN15[0] ,Filter Enable for EXT_INT15[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 112. 0.--6. 1. " FLTWIDTH15[0] ,Filtering width of EXT_INT15[0]"
|
|
line.long 112.+0x04 "EXT_INT15_FLTCON1"
|
|
bitfld.long 112.+0x04 31. " FLTEN15[7] ,Filter Enable for EXT_INT15[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 112.+0x04 24.--30. 1. " FLTWIDTH15[7] ,Filtering width of EXT_INT15[7]"
|
|
bitfld.long 112.+0x04 23. " FLTEN15[6] ,Filter Enable for EXT_INT15[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 112.+0x04 16.--22. 1. " FLTWIDTH15[6] ,Filtering width of EXT_INT15[6]"
|
|
textline " "
|
|
bitfld.long 112.+0x04 15. " FLTEN15[5] ,Filter Enable for EXT_INT15[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 112.+0x04 8.--14. 1. " FLTWIDTH15[5] ,Filtering width of EXT_INT15[5]"
|
|
bitfld.long 112.+0x04 7. " FLTEN15[4] ,Filter Enable for EXT_INT15[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 112.+0x04 0.--6. 1. " FLTWIDTH15[4] ,Filtering width of EXT_INT15[4]"
|
|
textline " "
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((16.==8.)||(16.==9.)||(16.==10.)||(16.==11.)||(16.==12.)))
|
|
line.long 120. "EXT_INT16_FLTCON0"
|
|
bitfld.long 120. 31. " FLTEN16[3] ,Filter Enable for EXT_INT16[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 120. 24.--30. 1. " FLTWIDTH16[3] ,Filtering width of EXT_INT16[3]"
|
|
bitfld.long 120. 23. " FLTEN16[2] ,Filter Enable for EXT_INT16[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 120. 16.--22. 1. " FLTWIDTH16[2] ,Filtering width of EXT_INT16[2]"
|
|
textline " "
|
|
bitfld.long 120. 15. " FLTEN16[1] ,Filter Enable for EXT_INT16[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 120. 8.--14. 1. " FLTWIDTH16[1] ,Filtering width of EXT_INT16[1]"
|
|
bitfld.long 120. 7. " FLTEN16[0] ,Filter Enable for EXT_INT16[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 120. 0.--6. 1. " FLTWIDTH16[0] ,Filtering width of EXT_INT16[0]"
|
|
line.long 120.+0x04 "EXT_INT16_FLTCON1"
|
|
bitfld.long 120.+0x04 15. " FLTEN16[5] ,Filter Enable for EXT_INT16[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 120.+0x04 8.--14. 1. " FLTWIDTH16[5] ,Filtering width of EXT_INT16[5]"
|
|
bitfld.long 120.+0x04 7. " FLTEN16[4] ,Filter Enable for EXT_INT16[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 120.+0x04 0.--6. 1. " FLTWIDTH16[4] ,Filtering width of EXT_INT16[4]"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x880++0x07
|
|
line.long 0x00 "EXT_INT21_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN21[3] ,Filter Enable for EXT_INT21[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH21[3] ,Filtering width of EXT_INT21[3]"
|
|
bitfld.long 0x00 23. " FLTEN21[2] ,Filter Enable for EXT_INT21[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH21[2] ,Filtering width of EXT_INT21[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN21[1] ,Filter Enable for EXT_INT21[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH21[1] ,Filtering width of EXT_INT21[1]"
|
|
bitfld.long 0x00 7. " FLTEN21[0] ,Filter Enable for EXT_INT21[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH21[0] ,Filtering width of EXT_INT21[0]"
|
|
line.long 0x04 "EXT_INT21_FLTCON1"
|
|
bitfld.long 0x04 31. " FLTEN21[7] ,Filter Enable for EXT_INT21[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 24.--30. 1. " FLTWIDTH21[7] ,Filtering width of EXT_INT21[7]"
|
|
bitfld.long 0x04 23. " FLTEN21[6] ,Filter Enable for EXT_INT21[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 16.--22. 1. " FLTWIDTH21[6] ,Filtering width of EXT_INT21[6]"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTEN21[5] ,Filter Enable for EXT_INT21[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 8.--14. 1. " FLTWIDTH21[5] ,Filtering width of EXT_INT21[5]"
|
|
bitfld.long 0x04 7. " FLTEN21[4] ,Filter Enable for EXT_INT21[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--6. 1. " FLTWIDTH21[4] ,Filtering width of EXT_INT21[4]"
|
|
group.long 0x888++0x07
|
|
line.long 0x00 "EXT_INT22_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN22[3] ,Filter Enable for EXT_INT22[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH22[3] ,Filtering width of EXT_INT22[3]"
|
|
bitfld.long 0x00 23. " FLTEN22[2] ,Filter Enable for EXT_INT22[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH22[2] ,Filtering width of EXT_INT22[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN22[1] ,Filter Enable for EXT_INT22[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH22[1] ,Filtering width of EXT_INT22[1]"
|
|
bitfld.long 0x00 7. " FLTEN22[0] ,Filter Enable for EXT_INT22[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH22[0] ,Filtering width of EXT_INT22[0]"
|
|
line.long 0x04 "EXT_INT22_FLTCON1"
|
|
bitfld.long 0x04 7. " FLTEN22[4] ,Filter Enable for EXT_INT22[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--6. 1. " FLTWIDTH22[4] ,Filtering width of EXT_INT22[4]"
|
|
endif
|
|
tree.end
|
|
tree "External interrupt mask"
|
|
group.long 0x900++63.
|
|
line.long 0x00 "EXT_INT1_MASK,External interrupt EXT_INT1 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT1_MASK[7] ,External Interrupt 1 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT1_MASK[6] ,External Interrupt 1 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT1_MASK[5] ,External Interrupt 1 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT1_MASK[4] ,External Interrupt 1 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT1_MASK[3] ,External Interrupt 1 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT1_MASK[2] ,External Interrupt 1 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT1_MASK[1] ,External Interrupt 1 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT1_MASK[0] ,External Interrupt 1 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x04 "EXT_INT2_MASK,External interrupt EXT_INT2 mask register"
|
|
bitfld.long 0x04 5. " EXT_INT2_MASK[5] ,External Interrupt 2 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 4. " EXT_INT2_MASK[4] ,External Interrupt 2 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EXT_INT2_MASK[3] ,External Interrupt 2 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 2. " EXT_INT2_MASK[2] ,External Interrupt 2 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EXT_INT2_MASK[1] ,External Interrupt 2 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 0. " EXT_INT2_MASK[0] ,External Interrupt 2 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x08 "EXT_INT3_MASK,External interrupt EXT_INT3 mask register"
|
|
bitfld.long 0x08 7. " EXT_INT3_MASK[7] ,External Interrupt 3 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 6. " EXT_INT3_MASK[6] ,External Interrupt 3 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EXT_INT3_MASK[5] ,External Interrupt 3 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 4. " EXT_INT3_MASK[4] ,External Interrupt 3 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EXT_INT3_MASK[3] ,External Interrupt 3 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 2. " EXT_INT3_MASK[2] ,External Interrupt 3 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT3_MASK[1] ,External Interrupt 3 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 0. " EXT_INT3_MASK[0] ,External Interrupt 3 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x0C "EXT_INT4_MASK,External interrupt EXT_INT4 mask register"
|
|
bitfld.long 0x0C 4. " EXT_INT4_MASK[4] ,External Interrupt 4 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 3. " EXT_INT4_MASK[3] ,External Interrupt 4 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EXT_INT4_MASK[2] ,External Interrupt 4 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 1. " EXT_INT4_MASK[1] ,External Interrupt 4 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXT_INT4_MASK[0] ,External Interrupt 4 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x10 "EXT_INT5_MASK,External interrupt EXT_INT5 mask register"
|
|
bitfld.long 0x10 4. " EXT_INT5_MASK[4] ,External Interrupt 5 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EXT_INT5_MASK[3] ,External Interrupt 5 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 2. " EXT_INT5_MASK[2] ,External Interrupt 5 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 1. " EXT_INT5_MASK[1] ,External Interrupt 5 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 0. " EXT_INT5_MASK[0] ,External Interrupt 5 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x14 "EXT_INT6_MASK,External interrupt EXT_INT6 mask register"
|
|
bitfld.long 0x14 3. " EXT_INT6_MASK[3] ,External Interrupt 6 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 2. " EXT_INT6_MASK[2] ,External Interrupt 6 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT6_MASK[1] ,External Interrupt 6 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 0. " EXT_INT6_MASK[0] ,External Interrupt 6 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x18 "EXT_INT7_MASK,External interrupt EXT_INT7 mask register"
|
|
bitfld.long 0x18 3. " EXT_INT7_MASK[3] ,External Interrupt 7 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 2. " EXT_INT7_MASK[2] ,External Interrupt 7 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT7_MASK[1] ,External Interrupt 7 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 0. " EXT_INT7_MASK[0] ,External Interrupt 7 Mask 0" "Enable Interrupt,Masked"
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x1C "EXT_INT8_MASK,External interrupt EXT_INT8 mask register"
|
|
bitfld.long 0x1C 4. " EXT_INT8_MASK[4] ,External Interrupt 8 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 3. " EXT_INT8_MASK[3] ,External Interrupt 8 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " EXT_INT8_MASK[2] ,External Interrupt 8 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x1C 1. " EXT_INT8_MASK[1] ,External Interrupt 8 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT8_MASK[0] ,External Interrupt 8 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x20 "EXT_INT9_MASK,External interrupt EXT_INT9 mask register"
|
|
bitfld.long 0x20 7. " EXT_INT9_MASK[7] ,External Interrupt 9 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 6. " EXT_INT9_MASK[6] ,External Interrupt 9 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT9_MASK[5] ,External Interrupt 9 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 4. " EXT_INT9_MASK[4] ,External Interrupt 9 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT9_MASK[3] ,External Interrupt 9 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 2. " EXT_INT9_MASK[2] ,External Interrupt 9 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT9_MASK[1] ,External Interrupt 9 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 0. " EXT_INT9_MASK[0] ,External Interrupt 9 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x24 "EXT_INT10_MASK,External interrupt EXT_INT10 mask register"
|
|
bitfld.long 0x24 5. " EXT_INT10_MASK[5] ,External Interrupt 10 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 4. " EXT_INT10_MASK[4] ,External Interrupt 10 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x24 3. " EXT_INT10_MASK[3] ,External Interrupt 10 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 2. " EXT_INT10_MASK[2] ,External Interrupt 10 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x24 1. " EXT_INT10_MASK[1] ,External Interrupt 10 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x24 0. " EXT_INT10_MASK[0] ,External Interrupt 10 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x28 "EXT_INT11_MASK,External interrupt EXT_INT11 mask register"
|
|
bitfld.long 0x28 7. " EXT_INT11_MASK[7] ,External Interrupt 11 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 6. " EXT_INT11_MASK[6] ,External Interrupt 11 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 5. " EXT_INT11_MASK[5] ,External Interrupt 11 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 4. " EXT_INT11_MASK[4] ,External Interrupt 11 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 3. " EXT_INT11_MASK[3] ,External Interrupt 11 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 2. " EXT_INT11_MASK[2] ,External Interrupt 11 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x28 1. " EXT_INT11_MASK[1] ,External Interrupt 11 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x28 0. " EXT_INT11_MASK[0] ,External Interrupt 11 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x2C "EXT_INT12_MASK,External interrupt EXT_INT12 mask register"
|
|
bitfld.long 0x2C 7. " EXT_INT12_MASK[7] ,External Interrupt 12 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 6. " EXT_INT12_MASK[6] ,External Interrupt 12 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " EXT_INT12_MASK[5] ,External Interrupt 12 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 4. " EXT_INT12_MASK[4] ,External Interrupt 12 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " EXT_INT12_MASK[3] ,External Interrupt 12 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 2. " EXT_INT12_MASK[2] ,External Interrupt 12 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " EXT_INT12_MASK[1] ,External Interrupt 12 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x2C 0. " EXT_INT12_MASK[0] ,External Interrupt 12 Mask 0" "Enable Interrupt,Masked"
|
|
endif
|
|
line.long 0x30 "EXT_INT13_MASK,External interrupt EXT_INT13 mask register"
|
|
bitfld.long 0x30 7. " EXT_INT13_MASK[7] ,External Interrupt 13 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 6. " EXT_INT13_MASK[6] ,External Interrupt 13 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 5. " EXT_INT13_MASK[5] ,External Interrupt 13 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 4. " EXT_INT13_MASK[4] ,External Interrupt 13 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXT_INT13_MASK[3] ,External Interrupt 13 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 2. " EXT_INT13_MASK[2] ,External Interrupt 13 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x30 1. " EXT_INT13_MASK[1] ,External Interrupt 13 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x30 0. " EXT_INT13_MASK[0] ,External Interrupt 13 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x34 "EXT_INT14_MASK,External interrupt EXT_INT14 mask register"
|
|
bitfld.long 0x34 7. " EXT_INT14_MASK[7] ,External Interrupt 14 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x34 6. " EXT_INT14_MASK[6] ,External Interrupt 14 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 5. " EXT_INT14_MASK[5] ,External Interrupt 14 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x34 4. " EXT_INT14_MASK[4] ,External Interrupt 14 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 3. " EXT_INT14_MASK[3] ,External Interrupt 14 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x34 2. " EXT_INT14_MASK[2] ,External Interrupt 14 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x34 1. " EXT_INT14_MASK[1] ,External Interrupt 14 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x34 0. " EXT_INT14_MASK[0] ,External Interrupt 14 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x38 "EXT_INT15_MASK,External interrupt EXT_INT15 mask register"
|
|
bitfld.long 0x38 7. " EXT_INT15_MASK[7] ,External Interrupt 15 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x38 6. " EXT_INT15_MASK[6] ,External Interrupt 15 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x38 5. " EXT_INT15_MASK[5] ,External Interrupt 15 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x38 4. " EXT_INT15_MASK[4] ,External Interrupt 15 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x38 3. " EXT_INT15_MASK[3] ,External Interrupt 15 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x38 2. " EXT_INT15_MASK[2] ,External Interrupt 15 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x38 1. " EXT_INT15_MASK[1] ,External Interrupt 15 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x38 0. " EXT_INT15_MASK[0] ,External Interrupt 15 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x3C "EXT_INT16_MASK,External interrupt EXT_INT16 mask register"
|
|
bitfld.long 0x3C 5. " EXT_INT16_MASK[5] ,External Interrupt 16 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x3C 4. " EXT_INT16_MASK[4] ,External Interrupt 16 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x3C 3. " EXT_INT16_MASK[3] ,External Interrupt 16 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x3C 2. " EXT_INT16_MASK[2] ,External Interrupt 16 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " EXT_INT16_MASK[1] ,External Interrupt 16 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x3C 0. " EXT_INT16_MASK[0] ,External Interrupt 16 Mask 0" "Enable Interrupt,Masked"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "EXT_INT21_MASK,External interrupt EXT_INT21 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT21_MASK[7] ,External Interrupt 21 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT21_MASK[6] ,External Interrupt 21 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT21_MASK[5] ,External Interrupt 21 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT21_MASK[4] ,External Interrupt 21 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT21_MASK[3] ,External Interrupt 21 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT21_MASK[2] ,External Interrupt 21 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT21_MASK[1] ,External Interrupt 21 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT21_MASK[0] ,External Interrupt 21 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "EXT_INT22_MASK,External interrupt EXT_INT22 mask register"
|
|
bitfld.long 0x00 4. " EXT_INT22_MASK[4] ,External Interrupt 22 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 3. " EXT_INT22_MASK[3] ,External Interrupt 22 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT22_MASK[2] ,External Interrupt 22 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 1. " EXT_INT22_MASK[1] ,External Interrupt 22 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT22_MASK[0] ,External Interrupt 22 Mask 0" "Enable Interrupt,Masked"
|
|
endif
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++63.
|
|
line.long 0x00 "EXT_INT1_PEND,External interrupt EXT_INT1 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT1_PEND[7] ,External Interrupt 1 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT1_PEND[6] ,External Interrupt 1 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT1_PEND[5] ,External Interrupt 1 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT1_PEND[4] ,External Interrupt 1 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT1_PEND[3] ,External Interrupt 1 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT1_PEND[2] ,External Interrupt 1 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT1_PEND[1] ,External Interrupt 1 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT1_PEND[0] ,External Interrupt 1 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x04 "EXT_INT2_PEND,External interrupt EXT_INT2 pending register"
|
|
bitfld.long 0x04 5. " EXT_INT2_PEND[5] ,External Interrupt 2 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " EXT_INT2_PEND[4] ,External Interrupt 2 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EXT_INT2_PEND[3] ,External Interrupt 2 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " EXT_INT2_PEND[2] ,External Interrupt 2 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EXT_INT2_PEND[1] ,External Interrupt 2 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " EXT_INT2_PEND[0] ,External Interrupt 2 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x08 "EXT_INT3_PEND,External interrupt EXT_INT3 pending register"
|
|
bitfld.long 0x08 7. " EXT_INT3_PEND[7] ,External Interrupt 3 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x08 6. " EXT_INT3_PEND[6] ,External Interrupt 3 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EXT_INT3_PEND[5] ,External Interrupt 3 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x08 4. " EXT_INT3_PEND[4] ,External Interrupt 3 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EXT_INT3_PEND[3] ,External Interrupt 3 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x08 2. " EXT_INT3_PEND[2] ,External Interrupt 3 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT3_PEND[1] ,External Interrupt 3 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x08 0. " EXT_INT3_PEND[0] ,External Interrupt 3 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x0C "WAKEUP_INT_PEND,External interrupt WAKEUP_INT pending register"
|
|
bitfld.long 0x0C 4. " WAKEUP_INT_PEND[4] ,Wakeup Interrupt Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 3. " WAKEUP_INT_PEND[3] ,Wakeup Interrupt Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " WAKEUP_INT_PEND[2] ,Wakeup Interrupt Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 1. " WAKEUP_INT_PEND[1] ,Wakeup Interrupt Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " WAKEUP_INT_PEND[0] ,Wakeup Interrupt Pending 0" "Not occurred,Occurred"
|
|
line.long 0x10 "EXT_INT5_PEND,External interrupt EXT_INT5 pending register"
|
|
bitfld.long 0x10 4. " EXT_INT5_PEND[4] ,External Interrupt 5 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x10 3. " EXT_INT5_PEND[3] ,External Interrupt 5 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 2. " EXT_INT5_PEND[2] ,External Interrupt 5 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x10 1. " EXT_INT5_PEND[1] ,External Interrupt 5 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 0. " EXT_INT5_PEND[0] ,External Interrupt 5 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x14 "EXT_INT6_PEND,External interrupt EXT_INT6 pending register"
|
|
bitfld.long 0x14 3. " EXT_INT6_PEND[3] ,External Interrupt 6 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " EXT_INT6_PEND[2] ,External Interrupt 6 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT6_PEND[1] ,External Interrupt 6 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " EXT_INT6_PEND[0] ,External Interrupt 6 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x18 "EXT_INT7_PEND,External interrupt EXT_INT7 pending register"
|
|
bitfld.long 0x18 3. " EXT_INT7_PEND[3] ,External Interrupt 7 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x18 2. " EXT_INT7_PEND[2] ,External Interrupt 7 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT7_PEND[1] ,External Interrupt 7 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x18 0. " EXT_INT7_PEND[0] ,External Interrupt 7 Pending 0" "Not occurred,Occurred"
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x1C "EXT_INT8_PEND,External interrupt EXT_INT8 pending register"
|
|
bitfld.long 0x1C 4. " EXT_INT8_PEND[4] ,External Interrupt 8 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 3. " EXT_INT8_PEND[3] ,External Interrupt 8 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 2. " EXT_INT8_PEND[2] ,External Interrupt 8 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x1C 1. " EXT_INT8_PEND[1] ,External Interrupt 8 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT8_PEND[0] ,External Interrupt 8 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x20 "EXT_INT9_PEND,External interrupt EXT_INT9 pending register"
|
|
bitfld.long 0x20 7. " EXT_INT9_PEND[7] ,External Interrupt 9 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x20 6. " EXT_INT9_PEND[6] ,External Interrupt 9 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT9_PEND[5] ,External Interrupt 9 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x20 4. " EXT_INT9_PEND[4] ,External Interrupt 9 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT9_PEND[3] ,External Interrupt 9 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x20 2. " EXT_INT9_PEND[2] ,External Interrupt 9 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT9_PEND[1] ,External Interrupt 9 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x20 0. " EXT_INT9_PEND[0] ,External Interrupt 9 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x24 "EXT_INT10_PEND,External interrupt EXT_INT10 pending register"
|
|
bitfld.long 0x24 5. " EXT_INT10_PEND[5] ,External Interrupt 10 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x24 4. " EXT_INT10_PEND[4] ,External Interrupt 10 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x24 3. " EXT_INT10_PEND[3] ,External Interrupt 10 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x24 2. " EXT_INT10_PEND[2] ,External Interrupt 10 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x24 1. " EXT_INT10_PEND[1] ,External Interrupt 10 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x24 0. " EXT_INT10_PEND[0] ,External Interrupt 10 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x28 "EXT_INT11_PEND,External interrupt EXT_INT11 pending register"
|
|
bitfld.long 0x28 7. " EXT_INT11_PEND[7] ,External Interrupt 11 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x28 6. " EXT_INT11_PEND[6] ,External Interrupt 11 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 5. " EXT_INT11_PEND[5] ,External Interrupt 11 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x28 4. " EXT_INT11_PEND[4] ,External Interrupt 11 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 3. " EXT_INT11_PEND[3] ,External Interrupt 11 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x28 2. " EXT_INT11_PEND[2] ,External Interrupt 11 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x28 1. " EXT_INT11_PEND[1] ,External Interrupt 11 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x28 0. " EXT_INT11_PEND[0] ,External Interrupt 11 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x2C "EXT_INT12_PEND,External interrupt EXT_INT12 pending register"
|
|
bitfld.long 0x2C 7. " EXT_INT12_PEND[7] ,External Interrupt 12 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 6. " EXT_INT12_PEND[6] ,External Interrupt 12 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x2C 5. " EXT_INT12_PEND[5] ,External Interrupt 12 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 4. " EXT_INT12_PEND[4] ,External Interrupt 12 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x2C 3. " EXT_INT12_PEND[3] ,External Interrupt 12 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 2. " EXT_INT12_PEND[2] ,External Interrupt 12 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x2C 1. " EXT_INT12_PEND[1] ,External Interrupt 12 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x2C 0. " EXT_INT12_PEND[0] ,External Interrupt 12 Pending 0" "Not occurred,Occurred"
|
|
endif
|
|
line.long 0x30 "EXT_INT13_PEND,External interrupt EXT_INT13 pending register"
|
|
bitfld.long 0x30 7. " EXT_INT13_PEND[7] ,External Interrupt 13 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x30 6. " EXT_INT13_PEND[6] ,External Interrupt 13 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 5. " EXT_INT13_PEND[5] ,External Interrupt 13 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x30 4. " EXT_INT13_PEND[4] ,External Interrupt 13 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 3. " EXT_INT13_PEND[3] ,External Interrupt 13 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x30 2. " EXT_INT13_PEND[2] ,External Interrupt 13 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x30 1. " EXT_INT13_PEND[1] ,External Interrupt 13 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x30 0. " EXT_INT13_PEND[0] ,External Interrupt 13 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x34 "EXT_INT14_PEND,External interrupt EXT_INT14 pending register"
|
|
bitfld.long 0x34 7. " EXT_INT14_PEND[7] ,External Interrupt 14 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x34 6. " EXT_INT14_PEND[6] ,External Interrupt 14 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x34 5. " EXT_INT14_PEND[5] ,External Interrupt 14 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x34 4. " EXT_INT14_PEND[4] ,External Interrupt 14 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x34 3. " EXT_INT14_PEND[3] ,External Interrupt 14 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x34 2. " EXT_INT14_PEND[2] ,External Interrupt 14 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x34 1. " EXT_INT14_PEND[1] ,External Interrupt 14 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x34 0. " EXT_INT14_PEND[0] ,External Interrupt 14 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x38 "EXT_INT15_PEND,External interrupt EXT_INT15 pending register"
|
|
bitfld.long 0x38 7. " EXT_INT15_PEND[7] ,External Interrupt 15 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x38 6. " EXT_INT15_PEND[6] ,External Interrupt 15 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x38 5. " EXT_INT15_PEND[5] ,External Interrupt 15 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x38 4. " EXT_INT15_PEND[4] ,External Interrupt 15 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x38 3. " EXT_INT15_PEND[3] ,External Interrupt 15 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x38 2. " EXT_INT15_PEND[2] ,External Interrupt 15 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x38 1. " EXT_INT15_PEND[1] ,External Interrupt 15 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x38 0. " EXT_INT15_PEND[0] ,External Interrupt 15 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x3C "EXT_INT16_PEND,External interrupt EXT_INT16 pending register"
|
|
bitfld.long 0x3C 5. " EXT_INT16_PEND[5] ,External Interrupt 16 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x3C 4. " EXT_INT16_PEND[4] ,External Interrupt 16 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x3C 3. " EXT_INT16_PEND[3] ,External Interrupt 16 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x3C 2. " EXT_INT16_PEND[2] ,External Interrupt 16 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x3C 1. " EXT_INT16_PEND[1] ,External Interrupt 16 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x3C 0. " EXT_INT16_PEND[0] ,External Interrupt 16 Pending 0" "Not occurred,Occurred"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "EXT_INT21_PEND,External interrupt EXT_INT21 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT21_PEND[7] ,External Interrupt 21 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT21_PEND[6] ,External Interrupt 21 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT21_PEND[5] ,External Interrupt 21 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT21_PEND[4] ,External Interrupt 21 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT21_PEND[3] ,External Interrupt 21 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT21_PEND[2] ,External Interrupt 21 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT21_PEND[1] ,External Interrupt 21 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT21_PEND[0] ,External Interrupt 21 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "EXT_INT22_PEND,External interrupt EXT_INT22 pending register"
|
|
bitfld.long 0x00 4. " EXT_INT22_PEND[4] ,External Interrupt 22 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT22_PEND[3] ,External Interrupt 22 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT22_PEND[2] ,External Interrupt 22 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT22_PEND[1] ,External Interrupt 22 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT22_PEND[0] ,External Interrupt 22 Pending 0" "Not occurred,Occurred"
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
sif (cpu()=="Exynos4210")
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XA,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XA,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
elif (cpu()=="Exynos4212")
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XB,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "-,EXT_INT1,EXT_INT2,EXT_INT3,EXT_INT4,EXT_INT5,EXT_INT6,EXT_INT7,EXT_INT13,EXT_INT14,EXT_INT15,EXT_INT16,EXT_INT21,EXT_INT22,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XB,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
endif
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
sif (cpu()=="Exynos4210")
|
|
group.long 0xB10++67.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XA,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif (cpu()=="Exynos4212")
|
|
group.long 0xB10++67.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XB,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "EXT_INT1,EXT_INT2,EXT_INT3,EXT_INT4,EXT_INT5,EXT_INT6,EXT_INT7,EXT_INT13,EXT_INT14,EXT_INT15,EXT_INT16,EXT_INT21,EXT_INT22,?..."
|
|
endif
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x4 "EXT_INT1_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT1" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT2_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT2" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT3_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT3" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "WAKEUP_INT_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in WAKEUP_INT" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT5_FIXPRI"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT5" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "EXT_INT6_FIXPRI"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT6" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "EXT_INT7_FIXPRI"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT7" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "EXT_INT8_FIXPRI"
|
|
bitfld.long 0x20 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT8" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "EXT_INT9_FIXPRI"
|
|
bitfld.long 0x24 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT9" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "EXT_INT10_FIXPRI"
|
|
bitfld.long 0x28 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT10" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "EXT_INT11_FIXPRI"
|
|
bitfld.long 0x2C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT11" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "EXT_INT12_FIXPRI"
|
|
bitfld.long 0x30 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT12" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "EXT_INT13_FIXPRI"
|
|
bitfld.long 0x34 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT13" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "EXT_INT14_FIXPRI"
|
|
bitfld.long 0x38 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT14" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "EXT_INT15_FIXPRI"
|
|
bitfld.long 0x3C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT15" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "EXT_INT16_FIXPRI"
|
|
bitfld.long 0x40 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT16" "0,1,2,3,4,5,6,7"
|
|
elif (cpu()=="Exynos4212")
|
|
line.long 0x4 "EXT_INT1_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT1" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT2_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT2" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT3_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT3" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT4_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT4" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT5_FIXPRI"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT5" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "EXT_INT6_FIXPRI"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT6" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "EXT_INT7_FIXPRI"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT7" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "EXT_INT13_FIXPRI"
|
|
bitfld.long 0x34 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT13" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "EXT_INT14_FIXPRI"
|
|
bitfld.long 0x38 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT14" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "EXT_INT15_FIXPRI"
|
|
bitfld.long 0x3C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT15" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "EXT_INT16_FIXPRI"
|
|
bitfld.long 0x40 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT16" "0,1,2,3,4,5,6,7"
|
|
group.long 0xB54++0x07
|
|
line.long 0x00 "EXT_INT21_FIXPRI"
|
|
bitfld.long 0x00 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT21" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT22_FIXPRI"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT22" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
tree "Power down mode pad"
|
|
width 11.
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "PDNEN"
|
|
bitfld.long 0x00 1. " PDNEN_CFG ,Power down mode config" "Auto,PDNEN"
|
|
bitfld.long 0x00 0. " PDNEN ,Power down mode pad state enable register" "Normal mode,Power Down mode"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
base ad:0x11000000
|
|
width 15.
|
|
sif (cpu()=="Exynos4210")
|
|
tree "GPJ0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPJ0CON,Port Group GPJ0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPJ0CON[7] ,GPJ0 Pin 7 Configuration" "Input,Output,CAM_A_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[7]"
|
|
bitfld.long 0x00 24.--27. " GPJ0CON[6] ,GPJ0 Pin 6 Configuration" "Input,Output,CAM_A_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[6]"
|
|
bitfld.long 0x00 20.--23. " GPJ0CON[5] ,GPJ0 Pin 5 Configuration" "Input,Output,CAM_A_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[5]"
|
|
bitfld.long 0x00 16.--19. " GPJ0CON[4] ,GPJ0 Pin 4 Configuration" "Input,Output,CAM_A_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPJ0CON[3] ,GPJ0 Pin 3 Configuration" "Input,Output,CAM_A_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[3]"
|
|
bitfld.long 0x00 8.--11. " GPJ0CON[2] ,GPJ0 Pin 2 Configuration" "Input,Output,CAM_A_HREF,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[2]"
|
|
bitfld.long 0x00 4.--7. " GPJ0CON[1] ,GPJ0 Pin 1 Configuration" "Input,Output,CAM_A_VSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[1]"
|
|
bitfld.long 0x00 0.--3. " GPJ0CON[0] ,GPJ0 Pin 0 Configuration" "Input,Output,CAM_A_PCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT21[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPJ0DAT,Port Group GPJ0 Data Register"
|
|
bitfld.byte 0x00 7. " GPJ0DAT[7] ,GPJ0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPJ0DAT[6] ,GPJ0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPJ0DAT[5] ,GPJ0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPJ0DAT[4] ,GPJ0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPJ0DAT[3] ,GPJ0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPJ0DAT[2] ,GPJ0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPJ0DAT[1] ,GPJ0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPJ0DAT[0] ,GPJ0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPJ0PUD,Port Group GPJ0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0PUD[7] ,GPJ0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPJ0PUD[6] ,GPJ0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPJ0PUD[5] ,GPJ0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPJ0PUD[4] ,GPJ0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0PUD[3] ,GPJ0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ0PUD[2] ,GPJ0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPJ0PUD[1] ,GPJ0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ0PUD[0] ,GPJ0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPJ0DRV,Port Group GPJ0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPJ0DRV[7] ,GPJ0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPJ0DRV[6] ,GPJ0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPJ0DRV[5] ,GPJ0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPJ0DRV[4] ,GPJ0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPJ0DRV[3] ,GPJ0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPJ0DRV[2] ,GPJ0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPJ0DRV[1] ,GPJ0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPJ0DRV[0] ,GPJ0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPJ0CONPDN,Port Group GPJ0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0[7] ,GPJ0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPJ0[6] ,GPJ0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPJ0[5] ,GPJ0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPJ0[4] ,GPJ0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0[3] ,GPJ0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPJ0[2] ,GPJ0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPJ0[1] ,GPJ0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPJ0[0] ,GPJ0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPJ0PUDPDN,Port Group GPJ0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPJ0[7] ,GPJ0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPJ0[6] ,GPJ0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPJ0[5] ,GPJ0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPJ0[4] ,GPJ0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPJ0[3] ,GPJ0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ0[2] ,GPJ0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPJ0[1] ,GPJ0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ0[0] ,GPJ0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPJ1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPJ1CON,Port Group GPJ1 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPJ1CON[4] ,GPJ1 Pin 4 Configuration" "Input,Output,CAM_A_FIELD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[4]"
|
|
bitfld.long 0x00 12.--15. " GPJ1CON[3] ,GPJ1 Pin 3 Configuration" "Input,Output,CAM_A_CLKOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[3]"
|
|
bitfld.long 0x00 8.--11. " GPJ1CON[2] ,GPJ1 Pin 2 Configuration" "Input,Output,CAM_A_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPJ1CON[1] ,GPJ1 Pin 1 Configuration" "Input,Output,CAM_A_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[1]"
|
|
bitfld.long 0x00 0.--3. " GPJ1CON[0] ,GPJ1 Pin 0 Configuration" "Input,Output,CAM_A_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT22[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPJ1DAT,Port Group GPJ1 Data Register"
|
|
bitfld.byte 0x00 4. " GPJ1DAT[4] ,GPJ1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPJ1DAT[3] ,GPJ1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPJ1DAT[2] ,GPJ1 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPJ1DAT[1] ,GPJ1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPJ1DAT[0] ,GPJ1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPJ1PUD,Port Group GPJ1 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1PUD[4] ,GPJ1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPJ1PUD[3] ,GPJ1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ1PUD[2] ,GPJ1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1PUD[1] ,GPJ1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ1PUD[0] ,GPJ1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPJ1DRV,Port Group GPJ1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPJ1DRV[4] ,GPJ1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPJ1DRV[3] ,GPJ1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPJ1DRV[2] ,GPJ1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPJ1DRV[1] ,GPJ1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPJ1DRV[0] ,GPJ1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPJ1CONPDN,Port Group GPJ1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1[4] ,GPJ1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPJ1[3] ,GPJ1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPJ1[2] ,GPJ1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1[1] ,GPJ1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPJ1[0] ,GPJ1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPJ1PUDPDN,Port Group GPJ1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPJ1[4] ,GPJ1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPJ1[3] ,GPJ1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPJ1[2] ,GPJ1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPJ1[1] ,GPJ1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPJ1[0] ,GPJ1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
endif
|
|
tree "GPK0"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "GPK0CON,Port Group GPK0 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPK0CON[6] ,GPK0 Pin 6 Configuration" "Input,Output,SD_0_DATA[3],SD_4_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[6]"
|
|
bitfld.long 0x00 20.--23. " GPK0CON[5] ,GPK0 Pin 5 Configuration" "Input,Output,SD_0_DATA[2],SD_4_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[5]"
|
|
bitfld.long 0x00 16.--19. " GPK0CON[4] ,GPK0 Pin 4 Configuration" "Input,Output,SD_0_DATA[1],SD_4_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[4]"
|
|
bitfld.long 0x00 12.--15. " GPK0CON[3] ,GPK0 Pin 3 Configuration" "Input,Output,SD_0_DATA[0],SD_4_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPK0CON[2] ,GPK0 Pin 2 Configuration" "Input,Output,SD_0_CDn,SD_4_CDn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[2]"
|
|
bitfld.long 0x00 4.--7. " GPK0CON[1] ,GPK0 Pin 1 Configuration" "Input,Output,SD_0_CMD,SD_4_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[1]"
|
|
bitfld.long 0x00 0.--3. " GPK0CON[0] ,GPK0 Pin 0 Configuration" "Input,Output,SD_0_CLK,SD_4_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT23[0]"
|
|
group.byte 0x044++0x00
|
|
line.byte 0x00 "GPK0DAT,Port Group GPK0 Data Register"
|
|
bitfld.byte 0x00 6. " GPK0DAT[6] ,GPK0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPK0DAT[5] ,GPK0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPK0DAT[4] ,GPK0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPK0DAT[3] ,GPK0 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPK0DAT[2] ,GPK0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPK0DAT[1] ,GPK0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPK0DAT[0] ,GPK0 Pin 0 Data" "Low,High"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "GPK0PUD,Port Group GPK0 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK0PUD[6] ,GPK0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK0PUD[5] ,GPK0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK0PUD[4] ,GPK0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK0PUD[3] ,GPK0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK0PUD[2] ,GPK0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK0PUD[1] ,GPK0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK0PUD[0] ,GPK0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "GPK0DRV,Port Group GPK0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPK0DRV[6] ,GPK0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPK0DRV[5] ,GPK0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPK0DRV[4] ,GPK0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPK0DRV[3] ,GPK0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPK0DRV[2] ,GPK0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPK0DRV[1] ,GPK0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPK0DRV[0] ,GPK0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x050++0x01
|
|
line.word 0x00 "GPK0CONPDN,Port Group GPK0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPK0[6] ,GPK0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPK0[5] ,GPK0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPK0[4] ,GPK0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPK0[3] ,GPK0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK0[2] ,GPK0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPK0[1] ,GPK0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPK0[0] ,GPK0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x054++0x01
|
|
line.word 0x00 "GPK0PUDPDN,Port Group GPK0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK0[6] ,GPK0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK0[5] ,GPK0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK0[4] ,GPK0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK0[3] ,GPK0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK0[2] ,GPK0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK0[1] ,GPK0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK0[0] ,GPK0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPK1"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPK1CON,Port Group GPK1 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPK1CON[6] ,GPK1 Pin 6 Configuration" "Input,Output,SD_1_DATA[3],SD_0_DATA[7],SD_4_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[6]"
|
|
bitfld.long 0x00 20.--23. " GPK1CON[5] ,GPK1 Pin 5 Configuration" "Input,Output,SD_1_DATA[2],SD_0_DATA[6],SD_4_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[5]"
|
|
bitfld.long 0x00 16.--19. " GPK1CON[4] ,GPK1 Pin 4 Configuration" "Input,Output,SD_1_DATA[1],SD_0_DATA[5],SD_4_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[4]"
|
|
bitfld.long 0x00 12.--15. " GPK1CON[3] ,GPK1 Pin 3 Configuration" "Input,Output,SD_1_DATA[0],SD_0_DATA[4],SD_4_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[3]"
|
|
textline " "
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
bitfld.long 0x00 8.--11. " GPK1CON[2] ,GPK1 Pin 2 Configuration" "Input,Output,SD_1_CDn,GNSS_GPIO[9],SD_4_nRESET_OUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[2]"
|
|
elif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 8.--11. " GPK1CON[2] ,GPK1 Pin 2 Configuration" "Input,Output,SD_1_CDn,SATA_P0_ACT_LED,SD_4_nRESET_OUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[2]"
|
|
endif
|
|
bitfld.long 0x00 4.--7. " GPK1CON[1] ,GPK1 Pin 1 Configuration" "Input,Output,SD_1_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[1]"
|
|
bitfld.long 0x00 0.--3. " GPK1CON[0] ,GPK1 Pin 0 Configuration" "Input,Output,SD_1_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT24[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPK1DAT,Port Group GPK1 Data Register"
|
|
bitfld.byte 0x00 6. " GPK1DAT[6] ,GPK1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPK1DAT[5] ,GPK1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPK1DAT[4] ,GPK1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPK1DAT[3] ,GPK1 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPK1DAT[2] ,GPK1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPK1DAT[1] ,GPK1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPK1DAT[0] ,GPK1 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPK1PUD,Port Group GPK1 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK1PUD[6] ,GPK1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK1PUD[5] ,GPK1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK1PUD[4] ,GPK1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK1PUD[3] ,GPK1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK1PUD[2] ,GPK1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK1PUD[1] ,GPK1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK1PUD[0] ,GPK1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPK1DRV,Port Group GPK1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPK1DRV[6] ,GPK1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPK1DRV[5] ,GPK1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPK1DRV[4] ,GPK1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPK1DRV[3] ,GPK1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPK1DRV[2] ,GPK1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPK1DRV[1] ,GPK1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPK1DRV[0] ,GPK1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPC0K1NPDN,Port Group GPK1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPK1[6] ,GPK1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPK1[5] ,GPK1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPK1[4] ,GPK1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPK1[3] ,GPK1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK1[2] ,GPK1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPK1[1] ,GPK1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPK1[0] ,GPK1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPK1PUDPDN,Port Group GPK1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK1[6] ,GPK1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK1[5] ,GPK1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK1[4] ,GPK1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK1[3] ,GPK1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK1[2] ,GPK1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK1[1] ,GPK1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK1[0] ,GPK1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPK2"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPK2CON,Port Group GPK2 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPK2CON[6] ,GPK2 Pin 6 Configuration" "Input,Output,SD_2_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[6]"
|
|
bitfld.long 0x00 20.--23. " GPK2CON[5] ,GPK2 Pin 5 Configuration" "Input,Output,SD_2_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[5]"
|
|
bitfld.long 0x00 16.--19. " GPK2CON[4] ,GPK2 Pin 4 Configuration" "Input,Output,SD_2_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[4]"
|
|
bitfld.long 0x00 12.--15. " GPK2CON[3] ,GPK2 Pin 3 Configuration" "Input,Output,SD_2_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[3]"
|
|
textline " "
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 8.--11. " GPK2CON[2] ,GPK2 Pin 2 Configuration" "Input,Output,SD_2_CDn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[2]"
|
|
bitfld.long 0x00 4.--7. " GPK2CON[1] ,GPK2 Pin 1 Configuration" "Input,Output,SD_2_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[1]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 8.--11. " GPK2CON[2] ,GPK2 Pin 2 Configuration" "Input,Output,SD_2_CDn,GNSS_GPIO[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[2]"
|
|
bitfld.long 0x00 4.--7. " GPK2CON[1] ,GPK2 Pin 1 Configuration" "Input,Output,SD_2_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[1]"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " GPK2CON[0] ,GPK2 Pin 0 Configuration" "Input,Output,SD_2_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT25[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPK2DAT,Port Group GPK2 Data Register"
|
|
bitfld.byte 0x00 6. " GPK2DAT[6] ,GPK2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPK2DAT[5] ,GPK2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPK2DAT[4] ,GPK2 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPK2DAT[3] ,GPK2 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPK2DAT[2] ,GPK2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPK2DAT[1] ,GPK2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPK2DAT[0] ,GPK2 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPK2PUD,Port Group GPK2 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK2PUD[6] ,GPK2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK2PUD[5] ,GPK2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK2PUD[4] ,GPK2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK2PUD[3] ,GPK2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK2PUD[2] ,GPK2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK2PUD[1] ,GPK2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK2PUD[0] ,GPK2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPK2DRV,Port Group GPK2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPK2DRV[6] ,GPK2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPK2DRV[5] ,GPK2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPK2DRV[4] ,GPK2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPK2DRV[3] ,GPK2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPK2DRV[2] ,GPK2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPK2DRV[1] ,GPK2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPK2DRV[0] ,GPK2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPK2CONPDN,Port Group GPK@ Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPK2[6] ,GPK2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPK2[5] ,GPK2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPK2[4] ,GPK2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPK2[3] ,GPK2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK2[2] ,GPK2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPK2[1] ,GPK2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPK2[0] ,GPK2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPK2PUDPDN,Port Group GPK2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK2[6] ,GPK2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK2[5] ,GPK2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK2[4] ,GPK2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK2[3] ,GPK2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK2[2] ,GPK2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK2[1] ,GPK2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK2[0] ,GPK2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPK3"
|
|
group.long 0x0A0++0x03
|
|
line.long 0x00 "GPK3CON,Port Group GPK3 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPK3CON[6] ,GPK3 Pin 6 Configuration" "Input,Output,SD_3_DATA[3],SD_2_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[6]"
|
|
bitfld.long 0x00 20.--23. " GPK3CON[5] ,GPK3 Pin 5 Configuration" "Input,Output,SD_2_DATA[2],SD_2_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[5]"
|
|
bitfld.long 0x00 16.--19. " GPK3CON[4] ,GPK3 Pin 4 Configuration" "Input,Output,SD_3_DATA[1],SD_2_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[4]"
|
|
bitfld.long 0x00 12.--15. " GPK3CON[3] ,GPK3 Pin 3 Configuration" "Input,Output,SD_3_DATA[0],SD_2_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[3]"
|
|
textline " "
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 8.--11. " GPK3CON[2] ,GPK3 Pin 2 Configuration" "Input,Output,SD_3_CDn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[2]"
|
|
bitfld.long 0x00 4.--7. " GPK3CON[1] ,GPK3 Pin 1 Configuration" "Input,Output,SD_3_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[1]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 8.--11. " GPK3CON[2] ,GPK3 Pin 2 Configuration" "Input,Output,SD_3_CDn,GNSS_GPIO[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[2]"
|
|
bitfld.long 0x00 4.--7. " GPK3CON[1] ,GPK3 Pin 1 Configuration" "Input,Output,SD_3_CMD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[1]"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " GPK3CON[0] ,GPK3 Pin 0 Configuration" "Input,Output,SD_3_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT26[0]"
|
|
group.byte 0x0A4++0x00
|
|
line.byte 0x00 "GPK3DAT,Port Group GPK3 Data Register"
|
|
bitfld.byte 0x00 6. " GPK3DAT[6] ,GPK3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPK3DAT[5] ,GPK3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPK3DAT[4] ,GPK3 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPK3DAT[3] ,GPK3 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPK3DAT[2] ,GPK3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPK3DAT[1] ,GPK3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPK3DAT[0] ,GPK3 Pin 0 Data" "Low,High"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "GPK3PUD,Port Group GPK3 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK3PUD[6] ,GPK3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK3PUD[5] ,GPK3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK3PUD[4] ,GPK3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK3PUD[3] ,GPK3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK3PUD[2] ,GPK3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK3PUD[1] ,GPK3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK3PUD[0] ,GPK3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "GPK3DRV,Port Group GPK3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPK3DRV[6] ,GPK3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPK3DRV[5] ,GPK3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPK3DRV[4] ,GPK3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPK3DRV[3] ,GPK3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPK3DRV[2] ,GPK3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPK3DRV[1] ,GPK3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPK3DRV[0] ,GPK3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0B0++0x01
|
|
line.word 0x00 "GPK3CONPDN,Port Group GPK@ Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPK3[6] ,GPK3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPK3[5] ,GPK3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPK3[4] ,GPK3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPK3[3] ,GPK3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK3[2] ,GPK3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPK3[1] ,GPK3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPK3[0] ,GPK3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0B4++0x01
|
|
line.word 0x00 "GPK3PUDPDN,Port Group GPK3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPK3[6] ,GPK3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPK3[5] ,GPK3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPK3[4] ,GPK3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPK3[3] ,GPK3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPK3[2] ,GPK3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPK3[1] ,GPK3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPK3[0] ,GPK3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPL0"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPL0CON,Port Group GPL0 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPL0CON[7] ,GPL0 Pin 7 Configuration" "Input,Output,GNSS_CLKREQ,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[7]"
|
|
bitfld.long 0x00 24.--27. " GPL0CON[6] ,GPL0 Pin 6 Configuration" "Input,Output,GNSS_RF_RSTN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[6]"
|
|
bitfld.long 0x00 20.--23. " GPL0CON[5] ,GPL0 Pin 5 Configuration" "Input,Output,GNSS_MCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[5]"
|
|
bitfld.long 0x00 16.--19. " GPL0CON[4] ,GPL0 Pin 4 Configuration" "Input,Output,GNSS_QMAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[4]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 24.--27. " GPL0CON[6] ,GPL0 Pin 6 Configuration" "Input,Output,GNSS_RF_RSTN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[6]"
|
|
bitfld.long 0x00 20.--23. " GPL0CON[5] ,GPL0 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[5]"
|
|
bitfld.long 0x00 16.--19. " GPL0CON[4] ,GPL0 Pin 4 Configuration" "Input,Output,GNSS_QMAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[4]"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPL0CON[3] ,GPL0 Pin 3 Configuration" "Input,Output,GNSS_QSIGN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[3]"
|
|
bitfld.long 0x00 8.--11. " GPL0CON[2] ,GPL0 Pin 2 Configuration" "Input,Output,GNSS_IMAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[2]"
|
|
bitfld.long 0x00 4.--7. " GPL0CON[1] ,GPL0 Pin 1 Configuration" "Input,Output,GNSS_ISIGN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[1]"
|
|
bitfld.long 0x00 0.--3. " GPL0CON[0] ,GPL0 Pin 0 Configuration" "Input,Output,GNSS_SYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT27[0]"
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPL0DAT,Port Group GPL0 Data Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.byte 0x00 7. " GPL0DAT[7] ,GPL0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPL0DAT[6] ,GPL0 Pin 6 Data" "Low,High"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.byte 0x00 6. " GPL0DAT[6] ,GPL0 Pin 6 Data" "Low,High"
|
|
endif
|
|
bitfld.byte 0x00 5. " GPL0DAT[5] ,GPL0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPL0DAT[4] ,GPL0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPL0DAT[3] ,GPL0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPL0DAT[2] ,GPL0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPL0DAT[1] ,GPL0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPL0DAT[0] ,GPL0 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPL0PUD,Port Group GPL0 Pull-up/down Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 14.--15. " GPL0PUD[7] ,GPL0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPL0PUD[6] ,GPL0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 12.--13. " GPL0PUD[6] ,GPL0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
endif
|
|
bitfld.word 0x00 10.--11. " GPL0PUD[5] ,GPL0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPL0PUD[4] ,GPL0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL0PUD[3] ,GPL0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPL0PUD[2] ,GPL0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL0PUD[1] ,GPL0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPL0PUD[0] ,GPL0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPL0DRV,Port Group GPL0 Drive Strength Control Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.tbyte 0x00 14.--15. " GPL0DRV[7] ,GPL0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPL0DRV[6] ,GPL0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.tbyte 0x00 12.--13. " GPL0DRV[6] ,GPL0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
endif
|
|
bitfld.tbyte 0x00 10.--11. " GPL0DRV[5] ,GPL0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPL0DRV[4] ,GPL0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPL0DRV[3] ,GPL0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPL0DRV[2] ,GPL0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPL0DRV[1] ,GPL0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPL0DRV[0] ,GPL0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPL0CONPDN,Port Group GPL0 Power Down Mode Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 14.--15. " GPL0[7] ,GPL0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPL0[6] ,GPL0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 12.--13. " GPL0[6] ,GPL0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
endif
|
|
bitfld.word 0x00 10.--11. " GPL0[5] ,GPL0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPL0[4] ,GPL0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL0[3] ,GPL0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPL0[2] ,GPL0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPL0[1] ,GPL0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPL0[0] ,GPL0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPL0PUDPDN,Port Group GPL0 Power Down Mode Pull-up/down Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 14.--15. " GPL0[7] ,GPL0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPL0[6] ,GPL0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 12.--13. " GPL0[6] ,GPL0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
endif
|
|
bitfld.word 0x00 10.--11. " GPL0[5] ,GPL0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPL0[4] ,GPL0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL0[3] ,GPL0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPL0[2] ,GPL0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL0[1] ,GPL0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPL0[0] ,GPL0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "GPL1"
|
|
group.long 0x0E0++0x03
|
|
line.long 0x00 "GPL1CON,Port Group GPL1 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 8.--11. " GPL1CON[2] ,GPL1 Pin 2 Configuration" "Input,Output,GNSS_EPOCH,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT28[2]"
|
|
bitfld.long 0x00 4.--7. " GPL1CON[1] ,GPL1 Pin 1 Configuration" "Input,Output,GNSS_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT28[1]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 4.--7. " GPL1CON[1] ,GPL1 Pin 1 Configuration" "Input,Output,GNSS_SDA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT28[1]"
|
|
endif
|
|
bitfld.long 0x00 0.--3. " GPL1CON[0] ,GPL1 Pin 0 Configuration" "Input,Output,GNSS_SCL,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT28[0]"
|
|
group.byte 0x0E4++0x00
|
|
line.byte 0x00 "GPL1DAT,Port Group GPL1 Data Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.byte 0x00 2. " GPL1DAT[2] ,GPL1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPL1DAT[1] ,GPL1 Pin 1 Data" "Low,High"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.byte 0x00 1. " GPL1DAT[1] ,GPL1 Pin 1 Data" "Low,High"
|
|
endif
|
|
bitfld.byte 0x00 0. " GPL1DAT[0] ,GPL1 Pin 0 Data" "Low,High"
|
|
group.word 0x0E8++0x01
|
|
line.word 0x00 "GPL1PUD,Port Group GPL1 Pull-up/down Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 4.--5. " GPL1PUD[2] ,GPL1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL1PUD[1] ,GPL1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 2.--3. " GPL1PUD[1] ,GPL1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
endif
|
|
bitfld.word 0x00 0.--1. " GPL1PUD[0] ,GPL1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0EC++0x02
|
|
line.tbyte 0x00 "GPL1DRV,Port Group GPL1 Drive Strength Control Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.tbyte 0x00 4.--5. " GPL1DRV[2] ,GPL1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPL1DRV[1] ,GPL1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.tbyte 0x00 2.--3. " GPL1DRV[1] ,GPL1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
endif
|
|
bitfld.tbyte 0x00 0.--1. " GPL1DRV[0] ,GPL1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0F0++0x01
|
|
line.word 0x00 "GPL1CONPDN,Port Group GPL1 Power Down Mode Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 4.--5. " GPL1[2] ,GPL1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. "GPL1[1] ,GPL1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 2.--3. " GPL1[1] ,GPL1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
endif
|
|
bitfld.word 0x00 0.--1. " GPL1[0] ,GPL1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0F4++0x01
|
|
line.word 0x00 "GPL1PUDPDN,Port Group GPL1 Power Down Mode Pull-up/down Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.word 0x00 4.--5. " GPL1[2] ,GPL1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL1[1] ,GPL1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.word 0x00 2.--3. " GPL1[1] ,GPL1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
endif
|
|
bitfld.word 0x00 0.--1. " GPL1[0] ,GPL1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPL2"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GPL2CON,Port Group GPL2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPL2CON[7] ,GPL2 Pin 7 Configuration" "Input,Output,GNSS_GPIO[7],KP_COL[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[7]"
|
|
bitfld.long 0x00 24.--27. " GPL2CON[6] ,GPL2 Pin 6 Configuration" "Input,Output,GNSS_GPIO[6],KP_COL[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[6]"
|
|
bitfld.long 0x00 20.--23. " GPL2CON[5] ,GPL2 Pin 5 Configuration" "Input,Output,GNSS_GPIO[5],KP_COL[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[5]"
|
|
bitfld.long 0x00 16.--19. " GPL2CON[4] ,GPL2 Pin 4 Configuration" "Input,Output,GNSS_GPIO[4],KP_COL[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPL2CON[3] ,GPL2 Pin 3 Configuration" "Input,Output,GNSS_GPIO[3],KP_COL[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[3]"
|
|
bitfld.long 0x00 8.--11. " GPL2CON[2] ,GPL2 Pin 2 Configuration" "Input,Output,GNSS_GPIO[2],KP_COL[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[2]"
|
|
bitfld.long 0x00 4.--7. " GPL2CON[1] ,GPL2 Pin 1 Configuration" "Input,Output,GNSS_GPIO[1],KP_COL[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[1]"
|
|
bitfld.long 0x00 0.--3. " GPL2CON[0] ,GPL2 Pin 0 Configuration" "Input,Output,GNSS_GPIO[0],KP_COL[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT29[0]"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "GPL2DAT,Port Group GPL2 Data Register"
|
|
bitfld.byte 0x00 7. " GPL2DAT[7] ,GPL2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPL2DAT[6] ,GPL2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPL2DAT[5] ,GPL2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPL2DAT[4] ,GPL2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPL2DAT[3] ,GPL2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPL2DAT[2] ,GPL2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPL2DAT[1] ,GPL2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPL2DAT[0] ,GPL2 Pin 0 Data" "Low,High"
|
|
group.word 0x108++0x01
|
|
line.word 0x00 "GPL2PUD,Port Group GPL2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPL2PUD[7] ,GPL2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPL2PUD[6] ,GPL2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPL2PUD[5] ,GPL2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPL2PUD[4] ,GPL2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL2PUD[3] ,GPL2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPL2PUD[2] ,GPL2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL2PUD[1] ,GPL2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPL2PUD[0] ,GPL2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x10C++0x02
|
|
line.tbyte 0x00 "GPL2DRV,Port Group GPL2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPL2DRV[7] ,GPL2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPL2DRV[6] ,GPL2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPL2DRV[5] ,GPL2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPL2DRV[4] ,GPL2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPL2DRV[3] ,GPL2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPL2DRV[2] ,GPL2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPL2DRV[1] ,GPL2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPL2DRV[0] ,GPL2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x110++0x01
|
|
line.word 0x00 "GPL2CONPDN,Port Group GPL2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPL2[7] ,GPL2 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPL2[6] ,GPL2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPL2[5] ,GPL2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPL2[4] ,GPL2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL2[3] ,GPL2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPL2[2] ,GPL2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPL2[1] ,GPL2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPL2[0] ,GPL2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x114++0x01
|
|
line.word 0x00 "GPL2PUDPDN,Port Group GPL2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPL2[7] ,GPL2 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPL2[6] ,GPL2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPL2[5] ,GPL2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPL2[4] ,GPL2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPL2[3] ,GPL2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPL2[2] ,GPL2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPL2[1] ,GPL2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPL2[0] ,GPL2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY0"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "GPY0CON,Port Group GPY0 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPY0CON[5] ,GPY0 Pin 5 Configuration" "Input,Output,EBI_WEn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY0CON[4] ,GPY0 Pin 4 Configuration" "Input,Output,EBI_OEn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 12.--15. " GPY0CON[3] ,GPY0 Pin 3 Configuration" "Input,Output,SROM_CSn[3],NF_CSn[1],Reserved,OND_CSn[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPY0CON[2] ,GPY0 Pin 2 Configuration" "Input,Output,SROM_CSn[2],NF_CSn[0],Reserved,OND_CSn[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY0CON[1] ,GPY0 Pin 1 Configuration" "Input,Output,SROM_CSn[1],NF_CSn[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY0CON[0] ,GPY0 Pin 0 Configuration" "Input,Output,SROM_CSn[0],NF_CSn[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x124++0x00
|
|
line.byte 0x00 "GPY0DAT,Port Group GPY0 Data Register"
|
|
bitfld.byte 0x00 5. " GPY0DAT[5] ,GPY0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY0DAT[4] ,GPY0 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPY0DAT[3] ,GPY0 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPY0DAT[2] ,GPY0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY0DAT[1] ,GPY0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY0DAT[0] ,GPY0 Pin 0 Data" "Low,High"
|
|
group.word 0x128++0x01
|
|
line.word 0x00 "GPY0PUD,Port Group GPY0 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY0PUD[5] ,GPY0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY0PUD[4] ,GPY0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY0PUD[3] ,GPY0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0PUD[2] ,GPY0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY0PUD[1] ,GPY0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY0PUD[0] ,GPY0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x12C++0x02
|
|
line.tbyte 0x00 "GPY0DRV,Port Group GPY0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPY0DRV[5] ,GPY0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY0DRV[4] ,GPY0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPY0DRV[3] ,GPY0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPY0DRV[2] ,GPY0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY0DRV[1] ,GPY0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY0DRV[0] ,GPY0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x130++0x01
|
|
line.word 0x00 "GPY0CONPDN,Port Group GPY0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPY0[5] ,GPY0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY0[4] ,GPY0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPY0[3] ,GPY0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0[2] ,GPY0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY0[1] ,GPY0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY0[0] ,GPY0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x134++0x01
|
|
line.word 0x00 "GPY0PUDPDN,Port Group GPY0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY0[5] ,GPY0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY0[4] ,GPY0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY0[3] ,GPY0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY0[2] ,GPY0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY0[1] ,GPY0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY0[0] ,GPY0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY1"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "GPY1CON,Port Group GPY1 Configuration Register"
|
|
bitfld.long 0x00 12.--15. " GPY1CON[3] ,GPY1 Pin 3 Configuration" "Input,Output,EBI_DATA_RDn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY1CON[2] ,GPY1 Pin 2 Configuration" "Input,Output,SROM_WAITn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY1CON[1] ,GPY1 Pin 1 Configuration" "Input,Output,EBI_BEn[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY1CON[0] ,GPY1 Pin 0 Configuration" "Input,Output,EBI_BEn[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x144++0x00
|
|
line.byte 0x00 "GPY1DAT,Port Group GPY1 Data Register"
|
|
bitfld.byte 0x00 3. " GPY1DAT[3] ,GPY1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY1DAT[2] ,GPY1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY1DAT[1] ,GPY1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY1DAT[0] ,GPY1 Pin 0 Data" "Low,High"
|
|
group.word 0x148++0x01
|
|
line.word 0x00 "GPY1PUD,Port Group GPY1 Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPY1PUD[3] ,GPY1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY1PUD[2] ,GPY1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY1PUD[1] ,GPY1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY1PUD[0] ,GPY1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x14C++0x02
|
|
line.tbyte 0x00 "GPY1DRV,Port Group GPY1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 6.--7. " GPY1DRV[3] ,GPY1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY1DRV[2] ,GPY1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY1DRV[1] ,GPY1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY1DRV[0] ,GPY1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x150++0x01
|
|
line.word 0x00 "GPY1CONPDN,Port Group GPY1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 6.--7. " GPY1[3] ,GPY1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY1[2] ,GPY1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY1[1] ,GPY1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY1[0] ,GPY1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x154++0x01
|
|
line.word 0x00 "GPY1PUDPDN,Port Group GPY1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 6.--7. " GPY1[3] ,GPY1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY1[2] ,GPY1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY1[1] ,GPY1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY1[0] ,GPY1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY2"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "GPY2CON,Port Group GPY2 Configuration Register"
|
|
bitfld.long 0x00 20.--23. " GPY2CON[5] ,GPY2 Pin 5 Configuration" "Input,Output,NF_RnB[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY2CON[4] ,GPY2 Pin 4 Configuration" "Input,Output,NF_RnB[2],Reserved,Reserved,OND_RPn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 12.--15. " GPY2CON[3] ,GPY2 Pin 3 Configuration" "Input,Output,NF_RnB[1],Reserved,Reserved,OND_INT[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPY2CON[2] ,GPY2 Pin 2 Configuration" "Input,Output,NF_RnB[0],Reserved,Reserved,OND_INT[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY2CON[1] ,GPY2 Pin 1 Configuration" "Input,Output,NF_ALE,Reserved,Reserved,OND_SMCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY2CON[0] ,GPY2 Pin 0 Configuration" "Input,Output,NF_CLE,Reserved,Reserved,OND_ADDRVALID,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x164++0x00
|
|
line.byte 0x00 "GPY2DAT,Port Group GPY2 Data Register"
|
|
bitfld.byte 0x00 5. " GPY2DAT[5] ,GPY2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY2DAT[4] ,GPY2 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPY2DAT[3] ,GPY2 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPY2DAT[2] ,GPY2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY2DAT[1] ,GPY2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY2DAT[0] ,GPY2 Pin 0 Data" "Low,High"
|
|
group.word 0x168++0x01
|
|
line.word 0x00 "GPY2PUD,Port Group GPY2 Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY2PUD[5] ,GPY2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY2PUD[4] ,GPY2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY2PUD[3] ,GPY2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2PUD[2] ,GPY2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY2PUD[1] ,GPY2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY2PUD[0] ,GPY2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x16C++0x02
|
|
line.tbyte 0x00 "GPY2DRV,Port Group GPY2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 10.--11. " GPY2DRV[5] ,GPY2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY2DRV[4] ,GPY2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPY2DRV[3] ,GPY2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPY2DRV[2] ,GPY2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY2DRV[1] ,GPY2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY2DRV[0] ,GPY2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x170++0x01
|
|
line.word 0x00 "GPY2CONPDN,Port Group GPY2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 10.--11. " GPY2[5] ,GPY2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY2[4] ,GPY2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPY2[3] ,GPY2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2[2] ,GPY2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY2[1] ,GPY2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY2[0] ,GPY2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x174++0x01
|
|
line.word 0x00 "GPY2PUDPDN,Port Group GPY2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 10.--11. " GPY2[5] ,GPY2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY2[4] ,GPY2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPY2[3] ,GPY2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPY2[2] ,GPY2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY2[1] ,GPY2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY2[0] ,GPY2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY3"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "GPY3CON,Port Group GPY3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY3CON[7] ,GPY3 Pin 7 Configuration" "Input,Output,EBI_ADDR[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 24.--27. " GPY3CON[6] ,GPY3 Pin 6 Configuration" "Input,Output,EBI_ADDR[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 20.--23. " GPY3CON[5] ,GPY3 Pin 5 Configuration" "Input,Output,EBI_ADDR[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY3CON[4] ,GPY3 Pin 4 Configuration" "Input,Output,EBI_ADDR[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY3CON[3] ,GPY3 Pin 3 Configuration" "Input,Output,EBI_ADDR[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY3CON[2] ,GPY3 Pin 2 Configuration" "Input,Output,EBI_ADDR[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY3CON[1] ,GPY3 Pin 1 Configuration" "Input,Output,EBI_ADDR[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY3CON[0] ,GPY3 Pin 0 Configuration" "Input,Output,EBI_ADDR[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x184++0x00
|
|
line.byte 0x00 "GPY3DAT,Port Group GPY3 Data Register"
|
|
bitfld.byte 0x00 7. " GPY3DAT[7] ,GPY3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY3DAT[6] ,GPY3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY3DAT[5] ,GPY3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY3DAT[4] ,GPY3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY3DAT[3] ,GPY3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY3DAT[2] ,GPY3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY3DAT[1] ,GPY3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY3DAT[0] ,GPY3 Pin 0 Data" "Low,High"
|
|
group.word 0x188++0x01
|
|
line.word 0x00 "GPY3PUD,Port Group GPY3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY3PUD[7] ,GPY3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY3PUD[6] ,GPY3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY3PUD[5] ,GPY3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY3PUD[4] ,GPY3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3PUD[3] ,GPY3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY3PUD[2] ,GPY3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY3PUD[1] ,GPY3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY3PUD[0] ,GPY3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x18C++0x02
|
|
line.tbyte 0x00 "GPY3DRV,Port Group GPY3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY3DRV[7] ,GPY3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY3DRV[6] ,GPY3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY3DRV[5] ,GPY3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY3DRV[4] ,GPY3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY3DRV[3] ,GPY3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY3DRV[2] ,GPY3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY3DRV[1] ,GPY3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY3DRV[0] ,GPY3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x190++0x01
|
|
line.word 0x00 "GPY3CONPDN,Port Group GPY3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY3[7] ,GPY3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY3[6] ,GPY3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY3[5] ,GPY3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY3[4] ,GPY3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3[3] ,GPY3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY3[2] ,GPY3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY3[1] ,GPY3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY3[0] ,GPY3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x194++0x01
|
|
line.word 0x00 "GPY3PUDPDN,Port Group GPY3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY3[7] ,GPY3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY3[6] ,GPY3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY3[5] ,GPY3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY3[4] ,GPY3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY3[3] ,GPY3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY3[2] ,GPY3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY3[1] ,GPY3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY3[0] ,GPY3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY4"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "GPY4CON,Port Group GPY4 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPY4CON[7] ,GPY4 Pin 7 Configuration" "Input,Output,EBI_ADDR[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 24.--27. " GPY4CON[6] ,GPY4 Pin 6 Configuration" "Input,Output,EBI_ADDR[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 20.--23. " GPY4CON[5] ,GPY4 Pin 5 Configuration" "Input,Output,EBI_ADDR[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY4CON[4] ,GPY4 Pin 4 Configuration" "Input,Output,EBI_ADDR[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY4CON[3] ,GPY4 Pin 3 Configuration" "Input,Output,EBI_ADDR[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY4CON[2] ,GPY4 Pin 2 Configuration" "Input,Output,EBI_ADDR[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY4CON[1] ,GPY4 Pin 1 Configuration" "Input,Output,EBI_ADDR[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY4CON[0] ,GPY4 Pin 0 Configuration" "Input,Output,EBI_ADDR[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 28.--31. " GPY4CON[7] ,GPY4 Pin 7 Configuration" "Input,Output,EBI_ADDR[15],Reserved,XhsiCAREADY,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 24.--27. " GPY4CON[6] ,GPY4 Pin 6 Configuration" "Input,Output,EBI_ADDR[14],Reserved,XhsiACFLAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 20.--23. " GPY4CON[5] ,GPY4 Pin 5 Configuration" "Input,Output,EBI_ADDR[13],Reserved,XhsiACDATA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY4CON[4] ,GPY4 Pin 4 Configuration" "Input,Output,EBI_ADDR[12],Reserved,XhsiACWAKE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY4CON[3] ,GPY4 Pin 3 Configuration" "Input,Output,EBI_ADDR[11],Reserved,XhsiACREADY,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY4CON[2] ,GPY4 Pin 2 Configuration" "Input,Output,EBI_ADDR[10],Reserved,XhsiCAFLAG,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY4CON[1] ,GPY4 Pin 1 Configuration" "Input,Output,EBI_ADDR[9],Reserved,XhsiCADATA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY4CON[0] ,GPY4 Pin 0 Configuration" "Input,Output,EBI_ADDR[8],Reserved,XhsiCAWAKE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
endif
|
|
group.byte 0x1A4++0x00
|
|
line.byte 0x00 "GPY4DAT,Port Group GPY4 Data Register"
|
|
bitfld.byte 0x00 7. " GPY4DAT[7] ,GPY4 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY4DAT[6] ,GPY4 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY4DAT[5] ,GPY4 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY4DAT[4] ,GPY4 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY4DAT[3] ,GPY4 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY4DAT[2] ,GPY4 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY4DAT[1] ,GPY4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY4DAT[0] ,GPY4 Pin 0 Data" "Low,High"
|
|
group.word 0x1A8++0x01
|
|
line.word 0x00 "GPY4PUD,Port Group GPY4 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY4PUD[7] ,GPY4 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY4PUD[6] ,GPY4 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY4PUD[5] ,GPY4 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY4PUD[4] ,GPY4 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4PUD[3] ,GPY4 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY4PUD[2] ,GPY4 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY4PUD[1] ,GPY4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY4PUD[0] ,GPY4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1AC++0x02
|
|
line.tbyte 0x00 "GPY4DRV,Port Group GPY4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY4DRV[7] ,GPY4 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY4DRV[6] ,GPY4 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY4DRV[5] ,GPY4 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY4DRV[4] ,GPY4 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY4DRV[3] ,GPY4 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY4DRV[2] ,GPY4 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY4DRV[1] ,GPY4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY4DRV[0] ,GPY4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1B0++0x01
|
|
line.word 0x00 "GPY4CONPDN,Port Group GPY4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY4[7] ,GPY4 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY4[6] ,GPY4 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY4[5] ,GPY4 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY4[4] ,GPY4 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4[3] ,GPY4 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY4[2] ,GPY4 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY4[1] ,GPY4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY4[0] ,GPY4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1B4++0x01
|
|
line.word 0x00 "GPY4PUDPDN,Port Group GPY4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY4[7] ,GPY4 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY4[6] ,GPY4 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY4[5] ,GPY4 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY4[4] ,GPY4 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY4[3] ,GPY4 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY4[2] ,GPY4 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY4[1] ,GPY4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY4[0] ,GPY4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY5"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "GPY5CON,Port Group GPY5 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY5CON[7] ,GPY5 Pin 7 Configuration" "Input,Output,EBI_DATA[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 24.--27. " GPY5CON[6] ,GPY5 Pin 6 Configuration" "Input,Output,EBI_DATA[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 20.--23. " GPY5CON[5] ,GPY5 Pin 5 Configuration" "Input,Output,EBI_DATA[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY5CON[4] ,GPY5 Pin 4 Configuration" "Input,Output,EBI_DATA[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY5CON[3] ,GPY5 Pin 3 Configuration" "Input,Output,EBI_DATA[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY5CON[2] ,GPY5 Pin 2 Configuration" "Input,Output,EBI_DATA[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY5CON[1] ,GPY5 Pin 1 Configuration" "Input,Output,EBI_DATA[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY5CON[0] ,GPY5 Pin 0 Configuration" "Input,Output,EBI_DATA[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x1C4++0x00
|
|
line.byte 0x00 "GPY5DAT,Port Group GPY5 Data Register"
|
|
bitfld.byte 0x00 7. " GPY5DAT[7] ,GPY5 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY5DAT[6] ,GPY5 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY5DAT[5] ,GPY5 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY5DAT[4] ,GPY5 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY5DAT[3] ,GPY5 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY5DAT[2] ,GPY5 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY5DAT[1] ,GPY5 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY5DAT[0] ,GPY5 Pin 0 Data" "Low,High"
|
|
group.word 0x1C8++0x01
|
|
line.word 0x00 "GPY5PUD,Port Group GPY5 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY5PUD[7] ,GPY5 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY5PUD[6] ,GPY5 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY5PUD[5] ,GPY5 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY5PUD[4] ,GPY5 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5PUD[3] ,GPY5 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY5PUD[2] ,GPY5 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY5PUD[1] ,GPY5 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY5PUD[0] ,GPY5 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1CC++0x02
|
|
line.tbyte 0x00 "GPY5DRV,Port Group GPY5 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY5DRV[7] ,GPY5 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY5DRV[6] ,GPY5 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY5DRV[5] ,GPY5 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY5DRV[4] ,GPY5 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY5DRV[3] ,GPY5 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY5DRV[2] ,GPY5 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY5DRV[1] ,GPY5 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY5DRV[0] ,GPY5 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1D0++0x01
|
|
line.word 0x00 "GPY5CONPDN,Port Group GPY5 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY5[7] ,GPY5 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY5[6] ,GPY5 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY5[5] ,GPY5 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY5[4] ,GPY5 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5[3] ,GPY5 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY5[2] ,GPY5 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY5[1] ,GPY5 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY5[0] ,GPY5 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1D4++0x01
|
|
line.word 0x00 "GPY5PUDPDN,Port Group GPY5 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY5[7] ,GPY5 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY5[6] ,GPY5 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY5[5] ,GPY5 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY5[4] ,GPY5 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY5[3] ,GPY5 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY5[2] ,GPY5 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY5[1] ,GPY5 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY5[0] ,GPY5 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPY6"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "GPY6CON,Port Group GPY6 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPY6CON[7] ,GPY6 Pin 7 Configuration" "Input,Output,EBI_DATA[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 24.--27. " GPY6CON[6] ,GPY6 Pin 6 Configuration" "Input,Output,EBI_DATA[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 20.--23. " GPY6CON[5] ,GPY6 Pin 5 Configuration" "Input,Output,EBI_DATA[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 16.--19. " GPY6CON[4] ,GPY6 Pin 4 Configuration" "Input,Output,EBI_DATA[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPY6CON[3] ,GPY6 Pin 3 Configuration" "Input,Output,EBI_DATA[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 8.--11. " GPY6CON[2] ,GPY6 Pin 2 Configuration" "Input,Output,EBI_DATA[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 4.--7. " GPY6CON[1] ,GPY6 Pin 1 Configuration" "Input,Output,EBI_DATA[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
bitfld.long 0x00 0.--3. " GPY6CON[0] ,GPY6 Pin 0 Configuration" "Input,Output,EBI_DATA[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,-"
|
|
group.byte 0x1E4++0x00
|
|
line.byte 0x00 "GPY6DAT,Port Group GPY6 Data Register"
|
|
bitfld.byte 0x00 7. " GPY6DAT[7] ,GPY6 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPY6DAT[6] ,GPY6 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPY6DAT[5] ,GPY6 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPY6DAT[4] ,GPY6 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPY6DAT[3] ,GPY6 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPY6DAT[2] ,GPY6 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPY6DAT[1] ,GPY6 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPY6DAT[0] ,GPY6 Pin 0 Data" "Low,High"
|
|
group.word 0x1E8++0x01
|
|
line.word 0x00 "GPY6PUD,Port Group GPY6 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY6PUD[7] ,GPY6 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY6PUD[6] ,GPY6 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY6PUD[5] ,GPY6 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY6PUD[4] ,GPY6 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6PUD[3] ,GPY6 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY6PUD[2] ,GPY6 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY6PUD[1] ,GPY6 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY6PUD[0] ,GPY6 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x1EC++0x02
|
|
line.tbyte 0x00 "GPY6DRV,Port Group GPY6 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPY6DRV[7] ,GPY6 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPY6DRV[6] ,GPY6 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPY6DRV[5] ,GPY6 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPY6DRV[4] ,GPY6 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPY6DRV[3] ,GPY6 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPY6DRV[2] ,GPY6 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPY6DRV[1] ,GPY6 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPY6DRV[0] ,GPY6 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x1F0++0x01
|
|
line.word 0x00 "GPY6CONPDN,Port Group GPY6 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPY6[7] ,GPY6 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPY6[6] ,GPY6 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPY6[5] ,GPY6 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPY6[4] ,GPY6 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6[3] ,GPY6 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPY6[2] ,GPY6 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPY6[1] ,GPY6 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPY6[0] ,GPY6 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x1F4++0x01
|
|
line.word 0x00 "GPY6PUDPDN,Port Group GPY6 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPY6[7] ,GPY6 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPY6[6] ,GPY6 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPY6[5] ,GPY6 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPY6[4] ,GPY6 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPY6[3] ,GPY6 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPY6[2] ,GPY6 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPY6[1] ,GPY6 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPY6[0] ,GPY6 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
width 12.
|
|
tree "ETC0"
|
|
group.word 0x208++0x01
|
|
line.word 0x00 "ETC0PUD,Port group ETC0 pull-up/down register"
|
|
bitfld.word 0x00 10.--11. " ETC0PUD[5] ,ETC0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " ETC0PUD[4] ,ETC0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " ETC0PUD[3] ,ETC0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " ETC0PUD[2] ,ETC0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " ETC0PUD[1] ,ETC0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC0PUD[0] ,ETC0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x20C++0x02
|
|
line.tbyte 0x00 "ETC0DRV,Port group ETC0 drive strength control register"
|
|
bitfld.tbyte 0x00 10.--11. " ETC0DRV[5] ,ETC0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " ETC0DRV[4] ,ETC0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " ETC0DRV[3] ,ETC0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " ETC0DRV[2] ,ETC0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " ETC0DRV[1] ,ETC0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC0DRV[0] ,ETC0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
endif
|
|
tree "ETC6"
|
|
group.word 0x228++0x01
|
|
line.word 0x00 "ETC6PUD,Port group ETC6 pull-up/down register"
|
|
bitfld.word 0x00 14.--15. " ETC6PUD[7] ,ETC6 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " ETC6PUD[6] ,ETC6 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " ETC6PUD[5] ,ETC6 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " ETC6PUD[4] ,ETC6 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " ETC6PUD[3] ,ETC6 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " ETC6PUD[2] ,ETC6 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " ETC6PUD[1] ,ETC6 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC6PUD[0] ,ETC6 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x22C++0x02
|
|
line.tbyte 0x00 "ETC6DRV,Port group ETC6 drive strength control register"
|
|
bitfld.tbyte 0x00 14.--15. " ETC6DRV[7] ,ETC6 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " ETC6DRV[6] ,ETC6 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " ETC6DRV[5] ,ETC6 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " ETC6DRV[4] ,ETC6 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " ETC6DRV[3] ,ETC6 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " ETC6DRV[2] ,ETC6 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " ETC6DRV[1] ,ETC6 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC6DRV[0] ,ETC6 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
width 15.
|
|
tree "GPM0"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "GPM0CON,Port Group GPM0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPM0CON[7] ,GPM0 Pin 7 Configuration" "Input,Output,Reserved,CAM_B_DATA[6],XhsiCAFLAG,TraceData[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[7]"
|
|
bitfld.long 0x00 24.--27. " GPM0CON[6] ,GPM0 Pin 6 Configuration" "Input,Output,Reserved,CAM_B_DATA[5],XhsiCADATA,TraceData[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[6]"
|
|
bitfld.long 0x00 20.--23. " GPM0CON[5] ,GPM0 Pin 5 Configuration" "Input,Output,Reserved,CAM_B_DATA[4],XhsiCAWAKE,TraceData[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[5]"
|
|
bitfld.long 0x00 16.--19. " GPM0CON[4] ,GPM0 Pin 4 Configuration" "Input,Output,Reserved,CAM_B_DATA[3],TS_ERROR,TraceData[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPM0CON[3] ,GPM0 Pin 3 Configuration" "Input,Output,Reserved,CAM_B_DATA[2],TS_DATA,TraceData[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[3]"
|
|
bitfld.long 0x00 8.--11. " GPM0CON[2] ,GPM0 Pin 2 Configuration" "Input,Output,Reserved,CAM_B_DATA[1],TS_VAL,TraceData[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[2]"
|
|
bitfld.long 0x00 4.--7. " GPM0CON[1] ,GPM0 Pin 1 Configuration" "Input,Output,Reserved,CAM_B_DATA[0],TS_SYNC,TraceData[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[1]"
|
|
bitfld.long 0x00 0.--3. " GPM0CON[0] ,GPM0 Pin 0 Configuration" "Input,Output,Reserved,CAM_B_PCLK,TS_CLK,TraceClk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT8[0]"
|
|
group.byte 0x264++0x00
|
|
line.byte 0x00 "GPM0DAT,Port Group GPM0 Data Register"
|
|
bitfld.byte 0x00 7. " GPM0DAT[7] ,GPM0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPM0DAT[6] ,GPM0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPM0DAT[5] ,GPM0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPM0DAT[4] ,GPM0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPM0DAT[3] ,GPM0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPM0DAT[2] ,GPM0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPM0DAT[1] ,GPM0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPM0DAT[0] ,GPM0 Pin 0 Data" "Low,High"
|
|
group.word 0x268++0x01
|
|
line.word 0x00 "GPM0PUD,Port Group GPM0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM0PUD[7] ,GPM0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM0PUD[6] ,GPM0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM0PUD[5] ,GPM0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM0PUD[4] ,GPM0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM0PUD[3] ,GPM0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM0PUD[2] ,GPM0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM0PUD[1] ,GPM0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM0PUD[0] ,GPM0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x26C++0x02
|
|
line.tbyte 0x00 "GPM0DRV,Port Group GPM0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPM0DRV[7] ,GPM0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPM0DRV[6] ,GPM0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPM0DRV[5] ,GPM0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPM0DRV[4] ,GPM0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPM0DRV[3] ,GPM0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPM0DRV[2] ,GPM0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPM0DRV[1] ,GPM0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPM0DRV[0] ,GPM0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x270++0x01
|
|
line.word 0x00 "GPM0CONPDN,Port Group GPM0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPM0[7] ,GPM0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPM0[6] ,GPM0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPM0[5] ,GPM0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPM0[4] ,GPM0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM0[3] ,GPM0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPM0[2] ,GPM0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPM0[1] ,GPM0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPM0[0] ,GPM0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x274++0x01
|
|
line.word 0x00 "GPM0PUDPDN,Port Group GPM0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM0[7] ,GPM0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM0[6] ,GPM0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM0[5] ,GPM0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM0[4] ,GPM0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM0[3] ,GPM0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM0[2] ,GPM0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM0[1] ,GPM0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM0[0] ,GPM0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPM1"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "GPM1CON,Port Group GPM1 Configuration Register"
|
|
bitfld.long 0x00 24.--27. " GPM1CON[6] ,GPM1 Pin 6 Configuration" "Input,Output,CAM_BAY_RGB[13],Reserved,Reserved,TraceData[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[6]"
|
|
bitfld.long 0x00 20.--23. " GPM1CON[5] ,GPM1 Pin 5 Configuration" "Input,Output,CAM_BAY_RGB[12],Reserved,Reserved,TraceData[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[5]"
|
|
bitfld.long 0x00 16.--19. " GPM1CON[4] ,GPM1 Pin 4 Configuration" "Input,Output,CAM_BAY_RGB[11],Reserved,XhsiCAREADY,TraceData[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[4]"
|
|
bitfld.long 0x00 12.--15. " GPM1CON[3] ,GPM1 Pin 3 Configuration" "Input,Output,CAM_BAY_RGB[10],Reserved,XhsiACFLAG,TraceData[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPM1CON[2] ,GPM1 Pin 2 Configuration" "Input,Output,CAM_BAY_RGB[9],Reserved,XhsiACDATA,TraceData[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[2]"
|
|
bitfld.long 0x00 4.--7. " GPM1CON[1] ,GPM1 Pin 1 Configuration" "Input,Output,CAM_BAY_RGB[8],CAM_B_FIELD,XhsiACWAKE,TraceCtl,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[1]"
|
|
bitfld.long 0x00 0.--3. " GPM1CON[0] ,GPM1 Pin 0 Configuration" "Input,Output,Reserved,CAM_B_DATA[7],XhsiACREADY,TraceData[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT9[0],?..."
|
|
group.byte 0x284++0x00
|
|
line.byte 0x00 "GPM1DAT,Port Group GPM1 Data Register"
|
|
bitfld.byte 0x00 6. " GPM1DAT[6] ,GPM1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPM1DAT[5] ,GPM1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPM1DAT[4] ,GPM1 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPM1DAT[3] ,GPM1 Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPM1DAT[2] ,GPM1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPM1DAT[1] ,GPM1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPM1DAT[0] ,GPM1 Pin 0 Data" "Low,High"
|
|
group.word 0x288++0x01
|
|
line.word 0x00 "GPM1PUD,Port Group GPM1 Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPM1PUD[6] ,GPM1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM1PUD[5] ,GPM1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM1PUD[4] ,GPM1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPM1PUD[3] ,GPM1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPM1PUD[2] ,GPM1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM1PUD[1] ,GPM1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM1PUD[0] ,GPM1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x28C++0x02
|
|
line.tbyte 0x00 "GPM1DRV,Port Group GPM1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPM1DRV[6] ,GPM1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPM1DRV[5] ,GPM1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPM1DRV[4] ,GPM1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPM1DRV[3] ,GPM1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPM1DRV[2] ,GPM1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPM1DRV[1] ,GPM1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPM1DRV[0] ,GPM1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x290++0x01
|
|
line.word 0x00 "GPM1CONPDN,Port Group GPM1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPM1[6] ,GPM1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPM1[5] ,GPM1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPM1[4] ,GPM1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPM1[3] ,GPM1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPM1[2] ,GPM1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPM1[1] ,GPM1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPM1[0] ,GPM1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x294++0x01
|
|
line.word 0x00 "GPM1PUDPDN,Port Group GPM1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPM1[6] ,GPM1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM1[5] ,GPM1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM1[4] ,GPM1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPM1[3] ,GPM1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPM1[2] ,GPM1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM1[1] ,GPM1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM1[0] ,GPM1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPM2"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "GPM2CON,Port Group GPM2 Configuration Register"
|
|
bitfld.long 0x00 16.--19. " GPM2CON[4] ,GPM2 Pin 4 Configuration" "Input,Output,CAM_GPIO[1],MPWM2_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[4]"
|
|
bitfld.long 0x00 12.--15. " GPM2CON[3] ,GPM2 Pin 3 Configuration" "Input,Output,CAM_GPIO[0],MPWM1_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[3]"
|
|
bitfld.long 0x00 8.--11. " GPM2CON[2] ,GPM2 Pin 2 Configuration" "Input,Output,Reserved,CAM_B_CLKOUT,Reserved,TraceData[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " GPM2CON[1] ,GPM2 Pin 1 Configuration" "Input,Output,Reserved,CAM_B_HREF,Reserved,TraceData[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[1]"
|
|
bitfld.long 0x00 0.--3. " GPM2CON[0] ,GPM2 Pin 0 Configuration" "Input,Output,Reserved,CAM_B_VSYNC,Reserved,TraceData[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT10[0],?..."
|
|
group.byte 0x2A4++0x00
|
|
line.byte 0x00 "GPM2DAT,Port Group GPM2 Data Register"
|
|
bitfld.byte 0x00 4. " GPM2DAT[4] ,GPM2 Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPM2DAT[3] ,GPM2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPM2DAT[2] ,GPM2 Pin 2 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " GPM2DAT[1] ,GPM2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPM2DAT[0] ,GPM2 Pin 0 Data" "Low,High"
|
|
group.word 0x2A8++0x01
|
|
line.word 0x00 "GPM2PUD,Port Group GPM2 Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPM2PUD[4] ,GPM2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPM2PUD[3] ,GPM2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM2PUD[2] ,GPM2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPM2PUD[1] ,GPM2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM2PUD[0] ,GPM2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x2AC++0x02
|
|
line.tbyte 0x00 "GPM2DRV,Port Group GPM2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 8.--9. " GPM2DRV[4] ,GPM2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPM2DRV[3] ,GPM2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPM2DRV[2] ,GPM2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 2.--3. " GPM2DRV[1] ,GPM2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPM2DRV[0] ,GPM2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x2B0++0x01
|
|
line.word 0x00 "GPM2CONPDN,Port Group GPM2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 8.--9. " GPM2[4] ,GPM2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPM2[3] ,GPM2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPM2[2] ,GPM2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPM2[1] ,GPM2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPM2[0] ,GPM2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x2B4++0x01
|
|
line.word 0x00 "GPM2PUDPDN,Port Group GPM2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 8.--9. " GPM2[4] ,GPM2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPM2[3] ,GPM2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM2[2] ,GPM2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " GPM2[1] ,GPM2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM2[0] ,GPM2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPM3"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "GPM3CON,Port Group GPM3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPM3CON[7] ,GPM3 Pin 7 Configuration" "Input,Output,CAM_GPIO[9],RXD_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[7]"
|
|
bitfld.long 0x00 24.--27. " GPM3CON[6] ,GPM3 Pin 6 Configuration" "Input,Output,CAM_GPIO[8],nCTS_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[6]"
|
|
bitfld.long 0x00 20.--23. " GPM3CON[5] ,GPM3 Pin 5 Configuration" "Input,Output,CAM_GPIO[7],TXD_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[5]"
|
|
bitfld.long 0x00 16.--19. " GPM3CON[4] ,GPM3 Pin 4 Configuration" "Input,Output,CAM_GPIO[6],nRTS_UART_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPM3CON[3] ,GPM3 Pin 3 Configuration" "Input,Output,CAM_GPIO[5],MPWM6_OUT_ISP,CAM_SPI1_MOSI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[3]"
|
|
bitfld.long 0x00 8.--11. " GPM3CON[2] ,GPM3 Pin 2 Configuration" "Input,Output,CAM_GPIO[4],MPWM5_OUT_ISP,CAM_SPI1_MISO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[2]"
|
|
bitfld.long 0x00 4.--7. " GPM3CON[1] ,GPM3 Pin 1 Configuration" "Input,Output,CAM_GPIO[3],MPWM4_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[1]"
|
|
bitfld.long 0x00 0.--3. " GPM3CON[0] ,GPM3 Pin 0 Configuration" "Input,Output,CAM_GPIO[2],MPWM3_OUT_ISP,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT11[0]"
|
|
group.byte 0x2C4++0x00
|
|
line.byte 0x00 "GPM3DAT,Port Group GPM3 Data Register"
|
|
bitfld.byte 0x00 7. " GPM3DAT[7] ,GPM3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPM3DAT[6] ,GPM3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPM3DAT[5] ,GPM3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPM3DAT[4] ,GPM3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPM3DAT[3] ,GPM3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPM3DAT[2] ,GPM3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPM3DAT[1] ,GPM3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPM3DAT[0] ,GPM3 Pin 0 Data" "Low,High"
|
|
group.word 0x2C8++0x01
|
|
line.word 0x00 "GPM3PUD,Port Group GPM3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM3PUD[7] ,GPM3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM3PUD[6] ,GPM3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM3PUD[5] ,GPM3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM3PUD[4] ,GPM3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM3PUD[3] ,GPM3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM3PUD[2] ,GPM3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM3PUD[1] ,GPM3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM3PUD[0] ,GPM3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x2CC++0x02
|
|
line.tbyte 0x00 "GPM3DRV,Port Group GPM3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPM3DRV[7] ,GPM3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPM3DRV[6] ,GPM3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPM3DRV[5] ,GPM3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPM3DRV[4] ,GPM3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPM3DRV[3] ,GPM3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPM3DRV[2] ,GPM3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPM3DRV[1] ,GPM3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPM3DRV[0] ,GPM3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x2D0++0x01
|
|
line.word 0x00 "GPM3CONPDN,Port Group GPM3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPM3[7] ,GPM3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPM3[6] ,GPM3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPM3[5] ,GPM3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPM3[4] ,GPM3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM3[3] ,GPM3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPM3[2] ,GPM3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPM3[1] ,GPM3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPM3[0] ,GPM3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x2D4++0x01
|
|
line.word 0x00 "GPM3PUDPDN,Port Group GPM3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM3[7] ,GPM3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM3[6] ,GPM3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM3[5] ,GPM3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM3[4] ,GPM3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM3[3] ,GPM3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM3[2] ,GPM3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM3[1] ,GPM3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM3[0] ,GPM3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPM4"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "GPM4CON,Port Group GPM4 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPM4CON[7] ,GPM4 Pin 7 Configuration" "Input,Output,CAM_SPI_MOSI,CAM_GPIO[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[7]"
|
|
bitfld.long 0x00 24.--27. " GPM4CON[6] ,GPM4 Pin 6 Configuration" "Input,Output,CAM_SPI_MISO,CAM_GPIO[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[6]"
|
|
bitfld.long 0x00 20.--23. " GPM4CON[5] ,GPM4 Pin 5 Configuration" "Input,Output,CAM_SPI_nSS,CAM_GPIO[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[5]"
|
|
bitfld.long 0x00 16.--19. " GPM4CON[4] ,GPM4 Pin 4 Configuration" "Input,Output,CAM_SPI_CLK,CAM_GPIO[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPM4CON[3] ,GPM4 Pin 3 Configuration" "Input,Output,CAM_I2C1_SDA,CAM_GPIO[13],CAM_SPI1_nSS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[3]"
|
|
bitfld.long 0x00 8.--11. " GPM4CON[2] ,GPM4 Pin 2 Configuration" "Input,Output,CAM_I2C1_SCL,CAM_GPIO[12],CAM_SPI1_CLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[2]"
|
|
bitfld.long 0x00 4.--7. " GPM4CON[1] ,GPM4 Pin 1 Configuration" "Input,Output,CAM_I2C0_SDA,CAM_GPIO[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[1]"
|
|
bitfld.long 0x00 0.--3. " GPM4CON[0] ,GPM4 Pin 0 Configuration" "Input,Output,CAM_I2C0_SCL,CAM_GPIO[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT12[0]"
|
|
group.byte 0x2E4++0x00
|
|
line.byte 0x00 "GPM4DAT,Port Group GPM4 Data Register"
|
|
bitfld.byte 0x00 7. " GPM4DAT[7] ,GPM4 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPM4DAT[6] ,GPM4 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPM4DAT[5] ,GPM4 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPM4DAT[4] ,GPM4 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPM4DAT[3] ,GPM4 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPM4DAT[2] ,GPM4 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPM4DAT[1] ,GPM4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPM4DAT[0] ,GPM4 Pin 0 Data" "Low,High"
|
|
group.word 0x2E8++0x01
|
|
line.word 0x00 "GPM4PUD,Port Group GPM4 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM4PUD[7] ,GPM4 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM4PUD[6] ,GPM4 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM4PUD[5] ,GPM4 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM4PUD[4] ,GPM4 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM4PUD[3] ,GPM4 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM4PUD[2] ,GPM4 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM4PUD[1] ,GPM4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM4PUD[0] ,GPM4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x2EC++0x02
|
|
line.tbyte 0x00 "GPM4DRV,Port Group GPM4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPM4DRV[7] ,GPM4 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPM4DRV[6] ,GPM4 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPM4DRV[5] ,GPM4 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPM4DRV[4] ,GPM4 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPM4DRV[3] ,GPM4 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPM4DRV[2] ,GPM4 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPM4DRV[1] ,GPM4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPM4DRV[0] ,GPM4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x2F0++0x01
|
|
line.word 0x00 "GPM4CONPDN,Port Group GPM4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPM4[7] ,GPM4 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPM4[6] ,GPM4 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPM4[5] ,GPM4 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPM4[4] ,GPM4 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM4[3] ,GPM4 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPM4[2] ,GPM4 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPM4[1] ,GPM4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPM4[0] ,GPM4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x2F4++0x01
|
|
line.word 0x00 "GPM4PUDPDN,Port Group GPM4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPM4[7] ,GPM4 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPM4[6] ,GPM4 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPM4[5] ,GPM4 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPM4[4] ,GPM4 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPM4[3] ,GPM4 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPM4[2] ,GPM4 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPM4[1] ,GPM4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPM4[0] ,GPM4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
endif
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++35.
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x00 "EXT_INT21_CON,External interrupt EXT_INT21 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT21_CON[7] ,Setting the signaling method of EXT_INT21[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT21_CON[6] ,Setting the signaling method of EXT_INT21[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT21_CON[5] ,Setting the signaling method of EXT_INT21[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT21_CON[4] ,Setting the signaling method of EXT_INT21[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT21_CON[3] ,Setting the signaling method of EXT_INT21[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT21_CON[2] ,Setting the signaling method of EXT_INT21[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT21_CON[1] ,Setting the signaling method of EXT_INT21[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT21_CON[0] ,Setting the signaling method of EXT_INT21[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x04 "EXT_INT22_CON,External interrupt EXT_INT22 configuration register"
|
|
bitfld.long 0x04 16.--18. " EXT_INT22_CON[4] ,Setting the signaling method of EXT_INT22[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 12.--14. " EXT_INT22_CON[3] ,Setting the signaling method of EXT_INT22[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 8.--10. " EXT_INT22_CON[2] ,Setting the signaling method of EXT_INT22[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " EXT_INT22_CON[1] ,Setting the signaling method of EXT_INT22[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 0.--2. " EXT_INT22_CON[0] ,Setting the signaling method of EXT_INT22[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
endif
|
|
line.long 0x08 "EXT_INT23_CON,External interrupt EXT_INT23 configuration register"
|
|
bitfld.long 0x08 24.--26. " EXT_INT23_CON[6] ,Setting the signaling method of EXT_INT23[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 20.--22. " EXT_INT23_CON[5] ,Setting the signaling method of EXT_INT23[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 16.--18. " EXT_INT23_CON[4] ,Setting the signaling method of EXT_INT23[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--14. " EXT_INT23_CON[3] ,Setting the signaling method of EXT_INT23[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 8.--10. " EXT_INT23_CON[2] ,Setting the signaling method of EXT_INT23[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 4.--6. " EXT_INT23_CON[1] ,Setting the signaling method of EXT_INT23[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " EXT_INT23_CON[0] ,Setting the signaling method of EXT_INT23[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x0C "EXT_INT24_CON,External interrupt EXT_INT24 configuration register"
|
|
bitfld.long 0x0C 24.--26. " EXT_INT24_CON[6] ,Setting the signaling method of EXT_INT24[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 20.--22. " EXT_INT24_CON[5] ,Setting the signaling method of EXT_INT24[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 16.--18. " EXT_INT24_CON[4] ,Setting the signaling method of EXT_INT24[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--14. " EXT_INT24_CON[3] ,Setting the signaling method of EXT_INT24[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 8.--10. " EXT_INT24_CON[2] ,Setting the signaling method of EXT_INT24[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 4.--6. " EXT_INT24_CON[1] ,Setting the signaling method of EXT_INT24[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--2. " EXT_INT24_CON[0] ,Setting the signaling method of EXT_INT24[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x10 "EXT_INT25_CON,External interrupt EXT_INT25 configuration register"
|
|
bitfld.long 0x10 24.--26. " EXT_INT25_CON[6] ,Setting the signaling method of EXT_INT25[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 20.--22. " EXT_INT25_CON[5] ,Setting the signaling method of EXT_INT25[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 16.--18. " EXT_INT25_CON[4] ,Setting the signaling method of EXT_INT25[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " EXT_INT25_CON[3] ,Setting the signaling method of EXT_INT25[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 8.--10. " EXT_INT25_CON[2] ,Setting the signaling method of EXT_INT25[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x10 4.--6. " EXT_INT25_CON[1] ,Setting the signaling method of EXT_INT25[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x10 0.--2. " EXT_INT25_CON[0] ,Setting the signaling method of EXT_INT25[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x14 "EXT_INT26_CON,External interrupt EXT_INT26 configuration register"
|
|
bitfld.long 0x14 24.--26. " EXT_INT26_CON[6] ,Setting the signaling method of EXT_INT26[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 20.--22. " EXT_INT26_CON[5] ,Setting the signaling method of EXT_INT26[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 16.--18. " EXT_INT26_CON[4] ,Setting the signaling method of EXT_INT26[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x14 12.--14. " EXT_INT26_CON[3] ,Setting the signaling method of EXT_INT26[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 8.--10. " EXT_INT26_CON[2] ,Setting the signaling method of EXT_INT26[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x14 4.--6. " EXT_INT26_CON[1] ,Setting the signaling method of EXT_INT26[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x14 0.--2. " EXT_INT26_CON[0] ,Setting the signaling method of EXT_INT26[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x18 "EXT_INT27_CON,External interrupt EXT_INT27 configuration register"
|
|
bitfld.long 0x18 28.--30. " EXT_INT27_CON[7] ,Setting the signaling method of EXT_INT27[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 24.--26. " EXT_INT27_CON[6] ,Setting the signaling method of EXT_INT27[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 20.--22. " EXT_INT27_CON[5] ,Setting the signaling method of EXT_INT27[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x18 16.--18. " EXT_INT27_CON[4] ,Setting the signaling method of EXT_INT27[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 12.--14. " EXT_INT27_CON[3] ,Setting the signaling method of EXT_INT27[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 8.--10. " EXT_INT27_CON[2] ,Setting the signaling method of EXT_INT27[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x18 4.--6. " EXT_INT27_CON[1] ,Setting the signaling method of EXT_INT27[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x18 0.--2. " EXT_INT27_CON[0] ,Setting the signaling method of EXT_INT27[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x1C "EXT_INT28_CON,External interrupt EXT_INT28 configuration register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x1C 8.--10. " EXT_INT28_CON[2] ,Setting the signaling method of EXT_INT28[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
endif
|
|
bitfld.long 0x1C 4.--6. " EXT_INT28_CON[1] ,Setting the signaling method of EXT_INT28[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x1C 0.--2. " EXT_INT28_CON[0] ,Setting the signaling method of EXT_INT28[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x20 "EXT_INT29_CON,External interrupt EXT_INT29 configuration register"
|
|
bitfld.long 0x20 28.--30. " EXT_INT29_CON[7] ,Setting the signaling method of EXT_INT29[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 24.--26. " EXT_INT29_CON[6] ,Setting the signaling method of EXT_INT29[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 20.--22. " EXT_INT29_CON[5] ,Setting the signaling method of EXT_INT29[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 16.--18. " EXT_INT29_CON[4] ,Setting the signaling method of EXT_INT29[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 12.--14. " EXT_INT29_CON[3] ,Setting the signaling method of EXT_INT29[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 8.--10. " EXT_INT29_CON[2] ,Setting the signaling method of EXT_INT29[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x20 4.--6. " EXT_INT29_CON[1] ,Setting the signaling method of EXT_INT29[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x20 0.--2. " EXT_INT29_CON[0] ,Setting the signaling method of EXT_INT29[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x728++19.
|
|
line.long 0x00 "EXT_INT9_CON,External interrupt EXT_INT9 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT9_CON[7] ,Setting the signaling method of EXT_INT9[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT9_CON[6] ,Setting the signaling method of EXT_INT9[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT9_CON[5] ,Setting the signaling method of EXT_INT9[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT9_CON[4] ,Setting the signaling method of EXT_INT9[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT9_CON[3] ,Setting the signaling method of EXT_INT9[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT9_CON[2] ,Setting the signaling method of EXT_INT9[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT9_CON[1] ,Setting the signaling method of EXT_INT9[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT9_CON[0] ,Setting the signaling method of EXT_INT9[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x04 "EXT_INT10_CON,External interrupt EXT_INT10 configuration register"
|
|
bitfld.long 0x04 16.--18. " EXT_INT10_CON[4] ,Setting the signaling method of EXT_INT10[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 12.--14. " EXT_INT10_CON[3] ,Setting the signaling method of EXT_INT10[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 8.--10. " EXT_INT10_CON[2] ,Setting the signaling method of EXT_INT10[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " EXT_INT10_CON[1] ,Setting the signaling method of EXT_INT10[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x04 0.--2. " EXT_INT10_CON[0] ,Setting the signaling method of EXT_INT10[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x08 "EXT_INT11_CON,External interrupt EXT_INT11 configuration register"
|
|
bitfld.long 0x08 28.--30. " EXT_INT11_CON[7] ,Setting the signaling method of EXT_INT11[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 24.--26. " EXT_INT11_CON[6] ,Setting the signaling method of EXT_INT11[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 20.--22. " EXT_INT11_CON[5] ,Setting the signaling method of EXT_INT11[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " EXT_INT11_CON[4] ,Setting the signaling method of EXT_INT11[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 12.--14. " EXT_INT11_CON[3] ,Setting the signaling method of EXT_INT11[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 8.--10. " EXT_INT11_CON[2] ,Setting the signaling method of EXT_INT11[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " EXT_INT11_CON[1] ,Setting the signaling method of EXT_INT11[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x08 0.--2. " EXT_INT11_CON[0] ,Setting the signaling method of EXT_INT11[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x0C "EXT_INT12_CON,External interrupt EXT_INT12 configuration register"
|
|
bitfld.long 0x0C 28.--30. " EXT_INT12_CON[7] ,Setting the signaling method of EXT_INT12[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 24.--26. " EXT_INT12_CON[6] ,Setting the signaling method of EXT_INT12[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 20.--22. " EXT_INT12_CON[5] ,Setting the signaling method of EXT_INT12[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 16.--18. " EXT_INT12_CON[4] ,Setting the signaling method of EXT_INT12[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 12.--14. " EXT_INT12_CON[3] ,Setting the signaling method of EXT_INT12[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 8.--10. " EXT_INT12_CON[2] ,Setting the signaling method of EXT_INT12[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 4.--6. " EXT_INT12_CON[1] ,Setting the signaling method of EXT_INT12[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0C 0.--2. " EXT_INT12_CON[0] ,Setting the signaling method of EXT_INT12[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++71.
|
|
sif !((cpu()=="Exynos4212")&&((1.==1.)||(1.==2.)))
|
|
line.long 0. "EXT_INT21_FLTCON0"
|
|
bitfld.long 0. 31. " FLTEN1[3] ,Filter Enable for EXT_INT21[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT21[3]"
|
|
textline " "
|
|
bitfld.long 0. 23. " FLTEN1[2] ,Filter Enable for EXT_INT21[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT21[2]"
|
|
textline " "
|
|
bitfld.long 0. 15. " FLTEN1[1] ,Filter Enable for EXT_INT21[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT21[1]"
|
|
textline " "
|
|
bitfld.long 0. 7. " FLTEN1[0] ,Filter Enable for EXT_INT21[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0. 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT21[0]"
|
|
line.long 0.+0x04 "EXT_INT21_FLTCON1"
|
|
bitfld.long 0.+0x04 31. " FLTEN1[7] ,Filter Enable for EXT_INT21[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT21[7]"
|
|
textline " "
|
|
bitfld.long 0.+0x04 23. " FLTEN1[6] ,Filter Enable for EXT_INT21[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT21[6]"
|
|
textline " "
|
|
bitfld.long 0.+0x04 15. " FLTEN1[5] ,Filter Enable for EXT_INT21[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT21[5]"
|
|
textline " "
|
|
bitfld.long 0.+0x04 7. " FLTEN1[4] ,Filter Enable for EXT_INT21[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0.+0x04 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT21[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((2.==1.)||(2.==2.)))
|
|
line.long 8. "EXT_INT22_FLTCON0"
|
|
bitfld.long 8. 31. " FLTEN2[3] ,Filter Enable for EXT_INT22[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 24.--30. 1. " FLTWIDTH2[3] ,Filtering width of EXT_INT22[3]"
|
|
textline " "
|
|
bitfld.long 8. 23. " FLTEN2[2] ,Filter Enable for EXT_INT22[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 16.--22. 1. " FLTWIDTH2[2] ,Filtering width of EXT_INT22[2]"
|
|
textline " "
|
|
bitfld.long 8. 15. " FLTEN2[1] ,Filter Enable for EXT_INT22[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT22[1]"
|
|
textline " "
|
|
bitfld.long 8. 7. " FLTEN2[0] ,Filter Enable for EXT_INT22[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 8. 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT22[0]"
|
|
line.long 8.+0x04 "EXT_INT22_FLTCON1"
|
|
bitfld.long 8.+0x04 7. " FLTEN2[4] ,Filter Enable for EXT_INT22[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 8.+0x04 0.--6. 1. " FLTWIDTH2[4] ,Filtering width of EXT_INT22[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((3.==1.)||(3.==2.)))
|
|
line.long 16. "EXT_INT23_FLTCON0"
|
|
bitfld.long 16. 31. " FLTEN3[3] ,Filter Enable for EXT_INT23[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT23[3]"
|
|
textline " "
|
|
bitfld.long 16. 23. " FLTEN3[2] ,Filter Enable for EXT_INT23[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT23[2]"
|
|
textline " "
|
|
bitfld.long 16. 15. " FLTEN3[1] ,Filter Enable for EXT_INT23[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT23[1]"
|
|
textline " "
|
|
bitfld.long 16. 7. " FLTEN3[0] ,Filter Enable for EXT_INT23[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 16. 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT23[0]"
|
|
line.long 16.+0x04 "EXT_INT23_FLTCON1"
|
|
bitfld.long 16.+0x04 23. " FLTEN3[6] ,Filter Enable for EXT_INT23[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 16.--22. 1. " FLTWIDTH3[6] ,Filtering width of EXT_INT23[6]"
|
|
textline " "
|
|
bitfld.long 16.+0x04 15. " FLTEN3[5] ,Filter Enable for EXT_INT23[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 8.--14. 1. " FLTWIDTH3[5] ,Filtering width of EXT_INT23[5]"
|
|
textline " "
|
|
bitfld.long 16.+0x04 7. " FLTEN3[4] ,Filter Enable for EXT_INT23[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 16.+0x04 0.--6. 1. " FLTWIDTH3[4] ,Filtering width of EXT_INT23[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((4.==1.)||(4.==2.)))
|
|
line.long 24. "EXT_INT24_FLTCON0"
|
|
bitfld.long 24. 31. " FLTEN4[3] ,Filter Enable for EXT_INT24[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT24[3]"
|
|
textline " "
|
|
bitfld.long 24. 23. " FLTEN4[2] ,Filter Enable for EXT_INT24[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT24[2]"
|
|
textline " "
|
|
bitfld.long 24. 15. " FLTEN4[1] ,Filter Enable for EXT_INT24[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT24[1]"
|
|
textline " "
|
|
bitfld.long 24. 7. " FLTEN4[0] ,Filter Enable for EXT_INT24[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 24. 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT24[0]"
|
|
line.long 24.+0x04 "EXT_INT24_FLTCON1"
|
|
bitfld.long 24.+0x04 23. " FLTEN4[6] ,Filter Enable for EXT_INT24[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 24.+0x04 16.--22. 1. " FLTWIDTH4[6] ,Filtering width of EXT_INT24[6]"
|
|
textline " "
|
|
bitfld.long 24.+0x04 15. " FLTEN4[5] ,Filter Enable for EXT_INT24[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 24.+0x04 8.--14. 1. " FLTWIDTH4[5] ,Filtering width of EXT_INT24[5]"
|
|
textline " "
|
|
bitfld.long 24.+0x04 7. " FLTEN4[4] ,Filter Enable for EXT_INT24[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 24.+0x04 0.--6. 1. " FLTWIDTH4[4] ,Filtering width of EXT_INT24[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((5.==1.)||(5.==2.)))
|
|
line.long 32. "EXT_INT25_FLTCON0"
|
|
bitfld.long 32. 31. " FLTEN5[3] ,Filter Enable for EXT_INT25[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 24.--30. 1. " FLTWIDTH5[3] ,Filtering width of EXT_INT25[3]"
|
|
textline " "
|
|
bitfld.long 32. 23. " FLTEN5[2] ,Filter Enable for EXT_INT25[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 16.--22. 1. " FLTWIDTH5[2] ,Filtering width of EXT_INT25[2]"
|
|
textline " "
|
|
bitfld.long 32. 15. " FLTEN5[1] ,Filter Enable for EXT_INT25[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT25[1]"
|
|
textline " "
|
|
bitfld.long 32. 7. " FLTEN5[0] ,Filter Enable for EXT_INT25[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 32. 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT25[0]"
|
|
line.long 32.+0x04 "EXT_INT25_FLTCON1"
|
|
bitfld.long 32.+0x04 23. " FLTEN5[6] ,Filter Enable for EXT_INT25[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 32.+0x04 16.--22. 1. " FLTWIDTH5[6] ,Filtering width of EXT_INT25[6]"
|
|
textline " "
|
|
bitfld.long 32.+0x04 15. " FLTEN5[5] ,Filter Enable for EXT_INT25[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 32.+0x04 8.--14. 1. " FLTWIDTH5[5] ,Filtering width of EXT_INT25[5]"
|
|
textline " "
|
|
bitfld.long 32.+0x04 7. " FLTEN5[4] ,Filter Enable for EXT_INT25[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 32.+0x04 0.--6. 1. " FLTWIDTH5[4] ,Filtering width of EXT_INT25[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((6.==1.)||(6.==2.)))
|
|
line.long 40. "EXT_INT26_FLTCON0"
|
|
bitfld.long 40. 31. " FLTEN6[3] ,Filter Enable for EXT_INT26[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 24.--30. 1. " FLTWIDTH6[3] ,Filtering width of EXT_INT26[3]"
|
|
textline " "
|
|
bitfld.long 40. 23. " FLTEN6[2] ,Filter Enable for EXT_INT26[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 16.--22. 1. " FLTWIDTH6[2] ,Filtering width of EXT_INT26[2]"
|
|
textline " "
|
|
bitfld.long 40. 15. " FLTEN6[1] ,Filter Enable for EXT_INT26[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 8.--14. 1. " FLTWIDTH6[1] ,Filtering width of EXT_INT26[1]"
|
|
textline " "
|
|
bitfld.long 40. 7. " FLTEN6[0] ,Filter Enable for EXT_INT26[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 40. 0.--6. 1. " FLTWIDTH6[0] ,Filtering width of EXT_INT26[0]"
|
|
line.long 40.+0x04 "EXT_INT26_FLTCON1"
|
|
bitfld.long 40.+0x04 23. " FLTEN6[6] ,Filter Enable for EXT_INT26[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 40.+0x04 16.--22. 1. " FLTWIDTH6[6] ,Filtering width of EXT_INT26[6]"
|
|
textline " "
|
|
bitfld.long 40.+0x04 15. " FLTEN6[5] ,Filter Enable for EXT_INT26[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 40.+0x04 8.--14. 1. " FLTWIDTH6[5] ,Filtering width of EXT_INT26[5]"
|
|
textline " "
|
|
bitfld.long 40.+0x04 7. " FLTEN6[4] ,Filter Enable for EXT_INT26[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 40.+0x04 0.--6. 1. " FLTWIDTH6[4] ,Filtering width of EXT_INT26[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((7.==1.)||(7.==2.)))
|
|
line.long 48. "EXT_INT27_FLTCON0"
|
|
bitfld.long 48. 31. " FLTEN7[3] ,Filter Enable for EXT_INT27[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 24.--30. 1. " FLTWIDTH7[3] ,Filtering width of EXT_INT27[3]"
|
|
textline " "
|
|
bitfld.long 48. 23. " FLTEN7[2] ,Filter Enable for EXT_INT27[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 16.--22. 1. " FLTWIDTH7[2] ,Filtering width of EXT_INT27[2]"
|
|
textline " "
|
|
bitfld.long 48. 15. " FLTEN7[1] ,Filter Enable for EXT_INT27[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 8.--14. 1. " FLTWIDTH7[1] ,Filtering width of EXT_INT27[1]"
|
|
textline " "
|
|
bitfld.long 48. 7. " FLTEN7[0] ,Filter Enable for EXT_INT27[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 48. 0.--6. 1. " FLTWIDTH7[0] ,Filtering width of EXT_INT27[0]"
|
|
line.long 48.+0x04 "EXT_INT27_FLTCON1"
|
|
bitfld.long 48.+0x04 31. " FLTEN7[7] ,Filter Enable for EXT_INT27[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 48.+0x04 24.--30. 1. " FLTWIDTH7[7] ,Filtering width of EXT_INT27[7]"
|
|
textline " "
|
|
bitfld.long 48.+0x04 23. " FLTEN7[6] ,Filter Enable for EXT_INT27[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 48.+0x04 16.--22. 1. " FLTWIDTH7[6] ,Filtering width of EXT_INT27[6]"
|
|
textline " "
|
|
bitfld.long 48.+0x04 15. " FLTEN7[5] ,Filter Enable for EXT_INT27[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 48.+0x04 8.--14. 1. " FLTWIDTH7[5] ,Filtering width of EXT_INT27[5]"
|
|
textline " "
|
|
bitfld.long 48.+0x04 7. " FLTEN7[4] ,Filter Enable for EXT_INT27[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 48.+0x04 0.--6. 1. " FLTWIDTH7[4] ,Filtering width of EXT_INT27[4]"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((8.==1.)||(8.==2.)))
|
|
line.long 56. "EXT_INT28_FLTCON0"
|
|
bitfld.long 56. 31. " FLTEN8[3] ,Filter Enable for EXT_INT28[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 24.--30. 1. " FLTWIDTH8[3] ,Filtering width of EXT_INT28[3]"
|
|
textline " "
|
|
bitfld.long 56. 23. " FLTEN8[2] ,Filter Enable for EXT_INT28[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 16.--22. 1. " FLTWIDTH8[2] ,Filtering width of EXT_INT28[2]"
|
|
textline " "
|
|
bitfld.long 56. 15. " FLTEN8[1] ,Filter Enable for EXT_INT28[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 8.--14. 1. " FLTWIDTH8[1] ,Filtering width of EXT_INT28[1]"
|
|
textline " "
|
|
bitfld.long 56. 7. " FLTEN8[0] ,Filter Enable for EXT_INT28[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 56. 0.--6. 1. " FLTWIDTH8[0] ,Filtering width of EXT_INT28[0]"
|
|
hide.long 56.+0x04 "EXT_INT28_FLTCON1"
|
|
endif
|
|
sif !((cpu()=="Exynos4212")&&((9.==1.)||(9.==2.)))
|
|
line.long 64. "EXT_INT29_FLTCON0"
|
|
bitfld.long 64. 31. " FLTEN9[3] ,Filter Enable for EXT_INT29[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 24.--30. 1. " FLTWIDTH9[3] ,Filtering width of EXT_INT29[3]"
|
|
textline " "
|
|
bitfld.long 64. 23. " FLTEN9[2] ,Filter Enable for EXT_INT29[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 16.--22. 1. " FLTWIDTH9[2] ,Filtering width of EXT_INT29[2]"
|
|
textline " "
|
|
bitfld.long 64. 15. " FLTEN9[1] ,Filter Enable for EXT_INT29[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 8.--14. 1. " FLTWIDTH9[1] ,Filtering width of EXT_INT29[1]"
|
|
textline " "
|
|
bitfld.long 64. 7. " FLTEN9[0] ,Filter Enable for EXT_INT29[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 64. 0.--6. 1. " FLTWIDTH9[0] ,Filtering width of EXT_INT29[0]"
|
|
line.long 64.+0x04 "EXT_INT29_FLTCON1"
|
|
bitfld.long 64.+0x04 31. " FLTEN9[7] ,Filter Enable for EXT_INT29[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 24.--30. 1. " FLTWIDTH9[7] ,Filtering width of EXT_INT29[7]"
|
|
textline " "
|
|
bitfld.long 64.+0x04 23. " FLTEN9[6] ,Filter Enable for EXT_INT29[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 16.--22. 1. " FLTWIDTH9[6] ,Filtering width of EXT_INT29[6]"
|
|
textline " "
|
|
bitfld.long 64.+0x04 15. " FLTEN9[5] ,Filter Enable for EXT_INT29[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 8.--14. 1. " FLTWIDTH9[5] ,Filtering width of EXT_INT29[5]"
|
|
textline " "
|
|
bitfld.long 64.+0x04 7. " FLTEN9[4] ,Filter Enable for EXT_INT29[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 64.+0x04 0.--6. 1. " FLTWIDTH9[4] ,Filtering width of EXT_INT29[4]"
|
|
endif
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "EXT_INT8_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN10[3] ,Filter Enable for EXT_INT8[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH10[3] ,Filtering width of EXT_INT8[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN10[2] ,Filter Enable for EXT_INT8[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[2] ,Filtering width of EXT_INT8[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN10[1] ,Filter Enable for EXT_INT8[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[1] ,Filtering width of EXT_INT8[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN10[0] ,Filter Enable for EXT_INT8[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[0] ,Filtering width of EXT_INT8[0]"
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "EXT_INT8_FLTCON1"
|
|
bitfld.long 0x00 31. " FLTEN10[7] ,Filter Enable for EXT_INT8[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH10[7] ,Filtering width of EXT_INT8[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN10[6] ,Filter Enable for EXT_INT8[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[6] ,Filtering width of EXT_INT8[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN10[5] ,Filter Enable for EXT_INT8[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[5] ,Filtering width of EXT_INT8[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN10[4] ,Filter Enable for EXT_INT8[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[4] ,Filtering width of EXT_INT8[4]"
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "EXT_INT9_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN11[3] ,Filter Enable for EXT_INT9[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH11[3] ,Filtering width of EXT_INT9[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN11[2] ,Filter Enable for EXT_INT9[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH11[2] ,Filtering width of EXT_INT9[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN11[1] ,Filter Enable for EXT_INT9[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH11[1] ,Filtering width of EXT_INT9[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN11[0] ,Filter Enable for EXT_INT9[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH11[0] ,Filtering width of EXT_INT9[0]"
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "EXT_INT9_FLTCON1"
|
|
bitfld.long 0x00 23. " FLTEN11[6] ,Filter Enable for EXT_INT9[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH11[6] ,Filtering width of EXT_INT9[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN11[5] ,Filter Enable for EXT_INT9[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH11[5] ,Filtering width of EXT_INT9[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN11[4] ,Filter Enable for EXT_INT9[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH11[4] ,Filtering width of EXT_INT9[4]"
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "EXT_INT10_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN12[3] ,Filter Enable for EXT_INT10[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH12[3] ,Filtering width of EXT_INT10[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN12[2] ,Filter Enable for EXT_INT10[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH12[2] ,Filtering width of EXT_INT10[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN12[1] ,Filter Enable for EXT_INT10[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH12[1] ,Filtering width of EXT_INT10[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN12[0] ,Filter Enable for EXT_INT10[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH12[0] ,Filtering width of EXT_INT10[0]"
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "EXT_INT10_FLTCON1"
|
|
bitfld.long 0x00 7. " FLTEN12[4] ,Filter Enable for EXT_INT10[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH12[4] ,Filtering width of EXT_INT10[4]"
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "EXT_INT11_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN13[3] ,Filter Enable for EXT_INT11[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH13[3] ,Filtering width of EXT_INT11[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN13[2] ,Filter Enable for EXT_INT11[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH13[2] ,Filtering width of EXT_INT11[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN13[1] ,Filter Enable for EXT_INT11[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH13[1] ,Filtering width of EXT_INT11[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN13[0] ,Filter Enable for EXT_INT11[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH13[0] ,Filtering width of EXT_INT11[0]"
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "EXT_INT11_FLTCON1"
|
|
bitfld.long 0x00 31. " FLTEN13[7] ,Filter Enable for EXT_INT11[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH13[7] ,Filtering width of EXT_INT11[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN13[6] ,Filter Enable for EXT_INT11[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH13[6] ,Filtering width of EXT_INT11[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN13[5] ,Filter Enable for EXT_INT11[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH13[5] ,Filtering width of EXT_INT11[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN13[4] ,Filter Enable for EXT_INT11[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH13[4] ,Filtering width of EXT_INT11[4]"
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "EXT_INT12_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN14[3] ,Filter Enable for EXT_INT12[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH14[3] ,Filtering width of EXT_INT12[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN14[2] ,Filter Enable for EXT_INT12[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH14[2] ,Filtering width of EXT_INT12[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN14[1] ,Filter Enable for EXT_INT12[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH14[1] ,Filtering width of EXT_INT12[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN14[0] ,Filter Enable for EXT_INT12[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH14[0] ,Filtering width of EXT_INT12[0]"
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "EXT_INT12_FLTCON1"
|
|
bitfld.long 0x00 31. " FLTEN14[7] ,Filter Enable for EXT_INT12[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH14[7] ,Filtering width of EXT_INT12[7]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN14[6] ,Filter Enable for EXT_INT12[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH14[6] ,Filtering width of EXT_INT12[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN14[5] ,Filter Enable for EXT_INT12[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH14[5] ,Filtering width of EXT_INT12[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN14[4] ,Filter Enable for EXT_INT12[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH14[4] ,Filtering width of EXT_INT12[4]"
|
|
endif
|
|
tree.end
|
|
tree "External interrupt mask"
|
|
group.long 0x900++35.
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x00 "EXT_INT21_MASK,External interrupt EXT_INT21 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT21_MASK[7] ,External Interrupt 21 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT21_MASK[6] ,External Interrupt 1 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT21_MASK[5] ,External Interrupt 21 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT21_MASK[4] ,External Interrupt 1 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT21_MASK[3] ,External Interrupt 21 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT21_MASK[2] ,External Interrupt 1 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT21_MASK[1] ,External Interrupt 21 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT21_MASK[0] ,External Interrupt 1 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x04 "EXT_INT22_MASK,External interrupt EXT_INT22 mask register"
|
|
bitfld.long 0x04 4. " EXT_INT22_MASK[4] ,External Interrupt 22 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " EXT_INT22_MASK[3] ,External Interrupt 22 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 2. " EXT_INT22_MASK[2] ,External Interrupt 22 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EXT_INT22_MASK[1] ,External Interrupt 22 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x04 0. " EXT_INT22_MASK[0] ,External Interrupt 22 Mask 0" "Enable Interrupt,Masked"
|
|
endif
|
|
line.long 0x08 "EXT_INT23_MASK,External interrupt EXT_INT23 mask register"
|
|
bitfld.long 0x08 6. " EXT_INT23_MASK[6] ,External Interrupt 23 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EXT_INT23_MASK[5] ,External Interrupt 23 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 4. " EXT_INT23_MASK[4] ,External Interrupt 23 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 3. " EXT_INT23_MASK[3] ,External Interrupt 23 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 2. " EXT_INT23_MASK[2] ,External Interrupt 23 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 1. " EXT_INT23_MASK[1] ,External Interrupt 23 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x08 0. " EXT_INT23_MASK[0] ,External Interrupt 23 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x0C "EXT_INT24_MASK,External interrupt EXT_INT24 mask register"
|
|
bitfld.long 0x0C 6. " EXT_INT24_MASK[6] ,External Interrupt 24 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 5. " EXT_INT24_MASK[5] ,External Interrupt 24 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXT_INT24_MASK[4] ,External Interrupt 24 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 3. " EXT_INT24_MASK[3] ,External Interrupt 24 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EXT_INT24_MASK[2] ,External Interrupt 24 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0C 1. " EXT_INT24_MASK[1] ,External Interrupt 24 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXT_INT24_MASK[0] ,External Interrupt 24 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x10 "EXT_INT25_MASK,External interrupt EXT_INT25 mask register"
|
|
bitfld.long 0x10 6. " EXT_INT25_MASK[6] ,External Interrupt 25 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 5. " EXT_INT25_MASK[5] ,External Interrupt 25 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 4. " EXT_INT25_MASK[4] ,External Interrupt 25 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 3. " EXT_INT25_MASK[3] ,External Interrupt 25 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 2. " EXT_INT25_MASK[2] ,External Interrupt 25 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x10 1. " EXT_INT25_MASK[1] ,External Interrupt 25 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 0. " EXT_INT25_MASK[0] ,External Interrupt 25 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x14 "EXT_INT26_MASK,External interrupt EXT_INT26 mask register"
|
|
bitfld.long 0x14 6. " EXT_INT26_MASK[6] ,External Interrupt 26 Mask 6" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 5. " EXT_INT26_MASK[5] ,External Interrupt 26 Mask 5" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 4. " EXT_INT26_MASK[4] ,External Interrupt 26 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 3. " EXT_INT26_MASK[3] ,External Interrupt 26 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 2. " EXT_INT26_MASK[2] ,External Interrupt 26 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x14 1. " EXT_INT26_MASK[1] ,External Interrupt 26 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 0. " EXT_INT26_MASK[0] ,External Interrupt 26 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x18 "EXT_INT27_MASK,External interrupt EXT_INT27 mask register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x18 7. " EXT_INT27_MASK[7] ,External Interrupt 27 Mask 7" "Enable Interrupt,Masked"
|
|
endif
|
|
bitfld.long 0x18 6. " EXT_INT27_MASK[6] ,External Interrupt 27 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x18 5. " EXT_INT27_MASK[5] ,External Interrupt 27 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 4. " EXT_INT27_MASK[4] ,External Interrupt 27 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x18 3. " EXT_INT27_MASK[3] ,External Interrupt 27 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 2. " EXT_INT27_MASK[2] ,External Interrupt 27 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT27_MASK[1] ,External Interrupt 27 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x18 0. " EXT_INT27_MASK[0] ,External Interrupt 27 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x1C "EXT_INT28_MASK,External interrupt EXT_INT28 mask register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x1C 2. " EXT_INT28_MASK[2] ,External Interrupt 28 Mask 2" "Enable Interrupt,Masked"
|
|
endif
|
|
bitfld.long 0x1C 1. " EXT_INT28_MASK[1] ,External Interrupt 28 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT28_MASK[0] ,External Interrupt 28 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x20 "EXT_INT29_MASK,External interrupt EXT_INT29 mask register"
|
|
bitfld.long 0x20 7. " EXT_INT29_MASK[7] ,External Interrupt 29 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 6. " EXT_INT29_MASK[6] ,External Interrupt 29 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT29_MASK[5] ,External Interrupt 29 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 4. " EXT_INT29_MASK[4] ,External Interrupt 29 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT29_MASK[3] ,External Interrupt 29 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 2. " EXT_INT29_MASK[2] ,External Interrupt 29 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT29_MASK[1] ,External Interrupt 29 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x20 0. " EXT_INT29_MASK[0] ,External Interrupt 29 Mask 0" "Enable Interrupt,Masked"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "EXT_INT8_MASK,External interrupt EXT_INT8 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT8_MASK[7] ,External Interrupt 8 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT8_MASK[6] ,External Interrupt 8 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT8_MASK[5] ,External Interrupt 8 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT8_MASK[4] ,External Interrupt 8 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT8_MASK[3] ,External Interrupt 8 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT8_MASK[2] ,External Interrupt 8 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT8_MASK[1] ,External Interrupt 8 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT8_MASK[0] ,External Interrupt 8 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "EXT_INT9_MASK,External interrupt EXT_INT9 mask register"
|
|
bitfld.long 0x00 6. " EXT_INT9_MASK[6] ,External Interrupt 9 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT9_MASK[5] ,External Interrupt 9 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT9_MASK[4] ,External Interrupt 9 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT9_MASK[3] ,External Interrupt 9 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT9_MASK[2] ,External Interrupt 9 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT9_MASK[1] ,External Interrupt 9 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT9_MASK[0] ,External Interrupt 9 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "EXT_INT10_MASK,External interrupt EXT_INT10 mask register"
|
|
bitfld.long 0x00 4. " EXT_INT10_MASK[4] ,External Interrupt 10 Mask 4" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 3. " EXT_INT10_MASK[3] ,External Interrupt 10 Mask 3" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT10_MASK[2] ,External Interrupt 10 Mask 2" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 1. " EXT_INT10_MASK[1] ,External Interrupt 10 Mask 1" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT10_MASK[0] ,External Interrupt 10 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "EXT_INT11_MASK,External interrupt EXT_INT11 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT11_MASK[7] ,External Interrupt 11 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT11_MASK[6] ,External Interrupt 11 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT11_MASK[5] ,External Interrupt 11 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT11_MASK[4] ,External Interrupt 11 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT11_MASK[3] ,External Interrupt 11 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT11_MASK[2] ,External Interrupt 11 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT11_MASK[1] ,External Interrupt 11 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT11_MASK[0] ,External Interrupt 11 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "EXT_INT12_MASK,External interrupt EXT_INT12 mask register"
|
|
bitfld.long 0x00 7. " EXT_INT12_MASK[7] ,External Interrupt 12 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 6. " EXT_INT12_MASK[6] ,External Interrupt 12 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT12_MASK[5] ,External Interrupt 12 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT12_MASK[4] ,External Interrupt 12 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT12_MASK[3] ,External Interrupt 12 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT12_MASK[2] ,External Interrupt 12 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT12_MASK[1] ,External Interrupt 12 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT12_MASK[0] ,External Interrupt 12 Mask 0" "Enable Interrupt,Masked"
|
|
endif
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++35.
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x00 "EXT_INT21_PEND,External interrupt EXT_INT21 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT21_PEND[7] ,External Interrupt 21 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT21_PEND[6] ,External Interrupt 21 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT21_PEND[5] ,External Interrupt 21 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT21_PEND[4] ,External Interrupt 21 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT21_PEND[3] ,External Interrupt 21 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT21_PEND[2] ,External Interrupt 21 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT21_PEND[1] ,External Interrupt 21 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT21_PEND[0] ,External Interrupt 21 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x04 "EXT_INT22_PEND,External interrupt EXT_INT22 pending register"
|
|
bitfld.long 0x04 4. " EXT_INT22_PEND[4] ,External Interrupt 22 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " EXT_INT22_PEND[3] ,External Interrupt 22 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EXT_INT22_PEND[2] ,External Interrupt 22 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " EXT_INT22_PEND[1] ,External Interrupt 22 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EXT_INT22_PEND[0] ,External Interrupt 22 Pending 0" "Not occurred,Occurred"
|
|
endif
|
|
line.long 0x08 "EXT_INT23_PEND,External interrupt EXT_INT23 pending register"
|
|
bitfld.long 0x08 6. " EXT_INT23_PEND[6] ,External Interrupt 23 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x08 5. " EXT_INT23_PEND[5] ,External Interrupt 23 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EXT_INT23_PEND[4] ,External Interrupt 23 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x08 3. " EXT_INT23_PEND[3] ,External Interrupt 23 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 2. " EXT_INT23_PEND[2] ,External Interrupt 23 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x08 1. " EXT_INT23_PEND[1] ,External Interrupt 23 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x08 0. " EXT_INT23_PEND[0] ,External Interrupt 23 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x0C "EXT_INT24_PEND,External interrupt EXT_INT24 pending register"
|
|
bitfld.long 0x0C 6. " EXT_INT24_PEND[6] ,External interrupt 24 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 5. " EXT_INT24_PEND[5] ,External interrupt 24 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " EXT_INT24_PEND[4] ,External interrupt 24 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 3. " EXT_INT24_PEND[3] ,External interrupt 24 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EXT_INT24_PEND[2] ,External interrupt 24 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x0C 1. " EXT_INT24_PEND[1] ,External interrupt 24 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " EXT_INT24_PEND[0] ,External interrupt 24 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x10 "EXT_INT25_PEND,External interrupt EXT_INT25 pending register"
|
|
bitfld.long 0x10 6. " EXT_INT25_PEND[6] ,External Interrupt 25 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x10 5. " EXT_INT25_PEND[5] ,External Interrupt 25 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 4. " EXT_INT25_PEND[4] ,External Interrupt 25 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x10 3. " EXT_INT25_PEND[3] ,External Interrupt 25 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 2. " EXT_INT25_PEND[2] ,External Interrupt 25 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x10 1. " EXT_INT25_PEND[1] ,External Interrupt 25 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 0. " EXT_INT25_PEND[0] ,External Interrupt 25 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x14 "EXT_INT26_PEND,External interrupt EXT_INT26 pending register"
|
|
bitfld.long 0x14 6. " EXT_INT26_PEND[6] ,External Interrupt 26 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x14 5. " EXT_INT26_PEND[5] ,External Interrupt 26 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 4. " EXT_INT26_PEND[4] ,External Interrupt 26 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 3. " EXT_INT26_PEND[3] ,External Interrupt 26 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " EXT_INT26_PEND[2] ,External Interrupt 26 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 1. " EXT_INT26_PEND[1] ,External Interrupt 26 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x14 0. " EXT_INT26_PEND[0] ,External Interrupt 26 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x18 "EXT_INT27_PEND,External interrupt EXT_INT27 pending register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x18 7. " EXT_INT27_PEND[7] ,External Interrupt 27 Pending 7" "Not occurred,Occurred"
|
|
endif
|
|
bitfld.long 0x18 6. " EXT_INT27_PEND[6] ,External Interrupt 27 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x18 5. " EXT_INT27_PEND[5] ,External Interrupt 27 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x18 4. " EXT_INT27_PEND[4] ,External Interrupt 27 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x18 3. " EXT_INT27_PEND[3] ,External Interrupt 27 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x18 2. " EXT_INT27_PEND[2] ,External Interrupt 27 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x18 1. " EXT_INT27_PEND[1] ,External Interrupt 27 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x18 0. " EXT_INT27_PEND[0] ,External Interrupt 27 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x1C "EXT_INT28_PEND,External interrupt EXT_INT28 pending register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x1C 2. " EXT_INT28_PEND[2] ,External Interrupt 28 Pending 2" "Not occurred,Occurred"
|
|
endif
|
|
bitfld.long 0x1C 1. " EXT_INT28_PEND[1] ,External Interrupt 28 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " EXT_INT28_PEND[0] ,External Interrupt 28 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x20 "EXT_INT29_PEND,External interrupt EXT_INT29 pending register"
|
|
bitfld.long 0x20 7. " EXT_INT29_PEND[7] ,External Interrupt 29 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x20 6. " EXT_INT29_PEND[6] ,External Interrupt 29 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 5. " EXT_INT29_PEND[5] ,External Interrupt 29 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x20 4. " EXT_INT29_PEND[4] ,External Interrupt 29 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 3. " EXT_INT29_PEND[3] ,External Interrupt 29 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x20 2. " EXT_INT29_PEND[2] ,External Interrupt 29 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x20 1. " EXT_INT29_PEND[1] ,External Interrupt 29 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x20 0. " EXT_INT29_PEND[0] ,External Interrupt 29 Pending 0" "Not occurred,Occurred"
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "EXT_INT8_PEND,External interrupt EXT_INT8 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT8_PEND[7] ,External Interrupt 8 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT8_PEND[6] ,External Interrupt 8 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT8_PEND[5] ,External Interrupt 8 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT8_PEND[4] ,External Interrupt 8 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT8_PEND[3] ,External Interrupt 8 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT8_PEND[2] ,External Interrupt 8 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT8_PEND[1] ,External Interrupt 8 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT8_PEND[0] ,External Interrupt 8 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "EXT_INT9_PEND,External interrupt EXT_INT9 pending register"
|
|
bitfld.long 0x00 6. " EXT_INT9_PEND[6] ,External Interrupt 9 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " EXT_INT9_PEND[5] ,External Interrupt 9 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT9_PEND[4] ,External Interrupt 9 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT9_PEND[3] ,External Interrupt 9 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT9_PEND[2] ,External Interrupt 9 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT9_PEND[1] ,External Interrupt 9 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT9_PEND[0] ,External Interrupt 9 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "EXT_INT10_PEND,External interrupt EXT_INT10 pending register"
|
|
bitfld.long 0x00 4. " EXT_INT10_PEND[4] ,External Interrupt 10 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT10_PEND[3] ,External Interrupt 10 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT10_PEND[2] ,External Interrupt 10 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT10_PEND[1] ,External Interrupt 10 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT10_PEND[0] ,External Interrupt 10 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "EXT_INT11_PEND,External interrupt EXT_INT11 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT11_PEND[7] ,External Interrupt 11 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT11_PEND[6] ,External Interrupt 11 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT11_PEND[5] ,External Interrupt 11 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT11_PEND[4] ,External Interrupt 11 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT11_PEND[3] ,External Interrupt 11 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT11_PEND[2] ,External Interrupt 11 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT11_PEND[1] ,External Interrupt 11 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT11_PEND[0] ,External Interrupt 11 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "EXT_INT12_PEND,External interrupt EXT_INT12 pending register"
|
|
bitfld.long 0x00 7. " EXT_INT12_PEND[7] ,External Interrupt 12 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " EXT_INT12_PEND[6] ,External Interrupt 12 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT12_PEND[5] ,External Interrupt 12 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " EXT_INT12_PEND[4] ,External Interrupt 12 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT12_PEND[3] ,External Interrupt 12 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EXT_INT12_PEND[2] ,External Interrupt 12 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT12_PEND[1] ,External Interrupt 12 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT12_PEND[0] ,External Interrupt 12 Pending 0" "Not occurred,Occurred"
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x00 "EXT_INT_SERVICE_XB,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
elif (cpu()=="Exynos4212")
|
|
line.long 0x00 "EXT_INT_SERVICE_XA,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "EXT_INT23,EXT_INT24,EXT_INT25,EXT_INT26,EXT_INT27,EXT_INT28,EXT_INT29,EXT_INT8,EXT_INT9,EXT_INT10,EXT_INT11,EXT_INT12,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpu()=="Exynos4210")
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XB,Current service pending register"
|
|
elif (cpu()=="Exynos4212")
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XA,Current service pending register"
|
|
endif
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
sif (cpu()=="Exynos4210")
|
|
group.long 0xB10++39.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XB,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "0,1,2,3,4,5,6,7,8,-,-,-,-,?..."
|
|
line.long 0x4 "EXT_INT21_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT21" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT22_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT22" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT23_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT23" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT24_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT24" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT25_FIXPRI"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT25" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "EXT_INT26_FIXPRI"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT26" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "EXT_INT27_FIXPRI"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT27" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "EXT_INT28_FIXPRI"
|
|
bitfld.long 0x20 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT28" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "EXT_INT29_FIXPRI"
|
|
bitfld.long 0x24 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT29" "0,1,2,3,4,5,6,7"
|
|
elif (cpu()=="Exynos4212")
|
|
group.long 0xB10++39.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XA,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "EXT_INT23,EXT_INT24,EXT_INT25,EXT_INT26,EXT_INT27,EXT_INT28,EXT_INT29,EXT_INT8,EXT_INT9,EXT_INT10,EXT_INT11,EXT_INT12,-,?..."
|
|
line.long 0x4 "EXT_INT23_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT23" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT24_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT24" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT25_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT25" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT26_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT26" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT27_FIXPRI"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT27" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "EXT_INT28_FIXPRI"
|
|
bitfld.long 0x18 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT28" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "EXT_INT29_FIXPRI"
|
|
bitfld.long 0x1C 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT29" "0,1,2,3,4,5,6,7"
|
|
group.long 0xB38++19.
|
|
line.long 0x0 "EXT_INT8_FIXPRI"
|
|
bitfld.long 0x0 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT8" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "EXT_INT9_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT9" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT10_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT10" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT11_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT11" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT12_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT12" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
width 12.
|
|
tree "GPX0"
|
|
group.long 0xC00++0x03
|
|
line.long 0x00 "GPX0CON,Port Group GPX0 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPX0CON[7] ,GPX0 Pin 7 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[7]"
|
|
bitfld.long 0x00 24.--27. " GPX0CON[6] ,GPX0 Pin 6 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[6]"
|
|
bitfld.long 0x00 20.--23. " GPX0CON[5] ,GPX0 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[5]"
|
|
bitfld.long 0x00 16.--19. " GPX0CON[4] ,GPX0 Pin 4 Configuration" "Input,Output,Reserved,AUD_TRSTn,GNSS_TRSTn,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX0CON[3] ,GPX0 Pin 3 Configuration" "Input,Output,Reserved,AUD_TDO,GNSS_TDO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[3]"
|
|
bitfld.long 0x00 8.--11. " GPX0CON[2] ,GPX0 Pin 2 Configuration" "Input,Output,Reserved,AUD_TDI,GNSS_TDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[2]"
|
|
bitfld.long 0x00 4.--7. " GPX0CON[1] ,GPX0 Pin 1 Configuration" "Input,Output,Reserved,AUD_TMS,GNSS_TMS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[1]"
|
|
bitfld.long 0x00 0.--3. " GPX0CON[0] ,GPX0 Pin 0 Configuration" "Input,Output,Reserved,AUD_TCK,GNSS_TCK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[0]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 28.--31. " GPX0CON[7] ,GPX0 Pin 7 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[7]"
|
|
bitfld.long 0x00 24.--27. " GPX0CON[6] ,GPX0 Pin 6 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[6]"
|
|
bitfld.long 0x00 20.--23. " GPX0CON[5] ,GPX0 Pin 5 Configuration" "Input,Output,Reserved,Reserved,Reserved,ALV_DBG[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[5]"
|
|
bitfld.long 0x00 16.--19. " GPX0CON[4] ,GPX0 Pin 4 Configuration" "Input,Output,Reserved,AUD_TRSTn,GNSS_TRSTn,ALV_DBG[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX0CON[3] ,GPX0 Pin 3 Configuration" "Input,Output,Reserved,AUD_TDO,GNSS_TDO,ALV_TDO,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[3]"
|
|
bitfld.long 0x00 8.--11. " GPX0CON[2] ,GPX0 Pin 2 Configuration" "Input,Output,Reserved,AUD_TDI,GNSS_TDI,ALV_TDI,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[2]"
|
|
bitfld.long 0x00 4.--7. " GPX0CON[1] ,GPX0 Pin 1 Configuration" "Input,Output,Reserved,AUD_TMS,GNSS_TMS,ALV_TMS,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[1]"
|
|
bitfld.long 0x00 0.--3. " GPX0CON[0] ,GPX0 Pin 0 Configuration" "Input,Output,Reserved,AUD_TCK,GNSS_TCK,ALV_TCK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT0[0]"
|
|
endif
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPX0DAT,Port Group GPX0 Data Register"
|
|
bitfld.byte 0x00 7. " GPX0DAT[7] ,GPX0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX0DAT[6] ,GPX0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX0DAT[5] ,GPX0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX0DAT[4] ,GPX0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX0DAT[3] ,GPX0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX0DAT[2] ,GPX0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX0DAT[1] ,GPX0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX0DAT[0] ,GPX0 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPX0PUD,Port Group GPX0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX0PUD[7] ,GPX0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX0PUD[6] ,GPX0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX0PUD[5] ,GPX0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX0PUD[4] ,GPX0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX0PUD[3] ,GPX0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX0PUD[2] ,GPX0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX0PUD[1] ,GPX0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX0PUD[0] ,GPX0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPX0DRV,Port Group GPX0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX0DRV[7] ,GPX0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX0DRV[6] ,GPX0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX0DRV[5] ,GPX0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX0DRV[4] ,GPX0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX0DRV[3] ,GPX0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX0DRV[2] ,GPX0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX0DRV[1] ,GPX0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX0DRV[0] ,GPX0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX1"
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GPX1CON,Port Group GPX1 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPX1CON[7] ,GPX1 Pin 7 Configuration" "Input,Output,Reserved,KP_COL[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[7]"
|
|
bitfld.long 0x00 24.--27. " GPX1CON[6] ,GPX1 Pin 6 Configuration" "Input,Output,Reserved,KP_COL[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[6]"
|
|
bitfld.long 0x00 20.--23. " GPX1CON[5] ,GPX1 Pin 5 Configuration" "Input,Output,Reserved,KP_COL[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[5]"
|
|
bitfld.long 0x00 16.--19. " GPX1CON[4] ,GPX1 Pin 4 Configuration" "Input,Output,Reserved,KP_COL[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX1CON[3] ,GPX1 Pin 3 Configuration" "Input,Output,Reserved,KP_COL[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[3]"
|
|
bitfld.long 0x00 8.--11. " GPX1CON[2] ,GPX1 Pin 2 Configuration" "Input,Output,Reserved,KP_COL[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[2]"
|
|
bitfld.long 0x00 4.--7. " GPX1CON[1] ,GPX1 Pin 1 Configuration" "Input,Output,Reserved,KP_COL[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[1]"
|
|
bitfld.long 0x00 0.--3. " GPX1CON[0] ,GPX1 Pin 0 Configuration" "Input,Output,Reserved,KP_COL[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[0]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 28.--31. " GPX1CON[7] ,GPX1 Pin 7 Configuration" "Input,Output,Reserved,KP_COL[7],Reserved,ALV_DBG[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[7]"
|
|
bitfld.long 0x00 24.--27. " GPX1CON[6] ,GPX1 Pin 6 Configuration" "Input,Output,Reserved,KP_COL[6],Reserved,ALV_DBG[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[6]"
|
|
bitfld.long 0x00 20.--23. " GPX1CON[5] ,GPX1 Pin 5 Configuration" "Input,Output,Reserved,KP_COL[5],Reserved,ALV_DBG[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[5]"
|
|
bitfld.long 0x00 16.--19. " GPX1CON[4] ,GPX1 Pin 4 Configuration" "Input,Output,Reserved,KP_COL[4],Reserved,ALV_DBG[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX1CON[3] ,GPX1 Pin 3 Configuration" "Input,Output,Reserved,KP_COL[3],Reserved,ALV_DBG[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[3]"
|
|
bitfld.long 0x00 8.--11. " GPX1CON[2] ,GPX1 Pin 2 Configuration" "Input,Output,Reserved,KP_COL[2],Reserved,ALV_DBG[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[2]"
|
|
bitfld.long 0x00 4.--7. " GPX1CON[1] ,GPX1 Pin 1 Configuration" "Input,Output,Reserved,KP_COL[1],Reserved,ALV_DBG[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[1]"
|
|
bitfld.long 0x00 0.--3. " GPX1CON[0] ,GPX1 Pin 0 Configuration" "Input,Output,Reserved,KP_COL[0],Reserved,ALV_DBG[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT1[0]"
|
|
endif
|
|
group.byte 0xC24++0x00
|
|
line.byte 0x00 "GPX1DAT,Port Group GPX1 Data Register"
|
|
bitfld.byte 0x00 7. " GPX1DAT[7] ,GPX1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX1DAT[6] ,GPX1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX1DAT[5] ,GPX1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX1DAT[4] ,GPX1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX1DAT[3] ,GPX1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX1DAT[2] ,GPX1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX1DAT[1] ,GPX1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX1DAT[0] ,GPX1 Pin 0 Data" "Low,High"
|
|
group.word 0xC28++0x01
|
|
line.word 0x00 "GPX1PUD,Port Group GPX1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX1PUD[7] ,GPX1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX1PUD[6] ,GPX1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX1PUD[5] ,GPX1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX1PUD[4] ,GPX1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX1PUD[3] ,GPX1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX1PUD[2] ,GPX1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX1PUD[1] ,GPX1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX1PUD[0] ,GPX1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC2C++0x02
|
|
line.tbyte 0x00 "GPX1DRV,Port Group GPX1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX1DRV[7] ,GPX1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX1DRV[6] ,GPX1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX1DRV[5] ,GPX1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX1DRV[4] ,GPX1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX1DRV[3] ,GPX1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX1DRV[2] ,GPX1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX1DRV[1] ,GPX1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX1DRV[0] ,GPX1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX2"
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GPX2CON,Port Group GPX2 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPX2CON[7] ,GPX2 Pin 7 Configuration" "Input,Output,Reserved,KP_ROW[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[7]"
|
|
bitfld.long 0x00 24.--27. " GPX2CON[6] ,GPX2 Pin 6 Configuration" "Input,Output,Reserved,KP_ROW[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[6]"
|
|
bitfld.long 0x00 20.--23. " GPX2CON[5] ,GPX2 Pin 5 Configuration" "Input,Output,Reserved,KP_ROW[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[5]"
|
|
bitfld.long 0x00 16.--19. " GPX2CON[4] ,GPX2 Pin 4 Configuration" "Input,Output,Reserved,KP_ROW[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX2CON[3] ,GPX2 Pin 3 Configuration" "Input,Output,Reserved,KP_ROW[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[3]"
|
|
bitfld.long 0x00 8.--11. " GPX2CON[2] ,GPX2 Pin 2 Configuration" "Input,Output,Reserved,KP_ROW[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[2]"
|
|
bitfld.long 0x00 4.--7. " GPX2CON[1] ,GPX2 Pin 1 Configuration" "Input,Output,Reserved,KP_ROW[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[1]"
|
|
bitfld.long 0x00 0.--3. " GPX2CON[0] ,GPX2 Pin 0 Configuration" "Input,Output,Reserved,KP_ROW[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[0]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 28.--31. " GPX2CON[7] ,GPX2 Pin 7 Configuration" "Input,Output,Reserved,KP_ROW[7],Reserved,ALV_DBG[19],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[7]"
|
|
bitfld.long 0x00 24.--27. " GPX2CON[6] ,GPX2 Pin 6 Configuration" "Input,Output,Reserved,KP_ROW[6],Reserved,ALV_DBG[18],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[6]"
|
|
bitfld.long 0x00 20.--23. " GPX2CON[5] ,GPX2 Pin 5 Configuration" "Input,Output,Reserved,KP_ROW[5],Reserved,ALV_DBG[17],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[5]"
|
|
bitfld.long 0x00 16.--19. " GPX2CON[4] ,GPX2 Pin 4 Configuration" "Input,Output,Reserved,KP_ROW[4],Reserved,ALV_DBG[16],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX2CON[3] ,GPX2 Pin 3 Configuration" "Input,Output,Reserved,KP_ROW[3],Reserved,ALV_DBG[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[3]"
|
|
bitfld.long 0x00 8.--11. " GPX2CON[2] ,GPX2 Pin 2 Configuration" "Input,Output,Reserved,KP_ROW[2],Reserved,ALV_DBG[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[2]"
|
|
bitfld.long 0x00 4.--7. " GPX2CON[1] ,GPX2 Pin 1 Configuration" "Input,Output,Reserved,KP_ROW[1],Reserved,ALV_DBG[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[1]"
|
|
bitfld.long 0x00 0.--3. " GPX2CON[0] ,GPX2 Pin 0 Configuration" "Input,Output,Reserved,KP_ROW[0],Reserved,ALV_DBG[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT2[0]"
|
|
endif
|
|
group.byte 0xC44++0x00
|
|
line.byte 0x00 "GPX2DAT,Port Group GPX2 Data Register"
|
|
bitfld.byte 0x00 7. " GPX2DAT[7] ,GPX2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX2DAT[6] ,GPX2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX2DAT[5] ,GPX2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX2DAT[4] ,GPX2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX2DAT[3] ,GPX2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX2DAT[2] ,GPX2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX2DAT[1] ,GPX2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX2DAT[0] ,GPX2 Pin 0 Data" "Low,High"
|
|
group.word 0xC48++0x01
|
|
line.word 0x00 "GPX2PUD,Port Group GPX2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX2PUD[7] ,GPX2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX2PUD[6] ,GPX2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX2PUD[5] ,GPX2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX2PUD[4] ,GPX2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX2PUD[3] ,GPX2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX2PUD[2] ,GPX2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX2PUD[1] ,GPX2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX2PUD[0] ,GPX2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC4C++0x02
|
|
line.tbyte 0x00 "GPX2DRV,Port Group GPX2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX2DRV[7] ,GPX2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX2DRV[6] ,GPX2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX2DRV[5] ,GPX2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX2DRV[4] ,GPX2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX2DRV[3] ,GPX2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX2DRV[2] ,GPX2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX2DRV[1] ,GPX2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX2DRV[0] ,GPX2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
tree "GPX3"
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GPX3CON,Port Group GPX3 Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 28.--31. " GPX3CON[7] ,GPX3 Pin 7 Configuration" "Input,Output,Reserved,HDMI_HPD,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[7]"
|
|
bitfld.long 0x00 24.--27. " GPX3CON[6] ,GPX3 Pin 6 Configuration" "Input,Output,Reserved,HDMI_CEC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[6]"
|
|
bitfld.long 0x00 20.--23. " GPX3CON[5] ,GPX3 Pin 5 Configuration" "Input,Output,Reserved,KP_ROW[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[5]"
|
|
bitfld.long 0x00 16.--19. " GPX3CON[4] ,GPX3 Pin 4 Configuration" "Input,Output,Reserved,KP_ROW[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX3CON[3] ,GPX3 Pin 3 Configuration" "Input,Output,Reserved,KP_ROW[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[3]"
|
|
bitfld.long 0x00 8.--11. " GPX3CON[2] ,GPX3 Pin 2 Configuration" "Input,Output,Reserved,KP_ROW[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[2]"
|
|
bitfld.long 0x00 4.--7. " GPX3CON[1] ,GPX3 Pin 1 Configuration" "Input,Output,Reserved,KP_ROW[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[1]"
|
|
bitfld.long 0x00 0.--3. " GPX3CON[0] ,GPX3 Pin 0 Configuration" "Input,Output,Reserved,KP_ROW[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[0]"
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 28.--31. " GPX3CON[7] ,GPX3 Pin 7 Configuration" "Input,Output,Reserved,HDMI_HPD,Reserved,ALV_DBG[27],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[7]"
|
|
bitfld.long 0x00 24.--27. " GPX3CON[6] ,GPX3 Pin 6 Configuration" "Input,Output,Reserved,HDMI_CEC,Reserved,ALV_DBG[26],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[6]"
|
|
bitfld.long 0x00 20.--23. " GPX3CON[5] ,GPX3 Pin 5 Configuration" "Input,Output,Reserved,KP_ROW[13],Reserved,ALV_DBG[25],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[5]"
|
|
bitfld.long 0x00 16.--19. " GPX3CON[4] ,GPX3 Pin 4 Configuration" "Input,Output,Reserved,KP_ROW[12],Reserved,ALV_DBG[24],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPX3CON[3] ,GPX3 Pin 3 Configuration" "Input,Output,Reserved,KP_ROW[11],Reserved,ALV_DBG[23],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[3]"
|
|
bitfld.long 0x00 8.--11. " GPX3CON[2] ,GPX3 Pin 2 Configuration" "Input,Output,Reserved,KP_ROW[10],Reserved,ALV_DBG[22],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[2]"
|
|
bitfld.long 0x00 4.--7. " GPX3CON[1] ,GPX3 Pin 1 Configuration" "Input,Output,Reserved,KP_ROW[9],Reserved,ALV_DBG[21],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[1]"
|
|
bitfld.long 0x00 0.--3. " GPX3CON[0] ,GPX3 Pin 0 Configuration" "Input,Output,Reserved,KP_ROW[8],Reserved,ALV_DBG[20],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,WAKEUP_INT3[0]"
|
|
endif
|
|
group.byte 0xC64++0x00
|
|
line.byte 0x00 "GPX3DAT,Port Group GPX3 Data Register"
|
|
bitfld.byte 0x00 7. " GPX3DAT[7] ,GPX3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPX3DAT[6] ,GPX3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPX3DAT[5] ,GPX3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPX3DAT[4] ,GPX3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPX3DAT[3] ,GPX3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPX3DAT[2] ,GPX3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPX3DAT[1] ,GPX3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPX3DAT[0] ,GPX3 Pin 0 Data" "Low,High"
|
|
group.word 0xC68++0x01
|
|
line.word 0x00 "GPX3PUD,Port Group GPX3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPX3PUD[7] ,GPX3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPX3PUD[6] ,GPX3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPX3PUD[5] ,GPX3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPX3PUD[4] ,GPX3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPX3PUD[3] ,GPX3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPX3PUD[2] ,GPX3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPX3PUD[1] ,GPX3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPX3PUD[0] ,GPX3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0xC6C++0x02
|
|
line.tbyte 0x00 "GPX3DRV,Port Group GPX3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPX3DRV[7] ,GPX3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPX3DRV[6] ,GPX3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPX3DRV[5] ,GPX3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPX3DRV[4] ,GPX3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPX3DRV[3] ,GPX3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPX3DRV[2] ,GPX3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPX3DRV[1] ,GPX3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPX3DRV[0] ,GPX3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
sif (cpu()=="Exynos4210")
|
|
width 22.
|
|
tree "Wakeup interrupts (WAKEUP_INT0-3)"
|
|
tree "Wakeup interrupt configuration"
|
|
group.long 0xE00++15.
|
|
line.long 0x0 "WAKEUP_INT40_CON,External interrupt WAKEUP_INT40 configuration register"
|
|
bitfld.long 0x0 28.--30. " WAKEUP_INT40_CON[7] ,Setting the signaling method of WAKEUP_INT40[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 24.--26. " WAKEUP_INT40_CON[6] ,Setting the signaling method of WAKEUP_INT40[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " WAKEUP_INT40_CON[5] ,Setting the signaling method of WAKEUP_INT40[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 16.--18. " WAKEUP_INT40_CON[4] ,Setting the signaling method of WAKEUP_INT40[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--14. " WAKEUP_INT40_CON[3] ,Setting the signaling method of WAKEUP_INT40[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 8.--10. " WAKEUP_INT40_CON[2] ,Setting the signaling method of WAKEUP_INT40[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 4.--6. " WAKEUP_INT40_CON[1] ,Setting the signaling method of WAKEUP_INT40[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 0.--2. " WAKEUP_INT40_CON[0] ,Setting the signaling method of WAKEUP_INT40[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x4 "WAKEUP_INT41_CON,External interrupt WAKEUP_INT41 configuration register"
|
|
bitfld.long 0x4 28.--30. " WAKEUP_INT41_CON[7] ,Setting the signaling method of WAKEUP_INT41[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 24.--26. " WAKEUP_INT41_CON[6] ,Setting the signaling method of WAKEUP_INT41[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 20.--22. " WAKEUP_INT41_CON[5] ,Setting the signaling method of WAKEUP_INT41[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 16.--18. " WAKEUP_INT41_CON[4] ,Setting the signaling method of WAKEUP_INT41[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 12.--14. " WAKEUP_INT41_CON[3] ,Setting the signaling method of WAKEUP_INT41[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 8.--10. " WAKEUP_INT41_CON[2] ,Setting the signaling method of WAKEUP_INT41[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 4.--6. " WAKEUP_INT41_CON[1] ,Setting the signaling method of WAKEUP_INT41[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 0.--2. " WAKEUP_INT41_CON[0] ,Setting the signaling method of WAKEUP_INT41[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x8 "WAKEUP_INT42_CON,External interrupt WAKEUP_INT42 configuration register"
|
|
bitfld.long 0x8 28.--30. " WAKEUP_INT42_CON[7] ,Setting the signaling method of WAKEUP_INT42[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 24.--26. " WAKEUP_INT42_CON[6] ,Setting the signaling method of WAKEUP_INT42[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 20.--22. " WAKEUP_INT42_CON[5] ,Setting the signaling method of WAKEUP_INT42[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 16.--18. " WAKEUP_INT42_CON[4] ,Setting the signaling method of WAKEUP_INT42[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 12.--14. " WAKEUP_INT42_CON[3] ,Setting the signaling method of WAKEUP_INT42[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 8.--10. " WAKEUP_INT42_CON[2] ,Setting the signaling method of WAKEUP_INT42[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 4.--6. " WAKEUP_INT42_CON[1] ,Setting the signaling method of WAKEUP_INT42[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 0.--2. " WAKEUP_INT42_CON[0] ,Setting the signaling method of WAKEUP_INT42[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0xC "WAKEUP_INT43_CON,External interrupt WAKEUP_INT43 configuration register"
|
|
bitfld.long 0xC 28.--30. " WAKEUP_INT43_CON[7] ,Setting the signaling method of WAKEUP_INT43[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 24.--26. " WAKEUP_INT43_CON[6] ,Setting the signaling method of WAKEUP_INT43[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 20.--22. " WAKEUP_INT43_CON[5] ,Setting the signaling method of WAKEUP_INT43[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 16.--18. " WAKEUP_INT43_CON[4] ,Setting the signaling method of WAKEUP_INT43[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 12.--14. " WAKEUP_INT43_CON[3] ,Setting the signaling method of WAKEUP_INT43[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 8.--10. " WAKEUP_INT43_CON[2] ,Setting the signaling method of WAKEUP_INT43[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 4.--6. " WAKEUP_INT43_CON[1] ,Setting the signaling method of WAKEUP_INT43[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 0.--2. " WAKEUP_INT43_CON[0] ,Setting the signaling method of WAKEUP_INT43[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
tree "Wakeup interrupt filter configuration"
|
|
group.long 0xE80++0x1f
|
|
line.long 0x0 "WAKEUP_INT0_FLTCON0,External interrupt WAKEUP_INT0 filter configuration register 0"
|
|
bitfld.long 0x0 31. " FLTEN10[3] ,Filter Enable for WAKEUP_INT0[3]" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " FLTSEL10[3] ,Filter Selection for WAKEUP_INT0[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 24.--29. 1. " FLTWIDTH10[3] ,Filter Selection for WAKEUP_INT0[3]"
|
|
textline " "
|
|
bitfld.long 0x0 23. " FLTEN10[2] ,Filter Enable for WAKEUP_INT0[2]" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " FLTSEL10[2] ,Filter Selection for WAKEUP_INT0[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 16.--21. 1. " FLTWIDTH10[2] ,Filter Selection for WAKEUP_INT0[2]"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FLTEN10[1] ,Filter Enable for WAKEUP_INT0[1]" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " FLTSEL10[1] ,Filter Selection for WAKEUP_INT0[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 8.--13. 1. " FLTWIDTH10[1] ,Filter Selection for WAKEUP_INT0[1]"
|
|
textline " "
|
|
bitfld.long 0x0 7. " FLTEN10[0] ,Filter Enable for WAKEUP_INT0[0]" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " FLTSEL10[0] ,Filter Selection for WAKEUP_INT0[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 0.--5. 1. " FLTWIDTH10[0] ,Filter Selection for WAKEUP_INT0[0]"
|
|
line.long 0x0+0x04 "WAKEUP_INT0_FLTCON1,External interrupt WAKEUP_INT0 filter configuration register 0"
|
|
bitfld.long 0x0+0x04 31. " FLTEN10[7] ,Filter Enable for WAKEUP_INT0[7]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 30. " FLTSEL10[7] ,Filter Selection for WAKEUP_INT0[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 24.--29. 1. " FLTWIDTH10[7] ,Filter Selection for WAKEUP_INT0[7]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 23. " FLTEN10[6] ,Filter Enable for WAKEUP_INT0[6]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 22. " FLTSEL10[6] ,Filter Selection for WAKEUP_INT0[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 16.--21. 1. " FLTWIDTH10[6] ,Filter Selection for WAKEUP_INT0[6]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 15. " FLTEN10[5] ,Filter Enable for WAKEUP_INT0[5]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 14. " FLTSEL10[5] ,Filter Selection for WAKEUP_INT0[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 8.--13. 1. " FLTWIDTH10[5] ,Filter Selection for WAKEUP_INT0[5]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 7. " FLTEN10[4] ,Filter Enable for WAKEUP_INT0[4]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 6. " FLTSEL10[4] ,Filter Selection for WAKEUP_INT0[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 0.--5. 1. " FLTWIDTH10[4] ,Filter Selection for WAKEUP_INT0[4]"
|
|
line.long 0x8 "WAKEUP_INT1_FLTCON0,External interrupt WAKEUP_INT1 filter configuration register 0"
|
|
bitfld.long 0x8 31. " FLTEN11[3] ,Filter Enable for WAKEUP_INT0[3]" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " FLTSEL11[3] ,Filter Selection for WAKEUP_INT0[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 24.--29. 1. " FLTWIDTH11[3] ,Filter Selection for WAKEUP_INT0[3]"
|
|
textline " "
|
|
bitfld.long 0x8 23. " FLTEN11[2] ,Filter Enable for WAKEUP_INT0[2]" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " FLTSEL11[2] ,Filter Selection for WAKEUP_INT0[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 16.--21. 1. " FLTWIDTH11[2] ,Filter Selection for WAKEUP_INT0[2]"
|
|
textline " "
|
|
bitfld.long 0x8 15. " FLTEN11[1] ,Filter Enable for WAKEUP_INT0[1]" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " FLTSEL11[1] ,Filter Selection for WAKEUP_INT0[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 8.--13. 1. " FLTWIDTH11[1] ,Filter Selection for WAKEUP_INT0[1]"
|
|
textline " "
|
|
bitfld.long 0x8 7. " FLTEN11[0] ,Filter Enable for WAKEUP_INT0[0]" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " FLTSEL11[0] ,Filter Selection for WAKEUP_INT0[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 0.--5. 1. " FLTWIDTH11[0] ,Filter Selection for WAKEUP_INT0[0]"
|
|
line.long 0x8+0x04 "WAKEUP_INT1_FLTCON1,External interrupt WAKEUP_INT1 filter configuration register 0"
|
|
bitfld.long 0x8+0x04 31. " FLTEN11[7] ,Filter Enable for WAKEUP_INT0[7]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 30. " FLTSEL11[7] ,Filter Selection for WAKEUP_INT0[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 24.--29. 1. " FLTWIDTH11[7] ,Filter Selection for WAKEUP_INT0[7]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 23. " FLTEN11[6] ,Filter Enable for WAKEUP_INT0[6]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 22. " FLTSEL11[6] ,Filter Selection for WAKEUP_INT0[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 16.--21. 1. " FLTWIDTH11[6] ,Filter Selection for WAKEUP_INT0[6]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 15. " FLTEN11[5] ,Filter Enable for WAKEUP_INT0[5]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 14. " FLTSEL11[5] ,Filter Selection for WAKEUP_INT0[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 8.--13. 1. " FLTWIDTH11[5] ,Filter Selection for WAKEUP_INT0[5]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 7. " FLTEN11[4] ,Filter Enable for WAKEUP_INT0[4]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 6. " FLTSEL11[4] ,Filter Selection for WAKEUP_INT0[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 0.--5. 1. " FLTWIDTH11[4] ,Filter Selection for WAKEUP_INT0[4]"
|
|
line.long 0x10 "WAKEUP_INT2_FLTCON0,External interrupt WAKEUP_INT2 filter configuration register 0"
|
|
bitfld.long 0x10 31. " FLTEN12[3] ,Filter Enable for WAKEUP_INT0[3]" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " FLTSEL12[3] ,Filter Selection for WAKEUP_INT0[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 24.--29. 1. " FLTWIDTH12[3] ,Filter Selection for WAKEUP_INT0[3]"
|
|
textline " "
|
|
bitfld.long 0x10 23. " FLTEN12[2] ,Filter Enable for WAKEUP_INT0[2]" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " FLTSEL12[2] ,Filter Selection for WAKEUP_INT0[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 16.--21. 1. " FLTWIDTH12[2] ,Filter Selection for WAKEUP_INT0[2]"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FLTEN12[1] ,Filter Enable for WAKEUP_INT0[1]" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " FLTSEL12[1] ,Filter Selection for WAKEUP_INT0[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 8.--13. 1. " FLTWIDTH12[1] ,Filter Selection for WAKEUP_INT0[1]"
|
|
textline " "
|
|
bitfld.long 0x10 7. " FLTEN12[0] ,Filter Enable for WAKEUP_INT0[0]" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " FLTSEL12[0] ,Filter Selection for WAKEUP_INT0[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 0.--5. 1. " FLTWIDTH12[0] ,Filter Selection for WAKEUP_INT0[0]"
|
|
line.long 0x10+0x04 "WAKEUP_INT2_FLTCON1,External interrupt WAKEUP_INT2 filter configuration register 0"
|
|
bitfld.long 0x10+0x04 31. " FLTEN12[7] ,Filter Enable for WAKEUP_INT0[7]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 30. " FLTSEL12[7] ,Filter Selection for WAKEUP_INT0[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 24.--29. 1. " FLTWIDTH12[7] ,Filter Selection for WAKEUP_INT0[7]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 23. " FLTEN12[6] ,Filter Enable for WAKEUP_INT0[6]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 22. " FLTSEL12[6] ,Filter Selection for WAKEUP_INT0[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 16.--21. 1. " FLTWIDTH12[6] ,Filter Selection for WAKEUP_INT0[6]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 15. " FLTEN12[5] ,Filter Enable for WAKEUP_INT0[5]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 14. " FLTSEL12[5] ,Filter Selection for WAKEUP_INT0[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 8.--13. 1. " FLTWIDTH12[5] ,Filter Selection for WAKEUP_INT0[5]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 7. " FLTEN12[4] ,Filter Enable for WAKEUP_INT0[4]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 6. " FLTSEL12[4] ,Filter Selection for WAKEUP_INT0[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 0.--5. 1. " FLTWIDTH12[4] ,Filter Selection for WAKEUP_INT0[4]"
|
|
line.long 0x18 "WAKEUP_INT3_FLTCON0,External interrupt WAKEUP_INT3 filter configuration register 0"
|
|
bitfld.long 0x18 31. " FLTEN13[3] ,Filter Enable for WAKEUP_INT0[3]" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " FLTSEL13[3] ,Filter Selection for WAKEUP_INT0[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 24.--29. 1. " FLTWIDTH13[3] ,Filter Selection for WAKEUP_INT0[3]"
|
|
textline " "
|
|
bitfld.long 0x18 23. " FLTEN13[2] ,Filter Enable for WAKEUP_INT0[2]" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " FLTSEL13[2] ,Filter Selection for WAKEUP_INT0[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 16.--21. 1. " FLTWIDTH13[2] ,Filter Selection for WAKEUP_INT0[2]"
|
|
textline " "
|
|
bitfld.long 0x18 15. " FLTEN13[1] ,Filter Enable for WAKEUP_INT0[1]" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " FLTSEL13[1] ,Filter Selection for WAKEUP_INT0[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 8.--13. 1. " FLTWIDTH13[1] ,Filter Selection for WAKEUP_INT0[1]"
|
|
textline " "
|
|
bitfld.long 0x18 7. " FLTEN13[0] ,Filter Enable for WAKEUP_INT0[0]" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " FLTSEL13[0] ,Filter Selection for WAKEUP_INT0[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 0.--5. 1. " FLTWIDTH13[0] ,Filter Selection for WAKEUP_INT0[0]"
|
|
line.long 0x18+0x04 "WAKEUP_INT3_FLTCON1,External interrupt WAKEUP_INT3 filter configuration register 0"
|
|
bitfld.long 0x18+0x04 31. " FLTEN13[7] ,Filter Enable for WAKEUP_INT0[7]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 30. " FLTSEL13[7] ,Filter Selection for WAKEUP_INT0[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 24.--29. 1. " FLTWIDTH13[7] ,Filter Selection for WAKEUP_INT0[7]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 23. " FLTEN13[6] ,Filter Enable for WAKEUP_INT0[6]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 22. " FLTSEL13[6] ,Filter Selection for WAKEUP_INT0[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 16.--21. 1. " FLTWIDTH13[6] ,Filter Selection for WAKEUP_INT0[6]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 15. " FLTEN13[5] ,Filter Enable for WAKEUP_INT0[5]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 14. " FLTSEL13[5] ,Filter Selection for WAKEUP_INT0[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 8.--13. 1. " FLTWIDTH13[5] ,Filter Selection for WAKEUP_INT0[5]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 7. " FLTEN13[4] ,Filter Enable for WAKEUP_INT0[4]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 6. " FLTSEL13[4] ,Filter Selection for WAKEUP_INT0[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 0.--5. 1. " FLTWIDTH13[4] ,Filter Selection for WAKEUP_INT0[4]"
|
|
tree.end
|
|
tree "Wakeup interrupt mask"
|
|
group.long 0xF00++15.
|
|
line.long 0x0 "WAKEUP_INT0_MASK,External interrupt WAKEUP_INT0 mask register"
|
|
bitfld.long 0x0 7. " WAKEUP_INT0_MASK[7] ,Wakeup interrupt 0 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 6. " WAKEUP_INT0_MASK[6] ,Wakeup interrupt 0 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " WAKEUP_INT0_MASK[5] ,Wakeup interrupt 0 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 4. " WAKEUP_INT0_MASK[4] ,Wakeup interrupt 0 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " WAKEUP_INT0_MASK[3] ,Wakeup interrupt 0 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 2. " WAKEUP_INT0_MASK[2] ,Wakeup interrupt 0 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " WAKEUP_INT0_MASK[1] ,Wakeup interrupt 0 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 0. " WAKEUP_INT0_MASK[0] ,Wakeup interrupt 0 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x4 "WAKEUP_INT1_MASK,External interrupt WAKEUP_INT1 mask register"
|
|
bitfld.long 0x4 7. " WAKEUP_INT1_MASK[7] ,Wakeup interrupt 1 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 6. " WAKEUP_INT1_MASK[6] ,Wakeup interrupt 1 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 5. " WAKEUP_INT1_MASK[5] ,Wakeup interrupt 1 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 4. " WAKEUP_INT1_MASK[4] ,Wakeup interrupt 1 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " WAKEUP_INT1_MASK[3] ,Wakeup interrupt 1 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 2. " WAKEUP_INT1_MASK[2] ,Wakeup interrupt 1 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 1. " WAKEUP_INT1_MASK[1] ,Wakeup interrupt 1 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 0. " WAKEUP_INT1_MASK[0] ,Wakeup interrupt 1 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x8 "WAKEUP_INT2_MASK,External interrupt WAKEUP_INT2 mask register"
|
|
bitfld.long 0x8 7. " WAKEUP_INT2_MASK[7] ,Wakeup interrupt 2 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 6. " WAKEUP_INT2_MASK[6] ,Wakeup interrupt 2 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 5. " WAKEUP_INT2_MASK[5] ,Wakeup interrupt 2 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 4. " WAKEUP_INT2_MASK[4] ,Wakeup interrupt 2 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 3. " WAKEUP_INT2_MASK[3] ,Wakeup interrupt 2 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 2. " WAKEUP_INT2_MASK[2] ,Wakeup interrupt 2 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 1. " WAKEUP_INT2_MASK[1] ,Wakeup interrupt 2 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 0. " WAKEUP_INT2_MASK[0] ,Wakeup interrupt 2 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0xC "WAKEUP_INT3_MASK,External interrupt WAKEUP_INT3 mask register"
|
|
bitfld.long 0xC 7. " WAKEUP_INT3_MASK[7] ,Wakeup interrupt 3 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 6. " WAKEUP_INT3_MASK[6] ,Wakeup interrupt 3 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 5. " WAKEUP_INT3_MASK[5] ,Wakeup interrupt 3 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 4. " WAKEUP_INT3_MASK[4] ,Wakeup interrupt 3 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 3. " WAKEUP_INT3_MASK[3] ,Wakeup interrupt 3 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 2. " WAKEUP_INT3_MASK[2] ,Wakeup interrupt 3 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 1. " WAKEUP_INT3_MASK[1] ,Wakeup interrupt 3 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 0. " WAKEUP_INT3_MASK[0] ,Wakeup interrupt 3 mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "Wakeup interrupt pending"
|
|
group.long 0xF40++15.
|
|
line.long 0x0 "WAKEUP_INT0_PEND,External interrupt WAKEUP_INT0 pending register"
|
|
bitfld.long 0x0 7. " WAKEUP_INT0_PEND[7] ,Wakeup interrupt 0 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 6. " WAKEUP_INT0_PEND[6] ,Wakeup interrupt 0 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 5. " WAKEUP_INT0_PEND[5] ,Wakeup interrupt 0 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 4. " WAKEUP_INT0_PEND[4] ,Wakeup interrupt 0 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 3. " WAKEUP_INT0_PEND[3] ,Wakeup interrupt 0 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 2. " WAKEUP_INT0_PEND[2] ,Wakeup interrupt 0 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " WAKEUP_INT0_PEND[1] ,Wakeup interrupt 0 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 0. " WAKEUP_INT0_PEND[0] ,Wakeup interrupt 0 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x4 "WAKEUP_INT1_PEND,External interrupt WAKEUP_INT1 pending register"
|
|
bitfld.long 0x4 7. " WAKEUP_INT1_PEND[7] ,Wakeup interrupt 1 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 6. " WAKEUP_INT1_PEND[6] ,Wakeup interrupt 1 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 5. " WAKEUP_INT1_PEND[5] ,Wakeup interrupt 1 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 4. " WAKEUP_INT1_PEND[4] ,Wakeup interrupt 1 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 3. " WAKEUP_INT1_PEND[3] ,Wakeup interrupt 1 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 2. " WAKEUP_INT1_PEND[2] ,Wakeup interrupt 1 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 1. " WAKEUP_INT1_PEND[1] ,Wakeup interrupt 1 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 0. " WAKEUP_INT1_PEND[0] ,Wakeup interrupt 1 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x8 "WAKEUP_INT2_PEND,External interrupt WAKEUP_INT2 pending register"
|
|
bitfld.long 0x8 7. " WAKEUP_INT2_PEND[7] ,Wakeup interrupt 2 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 6. " WAKEUP_INT2_PEND[6] ,Wakeup interrupt 2 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 5. " WAKEUP_INT2_PEND[5] ,Wakeup interrupt 2 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 4. " WAKEUP_INT2_PEND[4] ,Wakeup interrupt 2 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 3. " WAKEUP_INT2_PEND[3] ,Wakeup interrupt 2 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 2. " WAKEUP_INT2_PEND[2] ,Wakeup interrupt 2 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 1. " WAKEUP_INT2_PEND[1] ,Wakeup interrupt 2 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 0. " WAKEUP_INT2_PEND[0] ,Wakeup interrupt 2 pending 0" "Not Occurred,Occurred"
|
|
line.long 0xC "WAKEUP_INT3_PEND,External interrupt WAKEUP_INT3 pending register"
|
|
bitfld.long 0xC 7. " WAKEUP_INT3_PEND[7] ,Wakeup interrupt 3 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 6. " WAKEUP_INT3_PEND[6] ,Wakeup interrupt 3 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 5. " WAKEUP_INT3_PEND[5] ,Wakeup interrupt 3 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 4. " WAKEUP_INT3_PEND[4] ,Wakeup interrupt 3 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 3. " WAKEUP_INT3_PEND[3] ,Wakeup interrupt 3 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 2. " WAKEUP_INT3_PEND[2] ,Wakeup interrupt 3 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 1. " WAKEUP_INT3_PEND[1] ,Wakeup interrupt 3 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 0. " WAKEUP_INT3_PEND[0] ,Wakeup interrupt 3 pending 0" "Not Occurred,Occurred"
|
|
tree.end
|
|
tree.end
|
|
elif (cpu()=="Exynos4212")
|
|
width 22.
|
|
tree "External interrupts"
|
|
tree "External interrupts configuration"
|
|
group.long 0xE00++15.
|
|
line.long 0x0 "EXT_INT40CON,External interrupt EXT_INT40 configuration register"
|
|
bitfld.long 0x0 28.--30. " EXT_INT40CON[7] ,Setting the signaling method of EXT_INT40[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 24.--26. " EXT_INT40CON[6] ,Setting the signaling method of EXT_INT40[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 20.--22. " EXT_INT40CON[5] ,Setting the signaling method of EXT_INT40[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 16.--18. " EXT_INT40CON[4] ,Setting the signaling method of EXT_INT40[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 12.--14. " EXT_INT40CON[3] ,Setting the signaling method of EXT_INT40[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 8.--10. " EXT_INT40CON[2] ,Setting the signaling method of EXT_INT40[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x0 4.--6. " EXT_INT40CON[1] ,Setting the signaling method of EXT_INT40[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x0 0.--2. " EXT_INT40CON[0] ,Setting the signaling method of EXT_INT40[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x4 "EXT_INT41CON,External interrupt EXT_INT41 configuration register"
|
|
bitfld.long 0x4 28.--30. " EXT_INT41CON[7] ,Setting the signaling method of EXT_INT41[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 24.--26. " EXT_INT41CON[6] ,Setting the signaling method of EXT_INT41[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 20.--22. " EXT_INT41CON[5] ,Setting the signaling method of EXT_INT41[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 16.--18. " EXT_INT41CON[4] ,Setting the signaling method of EXT_INT41[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 12.--14. " EXT_INT41CON[3] ,Setting the signaling method of EXT_INT41[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 8.--10. " EXT_INT41CON[2] ,Setting the signaling method of EXT_INT41[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x4 4.--6. " EXT_INT41CON[1] ,Setting the signaling method of EXT_INT41[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x4 0.--2. " EXT_INT41CON[0] ,Setting the signaling method of EXT_INT41[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0x8 "EXT_INT42CON,External interrupt EXT_INT42 configuration register"
|
|
bitfld.long 0x8 28.--30. " EXT_INT42CON[7] ,Setting the signaling method of EXT_INT42[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 24.--26. " EXT_INT42CON[6] ,Setting the signaling method of EXT_INT42[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 20.--22. " EXT_INT42CON[5] ,Setting the signaling method of EXT_INT42[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 16.--18. " EXT_INT42CON[4] ,Setting the signaling method of EXT_INT42[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 12.--14. " EXT_INT42CON[3] ,Setting the signaling method of EXT_INT42[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 8.--10. " EXT_INT42CON[2] ,Setting the signaling method of EXT_INT42[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x8 4.--6. " EXT_INT42CON[1] ,Setting the signaling method of EXT_INT42[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x8 0.--2. " EXT_INT42CON[0] ,Setting the signaling method of EXT_INT42[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
line.long 0xC "EXT_INT43CON,External interrupt EXT_INT43 configuration register"
|
|
bitfld.long 0xC 28.--30. " EXT_INT43CON[7] ,Setting the signaling method of EXT_INT43[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 24.--26. " EXT_INT43CON[6] ,Setting the signaling method of EXT_INT43[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 20.--22. " EXT_INT43CON[5] ,Setting the signaling method of EXT_INT43[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 16.--18. " EXT_INT43CON[4] ,Setting the signaling method of EXT_INT43[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 12.--14. " EXT_INT43CON[3] ,Setting the signaling method of EXT_INT43[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 8.--10. " EXT_INT43CON[2] ,Setting the signaling method of EXT_INT43[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0xC 4.--6. " EXT_INT43CON[1] ,Setting the signaling method of EXT_INT43[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0xC 0.--2. " EXT_INT43CON[0] ,Setting the signaling method of EXT_INT43[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
tree "External interrupts filter configuration"
|
|
group.long 0xE80++0x1f
|
|
line.long 0x0 "EXT_INT40_FLTCON0,External interrupt EXT_INT40 filter configuration register 0"
|
|
bitfld.long 0x0 31. " FLTEN15[3] ,Filter Enable for EXT_INT40[3]" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " FLTSEL15[3] ,Filter Selection for EXT_INT40[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 24.--29. 1. " FLTWIDTH15[3] ,Filter Selection for EXT_INT40[3]"
|
|
textline " "
|
|
bitfld.long 0x0 23. " FLTEN15[2] ,Filter Enable for EXT_INT40[2]" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " FLTSEL15[2] ,Filter Selection for EXT_INT40[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 16.--21. 1. " FLTWIDTH15[2] ,Filter Selection for EXT_INT40[2]"
|
|
textline " "
|
|
bitfld.long 0x0 15. " FLTEN15[1] ,Filter Enable for EXT_INT40[1]" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " FLTSEL15[1] ,Filter Selection for EXT_INT40[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 8.--13. 1. " FLTWIDTH15[1] ,Filter Selection for EXT_INT40[1]"
|
|
textline " "
|
|
bitfld.long 0x0 7. " FLTEN15[0] ,Filter Enable for EXT_INT40[0]" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " FLTSEL15[0] ,Filter Selection for EXT_INT40[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0 0.--5. 1. " FLTWIDTH15[0] ,Filter Selection for EXT_INT40[0]"
|
|
line.long 0x0+0x04 "EXT_INT40_FLTCON1,External interrupt EXT_INT40 filter configuration register 0"
|
|
bitfld.long 0x0+0x04 31. " FLTEN15[7] ,Filter Enable for EXT_INT40[7]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 30. " FLTSEL15[7] ,Filter Selection for EXT_INT40[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 24.--29. 1. " FLTWIDTH15[7] ,Filter Selection for EXT_INT40[7]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 23. " FLTEN15[6] ,Filter Enable for EXT_INT40[6]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 22. " FLTSEL15[6] ,Filter Selection for EXT_INT40[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 16.--21. 1. " FLTWIDTH15[6] ,Filter Selection for EXT_INT40[6]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 15. " FLTEN15[5] ,Filter Enable for EXT_INT40[5]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 14. " FLTSEL15[5] ,Filter Selection for EXT_INT40[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 8.--13. 1. " FLTWIDTH15[5] ,Filter Selection for EXT_INT40[5]"
|
|
textline " "
|
|
bitfld.long 0x0+0x04 7. " FLTEN15[4] ,Filter Enable for EXT_INT40[4]" "Disabled,Enabled"
|
|
bitfld.long 0x0+0x04 6. " FLTSEL15[4] ,Filter Selection for EXT_INT40[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x0+0x04 0.--5. 1. " FLTWIDTH15[4] ,Filter Selection for EXT_INT40[4]"
|
|
line.long 0x8 "EXT_INT41_FLTCON0,External interrupt EXT_INT41 filter configuration register 0"
|
|
bitfld.long 0x8 31. " FLTEN16[3] ,Filter Enable for EXT_INT41[3]" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " FLTSEL16[3] ,Filter Selection for EXT_INT41[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 24.--29. 1. " FLTWIDTH16[3] ,Filter Selection for EXT_INT41[3]"
|
|
textline " "
|
|
bitfld.long 0x8 23. " FLTEN16[2] ,Filter Enable for EXT_INT41[2]" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " FLTSEL16[2] ,Filter Selection for EXT_INT41[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 16.--21. 1. " FLTWIDTH16[2] ,Filter Selection for EXT_INT41[2]"
|
|
textline " "
|
|
bitfld.long 0x8 15. " FLTEN16[1] ,Filter Enable for EXT_INT41[1]" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " FLTSEL16[1] ,Filter Selection for EXT_INT41[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 8.--13. 1. " FLTWIDTH16[1] ,Filter Selection for EXT_INT41[1]"
|
|
textline " "
|
|
bitfld.long 0x8 7. " FLTEN16[0] ,Filter Enable for EXT_INT41[0]" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " FLTSEL16[0] ,Filter Selection for EXT_INT41[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8 0.--5. 1. " FLTWIDTH16[0] ,Filter Selection for EXT_INT41[0]"
|
|
line.long 0x8+0x04 "EXT_INT41_FLTCON1,External interrupt EXT_INT41 filter configuration register 0"
|
|
bitfld.long 0x8+0x04 31. " FLTEN16[7] ,Filter Enable for EXT_INT41[7]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 30. " FLTSEL16[7] ,Filter Selection for EXT_INT41[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 24.--29. 1. " FLTWIDTH16[7] ,Filter Selection for EXT_INT41[7]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 23. " FLTEN16[6] ,Filter Enable for EXT_INT41[6]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 22. " FLTSEL16[6] ,Filter Selection for EXT_INT41[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 16.--21. 1. " FLTWIDTH16[6] ,Filter Selection for EXT_INT41[6]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 15. " FLTEN16[5] ,Filter Enable for EXT_INT41[5]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 14. " FLTSEL16[5] ,Filter Selection for EXT_INT41[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 8.--13. 1. " FLTWIDTH16[5] ,Filter Selection for EXT_INT41[5]"
|
|
textline " "
|
|
bitfld.long 0x8+0x04 7. " FLTEN16[4] ,Filter Enable for EXT_INT41[4]" "Disabled,Enabled"
|
|
bitfld.long 0x8+0x04 6. " FLTSEL16[4] ,Filter Selection for EXT_INT41[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x8+0x04 0.--5. 1. " FLTWIDTH16[4] ,Filter Selection for EXT_INT41[4]"
|
|
line.long 0x10 "EXT_INT42_FLTCON0,External interrupt EXT_INT42 filter configuration register 0"
|
|
bitfld.long 0x10 31. " FLTEN17[3] ,Filter Enable for EXT_INT42[3]" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " FLTSEL17[3] ,Filter Selection for EXT_INT42[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 24.--29. 1. " FLTWIDTH17[3] ,Filter Selection for EXT_INT42[3]"
|
|
textline " "
|
|
bitfld.long 0x10 23. " FLTEN17[2] ,Filter Enable for EXT_INT42[2]" "Disabled,Enabled"
|
|
bitfld.long 0x10 22. " FLTSEL17[2] ,Filter Selection for EXT_INT42[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 16.--21. 1. " FLTWIDTH17[2] ,Filter Selection for EXT_INT42[2]"
|
|
textline " "
|
|
bitfld.long 0x10 15. " FLTEN17[1] ,Filter Enable for EXT_INT42[1]" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " FLTSEL17[1] ,Filter Selection for EXT_INT42[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 8.--13. 1. " FLTWIDTH17[1] ,Filter Selection for EXT_INT42[1]"
|
|
textline " "
|
|
bitfld.long 0x10 7. " FLTEN17[0] ,Filter Enable for EXT_INT42[0]" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " FLTSEL17[0] ,Filter Selection for EXT_INT42[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10 0.--5. 1. " FLTWIDTH17[0] ,Filter Selection for EXT_INT42[0]"
|
|
line.long 0x10+0x04 "EXT_INT42_FLTCON1,External interrupt EXT_INT42 filter configuration register 0"
|
|
bitfld.long 0x10+0x04 31. " FLTEN17[7] ,Filter Enable for EXT_INT42[7]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 30. " FLTSEL17[7] ,Filter Selection for EXT_INT42[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 24.--29. 1. " FLTWIDTH17[7] ,Filter Selection for EXT_INT42[7]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 23. " FLTEN17[6] ,Filter Enable for EXT_INT42[6]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 22. " FLTSEL17[6] ,Filter Selection for EXT_INT42[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 16.--21. 1. " FLTWIDTH17[6] ,Filter Selection for EXT_INT42[6]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 15. " FLTEN17[5] ,Filter Enable for EXT_INT42[5]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 14. " FLTSEL17[5] ,Filter Selection for EXT_INT42[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 8.--13. 1. " FLTWIDTH17[5] ,Filter Selection for EXT_INT42[5]"
|
|
textline " "
|
|
bitfld.long 0x10+0x04 7. " FLTEN17[4] ,Filter Enable for EXT_INT42[4]" "Disabled,Enabled"
|
|
bitfld.long 0x10+0x04 6. " FLTSEL17[4] ,Filter Selection for EXT_INT42[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x10+0x04 0.--5. 1. " FLTWIDTH17[4] ,Filter Selection for EXT_INT42[4]"
|
|
line.long 0x18 "EXT_INT43_FLTCON0,External interrupt EXT_INT43 filter configuration register 0"
|
|
bitfld.long 0x18 31. " FLTEN18[3] ,Filter Enable for EXT_INT43[3]" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " FLTSEL18[3] ,Filter Selection for EXT_INT43[3]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 24.--29. 1. " FLTWIDTH18[3] ,Filter Selection for EXT_INT43[3]"
|
|
textline " "
|
|
bitfld.long 0x18 23. " FLTEN18[2] ,Filter Enable for EXT_INT43[2]" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " FLTSEL18[2] ,Filter Selection for EXT_INT43[2]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 16.--21. 1. " FLTWIDTH18[2] ,Filter Selection for EXT_INT43[2]"
|
|
textline " "
|
|
bitfld.long 0x18 15. " FLTEN18[1] ,Filter Enable for EXT_INT43[1]" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " FLTSEL18[1] ,Filter Selection for EXT_INT43[1]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 8.--13. 1. " FLTWIDTH18[1] ,Filter Selection for EXT_INT43[1]"
|
|
textline " "
|
|
bitfld.long 0x18 7. " FLTEN18[0] ,Filter Enable for EXT_INT43[0]" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " FLTSEL18[0] ,Filter Selection for EXT_INT43[0]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18 0.--5. 1. " FLTWIDTH18[0] ,Filter Selection for EXT_INT43[0]"
|
|
line.long 0x18+0x04 "EXT_INT43_FLTCON1,External interrupt EXT_INT43 filter configuration register 0"
|
|
bitfld.long 0x18+0x04 31. " FLTEN18[7] ,Filter Enable for EXT_INT43[7]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 30. " FLTSEL18[7] ,Filter Selection for EXT_INT43[7]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 24.--29. 1. " FLTWIDTH18[7] ,Filter Selection for EXT_INT43[7]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 23. " FLTEN18[6] ,Filter Enable for EXT_INT43[6]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 22. " FLTSEL18[6] ,Filter Selection for EXT_INT43[6]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 16.--21. 1. " FLTWIDTH18[6] ,Filter Selection for EXT_INT43[6]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 15. " FLTEN18[5] ,Filter Enable for EXT_INT43[5]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 14. " FLTSEL18[5] ,Filter Selection for EXT_INT43[5]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 8.--13. 1. " FLTWIDTH18[5] ,Filter Selection for EXT_INT43[5]"
|
|
textline " "
|
|
bitfld.long 0x18+0x04 7. " FLTEN18[4] ,Filter Enable for EXT_INT43[4]" "Disabled,Enabled"
|
|
bitfld.long 0x18+0x04 6. " FLTSEL18[4] ,Filter Selection for EXT_INT43[4]" "Delay filter,Digital filter"
|
|
hexmask.long.byte 0x18+0x04 0.--5. 1. " FLTWIDTH18[4] ,Filter Selection for EXT_INT43[4]"
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupts mask"
|
|
group.long 0xF00++15.
|
|
line.long 0x0 "EXT_INT40_MASK,External interrupt EXT_INT40 mask register"
|
|
bitfld.long 0x0 7. " EXT_INT40_MASK[7] ,EXT interrupt 40 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 6. " EXT_INT40_MASK[6] ,EXT interrupt 40 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT40_MASK[5] ,EXT interrupt 40 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 4. " EXT_INT40_MASK[4] ,EXT interrupt 40 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT40_MASK[3] ,EXT interrupt 40 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 2. " EXT_INT40_MASK[2] ,EXT interrupt 40 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT40_MASK[1] ,EXT interrupt 40 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 0. " EXT_INT40_MASK[0] ,EXT interrupt 40 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x4 "EXT_INT41_MASK,External interrupt EXT_INT41 mask register"
|
|
bitfld.long 0x4 7. " EXT_INT41_MASK[7] ,EXT interrupt 41 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 6. " EXT_INT41_MASK[6] ,EXT interrupt 41 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT41_MASK[5] ,EXT interrupt 41 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 4. " EXT_INT41_MASK[4] ,EXT interrupt 41 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT41_MASK[3] ,EXT interrupt 41 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 2. " EXT_INT41_MASK[2] ,EXT interrupt 41 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT41_MASK[1] ,EXT interrupt 41 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 0. " EXT_INT41_MASK[0] ,EXT interrupt 41 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x8 "EXT_INT42_MASK,External interrupt EXT_INT42 mask register"
|
|
bitfld.long 0x8 7. " EXT_INT42_MASK[7] ,EXT interrupt 42 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 6. " EXT_INT42_MASK[6] ,EXT interrupt 42 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT42_MASK[5] ,EXT interrupt 42 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 4. " EXT_INT42_MASK[4] ,EXT interrupt 42 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT42_MASK[3] ,EXT interrupt 42 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 2. " EXT_INT42_MASK[2] ,EXT interrupt 42 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT42_MASK[1] ,EXT interrupt 42 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 0. " EXT_INT42_MASK[0] ,EXT interrupt 42 mask 0" "Enable Interrupt,Masked"
|
|
line.long 0xC "EXT_INT43_MASK,External interrupt EXT_INT43 mask register"
|
|
bitfld.long 0xC 7. " EXT_INT43_MASK[7] ,EXT interrupt 43 mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 6. " EXT_INT43_MASK[6] ,EXT interrupt 43 mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT43_MASK[5] ,EXT interrupt 43 mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 4. " EXT_INT43_MASK[4] ,EXT interrupt 43 mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT43_MASK[3] ,EXT interrupt 43 mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 2. " EXT_INT43_MASK[2] ,EXT interrupt 43 mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT43_MASK[1] ,EXT interrupt 43 mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 0. " EXT_INT43_MASK[0] ,EXT interrupt 43 mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupts pending"
|
|
group.long 0xF40++15.
|
|
line.long 0x0 "EXT_INT0_PEND,External interrupt EXT_INT0 pending register"
|
|
bitfld.long 0x0 7. " EXT_INT0_PEND[7] ,EXT interrupt 0 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 6. " EXT_INT0_PEND[6] ,EXT interrupt 0 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT0_PEND[5] ,EXT interrupt 0 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 4. " EXT_INT0_PEND[4] ,EXT interrupt 0 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT0_PEND[3] ,EXT interrupt 0 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 2. " EXT_INT0_PEND[2] ,EXT interrupt 0 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT0_PEND[1] ,EXT interrupt 0 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x0 0. " EXT_INT0_PEND[0] ,EXT interrupt 0 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x4 "EXT_INT1_PEND,External interrupt EXT_INT1 pending register"
|
|
bitfld.long 0x4 7. " EXT_INT1_PEND[7] ,EXT interrupt 1 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 6. " EXT_INT1_PEND[6] ,EXT interrupt 1 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT1_PEND[5] ,EXT interrupt 1 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 4. " EXT_INT1_PEND[4] ,EXT interrupt 1 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT1_PEND[3] ,EXT interrupt 1 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 2. " EXT_INT1_PEND[2] ,EXT interrupt 1 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT1_PEND[1] ,EXT interrupt 1 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x4 0. " EXT_INT1_PEND[0] ,EXT interrupt 1 pending 0" "Not Occurred,Occurred"
|
|
line.long 0x8 "EXT_INT2_PEND,External interrupt EXT_INT2 pending register"
|
|
bitfld.long 0x8 7. " EXT_INT2_PEND[7] ,EXT interrupt 2 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 6. " EXT_INT2_PEND[6] ,EXT interrupt 2 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT2_PEND[5] ,EXT interrupt 2 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 4. " EXT_INT2_PEND[4] ,EXT interrupt 2 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT2_PEND[3] ,EXT interrupt 2 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 2. " EXT_INT2_PEND[2] ,EXT interrupt 2 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT2_PEND[1] ,EXT interrupt 2 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0x8 0. " EXT_INT2_PEND[0] ,EXT interrupt 2 pending 0" "Not Occurred,Occurred"
|
|
line.long 0xC "EXT_INT3_PEND,External interrupt EXT_INT3 pending register"
|
|
bitfld.long 0xC 7. " EXT_INT3_PEND[7] ,EXT interrupt 3 pending 7" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 6. " EXT_INT3_PEND[6] ,EXT interrupt 3 pending 6" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT3_PEND[5] ,EXT interrupt 3 pending 5" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 4. " EXT_INT3_PEND[4] ,EXT interrupt 3 pending 4" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT3_PEND[3] ,EXT interrupt 3 pending 3" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 2. " EXT_INT3_PEND[2] ,EXT interrupt 3 pending 2" "Not Occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT3_PEND[1] ,EXT interrupt 3 pending 1" "Not Occurred,Occurred"
|
|
bitfld.long 0xC 0. " EXT_INT3_PEND[0] ,EXT interrupt 3 pending 0" "Not Occurred,Occurred"
|
|
tree.end
|
|
tree "Power down mode pad"
|
|
width 11.
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "PDNEN"
|
|
bitfld.long 0x00 1. " PDNEN_CFG ,Power down mode config" "Auto,PDNEN"
|
|
bitfld.long 0x00 0. " PDNEN ,Power down mode pad state enable register" "Normal mode,Power Down mode"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
width 0xb
|
|
base ad:0x03860000
|
|
width 15.
|
|
tree "GPZ"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPZCON,Port Group GPZ Configuration Register"
|
|
sif (cpu()=="Exynos4210")
|
|
bitfld.long 0x00 24.--27. " GPZCON[6] ,GPZ Pin 6 Configuration" "Input,Output,I2S_0_SDO[2],ST_INT,?..."
|
|
bitfld.long 0x00 20.--23. " GPZCON[5] ,GPZ Pin 5 Configuration" "Input,Output,I2S_0_SDO[1],ST_TICK,?..."
|
|
bitfld.long 0x00 16.--19. " GPZCON[4] ,GPZ Pin 4 Configuration" "Input,Output,I2S_0_SDO[0],PCM_0_SOUT,?..."
|
|
bitfld.long 0x00 12.--15. " GPZCON[3] ,GPZ Pin 3 Configuration" "Input,Output,I2S_0_SDI,PCM_0_SIN,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPZCON[2] ,GPZ Pin 2 Configuration" "Input,Output,I2S_0_LRCK,PCM_0_FSYNC,?..."
|
|
bitfld.long 0x00 4.--7. " GPZCON[1] ,GPZ Pin 1 Configuration" "Input,Output,I2S_0_CDCLK,PCM_0_EXTCLK,?..."
|
|
bitfld.long 0x00 0.--3. " GPZCON[0] ,GPZ Pin 0 Configuration" "Input,Output,I2S_0_SCLK,PCM_0_SCLK,?..."
|
|
elif (cpu()=="Exynos4212")
|
|
bitfld.long 0x00 24.--27. " GPZCON[6] ,GPZ Pin 6 Configuration" "Input,Output,I2S_0_SDO[2],ST_INT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[6]"
|
|
bitfld.long 0x00 20.--23. " GPZCON[5] ,GPZ Pin 5 Configuration" "Input,Output,I2S_0_SDO[1],ST_TICK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[5]"
|
|
bitfld.long 0x00 16.--19. " GPZCON[4] ,GPZ Pin 4 Configuration" "Input,Output,I2S_0_SDO[0],PCM_0_SOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[4]"
|
|
bitfld.long 0x00 12.--15. " GPZCON[3] ,GPZ Pin 3 Configuration" "Input,Output,I2S_0_SDI,PCM_0_SIN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[3]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " GPZCON[2] ,GPZ Pin 2 Configuration" "Input,Output,I2S_0_LRCK,PCM_0_FSYNC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[2]"
|
|
bitfld.long 0x00 4.--7. " GPZCON[1] ,GPZ Pin 1 Configuration" "Input,Output,I2S_0_CDCLK,PCM_0_EXTCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[1]"
|
|
bitfld.long 0x00 0.--3. " GPZCON[0] ,GPZ Pin 0 Configuration" "Input,Output,I2S_0_SCLK,PCM_0_SCLK,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT50[0]"
|
|
endif
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPZDAT,Port Group GPZ Data Register"
|
|
bitfld.byte 0x00 6. " GPZDAT[6] ,GPZ Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPZDAT[5] ,GPZ Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPZDAT[4] ,GPZ Pin 4 Data" "Low,High"
|
|
bitfld.byte 0x00 3. " GPZDAT[3] ,GPZ Pin 3 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPZDAT[2] ,GPZ Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPZDAT[1] ,GPZ Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPZDAT[0] ,GPZ Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPZPUD,Port Group GPZ Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPZPUD[6] ,GPZ Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPZPUD[5] ,GPZ Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPZPUD[4] ,GPZ Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPZPUD[3] ,GPZ Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZPUD[2] ,GPZ Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPZPUD[1] ,GPZ Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPZPUD[0] ,GPZ Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPZDRV,Port Group GPZ Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 12.--13. " GPZDRV[6] ,GPZ Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPZDRV[5] ,GPZ Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPZDRV[4] ,GPZ Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 6.--7. " GPZDRV[3] ,GPZ Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 4.--5. " GPZDRV[2] ,GPZ Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPZDRV[1] ,GPZ Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPZDRV[0] ,GPZ Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPZCONPDN,Port Group GPZ Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 12.--13. " GPZ[6] ,GPZ Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPZ[5] ,GPZ Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPZ[4] ,GPZ Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 6.--7. " GPZ[3] ,GPZ Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZ[2] ,GPZ Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPZ[1] ,GPZ Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPZ[0] ,GPZ Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPZPUDPDN,Port Group GPZ Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 12.--13. " GPZ[6] ,GPZ Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPZ[5] ,GPZ Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPZ[4] ,GPZ Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 6.--7. " GPZ[3] ,GPZ Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " GPZ[2] ,GPZ Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPZ[1] ,GPZ Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPZ[0] ,GPZ Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
sif (cpu()=="Exynos4212")||(cpu()=="Exynos4412")
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "EXT_INT50_CON,External interrupt EXT_INT50 configuration register"
|
|
bitfld.long 0x00 24.--26. " EXT_INT50_CON[6] ,Setting the signaling method of EXT_INT50[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT50_CON[5] ,Setting the signaling method of EXT_INT50[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 16.--18. " EXT_INT50_CON[4] ,Setting the signaling method of EXT_INT50[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " EXT_INT50_CON[3] ,Setting the signaling method of EXT_INT50[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT50_CON[2] ,Setting the signaling method of EXT_INT50[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 4.--6. " EXT_INT50_CON[1] ,Setting the signaling method of EXT_INT50[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " EXT_INT50_CON[0] ,Setting the signaling method of EXT_INT50[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "EXT_INT50_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN1[3] ,Filter Enable for EXT_INT50[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH10[3] ,Filtering width of EXT_INT50[3]"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN1[2] ,Filter Enable for EXT_INT50[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[2] ,Filtering width of EXT_INT50[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[1] ,Filter Enable for EXT_INT50[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[1] ,Filtering width of EXT_INT50[1]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[0] ,Filter Enable for EXT_INT50[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[0] ,Filtering width of EXT_INT50[0]"
|
|
group.long 0x804++0x03
|
|
line.long 0x00 "EXT_INT50_FLTCON1"
|
|
bitfld.long 0x00 23. " FLTEN1[6] ,Filter Enable for EXT_INT50[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH10[6] ,Filtering width of EXT_INT50[6]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[5] ,Filter Enable for EXT_INT50[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH10[5] ,Filtering width of EXT_INT50[5]"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1[4] ,Filter Enable for EXT_INT50[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH10[4] ,Filtering width of EXT_INT50[4]"
|
|
tree.end
|
|
width 20.
|
|
tree "External interrupt mask"
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "EXT_INT50_MASK,External interrupt EXT_INT50 mask register"
|
|
bitfld.long 0x00 6. " EXT_INT50_MASK[6] ,External Interrupt 50 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EXT_INT50_MASK[5] ,External Interrupt 50 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 4. " EXT_INT50_MASK[4] ,External Interrupt 50 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXT_INT50_MASK[3] ,External Interrupt 50 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 2. " EXT_INT50_MASK[2] ,External Interrupt 50 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EXT_INT50_MASK[1] ,External Interrupt 50 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT50_MASK[0] ,External Interrupt 50 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "EXT_INT50_PEND,External interrupt EXT_INT50 pending register"
|
|
bitfld.long 0x00 6. " EXT_INT50_PEND[6] ,External Interrupt 50 Pending 6" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " EXT_INT50_PEND[5] ,External Interrupt 50 Pending 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EXT_INT50_PEND[4] ,External Interrupt 50 Pending 4" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EXT_INT50_PEND[3] ,External Interrupt 50 Pending 3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EXT_INT50_PEND[2] ,External Interrupt 50 Pending 2" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " EXT_INT50_PEND[1] ,External Interrupt 50 Pending 1" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EXT_INT50_PEND[0] ,External Interrupt 50 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XD,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "EXT_INT50,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XD,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++39.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XD,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "EXT_INT50,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
line.long 0x04 "EXT_INT50_FIXPRI"
|
|
bitfld.long 0x04 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT50" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Power down mode pad"
|
|
width 11.
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "PDNEN"
|
|
bitfld.long 0x00 1. " PDNEN_CFG ,Power down mode config" "Auto,PDNEN"
|
|
bitfld.long 0x00 0. " PDNEN ,Power down mode pad state enable register" "Normal mode,Power Down mode"
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
base ad:0x106E0000
|
|
width 15.
|
|
tree "GPV0"
|
|
group.long 0x000++0x03
|
|
line.long 0x00 "GPV0CON,Port Group GPV0 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV0CON[7] ,GPV0 Pin 7 Configuration" "Input,Output,C2C_RXD[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[7]"
|
|
bitfld.long 0x00 24.--27. " GPV0CON[6] ,GPV0 Pin 6 Configuration" "Input,Output,C2C_RXD[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[6]"
|
|
bitfld.long 0x00 20.--23. " GPV0CON[5] ,GPV0 Pin 5 Configuration" "Input,Output,C2C_RXD[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[5]"
|
|
bitfld.long 0x00 16.--19. " GPV0CON[4] ,GPV0 Pin 4 Configuration" "Input,Output,C2C_RXD[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV0CON[3] ,GPV0 Pin 3 Configuration" "Input,Output,C2C_RXD[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[3]"
|
|
bitfld.long 0x00 8.--11. " GPV0CON[2] ,GPV0 Pin 2 Configuration" "Input,Output,C2C_RXD[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[2]"
|
|
bitfld.long 0x00 4.--7. " GPV0CON[1] ,GPV0 Pin 1 Configuration" "Input,Output,C2C_RXD[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[1]"
|
|
bitfld.long 0x00 0.--3. " GPV0CON[0] ,GPV0 Pin 0 Configuration" "Input,Output,C2C_RXD[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT30[0]"
|
|
group.byte 0x004++0x00
|
|
line.byte 0x00 "GPV0DAT,Port Group GPV0 Data Register"
|
|
bitfld.byte 0x00 7. " GPV0DAT[7] ,GPV0 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV0DAT[6] ,GPV0 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV0DAT[5] ,GPV0 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV0DAT[4] ,GPV0 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV0DAT[3] ,GPV0 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV0DAT[2] ,GPV0 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV0DAT[1] ,GPV0 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV0DAT[0] ,GPV0 Pin 0 Data" "Low,High"
|
|
group.word 0x008++0x01
|
|
line.word 0x00 "GPV0PUD,Port Group GPV0 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV0PUD[7] ,GPV0 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV0PUD[6] ,GPV0 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV0PUD[5] ,GPV0 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV0PUD[4] ,GPV0 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0PUD[3] ,GPV0 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV0PUD[2] ,GPV0 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV0PUD[1] ,GPV0 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV0PUD[0] ,GPV0 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x00C++0x02
|
|
line.tbyte 0x00 "GPV0DRV,Port Group GPV0 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV0DRV[7] ,GPV0 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV0DRV[6] ,GPV0 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV0DRV[5] ,GPV0 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV0DRV[4] ,GPV0 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV0DRV[3] ,GPV0 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV0DRV[2] ,GPV0 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV0DRV[1] ,GPV0 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV0DRV[0] ,GPV0 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x010++0x01
|
|
line.word 0x00 "GPV0CONPDN,Port Group GPV0 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV0[7] ,GPV0 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV0[6] ,GPV0 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV0[5] ,GPV0 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV0[4] ,GPV0 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0[3] ,GPV0 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV0[2] ,GPV0 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV0[1] ,GPV0 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV0[0] ,GPV0 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x014++0x01
|
|
line.word 0x00 "GPV0PUDPDN,Port Group GPV0 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV0[7] ,GPV0 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV0[6] ,GPV0 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV0[5] ,GPV0 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV0[4] ,GPV0 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV0[3] ,GPV0 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV0[2] ,GPV0 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV0[1] ,GPV0 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV0[0] ,GPV0 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "GPV1"
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "GPV1CON,Port Group GPV1 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV1CON[7] ,GPV1 Pin 7 Configuration" "Input,Output,C2C_RXD[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[7]"
|
|
bitfld.long 0x00 24.--27. " GPV1CON[6] ,GPV1 Pin 6 Configuration" "Input,Output,C2C_RXD[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[6]"
|
|
bitfld.long 0x00 20.--23. " GPV1CON[5] ,GPV1 Pin 5 Configuration" "Input,Output,C2C_RXD[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[5]"
|
|
bitfld.long 0x00 16.--19. " GPV1CON[4] ,GPV1 Pin 4 Configuration" "Input,Output,C2C_RXD[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV1CON[3] ,GPV1 Pin 3 Configuration" "Input,Output,C2C_RXD[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[3]"
|
|
bitfld.long 0x00 8.--11. " GPV1CON[2] ,GPV1 Pin 2 Configuration" "Input,Output,C2C_RXD[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[2]"
|
|
bitfld.long 0x00 4.--7. " GPV1CON[1] ,GPV1 Pin 1 Configuration" "Input,Output,C2C_RXD[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[1]"
|
|
bitfld.long 0x00 0.--3. " GPV1CON[0] ,GPV1 Pin 0 Configuration" "Input,Output,C2C_RXD[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT31[0]"
|
|
group.byte 0x024++0x00
|
|
line.byte 0x00 "GPV1DAT,Port Group GPV1 Data Register"
|
|
bitfld.byte 0x00 7. " GPV1DAT[7] ,GPV1 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV1DAT[6] ,GPV1 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV1DAT[5] ,GPV1 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV1DAT[4] ,GPV1 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV1DAT[3] ,GPV1 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV1DAT[2] ,GPV1 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV1DAT[1] ,GPV1 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV1DAT[0] ,GPV1 Pin 0 Data" "Low,High"
|
|
group.word 0x028++0x01
|
|
line.word 0x00 "GPV1PUD,Port Group GPV1 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV1PUD[7] ,GPV1 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV1PUD[6] ,GPV1 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV1PUD[5] ,GPV1 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV1PUD[4] ,GPV1 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1PUD[3] ,GPV1 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV1PUD[2] ,GPV1 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV1PUD[1] ,GPV1 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV1PUD[0] ,GPV1 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x02C++0x02
|
|
line.tbyte 0x00 "GPV1DRV,Port Group GPV1 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV1DRV[7] ,GPV1 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV1DRV[6] ,GPV1 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV1DRV[5] ,GPV1 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV1DRV[4] ,GPV1 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV1DRV[3] ,GPV1 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV1DRV[2] ,GPV1 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV1DRV[1] ,GPV1 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV1DRV[0] ,GPV1 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x030++0x01
|
|
line.word 0x00 "GPV1CONPDN,Port Group GPV1 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV1[7] ,GPV1 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV1[6] ,GPV1 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV1[5] ,GPV1 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV1[4] ,GPV1 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1[3] ,GPV1 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV1[2] ,GPV1 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV1[1] ,GPV1 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV1[0] ,GPV1 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x034++0x01
|
|
line.word 0x00 "GPV1PUDPDN,Port Group GPV1 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV1[7] ,GPV1 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV1[6] ,GPV1 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV1[5] ,GPV1 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV1[4] ,GPV1 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV1[3] ,GPV1 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV1[2] ,GPV1 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV1[1] ,GPV1 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV1[0] ,GPV1 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "ETC7"
|
|
group.word 0x048++0x01
|
|
line.word 0x00 "ETC7PUD,Port Group ETC7 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " ETC7PUD[1] ,ETC7 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC7PUD[0] ,ETC7 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x04C++0x02
|
|
line.tbyte 0x00 "ETC7DRV,Port Group ETC7 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " ETC7DRV[1] ,ETC7 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC7DRV[0] ,ETC7 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV2"
|
|
group.long 0x060++0x03
|
|
line.long 0x00 "GPV2CON,Port Group GPV2 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV2CON[7] ,GPV2 Pin 7 Configuration" "Input,Output,C2C_TXD[7],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[7]"
|
|
bitfld.long 0x00 24.--27. " GPV2CON[6] ,GPV2 Pin 6 Configuration" "Input,Output,C2C_TXD[6],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[6]"
|
|
bitfld.long 0x00 20.--23. " GPV2CON[5] ,GPV2 Pin 5 Configuration" "Input,Output,C2C_TXD[5],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[5]"
|
|
bitfld.long 0x00 16.--19. " GPV2CON[4] ,GPV2 Pin 4 Configuration" "Input,Output,C2C_TXD[4],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV2CON[3] ,GPV2 Pin 3 Configuration" "Input,Output,C2C_TXD[3],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[3]"
|
|
bitfld.long 0x00 8.--11. " GPV2CON[2] ,GPV2 Pin 2 Configuration" "Input,Output,C2C_TXD[2],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[2]"
|
|
bitfld.long 0x00 4.--7. " GPV2CON[1] ,GPV2 Pin 1 Configuration" "Input,Output,C2C_TXD[1],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[1]"
|
|
bitfld.long 0x00 0.--3. " GPV2CON[0] ,GPV2 Pin 0 Configuration" "Input,Output,C2C_TXD[0],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT32[0]"
|
|
group.byte 0x064++0x00
|
|
line.byte 0x00 "GPV2DAT,Port Group GPV2 Data Register"
|
|
bitfld.byte 0x00 7. " GPV2DAT[7] ,GPV2 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV2DAT[6] ,GPV2 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV2DAT[5] ,GPV2 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV2DAT[4] ,GPV2 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV2DAT[3] ,GPV2 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV2DAT[2] ,GPV2 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV2DAT[1] ,GPV2 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV2DAT[0] ,GPV2 Pin 0 Data" "Low,High"
|
|
group.word 0x068++0x01
|
|
line.word 0x00 "GPV2PUD,Port Group GPV2 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV2PUD[7] ,GPV2 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV2PUD[6] ,GPV2 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV2PUD[5] ,GPV2 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV2PUD[4] ,GPV2 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2PUD[3] ,GPV2 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV2PUD[2] ,GPV2 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV2PUD[1] ,GPV2 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV2PUD[0] ,GPV2 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x06C++0x02
|
|
line.tbyte 0x00 "GPV2DRV,Port Group GPV2 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV2DRV[7] ,GPV2 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV2DRV[6] ,GPV2 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV2DRV[5] ,GPV2 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV2DRV[4] ,GPV2 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV2DRV[3] ,GPV2 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV2DRV[2] ,GPV2 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV2DRV[1] ,GPV2 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV2DRV[0] ,GPV2 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x070++0x01
|
|
line.word 0x00 "GPV2CONPDN,Port Group GPV2 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV2[7] ,GPV2 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV2[6] ,GPV2 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV2[5] ,GPV2 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV2[4] ,GPV2 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2[3] ,GPV2 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV2[2] ,GPV2 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV2[1] ,GPV2 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV2[0] ,GPV2 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x074++0x01
|
|
line.word 0x00 "GPV2PUDPDN,Port Group GPV2 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV2[7] ,GPV2 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV2[6] ,GPV2 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV2[5] ,GPV2 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV2[4] ,GPV2 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV2[3] ,GPV2 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV2[2] ,GPV2 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV2[1] ,GPV2 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV2[0] ,GPV2 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV3"
|
|
group.long 0x080++0x03
|
|
line.long 0x00 "GPV3CON,Port Group GPV3 Configuration Register"
|
|
bitfld.long 0x00 28.--31. " GPV3CON[7] ,GPV3 Pin 7 Configuration" "Input,Output,C2C_TXD[15],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[7]"
|
|
bitfld.long 0x00 24.--27. " GPV3CON[6] ,GPV3 Pin 6 Configuration" "Input,Output,C2C_TXD[14],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[6]"
|
|
bitfld.long 0x00 20.--23. " GPV3CON[5] ,GPV3 Pin 5 Configuration" "Input,Output,C2C_TXD[13],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[5]"
|
|
bitfld.long 0x00 16.--19. " GPV3CON[4] ,GPV3 Pin 4 Configuration" "Input,Output,C2C_TXD[12],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[4]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " GPV3CON[3] ,GPV3 Pin 3 Configuration" "Input,Output,C2C_TXD[11],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[3]"
|
|
bitfld.long 0x00 8.--11. " GPV3CON[2] ,GPV3 Pin 2 Configuration" "Input,Output,C2C_TXD[10],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[2]"
|
|
bitfld.long 0x00 4.--7. " GPV3CON[1] ,GPV3 Pin 1 Configuration" "Input,Output,C2C_TXD[9],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[1]"
|
|
bitfld.long 0x00 0.--3. " GPV3CON[0] ,GPV3 Pin 0 Configuration" "Input,Output,C2C_TXD[8],Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT33[0]"
|
|
group.byte 0x084++0x00
|
|
line.byte 0x00 "GPV3DAT,Port Group GPV3 Data Register"
|
|
bitfld.byte 0x00 7. " GPV3DAT[7] ,GPV3 Pin 7 Data" "Low,High"
|
|
bitfld.byte 0x00 6. " GPV3DAT[6] ,GPV3 Pin 6 Data" "Low,High"
|
|
bitfld.byte 0x00 5. " GPV3DAT[5] ,GPV3 Pin 5 Data" "Low,High"
|
|
bitfld.byte 0x00 4. " GPV3DAT[4] ,GPV3 Pin 4 Data" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " GPV3DAT[3] ,GPV3 Pin 3 Data" "Low,High"
|
|
bitfld.byte 0x00 2. " GPV3DAT[2] ,GPV3 Pin 2 Data" "Low,High"
|
|
bitfld.byte 0x00 1. " GPV3DAT[1] ,GPV3 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV3DAT[0] ,GPV3 Pin 0 Data" "Low,High"
|
|
group.word 0x088++0x01
|
|
line.word 0x00 "GPV3PUD,Port Group GPV3 Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV3PUD[7] ,GPV3 Pin 7 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV3PUD[6] ,GPV3 Pin 6 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV3PUD[5] ,GPV3 Pin 5 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV3PUD[4] ,GPV3 Pin 4 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3PUD[3] ,GPV3 Pin 3 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV3PUD[2] ,GPV3 Pin 2 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV3PUD[1] ,GPV3 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV3PUD[0] ,GPV3 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x08C++0x02
|
|
line.tbyte 0x00 "GPV3DRV,Port Group GPV3 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 14.--15. " GPV3DRV[7] ,GPV3 Pin 7 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 12.--13. " GPV3DRV[6] ,GPV3 Pin 6 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 10.--11. " GPV3DRV[5] ,GPV3 Pin 5 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 8.--9. " GPV3DRV[4] ,GPV3 Pin 4 Drive Strength Control" "1x,3x,2x,4x"
|
|
textline " "
|
|
bitfld.tbyte 0x00 6.--7. " GPV3DRV[3] ,GPV3 Pin 3 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 4.--5. " GPV3DRV[2] ,GPV3 Pin 2 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 2.--3. " GPV3DRV[1] ,GPV3 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV3DRV[0] ,GPV3 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x090++0x01
|
|
line.word 0x00 "GPV3CONPDN,Port Group GPV3 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 14.--15. " GPV3[7] ,GPV3 Pin 7 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 12.--13. " GPV3[6] ,GPV3 Pin 6 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 10.--11. " GPV3[5] ,GPV3 Pin 5 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 8.--9. " GPV3[4] ,GPV3 Pin 4 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3[3] ,GPV3 Pin 3 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 4.--5. " GPV3[2] ,GPV3 Pin 2 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 2.--3. " GPV3[1] ,GPV3 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV3[0] ,GPV3 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x094++0x01
|
|
line.word 0x00 "GPV3PUDPDN,Port Group GPV3 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 14.--15. " GPV3[7] ,GPV3 Pin 7 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 12.--13. " GPV3[6] ,GPV3 Pin 6 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 10.--11. " GPV3[5] ,GPV3 Pin 5 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 8.--9. " GPV3[4] ,GPV3 Pin 4 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " GPV3[3] ,GPV3 Pin 3 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 4.--5. " GPV3[2] ,GPV3 Pin 2 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 2.--3. " GPV3[1] ,GPV3 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV3[0] ,GPV3 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
tree "ETC8"
|
|
group.word 0x0A8++0x01
|
|
line.word 0x00 "ETC8PUD,Port Group ETC8 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " ETC8PUD[1] ,ETC8 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " ETC8PUD[0] ,ETC8 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0AC++0x02
|
|
line.tbyte 0x00 "ETC8DRV,Port Group ETC8 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " ETC8DRV[1] ,ETC8 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " ETC8DRV[0] ,ETC8 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
tree.end
|
|
width 12.
|
|
tree "GPV4"
|
|
group.long 0x0C0++0x03
|
|
line.long 0x00 "GPV4CON,Port Group GPV4 Configuration Register"
|
|
bitfld.long 0x00 4.--7. " GPV4CON[1] ,GPV4 Pin 1 Configuration" "Input,Output,C2C_WKREQOUT,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT34[1]"
|
|
bitfld.long 0x00 0.--3. " GPV4CON[0] ,GPV4 Pin 0 Configuration" "Input,Output,C2C_WKREQIN,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,EXT_INT34[0]"
|
|
group.byte 0x0C4++0x00
|
|
line.byte 0x00 "GPV4DAT,Port Group GPV4 Data Register"
|
|
bitfld.byte 0x00 1. " GPV4DAT[1] ,GPV4 Pin 1 Data" "Low,High"
|
|
bitfld.byte 0x00 0. " GPV4DAT[0] ,GPV4 Pin 0 Data" "Low,High"
|
|
group.word 0x0C8++0x01
|
|
line.word 0x00 "GPV4PUD,Port Group GPV4 Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPV4PUD[1] ,GPV4 Pin 1 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV4PUD[0] ,GPV4 Pin 0 Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
group.tbyte 0x0CC++0x02
|
|
line.tbyte 0x00 "GPV4DRV,Port Group GPV4 Drive Strength Control Register"
|
|
bitfld.tbyte 0x00 2.--3. " GPV4DRV[1] ,GPV4 Pin 1 Drive Strength Control" "1x,3x,2x,4x"
|
|
bitfld.tbyte 0x00 0.--1. " GPV4DRV[0] ,GPV4 Pin 0 Drive Strength Control" "1x,3x,2x,4x"
|
|
group.word 0x0D0++0x01
|
|
line.word 0x00 "GPV4CONPDN,Port Group GPV4 Power Down Mode Configuration Register"
|
|
bitfld.word 0x00 2.--3. " GPV4[1] ,GPV4 Pin 1 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
bitfld.word 0x00 0.--1. " GPV4[0] ,GPV4 Pin 0 Power Down Mode Configuration" "Output 0,Output 1,Input,Previous state"
|
|
group.word 0x0D4++0x01
|
|
line.word 0x00 "GPV4PUDPDN,Port Group GPV4 Power Down Mode Pull-up/down Register"
|
|
bitfld.word 0x00 2.--3. " GPV4[1] ,GPV4 Pin 1 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
bitfld.word 0x00 0.--1. " GPV4[0] ,GPV4 Pin 0 Power Down Mode Pull-up/down" "Disabled,Pull-down,Reserved,Pull-up"
|
|
tree.end
|
|
width 15.
|
|
tree "External interrupts"
|
|
tree "External interrupt configuration"
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "EXT_INT30_CON,External interrupt EXT_INT30 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT30_CON[7] ,Setting the signaling method of EXT_INT30[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT30_CON[6] ,Setting the signaling method of EXT_INT30[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT30_CON[5] ,Setting the signaling method of EXT_INT30[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT30_CON[4] ,Setting the signaling method of EXT_INT30[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT30_CON[3] ,Setting the signaling method of EXT_INT30[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT30_CON[2] ,Setting the signaling method of EXT_INT30[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT30_CON[1] ,Setting the signaling method of EXT_INT30[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT30_CON[0] ,Setting the signaling method of EXT_INT30[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "EXT_INT31_CON,External interrupt EXT_INT31 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT31_CON[7] ,Setting the signaling method of EXT_INT31[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT31_CON[6] ,Setting the signaling method of EXT_INT31[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT31_CON[5] ,Setting the signaling method of EXT_INT31[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT31_CON[4] ,Setting the signaling method of EXT_INT31[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT31_CON[3] ,Setting the signaling method of EXT_INT31[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT31_CON[2] ,Setting the signaling method of EXT_INT31[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT31_CON[1] ,Setting the signaling method of EXT_INT31[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT31_CON[0] ,Setting the signaling method of EXT_INT31[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "EXT_INT32_CON,External interrupt EXT_INT32 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT32_CON[7] ,Setting the signaling method of EXT_INT32[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT32_CON[6] ,Setting the signaling method of EXT_INT32[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT32_CON[5] ,Setting the signaling method of EXT_INT32[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT32_CON[4] ,Setting the signaling method of EXT_INT32[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT32_CON[3] ,Setting the signaling method of EXT_INT32[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT32_CON[2] ,Setting the signaling method of EXT_INT32[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT32_CON[1] ,Setting the signaling method of EXT_INT32[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT32_CON[0] ,Setting the signaling method of EXT_INT32[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "EXT_INT33_CON,External interrupt EXT_INT33 configuration register"
|
|
bitfld.long 0x00 28.--30. " EXT_INT33_CON[7] ,Setting the signaling method of EXT_INT33[7]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 24.--26. " EXT_INT33_CON[6] ,Setting the signaling method of EXT_INT33[6]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 20.--22. " EXT_INT33_CON[5] ,Setting the signaling method of EXT_INT33[5]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EXT_INT33_CON[4] ,Setting the signaling method of EXT_INT33[4]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 12.--14. " EXT_INT33_CON[3] ,Setting the signaling method of EXT_INT33[3]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 8.--10. " EXT_INT33_CON[2] ,Setting the signaling method of EXT_INT33[2]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EXT_INT33_CON[1] ,Setting the signaling method of EXT_INT33[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT33_CON[0] ,Setting the signaling method of EXT_INT33[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "EXT_INT34_CON,External interrupt EXT_INT34 configuration register"
|
|
bitfld.long 0x00 4.--6. " EXT_INT34_CON[1] ,Setting the signaling method of EXT_INT34[1]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
bitfld.long 0x00 0.--2. " EXT_INT34_CON[0] ,Setting the signaling method of EXT_INT34[0]" "Low level,High level,Falling edge,Rising edge,Both edge,?..."
|
|
tree.end
|
|
width 19.
|
|
tree "External interrupt filter configuration"
|
|
group.long 0x800++0x1f
|
|
line.long 0x00 "EXT_INT30_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN1[3] ,Filter Enable for EXT_INT30[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH1[3] ,Filtering width of EXT_INT30[3]"
|
|
bitfld.long 0x00 23. " FLTEN1[2] ,Filter Enable for EXT_INT30[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH1[2] ,Filtering width of EXT_INT30[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN1[1] ,Filter Enable for EXT_INT30[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH1[1] ,Filtering width of EXT_INT30[1]"
|
|
bitfld.long 0x00 7. " FLTEN1[0] ,Filter Enable for EXT_INT30[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH1[0] ,Filtering width of EXT_INT30[0]"
|
|
line.long 0x00+0x04 "EXT_INT30_FLTCON1"
|
|
bitfld.long 0x00+0x04 31. " FLTEN1[7] ,Filter Enable for EXT_INT30[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 24.--30. 1. " FLTWIDTH1[7] ,Filtering width of EXT_INT30[7]"
|
|
bitfld.long 0x00+0x04 23. " FLTEN1[6] ,Filter Enable for EXT_INT30[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 16.--22. 1. " FLTWIDTH1[6] ,Filtering width of EXT_INT30[6]"
|
|
textline " "
|
|
bitfld.long 0x00+0x04 15. " FLTEN1[5] ,Filter Enable for EXT_INT30[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 8.--14. 1. " FLTWIDTH1[5] ,Filtering width of EXT_INT30[5]"
|
|
bitfld.long 0x00+0x04 7. " FLTEN1[4] ,Filter Enable for EXT_INT30[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 0.--6. 1. " FLTWIDTH1[4] ,Filtering width of EXT_INT30[4]"
|
|
line.long 0x00 "EXT_INT31_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN2[3] ,Filter Enable for EXT_INT31[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH2[3] ,Filtering width of EXT_INT31[3]"
|
|
bitfld.long 0x00 23. " FLTEN2[2] ,Filter Enable for EXT_INT31[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH2[2] ,Filtering width of EXT_INT31[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN2[1] ,Filter Enable for EXT_INT31[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH2[1] ,Filtering width of EXT_INT31[1]"
|
|
bitfld.long 0x00 7. " FLTEN2[0] ,Filter Enable for EXT_INT31[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH2[0] ,Filtering width of EXT_INT31[0]"
|
|
line.long 0x00+0x04 "EXT_INT31_FLTCON1"
|
|
bitfld.long 0x00+0x04 31. " FLTEN2[7] ,Filter Enable for EXT_INT31[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 24.--30. 1. " FLTWIDTH2[7] ,Filtering width of EXT_INT31[7]"
|
|
bitfld.long 0x00+0x04 23. " FLTEN2[6] ,Filter Enable for EXT_INT31[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 16.--22. 1. " FLTWIDTH2[6] ,Filtering width of EXT_INT31[6]"
|
|
textline " "
|
|
bitfld.long 0x00+0x04 15. " FLTEN2[5] ,Filter Enable for EXT_INT31[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 8.--14. 1. " FLTWIDTH2[5] ,Filtering width of EXT_INT31[5]"
|
|
bitfld.long 0x00+0x04 7. " FLTEN2[4] ,Filter Enable for EXT_INT31[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 0.--6. 1. " FLTWIDTH2[4] ,Filtering width of EXT_INT31[4]"
|
|
line.long 0x00 "EXT_INT32_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN3[3] ,Filter Enable for EXT_INT32[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH3[3] ,Filtering width of EXT_INT32[3]"
|
|
bitfld.long 0x00 23. " FLTEN3[2] ,Filter Enable for EXT_INT32[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH3[2] ,Filtering width of EXT_INT32[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3[1] ,Filter Enable for EXT_INT32[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH3[1] ,Filtering width of EXT_INT32[1]"
|
|
bitfld.long 0x00 7. " FLTEN3[0] ,Filter Enable for EXT_INT32[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH3[0] ,Filtering width of EXT_INT32[0]"
|
|
line.long 0x00+0x04 "EXT_INT32_FLTCON1"
|
|
bitfld.long 0x00+0x04 31. " FLTEN3[7] ,Filter Enable for EXT_INT32[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 24.--30. 1. " FLTWIDTH3[7] ,Filtering width of EXT_INT32[7]"
|
|
bitfld.long 0x00+0x04 23. " FLTEN3[6] ,Filter Enable for EXT_INT32[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 16.--22. 1. " FLTWIDTH3[6] ,Filtering width of EXT_INT32[6]"
|
|
textline " "
|
|
bitfld.long 0x00+0x04 15. " FLTEN3[5] ,Filter Enable for EXT_INT32[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 8.--14. 1. " FLTWIDTH3[5] ,Filtering width of EXT_INT32[5]"
|
|
bitfld.long 0x00+0x04 7. " FLTEN3[4] ,Filter Enable for EXT_INT32[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 0.--6. 1. " FLTWIDTH3[4] ,Filtering width of EXT_INT32[4]"
|
|
line.long 0x00 "EXT_INT33_FLTCON0"
|
|
bitfld.long 0x00 31. " FLTEN4[3] ,Filter Enable for EXT_INT33[3]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 24.--30. 1. " FLTWIDTH4[3] ,Filtering width of EXT_INT33[3]"
|
|
bitfld.long 0x00 23. " FLTEN4[2] ,Filter Enable for EXT_INT33[2]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--22. 1. " FLTWIDTH4[2] ,Filtering width of EXT_INT33[2]"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN4[1] ,Filter Enable for EXT_INT33[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH4[1] ,Filtering width of EXT_INT33[1]"
|
|
bitfld.long 0x00 7. " FLTEN4[0] ,Filter Enable for EXT_INT33[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH4[0] ,Filtering width of EXT_INT33[0]"
|
|
line.long 0x00+0x04 "EXT_INT33_FLTCON1"
|
|
bitfld.long 0x00+0x04 31. " FLTEN4[7] ,Filter Enable for EXT_INT33[7]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 24.--30. 1. " FLTWIDTH4[7] ,Filtering width of EXT_INT33[7]"
|
|
bitfld.long 0x00+0x04 23. " FLTEN4[6] ,Filter Enable for EXT_INT33[6]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 16.--22. 1. " FLTWIDTH4[6] ,Filtering width of EXT_INT33[6]"
|
|
textline " "
|
|
bitfld.long 0x00+0x04 15. " FLTEN4[5] ,Filter Enable for EXT_INT33[5]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 8.--14. 1. " FLTWIDTH4[5] ,Filtering width of EXT_INT33[5]"
|
|
bitfld.long 0x00+0x04 7. " FLTEN4[4] ,Filter Enable for EXT_INT33[4]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00+0x04 0.--6. 1. " FLTWIDTH4[4] ,Filtering width of EXT_INT33[4]"
|
|
group.long 0x820++0x07
|
|
line.long 0x00 "EXT_INT34_FLTCON0"
|
|
bitfld.long 0x00 15. " FLTEN5[1] ,Filter Enable for EXT_INT34[1]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--14. 1. " FLTWIDTH5[1] ,Filtering width of EXT_INT34[1]"
|
|
bitfld.long 0x00 7. " FLTEN5[0] ,Filter Enable for EXT_INT34[0]" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FLTWIDTH5[0] ,Filtering width of EXT_INT34[0]"
|
|
hide.long 0x00+0x04 "EXT_INT34_FLTCON1"
|
|
tree.end
|
|
tree "External interrupt mask"
|
|
group.long 0x900++15.
|
|
line.long 0x0 "EXT_INT30_MASK,External interrupt EXT_INT30 mask register"
|
|
bitfld.long 0x0 7. " EXT_INT30_MASK[7] ,External Interrupt 30 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 6. " EXT_INT30_MASK[6] ,External Interrupt 30 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT30_MASK[5] ,External Interrupt 30 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 4. " EXT_INT30_MASK[4] ,External Interrupt 30 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT30_MASK[3] ,External Interrupt 30 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 2. " EXT_INT30_MASK[2] ,External Interrupt 30 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT30_MASK[1] ,External Interrupt 30 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x0 0. " EXT_INT30_MASK[0] ,External Interrupt 30 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x4 "EXT_INT31_MASK,External interrupt EXT_INT31 mask register"
|
|
bitfld.long 0x4 7. " EXT_INT31_MASK[7] ,External Interrupt 31 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 6. " EXT_INT31_MASK[6] ,External Interrupt 31 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT31_MASK[5] ,External Interrupt 31 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 4. " EXT_INT31_MASK[4] ,External Interrupt 31 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT31_MASK[3] ,External Interrupt 31 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 2. " EXT_INT31_MASK[2] ,External Interrupt 31 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT31_MASK[1] ,External Interrupt 31 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x4 0. " EXT_INT31_MASK[0] ,External Interrupt 31 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0x8 "EXT_INT32_MASK,External interrupt EXT_INT32 mask register"
|
|
bitfld.long 0x8 7. " EXT_INT32_MASK[7] ,External Interrupt 32 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 6. " EXT_INT32_MASK[6] ,External Interrupt 32 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT32_MASK[5] ,External Interrupt 32 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 4. " EXT_INT32_MASK[4] ,External Interrupt 32 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT32_MASK[3] ,External Interrupt 32 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 2. " EXT_INT32_MASK[2] ,External Interrupt 32 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT32_MASK[1] ,External Interrupt 32 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x8 0. " EXT_INT32_MASK[0] ,External Interrupt 32 Mask 0" "Enable Interrupt,Masked"
|
|
line.long 0xC "EXT_INT33_MASK,External interrupt EXT_INT33 mask register"
|
|
bitfld.long 0xC 7. " EXT_INT33_MASK[7] ,External Interrupt 33 Mask 7" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 6. " EXT_INT33_MASK[6] ,External Interrupt 33 Mask 6" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT33_MASK[5] ,External Interrupt 33 Mask 5" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 4. " EXT_INT33_MASK[4] ,External Interrupt 33 Mask 4" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT33_MASK[3] ,External Interrupt 33 Mask 3" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 2. " EXT_INT33_MASK[2] ,External Interrupt 33 Mask 2" "Enable Interrupt,Masked"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT33_MASK[1] ,External Interrupt 33 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0xC 0. " EXT_INT33_MASK[0] ,External Interrupt 33 Mask 0" "Enable Interrupt,Masked"
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "EXT_INT34_MASK,External interrupt EXT_INT34 mask register"
|
|
bitfld.long 0x00 1. " EXT_INT34_MASK[1] ,External Interrupt 34 Mask 1" "Enable Interrupt,Masked"
|
|
bitfld.long 0x00 0. " EXT_INT34_MASK[0] ,External Interrupt 34 Mask 0" "Enable Interrupt,Masked"
|
|
tree.end
|
|
tree "External interrupt pending"
|
|
group.long 0xA00++15.
|
|
line.long 0x0 "EXT_INT30_PEND,External interrupt EXT_INT30 pending register"
|
|
bitfld.long 0x0 7. " EXT_INT30_PEND[7] ,External Interrupt 30 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x0 6. " EXT_INT30_PEND[6] ,External Interrupt 30 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 5. " EXT_INT30_PEND[5] ,External Interrupt 30 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x0 4. " EXT_INT30_PEND[4] ,External Interrupt 30 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 3. " EXT_INT30_PEND[3] ,External Interrupt 30 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x0 2. " EXT_INT30_PEND[2] ,External Interrupt 30 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " EXT_INT30_PEND[1] ,External Interrupt 30 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x0 0. " EXT_INT30_PEND[0] ,External Interrupt 30 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x4 "EXT_INT31_PEND,External interrupt EXT_INT31 pending register"
|
|
bitfld.long 0x4 7. " EXT_INT31_PEND[7] ,External Interrupt 31 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x4 6. " EXT_INT31_PEND[6] ,External Interrupt 31 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 5. " EXT_INT31_PEND[5] ,External Interrupt 31 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x4 4. " EXT_INT31_PEND[4] ,External Interrupt 31 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 3. " EXT_INT31_PEND[3] ,External Interrupt 31 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x4 2. " EXT_INT31_PEND[2] ,External Interrupt 31 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x4 1. " EXT_INT31_PEND[1] ,External Interrupt 31 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x4 0. " EXT_INT31_PEND[0] ,External Interrupt 31 Pending 0" "Not occurred,Occurred"
|
|
line.long 0x8 "EXT_INT32_PEND,External interrupt EXT_INT32 pending register"
|
|
bitfld.long 0x8 7. " EXT_INT32_PEND[7] ,External Interrupt 32 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0x8 6. " EXT_INT32_PEND[6] ,External Interrupt 32 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 5. " EXT_INT32_PEND[5] ,External Interrupt 32 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0x8 4. " EXT_INT32_PEND[4] ,External Interrupt 32 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 3. " EXT_INT32_PEND[3] ,External Interrupt 32 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0x8 2. " EXT_INT32_PEND[2] ,External Interrupt 32 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 1. " EXT_INT32_PEND[1] ,External Interrupt 32 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x8 0. " EXT_INT32_PEND[0] ,External Interrupt 32 Pending 0" "Not occurred,Occurred"
|
|
line.long 0xC "EXT_INT33_PEND,External interrupt EXT_INT33 pending register"
|
|
bitfld.long 0xC 7. " EXT_INT33_PEND[7] ,External Interrupt 33 Pending 7" "Not occurred,Occurred"
|
|
bitfld.long 0xC 6. " EXT_INT33_PEND[6] ,External Interrupt 33 Pending 6" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 5. " EXT_INT33_PEND[5] ,External Interrupt 33 Pending 5" "Not occurred,Occurred"
|
|
bitfld.long 0xC 4. " EXT_INT33_PEND[4] ,External Interrupt 33 Pending 4" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 3. " EXT_INT33_PEND[3] ,External Interrupt 33 Pending 3" "Not occurred,Occurred"
|
|
bitfld.long 0xC 2. " EXT_INT33_PEND[2] ,External Interrupt 33 Pending 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0xC 1. " EXT_INT33_PEND[1] ,External Interrupt 33 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0xC 0. " EXT_INT33_PEND[0] ,External Interrupt 33 Pending 0" "Not occurred,Occurred"
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "EXT_INT34_PEND,External interrupt EXT_INT34 pending register"
|
|
bitfld.long 0x00 1. " EXT_INT34_PEND[1] ,External Interrupt 34 Pending 1" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EXT_INT34_PEND[0] ,External Interrupt 34 Pending 0" "Not occurred,Occurred"
|
|
tree.end
|
|
width 25.
|
|
tree "Current service"
|
|
group.long 0xB08++0x07
|
|
line.long 0x00 "EXT_INT_SERVICE_XC,Current service register"
|
|
bitfld.long 0x00 3.--7. " SVC_GROUP_NUM ,EXT_INT Service group number" "-,EXT_INT30,EXT_INT31,EXT_INT32,EXT_INT33,EXT_INT34,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
bitfld.long 0x00 0.--2. " SVC_NUM ,Interrupt number to be serviced" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "EXT_INT_SERVICE_PEND_XC,Current service pending register"
|
|
bitfld.long 0x04 7. " SVC_PEND[7] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " SVC_PEND[6] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " SVC_PEND[5] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SVC_PEND[4] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " SVC_PEND[3] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " SVC_PEND[2] ,Current service pending" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SVC_PEND[1] ,Current service pending" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " SVC_PEND[0] ,Current service pending" "Not occurred,Occurred"
|
|
tree.end
|
|
tree "External interrupt fixed priority control"
|
|
group.long 0xB10++23.
|
|
line.long 0x00 "EXT_INT_GRPFIXPRI_XA,External interrupt group fixed priority control register"
|
|
bitfld.long 0x00 0.--3. " HIGHEST_GRP_NUM ,Group number of the highest priority when fixed group priority mode" "EXT_INT30,EXT_INT31,EXT_INT32,EXT_INT33,EXT_INT34,-,-,-,-,-,-,-,-,?..."
|
|
line.long 0x4 "EXT_INT30_FIXPRI"
|
|
bitfld.long 0x4 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT30" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EXT_INT31_FIXPRI"
|
|
bitfld.long 0x8 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT31" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXT_INT32_FIXPRI"
|
|
bitfld.long 0xC 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT32" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXT_INT33_FIXPRI"
|
|
bitfld.long 0x10 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT33" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXT_INT34_FIXPRI"
|
|
bitfld.long 0x14 0.--2. " HIGHEST_EINT_NUM ,Interrupt number of the highest priority in EXT_INT34" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Power down mode pad"
|
|
width 11.
|
|
group.long 0xF80++0x03
|
|
line.long 0x00 "PDNEN"
|
|
bitfld.long 0x00 1. " PDNEN_CFG ,Power down mode config" "Auto,PDNEN"
|
|
bitfld.long 0x00 0. " PDNEN ,Power down mode pad state enable register" "Normal mode,Power Down mode"
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Clock Management Units (CMUs)"
|
|
base ad:0x10030000
|
|
width 30.
|
|
tree "BUS Control"
|
|
group.long 0x4200++0x03
|
|
line.long 0x00 "CLK_SRC_LEFTBUS,Select clock source for CMU_LEFTBUS"
|
|
bitfld.long 0x00 4. " MUX_MPLL_USER_SEL_L ,Controls MUXMPLL" "FINPLL,FOUTMPLL"
|
|
bitfld.long 0x00 0. " MUX_GDL_SEL ,Control MUXGDL" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
rgroup.long 0x4400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_LEFTBUS,Clock MUX status for CMU_LEFTBUS"
|
|
bitfld.long 0x00 4.--6. " MPLL_USER_SEL_L ,Signal status of MUXMPLL" "Reserved,FINMPLL,FOUTMPL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " GDL_SEL ,Selection signal status of MUXGDL" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x4500++0x03
|
|
line.long 0x00 "CLK_DIV_LEFTBUS,Set clock divider ratio for CMU_LEFTBUS"
|
|
bitfld.long 0x00 4.--6. " GPL_RATIO ,DIVGPL clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " GDL_RATIO ,DIVGDL clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x4600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_LEFTBUS,Clock divider status for CMU_LEFTBUS"
|
|
bitfld.long 0x00 4. " DIV_GPL ,DIVGPL status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_GDL ,DIVGDL status" "Stable,Changing"
|
|
group.long 0x4800++0x03
|
|
line.long 0x00 "CLK_GATE_IP_LEFTBUS,Control IP clock gating for LEFTBUS_BLK"
|
|
bitfld.long 0x00 6. " CLK_ASYNC_G3D ,Gating all clocks for ASYNC_G3D" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_ASYNC_MFCL ,Gating all clocks for ASYNC_MFCL" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_ASYNC_TVX ,Gating all clocks for ASYNC_TVX" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_PPMULEFT ,Gating all clocks for PPMULEFT" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_GPIO_LEFT ,Gating all clocks for GPIO_LEFT" "Masked,Passed"
|
|
group.long 0x4930++0x03
|
|
line.long 0x00 "CLK_GATE_IP_IMAGE,Control IP clock gating for IMAGE_SS"
|
|
bitfld.long 0x00 9. " CLK_PPMUIAMGE ,Gating all clocks for PPMUIMAGE" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_SMMUMDMA ,Gating all clocks for SMMUMDMA" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_SMMUROTATOR ,Gating all clocks for SMMUROTATOR" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_MDMA ,Gating all clocks for MDMA" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_ROTATOR ,Gating all clocks for ROTATOR" "Masked,Passed"
|
|
group.long 0x4A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_LEFTBUS,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,MUX Select" "SCLK_MPLL/2,SCLK_APLL/2,ACLK_GDL,ACLK_GPL,?..."
|
|
rgroup.long 0x4A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_LEFTBUS_DIV_STAT,CClock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
textline " "
|
|
group.long 0x8200++0x03
|
|
line.long 0x00 "CLK_SRC_RIGHTBUS,Select clock source for CMU_RIGHTBUS"
|
|
bitfld.long 0x00 4. " MUX_MPLL_USER_SEL_R ,Control MUXMPLL" "FINPLL,FOUTMPLL"
|
|
bitfld.long 0x00 0. " MUX_GDR_SEL ,Control MUXGDR" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
rgroup.long 0x8400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_RIGHTBUS,Select clock source for CMU_RIGHTBUS"
|
|
bitfld.long 0x00 4.--6. " MPLL_USER_SEL_R ,Selection signal status of MUXMPLL" "Reserved,FINMPLL,FOUTMPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " GDR_SEL ,Selection signal status of MUXGDR" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x8500++0x03
|
|
line.long 0x00 "CLK_DIV_RIGHTBUS,Set clock divider ratio for CMU_RIGHTBUS"
|
|
bitfld.long 0x00 4.--6. " GPR_RATIO ,DIVGPR clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " GDR_RATIO ,DIVGDR clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x8600++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_RIGHTBUS,Clock divider status for CMU_RIGHTBUS"
|
|
bitfld.long 0x00 4. " DIV_GPR ,DIVGPR status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_GDR ,DIVGDR status" "Stable,Changing"
|
|
group.long 0x8800++0x03
|
|
line.long 0x00 "CLK_GATE_IP_RIGHTBUS,Control IP clock gating for RIGHTBUS_BLK"
|
|
bitfld.long 0x00 9. " CLK_ASYNC_ISPMX ,Gating all clocks for ASYNC_ISPMX" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_ASYNC_MAUDIOX ,Gating all clocks for ASYNC_MAUDIOX" "Masked,Passed"
|
|
bitfld.long 0x00 6. " CLK_ASYNC_MFCR ,Gating all clocks for ASYNC_MFCR" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLK_ASYNC_FSYSD ,Gating all clocks for ASYNC_FSYSD" "Masked,Passed"
|
|
bitfld.long 0x00 3. " CLK_ASYNC_LCD0X ,Gating all clocks for ASYNC_LCD0X" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_ASYNC_CAMX ,Gating all clocks for ASYNC_CAMX" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLK_PPMURIGHT ,Gating all clocks for PPMURIGHT" "Masked,Passed"
|
|
bitfld.long 0x00 0. " CLK_GPIO_RIGHT ,Gating all clocks for GPIO_RIGHT" "Masked,Passed"
|
|
group.long 0x8960++0x03
|
|
line.long 0x00 "CLK_GATE_IP_PERIR,Control IP clock gating for PERIR_S"
|
|
bitfld.long 0x00 18. " CLK_CMU_ISPPART ,Gating all clocks for CMU_ISPPART" "Masked,Passed"
|
|
bitfld.long 0x00 17. " CLK_TMU_APBIF ,Gating all clocks for TMU_APBIF" "Masked,Passed"
|
|
bitfld.long 0x00 16. " CLK_KEYIF ,Gating all clocks for KEYIF" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLK_RTC ,Gating all clocks for RTC" "Masked,Passed"
|
|
bitfld.long 0x00 14. " CLK_WDT ,Gating all clocks for WDT" "Masked,Passed"
|
|
bitfld.long 0x00 13. " CLK_MCT ,Gating all clocks for MCT" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLK_SECKEY ,Gating all clocks for SECKEY" "Masked,Passed"
|
|
bitfld.long 0x00 11. " CLK_HDMI_CEC ,Gating all clocks for HDMI_CEC" "Masked,Passed"
|
|
bitfld.long 0x00 10. " CLK_TZPC5 ,Gating all clocks for TZPC5" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLK_TZPC4 ,Gating all clocks for TZPC4" "Masked,Passed"
|
|
bitfld.long 0x00 8. " CLK_TZPC3 ,Gating all clocks for TZPC3" "Masked,Passed"
|
|
bitfld.long 0x00 7. " CLK_TZPC2 ,Gating all clocks for TZPC2" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLK_TZPC1 ,Gating all clocks for TZPC1" "Masked,Passed"
|
|
bitfld.long 0x00 5. " CLK_TZPC0 ,Gating all clocks for TZPC0" "Masked,Passed"
|
|
bitfld.long 0x00 4. " CLK_CMU_COREPART ,Gating all clocks for CMU_COREPART" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLK_CMU_TOPPART ,Gating all clocks for CMU_TOPPART" "Masked,Passed"
|
|
bitfld.long 0x00 2. " CLK_PMU_APBIF ,Gating all clocks for PMU_APBIF" "Masked,Passed"
|
|
bitfld.long 0x00 1. " CLK_SYSREG ,Gating all clocks for SYSREG" "Masked,Passed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_CHIP_ID ,Gating all clocks for CHIP_ID" "Masked,Passed"
|
|
group.long 0x8A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_RIGHTBUS,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--13. " DIV_RATIO ,Divide ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,MUX Select" "SCLK_MPLL/2,SCLK_APLL/2,ACLK_GDR,ACLK_GPR,?..."
|
|
rgroup.long 0x8A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_RIGHTBUS_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
tree.end
|
|
width 11.
|
|
; --------------------------------------------------------------------------------
|
|
; PLL
|
|
; --------------------------------------------------------------------------------
|
|
tree "EPLL and VPLL Control"
|
|
group.long 0xC010++0x03
|
|
line.long 0x00 "EPLL_LOCK,Control PLL locking period for EPLL"
|
|
hexmask.long.word 0x00 0.--15. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0xC020++0x03
|
|
line.long 0x00 "VPLL_LOCK,Control PLL locking period for VPLL"
|
|
hexmask.long.word 0x00 0.--15. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0xC110++0x03
|
|
line.long 0x00 "EPLL_CON0,Control PLL output frequency for EPLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
hexmask.long.byte 0x00 16.--24. 1. " MDIV ,PLL M divide value"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PDIV ,PLL P divide value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV ,PLL S divide value" "0,1,2,3,4,5,?..."
|
|
group.long 0xC114++0x07
|
|
line.long 0x00 "EPLL_CON1,Control PLL output frequency for EPLL"
|
|
bitfld.long 0x00 29.--30. " SEL_PF ,Modulation method control" "Down spread,Up spread,Center spread,Center spread"
|
|
hexmask.long.byte 0x00 24.--28. 1. " MRR ,Modulations rate control"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MFR ,Modulations frequency control"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " K ,PLL DSM (Delta-Sigma Modulator)"
|
|
line.long 0x04 "EPLL_CON2,Control PLL output frequency for EPLL"
|
|
bitfld.long 0x04 8.--12. " EXTAFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 7. " DCC_ENB ,Duty Cycle Corrector enable" "Enabled,Disabled"
|
|
bitfld.long 0x04 6. " AFC_ENB ,Adaptive Frequency Calibrator enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SSCG_EN ,Dithered mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BYPASS ,Bypass mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " FVCO_EN ,Enable pi for F(VCO_OUT)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " FSEL ,Pin selection for monitoring purposes" "F(ref),F(eed)"
|
|
bitfld.long 0x04 0.--1. " ICP_BOOST ,ICP_Boost" "0,1,2,3"
|
|
group.long 0xC120++0x03
|
|
line.long 0x00 "VPLL_CON0,Control PLL output frequency for VPLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
hexmask.long.byte 0x00 16.--24. 1. " MDIV ,PLL M divide value"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PDIV ,PLL P divide value" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " SDIV ,PLL S divide value" "0,1,2,3,4,5,?..."
|
|
group.long 0xC124++0x07
|
|
line.long 0x00 "VPLL_CON1,Control PLL output frequency for VPLL"
|
|
bitfld.long 0x00 29.--30. " SEL_PF ,Modulation Method Control" "Down spread,Up spread,Center spread,Center spread"
|
|
bitfld.long 0x00 24.--28. " MRR ,Modulation Rate Control" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--23. " MFR ,Modulation Frequency Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,?..."
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " K ,PLL DSM (Delta-Sigma Modulator)"
|
|
line.long 0x04 "VPLL_CON2,Control PLL output frequency for VPLL"
|
|
bitfld.long 0x04 8.--12. " EXTAFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 7. " DCC_ENB ,Duty Cycle Corrector enable" "Enabled,Disabled"
|
|
bitfld.long 0x04 6. " AFC_ENB ,Adaptive Frequency Calibrator enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SSCG_EN ,Dithered mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BYPASS ,Bypass mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " FVCO_EN ,Enable pi for F(VCO_OUT)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " FSEL ,Pin selection for monitoring purposes" "F(ref),F(eed)"
|
|
bitfld.long 0x04 0.--1. " ICP_BOOST ,ICP_Boost" "0,1,2,3"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; PLL END
|
|
; --------------------------------------------------------------------------------
|
|
width 16.
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_SRC
|
|
; --------------------------------------------------------------------------------
|
|
tree "Clock Source"
|
|
group.long 0xC210++0x03
|
|
line.long 0x00 "CLK_SRC_TOP0,Select clock source for CMU_TOP"
|
|
bitfld.long 0x00 28. " MUX_ONENAND_SEL ,Control MUXONENAND" "ACLK_133,ACLK_160"
|
|
bitfld.long 0x00 24. " MUX_ACLK_133_SEL ,Control MUXACLK_133" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MUX_ACLK_160_SEL ,Control MUXACLK_160" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
bitfld.long 0x00 16. " MUX_ACLK_100_SEL ,Control MUXACLK_100" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MUX_ACLK_200_SEL ,Control MUXACLK_200" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
bitfld.long 0x00 8. " MUX_VPLL_SEL ,Control MUXVPLL" "FINPLL,FOUTVPLL"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MUX_EPLL_SEL ,Control MUXEPLL" "FINPLL,FOUTEPLL"
|
|
bitfld.long 0x00 0. " MUX_ONENAND_1_SEL ,Control MUXONENAND_1" "MOUTONENAND,SCLKVPLL"
|
|
group.long 0xC214++0x03
|
|
line.long 0x00 "CLK_SRC_TOP1,Select clock source for CMU_TOP"
|
|
bitfld.long 0x00 24. " MUX_ACLK_400_MCUISP_SUB_SEL ,Control MUXACLK_400_MCUISP_SUB" "FINPLL,DIVOUT_ACLK_400_MCUISP"
|
|
bitfld.long 0x00 20. " MUX_ACLK_200_SUB_SEL ,Control MUXACLK_200_SUB" "FINPLL,DIVOUT_ACLK_200"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MUX_ACLK_266_GPS_SUB_SEL ,Control MUXACLK_266_GPS_SUB" "FINPLL,DIVOUT_ACLK_266_GPS"
|
|
bitfld.long 0x00 12. " MUX_MPLL_USER_SEL_T ,Control MUXMPLL" "FINPLL,SCLKMPLLL"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MUX_ACLK_400_MCUISP_SEL ,Control MUXVPLL" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
bitfld.long 0x00 4. " MUXACLK_266_GPS_SEL ,Control MUXACLK_266_GPS" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
group.long 0xC220++0x03
|
|
line.long 0x00 "CLK_SRC_CAM0,Select clock source for CAM_BLK"
|
|
bitfld.long 0x00 28.--31. " CSIS1_SEL ,Control MUXCSIS1 (source clock of CSIS1)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 24.--27. " CSIS0_SEL ,Control MUXCSIS0 (source clock of CSIS0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 20.--23. " CAM1_SEL ,Control MUXCAM (source clock of CAM_B_CLKOUT)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CAM0_SEL ,Control MUXCAM0 (source clock of CAM_A_CLKOUT)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 12.--15. " FIMC3_LCLK_SEL ,Control MUXFIMC3_LCLK (source clock of FIMC3 local clock)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 8.--11. " FIMC2_LCLK_SEL ,Control MUXFIMC2_LCLK (source clock of FIMC2 local clock)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FIMC1_LCLK_SEL ,Control MUXFIMC1_LCLK (source clock of FIMC1 local clock)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 0.--3. " FIMC0_LCLK_SEL ,Control MUXFIMC0_LCLK (source clock of FIMC0 local clock)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC224++0x03
|
|
line.long 0x00 "CLK_SRC_TV,Select clock source for TV_BLK"
|
|
bitfld.long 0x00 0. " HDMI_SEL ,Control MUXHDMI (source clock of HDMI link)" "SCLK_PIXEL,SCLK_HDMIPHY"
|
|
group.long 0xC228++0x03
|
|
line.long 0x00 "CLK_SRC_MFC,Select clock source for MFC_BLK"
|
|
bitfld.long 0x00 8. " MFC_SEL ,Control MUXMFC (source clock of MFC core)" "MOUTMFC_0,MOUTMFC_1"
|
|
bitfld.long 0x00 4. " MFC_1_SEL ,Control MUXMFC_1 (source clock of MFC core)" "SCLKEPLL,SCLKVPLL"
|
|
bitfld.long 0x00 0. " MFC_0_SEL ,Control MUXMFC_0 (source clock of MFC core)" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
group.long 0xC22C++0x03
|
|
line.long 0x00 "CLK_SRC_G3D,Select clock source for G3D_BLK"
|
|
bitfld.long 0x00 8. " G3D_SEL ,Control MUXG3D (source clock of G3D core)" "MOUTG3D_0,MOUTG3D_1"
|
|
bitfld.long 0x00 4. " G3D_1_SEL ,Control MUXG3D_1 (source clock of G3D core)" "SCLKEPLL,SCLKVPLL"
|
|
bitfld.long 0x00 0. " G3D_0_SEL ,Control MUXG3D_0 (source clock of G3D core)" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
group.long 0xC234++0x03
|
|
line.long 0x00 "CLK_SRC_LCD0,Select clock source for LCD_BLK"
|
|
bitfld.long 0x00 12.--15. " MIPI0_SEL ,Control MUXMIPI0 (source clock of MIPI_DSIM0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 8.--11. " MDNIE_PWM0_SEL ,Control MUXMDNIE_PWM0 (source clock of MDNIE_PWM0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 4.--7. " MDNIE0_SEL ,Control MUXMDNIE0 (source clock of MDNIE0_SEL)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FIMD0_SEL ,Control MUXFIMD0 (source clock of FIMD0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC238++0x03
|
|
line.long 0x00 "CLK_SRC_ISP,Select clock source for ISP_BLK"
|
|
bitfld.long 0x00 12.--15. " UART_ISP_SEL ,Control MUXUART_ISP (source clock of MIPI_DSIM1)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 8.--11. " SPI1_ISP_SEL ,Control MUXSPI1_ISP (source clock of SPI1_ISP)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 4.--7. " UART_ISP_SEL ,Control MUXSPI0_ISP (source clock of SPI0_ISP)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC23C++0x03
|
|
line.long 0x00 "CLK_SRC_MAUDIO,Select clock source for AUDIO_BLK"
|
|
bitfld.long 0x00 0.--3. " AUDIO0_SEL ,Control MUXAUDIO0 (source clock of AUDIO0)" "AUDIOCDCLK0,Reserved,SCLK_HDMI24M,SCLK_USBPHY0,XXTI,XusbXTI,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC240++0x03
|
|
line.long 0x00 "CLK_SRC_FSYS,Select clock source for FSYS_BLK"
|
|
bitfld.long 0x00 24. " MIPIHSI_SEL ,Control MUXMIPIHSI, (source clock of MIPIHSI)" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
bitfld.long 0x00 16.--19. " MMC4_SEL ,Control MUXMMC4 (source clock of MMC4)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 12.--15. " MMC3_SEL ,Control MUXMMC3 (source clock of MMC3)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MMC2_SEL ,Control MUXMMC2 (source clock of MMC2)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 4.--7. " MMC1_SEL ,Control MUXMMC1 (source clock of MMC1)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 0.--3. " MMC0_SEL ,Control MUXMMC0 (source clock of MMC0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC250++0x03
|
|
line.long 0x00 "CLK_SRC_PERIL0,Select clock source for connectivity IPs"
|
|
bitfld.long 0x00 16.--19. " UART4_SEL ,Control MUXUART4 (source clock of UART4)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 12.--15. " UART3_SEL ,Control MUXUART3 (source clock of UART3)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 8.--11. " UART2_SEL ,Control MUXUART2 (source clock of UART2)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " UART1_SEL ,Control MUXUART1, (source clock of UART1)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 0.--3. " UART0_SEL ,Control MUXUART0, (source clock of UART0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
group.long 0xC254++0x07
|
|
line.long 0x00 "CLK_SRC_PERIL1,Select clock source for connectivity IPs"
|
|
bitfld.long 0x00 24.--27. " SPI2_SEL ,Control MUXSPI2 (source clock of SPI2)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 20.--23. " SPI1_SEL ,Control MUXSPI1 (source clock of SPI1)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 16.--19. " SPI0_SEL ,Control MUXSPI0 (source clock of SPI0)" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " SPDIF_SEL ,Control MUXSPDIF (source clock of SPDIF)" "SCLK_AUDIO0,SCLK_AUDIO1,SCLK_AUDIO2,SPDIF_EXTCLK"
|
|
bitfld.long 0x00 4.--7. " AUDIO2_SEL ,Control MUXAUDIO2, (source clock of AUDIO2)" "AUDIOCDCLK2,Reserved,SCLK_HDMI24M,SCLK_USBPHY0,XXTI,XusbXTI,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 0.--3. " AUDIO1_SEL ,Control MUXAUDIO1, (source clock of AUDIO1)" "AUDIOCDCLK1,Reserved,SCLK_HDMI24M,SCLK_USBPHY0,XXTI,XusbXTI,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
line.long 0x04 "CLK_SRC_CAM1,Select clock source for CAM_BLK"
|
|
bitfld.long 0x04 8. " JPEG_SEL ,Control MUXJPEG (source clock of JPEG)" "MOUTJPEG_0,MOUTJPEG_1"
|
|
bitfld.long 0x04 4. " JPEG_1_SEL ,Control MUXJPEG_1 (source clock of JPEG)" "SCLKEPLL,SCLKVPLL"
|
|
bitfld.long 0x04 0. " JPEG_1_SEL ,Control MUXJPEG_2 (source clock of JPEG)" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
width 21.
|
|
group.long 0xC320++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_CAM,Clock source mask for CAM_BLK"
|
|
bitfld.long 0x00 28. " CSIS1_MASK ,Mask output clock of MUXCSIS1" "Masked,Unmasked"
|
|
bitfld.long 0x00 24. " CSIS0_MASK ,Mask output clock of MUXCSIS0" "Masked,Unmasked"
|
|
bitfld.long 0x00 20. " CAM1_MASK ,Mask output clock of MUXCAM1" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CAM0_MASK ,Mask output clock of MUXCAM0" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " FIMC3_LCLK_MASK ,Mask output clock of MUXFIMC3_LCLK" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " FIMC2_LCLK_MASK ,Mask output clock of MUXFIMC2_LCLK" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FIMC1_LCLK_MASK ,Mask output clock of MUXFIMC1_LCLK" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " FIMC0_LCLK_MASK ,Mask output clock of MUXFIMC0_LCLK" "Masked,Unmasked"
|
|
group.long 0xC324++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_TV,Clock source mask for TV_BLK"
|
|
bitfld.long 0x00 0. " HDMI_MASK ,Mask output clock of MUXHDMI" "Masked,Unmasked"
|
|
group.long 0xC334++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_LCD0,Clock source mask for LCD0_BLK"
|
|
bitfld.long 0x00 12. " MIPI0_MASK ,Mask output clock of MUXMIPI0" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " MDNIE_PWM0_MASK ,Mask output clock of MUXMDNIE_PWM0" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " MDNIE0_MASK ,Mask output clock of MUXMDNIE0" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIMD0_MASK ,Mask output clock of MUXFIMD0" "Masked,Unmasked"
|
|
group.long 0xC338++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_ISP,Clock source mask for ISP_BLK"
|
|
bitfld.long 0x00 12. " UART_ISP_MASK ,Mask output clock of MUXUART_ISP" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " SPI1_ISP_MASK ,Mask output clock of MUXSPI1_ISP" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " SPI0_ISP_MASK ,Mask output clock of MUXSPI0_ISP" "Masked,Unmasked"
|
|
textline " "
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 0. " PWM_ISP_MASK ,Mask output clock of MUXPWM_ISP" "Masked,Unmasked"
|
|
endif
|
|
group.long 0xC33C++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_MAUDIO,Clock source mask for AUDIO_BLK"
|
|
bitfld.long 0x00 0. " AUDIO0_MASK ,Mask output clock of MUXAUDIO0" "Masked,Unmasked"
|
|
group.long 0xC340++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_FSYS,Clock source mask for FSYS_BLK"
|
|
bitfld.long 0x00 24. " MIPIHSI_MASK ,Mask output clock of MUXMIPIHSI" "Masked,Unmasked"
|
|
bitfld.long 0x00 16. " MMC4_MASK ,Mask output clock of MUXMMC4" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " MMC3_MASK ,Mask output clock of MUXMMC3" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MMC2_MASK ,Mask output clock of MUXMMC2" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " MMC1_MASK ,Mask output clock of MUXMMC1" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " MMC0_MASK ,Mask output clock of MUXMMC0" "Masked,Unmasked"
|
|
group.long 0xC350++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_PERIL0,Clock source mask for PERIL_BLK"
|
|
bitfld.long 0x00 16. " UART4_MASK ,Mask output clock of MUXUART4" "Masked,Unmasked"
|
|
bitfld.long 0x00 12. " UART3_MASK ,Mask output clock of MUXUART3" "Masked,Unmasked"
|
|
bitfld.long 0x00 8. " UART2_MASK ,Mask output clock of MUXUART2" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " UART1_MASK ,Mask output clock of MUXUART1" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " UART0_MASK ,Mask output clock of MUXUART0" "Masked,Unmasked"
|
|
group.long 0xC354++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_PERIL1,Clock source mask for PERIL_BLK"
|
|
bitfld.long 0x00 24. " SPI2_MASK ,Mask output clock of MUXSPI2" "Masked,Unmasked"
|
|
bitfld.long 0x00 20. " SPI1_MASK ,Mask output clock of MUXSPI1" "Masked,Unmasked"
|
|
bitfld.long 0x00 16. " SPI0_MASK ,Mask output clock of MUXSPI0" "Masked,Unmasked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SPDIF_MASK ,Mask output clock of MUXSPDIF" "Masked,Unmasked"
|
|
bitfld.long 0x00 4. " AUDIO2_MASK ,Mask output clock of MUXAUDIO2" "Masked,Unmasked"
|
|
bitfld.long 0x00 0. " AUDIO1_MASK ,Mask output clock of MUXAUDIO1" "Masked,Unmasked"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_SRC_MASK END
|
|
; --------------------------------------------------------------------------------
|
|
width 20.
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_MUX_STAT
|
|
; --------------------------------------------------------------------------------
|
|
tree "Clock MUX Status"
|
|
rgroup.long 0xC410++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_TOP,Clock MUX status for CMU_TOP"
|
|
bitfld.long 0x00 28.--30. " ONENAND_SEL ,Selection signal status of MUXONENAND" "Reserved,DOUT133,DOUT166,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 24.--26. " ACLK_133_SEL ,Selection signal status of MUXACLK_133" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " ACLK_160_SEL ,Selection signal status of MUXACLK_160" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " ACLK_100_SEL ,Selection signal status of MUXACLK_100" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " ACLK_200_SEL ,Selection signal status of MUXACLK_200" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 8.--10. " VPLL_SEL ,Selection signal status of MUXVPLL" "Reserved,FINVPLL,FOUTVPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EPLL_SEL ,Selection signal status of MUXEPLL" "Reserved,FINPLL,FOUTEPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 0.--2. " ONENAND_1_SEL ,Selection signal status of MUXONENAND_1" "Reserved,MOUTONENAND,SCLKVPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0xC414++0x03
|
|
line.long 0x00 "CLK_SRC_TOP1,Select clock source for CMU_TOP"
|
|
bitfld.long 0x00 24.--26. " ACLK_400_MCUISP_SUB_SEL ,Selection signal status of MUXACLK_400_MCUISP_SUB" "Reserved,FINPLL,FOUTPOST_ACLK_400_MCUISP,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 20.--22. " ACLK_200_SUB_SEL ,Selection signal status of MUXACLK_200_SUB" "Reserved,FINPLL,FOUTPOST_ACLK_200,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ACLK_266_GPS_SUB_SEL ,Selection signal status of MUXACLK_266_GPS_SUB" "Reserved,FINPLL,FOUTPOST_ACLK_266_GPS,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 12.--14. " MPLL_USER_SEL_T ,Selection signal status of MUXMPLL" "Reserved,FINPLL,FOUTMPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " ACLK_400_MCUISP_SEL ,Selection signal status of MUXVPLL" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " ACLK_266_GPS_SEL ,Selection signal status of MUXACLK_266_GPS" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0xC428++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_MFC,Clock MUX status for MFC_BLK"
|
|
bitfld.long 0x00 8.--10. " MFC_SEL ,Selection signal status of MUXMFC" "Reserved,MOUTMFC_0,MOUTMFC_1,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " MFC_1_SEL ,Selection signal status of MUXMFC_1" "Reserved,SCLKEPLL,SCLKVPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " MFC_0_SEL ,Selection signal status of MUXMFC_0" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0xC42C++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_G3D,Clock MUX status for G3D_BLK"
|
|
bitfld.long 0x00 8.--10. " G3D_SEL ,Selection signal status of MUXG3D" "Reserved,MOUTG3D_0,MOUTG3D_1,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " G3D_1_SEL ,Selection signal status of MUXG3D_1" "Reserved,SCLKEPLL,SCLKVPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " G3D_0_SEL ,Selection signal status of MUXG3D_0" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
rgroup.long 0xC458++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_CAM1,Clock MUX status for CAM1_BLK"
|
|
bitfld.long 0x00 8.--10. " JPEG_SEL ,Selection signal status of MUXJPEG" "Reserved,MOUTJPEG_0,MOUTJPEG_1,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 4.--6. " JPEG_1_SEL ,Selection signal status of MUXJPEG_1" "Reserved,SCLKEPLL,SCLKVPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " JPEG_0_SEL ,Selection signal status of MUXJPEG_0" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_MUX_STAT END
|
|
; --------------------------------------------------------------------------------
|
|
width 16.
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_DIV
|
|
; --------------------------------------------------------------------------------
|
|
tree "Clock Divider"
|
|
group.long 0xC510++0x03
|
|
line.long 0x00 "CLK_DIV_TOP,Set clock divider ratio for CMU_TOP"
|
|
bitfld.long 0x00 24.--26. " ACLK_400_MCUISP_RATIO ,DIVACLK_400 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " ACLK_266_GPS_RATIO ,DIVACLK_266 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " ONENAND_RATIO ,DIVONENAND clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " ACLK_133_RATIO ,DIVACLK_133 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " ACLK_160_RATIO ,DIVACLK_160 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. " ACLK_100_RATIO ,DIVACLK_100 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " ACLK_200_RATIO ,DIVACLK_200 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC520++0x03
|
|
line.long 0x00 "CLK_DIV_CAM0,Set clock divider ratio for CAM_BLK"
|
|
bitfld.long 0x00 28.--31. " CSIS1_RATIO ,DIVCSIS1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " CSIS0_RATIO ,DIVCSIS0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " CAM1_RATIO ,DIVCAM1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CAM0_RATIO ,DIVCAM0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " FIMC3_LCLK_RATIO ,DIVFIMC3_LCLK clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " FIMC2_LCLK_RATIO ,DIVFIMC2_LCLK clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " FIMC1_LCLK_RATIO ,DIVFIMC1_LCLK clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FIMC0_LCLK_RATIO ,DIVFIMC0_LCLK clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC524++0x03
|
|
line.long 0x00 "CLK_DIV_TV,Set clock divider ratio for TV_BLK"
|
|
bitfld.long 0x00 0.--3. " TV_BLK_RATIO ,DIVTV_BLK clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC528++0x03
|
|
line.long 0x00 "CLK_DIV_MFC,Set clock divider ratio for MFC_BLK"
|
|
bitfld.long 0x00 0.--3. " MFC_RATIO ,DIVMFC clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC52C++0x03
|
|
line.long 0x00 "CLK_DIV_G3D,Set clock divider ratio for G3D_BLK"
|
|
bitfld.long 0x00 0.--3. " G3D_RATIO ,DIVG3D clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC534++0x03
|
|
line.long 0x00 "CLK_DIV_LCD,Set clock divider ratio for LCD_BLK"
|
|
bitfld.long 0x00 20.--23. " MIPI0_PRE_RATIO ,DIVMIPI0_PRE clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " MIPI0_RATIO ,DIVMIPI0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " MDNIE_PWM0_PRE_RATIO ,DIVMDNIE_PWM0_PRE clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MDNIE_PWM0_RATIO ,DIVMDNIE_PWM0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " MDNIE0_RATIO ,DIVMDNIE0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " FIMD0_RATIO ,DIVFIMD0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC538++0x03
|
|
line.long 0x00 "CLK_DIV_ISP,Set clock divider ratio for ISP_BLK"
|
|
bitfld.long 0x00 28.--31. " UART_ISP_RATIO ,DIVUART_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 20.--27. 1. " SPI1_ISP_PRE_RATIO ,DIVSPI1_ISP_PRE clock divider ratio"
|
|
bitfld.long 0x00 16.--19. " SPI1_ISP_RATIO ,DIVSPI1_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SPI0_ISP_PRE_RATIO ,DIVSPI0_ISP_PRE clock divider ratio"
|
|
bitfld.long 0x00 4.--7. " SPI0_ISP_RATIO ,DIVSPI0_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 0.--3. " PWM_ISP_RATIO ,DIVPWM_ISP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0xC53C++0x03
|
|
line.long 0x00 "CLK_DIV_MAUDIO,Set clock divider ratio for AUDIO_BLK"
|
|
hexmask.long.byte 0x00 4.--11. 1. " PCM0_RATIO ,DIVPCM0 clock divider ratio"
|
|
bitfld.long 0x00 0.--3. " AUDIO0_RATIO ,DIVAUDIO0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC540++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS0,Set clock divider ratio for FSYS_BLK"
|
|
bitfld.long 0x00 20.--23. " MIPIHSI_RATIO ,DIVMIPIHSI clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC544++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS1,Set clock divider ratio for FSYS_BLK"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MMC1_PRE_RATIO ,DIVMMC1_PRE clock divider ratio"
|
|
bitfld.long 0x00 16.--19. " MMC1_RATIO ,DIVMMC1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMC0_PRE_RATIO ,DIVMMC0_PRE clock divider ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MMC0_RATIO ,DIVMMC0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC548++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS2,Set clock divider ratio for FSYS_BLK"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MMC3_PRE_RATIO ,DIVMMC3_PRE clock divider ratio"
|
|
bitfld.long 0x00 16.--19. " MMC3_RATIO ,DIVMMC3 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMC2_PRE_RATIO ,DIVMMC2_PRE clock divider ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MMC2_RATIO ,DIVMMC2 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC54C++0x03
|
|
line.long 0x00 "CLK_DIV_FSYS3,Set clock divider ratio for FSYS_BLK"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MMC4_PRE_RATIO ,DIVMMC4_PRE clock divider ratio"
|
|
bitfld.long 0x00 0.--3. " MMC4_RATIO ,DIVMMC4 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC550++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL0,Set clock divider ratio for PERIL_BLK"
|
|
bitfld.long 0x00 16.--19. " UART4_RATIO ,DIVUART4 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " UART3_RATIO ,DIVUART3 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " UART2_RATIO ,DIVUART2 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " UART1_RATIO ,DIVUART1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " UART0_RATIO ,DIVUART0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC554++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL1,Set clock divider ratio for PERIL_BLK"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SPI1_PRE_RATIO ,DIVSPI1_PRE clock divider ratio"
|
|
bitfld.long 0x00 16.--19. " SPI1_RATIO ,DIVSPI1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SPI0_PRE_RATIO ,DIVSPI0_PRE clock divider ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SPI0_RATIO ,DIVSPI0 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC558++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL2,Set clock divider ratio for PERIL_BLK"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SPI2_PRE_RATIO ,DIVSPI2_PRE clock divider ratio"
|
|
bitfld.long 0x00 0.--3. " SPI2_RATIO ,DIVSPI2 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC55C++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL3,Set clock divider ratio for PERIL_BLK"
|
|
bitfld.long 0x00 4.--7. " SLIMBUS_RATIO ,DIVSLIMBUS clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC560++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL4,Set clock divider ratio for PERIL_BLK"
|
|
hexmask.long.byte 0x00 20.--27. 1. " PCM2_RATIO ,DIVPCM2 clock divider ratio"
|
|
bitfld.long 0x00 16.--19. " AUDIO2_RATIO ,DIVAUDIO2 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 4.--11. 1. " PCM1_RATIO ,DIVPCM1 clock divider ratio"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " AUDIO1_RATIO ,DIVAUDIO1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC564++0x03
|
|
line.long 0x00 "CLK_DIV_PERIL5,Set clock divider ratio for PERIL_BLK"
|
|
bitfld.long 0x00 8.--13. " I2S2_RATIO ,DIVI2S2 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " I2S1_RATIO ,DIVI2S1 clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC568++0x03
|
|
line.long 0x00 "CLK_DIV_CAM1,Set clock divider ratio for CAM1_BLK"
|
|
bitfld.long 0x00 0.--3. " JPEG_RATIO ,DIVJPEG clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xC580++0x03
|
|
line.long 0x00 "CLKDIV2_RATIO,PCLK divider ratio in FSYS CAM LCD0 LCD1 TV GPS block"
|
|
bitfld.long 0x00 24.--25. " GPS_BLK ,PCLK divider ratio in GPS_BLK" "Reserved,Divide by 2,Divide by 3,Divide by 4"
|
|
bitfld.long 0x00 20.--21. " TV_BLK ,PCLK divider ratio in TV_BLK" "Reserved,Divide by 2,Divide by 3,Divide by 4"
|
|
bitfld.long 0x00 12.--13. " LCD_BLK ,PCLK divider ratio in LCD_BLK for 160MHz domain" "Reserved,Divide by 2,Divide by 3,Divide by 4"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CAM_BLK ,PCLK divider ratio in CAM_BLK" "Reserved,Divide by 2,Divide by 3,Divide by 4"
|
|
bitfld.long 0x00 0.--1. " FSYS_BLK ,PCLK divider ratio in FSYS_BLK" "Reserved,Divide by 2,Divide by 3,Divide by 4"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_DIV END
|
|
; --------------------------------------------------------------------------------
|
|
width 21.
|
|
; --------------------------------------------------------------------------------
|
|
; CLK_DIV_STAT
|
|
; --------------------------------------------------------------------------------
|
|
tree "Clock Divider Status"
|
|
rgroup.long 0xC610++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_TOP,Clock divider status for CMU_TOP"
|
|
bitfld.long 0x00 24. " DIV_ACLK_400_MCUISP ,DIVACLK_400_MCUISP Status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_ACLK_266_GPS ,DIVACLK_266_GPS Status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_ONENAND ,DIVONENAND status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DIV_ACLK_133 ,DIVACLK_133 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_ACLK_160 ,DIVACLK_160 status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_ACLK_100 ,DIVACLK_100 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_ACLK_200 ,DIVACLK_200 status" "Stable,Changing"
|
|
rgroup.long 0xC620++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_CAM,Clock divider status for CAM_BLK"
|
|
bitfld.long 0x00 28. " DIV_CSIS1 ,DIVCSIS1 status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_CSIS0 ,DIVCSIS0 status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_CAM1 ,DIVCAM1 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_CAM0 ,DIVCAM0 status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_FIMC3_LCLK ,DIVFIMC3_LCLK status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_FIMC2_LCLK ,DIVFIMC2_LCLK status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DIV_FIMC1_LCLK ,DIVFIMC1_LCLK status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_FIMC0_LCLK ,DIVFIMC0_LCLK status" "Stable,Changing"
|
|
rgroup.long 0xC624++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_TV,Clock divider status for TV_BLK"
|
|
bitfld.long 0x00 0. " DIV_TV_BLK ,DIVTV_BLK status" "Stable,Changing"
|
|
rgroup.long 0xC628++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_MFC,Clock divider status for MFC_BLK"
|
|
bitfld.long 0x00 0. " DIV_MFC ,DIVMFC status" "Stable,Changing"
|
|
rgroup.long 0xC62C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_G3D,Clock divider status for G3D_BLK"
|
|
bitfld.long 0x00 0. " DIV_G3D ,DIVG3D status" "Stable,Changing"
|
|
rgroup.long 0xC634++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_LCD,Clock divider status for LCD_BLK"
|
|
bitfld.long 0x00 20. " DIV_MIPI0_PRE ,DIVMIPI0_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_MIPI0 ,DIVMIPI0 status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_MDNIE_PWM0_PRE ,DIVMDNIE_PWM0_PRE Status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIV_MDNIE_PWM0 ,DIVMDNIE_PWM0 Status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_MDNIE0 ,DIVMDNIE0 Status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_FIMD0 ,DIVFIMD0 status" "Stable,Changing"
|
|
rgroup.long 0xC638++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_ISP,Clock divider status for ISP_BLK"
|
|
bitfld.long 0x00 28. " DIV_UART_ISP ,DIVUART_ISP status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_SPI1_ISP_PRE ,DIVSPI1_ISP_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_SPI1_ISP ,DIVSPI1_ISP status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIV_SPI0_ISP_PRE ,DIVSPI0_ISP_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_SPI0_ISP ,DIVSPI0_ISP status" "Stable,Changing"
|
|
rgroup.long 0xC63C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_MAUDIO,Clock divider status for AUDIO_BLK"
|
|
bitfld.long 0x00 4. " DIV_PCM0 ,DIVPCM0 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_AUDIO0 ,DIVAUDIO0 status" "Stable,Changing"
|
|
rgroup.long 0xC640++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS0,Clock divider status for FSYS_BLK"
|
|
bitfld.long 0x00 20. " DIV_MIPIHSI ,DIVMIPIHSI status" "Stable,Changing"
|
|
rgroup.long 0xC644++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS1,Clock divider status for FSYS_BLK"
|
|
bitfld.long 0x00 24. " DIV_MMC1_PRE ,DIVMMC1_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_MMC1 ,DIVMMC1 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_MMC0_PRE ,DIVMMC0_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_MMC0 ,DIVMMC0 status" "Stable,Changing"
|
|
rgroup.long 0xC648++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS2,Clock divider status for FSYS_BLK"
|
|
bitfld.long 0x00 24. " DIV_MMC3_PRE ,DIVMMC3_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_MMC3 ,DIVMMC3 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_MMC2_PRE ,DIVMMC2_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_MMC2 ,DIVMMC2 status" "Stable,Changing"
|
|
rgroup.long 0xC64C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_FSYS3,Clock divider status for FSYS_BLK"
|
|
bitfld.long 0x00 8. " DIV_MMC4_PRE ,DIVMMC4_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_MMC4 ,DIVMMC4 status" "Stable,Changing"
|
|
rgroup.long 0xC650++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL0,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 16. " DIV_UART4 ,DIVUART4 status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_UART3 ,DIVUART3 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_UART2 ,DIVUART2 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DIV_UART1 ,DIVUART1 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_UART0 ,DIVUART0 status" "Stable,Changing"
|
|
rgroup.long 0xC654++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL1,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 24. " DIV_SPI1_PRE ,DIVSPI1_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_SPI1 ,DIVSPI1 status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_SPI0_PRE ,DIVSPI0_PRE status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_SPI0 ,DIVSPI0 statuss" "Stable,Changing"
|
|
rgroup.long 0xC658++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL2,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 8. " DIV_SPI2_PRE ,DIVSPI2_PRE status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_SPI2 ,DIVSPI2 status" "Stable,Changing"
|
|
rgroup.long 0xC65C++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL3,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 4. " DIV_SLIMBUS ,DIVSLIMBUS status" "Stable,Changing"
|
|
rgroup.long 0xC660++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL4,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 20. " DIV_PCM2 ,DIVPCM2 status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_AUDIO2 ,DIVAUDIO2 status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_PCM1 ,DIVPCM1 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DIV_AUDIO1 ,DIVAUDIO1 status" "Stable,Changing"
|
|
rgroup.long 0xC664++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_PERIL5,Clock divider status for PERIL_BLK"
|
|
bitfld.long 0x00 8. " DIV_I2S2 ,DIVI2S2 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_I2S1 ,DIVI2S1 status" "Stable,Changing"
|
|
rgroup.long 0xC668++0x03
|
|
line.long 0x00 "CLK_DIV_STAT_CAM1,Clock divider status for CAM1_BLK"
|
|
bitfld.long 0x00 0. " DIV_JPEG ,DIVJPEG status" "Stable,Changing"
|
|
rgroup.long 0xC680++0x03
|
|
line.long 0x00 "CLKDIV2_STAT,PCLK divider status for FSYS CAM LCD0 LCD1 TV block"
|
|
bitfld.long 0x00 24. " GPS_BLK ,PCLK divider status in GPS_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 20. " TV_BLK ,PCLK divider status in TV_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 12. " LCD_BLK ,PCLK divider status in LCD_BLK for 160MHz domain" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAM_BLK ,PCLK divider status in CAM_BLK" "Stable,Changing"
|
|
bitfld.long 0x00 0. " FSYS_BLK ,PCLK divider status in FSYS_BLK" "Stable,Changing"
|
|
tree.end
|
|
sif (cpu()=="Exynos4412")
|
|
width 20.
|
|
tree "Bus Clock Gating Control"
|
|
group.long 0xC744++0x03
|
|
line.long 0x00 "CLK_GATE_BUS_FSYS1,Control Bus clock gating for FSYS1"
|
|
bitfld.long 0x00 22. " PCLK_ASYNCAXIS_GPS_FSYSD ,Gating APB clock for ASYNCAXIS_GPS_FSYSD" "Mask,Pass"
|
|
bitfld.long 0x00 21. " PCLK_AXI_FSYSS ,Gating APB clock for AXI_FSYSS" "Mask,Pass"
|
|
bitfld.long 0x00 20. " PCLK_AXI_FSYSD ,Gating APB clock for AXI_FSYSD" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PCLK_PPMUFILE ,Gating APB clock for PPMUFILE" "Mask,Pass"
|
|
bitfld.long 0x00 16. " PCLK_ADC ,Gating APB clock for FSYS ADC" "Mask,Pass"
|
|
tree.end
|
|
endif
|
|
width 19.
|
|
tree "IP Clock Gating Control"
|
|
group.long 0xC920++0x0F
|
|
line.long 0x00 "CLK_GATE_IP_CAM,Control IP clock gating for CAM_BLK"
|
|
bitfld.long 0x00 18. " CLK_PIXELASYNCM1 ,Gating all clocks for PIXELASYNCM1" "Mask,Pass"
|
|
bitfld.long 0x00 17. " CLK_PIXELASYNCM0 ,Gating all clocks for PIXELASYNCM0" "Mask,Pass"
|
|
bitfld.long 0x00 16. " CLK_PPMUCAMIF ,Gating all clocks for PPMUCAMIF" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CLK_SMMUJPEG ,Gating all clocks for SMMUJPEG" "Mask,Pass"
|
|
bitfld.long 0x00 10. " CLK_SMMUFIMC3 ,Gating all clocks for SMMUFIMC3" "Mask,Pass"
|
|
bitfld.long 0x00 9. " CLK_SMMUFIMC2 ,Gating all clocks for SMMUFIMC2" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLK_SMMUFIMC1 ,Gating all clocks for SMMUFIMC1" "Mask,Pass"
|
|
bitfld.long 0x00 7. " CLK_SMMUFIMC0 ,Gating all clocks for SMMUFIMC0" "Mask,Pass"
|
|
bitfld.long 0x00 6. " CLK_JPEG ,Gating all clocks for JPEG" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLK_CSIS1 ,Gating all clocks for CSIS1" "Mask,Pass"
|
|
bitfld.long 0x00 4. " CLK_CSIS0 ,Gating all clocks for CSIS0" "Mask,Pass"
|
|
bitfld.long 0x00 3. " CLK_FIMC3 ,Gating all clocks for FIMC3" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_FIMC2 ,Gating all clocks for FIMC2" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_FIMC1 ,Gating all clocks for FIMC1" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_FIMC0 ,Gating all clocks for FIMC0" "Mask,Pass"
|
|
line.long 0x04 "CLK_GATE_IP_TV,Control IP clock gating for TV_BLK"
|
|
bitfld.long 0x04 5. " CLK_PPMUTV ,Gating all clocks for PPMUTV" "Mask,Pass"
|
|
bitfld.long 0x04 4. " CLK_SMMUTV ,Gating all clocks for SMMUTV" "Mask,Pass"
|
|
bitfld.long 0x04 3. " CLK_HDMI ,Gating all clocks for HDMI" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CLK_MIXER ,Gating all clocks for MIXER" "Mask,Pass"
|
|
bitfld.long 0x04 0. " CLK_VP ,Gating all clocks for VP" "Mask,Pass"
|
|
line.long 0x08 "CLK_GATE_IP_MFC,Control IP clock gating for MFC_BLK"
|
|
bitfld.long 0x08 4. " CLK_PPMUMFC_R ,Gating all clocks for PPMUMFC_R" "Mask,Pass"
|
|
bitfld.long 0x08 3. " CLK_PPMUMFC_L ,Gating all clocks for PPMUMFC_L" "Mask,Pass"
|
|
bitfld.long 0x08 2. " CLK_SMMUMFC_R ,Gating all clocks for SMMUMFC_R" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CLK_SMMUMFC_L ,Gating all clocks for SMMUMFC_L" "Mask,Pass"
|
|
bitfld.long 0x08 0. " CLK_MFC ,Gating all clocks for MFC" "Mask,Pass"
|
|
line.long 0x0C "CLK_GATE_IP_G3D,Control IP clock gating for G3D_BLK"
|
|
bitfld.long 0x0C 1. " CLK_PPMUG3D ,Gating all clocks for PPMUG3D" "Mask,Pass"
|
|
bitfld.long 0x0C 0. " CLK_G3D ,Gating all clocks for G3D" "Mask,Pass"
|
|
group.long 0xC934++0x07
|
|
line.long 0x00 "CLK_GATE_IP_LCD,Control IP clock gating for LCD_BLK"
|
|
bitfld.long 0x00 5. " CLK_PPMULCD0 ,Gating all clocks for PPMULCD0" "Mask,Pass"
|
|
bitfld.long 0x00 4. " CLK_SMMUFIMD0 ,Gating all clocks for SMMUFIMD0" "Mask,Pass"
|
|
bitfld.long 0x00 3. " CLK_DSIM0 ,Gating all clocks for DSIM0" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_MDNIE0 ,Gating all clocks for MDNIE0" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_MIE0 ,Gating all clocks for MIE0" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_FIMD0 ,Gating all clocks for FIMD0" "Mask,Pass"
|
|
line.long 0x04 "CLK_GATE_IP_ISP,Control IP clock gating for ISP_BLK"
|
|
bitfld.long 0x04 3. " CLK_UART_ISP_SCLK ,Gating all clocks for UART_ISP" "Mask,Pass"
|
|
bitfld.long 0x04 2. " CLK_SPI1_ISP_SCLK ,Gating all clocks for SPI1_ISP" "Mask,Pass"
|
|
bitfld.long 0x04 1. " CLK_SPI0_ISP_SCLK ,Gating all clocks for SPI0_ISP" "Mask,Pass"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x04 1. " CLK_PWM_ISP_SCLK ,Gating all clocks for PWM_ISP" "Mask,Pass"
|
|
endif
|
|
group.long 0xC940++0x03
|
|
line.long 0x00 "CLK_GATE_IP_FSYS,Control IP clock gating for FSYS_BLK"
|
|
bitfld.long 0x00 17. " CLK_PPMUFILE ,Gating all clocks for PPMUFILE" "Mask,Pass"
|
|
bitfld.long 0x00 16. " CLK_NFCON ,Gating all clocks for NFCON" "Mask,Pass"
|
|
bitfld.long 0x00 15. " CLK_ONENAND ,Gating all clocks for ONENAND" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLK_USBDEVICE ,Gating all clocks for USBDEVICE" "Mask,Pass"
|
|
bitfld.long 0x00 12. " CLK_USBHOST ,Gating all clocks for USBHOST" "Mask,Pass"
|
|
bitfld.long 0x00 11. " CLK_SROMC ,Gating all clocks for SROMC" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLK_MIPIHSI ,Gating all clocks for MIPIHSI" "Mask,Pass"
|
|
bitfld.long 0x00 9. " CLK_SDMMC4 ,Gating all clocks for SDMMC4" "Mask,Pass"
|
|
bitfld.long 0x00 8. " CLK_SDMMC3 ,Gating all clocks for SDMMC3" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLK_SDMMC2 ,Gating all clocks for SDMMC2" "Mask,Pass"
|
|
bitfld.long 0x00 6. " CLK_SDMMC1 ,Gating all clocks for SDMMC1" "Mask,Pass"
|
|
bitfld.long 0x00 5. " CLK_SDMMC0 ,Gating all clocks for SDMMC0" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLK_TSI ,Gating all clocks for TSI" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_PDMA1 ,Gating all clocks for PDMA1" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_PDMA0 ,Gating all clocks for PDMA0" "Mask,Pass"
|
|
group.long 0xC94C++0x07
|
|
line.long 0x00 "CLK_GATE_IP_GPS,Control IP clock gating for GPS_BLK"
|
|
bitfld.long 0x00 2. " CLK_PPMUGPS ,Gating all clocks for PPMUGPS" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_SMMUGPS ,Gating all clocks for SMMUGPS" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_GPS ,Gating all clocks for UGPS" "Mask,Pass"
|
|
line.long 0x04 "CLK_GATE_IP_PERIL,Control IP clock gating for PERIL_BLK"
|
|
bitfld.long 0x04 27. " CLK_AC97 ,Gating all clocks for AC97" "Mask,Pass"
|
|
bitfld.long 0x04 26. " CLK_SPDIF ,Gating all clocks for SPDIF" "Mask,Pass"
|
|
bitfld.long 0x04 25. " CLK_SLIMBUS ,Gating all clocks for Slimbus" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 24. " CLK_PWM ,Gating all clocks for PWM" "Mask,Pass"
|
|
bitfld.long 0x04 23. " CLK_PCM2 ,Gating all clocks for PCM2" "Mask,Pass"
|
|
bitfld.long 0x04 22. " CLK_PCM1 ,Gating all clocks for PCM1" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 21. " CLK_I2S2 ,Gating all clocks for I2S2" "Mask,Pass"
|
|
bitfld.long 0x04 20. " CLK_I2S1 ,Gating all clocks for I2S1" "Mask,Pass"
|
|
bitfld.long 0x04 18. " CLK_SPI2 ,Gating all clocks for SPI2" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 17. " CLK_SPI1 ,Gating all clocks for SPI1" "Mask,Pass"
|
|
bitfld.long 0x04 16. " CLK_SPI0 ,Gating all clocks for SPI0" "Mask,Pass"
|
|
bitfld.long 0x04 14. " CLK_I2CHDMI ,Gating all clocks for I2CHDMI" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 13. " CLK_I2C7 ,Gating all clocks for I2C7" "Mask,Pass"
|
|
bitfld.long 0x04 12. " CLK_I2C6 ,Gating all clocks for I2C6" "Mask,Pass"
|
|
bitfld.long 0x04 11. " CLK_I2C5 ,Gating all clocks for I2C5" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 10. " CLK_I2C4 ,Gating all clocks for I2C4" "Mask,Pass"
|
|
bitfld.long 0x04 9. " CLK_I2C3 ,Gating all clocks for I2C3" "Mask,Pass"
|
|
bitfld.long 0x04 8. " CLK_I2C2 ,Gating all clocks for I2C2" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CLK_I2C1 ,Gating all clocks for I2C1" "Mask,Pass"
|
|
bitfld.long 0x04 6. " CLK_I2C0 ,Gating all clocks for I2C0" "Mask,Pass"
|
|
bitfld.long 0x04 4. " CLK_UART4 ,Gating all clocks for UART4" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CLK_UART3 ,Gating all clocks for UART3" "Mask,Pass"
|
|
bitfld.long 0x04 2. " CLK_UART2 ,Gating all clocks for UART2" "Mask,Pass"
|
|
bitfld.long 0x04 1. " CLK_UART1 ,Gating all clocks for UART1" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLK_UART0 ,Gating all clocks for UART0" "Mask,Pass"
|
|
group.long 0xC970++0x03
|
|
line.long 0x00 "CLK_GATE_BLOCK,Control block clock gating"
|
|
bitfld.long 0x00 7. " CLK_GPS ,Gating all clocks for GPS_BLK" "Mask,Pass"
|
|
bitfld.long 0x00 4. " CLK_LCD ,Gating all clocks for LCD_BLK" "Mask,Pass"
|
|
bitfld.long 0x00 3. " CLK_G3D ,Gating all clocks for G3D_BLK" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_MFC ,Gating all clocks for MFC_BLK" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_TV ,Gating all clocks for TV_BLK" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_CAM ,Gating all clocks for CAM_BLK" "Mask,Pass"
|
|
width 25.
|
|
group.long 0xCA00++0x03 "CLKOUT Control"
|
|
line.long 0x00 "CLKOUT_CMU_TOP,CLOCKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,Mode select" "EPLL_FOUT,VPLL_OUT,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,AUDIOCDLK0,AUDIOCDLK1,AUDIOCDLK2,SPDIF_EXTCLK,ACLK_160,ACLK_133,ACLK_200,ACLK_100,SCLK_MFC,SCLK_G3D,ACLK_400_MCUISP,CAM_A_PCLK,CAM_B_PCLK,S_RXBYTECLKHS0_2L,S_RXBYTECLKHS0_4L,RX_HALF_BYTE_CLK_CSIS0,RX_HALF_BYTE_CLK_CSIS1,SCLK_JPEG,SCLK_PWM_ISP,SCLK_SPI0_ISP,SCLK_SPI1_ISP,SCLK_UART_ISP,SCLK_MIPIHSI,SCLK_HDMI,SCLK_FIMD0,SCLK_PCM0"
|
|
else
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,Mode select" "EPLL_FOUT,VPLL_OUT,SCLK_HDMI24M,SCLK_USBPHY0,Reserved,SCLK_HDMIPHY,AUDIOCDLK0,AUDIOCDLK1,AUDIOCDLK2,SPDIF_EXTCLK,ACLK_160,ACLK_133,ACLK_200,ACLK_100,SCLK_MFC,SCLK_G3D,ACLK_400_MCUISP,CAM_A_PCLK,CAM_B_PCLK,S_RXBYTECLKHS0_2L,S_RXBYTECLKHS0_4L,RX_HALF_BYTE_CLK_CSIS0,RX_HALF_BYTE_CLK_CSIS1,SCLK_JPEG,Reserved,SCLK_SPI0_ISP,SCLK_SPI1_ISP,SCLK_UART_ISP,SCLK_MIPIHSI,SCLK_HDMI,SCLK_FIMD0,SCLK_PCM0"
|
|
endif
|
|
rgroup.long 0xCA04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_TOP_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
tree.end
|
|
width 19.
|
|
tree "CMU DMC & BLK Control"
|
|
group.long 0x10008++0x03
|
|
line.long 0x00 "MPLL_LOCK,PLL locking period for MPLL"
|
|
hexmask.long.word 0x00 0.--15. 1. " PLL_LOCKTIME ,Stable clock output set period"
|
|
group.long 0x10108++0x03
|
|
line.long 0x00 "MPLL_CON0,PLL output frequency for MPLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL Enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitors frequency select pin" "F(ref),F(vco)"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
hexmask.long.byte 0x00 8.--13. 1. " PDIV ,PLL P divide value"
|
|
hexmask.long.byte 0x00 0.--2. 1. " SDIV ,PLL S divide value"
|
|
group.long 0x1010C++0x03
|
|
line.long 0x00 "MPLL_CON1,PLL AFC control"
|
|
bitfld.long 0x00 24. " RESV1 ,LDR status" "0,1"
|
|
bitfld.long 0x00 23. " RESV0 ,VCO range boost-up" "0,1"
|
|
bitfld.long 0x00 22. " BYPASS ,Bypass mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DCC_ENB ,DCC enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " AFC_ENB ,AFC enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " FEED_EN ,Enable pin for FEED_OUT" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " LOCK_CON_OUT ,Detector setting of the output margin" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " LOCK_CON_IN ,Detector setting of the input margin" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " LOCK_CON_DLY ,Detector setting of the detection resolution" "0,1,2,3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " AFC ,AFC value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x10200++0x03
|
|
line.long 0x00 "CLK_SRC_DMC,Select clock source for CMU_DMC"
|
|
bitfld.long 0x00 28. " MUX_G2D_ACP_SEL ,G2D_ACP source clock control" "MOUTG2D_ACP_0,MOUTG2D_ACP_1"
|
|
bitfld.long 0x00 24. " MUX_G2D_ACP_1_SEL ,G2D_ACP source clock control" "SCLKEPLL,SCLKVPLL"
|
|
bitfld.long 0x00 20. " MUX_G2D_ACP_0_SEL ,G2D_ACP source clock control" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MUX_PWI_SEL ,Control MUXPWI" "XXTI,XusbXTI,SCLK_HDMI24M,SCLK_USBPHY0,SCLK_USBPHY1,SCLK_HDMIPHY,SCLKMPLL_USER_T,SCLKEPLL,SCLKVPLL,?..."
|
|
bitfld.long 0x00 12. " MUX_MPLL_SEL ,Control MUXDPHY" "FINPLL,MOUTMPLLFOUT"
|
|
bitfld.long 0x00 8. " MUX_DPHY_SEL ,Control MUXDPHY" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MUX_DMC_BUS_SEL ,Control MUXDMC_BUS" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
bitfld.long 0x00 0. " MUX_C2C_SEL ,Control MUXDMC_BUS" "SCLKMPLL_USER_T,SCLKAPLL"
|
|
group.long 0x10300++0x03
|
|
line.long 0x00 "CLK_SRC_MASK_DMC,Clock source mask for DMC_BLK"
|
|
bitfld.long 0x00 16. " PWI_MASK ,Mask output clock of MUXPWI" "Mask,Unmask"
|
|
rgroup.long 0x10400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_DMC,Clock MUX status for CMU_DMC"
|
|
bitfld.long 0x00 28.--30. " G2D_ACP_SEL ,Selection signal status of MUXG2D_ACP" "Reserved,MOUTG2D_ACP_0,MOUTG2D_ACP_1,Changing,Changing,Changing,Changing,Changing"
|
|
bitfld.long 0x00 24.--26. " G2D_ACP_1_SEL ,Selection signal status of MUXG2D_ACP_1" "Reserved,SCLKEPLL,SCLKVPLL,Changing,Changing,Changing,Changing,Changing"
|
|
bitfld.long 0x00 20.--22. " G2D_ACP_0_SEL ,Selection signal status of MUXG2D_ACP_2" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Changing,Changing,Changing,Changing,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " MPLL_SEL ,Selection signal status of MUXMPLL" "Reserved,FINPLL,MOUTMPLLFOUT,Changing,Changing,Changing,Changing,Changing"
|
|
bitfld.long 0x00 8.--10. " DPHY_SEL ,Selection signal status of MUXDMC0" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Changing,Changing,Changing,Changing,Changing"
|
|
bitfld.long 0x00 4.--6. " DMC_BUS_SEL ,Selection signal status of MUXDMC_BUS" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Changing,Changing,Changing,Changing,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " C2C_SEL ,Selection signal status of MUXC2C" "Reserved,SCLKMPLL_USER_T,SCLKAPLL,Changing,Changing,Changing,Changing,Changing"
|
|
group.long 0x10500++0x07
|
|
line.long 0x00 "CLK_DIV_DMC0,Clock divider ratio for CMU_DMC0"
|
|
bitfld.long 0x00 20.--22. " DMCP_RATIO ,DIVCK133 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " DMCD_RATIO ,DIVDMCD clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " DMC_RATIO ,DIVDMC clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " DPHY_RATIO ,DIVDPHY clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " ACP_PCLK_RATIO ,DIVACP clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ACP_RATIO ,DIVACP clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CLK_DIV_DMC1,Clock divider ratio for CMU_DMC1"
|
|
hexmask.long.byte 0x04 24.--30. 1. " DPM_RATIO ,DIVDPM clock divider ratio"
|
|
hexmask.long.byte 0x04 16.--22. 1. " DVSEM_RATIO ,DIVDVSEM clock divider ratio"
|
|
bitfld.long 0x04 12.--14. " C2C_ACLK_RATIO ,DIVPWI clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " PWI_RATIO ,DIVPWI clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--6. " C2C_RATIO ,C2C clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--3. " G2D_ACP_RATIO ,DIVG2D_ACP clock divider ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x10600++0x07
|
|
line.long 0x00 "CLK_DIV_STAT_DMC0,Clock divider status for CMU_DMC0"
|
|
bitfld.long 0x00 20. " DIV_DMCP ,DIVDMCP status" "Stable,Changing"
|
|
bitfld.long 0x00 16. " DIV_DMCD ,DIVDMCD status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_DMC ,DIVDMC status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DIV_DPHY ,DIVDPHY status" "Stable,Changing"
|
|
bitfld.long 0x00 4. " DIV_ACP_PCLK ,DIVACP_PCLK status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_ACP ,DIVACP status" "Stable,Changing"
|
|
line.long 0x04 "CLK_DIV_STAT_DMC1,Clock divider status for CMU_DMC1"
|
|
bitfld.long 0x04 24. " DIV_DPM ,DIVDPM status" "Stable,Changing"
|
|
bitfld.long 0x04 16. " DIV_DVSEM ,DIVDVSEM status" "Stable,Changing"
|
|
bitfld.long 0x04 12. " DIV_C2C_ACLK ,DIVC2C_ACLK status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x04 8. " DIV_PWI ,DIVPWI status" "Stable,Changing"
|
|
bitfld.long 0x04 4. " DIV_C2C ,DIVC2C status" "Stable,Changing"
|
|
bitfld.long 0x04 0. " DIV_G2D_ACP ,DIVG2D_ACP status" "Stable,Changing"
|
|
group.long 0x10900++0x07
|
|
line.long 0x00 "CLK_GATE_IP_DMC,Control IP clock gating for DMC_BLK"
|
|
bitfld.long 0x00 31. " CLK_GPIOC2C ,Gating all clocks for GPIOC2C" "Mask,Pass"
|
|
bitfld.long 0x00 28. " CLK_ASYNC_CPU_XIUR ,Gating all clocks for ASYNC_CPU_XIUR" "Mask,Pass"
|
|
bitfld.long 0x00 27. " CLK_ASYNC_C2C_XIUL ,Gating all clocks for ASYNC_C2C_XIUL" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CLK_C2C ,Gating all clocks for C2C" "Mask,Pass"
|
|
bitfld.long 0x00 24. " CLK_SMMUG2D_ACP ,Gating all clocks for SMMUG2D_ACP" "Mask,Pass"
|
|
bitfld.long 0x00 23. " CLK_G2D_ACP ,Gating all clocks for G2D_ACP" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLK_ASYNC_GDR ,Gating all clocks for ASYNC_GDR" "Mask,Pass"
|
|
bitfld.long 0x00 21. " CLK_ASYNC_GDL ,Gating all clocks for ASYNC_GDL" "Mask,Pass"
|
|
bitfld.long 0x00 20. " CLK_GIC ,Gating all clocks for GIC" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLK_IEM_IEC ,Gating all clocks for IEM IEC" "Mask,Pass"
|
|
bitfld.long 0x00 17. " CLK_IEM_APC ,Gating all clocks for IEM APC" "Mask,Pass"
|
|
bitfld.long 0x00 16. " CLK_PPMUACP ,Gating all clocks for PPMUCPU" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLK_ID_REMAPPER ,Gating all clocks for ID_REMAPPER" "Mask,Pass"
|
|
bitfld.long 0x00 12. " CLK_SMMUSSS ,Gating all clocks for SMMUSSS" "Mask,Pass"
|
|
bitfld.long 0x00 10. " CLK_PPMUCPU ,Gating all clocks for PPMUCPU" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLK_PPMUDMC1 ,Gating all clocks for PPMUDMC1" "Mask,Pass"
|
|
bitfld.long 0x00 8. " CLK_PPMUDMC0 ,Gating all clocks for PPMUDMC0" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLK_FBMDMC1 ,Gating all clocks for FBMDMC1" "Mask,Pass"
|
|
bitfld.long 0x00 5. " CLK_FBMDMC0 ,Gating all clocks for FBMDMC0" "Mask,Pass"
|
|
bitfld.long 0x00 4. " CLK_SSS ,Gating all clocks for SSS" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_INT_COMB ,Gating all clocks for INT_COMB" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_DREX2 ,Gating all clocks for DREX2" "Mask,Pass"
|
|
line.long 0x04 "CLK_GATE_IP_DMC1,Control IP clock gating for DMC1_BLK"
|
|
bitfld.long 0x04 3. " CLK_TZASC_LR ,Gating all clocks for TZASC_LR" "Mask,Pass"
|
|
bitfld.long 0x04 2. " CLK_TZASC_LW ,Gating all clocks for TZASC_LW" "Mask,Pass"
|
|
bitfld.long 0x04 1. " CLK_TZASC_RR ,Gating all clocks for TZASC_RR" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLK_TZASC_RW ,Gating all clocks for TZASC_RW" "Mask,Pass"
|
|
group.long 0x10A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_DMC,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL , MUX select" "ACLK_DMCD,ACLK_DMCP,ACLK_ACP,PCLK_ACP,SCLK_DMC,SCLK_DPHY,MPLL_FOUT/2,SCLK_PWI,Reserved,SCLK_C2C,ACLK_C2C,?..."
|
|
width 25.
|
|
rgroup.long 0x10A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_DMC_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
tree.end
|
|
width 14.
|
|
tree "DCG and DVC maps"
|
|
group.long 0x11000++0x0B
|
|
line.long 0x00 "DCGIDX_MAP0,DCG index map 0"
|
|
hexmask.long 0x00 0.--31. 1. " DCGIDX_MAP0 ,IEC configuration for DCG index map[31:0]"
|
|
line.long 0x04 "DCGIDX_MAP1,DCG index map 1"
|
|
hexmask.long 0x04 0.--31. 1. " DCGIDX_MAP1 ,IEC configuration for DCG index map[63:32]"
|
|
line.long 0x08 "DCGIDX_MAP2,DCG index map 2"
|
|
hexmask.long 0x08 0.--31. 1. " DCGIDX_MAP2 ,IEC configuration for DCG index map[95:64]"
|
|
group.long 0x11020++0x07
|
|
line.long 0x00 "DCGPERF_MAP0,DCG performance map 0"
|
|
hexmask.long 0x00 0.--31. 1. " DCGPERF_MAP0 ,DCG performance map[31:0]"
|
|
line.long 0x04 "DCGPERF_MAP1,DCG performance map 1"
|
|
hexmask.long 0x04 0.--31. 1. " DCGPERF_MAP1 ,DCG performance map[63:32]"
|
|
group.long 0x11040++0x03
|
|
line.long 0x00 "DVCIDX_MAP,DVC index map"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " DCGPERF_MAP0 ,IEC configuration for DVC index map[23:0]"
|
|
tree.end
|
|
width 18.
|
|
tree "Frequence & PLL Control"
|
|
group.long 0x11060++0x07
|
|
line.long 0x00 "FREQ_CPU,Maximum frequence of CPU"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " FREQ_CPU ,Maximum frequency of CPU in KHz"
|
|
line.long 0x04 "FREQ_DPM,Frequency of DPM accumulators"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " FREQ_DPM ,Maximum frequency of DPM accumulators"
|
|
group.long 0x11080++0x07
|
|
line.long 0x00 "DVSEMCLK_EN,DVS emulation clock enable"
|
|
bitfld.long 0x00 0. " DVSEMCLK_EN ,DVS emulation clock enable" "Disabled,Enabled"
|
|
line.long 0x04 "MAXPERF,MAX performance enable"
|
|
bitfld.long 0x04 0. " MAXPERF_EN ,MAX performance enable" "Disabled,Enabled"
|
|
group.long 0x11090++0x0B
|
|
line.long 0x00 "DMC_FREQ_CTRL,DMC frequency control register"
|
|
bitfld.long 0x00 12.--14. " DMC_RATIO ,DIVDMC clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " DPHY_RATIO ,DIVDPHY clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "DMC_PAUSE_CTRL,Pause function of DREX2 for DVFS"
|
|
rbitfld.long 0x04 16.--18. " STATE ,Status for debugging" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0. " DMC_PAUSE_ENABLE ,Enable pause function" "Disabled,Enabled"
|
|
line.long 0x08 "DDRPHY_LOCK_CTRL,DDRPHY DLL lock control register"
|
|
bitfld.long 0x08 31. " USE_CTRL_LOCKED ,Ctrl_locked signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " CTRL_START_ENABLE ,Clearing of ctrl_start signal" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " CTRL_RESYNC_ENABLE ,Ctrl_resync pulse generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " CTRL_RESYNC_MASK ,Ctrl_resynce mask" "0,1"
|
|
rbitfld.long 0x08 16.--17. " CURR_STATE ,Current status for debugging" "0,1,2,3"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DUR_LOCK_WAIT ,Duration for DLL lock wait of DDR_PHY"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " DUR_CTRL_ST_CLR ,Duration for clearing ctrl_start signal"
|
|
rgroup.long 0x1109C++0x03
|
|
line.long 0x00 "C2C_STATE,Current state of C2C SEC FSM"
|
|
bitfld.long 0x00 0.--2. " CURR_STATE ,Current state of C2C SEC FSM" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14000++0x03
|
|
line.long 0x00 "APLL_LOCK,Control PLL locking period for APLL"
|
|
hexmask.long.word 0x00 0.--15. 1. " PLL_LOCKTIME ,Required period to generate a stable clock output"
|
|
group.long 0x14100++0x07
|
|
line.long 0x00 "APPL_CON0,Control PLL output frequency for APLL"
|
|
bitfld.long 0x00 31. " ENABLE ,PLL enable control" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " LOCKED ,PLL locking indication" "Unlocked,Locked"
|
|
bitfld.long 0x00 27. " FSEL ,Monitoring frequency select pin" "FREF,FVCO"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MDIV ,PLL M divide value"
|
|
hexmask.long.byte 0x00 8.--13. 1. " PDIV ,PLL P divide value"
|
|
hexmask.long.byte 0x00 0.--2. 1. " SDIV ,PLL S divide value"
|
|
line.long 0x04 "APLL_CON1,Control PLL AFC"
|
|
bitfld.long 0x04 24. " RESV1 ,Status of Linear-Region Detector" "0,1"
|
|
bitfld.long 0x04 23. " RESV0 ,VCO range boost-up" "0,1"
|
|
bitfld.long 0x04 22. " BYPASS ,Bypass mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " DCC_ENB ,DCC enable" "Enabled,Disabled"
|
|
bitfld.long 0x04 20. " AFC_ENB ,AFC enable" "Enabled,Disabled"
|
|
bitfld.long 0x04 16. " FEED_EN ,FEED_OUT signal enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " LOCK_CON_OUT ,Lock detector settings for the output margin" "0,1,2,3"
|
|
bitfld.long 0x04 12.--13. " LOCK_CON_IN ,Lock detector settings for the input margin" "0,1,2,3"
|
|
bitfld.long 0x04 8.--11. " LOCK_CON_DLY ,Lock detector settings for the detection resolution" "0,1,2,3,4,5,6,7,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--4. 1. " AFC ,AFC_Value"
|
|
tree.end
|
|
width 19.
|
|
tree "CPU CMU Control"
|
|
group.long 0x14200++0x03
|
|
line.long 0x00 "CLK_SRC_CPU,Clock source for CMU_CPU"
|
|
bitfld.long 0x00 24. " MUX_MPLL_USER_SEL_C ,Control MUXMPLL" "FINPLL,FOUTMPLL"
|
|
bitfld.long 0x00 20. " MUX_HPM_SEL ,Control MUXHPM" "MOUTAPLL,SCLKMPLL_USER_T"
|
|
bitfld.long 0x00 16. " MUX_CORE_SEL ,Control MUXCORE" "MOUTAPLL,SCLKMPLL_USER_T"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MUX_APLL_SEL ,Control MUXAPLL" "FINPLL,MOUTAPLLFOUT"
|
|
rgroup.long 0x14400++0x03
|
|
line.long 0x00 "CLK_MUX_STAT_CPU,Clock MUX status for CMU_CPU"
|
|
bitfld.long 0x00 24.--26. " MPLL_USER_SEL_C ,Selection signal status of MUXMPLL" "Reserved,FINMPLL,FOUTMPLL,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 20.--22. " HPM_SEL ,Selection signal status of MUXHPM" "Reserved,MOUTAPPL,SCLKMPLL_USER_T,Reserved,On changing,On changing,On changing,On changing"
|
|
bitfld.long 0x00 16.--18. " CORE_SEL ,Selection signal status of MUXCORE" "Reserved,MOUTAPPL,SCLKMPLL_USER_T,Reserved,On changing,On changing,On changing,On changing"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " APLL_SEL ,Selection signal status of MUXAPLL" "Reserved,FINPLL,MOUTAPLLFOUT,Reserved,On changing,On changing,On changing,On changing"
|
|
group.long 0x14500++0x07
|
|
line.long 0x00 "CLK_DIV_CPU0,Clock divider ratio for CMU_CPU0"
|
|
bitfld.long 0x00 28.--30. " CORE2_RATIO ,DIVCORE2 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " APLL_RATIO ,DIVAPLL clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " PCLK_DBG_RATIO ,DIVPCLK_DBG clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ATB_RATIO ,DIVATB clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " PERIPH_RATIO ,DIVPERIPH clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " COREM1_RATIO ,DIVCOREM1 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " COREM0_RATIO ,DIVCOREM0 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " CORE_RATIO ,DIVCORE clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CLK_DIV_CPU1,Clock divider ratio for CMU_CPU1"
|
|
sif (cpu()!="Exynos4212")
|
|
bitfld.long 0x04 8.--10. " CORES_RATIO ,DIVCORES clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
bitfld.long 0x04 4.--6. " HPM_RATIO ,DIVHPM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " COPY_RATIO ,DIVCOPY clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x14600++0x07
|
|
line.long 0x00 "CLK_DIV_STAT_CPU0,Clock divider status for CMU_CPU"
|
|
bitfld.long 0x00 28. " DIV_CORE2 ,DIVCORE2 status" "Stable,Changing"
|
|
bitfld.long 0x00 24. " DIV_APLL ,DIVAPLL status" "Stable,Changing"
|
|
bitfld.long 0x00 20. " DIV_PCLK_DBG ,DIVPCLK_DBG status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DIV_ATB ,DIVATB status" "Stable,Changing"
|
|
bitfld.long 0x00 12. " DIV_PERIPH ,DIVPERIPH status" "Stable,Changing"
|
|
bitfld.long 0x00 8. " DIV_COREM1 ,DIVCOREM1 status" "Stable,Changing"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DIV_COREM0 ,DIVCOREM0 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_CORE ,DIVCORE status" "Stable,Changing"
|
|
line.long 0x04 "CLK_DIV_STAT_CPU1,Clock divider status for CMU_CPU"
|
|
sif (cpu()!="Exynos4212")
|
|
bitfld.long 0x04 8. " DIV_CORES ,DIVCORES status" "Stable,Changing"
|
|
endif
|
|
bitfld.long 0x04 4. " DIV_HPM ,DIVHPM status" "Stable,Changing"
|
|
bitfld.long 0x04 0. " DIV_COPY ,DIVCOPY status" "Stable,Changing"
|
|
group.long 0x14900++0x03
|
|
line.long 0x00 "CLK_GATE_IP_CPU,IP clock gating for CMU_CPU control"
|
|
bitfld.long 0x00 1. " CLK_CSSYS ,Gating all clocks for CoreSight and SecureJTAG" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_HPM ,Gating all clocks for HPM" "Mask,Pass"
|
|
group.long 0x1A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CPU,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,Enable CLKOUT" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ," "APLL_FOUT/2,Reserved,Reserved,Reserved,ARMCLK/2,ACLK_COREM0,ACLK_COREM1,ACLK_CORES,ATCLK,PERIPHCLK,PCLK_DBG,SCLK_HPM,?..."
|
|
textline ""
|
|
width 25.
|
|
rgroup.long 0x1A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_CPU_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
group.long 0x15000++0x07
|
|
line.long 0x00 "ARMCLK_STOPCTRL,ARM clock stop control register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " L2_PRE_WAIT_CNT ,Clock freeze cycle before CLAMP_L2_0/1 rising transition"
|
|
hexmask.long.byte 0x00 16.--23. 1. " L2_POST_WAIT_CNT ,Clock freeze cycle after L2RET1N_0/1 rising transition"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRE_WAIT_CNT ,Clock freeze cycle before ARM clamp or reset signal transition"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " POST_WAIT_CNT ,Clock freeze cycle after ARM clamp or resent signal transition"
|
|
line.long 0x04 "ATCLK_STOPCTRL,ATCLK stop control register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PRE_WAIT_CNT ,Clock freeze cycle before signal transition"
|
|
hexmask.long.byte 0x04 0.--7. 1. " POST_WAIT_CNT ,Clock freeze cycle after signal transition"
|
|
tree.end
|
|
width 11.
|
|
tree "Power control"
|
|
group.long 0x15020++0x07
|
|
line.long 0x00 "PWR_CTRL,Power control register"
|
|
bitfld.long 0x00 28.--30. " CORE2_RATIO ,DIVCORE2 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20. " CSCLK_AUTO_ENB_IN_DEBUG ,Force CoreSight clocks to toggle" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " CORE_RATIO ,DIVCORE clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 10. " F4D_CORESIGHT_EN ,Gating F4D Coresight clocks both ARM cores in IDLE mode" "Mask,Pass"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 9. " DIVCORE2_DOWN_ENB ,ARMCLK down feature for DIVCORE2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DIVCORE_DOWN_ENB ,ARMCLK down feature for DIVCORE" "Disabled,Enabled"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 7. " USE_STANDBYWFE_ARM_CORE3 ,Use ARM CORE3 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USE_STANDBYWFE_ARM_CORE2 ,Use ARM CORE2 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " USE_STANDBYWFE_ARM_CORE1 ,Use ARM CORE1 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " USE_STANDBYWFE_ARM_CORE0 ,Use ARM CORE0 STANDBYWFE to change ARMCLK frequency" "Disabled,Enabled"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 3. " USE_STANDBYWFI_ARM_CORE3 ,Use ARM CORE3 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " USE_STANDBYWFI_ARM_CORE2 ,Use ARM CORE2 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " USE_STANDBYWFI_ARM_CORE1 ,Use ARM CORE1 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " USE_STANDBYWFI_ARM_CORE0 ,Use ARM CORE0 STANDBYWFI to change ARMCLK frequency" "Disabled,Enabled"
|
|
line.long 0x04 "PWR_CTRL2,Power control register 2"
|
|
bitfld.long 0x04 25. " DIVCORE2_UP_ENB ,ARMCLK Up feature for DIVCORE2" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " DIVCORE_UP_ENB ,ARMCLK Up feature for DIVCORE" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DUR_STANDBY2 ,Duration to change normal divider value to middle divider value"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " DUR_STANDBY1 ,Duration to change middle divider value from the divider value in ARM idle state"
|
|
bitfld.long 0x04 4.--6. " UP_CORE2_RATIO ,DIVCORE2 clock divider ratio when ARM0/1 are not in a wait state" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " UP_CORE_RATIO ,DIVCORE clock divider ratio when ARM0/1 are not in a wait state" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
width 11.
|
|
tree "L2, CPU & PTM Status"
|
|
rgroup.long 0x15400++0x03
|
|
line.long 0x00 "L2_STATUS,L2 cache status register"
|
|
bitfld.long 0x00 28. " L2IDLE ,Indicates L2 cache controller is in idle state" "No,Yes"
|
|
bitfld.long 0x00 24. " L2_CLKSTOPPED ,Indicates L2 cache controller is in standby-mode" "No,Yes"
|
|
bitfld.long 0x00 20.--22. " TAGSETUPPLAT ,Setup latency for tag RAM" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TAGREADLAT ,Read access latency for tag RAM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " TAGWRITELAT ,Write access latency for tag RAM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " DATASETUPLAT ,Setup latency for data RAM" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " DATAREADLAT ,Read access latency for data RAM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " DATAWRITELAT ,Write access latency for data RAM" "0,1,2,3,4,5,6,7"
|
|
sif (cpu()=="Exynos4412")
|
|
rgroup.long 0x15410++0x03
|
|
line.long 0x00 "CPU_STATUS,Cortex-A9 processor status register"
|
|
bitfld.long 0x00 11. " PMUPRIV[3] ,Status of the Cortex-A9 processor[3]" "User mode,Privileged mode"
|
|
bitfld.long 0x00 10. " PMUPRIV[2] ,Status of the Cortex-A9 processor[2]" "User mode,Privileged mode"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PMUPRIV[1] ,Status of the Cortex-A9 processor[1]" "User mode,Privileged mode"
|
|
bitfld.long 0x00 8. " PMUPRIV[0] ,Status of the Cortex-A9 processor[0]" "User mode,Privileged mode"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PMUSECURE[3] ,Security status of the Cortex-A9 processor[3]" "Non-secured state,Secured state"
|
|
bitfld.long 0x00 6. " PMUSECURE[2] ,Security status of the Cortex-A9 processor[2]" "Non-secured state,Secured state"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PMUSECURE[1] ,Security status of the Cortex-A9 processor[1]" "Non-secured state,Secured state"
|
|
bitfld.long 0x00 4. " PMUSECURE[0] ,Security status of the Cortex-A9 processor[0]" "Non-secured state,Secured state"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SMPNAMP[3] ,Signals mode for each Cortex-A9 processor[3]" "Asymmetric,Symmetric"
|
|
bitfld.long 0x00 2. " SMPNAMP[2] ,Signals mode for each Cortex-A9 processor[2]" "Asymmetric,Symmetric"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SMPNAMP[1] ,Signals mode for each Cortex-A9 processor[1]" "Asymmetric,Symmetric"
|
|
bitfld.long 0x00 0. " SMPNAMP[0] ,Signals mode for each Cortex-A9 processor[0]" "Asymmetric,Symmetric"
|
|
else
|
|
rgroup.long 0x15410++0x03
|
|
line.long 0x00 "CPU_STATUS,Cortex-A9 processor status register"
|
|
bitfld.long 0x00 5. " PMUPRIV[1] ,Status of the Cortex-A9 processor[1]" "User mode,Privileged mode"
|
|
bitfld.long 0x00 4. " PMUPRIV[0] ,Status of the Cortex-A9 processor[0]" "User mode,Privileged mode"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PMUSECURE[1] ,Security status of the Cortex-A9 processor[1]" "Non-secured state,Secured state"
|
|
bitfld.long 0x00 2. " PMUSECURE[0] ,Security status of the Cortex-A9 processor[0]" "Non-secured state,Secured state"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SMPNAMP[1] ,Signals mode for each Cortex-A9 processor[1]" "Asymmetric,Symmetric"
|
|
bitfld.long 0x00 0. " SMPNAMP[0] ,Signals mode for each Cortex-A9 processor[0]" "Asymmetric,Symmetric"
|
|
endif
|
|
rgroup.long 0x15420++0x03
|
|
line.long 0x00 "PTM_STATUS,Program trace macrocell status register"
|
|
bitfld.long 0x00 3. " PTMPWRUP0 ,PTM for CPU0" "Inactive,Active"
|
|
bitfld.long 0x00 2. " PTMPWRUP1 ,PTM for CPU1" "Inactive,Active"
|
|
bitfld.long 0x00 1. " PTMIDLEnACK0 ,PTM for CPU0 idle state indicator" "Normal,Idle"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PTMIDLEnACK1 ,PTM for CPU1 idle state indicator" "Normal,Idle"
|
|
tree.end
|
|
width 19.
|
|
tree "ISP clock"
|
|
group.long 0x18300++0x07
|
|
line.long 0x00 "CLK_DIV_ISP0,Clock divider ratio for CMU_ISP0"
|
|
bitfld.long 0x00 4.--6. " ISPDIV1_RATIO ,ISDIV1 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " ISPDIV0_RATIO ,ISDIV0 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "CLK_DIV_ISP1,Clock divider ratio for MPWM in CMU_ISP1"
|
|
bitfld.long 0x04 8.--10. " MCUISPDIV1_RATIO ,MCUISPDIV1 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 4.--6. " MCUISPDIV0_RATIO ,MCUISPDIV0 clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " MPWMDIV_RATIO ,MPWM clock divider ratio" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x18400++0x07
|
|
line.long 0x00 "CLK_DIV_STAT_ISP0,Clock divider status for CMU_ISP0"
|
|
bitfld.long 0x00 4. " DIV_ISPDIV1 ,ISPDIV1 status" "Stable,Changing"
|
|
bitfld.long 0x00 0. " DIV_ISPDIV0 ,ISPDIV0 status" "Stable,Changing"
|
|
line.long 0x04 "CLK_DIV_ISP1,Clock divider status for MPWM in CMU_ISP1"
|
|
bitfld.long 0x04 8. " DIV_MCUISPDIV1 ,DIVMCUISP1 status" "Stable,Changing"
|
|
bitfld.long 0x04 4. " DIV_MCUISPDIV0 ,DIVMCUISP0 status" "Stable,Changing"
|
|
bitfld.long 0x04 0. " DIV_MPWMDIV ,DIVMPWM status" "Stable,Changing"
|
|
group.long 0x18800++0x07
|
|
line.long 0x00 "CLK_GATE_IP_ISP0,IP clock gating for ISP_BLK register 0"
|
|
bitfld.long 0x00 31. " CLK_UART_ISP ,Gating all clocks for UART_ISP" "Mask,Pass"
|
|
bitfld.long 0x00 30. " CLK_WDT_ISP ,Gating all clocks for WDT_ISP" "Mask,Pass"
|
|
sif (cpu()=="Exynos4412")
|
|
bitfld.long 0x00 28. " CLK_PWM_ISP ,Gating all clocks for PWM_ISP" "Mask,Pass"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 27. " CLK_MTCADC_ISP ,Gating all clocks for MTCADC_ISP" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 26. " CLK_I2C1_ISP ,Gating all clocks for I2C1_ISP" "Mask,Pass"
|
|
bitfld.long 0x00 25. " CLK_I2C0_ISP ,Gating all clocks for 2C0_ISP" "Mask,Pass"
|
|
bitfld.long 0x00 24. " CLK_MPWM_ISP ,Gating all clocks for MPWM_ISP" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CLK_MCUCTL_ISP ,Gating all clocks for MCUCTL_ISP" "Mask,Pass"
|
|
bitfld.long 0x00 21. " CLK_PPMUISPX ,Gating all clocks for PPMUISPX" "Mask,Pass"
|
|
bitfld.long 0x00 20. " CLK_PPMUISPMX ,Gating all clocks for PPMUISPMX" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLK_SMMU_LITE1 ,Gating all clocks for SMMU_LITE1" "Mask,Pass"
|
|
bitfld.long 0x00 11. " CLK_SMMU_LITE0 ,Gating all clocks for SMMU_LITE0" "Mask,Pass"
|
|
bitfld.long 0x00 10. " CLK_SMMU_FD ,Gating all clocks for SMMU_FD" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLK_SMMU_DRC ,Gating all clocks for SMMU_DRC" "Mask,Pass"
|
|
bitfld.long 0x00 8. " CLK_SMMU_ISP ,Gating all clocks for SMMU_ISP" "Mask,Pass"
|
|
bitfld.long 0x00 7. " CLK_GICISP ,Gating all clocks for GICISP" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLK_MCUISP ,Gating all clocks for MCUISP" "Mask,Pass"
|
|
bitfld.long 0x00 4. " CLK_LITE1 ,Gating all clocks for LITE1" "Mask,Pass"
|
|
bitfld.long 0x00 3. " CLK_LITE0 ,Gating all clocks for LITE0" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLK_FD ,Gating all clocks for FD" "Mask,Pass"
|
|
bitfld.long 0x00 1. " CLK_DRC ,Gating all clocks for DRC" "Mask,Pass"
|
|
bitfld.long 0x00 0. " CLK_ISP ,Gating all clocks for ISP" "Mask,Pass"
|
|
line.long 0x04 "CLK_GATE_IP_ISP1,IP clock gating for ISP_BLK register 1"
|
|
bitfld.long 0x04 13. " CLK_SPI1_ISP ,Gating all clocks for SPI1_ISP" "Mask,Pass"
|
|
bitfld.long 0x04 12. " CLK_SPI0_ISP ,Gating all clocks for SPI0_ISP" "Mask,Pass"
|
|
bitfld.long 0x04 4. " CLK_SMMU_ISPCX ,Gating all clocks for CLK_SMMU_ISPCX" "Mask,Pass"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CLK_ASYNCAXIM ,Gating all clocks for CLK_ASYNCAXIM" "Mask,Pass"
|
|
textline " "
|
|
width 25.
|
|
group.long 0x18A00++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ISP,CLKOUT control register"
|
|
bitfld.long 0x00 16. " ENB_CLKOUT ,CLKOUT enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " DIV_RATIO ,Divide ratio"
|
|
bitfld.long 0x00 0.--4. " MUX_SEL ,MUX selection" "ACLK_MCUISP,PCLKDBG_MCUISP,ACLK_DIV0,ACLK_DIV1,SCLK_MPWM_ISP,?..."
|
|
rgroup.long 0x18A04++0x03
|
|
line.long 0x00 "CLKOUT_CMU_ISP_DIV_STAT,Clock divider status for CLKOUT"
|
|
bitfld.long 0x00 0. " DIV_STAT ,DIVCLKOUT status" "Stable,Changing"
|
|
group.long 0x18B00++0x0F
|
|
line.long 0x00 "CMU_ISP_SPARE0,CMU_ISP spare register 0"
|
|
line.long 0x04 "CMU_ISP_SPARE1,CMU_ISP spare register 1"
|
|
line.long 0x08 "CMU_ISP_SPARE2,CMU_ISP spare register 2"
|
|
line.long 0x0C "CMU_ISP_SPARE3,CMU_ISP spare register 3"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Interrupt Controller"
|
|
base ad:0x10480000
|
|
width 20.
|
|
tree "CPU Interface"
|
|
; --------------------------------------------------------------------------------
|
|
; CPU0
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0x00++0x03 "Interrupt Controller Physical CPU0 Interface"
|
|
line.long 0x00 "ICCICR_CPU0,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "ICCPMR_CPU0,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ICCBPR_CPU0,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "ICCIAR_CPU0,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "ICCEOIR_CPU0,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "ICCRPR_CPU0,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "ICCHPIR_CPU0,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ICCABPR_CPU0,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "INTEG_EN_C_CPU0,Integration Test Enable Register"
|
|
bitfld.long 0x00 0. " INTEG_EN ,Enables the integration test logic" "Disabled,Enabled"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "INTERRUPT_OUT_CPU0,Interrupt Output Register"
|
|
bitfld.long 0x00 1. " SET_NFIQ_C ,Enables a processor to read or set the status of NFIQ_C" "LOW,HIGH"
|
|
bitfld.long 0x00 0. " SET_NIRQ_C ,Enables a processor to read or set the status of NIRQ_C" "LOW,HIGH"
|
|
; --------------------------------------------------------------------------------
|
|
; ICCIIDR
|
|
; --------------------------------------------------------------------------------
|
|
rgroup.long 0xFC++0x03 "CPU Interface Identification"
|
|
line.long 0x00 "ICCIIDR,CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODUCTID ,An IMPLEMENTATION DEFINED product identifier"
|
|
bitfld.long 0x00 16.--19. " ARCHIT_VER ,GIC architecture version" "Reserved,GICv1,GICv2,?..."
|
|
hexmask.long.byte 0x00 12.--15. 1. " REV ,An IMPLEMENTATION DEFINED revision number for the CPU interface"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,Contains the JEP106 code of the company"
|
|
; --------------------------------------------------------------------------------
|
|
; CPU1
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0x4000++0x03 "Interrupt Controller Physical CPU1 Interface"
|
|
line.long 0x00 "ICCICR_CPU1,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled"
|
|
group.long 0x4004++0x03
|
|
line.long 0x00 "ICCPMR_CPU1,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0x4008++0x03
|
|
line.long 0x00 "ICCBPR_CPU1,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x400C++0x03
|
|
hide.long 0x00 "ICCIAR_CPU1,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x4010++0x03
|
|
line.long 0x00 "ICCEOIR_CPU1,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access"
|
|
rgroup.long 0x4014++0x03
|
|
line.long 0x00 "ICCRPR_CPU1,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0x4018++0x03
|
|
line.long 0x00 "ICCHPIR_CPU1,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x401C++0x03
|
|
line.long 0x00 "ICCABPR_CPU1,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long 0x4040++0x03
|
|
line.long 0x00 "INTEG_EN_C_CPU1,Integration Test Enable Register"
|
|
bitfld.long 0x00 0. " INTEG_EN ,Enables the integration test logic" "Disabled,Enabled"
|
|
group.long 0x4044++0x03
|
|
line.long 0x00 "INTERRUPT_OUT_CPU1,Interrupt Output Register"
|
|
bitfld.long 0x00 1. " SET_NFIQ_C ,Enables a processor to read or set the status of NFIQ_C" "LOW,HIGH"
|
|
bitfld.long 0x00 0. " SET_NIRQ_C ,Enables a processor to read or set the status of NIRQ_C" "LOW,HIGH"
|
|
; --------------------------------------------------------------------------------
|
|
; CPU2
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0x8000++0x03 "Interrupt Controller Physical CPU2 Interface"
|
|
line.long 0x00 "ICCICR_CPU2,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled"
|
|
group.long 0x8004++0x03
|
|
line.long 0x00 "ICCPMR_CPU2,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0x8008++0x03
|
|
line.long 0x00 "ICCBPR_CPU2,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0x800C++0x03
|
|
hide.long 0x00 "ICCIAR_CPU2,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x8010++0x03
|
|
line.long 0x00 "ICCEOIR_CPU2,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access"
|
|
rgroup.long 0x8014++0x03
|
|
line.long 0x00 "ICCRPR_CPU2,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0x8018++0x03
|
|
line.long 0x00 "ICCHPIR_CPU2,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x801C++0x03
|
|
line.long 0x00 "ICCABPR_CPU2,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8040++0x03
|
|
line.long 0x00 "INTEG_EN_C_CPU2,Integration Test Enable Register"
|
|
bitfld.long 0x00 0. " INTEG_EN ,Enables the integration test logic" "Disabled,Enabled"
|
|
group.long 0x8044++0x03
|
|
line.long 0x00 "INTERRUPT_OUT_CPU2,Interrupt Output Register"
|
|
bitfld.long 0x00 1. " SET_NFIQ_C ,Enables a processor to read or set the status of NFIQ_C" "LOW,HIGH"
|
|
bitfld.long 0x00 0. " SET_NIRQ_C ,Enables a processor to read or set the status of NIRQ_C" "LOW,HIGH"
|
|
; --------------------------------------------------------------------------------
|
|
; CPU3
|
|
; --------------------------------------------------------------------------------
|
|
group.long 0xC000++0x03 "Interrupt Controller Physical CPU3 Interface"
|
|
line.long 0x00 "ICCICR_CPU3,CPU Interface Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Enable for signalling interrupts" "Disabled,Enabled"
|
|
group.long 0xC004++0x03
|
|
line.long 0x00 "ICCPMR_CPU3,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
group.long 0xC008++0x03
|
|
line.long 0x00 "ICCBPR_CPU3,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
hgroup.long 0xC00C++0x03
|
|
hide.long 0x00 "ICCIAR_CPU3,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0xC010++0x03
|
|
line.long 0x00 "ICCEOIR_CPU3,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access"
|
|
rgroup.long 0xC014++0x03
|
|
line.long 0x00 "ICCRPR_CPU3,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
|
|
rgroup.long 0xC018++0x03
|
|
line.long 0x00 "ICCHPIR_CPU3,Highest Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,CPU ID" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt"
|
|
group.long 0xC01C++0x03
|
|
line.long 0x00 "ICCABPR_CPU3,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BP ,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC040++0x03
|
|
line.long 0x00 "INTEG_EN_C_CPU3,Integration Test Enable Register"
|
|
bitfld.long 0x00 0. " INTEG_EN ,Enables the integration test logic" "Disabled,Enabled"
|
|
group.long 0xC044++0x03
|
|
line.long 0x00 "INTERRUPT_OUT_CPU3,Interrupt Output Register"
|
|
bitfld.long 0x00 1. " SET_NFIQ_C ,Enables a processor to read or set the status of NFIQ_C" "LOW,HIGH"
|
|
bitfld.long 0x00 0. " SET_NIRQ_C ,Enables a processor to read or set the status of NIRQ_C" "LOW,HIGH"
|
|
; --------------------------------------------------------------------------------
|
|
tree.end
|
|
;section
|
|
width 9.
|
|
base ad:0x10490000
|
|
tree "Distributor"
|
|
if (((d.l(ad:0x10490000+0x04))&0x400)==0x000)
|
|
group.long 0x00++0x03 "Distributor Interrupt Controller"
|
|
line.long 0x00 "ICDDCR,Interrupt Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for pending interrupts from the Distributor to the CPU" "Disabled,Enabled"
|
|
elif (((d.l(ad:0x10490000+0x04))&0x400)==0x400)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ICDDCR,Interrupt Distributor Control Register"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 , Global enable for forwarding pending Group 1 interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global enable for forwarding pending Gorup 0 interrupts" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICDICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Number of supported Lockable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented"
|
|
bitfld.long 0x00 5.--7. " CPUNO ,Number of supported CPU interfaces" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " ITLINENO ,Number of provided INTIDs" "32,64,96,128,160,192,224,256,288,320,352,384,416,448,480,512,544,576,608,640,672,704,736,768,800,832,864,896,928,960,992,1024"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "ICDIIDR,Distributor Implementer Identification Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRODUCTID ,An IMPEMENTATION DEFINED product identifier"
|
|
hexmask.long.byte 0x00 16.--19. 1. " VARIANT ,An IMPEMENTATION DEFINED variant number"
|
|
hexmask.long.byte 0x00 12.--15. 1. " REVISION ,An IMPEMENTATION DEFINED revision number"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " IMPLEMENTER ,JEP106 code of the company that implemented GIC Distributor"
|
|
tree "CPU0"
|
|
width 15.
|
|
tree "Interrupt Security"
|
|
group.long 0x80++0x13
|
|
line.long 0x00 "ICDISR0_CPU0,Interrupt security register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SS_15 ,Security status for PPI(15)" "Not secured,Secured"
|
|
bitfld.long 0x00 30. " PPI_SS_14 ,Security status for PPI(14)" "Not secured,Secured"
|
|
bitfld.long 0x00 29. " PPI_SS_13 ,Security status for PPI(13)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SS_12 ,Security status for PPI(12)" "Not secured,Secured"
|
|
bitfld.long 0x00 27. " PPI_SS_11 ,Security status for PPI(11)" "Not secured,Secured"
|
|
bitfld.long 0x00 26. " PPI_SS_10 ,Security status for PPI(10)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SS_9 ,Security status for PPI(9)" "Not secured,Secured"
|
|
bitfld.long 0x00 24. " PPI_SS_8 ,Security status for PPI(8)" "Not secured,Secured"
|
|
bitfld.long 0x00 23. " PPI_SS_7 ,Security status for PPI(7)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SS_6 ,Security status for PPI(6)" "Not secured,Secured"
|
|
bitfld.long 0x00 21. " PPI_SS_5 ,Security status for PPI(5)" "Not secured,Secured"
|
|
bitfld.long 0x00 20. " PPI_SS_4 ,Security status for PPI(4)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SS_3 ,Security status for PPI(3)" "Not secured,Secured"
|
|
bitfld.long 0x00 18. " PPI_SS_2 ,Security status for PPI(2)" "Not secured,Secured"
|
|
bitfld.long 0x00 17. " PPI_SS_1 ,Security status for PPI(1)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SS_0 ,Security status for PPI(0)" "Not secured,Secured"
|
|
bitfld.long 0x00 15. " SGI_SS_15 ,Security status for SGI(15)" "Not secured,Secured"
|
|
bitfld.long 0x00 14. " SGI_SS_14 ,Security status for SGI(14)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_SS_13 ,Security status for SGI(13)" "Not secured,Secured"
|
|
bitfld.long 0x00 12. " SGI_SS_12 ,Security status for SGI(12)" "Not secured,Secured"
|
|
bitfld.long 0x00 11. " SGI_SS_11 ,Security status for SGI(11)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_SS_10 ,Security status for SGI(10)" "Not secured,Secured"
|
|
bitfld.long 0x00 9. " SGI_SS_9 ,Security status for SGI(9)" "Not secured,Secured"
|
|
bitfld.long 0x00 8. " SGI_SS_8 ,Security status for SGI(8)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_SS_7 ,Security status for SGI(7)" "Not secured,Secured"
|
|
bitfld.long 0x00 6. " SGI_SS_6 ,Security status for SGI(6)" "Not secured,Secured"
|
|
bitfld.long 0x00 5. " SGI_SS_5 ,Security status for SGI(5)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_SS_4 ,Security status for SGI(4)" "Not secured,Secured"
|
|
bitfld.long 0x00 3. " SGI_SS_3 ,Security status for SGI(3)" "Not secured,Secured"
|
|
bitfld.long 0x00 2. " SGI_SS_2 ,Security status for SGI(2)" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_SS_1 ,Security status for SGI(1)" "Not secured,Secured"
|
|
bitfld.long 0x00 0. " SGI_SS_0 ,Security status for SGI(0)" "Not secured,Secured"
|
|
line.long 0x04 "ICDISR1,Interrupt security registers SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_SS_31 ,Security Status Bit 31" "Not secured,Secured"
|
|
bitfld.long 0x04 30. " SPI_SS_30 ,Security Status Bit 30" "Not secured,Secured"
|
|
bitfld.long 0x04 29. " SPI_SS_29 ,Security Status Bit 29" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_SS_28 ,Security Status Bit 28" "Not secured,Secured"
|
|
bitfld.long 0x04 27. " SPI_SS_27 ,Security Status Bit 27" "Not secured,Secured"
|
|
bitfld.long 0x04 26. " SPI_SS_26 ,Security Status Bit 26" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_SS_25 ,Security Status Bit 25" "Not secured,Secured"
|
|
bitfld.long 0x04 24. " SPI_SS_24 ,Security Status Bit 24" "Not secured,Secured"
|
|
bitfld.long 0x04 23. " SPI_SS_23 ,Security Status Bit 23" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_SS_22 ,Security Status Bit 22" "Not secured,Secured"
|
|
bitfld.long 0x04 21. " SPI_SS_21 ,Security Status Bit 21" "Not secured,Secured"
|
|
bitfld.long 0x04 20. " SPI_SS_20 ,Security Status Bit 20" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_SS_19 ,Security Status Bit 19" "Not secured,Secured"
|
|
bitfld.long 0x04 18. " SPI_SS_18 ,Security Status Bit 18" "Not secured,Secured"
|
|
bitfld.long 0x04 17. " SPI_SS_17 ,Security Status Bit 17" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_SS_16 ,Security Status Bit 16" "Not secured,Secured"
|
|
bitfld.long 0x04 15. " SPI_SS_15 ,Security Status Bit 15" "Not secured,Secured"
|
|
bitfld.long 0x04 14. " SPI_SS_14 ,Security Status Bit 14" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_SS_13 ,Security Status Bit 13" "Not secured,Secured"
|
|
bitfld.long 0x04 12. " SPI_SS_12 ,Security Status Bit 12" "Not secured,Secured"
|
|
bitfld.long 0x04 11. " SPI_SS_11 ,Security Status Bit 11" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_SS_10 ,Security Status Bit 10" "Not secured,Secured"
|
|
bitfld.long 0x04 9. " SPI_SS_9 ,Security Status Bit 9" "Not secured,Secured"
|
|
bitfld.long 0x04 8. " SPI_SS_8 ,Security Status Bit 8" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_SS_7 ,Security Status Bit 7" "Not secured,Secured"
|
|
bitfld.long 0x04 6. " SPI_SS_6 ,Security Status Bit 6" "Not secured,Secured"
|
|
bitfld.long 0x04 5. " SPI_SS_5 ,Security Status Bit 5" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_SS_4 ,Security Status Bit 4" "Not secured,Secured"
|
|
bitfld.long 0x04 3. " SPI_SS_3 ,Security Status Bit 3" "Not secured,Secured"
|
|
bitfld.long 0x04 2. " SPI_SS_2 ,Security Status Bit 2" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_SS_1 ,Security Status Bit 1" "Not secured,Secured"
|
|
bitfld.long 0x04 0. " SPI_SS_0 ,Security Status Bit 0" "Not secured,Secured"
|
|
line.long 0x08 "ICDISR2,Interrupt security registers SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_SS_63 ,Security Status Bit 63" "Not secured,Secured"
|
|
bitfld.long 0x08 30. " SPI_SS_62 ,Security Status Bit 62" "Not secured,Secured"
|
|
bitfld.long 0x08 29. " SPI_SS_61 ,Security Status Bit 61" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_SS_60 ,Security Status Bit 60" "Not secured,Secured"
|
|
bitfld.long 0x08 27. " SPI_SS_59 ,Security Status Bit 59" "Not secured,Secured"
|
|
bitfld.long 0x08 26. " SPI_SS_58 ,Security Status Bit 58" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_SS_57 ,Security Status Bit 57" "Not secured,Secured"
|
|
bitfld.long 0x08 24. " SPI_SS_56 ,Security Status Bit 56" "Not secured,Secured"
|
|
bitfld.long 0x08 23. " SPI_SS_55 ,Security Status Bit 55" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_SS_54 ,Security Status Bit 54" "Not secured,Secured"
|
|
bitfld.long 0x08 21. " SPI_SS_53 ,Security Status Bit 53" "Not secured,Secured"
|
|
bitfld.long 0x08 20. " SPI_SS_52 ,Security Status Bit 52" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_SS_51 ,Security Status Bit 51" "Not secured,Secured"
|
|
bitfld.long 0x08 18. " SPI_SS_50 ,Security Status Bit 50" "Not secured,Secured"
|
|
bitfld.long 0x08 17. " SPI_SS_49 ,Security Status Bit 49" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_SS_48 ,Security Status Bit 48" "Not secured,Secured"
|
|
bitfld.long 0x08 15. " SPI_SS_47 ,Security Status Bit 47" "Not secured,Secured"
|
|
bitfld.long 0x08 14. " SPI_SS_46 ,Security Status Bit 46" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_SS_45 ,Security Status Bit 45" "Not secured,Secured"
|
|
bitfld.long 0x08 12. " SPI_SS_44 ,Security Status Bit 44" "Not secured,Secured"
|
|
bitfld.long 0x08 11. " SPI_SS_43 ,Security Status Bit 43" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_SS_42 ,Security Status Bit 42" "Not secured,Secured"
|
|
bitfld.long 0x08 9. " SPI_SS_41 ,Security Status Bit 41" "Not secured,Secured"
|
|
bitfld.long 0x08 8. " SPI_SS_40 ,Security Status Bit 40" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_SS_39 ,Security Status Bit 39" "Not secured,Secured"
|
|
bitfld.long 0x08 6. " SPI_SS_38 ,Security Status Bit 38" "Not secured,Secured"
|
|
bitfld.long 0x08 5. " SPI_SS_37 ,Security Status Bit 37" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_SS_36 ,Security Status Bit 36" "Not secured,Secured"
|
|
bitfld.long 0x08 3. " SPI_SS_35 ,Security Status Bit 35" "Not secured,Secured"
|
|
bitfld.long 0x08 2. " SPI_SS_34 ,Security Status Bit 34" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_SS_33 ,Security Status Bit 33" "Not secured,Secured"
|
|
bitfld.long 0x08 0. " SPI_SS_32 ,Security Status Bit 32" "Not secured,Secured"
|
|
line.long 0x0C "ICDISR3,Interrupt security registers SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_SS_95 ,Security Status Bit 95" "Not secured,Secured"
|
|
bitfld.long 0x0C 30. " SPI_SS_94 ,Security Status Bit 94" "Not secured,Secured"
|
|
bitfld.long 0x0C 29. " SPI_SS_93 ,Security Status Bit 93" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_SS_92 ,Security Status Bit 92" "Not secured,Secured"
|
|
bitfld.long 0x0C 27. " SPI_SS_91 ,Security Status Bit 91" "Not secured,Secured"
|
|
bitfld.long 0x0C 26. " SPI_SS_90 ,Security Status Bit 90" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_SS_89 ,Security Status Bit 89" "Not secured,Secured"
|
|
bitfld.long 0x0C 24. " SPI_SS_88 ,Security Status Bit 88" "Not secured,Secured"
|
|
bitfld.long 0x0C 23. " SPI_SS_87 ,Security Status Bit 87" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_SS_86 ,Security Status Bit 86" "Not secured,Secured"
|
|
bitfld.long 0x0C 21. " SPI_SS_85 ,Security Status Bit 85" "Not secured,Secured"
|
|
bitfld.long 0x0C 20. " SPI_SS_84 ,Security Status Bit 84" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_SS_83 ,Security Status Bit 83" "Not secured,Secured"
|
|
bitfld.long 0x0C 18. " SPI_SS_82 ,Security Status Bit 82" "Not secured,Secured"
|
|
bitfld.long 0x0C 17. " SPI_SS_81 ,Security Status Bit 81" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_SS_80 ,Security Status Bit 80" "Not secured,Secured"
|
|
bitfld.long 0x0C 15. " SPI_SS_79 ,Security Status Bit 79" "Not secured,Secured"
|
|
bitfld.long 0x0C 14. " SPI_SS_78 ,Security Status Bit 78" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_SS_77 ,Security Status Bit 77" "Not secured,Secured"
|
|
bitfld.long 0x0C 12. " SPI_SS_76 ,Security Status Bit 76" "Not secured,Secured"
|
|
bitfld.long 0x0C 11. " SPI_SS_75 ,Security Status Bit 75" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_SS_74 ,Security Status Bit 74" "Not secured,Secured"
|
|
bitfld.long 0x0C 9. " SPI_SS_73 ,Security Status Bit 73" "Not secured,Secured"
|
|
bitfld.long 0x0C 8. " SPI_SS_72 ,Security Status Bit 72" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_SS_71 ,Security Status Bit 71" "Not secured,Secured"
|
|
bitfld.long 0x0C 6. " SPI_SS_70 ,Security Status Bit 70" "Not secured,Secured"
|
|
bitfld.long 0x0C 5. " SPI_SS_69 ,Security Status Bit 69" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_SS_68 ,Security Status Bit 68" "Not secured,Secured"
|
|
bitfld.long 0x0C 3. " SPI_SS_67 ,Security Status Bit 67" "Not secured,Secured"
|
|
bitfld.long 0x0C 2. " SPI_SS_66 ,Security Status Bit 66" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_SS_65 ,Security Status Bit 65" "Not secured,Secured"
|
|
bitfld.long 0x0C 0. " SPI_SS_64 ,Security Status Bit 64" "Not secured,Secured"
|
|
line.long 0x10 "ICDISR4,Interrupt security registers SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_SS_127 ,Security Status Bit 127" "Not secured,Secured"
|
|
bitfld.long 0x10 30. " SPI_SS_126 ,Security Status Bit 126" "Not secured,Secured"
|
|
bitfld.long 0x10 29. " SPI_SS_125 ,Security Status Bit 125" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_SS_124 ,Security Status Bit 124" "Not secured,Secured"
|
|
bitfld.long 0x10 27. " SPI_SS_123 ,Security Status Bit 123" "Not secured,Secured"
|
|
bitfld.long 0x10 26. " SPI_SS_122 ,Security Status Bit 122" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_SS_121 ,Security Status Bit 121" "Not secured,Secured"
|
|
bitfld.long 0x10 24. " SPI_SS_120 ,Security Status Bit 120" "Not secured,Secured"
|
|
bitfld.long 0x10 23. " SPI_SS_119 ,Security Status Bit 119" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_SS_118 ,Security Status Bit 118" "Not secured,Secured"
|
|
bitfld.long 0x10 21. " SPI_SS_117 ,Security Status Bit 117" "Not secured,Secured"
|
|
bitfld.long 0x10 20. " SPI_SS_116 ,Security Status Bit 116" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_SS_115 ,Security Status Bit 115" "Not secured,Secured"
|
|
bitfld.long 0x10 18. " SPI_SS_114 ,Security Status Bit 114" "Not secured,Secured"
|
|
bitfld.long 0x10 17. " SPI_SS_113 ,Security Status Bit 113" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_SS_112 ,Security Status Bit 112" "Not secured,Secured"
|
|
bitfld.long 0x10 15. " SPI_SS_111 ,Security Status Bit 111" "Not secured,Secured"
|
|
bitfld.long 0x10 14. " SPI_SS_110 ,Security Status Bit 110" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_SS_109 ,Security Status Bit 109" "Not secured,Secured"
|
|
bitfld.long 0x10 12. " SPI_SS_108 ,Security Status Bit 108" "Not secured,Secured"
|
|
bitfld.long 0x10 11. " SPI_SS_107 ,Security Status Bit 107" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_SS_106 ,Security Status Bit 106" "Not secured,Secured"
|
|
bitfld.long 0x10 9. " SPI_SS_105 ,Security Status Bit 105" "Not secured,Secured"
|
|
bitfld.long 0x10 8. " SPI_SS_104 ,Security Status Bit 104" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_SS_103 ,Security Status Bit 103" "Not secured,Secured"
|
|
bitfld.long 0x10 6. " SPI_SS_102 ,Security Status Bit 102" "Not secured,Secured"
|
|
bitfld.long 0x10 5. " SPI_SS_101 ,Security Status Bit 101" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_SS_100 ,Security Status Bit 100" "Not secured,Secured"
|
|
bitfld.long 0x10 3. " SPI_SS_99 ,Security Status Bit 99" "Not secured,Secured"
|
|
bitfld.long 0x10 2. " SPI_SS_98 ,Security Status Bit 98" "Not secured,Secured"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_SS_97 ,Security Status Bit 97" "Not secured,Secured"
|
|
bitfld.long 0x10 0. " SPI_SS_96 ,Security Status Bit 96" "Not secured,Secured"
|
|
tree.end
|
|
tree "Interrupt Set-Enable"
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "ICDISER0_CPU0,Interrupt set-enable register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SE_15 ,Set-enable for PPI(15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PPI_SE_14 ,Set-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_SE_13 ,Set-enable for PPI(13)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SE_12 ,Set-enable for PPI(12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_SE_11 ,Set-enable for PPI(11)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PPI_SE_10 ,Set-enable for PPI(10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SE_9 ,Set-enable for PPI(9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PPI_SE_8 ,Set-enable for PPI(8)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PPI_SE_7 ,Set-enable for PPI(7)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SE_6 ,Set-enable for PPI(6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PPI_SE_5 ,Set-enable for PPI(5)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PPI_SE_4 ,Set-enable for PPI(4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SE_3 ,Set-enable for PPI(3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PPI_SE_2 ,Set-enable for PPI(2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PPI_SE_1 ,Set-enable for PPI(1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SE_0 ,Set-enable for PPI(0)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_SE_15 ,Set-enable for SGI(15)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " SGI_SE_14 ,Set-enable for SGI(14)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_SE_13 ,Set-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_SE_12 ,Set-enable for SGI(12)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " SGI_SE_11 ,Set-enable for SGI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_SE_10 ,Set-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_SE_9 ,Set-enable for SGI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " SGI_SE_8 ,Set-enable for SGI(8)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_SE_7 ,Set-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_SE_6 ,Set-enable for SGI(6)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SGI_SE_5 ,Set-enable for SGI(5)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_SE_4 ,Set-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_SE_3 ,Set-enable for SGI(3)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SGI_SE_2 ,Set-enable for SGI(2)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_SE_1 ,Set-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_SE_0 ,Set-enable for SGI(0)" "Disabled,Enabled"
|
|
line.long 0x04 "ICDISER1,Interrupt set-enable register SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_SE_31 ,Set Enable Bit 31" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " SPI_SE_30 ,Set Enable Bit 30" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " SPI_SE_29 ,Set Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_SE_28 ,Set Enable Bit 28" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " SPI_SE_27 ,Set Enable Bit 27" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " SPI_SE_26 ,Set Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_SE_25 ,Set Enable Bit 25" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " SPI_SE_24 ,Set Enable Bit 24" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SPI_SE_23 ,Set Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_SE_22 ,Set Enable Bit 22" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " SPI_SE_21 ,Set Enable Bit 21" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SPI_SE_20 ,Set Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_SE_19 ,Set Enable Bit 19" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " SPI_SE_18 ,Set Enable Bit 18" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SPI_SE_17 ,Set Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_SE_16 ,Set Enable Bit 16" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " SPI_SE_15 ,Set Enable Bit 15" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SPI_SE_14 ,Set Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_SE_13 ,Set Enable Bit 13" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " SPI_SE_12 ,Set Enable Bit 12" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SPI_SE_11 ,Set Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_SE_10 ,Set Enable Bit 10" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SPI_SE_9 ,Set Enable Bit 9" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SPI_SE_8 ,Set Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_SE_7 ,Set Enable Bit 7" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SPI_SE_6 ,Set Enable Bit 6" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SPI_SE_5 ,Set Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_SE_4 ,Set Enable Bit 4" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " SPI_SE_3 ,Set Enable Bit 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SPI_SE_2 ,Set Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_SE_1 ,Set Enable Bit 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPI_SE_0 ,Set Enable Bit 0" "Disabled,Enabled"
|
|
line.long 0x08 "ICDISER2,Interrupt set-enable register SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_SE_63 ,Set Enable Bit 63" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " SPI_SE_62 ,Set Enable Bit 62" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " SPI_SE_61 ,Set Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_SE_60 ,Set Enable Bit 60" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " SPI_SE_59 ,Set Enable Bit 59" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " SPI_SE_58 ,Set Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_SE_57 ,Set Enable Bit 57" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " SPI_SE_56 ,Set Enable Bit 56" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SPI_SE_55 ,Set Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_SE_54 ,Set Enable Bit 54" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " SPI_SE_53 ,Set Enable Bit 53" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " SPI_SE_52 ,Set Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_SE_51 ,Set Enable Bit 51" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " SPI_SE_50 ,Set Enable Bit 50" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " SPI_SE_49 ,Set Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_SE_48 ,Set Enable Bit 48" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " SPI_SE_47 ,Set Enable Bit 47" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " SPI_SE_46 ,Set Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_SE_45 ,Set Enable Bit 45" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SPI_SE_44 ,Set Enable Bit 44" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " SPI_SE_43 ,Set Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_SE_42 ,Set Enable Bit 42" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SPI_SE_41 ,Set Enable Bit 41" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SPI_SE_40 ,Set Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_SE_39 ,Set Enable Bit 39" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SPI_SE_38 ,Set Enable Bit 38" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SPI_SE_37 ,Set Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_SE_36 ,Set Enable Bit 36" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " SPI_SE_35 ,Set Enable Bit 35" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " SPI_SE_34 ,Set Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_SE_33 ,Set Enable Bit 33" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SPI_SE_32 ,Set Enable Bit 32" "Disabled,Enabled"
|
|
line.long 0x0C "ICDISER3,Interrupt set-enable register SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_SE_95 ,Set Enable Bit 95" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " SPI_SE_94 ,Set Enable Bit 94" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " SPI_SE_93 ,Set Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_SE_92 ,Set Enable Bit 92" "Disabled,Enabled"
|
|
bitfld.long 0x0C 27. " SPI_SE_91 ,Set Enable Bit 91" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " SPI_SE_90 ,Set Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_SE_89 ,Set Enable Bit 89" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " SPI_SE_88 ,Set Enable Bit 88" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " SPI_SE_87 ,Set Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_SE_86 ,Set Enable Bit 86" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " SPI_SE_85 ,Set Enable Bit 85" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " SPI_SE_84 ,Set Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_SE_83 ,Set Enable Bit 83" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " SPI_SE_82 ,Set Enable Bit 82" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " SPI_SE_81 ,Set Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_SE_80 ,Set Enable Bit 80" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " SPI_SE_79 ,Set Enable Bit 79" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " SPI_SE_78 ,Set Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_SE_77 ,Set Enable Bit 77" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " SPI_SE_76 ,Set Enable Bit 76" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " SPI_SE_75 ,Set Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_SE_74 ,Set Enable Bit 74" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " SPI_SE_73 ,Set Enable Bit 73" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " SPI_SE_72 ,Set Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_SE_71 ,Set Enable Bit 71" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " SPI_SE_70 ,Set Enable Bit 70" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " SPI_SE_69 ,Set Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_SE_68 ,Set Enable Bit 68" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPI_SE_67 ,Set Enable Bit 67" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " SPI_SE_66 ,Set Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_SE_65 ,Set Enable Bit 65" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SPI_SE_64 ,Set Enable Bit 64" "Disabled,Enabled"
|
|
line.long 0x10 "ICDISER4,Interrupt set-enable register SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_SE_127 ,Set Enable Bit 127" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " SPI_SE_126 ,Set Enable Bit 126" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " SPI_SE_125 ,Set Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_SE_124 ,Set Enable Bit 124" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " SPI_SE_123 ,Set Enable Bit 123" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " SPI_SE_122 ,Set Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_SE_121 ,Set Enable Bit 121" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " SPI_SE_120 ,Set Enable Bit 120" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " SPI_SE_119 ,Set Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_SE_118 ,Set Enable Bit 118" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " SPI_SE_117 ,Set Enable Bit 117" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " SPI_SE_116 ,Set Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_SE_115 ,Set Enable Bit 115" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " SPI_SE_114 ,Set Enable Bit 114" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " SPI_SE_113 ,Set Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_SE_112 ,Set Enable Bit 112" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " SPI_SE_111 ,Set Enable Bit 111" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " SPI_SE_110 ,Set Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_SE_109 ,Set Enable Bit 109" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " SPI_SE_108 ,Set Enable Bit 108" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " SPI_SE_107 ,Set Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_SE_106 ,Set Enable Bit 106" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " SPI_SE_105 ,Set Enable Bit 105" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " SPI_SE_104 ,Set Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_SE_103 ,Set Enable Bit 103" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " SPI_SE_102 ,Set Enable Bit 102" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " SPI_SE_101 ,Set Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_SE_100 ,Set Enable Bit 100" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " SPI_SE_99 ,Set Enable Bit 99" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SPI_SE_98 ,Set Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_SE_97 ,Set Enable Bit 97" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " SPI_SE_96 ,Set Enable Bit 96" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Clear-Enable"
|
|
group.long 0x180++0x13
|
|
line.long 0x00 "ICDICER0_CPU0,Interrupt clear-enable register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CE_15 ,Clear-enable for PPI(15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PPI_CE_14 ,Clear-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_CE_13 ,Clear-enable for PPI(13)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CE_12 ,Clear-enable for PPI(12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_CE_11 ,Clear-enable for PPI(11)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PPI_CE_10 ,Clear-enable for PPI(10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CE_9 ,Clear-enable for PPI(9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PPI_CE_8 ,Clear-enable for PPI(8)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PPI_CE_7 ,Clear-enable for PPI(7)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CE_6 ,Clear-enable for PPI(6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PPI_CE_5 ,Clear-enable for PPI(5)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PPI_CE_4 ,Clear-enable for PPI(4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CE_3 ,Clear-enable for PPI(3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PPI_CE_2 ,Clear-enable for PPI(2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PPI_CE_1 ,Clear-enable for PPI(1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CE_0 ,Clear-enable for PPI(0)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled"
|
|
line.long 0x04 "ICDICER1,Interrupt clear-enable register SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_CE_31 ,Clear Enable Bit 31" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " SPI_CE_30 ,Clear Enable Bit 30" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " SPI_CE_29 ,Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_CE_28 ,Clear Enable Bit 28" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " SPI_CE_27 ,Clear Enable Bit 27" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " SPI_CE_26 ,Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_CE_25 ,Clear Enable Bit 25" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " SPI_CE_24 ,Clear Enable Bit 24" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " SPI_CE_23 ,Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_CE_22 ,Clear Enable Bit 22" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " SPI_CE_21 ,Clear Enable Bit 21" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SPI_CE_20 ,Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_CE_19 ,Clear Enable Bit 19" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " SPI_CE_18 ,Clear Enable Bit 18" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SPI_CE_17 ,Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_CE_16 ,Clear Enable Bit 16" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " SPI_CE_15 ,Clear Enable Bit 15" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SPI_CE_14 ,Clear Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_CE_13 ,Clear Enable Bit 13" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " SPI_CE_12 ,Clear Enable Bit 12" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SPI_CE_11 ,Clear Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_CE_10 ,Clear Enable Bit 10" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SPI_CE_9 ,Clear Enable Bit 9" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SPI_CE_8 ,Clear Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_CE_7 ,Clear Enable Bit 7" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SPI_CE_6 ,Clear Enable Bit 6" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SPI_CE_5 ,Clear Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_CE_4 ,Clear Enable Bit 4" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " SPI_CE_3 ,Clear Enable Bit 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SPI_CE_2 ,Clear Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_CE_1 ,Clear Enable Bit 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SPI_CE_0 ,Clear Enable Bit 0" "Disabled,Enabled"
|
|
line.long 0x08 "ICDICER2,Interrupt clear-enable register SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_CE_63 ,Clear Enable Bit 63" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " SPI_CE_62 ,Clear Enable Bit 62" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " SPI_CE_61 ,Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_CE_60 ,Clear Enable Bit 60" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " SPI_CE_59 ,Clear Enable Bit 59" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " SPI_CE_58 ,Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_CE_57 ,Clear Enable Bit 57" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " SPI_CE_56 ,Clear Enable Bit 56" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SPI_CE_55 ,Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_CE_54 ,Clear Enable Bit 54" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " SPI_CE_53 ,Clear Enable Bit 53" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " SPI_CE_52 ,Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_CE_51 ,Clear Enable Bit 51" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " SPI_CE_50 ,Clear Enable Bit 50" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " SPI_CE_49 ,Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_CE_48 ,Clear Enable Bit 48" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " SPI_CE_47 ,Clear Enable Bit 47" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " SPI_CE_46 ,Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_CE_45 ,Clear Enable Bit 45" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " SPI_CE_44 ,Clear Enable Bit 44" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " SPI_CE_43 ,Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_CE_42 ,Clear Enable Bit 42" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SPI_CE_41 ,Clear Enable Bit 41" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " SPI_CE_40 ,Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_CE_39 ,Clear Enable Bit 39" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " SPI_CE_38 ,Clear Enable Bit 38" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " SPI_CE_37 ,Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_CE_36 ,Clear Enable Bit 36" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " SPI_CE_35 ,Clear Enable Bit 35" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " SPI_CE_34 ,Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_CE_33 ,Clear Enable Bit 33" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " SPI_CE_32 ,Clear Enable Bit 32" "Disabled,Enabled"
|
|
line.long 0x0C "ICDICER3,Interrupt clear-enable register SPI[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_CE_95 ,Clear Enable Bit 95" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " SPI_CE_94 ,Clear Enable Bit 94" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " SPI_CE_93 ,Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_CE_92 ,Clear Enable Bit 92" "Disabled,Enabled"
|
|
bitfld.long 0x0C 27. " SPI_CE_91 ,Clear Enable Bit 91" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " SPI_CE_90 ,Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_CE_89 ,Clear Enable Bit 89" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " SPI_CE_88 ,Clear Enable Bit 88" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " SPI_CE_87 ,Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_CE_86 ,Clear Enable Bit 86" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " SPI_CE_85 ,Clear Enable Bit 85" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " SPI_CE_84 ,Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_CE_83 ,Clear Enable Bit 83" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " SPI_CE_82 ,Clear Enable Bit 82" "Disabled,Enabled"
|
|
bitfld.long 0x0C 17. " SPI_CE_81 ,Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_CE_80 ,Clear Enable Bit 80" "Disabled,Enabled"
|
|
bitfld.long 0x0C 15. " SPI_CE_79 ,Clear Enable Bit 79" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " SPI_CE_78 ,Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_CE_77 ,Clear Enable Bit 77" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " SPI_CE_76 ,Clear Enable Bit 76" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " SPI_CE_75 ,Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_CE_74 ,Clear Enable Bit 74" "Disabled,Enabled"
|
|
bitfld.long 0x0C 9. " SPI_CE_73 ,Clear Enable Bit 73" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " SPI_CE_72 ,Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_CE_71 ,Clear Enable Bit 71" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " SPI_CE_70 ,Clear Enable Bit 70" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " SPI_CE_69 ,Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_CE_68 ,Clear Enable Bit 68" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " SPI_CE_67 ,Clear Enable Bit 67" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " SPI_CE_66 ,Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_CE_65 ,Clear Enable Bit 65" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SPI_CE_64 ,Clear Enable Bit 64" "Disabled,Enabled"
|
|
line.long 0x10 "ICDICER4,Interrupt clear-enable register SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_CE_127 ,Clear Enable Bit 127" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " SPI_CE_126 ,Clear Enable Bit 126" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " SPI_CE_125 ,Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_CE_124 ,Clear Enable Bit 124" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " SPI_CE_123 ,Clear Enable Bit 123" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " SPI_CE_122 ,Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_CE_121 ,Clear Enable Bit 121" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " SPI_CE_120 ,Clear Enable Bit 120" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " SPI_CE_119 ,Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_CE_118 ,Clear Enable Bit 118" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " SPI_CE_117 ,Clear Enable Bit 117" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " SPI_CE_116 ,Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_CE_115 ,Clear Enable Bit 115" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " SPI_CE_114 ,Clear Enable Bit 114" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " SPI_CE_113 ,Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_CE_112 ,Clear Enable Bit 112" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " SPI_CE_111 ,Clear Enable Bit 111" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " SPI_CE_110 ,Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_CE_109 ,Clear Enable Bit 109" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " SPI_CE_108 ,Clear Enable Bit 108" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " SPI_CE_107 ,Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_CE_106 ,Clear Enable Bit 106" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " SPI_CE_105 ,Clear Enable Bit 105" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " SPI_CE_104 ,Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_CE_103 ,Clear Enable Bit 103" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " SPI_CE_102 ,Clear Enable Bit 102" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " SPI_CE_101 ,Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_CE_100 ,Clear Enable Bit 100" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " SPI_CE_99 ,Clear Enable Bit 99" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SPI_CE_98 ,Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_CE_97 ,Clear Enable Bit 97" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " SPI_CE_96 ,Clear Enable Bit 96" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending-Set"
|
|
group.long 0x200++0x013
|
|
line.long 0x00 "ICDISPR0_CPU0,Interrupt pending-set register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SP_15 ,Set-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_SP_14 ,Set-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_SP_13 ,Set-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SP_12 ,Set-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_SP_11 ,Set-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_SP_10 ,Set-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SP_9 ,Set-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_SP_8 ,Set-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_SP_7 ,Set-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SP_6 ,Set-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_SP_5 ,Set-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_SP_4 ,Set-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SP_3 ,Set-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_SP_2 ,Set-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_SP_1 ,Set-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SP_0 ,Set-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending"
|
|
line.long 0x04 "ICDISPR1,Interrupt set-pending register SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_SP_31 ,Set Pending Bit 31" "Not pending,Pending"
|
|
bitfld.long 0x04 30. " SPI_SP_30 ,Set Pending Bit 30" "Not pending,Pending"
|
|
bitfld.long 0x04 29. " SPI_SP_29 ,Set Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_SP_28 ,Set Pending Bit 28" "Not pending,Pending"
|
|
bitfld.long 0x04 27. " SPI_SP_27 ,Set Pending Bit 27" "Not pending,Pending"
|
|
bitfld.long 0x04 26. " SPI_SP_26 ,Set Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_SP_25 ,Set Pending Bit 25" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " SPI_SP_24 ,Set Pending Bit 24" "Not pending,Pending"
|
|
bitfld.long 0x04 23. " SPI_SP_23 ,Set Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_SP_22 ,Set Pending Bit 22" "Not pending,Pending"
|
|
bitfld.long 0x04 21. " SPI_SP_21 ,Set Pending Bit 21" "Not pending,Pending"
|
|
bitfld.long 0x04 20. " SPI_SP_20 ,Set Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_SP_19 ,Set Pending Bit 19" "Not pending,Pending"
|
|
bitfld.long 0x04 18. " SPI_SP_18 ,Set Pending Bit 18" "Not pending,Pending"
|
|
bitfld.long 0x04 17. " SPI_SP_17 ,Set Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_SP_16 ,Set Pending Bit 16" "Not pending,Pending"
|
|
bitfld.long 0x04 15. " SPI_SP_15 ,Set Pending Bit 15" "Not pending,Pending"
|
|
bitfld.long 0x04 14. " SPI_SP_14 ,Set Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_SP_13 ,Set Pending Bit 13" "Not pending,Pending"
|
|
bitfld.long 0x04 12. " SPI_SP_12 ,Set Pending Bit 12" "Not pending,Pending"
|
|
bitfld.long 0x04 11. " SPI_SP_11 ,Set Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_SP_10 ,Set Pending Bit 10" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " SPI_SP_9 ,Set Pending Bit 9" "Not pending,Pending"
|
|
bitfld.long 0x04 8. " SPI_SP_8 ,Set Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_SP_7 ,Set Pending Bit 7" "Not pending,Pending"
|
|
bitfld.long 0x04 6. " SPI_SP_6 ,Set Pending Bit 6" "Not pending,Pending"
|
|
bitfld.long 0x04 5. " SPI_SP_5 ,Set Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_SP_4 ,Set Pending Bit 4" "Not pending,Pending"
|
|
bitfld.long 0x04 3. " SPI_SP_3 ,Set Pending Bit 3" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " SPI_SP_2 ,Set Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_SP_1 ,Set Pending Bit 1" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " SPI_SP_0 ,Set Pending Bit 0" "Not pending,Pending"
|
|
line.long 0x08 "ICDISPR2,Interrupt set-pending register SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_SP_63 ,Set Pending Bit 63" "Not pending,Pending"
|
|
bitfld.long 0x08 30. " SPI_SP_62 ,Set Pending Bit 62" "Not pending,Pending"
|
|
bitfld.long 0x08 29. " SPI_SP_61 ,Set Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_SP_60 ,Set Pending Bit 60" "Not pending,Pending"
|
|
bitfld.long 0x08 27. " SPI_SP_59 ,Set Pending Bit 59" "Not pending,Pending"
|
|
bitfld.long 0x08 26. " SPI_SP_58 ,Set Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_SP_57 ,Set Pending Bit 57" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " SPI_SP_56 ,Set Pending Bit 56" "Not pending,Pending"
|
|
bitfld.long 0x08 23. " SPI_SP_55 ,Set Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_SP_54 ,Set Pending Bit 54" "Not pending,Pending"
|
|
bitfld.long 0x08 21. " SPI_SP_53 ,Set Pending Bit 53" "Not pending,Pending"
|
|
bitfld.long 0x08 20. " SPI_SP_52 ,Set Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_SP_51 ,Set Pending Bit 51" "Not pending,Pending"
|
|
bitfld.long 0x08 18. " SPI_SP_50 ,Set Pending Bit 50" "Not pending,Pending"
|
|
bitfld.long 0x08 17. " SPI_SP_49 ,Set Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_SP_48 ,Set Pending Bit 48" "Not pending,Pending"
|
|
bitfld.long 0x08 15. " SPI_SP_47 ,Set Pending Bit 47" "Not pending,Pending"
|
|
bitfld.long 0x08 14. " SPI_SP_46 ,Set Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_SP_45 ,Set Pending Bit 45" "Not pending,Pending"
|
|
bitfld.long 0x08 12. " SPI_SP_44 ,Set Pending Bit 44" "Not pending,Pending"
|
|
bitfld.long 0x08 11. " SPI_SP_43 ,Set Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_SP_42 ,Set Pending Bit 42" "Not pending,Pending"
|
|
bitfld.long 0x08 9. " SPI_SP_41 ,Set Pending Bit 41" "Not pending,Pending"
|
|
bitfld.long 0x08 8. " SPI_SP_40 ,Set Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_SP_39 ,Set Pending Bit 39" "Not pending,Pending"
|
|
bitfld.long 0x08 6. " SPI_SP_38 ,Set Pending Bit 38" "Not pending,Pending"
|
|
bitfld.long 0x08 5. " SPI_SP_37 ,Set Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_SP_36 ,Set Pending Bit 36" "Not pending,Pending"
|
|
bitfld.long 0x08 3. " SPI_SP_35 ,Set Pending Bit 35" "Not pending,Pending"
|
|
bitfld.long 0x08 2. " SPI_SP_34 ,Set Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_SP_33 ,Set Pending Bit 33" "Not pending,Pending"
|
|
bitfld.long 0x08 0. " SPI_SP_32 ,Set Pending Bit 32" "Not pending,Pending"
|
|
line.long 0x0C "ICDISPR3,Interrupt set-pending register[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_SP_95 ,Set Pending Bit 95" "Not pending,Pending"
|
|
bitfld.long 0x0C 30. " SPI_SP_94 ,Set Pending Bit 94" "Not pending,Pending"
|
|
bitfld.long 0x0C 29. " SPI_SP_93 ,Set Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_SP_92 ,Set Pending Bit 92" "Not pending,Pending"
|
|
bitfld.long 0x0C 27. " SPI_SP_91 ,Set Pending Bit 91" "Not pending,Pending"
|
|
bitfld.long 0x0C 26. " SPI_SP_90 ,Set Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_SP_89 ,Set Pending Bit 89" "Not pending,Pending"
|
|
bitfld.long 0x0C 24. " SPI_SP_88 ,Set Pending Bit 88" "Not pending,Pending"
|
|
bitfld.long 0x0C 23. " SPI_SP_87 ,Set Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_SP_86 ,Set Pending Bit 86" "Not pending,Pending"
|
|
bitfld.long 0x0C 21. " SPI_SP_85 ,Set Pending Bit 85" "Not pending,Pending"
|
|
bitfld.long 0x0C 20. " SPI_SP_84 ,Set Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_SP_83 ,Set Pending Bit 83" "Not pending,Pending"
|
|
bitfld.long 0x0C 18. " SPI_SP_82 ,Set Pending Bit 82" "Not pending,Pending"
|
|
bitfld.long 0x0C 17. " SPI_SP_81 ,Set Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_SP_80 ,Set Pending Bit 80" "Not pending,Pending"
|
|
bitfld.long 0x0C 15. " SPI_SP_79 ,Set Pending Bit 79" "Not pending,Pending"
|
|
bitfld.long 0x0C 14. " SPI_SP_78 ,Set Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_SP_77 ,Set Pending Bit 77" "Not pending,Pending"
|
|
bitfld.long 0x0C 12. " SPI_SP_76 ,Set Pending Bit 76" "Not pending,Pending"
|
|
bitfld.long 0x0C 11. " SPI_SP_75 ,Set Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_SP_74 ,Set Pending Bit 74" "Not pending,Pending"
|
|
bitfld.long 0x0C 9. " SPI_SP_73 ,Set Pending Bit 73" "Not pending,Pending"
|
|
bitfld.long 0x0C 8. " SPI_SP_72 ,Set Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_SP_71 ,Set Pending Bit 71" "Not pending,Pending"
|
|
bitfld.long 0x0C 6. " SPI_SP_70 ,Set Pending Bit 70" "Not pending,Pending"
|
|
bitfld.long 0x0C 5. " SPI_SP_69 ,Set Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_SP_68 ,Set Pending Bit 68" "Not pending,Pending"
|
|
bitfld.long 0x0C 3. " SPI_SP_67 ,Set Pending Bit 67" "Not pending,Pending"
|
|
bitfld.long 0x0C 2. " SPI_SP_66 ,Set Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_SP_65 ,Set Pending Bit 65" "Not pending,Pending"
|
|
bitfld.long 0x0C 0. " SPI_SP_64 ,Set Pending Bit 64" "Not pending,Pending"
|
|
line.long 0x10 "ICDISPR4,Interrupt set-pending register SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_SP_127 ,Set Pending Bit 127" "Not pending,Pending"
|
|
bitfld.long 0x10 30. " SPI_SP_126 ,Set Pending Bit 126" "Not pending,Pending"
|
|
bitfld.long 0x10 29. " SPI_SP_125 ,Set Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_SP_124 ,Set Pending Bit 124" "Not pending,Pending"
|
|
bitfld.long 0x10 27. " SPI_SP_123 ,Set Pending Bit 123" "Not pending,Pending"
|
|
bitfld.long 0x10 26. " SPI_SP_122 ,Set Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_SP_121 ,Set Pending Bit 121" "Not pending,Pending"
|
|
bitfld.long 0x10 24. " SPI_SP_120 ,Set Pending Bit 120" "Not pending,Pending"
|
|
bitfld.long 0x10 23. " SPI_SP_119 ,Set Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_SP_118 ,Set Pending Bit 118" "Not pending,Pending"
|
|
bitfld.long 0x10 21. " SPI_SP_117 ,Set Pending Bit 117" "Not pending,Pending"
|
|
bitfld.long 0x10 20. " SPI_SP_116 ,Set Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_SP_115 ,Set Pending Bit 115" "Not pending,Pending"
|
|
bitfld.long 0x10 18. " SPI_SP_114 ,Set Pending Bit 114" "Not pending,Pending"
|
|
bitfld.long 0x10 17. " SPI_SP_113 ,Set Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_SP_112 ,Set Pending Bit 112" "Not pending,Pending"
|
|
bitfld.long 0x10 15. " SPI_SP_111 ,Set Pending Bit 111" "Not pending,Pending"
|
|
bitfld.long 0x10 14. " SPI_SP_110 ,Set Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_SP_109 ,Set Pending Bit 109" "Not pending,Pending"
|
|
bitfld.long 0x10 12. " SPI_SP_108 ,Set Pending Bit 108" "Not pending,Pending"
|
|
bitfld.long 0x10 11. " SPI_SP_107 ,Set Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_SP_106 ,Set Pending Bit 106" "Not pending,Pending"
|
|
bitfld.long 0x10 9. " SPI_SP_105 ,Set Pending Bit 105" "Not pending,Pending"
|
|
bitfld.long 0x10 8. " SPI_SP_104 ,Set Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_SP_103 ,Set Pending Bit 103" "Not pending,Pending"
|
|
bitfld.long 0x10 6. " SPI_SP_102 ,Set Pending Bit 102" "Not pending,Pending"
|
|
bitfld.long 0x10 5. " SPI_SP_101 ,Set Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_SP_100 ,Set Pending Bit 100" "Not pending,Pending"
|
|
bitfld.long 0x10 3. " SPI_SP_99 ,Set Pending Bit 99" "Not pending,Pending"
|
|
bitfld.long 0x10 2. " SPI_SP_98 ,Set Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_SP_97 ,Set Pending Bit 97" "Not pending,Pending"
|
|
bitfld.long 0x10 0. " SPI_SP_96 ,Set Pending Bit 96" "Not pending,Pending"
|
|
tree.end
|
|
tree "Interrupt Pending-Clear"
|
|
group.long 0x280++0x13
|
|
line.long 0x00 "ICDICPR0_CPU0,Interrupt pending-clear register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CP15 ,Clear-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_CP14 ,Clear-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_CP13 ,Clear-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CP12 ,Clear-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_CP11 ,Clear-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_CP10 ,Clear-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CP9 ,Clear-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_CP8 ,Clear-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_CP7 ,Clear-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CP6 ,Clear-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_CP5 ,Clear-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_CP4 ,Clear-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CP3 ,Clear-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_CP2 ,Clear-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_CP1 ,Clear-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CP0 ,Clear-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending"
|
|
line.long 0x04 "ICDICPR1,Interrupt clear-pending register SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_CP31 ,Clear Pending Bit 31" "Not pending,Pending"
|
|
bitfld.long 0x04 30. " SPI_CP30 ,Clear Pending Bit 30" "Not pending,Pending"
|
|
bitfld.long 0x04 29. " SPI_CP29 ,Clear Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_CP28 ,Clear Pending Bit 28" "Not pending,Pending"
|
|
bitfld.long 0x04 27. " SPI_CP27 ,Clear Pending Bit 27" "Not pending,Pending"
|
|
bitfld.long 0x04 26. " SPI_CP26 ,Clear Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_CP25 ,Clear Pending Bit 25" "Not pending,Pending"
|
|
bitfld.long 0x04 24. " SPI_CP24 ,Clear Pending Bit 24" "Not pending,Pending"
|
|
bitfld.long 0x04 23. " SPI_CP23 ,Clear Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_CP22 ,Clear Pending Bit 22" "Not pending,Pending"
|
|
bitfld.long 0x04 21. " SPI_CP21 ,Clear Pending Bit 21" "Not pending,Pending"
|
|
bitfld.long 0x04 20. " SPI_CP20 ,Clear Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_CP19 ,Clear Pending Bit 19" "Not pending,Pending"
|
|
bitfld.long 0x04 18. " SPI_CP18 ,Clear Pending Bit 18" "Not pending,Pending"
|
|
bitfld.long 0x04 17. " SPI_CP17 ,Clear Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_CP16 ,Clear Pending Bit 16" "Not pending,Pending"
|
|
bitfld.long 0x04 15. " SPI_CP15 ,Clear Pending Bit 15" "Not pending,Pending"
|
|
bitfld.long 0x04 14. " SPI_CP14 ,Clear Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_CP13 ,Clear Pending Bit 13" "Not pending,Pending"
|
|
bitfld.long 0x04 12. " SPI_CP12 ,Clear Pending Bit 12" "Not pending,Pending"
|
|
bitfld.long 0x04 11. " SPI_CP11 ,Clear Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_CP10 ,Clear Pending Bit 10" "Not pending,Pending"
|
|
bitfld.long 0x04 9. " SPI_CP9 ,Clear Pending Bit 9" "Not pending,Pending"
|
|
bitfld.long 0x04 8. " SPI_CP8 ,Clear Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_CP7 ,Clear Pending Bit 7" "Not pending,Pending"
|
|
bitfld.long 0x04 6. " SPI_CP6 ,Clear Pending Bit 6" "Not pending,Pending"
|
|
bitfld.long 0x04 5. " SPI_CP5 ,Clear Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_CP4 ,Clear Pending Bit 4" "Not pending,Pending"
|
|
bitfld.long 0x04 3. " SPI_CP3 ,Clear Pending Bit 3" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " SPI_CP2 ,Clear Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_CP1 ,Clear Pending Bit 1" "Not pending,Pending"
|
|
bitfld.long 0x04 0. " SPI_CP0 ,Clear Pending Bit 0" "Not pending,Pending"
|
|
line.long 0x08 "ICDICPR2,Interrupt clear-pending register SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_CP63 ,Clear Pending Bit 63" "Not pending,Pending"
|
|
bitfld.long 0x08 30. " SPI_CP62 ,Clear Pending Bit 62" "Not pending,Pending"
|
|
bitfld.long 0x08 29. " SPI_CP61 ,Clear Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_CP60 ,Clear Pending Bit 60" "Not pending,Pending"
|
|
bitfld.long 0x08 27. " SPI_CP59 ,Clear Pending Bit 59" "Not pending,Pending"
|
|
bitfld.long 0x08 26. " SPI_CP58 ,Clear Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_CP57 ,Clear Pending Bit 57" "Not pending,Pending"
|
|
bitfld.long 0x08 24. " SPI_CP56 ,Clear Pending Bit 56" "Not pending,Pending"
|
|
bitfld.long 0x08 23. " SPI_CP55 ,Clear Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_CP54 ,Clear Pending Bit 54" "Not pending,Pending"
|
|
bitfld.long 0x08 21. " SPI_CP53 ,Clear Pending Bit 53" "Not pending,Pending"
|
|
bitfld.long 0x08 20. " SPI_CP52 ,Clear Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_CP51 ,Clear Pending Bit 51" "Not pending,Pending"
|
|
bitfld.long 0x08 18. " SPI_CP50 ,Clear Pending Bit 50" "Not pending,Pending"
|
|
bitfld.long 0x08 17. " SPI_CP49 ,Clear Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_CP48 ,Clear Pending Bit 48" "Not pending,Pending"
|
|
bitfld.long 0x08 15. " SPI_CP47 ,Clear Pending Bit 47" "Not pending,Pending"
|
|
bitfld.long 0x08 14. " SPI_CP46 ,Clear Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_CP45 ,Clear Pending Bit 45" "Not pending,Pending"
|
|
bitfld.long 0x08 12. " SPI_CP44 ,Clear Pending Bit 44" "Not pending,Pending"
|
|
bitfld.long 0x08 11. " SPI_CP43 ,Clear Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_CP42 ,Clear Pending Bit 42" "Not pending,Pending"
|
|
bitfld.long 0x08 9. " SPI_CP41 ,Clear Pending Bit 41" "Not pending,Pending"
|
|
bitfld.long 0x08 8. " SPI_CP40 ,Clear Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_CP39 ,Clear Pending Bit 39" "Not pending,Pending"
|
|
bitfld.long 0x08 6. " SPI_CP38 ,Clear Pending Bit 38" "Not pending,Pending"
|
|
bitfld.long 0x08 5. " SPI_CP37 ,Clear Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_CP36 ,Clear Pending Bit 36" "Not pending,Pending"
|
|
bitfld.long 0x08 3. " SPI_CP35 ,Clear Pending Bit 35" "Not pending,Pending"
|
|
bitfld.long 0x08 2. " SPI_CP34 ,Clear Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_CP33 ,Clear Pending Bit 33" "Not pending,Pending"
|
|
bitfld.long 0x08 0. " SPI_CP32 ,Clear Pending Bit 32" "Not pending,Pending"
|
|
line.long 0x0C "ICDICPR3,Interrupt clear-pending register[95:64]"
|
|
bitfld.long 0x0C 31. " SPI_CP95 ,Clear Pending Bit 95" "Not pending,Pending"
|
|
bitfld.long 0x0C 30. " SPI_CP94 ,Clear Pending Bit 94" "Not pending,Pending"
|
|
bitfld.long 0x0C 29. " SPI_CP93 ,Clear Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_CP92 ,Clear Pending Bit 92" "Not pending,Pending"
|
|
bitfld.long 0x0C 27. " SPI_CP91 ,Clear Pending Bit 91" "Not pending,Pending"
|
|
bitfld.long 0x0C 26. " SPI_CP90 ,Clear Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_CP89 ,Clear Pending Bit 89" "Not pending,Pending"
|
|
bitfld.long 0x0C 24. " SPI_CP88 ,Clear Pending Bit 88" "Not pending,Pending"
|
|
bitfld.long 0x0C 23. " SPI_CP87 ,Clear Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_CP86 ,Clear Pending Bit 86" "Not pending,Pending"
|
|
bitfld.long 0x0C 21. " SPI_CP85 ,Clear Pending Bit 85" "Not pending,Pending"
|
|
bitfld.long 0x0C 20. " SPI_CP84 ,Clear Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_CP83 ,Clear Pending Bit 83" "Not pending,Pending"
|
|
bitfld.long 0x0C 18. " SPI_CP82 ,Clear Pending Bit 82" "Not pending,Pending"
|
|
bitfld.long 0x0C 17. " SPI_CP81 ,Clear Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_CP80 ,Clear Pending Bit 80" "Not pending,Pending"
|
|
bitfld.long 0x0C 15. " SPI_CP79 ,Clear Pending Bit 79" "Not pending,Pending"
|
|
bitfld.long 0x0C 14. " SPI_CP78 ,Clear Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_CP77 ,Clear Pending Bit 77" "Not pending,Pending"
|
|
bitfld.long 0x0C 12. " SPI_CP76 ,Clear Pending Bit 76" "Not pending,Pending"
|
|
bitfld.long 0x0C 11. " SPI_CP75 ,Clear Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_CP74 ,Clear Pending Bit 74" "Not pending,Pending"
|
|
bitfld.long 0x0C 9. " SPI_CP73 ,Clear Pending Bit 73" "Not pending,Pending"
|
|
bitfld.long 0x0C 8. " SPI_CP72 ,Clear Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_CP71 ,Clear Pending Bit 71" "Not pending,Pending"
|
|
bitfld.long 0x0C 6. " SPI_CP70 ,Clear Pending Bit 70" "Not pending,Pending"
|
|
bitfld.long 0x0C 5. " SPI_CP69 ,Clear Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_CP68 ,Clear Pending Bit 68" "Not pending,Pending"
|
|
bitfld.long 0x0C 3. " SPI_CP67 ,Clear Pending Bit 67" "Not pending,Pending"
|
|
bitfld.long 0x0C 2. " SPI_CP66 ,Clear Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_CP65 ,Clear Pending Bit 65" "Not pending,Pending"
|
|
bitfld.long 0x0C 0. " SPI_CP64 ,Clear Pending Bit 64" "Not pending,Pending"
|
|
line.long 0x10 "ICDICPR4,Interrupt clear-pending register SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_CP127 ,Clear Pending Bit 127" "Not pending,Pending"
|
|
bitfld.long 0x10 30. " SPI_CP126 ,Clear Pending Bit 126" "Not pending,Pending"
|
|
bitfld.long 0x10 29. " SPI_CP125 ,Clear Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_CP124 ,Clear Pending Bit 124" "Not pending,Pending"
|
|
bitfld.long 0x10 27. " SPI_CP123 ,Clear Pending Bit 123" "Not pending,Pending"
|
|
bitfld.long 0x10 26. " SPI_CP122 ,Clear Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_CP121 ,Clear Pending Bit 121" "Not pending,Pending"
|
|
bitfld.long 0x10 24. " SPI_CP120 ,Clear Pending Bit 120" "Not pending,Pending"
|
|
bitfld.long 0x10 23. " SPI_CP119 ,Clear Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_CP118 ,Clear Pending Bit 118" "Not pending,Pending"
|
|
bitfld.long 0x10 21. " SPI_CP117 ,Clear Pending Bit 117" "Not pending,Pending"
|
|
bitfld.long 0x10 20. " SPI_CP116 ,Clear Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_CP115 ,Clear Pending Bit 115" "Not pending,Pending"
|
|
bitfld.long 0x10 18. " SPI_CP114 ,Clear Pending Bit 114" "Not pending,Pending"
|
|
bitfld.long 0x10 17. " SPI_CP113 ,Clear Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_CP112 ,Clear Pending Bit 112" "Not pending,Pending"
|
|
bitfld.long 0x10 15. " SPI_CP111 ,Clear Pending Bit 111" "Not pending,Pending"
|
|
bitfld.long 0x10 14. " SPI_CP110 ,Clear Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_CP109 ,Clear Pending Bit 109" "Not pending,Pending"
|
|
bitfld.long 0x10 12. " SPI_CP108 ,Clear Pending Bit 108" "Not pending,Pending"
|
|
bitfld.long 0x10 11. " SPI_CP107 ,Clear Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_CP106 ,Clear Pending Bit 106" "Not pending,Pending"
|
|
bitfld.long 0x10 9. " SPI_CP105 ,Clear Pending Bit 105" "Not pending,Pending"
|
|
bitfld.long 0x10 8. " SPI_CP104 ,Clear Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_CP103 ,Clear Pending Bit 103" "Not pending,Pending"
|
|
bitfld.long 0x10 6. " SPI_CP102 ,Clear Pending Bit 102" "Not pending,Pending"
|
|
bitfld.long 0x10 5. " SPI_CP101 ,Clear Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_CP100 ,Clear Pending Bit 100" "Not pending,Pending"
|
|
bitfld.long 0x10 3. " SPI_CP99 ,Clear Pending Bit 99" "Not pending,Pending"
|
|
bitfld.long 0x10 2. " SPI_CP98 ,Clear Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_CP97 ,Clear Pending Bit 97" "Not pending,Pending"
|
|
bitfld.long 0x10 0. " SPI_CP96 ,Clear Pending Bit 96" "Not pending,Pending"
|
|
tree.end
|
|
tree "Active Status"
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ICDABR0_CPU0,Active bit register (SGI/PPI)"
|
|
bitfld.long 0x00 31. " PPI_AS_15 ,Active status for PPI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 30. " PPI_AS_14 ,Active status for PPI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 29. " PPI_AS_13 ,Active status for PPI(13)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_AS_12 ,Active status for PPI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 27. " PPI_AS_11 ,Active status for PPI(11)" "Inactive,Active"
|
|
bitfld.long 0x00 26. " PPI_AS_10 ,Active status for PPI(10)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_AS_9 ,Active status for PPI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 24. " PPI_AS_8 ,Active status for PPI(8)" "Inactive,Active"
|
|
bitfld.long 0x00 23. " PPI_AS_7 ,Active status for PPI(7)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_AS_6 ,Active status for PPI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 21. " PPI_AS_5 ,Active status for PPI(5)" "Inactive,Active"
|
|
bitfld.long 0x00 20. " PPI_AS_4 ,Active status for PPI(4)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_AS_3 ,Active status for PPI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 18. " PPI_AS_2 ,Active status for PPI(2)" "Inactive,Active"
|
|
bitfld.long 0x00 17. " PPI_AS_1 ,Active status for PPI(1)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_AS_0 ,Active status for PPI(0)" "Inactive,Active"
|
|
bitfld.long 0x00 15. " SGI_AS_15 ,Active status for SGI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 14. " SGI_AS_14 ,Active status for SGI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_AS_13 ,Active status for SGI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 12. " SGI_AS_12 ,Active status for SGI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 11. " SGI_AS_11 ,Active status for SGI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_AS_10 ,Active status for SGI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 9. " SGI_AS_9 ,Active status for SGI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 8. " SGI_AS_8 ,Active status for SGI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_AS_7 ,Active status for SGI(7)" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SGI_AS_6 ,Active status for SGI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 5. " SGI_AS_5 ,Active status for SGI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_AS_4 ,Active status for SGI(4)" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SGI_AS_3 ,Active status for SGI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 2. " SGI_AS_2 ,Active status for SGI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_AS_1 ,Active status for SGI(1)" "Inactive,Active"
|
|
bitfld.long 0x00 0. " SGI_AS_0 ,Active status for SGI(0)" "Inactive,Active"
|
|
line.long 0x04 "ICDABR1,Active bit register SPI[31:0]"
|
|
bitfld.long 0x04 31. " SPI_AS_31 ,Active status for SPI(31)" "Inactive,Active"
|
|
bitfld.long 0x04 30. " SPI_AS_30 ,Active status for SPI(30)" "Inactive,Active"
|
|
bitfld.long 0x04 29. " SPI_AS_29 ,Active status for SPI(29)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SPI_AS_28 ,Active status for SPI(28)" "Inactive,Active"
|
|
bitfld.long 0x04 27. " SPI_AS_27 ,Active status for SPI(27)" "Inactive,Active"
|
|
bitfld.long 0x04 26. " SPI_AS_26 ,Active status for SPI(26)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SPI_AS_25 ,Active status for SPI(25)" "Inactive,Active"
|
|
bitfld.long 0x04 24. " SPI_AS_24 ,Active status for SPI(24)" "Inactive,Active"
|
|
bitfld.long 0x04 23. " SPI_AS_23 ,Active status for SPI(23)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SPI_AS_22 ,Active status for SPI(22)" "Inactive,Active"
|
|
bitfld.long 0x04 21. " SPI_AS_21 ,Active status for SPI(21)" "Inactive,Active"
|
|
bitfld.long 0x04 20. " SPI_AS_20 ,Active status for SPI(20)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SPI_AS_19 ,Active status for SPI(19)" "Inactive,Active"
|
|
bitfld.long 0x04 18. " SPI_AS_18 ,Active status for SPI(18)" "Inactive,Active"
|
|
bitfld.long 0x04 17. " SPI_AS_17 ,Active status for SPI(17)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SPI_AS_16 ,Active status for SPI(16)" "Inactive,Active"
|
|
bitfld.long 0x04 15. " SPI_AS_15 ,Active status for SPI(15)" "Inactive,Active"
|
|
bitfld.long 0x04 14. " SPI_AS_14 ,Active status for SPI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SPI_AS_13 ,Active status for SPI(13)" "Inactive,Active"
|
|
bitfld.long 0x04 12. " SPI_AS_12 ,Active status for SPI(12)" "Inactive,Active"
|
|
bitfld.long 0x04 11. " SPI_AS_11 ,Active status for SPI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SPI_AS_10 ,Active status for SPI(10)" "Inactive,Active"
|
|
bitfld.long 0x04 9. " SPI_AS_9 ,Active status for SPI(9)" "Inactive,Active"
|
|
bitfld.long 0x04 8. " SPI_AS_8 ,Active status for SPI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SPI_AS_7 ,Active status for SPI(7)" "Inactive,Active"
|
|
bitfld.long 0x04 6. " SPI_AS_6 ,Active status for SPI(6)" "Inactive,Active"
|
|
bitfld.long 0x04 5. " SPI_AS_5 ,Active status for SPI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SPI_AS_4 ,Active status for SPI(4)" "Inactive,Active"
|
|
bitfld.long 0x04 3. " SPI_AS_3 ,Active status for SPI(3)" "Inactive,Active"
|
|
bitfld.long 0x04 2. " SPI_AS_2 ,Active status for SPI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SPI_AS_1 ,Active status for SPI(1)" "Inactive,Active"
|
|
bitfld.long 0x04 0. " SPI_AS_0 ,Active status for SPI(0)" "Inactive,Active"
|
|
line.long 0x08 "ICDABR2,Active bit register SPI[63:32]"
|
|
bitfld.long 0x08 31. " SPI_AS_63 ,Active status for SPI(63)" "Inactive,Active"
|
|
bitfld.long 0x08 30. " SPI_AS_62 ,Active status for SPI(62)" "Inactive,Active"
|
|
bitfld.long 0x08 29. " SPI_AS_61 ,Active status for SPI(61)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 28. " SPI_AS_60 ,Active status for SPI(60)" "Inactive,Active"
|
|
bitfld.long 0x08 27. " SPI_AS_59 ,Active status for SPI(59)" "Inactive,Active"
|
|
bitfld.long 0x08 26. " SPI_AS_58 ,Active status for SPI(58)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " SPI_AS_57 ,Active status for SPI(57)" "Inactive,Active"
|
|
bitfld.long 0x08 24. " SPI_AS_56 ,Active status for SPI(56)" "Inactive,Active"
|
|
bitfld.long 0x08 23. " SPI_AS_55 ,Active status for SPI(55)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 22. " SPI_AS_54 ,Active status for SPI(54)" "Inactive,Active"
|
|
bitfld.long 0x08 21. " SPI_AS_53 ,Active status for SPI(53)" "Inactive,Active"
|
|
bitfld.long 0x08 20. " SPI_AS_52 ,Active status for SPI(52)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SPI_AS_51 ,Active status for SPI(51)" "Inactive,Active"
|
|
bitfld.long 0x08 18. " SPI_AS_50 ,Active status for SPI(50)" "Inactive,Active"
|
|
bitfld.long 0x08 17. " SPI_AS_49 ,Active status for SPI(49)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 16. " SPI_AS_48 ,Active status for SPI(48)" "Inactive,Active"
|
|
bitfld.long 0x08 15. " SPI_AS_47 ,Active status for SPI(47)" "Inactive,Active"
|
|
bitfld.long 0x08 14. " SPI_AS_46 ,Active status for SPI(46)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " SPI_AS_45 ,Active status for SPI(45)" "Inactive,Active"
|
|
bitfld.long 0x08 12. " SPI_AS_44 ,Active status for SPI(44)" "Inactive,Active"
|
|
bitfld.long 0x08 11. " SPI_AS_43 ,Active status for SPI(43)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 10. " SPI_AS_42 ,Active status for SPI(42)" "Inactive,Active"
|
|
bitfld.long 0x08 9. " SPI_AS_41 ,Active status for SPI(41)" "Inactive,Active"
|
|
bitfld.long 0x08 8. " SPI_AS_40 ,Active status for SPI(40)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SPI_AS_39 ,Active status for SPI(39)" "Inactive,Active"
|
|
bitfld.long 0x08 6. " SPI_AS_38 ,Active status for SPI(38)" "Inactive,Active"
|
|
bitfld.long 0x08 5. " SPI_AS_37 ,Active status for SPI(37)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SPI_AS_36 ,Active status for SPI(36)" "Inactive,Active"
|
|
bitfld.long 0x08 3. " SPI_AS_35 ,Active status for SPI(35)" "Inactive,Active"
|
|
bitfld.long 0x08 2. " SPI_AS_34 ,Active status for SPI(34)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPI_AS_33 ,Active status for SPI(33)" "Inactive,Active"
|
|
bitfld.long 0x08 0. " SPI_AS_32 ,Active status for SPI(32)" "Inactive,Active"
|
|
line.long 0x0C "ICDABR3,Active bit register SPI[127:96]"
|
|
bitfld.long 0x0C 31. " SPI_AS_95 ,Active status for SPI(95)" "Inactive,Active"
|
|
bitfld.long 0x0C 30. " SPI_AS_94 ,Active status for SPI(94)" "Inactive,Active"
|
|
bitfld.long 0x0C 29. " SPI_AS_93 ,Active status for SPI(93)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 28. " SPI_AS_92 ,Active status for SPI(92)" "Inactive,Active"
|
|
bitfld.long 0x0C 27. " SPI_AS_91 ,Active status for SPI(91)" "Inactive,Active"
|
|
bitfld.long 0x0C 26. " SPI_AS_90 ,Active status for SPI(90)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SPI_AS_89 ,Active status for SPI(89)" "Inactive,Active"
|
|
bitfld.long 0x0C 24. " SPI_AS_88 ,Active status for SPI(88)" "Inactive,Active"
|
|
bitfld.long 0x0C 23. " SPI_AS_87 ,Active status for SPI(87)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " SPI_AS_86 ,Active status for SPI(86)" "Inactive,Active"
|
|
bitfld.long 0x0C 21. " SPI_AS_85 ,Active status for SPI(85)" "Inactive,Active"
|
|
bitfld.long 0x0C 20. " SPI_AS_84 ,Active status for SPI(84)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SPI_AS_83 ,Active status for SPI(83)" "Inactive,Active"
|
|
bitfld.long 0x0C 18. " SPI_AS_82 ,Active status for SPI(82)" "Inactive,Active"
|
|
bitfld.long 0x0C 17. " SPI_AS_81 ,Active status for SPI(81)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " SPI_AS_80 ,Active status for SPI(80)" "Inactive,Active"
|
|
bitfld.long 0x0C 15. " SPI_AS_79 ,Active status for SPI(79)" "Inactive,Active"
|
|
bitfld.long 0x0C 14. " SPI_AS_78 ,Active status for SPI(78)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SPI_AS_77 ,Active status for SPI(77)" "Inactive,Active"
|
|
bitfld.long 0x0C 12. " SPI_AS_76 ,Active status for SPI(76)" "Inactive,Active"
|
|
bitfld.long 0x0C 11. " SPI_AS_75 ,Active status for SPI(75)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " SPI_AS_74 ,Active status for SPI(74)" "Inactive,Active"
|
|
bitfld.long 0x0C 9. " SPI_AS_73 ,Active status for SPI(73)" "Inactive,Active"
|
|
bitfld.long 0x0C 8. " SPI_AS_72 ,Active status for SPI(72)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SPI_AS_71 ,Active status for SPI(71)" "Inactive,Active"
|
|
bitfld.long 0x0C 6. " SPI_AS_70 ,Active status for SPI(70)" "Inactive,Active"
|
|
bitfld.long 0x0C 5. " SPI_AS_69 ,Active status for SPI(69)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " SPI_AS_68 ,Active status for SPI(68)" "Inactive,Active"
|
|
bitfld.long 0x0C 3. " SPI_AS_67 ,Active status for SPI(67)" "Inactive,Active"
|
|
bitfld.long 0x0C 2. " SPI_AS_66 ,Active status for SPI(66)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SPI_AS_65 ,Active status for SPI(65)" "Inactive,Active"
|
|
bitfld.long 0x0C 0. " SPI_AS_64 ,Active status for SPI(64)" "Inactive,Active"
|
|
line.long 0x10 "ICDABR4,Active bit register SPI[127:96]"
|
|
bitfld.long 0x10 31. " SPI_AS_127 ,Active status for SPI(127)" "Inactive,Active"
|
|
bitfld.long 0x10 30. " SPI_AS_126 ,Active status for SPI(126)" "Inactive,Active"
|
|
bitfld.long 0x10 29. " SPI_AS_125 ,Active status for SPI(125)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 28. " SPI_AS_124 ,Active status for SPI(124)" "Inactive,Active"
|
|
bitfld.long 0x10 27. " SPI_AS_123 ,Active status for SPI(123)" "Inactive,Active"
|
|
bitfld.long 0x10 26. " SPI_AS_122 ,Active status for SPI(122)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SPI_AS_121 ,Active status for SPI(121)" "Inactive,Active"
|
|
bitfld.long 0x10 24. " SPI_AS_120 ,Active status for SPI(120)" "Inactive,Active"
|
|
bitfld.long 0x10 23. " SPI_AS_119 ,Active status for SPI(119)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 22. " SPI_AS_118 ,Active status for SPI(118)" "Inactive,Active"
|
|
bitfld.long 0x10 21. " SPI_AS_117 ,Active status for SPI(117)" "Inactive,Active"
|
|
bitfld.long 0x10 20. " SPI_AS_116 ,Active status for SPI(116)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SPI_AS_115 ,Active status for SPI(115)" "Inactive,Active"
|
|
bitfld.long 0x10 18. " SPI_AS_114 ,Active status for SPI(114)" "Inactive,Active"
|
|
bitfld.long 0x10 17. " SPI_AS_113 ,Active status for SPI(113)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 16. " SPI_AS_112 ,Active status for SPI(112)" "Inactive,Active"
|
|
bitfld.long 0x10 15. " SPI_AS_111 ,Active status for SPI(111)" "Inactive,Active"
|
|
bitfld.long 0x10 14. " SPI_AS_110 ,Active status for SPI(110)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SPI_AS_109 ,Active status for SPI(109)" "Inactive,Active"
|
|
bitfld.long 0x10 12. " SPI_AS_108 ,Active status for SPI(108)" "Inactive,Active"
|
|
bitfld.long 0x10 11. " SPI_AS_107 ,Active status for SPI(107)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 10. " SPI_AS_106 ,Active status for SPI(106)" "Inactive,Active"
|
|
bitfld.long 0x10 9. " SPI_AS_105 ,Active status for SPI(105)" "Inactive,Active"
|
|
bitfld.long 0x10 8. " SPI_AS_104 ,Active status for SPI(104)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SPI_AS_103 ,Active status for SPI(103)" "Inactive,Active"
|
|
bitfld.long 0x10 6. " SPI_AS_102 ,Active status for SPI(102)" "Inactive,Active"
|
|
bitfld.long 0x10 5. " SPI_AS_101 ,Active status for SPI(101)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SPI_AS_100 ,Active status for SPI(100)" "Inactive,Active"
|
|
bitfld.long 0x10 3. " SPI_AS_99 ,Active status for SPI(99)" "Inactive,Active"
|
|
bitfld.long 0x10 2. " SPI_AS_98 ,Active status for SPI(98)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SPI_AS_97 ,Active status for SPI(97)" "Inactive,Active"
|
|
bitfld.long 0x10 0. " SPI_AS_96 ,Active status for SPI(96)" "Inactive,Active"
|
|
tree.end
|
|
;section
|
|
tree "Priority Level"
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "ICDIPR0_CPU0,Priority level register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPR1_CPU0,Priority level register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPR2_CPU0,Priority level register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPR3_CPU0,Priority level register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPR4_CPU0,Priority level register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPR5_CPU0,Priority level register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPR6_CPU0,Priority level register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPR7_CPU0,Priority level register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x20 "ICDIPR8,Priority level register for SPI [3:0]"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x24 "ICDIPR9,Priority level register for SPI [7:4]"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x28 "ICDIPR10,Priority level register for SPI [11:8]"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x2C "ICDIPR11,Priority level register for SPI [15:12]"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x30 "ICDIPR12,Priority level register for SPI [19:16]"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x34 "ICDIPR13,Priority level register for SPI [23:20]"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x38 "ICDIPR14,Priority level register for SPI [27:24]"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x3C "ICDIPR15,Priority level register for SPI [31:28]"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x40 "ICDIPR16,Priority level register for SPI [35:32]"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x44 "ICDIPR17,Priority level register for SPI [39:36]"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x48 "ICDIPR18,Priority level register for SPI [43:40]"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4C "ICDIPR19,Priority level register for SPI [47:44]"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x50 "ICDIPR20,Priority level register for SPI [51:48]"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x54 "ICDIPR21,Priority level register for SPI [55:52]"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x58 "ICDIPR22,Priority level register for SPI [59:56]"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x5C "ICDIPR23,Priority level register for SPI [63:60]"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x60 "ICDIPR24,Priority level register for SPI [67:64]"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x64 "ICDIPR25,Priority level register for SPI [71:68]"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x68 "ICDIPR26,Priority level register for SPI [75:72]"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x6C "ICDIPR27,Priority level register for SPI [79:76]"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x70 "ICDIPR28,Priority level register for SPI [83:80]"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x74 "ICDIPR29,Priority level register for SPI [87:84]"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x78 "ICDIPR30,Priority level register for SPI [91:88]"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x7C "ICDIPR31,Priority level register for SPI [95:92]"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x80 "ICDIPR32,Priority level register for SPI [99:96]"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x84 "ICDIPR33,Priority level register for SPI [103:100]"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x88 "ICDIPR34,Priority level register for SPI [107:104]"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8C "ICDIPR35,Priority level register for SPI [111:108]"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x90 "ICDIPR36,Priority level register for SPI [115:112]"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x94 "ICDIPR37,Priority level register for SPI [119:116]"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x98 "ICDIPR38,Priority level register for SPI [123:120]"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x9C "ICDIPR39,Priority level register for SPI [127:124]"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
tree "Processor Targets"
|
|
rgroup.long 0x800++0x1F
|
|
line.long 0x0 "ICDIPTR0_CPU0,Processor target register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPTR1_CPU0,Processor target register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPTR2_CPU0,Processor target register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPTR3_CPU0,Processor target register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPTR4_CPU0,Processor target register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPTR5_CPU0,Processor target register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPTR6_CPU0,Processor target register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPTR7_CPU0,Processor target register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
group.long 0x820++0x7F
|
|
line.long 0x0 "ICDIPTR8,Processor target register for SPI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPTR9,Processor target register for SPI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPTR10,Processor target register for SPI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPTR11,Processor target register for SPI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPTR12,Processor target register for SPI [19:16]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPTR13,Processor target register for SPI [23:20]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPTR14,Processor target register for SPI [27:24]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPTR15,Processor target register for SPI [31:28]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x20 "ICDIPTR16,Processor target register for SPI [35:32]"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x24 "ICDIPTR17,Processor target register for SPI [39:36]"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x28 "ICDIPTR18,Processor target register for SPI [43:40]"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x2C "ICDIPTR19,Processor target register for SPI [47:44]"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x30 "ICDIPTR20,Processor target register for SPI [51:48]"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x34 "ICDIPTR21,Processor target register for SPI [55:52]"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x38 "ICDIPTR22,Processor target register for SPI [59:56]"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x3C "ICDIPTR23,Processor target register for SPI [63:60]"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x40 "ICDIPTR24,Processor target register for SPI [67:64]"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x44 "ICDIPTR25,Processor target register for SPI [71:68]"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x48 "ICDIPTR26,Processor target register for SPI [75:72]"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4C "ICDIPTR27,Processor target register for SPI [79:76]"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x50 "ICDIPTR28,Processor target register for SPI [83:80]"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x54 "ICDIPTR29,Processor target register for SPI [87:84]"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x58 "ICDIPTR30,Processor target register for SPI [91:88]"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x5C "ICDIPTR31,Processor target register for SPI [95:92]"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x60 "ICDIPTR32,Processor target register for SPI [99:96]"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x64 "ICDIPTR33,Processor target register for SPI [103:100]"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x68 "ICDIPTR34,Processor target register for SPI [107:104]"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x6C "ICDIPTR35,Processor target register for SPI [111:108]"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x70 "ICDIPTR36,Processor target register for SPI [115:112]"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x74 "ICDIPTR37,Processor target register for SPI [119:116]"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x78 "ICDIPTR38,Processor target register for SPI [123:120]"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x7C "ICDIPTR39,Processor target register for SPI [127:124]"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
;section
|
|
tree "Interrupt Configuration"
|
|
group.long 0xC00++0x27
|
|
line.long 0x00 "ICDICFR0_CPU0,Interrupt Configuration SGI Register"
|
|
bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x04 "ICDICFR1_CPU0,Interrupt Configuration PPI Register"
|
|
bitfld.long 0x04 30.--31. " PPI[15] ,Interrupt Configuration PPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 28.--29. " PPI[14] ,Interrupt Configuration PPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 26.--27. " PPI[13] ,Interrupt Configuration PPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " PPI[12] ,Interrupt Configuration PPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 22.--23. " PPI[11] ,Interrupt Configuration PPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 20.--21. " PPI[10] ,Interrupt Configuration PPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " PPI[9] ,Interrupt Configuration PPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 16.--17. " PPI[8] ,Interrupt Configuration PPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 14.--15. " PPI[7] ,Interrupt Configuration PPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " PPI[6] ,Interrupt Configuration PPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 10.--11. " PPI[5] ,Interrupt Configuration PPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 8.--9. " PPI[4] ,Interrupt Configuration PPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " PPI[3] ,Interrupt Configuration PPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 4.--5. " PPI[2] ,Interrupt Configuration PPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 2.--3. " PPI[1] ,Interrupt Configuration PPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PPI[0] ,Interrupt Configuration PPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x08 "ICDICFR2,Interrupt configuration register for SPI[15:0]"
|
|
bitfld.long 0x08 30.--31. " SPI[15] ,Interrupt Configuration SPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 28.--29. " SPI[14] ,Interrupt Configuration SPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 26.--27. " SPI[13] ,Interrupt Configuration SPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 24.--25. " SPI[12] ,Interrupt Configuration SPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 22.--23. " SPI[11] ,Interrupt Configuration SPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 20.--21. " SPI[10] ,Interrupt Configuration SPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 18.--19. " SPI[9] ,Interrupt Configuration SPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 16.--17. " SPI[8] ,Interrupt Configuration SPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 14.--15. " SPI[7] ,Interrupt Configuration SPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " SPI[6] ,Interrupt Configuration SPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 10.--11. " SPI[5] ,Interrupt Configuration SPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 8.--9. " SPI[4] ,Interrupt Configuration SPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 6.--7. " SPI[3] ,Interrupt Configuration SPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 4.--5. " SPI[2] ,Interrupt Configuration SPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x08 2.--3. " SPI[1] ,Interrupt Configuration SPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x08 0.--1. " SPI[0] ,Interrupt Configuration SPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x0C "ICDICFR3,Interrupt configuration register for SPI[31:16]"
|
|
bitfld.long 0x0C 30.--31. " SPI[31] ,Interrupt Configuration SPI[31]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 28.--29. " SPI[30] ,Interrupt Configuration SPI[30]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 26.--27. " SPI[29] ,Interrupt Configuration SPI[29]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--25. " SPI[28] ,Interrupt Configuration SPI[28]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 22.--23. " SPI[27] ,Interrupt Configuration SPI[27]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 20.--21. " SPI[26] ,Interrupt Configuration SPI[26]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 18.--19. " SPI[25] ,Interrupt Configuration SPI[25]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 16.--17. " SPI[24] ,Interrupt Configuration SPI[24]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 14.--15. " SPI[23] ,Interrupt Configuration SPI[23]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " SPI[22] ,Interrupt Configuration SPI[22]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 10.--11. " SPI[21] ,Interrupt Configuration SPI[21]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 8.--9. " SPI[20] ,Interrupt Configuration SPI[20]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 6.--7. " SPI[19] ,Interrupt Configuration SPI[19]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 4.--5. " SPI[18] ,Interrupt Configuration SPI[18]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x0C 2.--3. " SPI[17] ,Interrupt Configuration SPI[17]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " SPI[16] ,Interrupt Configuration SPI[16]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x10 "ICDICFR4,Interrupt configuration register for SPI[47:32]"
|
|
bitfld.long 0x10 30.--31. " SPI[47] ,Interrupt Configuration SPI[47]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 28.--29. " SPI[46] ,Interrupt Configuration SPI[46]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 26.--27. " SPI[45] ,Interrupt Configuration SPI[45]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 24.--25. " SPI[44] ,Interrupt Configuration SPI[44]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 22.--23. " SPI[43] ,Interrupt Configuration SPI[43]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 20.--21. " SPI[42] ,Interrupt Configuration SPI[42]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 18.--19. " SPI[41] ,Interrupt Configuration SPI[41]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 16.--17. " SPI[40] ,Interrupt Configuration SPI[40]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 14.--15. " SPI[39] ,Interrupt Configuration SPI[39]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 12.--13. " SPI[38] ,Interrupt Configuration SPI[38]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 10.--11. " SPI[37] ,Interrupt Configuration SPI[37]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 8.--9. " SPI[36] ,Interrupt Configuration SPI[36]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " SPI[35] ,Interrupt Configuration SPI[35]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 4.--5. " SPI[34] ,Interrupt Configuration SPI[34]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x10 2.--3. " SPI[33] ,Interrupt Configuration SPI[33]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " SPI[32] ,Interrupt Configuration SPI[32]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x14 "ICDICFR5,Interrupt configuration register for SPI[63:48]"
|
|
bitfld.long 0x14 30.--31. " SPI[63] ,Interrupt Configuration SPI[63]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 28.--29. " SPI[62] ,Interrupt Configuration SPI[62]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 26.--27. " SPI[61] ,Interrupt Configuration SPI[61]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 24.--25. " SPI[60] ,Interrupt Configuration SPI[60]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 22.--23. " SPI[59] ,Interrupt Configuration SPI[59]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 20.--21. " SPI[58] ,Interrupt Configuration SPI[58]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 18.--19. " SPI[57] ,Interrupt Configuration SPI[57]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 16.--17. " SPI[56] ,Interrupt Configuration SPI[56]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 14.--15. " SPI[55] ,Interrupt Configuration SPI[55]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 12.--13. " SPI[54] ,Interrupt Configuration SPI[54]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 10.--11. " SPI[53] ,Interrupt Configuration SPI[53]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 8.--9. " SPI[52] ,Interrupt Configuration SPI[52]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " SPI[51] ,Interrupt Configuration SPI[51]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 4.--5. " SPI[50] ,Interrupt Configuration SPI[50]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x14 2.--3. " SPI[49] ,Interrupt Configuration SPI[49]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " SPI[48] ,Interrupt Configuration SPI[48]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x18 "ICDICFR6,Interrupt configuration register for SPI[79:64]"
|
|
bitfld.long 0x18 30.--31. " SPI[79] ,Interrupt Configuration SPI[79]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 28.--29. " SPI[78] ,Interrupt Configuration SPI[78]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 26.--27. " SPI[77] ,Interrupt Configuration SPI[77]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 24.--25. " SPI[76] ,Interrupt Configuration SPI[76]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 22.--23. " SPI[75] ,Interrupt Configuration SPI[75]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 20.--21. " SPI[74] ,Interrupt Configuration SPI[74]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 18.--19. " SPI[73] ,Interrupt Configuration SPI[73]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 16.--17. " SPI[72] ,Interrupt Configuration SPI[72]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 14.--15. " SPI[71] ,Interrupt Configuration SPI[71]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 12.--13. " SPI[70] ,Interrupt Configuration SPI[70]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 10.--11. " SPI[69] ,Interrupt Configuration SPI[69]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 8.--9. " SPI[68] ,Interrupt Configuration SPI[68]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " SPI[67] ,Interrupt Configuration SPI[67]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 4.--5. " SPI[66] ,Interrupt Configuration SPI[66]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x18 2.--3. " SPI[65] ,Interrupt Configuration SPI[65]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " SPI[64] ,Interrupt Configuration SPI[64]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x1C "ICDICFR7,Interrupt configuration register for SPI[95:80]"
|
|
bitfld.long 0x1C 30.--31. " SPI[95] ,Interrupt Configuration SPI[95]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 28.--29. " SPI[94] ,Interrupt Configuration SPI[94]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 26.--27. " SPI[93] ,Interrupt Configuration SPI[93]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 24.--25. " SPI[92] ,Interrupt Configuration SPI[92]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 22.--23. " SPI[91] ,Interrupt Configuration SPI[91]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 20.--21. " SPI[90] ,Interrupt Configuration SPI[90]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 18.--19. " SPI[89] ,Interrupt Configuration SPI[89]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 16.--17. " SPI[88] ,Interrupt Configuration SPI[88]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 14.--15. " SPI[87] ,Interrupt Configuration SPI[87]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 12.--13. " SPI[86] ,Interrupt Configuration SPI[86]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 10.--11. " SPI[85] ,Interrupt Configuration SPI[85]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 8.--9. " SPI[84] ,Interrupt Configuration SPI[84]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 6.--7. " SPI[83] ,Interrupt Configuration SPI[83]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 4.--5. " SPI[82] ,Interrupt Configuration SPI[82]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x1C 2.--3. " SPI[81] ,Interrupt Configuration SPI[81]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--1. " SPI[80] ,Interrupt Configuration SPI[80]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x20 "ICDICFR8,Interrupt configuration register for SPI[111:96]"
|
|
bitfld.long 0x20 30.--31. " SPI[111] ,Interrupt Configuration SPI[111]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 28.--29. " SPI[110] ,Interrupt Configuration SPI[110]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 26.--27. " SPI[109] ,Interrupt Configuration SPI[109]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 24.--25. " SPI[108] ,Interrupt Configuration SPI[108]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 22.--23. " SPI[107] ,Interrupt Configuration SPI[107]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 20.--21. " SPI[106] ,Interrupt Configuration SPI[106]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 18.--19. " SPI[105] ,Interrupt Configuration SPI[105]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 16.--17. " SPI[104] ,Interrupt Configuration SPI[104]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 14.--15. " SPI[103] ,Interrupt Configuration SPI[103]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 12.--13. " SPI[102] ,Interrupt Configuration SPI[102]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 10.--11. " SPI[101] ,Interrupt Configuration SPI[101]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 8.--9. " SPI[100] ,Interrupt Configuration SPI[100]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 6.--7. " SPI[99] ,Interrupt Configuration SPI[99]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 4.--5. " SPI[98] ,Interrupt Configuration SPI[98]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x20 2.--3. " SPI[97] ,Interrupt Configuration SPI[97]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x20 0.--1. " SPI[96] ,Interrupt Configuration SPI[96]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x24 "ICDICFR9,Interrupt configuration register for SPI[127:112]"
|
|
bitfld.long 0x24 30.--31. " SPI[127] ,Interrupt Configuration SPI[127]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 28.--29. " SPI[126] ,Interrupt Configuration SPI[126]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 26.--27. " SPI[125] ,Interrupt Configuration SPI[125]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 24.--25. " SPI[124] ,Interrupt Configuration SPI[124]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 22.--23. " SPI[123] ,Interrupt Configuration SPI[123]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 20.--21. " SPI[122] ,Interrupt Configuration SPI[122]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 18.--19. " SPI[121] ,Interrupt Configuration SPI[121]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 16.--17. " SPI[120] ,Interrupt Configuration SPI[120]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 14.--15. " SPI[119] ,Interrupt Configuration SPI[119]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 12.--13. " SPI[118] ,Interrupt Configuration SPI[118]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 10.--11. " SPI[117] ,Interrupt Configuration SPI[117]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 8.--9. " SPI[116] ,Interrupt Configuration SPI[116]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 6.--7. " SPI[115] ,Interrupt Configuration SPI[115]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 4.--5. " SPI[114] ,Interrupt Configuration SPI[114]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x24 2.--3. " SPI[113] ,Interrupt Configuration SPI[113]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x24 0.--1. " SPI[112] ,Interrupt Configuration SPI[112]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
tree.end
|
|
; --------------------------------------------------------------------------------
|
|
; od 0x0D00
|
|
;section
|
|
width 17.
|
|
tree "PPI & SPI Status"
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "PPI_STATUS_CPU0,PPI Status Register"
|
|
bitfld.long 0x00 15. " PPI[15] ,PPI[15] Status" "Low,High"
|
|
bitfld.long 0x00 14. " PPI[14] ,PPI[14] Status" "Low,High"
|
|
bitfld.long 0x00 13. " PPI[13] ,PPI[13] Status" "Low,High"
|
|
bitfld.long 0x00 12. " PPI[12] ,PPI[12] Status" "Low,High"
|
|
bitfld.long 0x00 11. " PPI[11] ,PPI[11] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PPI[10] ,PPI[10] Status" "Low,High"
|
|
bitfld.long 0x00 9. " PPI[9] ,PPI[9] Status" "Low,High"
|
|
bitfld.long 0x00 8. " PPI[8] ,PPI[8] Status" "Low,High"
|
|
bitfld.long 0x00 7. " PPI[7] ,PPI[7] Status" "Low,High"
|
|
bitfld.long 0x00 6. " PPI[6] ,PPI[6] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PPI[5] ,PPI[5] Status" "Low,High"
|
|
bitfld.long 0x00 4. " PPI[4] ,PPI[4] Status" "Low,High"
|
|
bitfld.long 0x00 3. " PPI[3] ,PPI[3] Status" "Low,High"
|
|
bitfld.long 0x00 2. " PPI[2] ,PPI[2] Status" "Low,High"
|
|
bitfld.long 0x00 1. " PPI[1] ,PPI[1] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PPI[0] ,PPI[0] Status" "Low,High"
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "SPI_STATUS0,SPI[31:0] Status Register"
|
|
bitfld.long 0x00 31. " SPI[31] ,SPI Status[31]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[30] ,SPI Status[30]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[29] ,SPI Status[29]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[28] ,SPI Status[28]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[27] ,SPI Status[27]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[26] ,SPI Status[26]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[25] ,SPI Status[25]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[24] ,SPI Status[24]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[23] ,SPI Status[23]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[22] ,SPI Status[22]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[21] ,SPI Status[21]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[20] ,SPI Status[20]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[19] ,SPI Status[19]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[18] ,SPI Status[18]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[17] ,SPI Status[17]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[16] ,SPI Status[16]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[15] ,SPI Status[15]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[14] ,SPI Status[14]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[13] ,SPI Status[13]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[12] ,SPI Status[12]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[11] ,SPI Status[11]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[19] ,SPI Status[10]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[9] ,SPI Status[9]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[8] ,SPI Status[8]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[7] ,SPI Status[7]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[6] ,SPI Status[6]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[5] ,SPI Status[5]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[4] ,SPI Status[4]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[3] ,SPI Status[3]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[2] ,SPI Status[2]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[1] ,SPI Status[1]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[0] ,SPI Status[0]" "Low,High"
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "SPI_STATUS1,SPI[63:32] Status Register"
|
|
bitfld.long 0x00 31. " SPI[63] ,SPI Status[63]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[62] ,SPI Status[62]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[61] ,SPI Status[61]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[60] ,SPI Status[60]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[59] ,SPI Status[59]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[58] ,SPI Status[58]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[57] ,SPI Status[57]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[56] ,SPI Status[56]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[55] ,SPI Status[55]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[54] ,SPI Status[54]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[53] ,SPI Status[53]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[52] ,SPI Status[52]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[51] ,SPI Status[51]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[50] ,SPI Status[50]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[49] ,SPI Status[49]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[48] ,SPI Status[48]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[47] ,SPI Status[47]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[46] ,SPI Status[46]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[45] ,SPI Status[45]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[44] ,SPI Status[44]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[43] ,SPI Status[43]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[42] ,SPI Status[42]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[41] ,SPI Status[41]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[40] ,SPI Status[40]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[39] ,SPI Status[39]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[38] ,SPI Status[38]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[37] ,SPI Status[37]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[36] ,SPI Status[36]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[35] ,SPI Status[35]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SPI[34] ,SPI Status[34]" "Low,High"
|
|
bitfld.long 0x00 1. " SPI[33] ,SPI Status[33]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[32] ,SPI Status[32]" "Low,High"
|
|
group.long 0xd0C++0x03
|
|
line.long 0x00 "SPI_STATUS2,SPI[95:64] Status Register"
|
|
bitfld.long 0x00 31. " SPI[95] ,SPI Status[95]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[94] ,SPI Status[94]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[93] ,SPI Status[93]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[92] ,SPI Status[92]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[91] ,SPI Status[91]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[90] ,SPI Status[90]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[89] ,SPI Status[89]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[88] ,SPI Status[88]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[87] ,SPI Status[87]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[86] ,SPI Status[86]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[85] ,SPI Status[85]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[84] ,SPI Status[84]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[83] ,SPI Status[83]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[82] ,SPI Status[82]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[81] ,SPI Status[81]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[80] ,SPI Status[80]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[79] ,SPI Status[79]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[78] ,SPI Status[78]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[77] ,SPI Status[77]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[76] ,SPI Status[76]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[75] ,SPI Status[75]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[74] ,SPI Status[74]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[73] ,SPI Status[73]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[72] ,SPI Status[72]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[71] ,SPI Status[71]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[70] ,SPI Status[70]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[69] ,SPI Status[69]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[68] ,SPI Status[68]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[67] ,SPI Status[67]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[66] ,SPI Status[66]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[65] ,SPI Status[65]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[64] ,SPI Status[64]" "Low,High"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SPI_STATUS3,SPI[127:96] Status Register"
|
|
bitfld.long 0x00 31. " SPI[127] ,SPI Status[127]" "Low,High"
|
|
bitfld.long 0x00 30. " SPI[126] ,SPI Status[126]" "Low,High"
|
|
bitfld.long 0x00 29. " SPI[125] ,SPI Status[125]" "Low,High"
|
|
bitfld.long 0x00 28. " SPI[124] ,SPI Status[124]" "Low,High"
|
|
bitfld.long 0x00 27. " SPI[123] ,SPI Status[123]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SPI[122] ,SPI Status[122]" "Low,High"
|
|
bitfld.long 0x00 25. " SPI[121] ,SPI Status[121]" "Low,High"
|
|
bitfld.long 0x00 24. " SPI[120] ,SPI Status[120]" "Low,High"
|
|
bitfld.long 0x00 23. " SPI[119] ,SPI Status[119]" "Low,High"
|
|
bitfld.long 0x00 22. " SPI[118] ,SPI Status[118]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SPI[117] ,SPI Status[117]" "Low,High"
|
|
bitfld.long 0x00 20. " SPI[116] ,SPI Status[116]" "Low,High"
|
|
bitfld.long 0x00 19. " SPI[115] ,SPI Status[115]" "Low,High"
|
|
bitfld.long 0x00 18. " SPI[114] ,SPI Status[114]" "Low,High"
|
|
bitfld.long 0x00 17. " SPI[113] ,SPI Status[113]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SPI[112] ,SPI Status[112]" "Low,High"
|
|
bitfld.long 0x00 15. " SPI[111] ,SPI Status[111]" "Low,High"
|
|
bitfld.long 0x00 14. " SPI[110] ,SPI Status[110]" "Low,High"
|
|
bitfld.long 0x00 13. " SPI[109] ,SPI Status[109]" "Low,High"
|
|
bitfld.long 0x00 12. " SPI[108] ,SPI Status[108]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SPI[107] ,SPI Status[107]" "Low,High"
|
|
bitfld.long 0x00 10. " SPI[106] ,SPI Status[106]" "Low,High"
|
|
bitfld.long 0x00 9. " SPI[105] ,SPI Status[105]" "Low,High"
|
|
bitfld.long 0x00 8. " SPI[104] ,SPI Status[104]" "Low,High"
|
|
bitfld.long 0x00 7. " SPI[103] ,SPI Status[103]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPI[102] ,SPI Status[102]" "Low,High"
|
|
bitfld.long 0x00 5. " SPI[101] ,SPI Status[101]" "Low,High"
|
|
bitfld.long 0x00 4. " SPI[100] ,SPI Status[100]" "Low,High"
|
|
bitfld.long 0x00 3. " SPI[99] ,SPI Status[99]" "Low,High"
|
|
bitfld.long 0x00 2. " SPI[98] ,SPI Status[98]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPI[97] ,SPI Status[97]" "Low,High"
|
|
bitfld.long 0x00 0. " SPI[96] ,SPI Status[96]" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
width 9.
|
|
wgroup.long 0xF00++0x03 "Software Generated Interrupt"
|
|
line.long 0x00 "ICDSGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TRG_LIST_FLT ,Distributor SGI processing" "CPUTargetList,All interfaces,Requested only,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPU_TRG_LIST ,CPU Target List"
|
|
bitfld.long 0x00 15. " NSATT ,Security value of the SGI" "Group 0,Group 1"
|
|
bitfld.long 0x00 0.--3. " SGIINTID ,Interrupt ID of the SGI to forward to the specified CPU interfaces" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree "CPU1"
|
|
tree "Interrupt Security"
|
|
;section
|
|
width 14.
|
|
group.long 0x4080++0x03
|
|
line.long 0x00 "ICDISR0_CPU1,Interrupt Security Register[0]"
|
|
bitfld.long 0x00 31. " ITSP[15] ,Interrupt Secure PPI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 30. " ITSP[14] ,Interrupt Secure PPI[14]" "Secured,Non-secured"
|
|
bitfld.long 0x00 29. " ITSP[13] ,Interrupt Secure PPI[13]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITSP[12] ,Interrupt Secure PPI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 27. " ITSP[11] ,Interrupt Secure PPI[11]" "Secured,Non-secured"
|
|
bitfld.long 0x00 26. " ITSP[10] ,Interrupt Secure PPI[10]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITSP[9] ,Interrupt Secure PPI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 24. " ITSP[8] ,Interrupt Secure PPI[8]" "Secured,Non-secured"
|
|
bitfld.long 0x00 23. " ITSP[7] ,Interrupt Secure PPI[7]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITSP[6] ,Interrupt Secure PPI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 21. " ITSP[5] ,Interrupt Secure PPI[5]" "Secured,Non-secured"
|
|
bitfld.long 0x00 20. " ITSP[4] ,Interrupt Secure PPI[4]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITSP[3] ,Interrupt Secure PPI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 18. " ITSP[2] ,Interrupt Secure PPI[2]" "Secured,Non-secured"
|
|
bitfld.long 0x00 17. " ITSP[1] ,Interrupt Secure PPI[1]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITSP[0] ,Interrupt Secure PPI[0]" "Secured,Non-secured"
|
|
bitfld.long 0x00 15. " ITSS[15] ,Interrupt Secure SGI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 14. " ITSS[14] ,Interrupt Secure SGI[14]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITSS[13] ,Interrupt Secure SGI[13]" "Secured,Non-secured"
|
|
bitfld.long 0x00 12. " ITSS[12] ,Interrupt Secure SGI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 11. " ITSS[11] ,Interrupt Secure SGI[11]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITSS[10] ,Interrupt Secure SGI[10]" "Secured,Non-secured"
|
|
bitfld.long 0x00 9. " ITSS[9] ,Interrupt Secure SGI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 8. " ITSS[8] ,Interrupt Secure SGI[8]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITSS[7] ,Interrupt Secure SGI[7]" "Secured,Non-secured"
|
|
bitfld.long 0x00 6. " ITSS[6] ,Interrupt Secure SGI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 5. " ITSS[5] ,Interrupt Secure SGI[5]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITSS[4] ,Interrupt Secure SGI[4]" "Secured,Non-secured"
|
|
bitfld.long 0x00 3. " ITSS[3] ,Interrupt Secure SGI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 2. " ITSS[2] ,Interrupt Secure SGI[2]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITSS[1] ,Interrupt Secure SGI[1]" "Secured,Non-secured"
|
|
bitfld.long 0x00 0. " ITSS[0] ,Interrupt Secure SGI[0]" "Secured,Non-secured"
|
|
tree.end
|
|
tree "Interrupt Set-Enable"
|
|
group.byte 0x4100++0x3
|
|
line.long 0x00 "ICDISER0_CPU1,Interrupt Set-Enable Register 0"
|
|
bitfld.long 0x00 31. " ISET[31] ,Interrupt 31 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " ISET[30] ,Interrupt 30 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " ISET[29] ,Interrupt 29 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ISET[28] ,Interrupt 28 Set" "No effect,Set"
|
|
bitfld.long 0x00 27. " ISET[27] ,Interrupt 27 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " ISET[26] ,Interrupt 26 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISET[25] ,Interrupt 25 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " ISET[24] ,Interrupt 24 Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " ISET[23] ,Interrupt 23 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISET[22] ,Interrupt 22 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " ISET[21] ,Interrupt 21 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " ISET[20] ,Interrupt 20 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISET[19] ,Interrupt 19 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " ISET[18] ,Interrupt 18 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " ISET[17] ,Interrupt 17 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ISET[16] ,Interrupt 16 Set" "No effect,Set"
|
|
bitfld.long 0x00 15. " ISET[15] ,Interrupt 15 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " ISET[14] ,Interrupt 14 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISET[13] ,Interrupt 13 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " ISET[12] ,Interrupt 12 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " ISET[11] ,Interrupt 11 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISET[10] ,Interrupt 10 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " ISET[9] ,Interrupt 9 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " ISET[8] ,Interrupt 8 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISET[7] ,Interrupt 7 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " ISET[6] ,Interrupt 6 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " ISET[5] ,Interrupt 5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ISET[4] ,Interrupt 4 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " ISET[3] ,Interrupt 3 Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " ISET[2] ,Interrupt 2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISET[1] ,Interrupt 1 Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " ISET[0] ,Interrupt 0 Set" "No effect,Set"
|
|
tree.end
|
|
tree "Interrupt Clear-Enable"
|
|
group.long 0x4180++0x03
|
|
line.long 0x00 "ICDICER0_CPU1,Interrupt clear-enable register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CE_15 ,Clear-enable for PPI(15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PPI_CE_14 ,Clear-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_CE_13 ,Clear-enable for PPI(13)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CE_12 ,Clear-enable for PPI(12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_CE_11 ,Clear-enable for PPI(11)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PPI_CE_10 ,Clear-enable for PPI(10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CE_9 ,Clear-enable for PPI(9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PPI_CE_8 ,Clear-enable for PPI(8)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PPI_CE_7 ,Clear-enable for PPI(7)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CE_6 ,Clear-enable for PPI(6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PPI_CE_5 ,Clear-enable for PPI(5)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PPI_CE_4 ,Clear-enable for PPI(4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CE_3 ,Clear-enable for PPI(3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PPI_CE_2 ,Clear-enable for PPI(2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PPI_CE_1 ,Clear-enable for PPI(1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CE_0 ,Clear-enable for PPI(0)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending"
|
|
group.long 0x4200++0x03
|
|
line.long 0x00 "ICDISPR0_CPU1,Interrupt pending-set register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SP_15 ,Set-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_SP_14 ,Set-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_SP_13 ,Set-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SP_12 ,Set-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_SP_11 ,Set-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_SP_10 ,Set-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SP_9 ,Set-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_SP_8 ,Set-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_SP_7 ,Set-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SP_6 ,Set-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_SP_5 ,Set-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_SP_4 ,Set-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SP_3 ,Set-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_SP_2 ,Set-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_SP_1 ,Set-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SP_0 ,Set-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending"
|
|
group.long 0x4280++0x03
|
|
line.long 0x00 "ICDICPR0_CPU1,Interrupt pending-clear register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CP15 ,Clear-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_CP14 ,Clear-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_CP13 ,Clear-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CP12 ,Clear-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_CP11 ,Clear-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_CP10 ,Clear-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CP9 ,Clear-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_CP8 ,Clear-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_CP7 ,Clear-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CP6 ,Clear-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_CP5 ,Clear-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_CP4 ,Clear-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CP3 ,Clear-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_CP2 ,Clear-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_CP1 ,Clear-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CP0 ,Clear-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending"
|
|
tree.end
|
|
tree "Active Status"
|
|
rgroup.long 0x4300++0x03
|
|
line.long 0x00 "ICDABR0_CPU1,Active bit register (SGI/PPI)"
|
|
bitfld.long 0x00 31. " PPI_AS_15 ,Active status for PPI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 30. " PPI_AS_14 ,Active status for PPI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 29. " PPI_AS_13 ,Active status for PPI(13)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_AS_12 ,Active status for PPI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 27. " PPI_AS_11 ,Active status for PPI(11)" "Inactive,Active"
|
|
bitfld.long 0x00 26. " PPI_AS_10 ,Active status for PPI(10)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_AS_9 ,Active status for PPI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 24. " PPI_AS_8 ,Active status for PPI(8)" "Inactive,Active"
|
|
bitfld.long 0x00 23. " PPI_AS_7 ,Active status for PPI(7)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_AS_6 ,Active status for PPI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 21. " PPI_AS_5 ,Active status for PPI(5)" "Inactive,Active"
|
|
bitfld.long 0x00 20. " PPI_AS_4 ,Active status for PPI(4)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_AS_3 ,Active status for PPI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 18. " PPI_AS_2 ,Active status for PPI(2)" "Inactive,Active"
|
|
bitfld.long 0x00 17. " PPI_AS_1 ,Active status for PPI(1)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_AS_0 ,Active status for PPI(0)" "Inactive,Active"
|
|
bitfld.long 0x00 15. " SGI_AS_15 ,Active status for SGI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 14. " SGI_AS_14 ,Active status for SGI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_AS_13 ,Active status for SGI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 12. " SGI_AS_12 ,Active status for SGI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 11. " SGI_AS_11 ,Active status for SGI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_AS_10 ,Active status for SGI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 9. " SGI_AS_9 ,Active status for SGI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 8. " SGI_AS_8 ,Active status for SGI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_AS_7 ,Active status for SGI(7)" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SGI_AS_6 ,Active status for SGI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 5. " SGI_AS_5 ,Active status for SGI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_AS_4 ,Active status for SGI(4)" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SGI_AS_3 ,Active status for SGI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 2. " SGI_AS_2 ,Active status for SGI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_AS_1 ,Active status for SGI(1)" "Inactive,Active"
|
|
bitfld.long 0x00 0. " SGI_AS_0 ,Active status for SGI(0)" "Inactive,Active"
|
|
tree.end
|
|
;section
|
|
width 15.
|
|
tree "Priority Level"
|
|
group.long 0x4400++0x9F
|
|
line.long 0x0 "ICDIPR0_CPU1,Priority level register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPR1_CPU1,Priority level register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPR2_CPU1,Priority level register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPR3_CPU1,Priority level register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPR4_CPU1,Priority level register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPR5_CPU1,Priority level register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPR6_CPU1,Priority level register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPR7_CPU1,Priority level register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
tree "CPU1 Processor Targets"
|
|
rgroup.long 0x4800++0x1F
|
|
line.long 0x0 "ICDIPTR0_CPU1,Processor target register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPTR1_CPU1,Processor target register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPTR2_CPU1,Processor target register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPTR3_CPU1,Processor target register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPTR4_CPU1,Processor target register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPTR5_CPU1,Processor target register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPTR6_CPU1,Processor target register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPTR7_CPU1,Processor target register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
;section
|
|
tree "CPU1 Interrupt Configuration"
|
|
group.long 0x4C00++0x07
|
|
line.long 0x00 "ICDICFR0_CPU1,Interrupt Configuration SGI Register"
|
|
bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x04 "ICDICFR1_CPU1,Interrupt Configuration PPI Register"
|
|
bitfld.long 0x04 30.--31. " PPI[15] ,Interrupt Configuration PPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 28.--29. " PPI[14] ,Interrupt Configuration PPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 26.--27. " PPI[13] ,Interrupt Configuration PPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " PPI[12] ,Interrupt Configuration PPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 22.--23. " PPI[11] ,Interrupt Configuration PPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 20.--21. " PPI[10] ,Interrupt Configuration PPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " PPI[9] ,Interrupt Configuration PPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 16.--17. " PPI[8] ,Interrupt Configuration PPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 14.--15. " PPI[7] ,Interrupt Configuration PPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " PPI[6] ,Interrupt Configuration PPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 10.--11. " PPI[5] ,Interrupt Configuration PPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 8.--9. " PPI[4] ,Interrupt Configuration PPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " PPI[3] ,Interrupt Configuration PPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 4.--5. " PPI[2] ,Interrupt Configuration PPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 2.--3. " PPI[1] ,Interrupt Configuration PPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PPI[0] ,Interrupt Configuration PPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
tree.end
|
|
;section
|
|
tree "PPI Status"
|
|
width 17.
|
|
rgroup.long 0x4d00++0x03
|
|
line.long 0x00 "PPI_STATUS_CPU1,PPI Status Register"
|
|
bitfld.long 0x00 15. " PPI[15] ,PPI[15] Status" "Low,High"
|
|
bitfld.long 0x00 14. " PPI[14] ,PPI[14] Status" "Low,High"
|
|
bitfld.long 0x00 13. " PPI[13] ,PPI[13] Status" "Low,High"
|
|
bitfld.long 0x00 12. " PPI[12] ,PPI[12] Status" "Low,High"
|
|
bitfld.long 0x00 11. " PPI[11] ,PPI[11] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PPI[10] ,PPI[10] Status" "Low,High"
|
|
bitfld.long 0x00 9. " PPI[9] ,PPI[9] Status" "Low,High"
|
|
bitfld.long 0x00 8. " PPI[8] ,PPI[8] Status" "Low,High"
|
|
bitfld.long 0x00 7. " PPI[7] ,PPI[7] Status" "Low,High"
|
|
bitfld.long 0x00 6. " PPI[6] ,PPI[6] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PPI[5] ,PPI[5] Status" "Low,High"
|
|
bitfld.long 0x00 4. " PPI[4] ,PPI[4] Status" "Low,High"
|
|
bitfld.long 0x00 3. " PPI[3] ,PPI[3] Status" "Low,High"
|
|
bitfld.long 0x00 2. " PPI[2] ,PPI[2] Status" "Low,High"
|
|
bitfld.long 0x00 1. " PPI[1] ,PPI[1] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PPI[0] ,PPI[0] Status" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree "CPU2"
|
|
tree "Interrupt Security"
|
|
;section
|
|
width 14.
|
|
group.long 0x8080++0x03
|
|
line.long 0x00 "ICDISR0_CPU2,Interrupt Security Register[0]"
|
|
bitfld.long 0x00 31. " ITSP[15] ,Interrupt Secure PPI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 30. " ITSP[14] ,Interrupt Secure PPI[14]" "Secured,Non-secured"
|
|
bitfld.long 0x00 29. " ITSP[13] ,Interrupt Secure PPI[13]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITSP[12] ,Interrupt Secure PPI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 27. " ITSP[11] ,Interrupt Secure PPI[11]" "Secured,Non-secured"
|
|
bitfld.long 0x00 26. " ITSP[10] ,Interrupt Secure PPI[10]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITSP[9] ,Interrupt Secure PPI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 24. " ITSP[8] ,Interrupt Secure PPI[8]" "Secured,Non-secured"
|
|
bitfld.long 0x00 23. " ITSP[7] ,Interrupt Secure PPI[7]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITSP[6] ,Interrupt Secure PPI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 21. " ITSP[5] ,Interrupt Secure PPI[5]" "Secured,Non-secured"
|
|
bitfld.long 0x00 20. " ITSP[4] ,Interrupt Secure PPI[4]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITSP[3] ,Interrupt Secure PPI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 18. " ITSP[2] ,Interrupt Secure PPI[2]" "Secured,Non-secured"
|
|
bitfld.long 0x00 17. " ITSP[1] ,Interrupt Secure PPI[1]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITSP[0] ,Interrupt Secure PPI[0]" "Secured,Non-secured"
|
|
bitfld.long 0x00 15. " ITSS[15] ,Interrupt Secure SGI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 14. " ITSS[14] ,Interrupt Secure SGI[14]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITSS[13] ,Interrupt Secure SGI[13]" "Secured,Non-secured"
|
|
bitfld.long 0x00 12. " ITSS[12] ,Interrupt Secure SGI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 11. " ITSS[11] ,Interrupt Secure SGI[11]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITSS[10] ,Interrupt Secure SGI[10]" "Secured,Non-secured"
|
|
bitfld.long 0x00 9. " ITSS[9] ,Interrupt Secure SGI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 8. " ITSS[8] ,Interrupt Secure SGI[8]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITSS[7] ,Interrupt Secure SGI[7]" "Secured,Non-secured"
|
|
bitfld.long 0x00 6. " ITSS[6] ,Interrupt Secure SGI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 5. " ITSS[5] ,Interrupt Secure SGI[5]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITSS[4] ,Interrupt Secure SGI[4]" "Secured,Non-secured"
|
|
bitfld.long 0x00 3. " ITSS[3] ,Interrupt Secure SGI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 2. " ITSS[2] ,Interrupt Secure SGI[2]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITSS[1] ,Interrupt Secure SGI[1]" "Secured,Non-secured"
|
|
bitfld.long 0x00 0. " ITSS[0] ,Interrupt Secure SGI[0]" "Secured,Non-secured"
|
|
tree.end
|
|
tree "Interrupt Set-Enable"
|
|
group.byte 0x8100++0x3
|
|
line.long 0x00 "ICDISER0_CPU2,Interrupt Set-Enable Register 0"
|
|
bitfld.long 0x00 31. " ISET[31] ,Interrupt 31 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " ISET[30] ,Interrupt 30 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " ISET[29] ,Interrupt 29 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ISET[28] ,Interrupt 28 Set" "No effect,Set"
|
|
bitfld.long 0x00 27. " ISET[27] ,Interrupt 27 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " ISET[26] ,Interrupt 26 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISET[25] ,Interrupt 25 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " ISET[24] ,Interrupt 24 Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " ISET[23] ,Interrupt 23 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISET[22] ,Interrupt 22 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " ISET[21] ,Interrupt 21 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " ISET[20] ,Interrupt 20 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISET[19] ,Interrupt 19 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " ISET[18] ,Interrupt 18 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " ISET[17] ,Interrupt 17 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ISET[16] ,Interrupt 16 Set" "No effect,Set"
|
|
bitfld.long 0x00 15. " ISET[15] ,Interrupt 15 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " ISET[14] ,Interrupt 14 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISET[13] ,Interrupt 13 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " ISET[12] ,Interrupt 12 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " ISET[11] ,Interrupt 11 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISET[10] ,Interrupt 10 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " ISET[9] ,Interrupt 9 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " ISET[8] ,Interrupt 8 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISET[7] ,Interrupt 7 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " ISET[6] ,Interrupt 6 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " ISET[5] ,Interrupt 5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ISET[4] ,Interrupt 4 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " ISET[3] ,Interrupt 3 Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " ISET[2] ,Interrupt 2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISET[1] ,Interrupt 1 Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " ISET[0] ,Interrupt 0 Set" "No effect,Set"
|
|
tree.end
|
|
tree "Interrupt Clear-Enable"
|
|
group.long 0x8180++0x03
|
|
line.long 0x00 "ICDICER0_CPU2,Interrupt clear-enable register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CE_15 ,Clear-enable for PPI(15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PPI_CE_14 ,Clear-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_CE_13 ,Clear-enable for PPI(13)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CE_12 ,Clear-enable for PPI(12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_CE_11 ,Clear-enable for PPI(11)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PPI_CE_10 ,Clear-enable for PPI(10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CE_9 ,Clear-enable for PPI(9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PPI_CE_8 ,Clear-enable for PPI(8)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PPI_CE_7 ,Clear-enable for PPI(7)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CE_6 ,Clear-enable for PPI(6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PPI_CE_5 ,Clear-enable for PPI(5)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PPI_CE_4 ,Clear-enable for PPI(4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CE_3 ,Clear-enable for PPI(3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PPI_CE_2 ,Clear-enable for PPI(2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PPI_CE_1 ,Clear-enable for PPI(1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CE_0 ,Clear-enable for PPI(0)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending"
|
|
group.long 0x8200++0x03
|
|
line.long 0x00 "ICDISPR0_CPU2,Interrupt pending-set register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SP_15 ,Set-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_SP_14 ,Set-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_SP_13 ,Set-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SP_12 ,Set-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_SP_11 ,Set-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_SP_10 ,Set-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SP_9 ,Set-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_SP_8 ,Set-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_SP_7 ,Set-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SP_6 ,Set-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_SP_5 ,Set-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_SP_4 ,Set-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SP_3 ,Set-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_SP_2 ,Set-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_SP_1 ,Set-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SP_0 ,Set-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending"
|
|
group.long 0x8280++0x03
|
|
line.long 0x00 "ICDICPR0_CPU2,Interrupt pending-clear register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CP15 ,Clear-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_CP14 ,Clear-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_CP13 ,Clear-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CP12 ,Clear-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_CP11 ,Clear-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_CP10 ,Clear-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CP9 ,Clear-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_CP8 ,Clear-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_CP7 ,Clear-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CP6 ,Clear-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_CP5 ,Clear-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_CP4 ,Clear-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CP3 ,Clear-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_CP2 ,Clear-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_CP1 ,Clear-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CP0 ,Clear-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending"
|
|
tree.end
|
|
tree "Active Status"
|
|
rgroup.long 0x8300++0x03
|
|
line.long 0x00 "ICDABR0_CPU2,Active bit register (SGI/PPI)"
|
|
bitfld.long 0x00 31. " PPI_AS_15 ,Active status for PPI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 30. " PPI_AS_14 ,Active status for PPI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 29. " PPI_AS_13 ,Active status for PPI(13)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_AS_12 ,Active status for PPI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 27. " PPI_AS_11 ,Active status for PPI(11)" "Inactive,Active"
|
|
bitfld.long 0x00 26. " PPI_AS_10 ,Active status for PPI(10)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_AS_9 ,Active status for PPI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 24. " PPI_AS_8 ,Active status for PPI(8)" "Inactive,Active"
|
|
bitfld.long 0x00 23. " PPI_AS_7 ,Active status for PPI(7)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_AS_6 ,Active status for PPI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 21. " PPI_AS_5 ,Active status for PPI(5)" "Inactive,Active"
|
|
bitfld.long 0x00 20. " PPI_AS_4 ,Active status for PPI(4)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_AS_3 ,Active status for PPI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 18. " PPI_AS_2 ,Active status for PPI(2)" "Inactive,Active"
|
|
bitfld.long 0x00 17. " PPI_AS_1 ,Active status for PPI(1)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_AS_0 ,Active status for PPI(0)" "Inactive,Active"
|
|
bitfld.long 0x00 15. " SGI_AS_15 ,Active status for SGI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 14. " SGI_AS_14 ,Active status for SGI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_AS_13 ,Active status for SGI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 12. " SGI_AS_12 ,Active status for SGI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 11. " SGI_AS_11 ,Active status for SGI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_AS_10 ,Active status for SGI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 9. " SGI_AS_9 ,Active status for SGI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 8. " SGI_AS_8 ,Active status for SGI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_AS_7 ,Active status for SGI(7)" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SGI_AS_6 ,Active status for SGI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 5. " SGI_AS_5 ,Active status for SGI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_AS_4 ,Active status for SGI(4)" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SGI_AS_3 ,Active status for SGI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 2. " SGI_AS_2 ,Active status for SGI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_AS_1 ,Active status for SGI(1)" "Inactive,Active"
|
|
bitfld.long 0x00 0. " SGI_AS_0 ,Active status for SGI(0)" "Inactive,Active"
|
|
tree.end
|
|
;section
|
|
width 15.
|
|
tree "Priority Level"
|
|
group.long 0x8400++0x9F
|
|
line.long 0x0 "ICDIPR0_CPU2,Priority level register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPR1_CPU2,Priority level register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPR2_CPU2,Priority level register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPR3_CPU2,Priority level register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPR4_CPU2,Priority level register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPR5_CPU2,Priority level register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPR6_CPU2,Priority level register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPR7_CPU2,Priority level register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
tree "CPU2 Processor Targets"
|
|
rgroup.long 0x8800++0x1F
|
|
line.long 0x0 "ICDIPTR0_CPU2,Processor target register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPTR1_CPU2,Processor target register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPTR2_CPU2,Processor target register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPTR3_CPU2,Processor target register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPTR4_CPU2,Processor target register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPTR5_CPU2,Processor target register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPTR6_CPU2,Processor target register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPTR7_CPU2,Processor target register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
;section
|
|
tree "CPU2 Interrupt Configuration"
|
|
group.long 0x8C00++0x07
|
|
line.long 0x00 "ICDICFR0_CPU2,Interrupt Configuration SGI Register"
|
|
bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x04 "ICDICFR1_CPU2,Interrupt Configuration PPI Register"
|
|
bitfld.long 0x04 30.--31. " PPI[15] ,Interrupt Configuration PPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 28.--29. " PPI[14] ,Interrupt Configuration PPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 26.--27. " PPI[13] ,Interrupt Configuration PPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " PPI[12] ,Interrupt Configuration PPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 22.--23. " PPI[11] ,Interrupt Configuration PPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 20.--21. " PPI[10] ,Interrupt Configuration PPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " PPI[9] ,Interrupt Configuration PPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 16.--17. " PPI[8] ,Interrupt Configuration PPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 14.--15. " PPI[7] ,Interrupt Configuration PPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " PPI[6] ,Interrupt Configuration PPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 10.--11. " PPI[5] ,Interrupt Configuration PPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 8.--9. " PPI[4] ,Interrupt Configuration PPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " PPI[3] ,Interrupt Configuration PPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 4.--5. " PPI[2] ,Interrupt Configuration PPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 2.--3. " PPI[1] ,Interrupt Configuration PPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PPI[0] ,Interrupt Configuration PPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
tree.end
|
|
;section
|
|
tree "PPI Status"
|
|
width 17.
|
|
rgroup.long 0x8d00++0x03
|
|
line.long 0x00 "PPI_STATUS_CPU2,PPI Status Register"
|
|
bitfld.long 0x00 15. " PPI[15] ,PPI[15] Status" "Low,High"
|
|
bitfld.long 0x00 14. " PPI[14] ,PPI[14] Status" "Low,High"
|
|
bitfld.long 0x00 13. " PPI[13] ,PPI[13] Status" "Low,High"
|
|
bitfld.long 0x00 12. " PPI[12] ,PPI[12] Status" "Low,High"
|
|
bitfld.long 0x00 11. " PPI[11] ,PPI[11] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PPI[10] ,PPI[10] Status" "Low,High"
|
|
bitfld.long 0x00 9. " PPI[9] ,PPI[9] Status" "Low,High"
|
|
bitfld.long 0x00 8. " PPI[8] ,PPI[8] Status" "Low,High"
|
|
bitfld.long 0x00 7. " PPI[7] ,PPI[7] Status" "Low,High"
|
|
bitfld.long 0x00 6. " PPI[6] ,PPI[6] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PPI[5] ,PPI[5] Status" "Low,High"
|
|
bitfld.long 0x00 4. " PPI[4] ,PPI[4] Status" "Low,High"
|
|
bitfld.long 0x00 3. " PPI[3] ,PPI[3] Status" "Low,High"
|
|
bitfld.long 0x00 2. " PPI[2] ,PPI[2] Status" "Low,High"
|
|
bitfld.long 0x00 1. " PPI[1] ,PPI[1] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PPI[0] ,PPI[0] Status" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree "CPU3"
|
|
tree "Interrupt Security"
|
|
;section
|
|
width 14.
|
|
group.long 0xC080++0x03
|
|
line.long 0x00 "ICDISR0_CPU3,Interrupt Security Register[0]"
|
|
bitfld.long 0x00 31. " ITSP[15] ,Interrupt Secure PPI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 30. " ITSP[14] ,Interrupt Secure PPI[14]" "Secured,Non-secured"
|
|
bitfld.long 0x00 29. " ITSP[13] ,Interrupt Secure PPI[13]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ITSP[12] ,Interrupt Secure PPI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 27. " ITSP[11] ,Interrupt Secure PPI[11]" "Secured,Non-secured"
|
|
bitfld.long 0x00 26. " ITSP[10] ,Interrupt Secure PPI[10]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ITSP[9] ,Interrupt Secure PPI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 24. " ITSP[8] ,Interrupt Secure PPI[8]" "Secured,Non-secured"
|
|
bitfld.long 0x00 23. " ITSP[7] ,Interrupt Secure PPI[7]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ITSP[6] ,Interrupt Secure PPI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 21. " ITSP[5] ,Interrupt Secure PPI[5]" "Secured,Non-secured"
|
|
bitfld.long 0x00 20. " ITSP[4] ,Interrupt Secure PPI[4]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ITSP[3] ,Interrupt Secure PPI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 18. " ITSP[2] ,Interrupt Secure PPI[2]" "Secured,Non-secured"
|
|
bitfld.long 0x00 17. " ITSP[1] ,Interrupt Secure PPI[1]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ITSP[0] ,Interrupt Secure PPI[0]" "Secured,Non-secured"
|
|
bitfld.long 0x00 15. " ITSS[15] ,Interrupt Secure SGI[15]" "Secured,Non-secured"
|
|
bitfld.long 0x00 14. " ITSS[14] ,Interrupt Secure SGI[14]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ITSS[13] ,Interrupt Secure SGI[13]" "Secured,Non-secured"
|
|
bitfld.long 0x00 12. " ITSS[12] ,Interrupt Secure SGI[12]" "Secured,Non-secured"
|
|
bitfld.long 0x00 11. " ITSS[11] ,Interrupt Secure SGI[11]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITSS[10] ,Interrupt Secure SGI[10]" "Secured,Non-secured"
|
|
bitfld.long 0x00 9. " ITSS[9] ,Interrupt Secure SGI[9]" "Secured,Non-secured"
|
|
bitfld.long 0x00 8. " ITSS[8] ,Interrupt Secure SGI[8]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ITSS[7] ,Interrupt Secure SGI[7]" "Secured,Non-secured"
|
|
bitfld.long 0x00 6. " ITSS[6] ,Interrupt Secure SGI[6]" "Secured,Non-secured"
|
|
bitfld.long 0x00 5. " ITSS[5] ,Interrupt Secure SGI[5]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ITSS[4] ,Interrupt Secure SGI[4]" "Secured,Non-secured"
|
|
bitfld.long 0x00 3. " ITSS[3] ,Interrupt Secure SGI[3]" "Secured,Non-secured"
|
|
bitfld.long 0x00 2. " ITSS[2] ,Interrupt Secure SGI[2]" "Secured,Non-secured"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ITSS[1] ,Interrupt Secure SGI[1]" "Secured,Non-secured"
|
|
bitfld.long 0x00 0. " ITSS[0] ,Interrupt Secure SGI[0]" "Secured,Non-secured"
|
|
tree.end
|
|
tree "Interrupt Set-Enable"
|
|
group.byte 0xC100++0x3
|
|
line.long 0x00 "ICDISER0_CPU3,Interrupt Set-Enable Register 0"
|
|
bitfld.long 0x00 31. " ISET[31] ,Interrupt 31 Set" "No effect,Set"
|
|
bitfld.long 0x00 30. " ISET[30] ,Interrupt 30 Set" "No effect,Set"
|
|
bitfld.long 0x00 29. " ISET[29] ,Interrupt 29 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ISET[28] ,Interrupt 28 Set" "No effect,Set"
|
|
bitfld.long 0x00 27. " ISET[27] ,Interrupt 27 Set" "No effect,Set"
|
|
bitfld.long 0x00 26. " ISET[26] ,Interrupt 26 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ISET[25] ,Interrupt 25 Set" "No effect,Set"
|
|
bitfld.long 0x00 24. " ISET[24] ,Interrupt 24 Set" "No effect,Set"
|
|
bitfld.long 0x00 23. " ISET[23] ,Interrupt 23 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISET[22] ,Interrupt 22 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " ISET[21] ,Interrupt 21 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " ISET[20] ,Interrupt 20 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ISET[19] ,Interrupt 19 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " ISET[18] ,Interrupt 18 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " ISET[17] ,Interrupt 17 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ISET[16] ,Interrupt 16 Set" "No effect,Set"
|
|
bitfld.long 0x00 15. " ISET[15] ,Interrupt 15 Set" "No effect,Set"
|
|
bitfld.long 0x00 14. " ISET[14] ,Interrupt 14 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ISET[13] ,Interrupt 13 Set" "No effect,Set"
|
|
bitfld.long 0x00 12. " ISET[12] ,Interrupt 12 Set" "No effect,Set"
|
|
bitfld.long 0x00 11. " ISET[11] ,Interrupt 11 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISET[10] ,Interrupt 10 Set" "No effect,Set"
|
|
bitfld.long 0x00 9. " ISET[9] ,Interrupt 9 Set" "No effect,Set"
|
|
bitfld.long 0x00 8. " ISET[8] ,Interrupt 8 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ISET[7] ,Interrupt 7 Set" "No effect,Set"
|
|
bitfld.long 0x00 6. " ISET[6] ,Interrupt 6 Set" "No effect,Set"
|
|
bitfld.long 0x00 5. " ISET[5] ,Interrupt 5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ISET[4] ,Interrupt 4 Set" "No effect,Set"
|
|
bitfld.long 0x00 3. " ISET[3] ,Interrupt 3 Set" "No effect,Set"
|
|
bitfld.long 0x00 2. " ISET[2] ,Interrupt 2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ISET[1] ,Interrupt 1 Set" "No effect,Set"
|
|
bitfld.long 0x00 0. " ISET[0] ,Interrupt 0 Set" "No effect,Set"
|
|
tree.end
|
|
tree "Interrupt Clear-Enable"
|
|
group.long 0xC180++0x03
|
|
line.long 0x00 "ICDICER0_CPU3,Interrupt clear-enable register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CE_15 ,Clear-enable for PPI(15)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PPI_CE_14 ,Clear-enable for PPI(14)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PPI_CE_13 ,Clear-enable for PPI(13)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CE_12 ,Clear-enable for PPI(12)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PPI_CE_11 ,Clear-enable for PPI(11)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PPI_CE_10 ,Clear-enable for PPI(10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CE_9 ,Clear-enable for PPI(9)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PPI_CE_8 ,Clear-enable for PPI(8)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PPI_CE_7 ,Clear-enable for PPI(7)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CE_6 ,Clear-enable for PPI(6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PPI_CE_5 ,Clear-enable for PPI(5)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PPI_CE_4 ,Clear-enable for PPI(4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CE_3 ,Clear-enable for PPI(3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PPI_CE_2 ,Clear-enable for PPI(2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " PPI_CE_1 ,Clear-enable for PPI(1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CE_0 ,Clear-enable for PPI(0)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " SGI_CE_15 ,Clear-enable for SGI(15)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " SGI_CE_14 ,Clear-enable for SGI(14)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CE_13 ,Clear-enable for SGI(13)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " SGI_CE_12 ,Clear-enable for SGI(12)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " SGI_CE_11 ,Clear-enable for SGI(11)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CE_10 ,Clear-enable for SGI(10)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 9. " SGI_CE_9 ,Clear-enable for SGI(9)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8. " SGI_CE_8 ,Clear-enable for SGI(8)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CE_7 ,Clear-enable for SGI(7)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " SGI_CE_6 ,Clear-enable for SGI(6)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " SGI_CE_5 ,Clear-enable for SGI(5)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CE_4 ,Clear-enable for SGI(4)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 3. " SGI_CE_3 ,Clear-enable for SGI(3)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SGI_CE_2 ,Clear-enable for SGI(2)" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CE_1 ,Clear-enable for SGI(1)" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " SGI_CE_0 ,Clear-enable for SGI(0)" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending"
|
|
group.long 0xC200++0x03
|
|
line.long 0x00 "ICDISPR0_CPU3,Interrupt pending-set register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_SP_15 ,Set-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_SP_14 ,Set-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_SP_13 ,Set-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_SP_12 ,Set-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_SP_11 ,Set-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_SP_10 ,Set-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_SP_9 ,Set-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_SP_8 ,Set-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_SP_7 ,Set-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_SP_6 ,Set-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_SP_5 ,Set-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_SP_4 ,Set-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_SP_3 ,Set-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_SP_2 ,Set-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_SP_1 ,Set-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_SP_0 ,Set-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_SP_15 ,Set-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_SP_14 ,Set-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_SP_13 ,Set-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_SP_12 ,Set-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_SP_11 ,Set-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_SP_10 ,Set-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_SP_9 ,Set-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_SP_8 ,Set-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_SP_7 ,Set-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_SP_6 ,Set-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_SP_5 ,Set-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_SP_4 ,Set-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_SP_3 ,Set-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_SP_2 ,Set-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_SP_1 ,Set-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_SP_0 ,Set-pending for SGI(0)" "Not pending,Pending"
|
|
group.long 0xC280++0x03
|
|
line.long 0x00 "ICDICPR0_CPU3,Interrupt pending-clear register (SGI,PPI)"
|
|
bitfld.long 0x00 31. " PPI_CP15 ,Clear-pending for PPI(15)" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " PPI_CP14 ,Clear-pending for PPI(14)" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PPI_CP13 ,Clear-pending for PPI(13)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_CP12 ,Clear-pending for PPI(12)" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PPI_CP11 ,Clear-pending for PPI(11)" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PPI_CP10 ,Clear-pending for PPI(10)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_CP9 ,Clear-pending for PPI(9)" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " PPI_CP8 ,Clear-pending for PPI(8)" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " PPI_CP7 ,Clear-pending for PPI(7)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_CP6 ,Clear-pending for PPI(6)" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PPI_CP5 ,Clear-pending for PPI(5)" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PPI_CP4 ,Clear-pending for PPI(4)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_CP3 ,Clear-pending for PPI(3)" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PPI_CP2 ,Clear-pending for PPI(2)" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " PPI_CP1 ,Clear-pending for PPI(1)" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_CP0 ,Clear-pending for PPI(0)" "Not pending,Pending"
|
|
rbitfld.long 0x00 15. " SGI_CP15 ,Clear-pending for SGI(15)" "Not pending,Pending"
|
|
rbitfld.long 0x00 14. " SGI_CP14 ,Clear-pending for SGI(14)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " SGI_CP13 ,Clear-pending for SGI(13)" "Not pending,Pending"
|
|
rbitfld.long 0x00 12. " SGI_CP12 ,Clear-pending for SGI(12)" "Not pending,Pending"
|
|
rbitfld.long 0x00 11. " SGI_CP11 ,Clear-pending for SGI(11)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 10. " SGI_CP10 ,Clear-pending for SGI(10)" "Not pending,Pending"
|
|
rbitfld.long 0x00 9. " SGI_CP9 ,Clear-pending for SGI(9)" "Not pending,Pending"
|
|
rbitfld.long 0x00 8. " SGI_CP8 ,Clear-pending for SGI(8)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SGI_CP7 ,Clear-pending for SGI(7)" "Not pending,Pending"
|
|
rbitfld.long 0x00 6. " SGI_CP6 ,Clear-pending for SGI(6)" "Not pending,Pending"
|
|
rbitfld.long 0x00 5. " SGI_CP5 ,Clear-pending for SGI(5)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " SGI_CP4 ,Clear-pending for SGI(4)" "Not pending,Pending"
|
|
rbitfld.long 0x00 3. " SGI_CP3 ,Clear-pending for SGI(3)" "Not pending,Pending"
|
|
rbitfld.long 0x00 2. " SGI_CP2 ,Clear-pending for SGI(2)" "Not pending,Pending"
|
|
textline " "
|
|
rbitfld.long 0x00 1. " SGI_CP1 ,Clear-pending for SGI(1)" "Not pending,Pending"
|
|
rbitfld.long 0x00 0. " SGI_CP0 ,Clear-pending for SGI(0)" "Not pending,Pending"
|
|
tree.end
|
|
tree "Active Status"
|
|
rgroup.long 0xC300++0x03
|
|
line.long 0x00 "ICDABR0_CPU3,Active bit register (SGI/PPI)"
|
|
bitfld.long 0x00 31. " PPI_AS_15 ,Active status for PPI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 30. " PPI_AS_14 ,Active status for PPI(14)" "Inactive,Active"
|
|
bitfld.long 0x00 29. " PPI_AS_13 ,Active status for PPI(13)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " PPI_AS_12 ,Active status for PPI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 27. " PPI_AS_11 ,Active status for PPI(11)" "Inactive,Active"
|
|
bitfld.long 0x00 26. " PPI_AS_10 ,Active status for PPI(10)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PPI_AS_9 ,Active status for PPI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 24. " PPI_AS_8 ,Active status for PPI(8)" "Inactive,Active"
|
|
bitfld.long 0x00 23. " PPI_AS_7 ,Active status for PPI(7)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " PPI_AS_6 ,Active status for PPI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 21. " PPI_AS_5 ,Active status for PPI(5)" "Inactive,Active"
|
|
bitfld.long 0x00 20. " PPI_AS_4 ,Active status for PPI(4)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PPI_AS_3 ,Active status for PPI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 18. " PPI_AS_2 ,Active status for PPI(2)" "Inactive,Active"
|
|
bitfld.long 0x00 17. " PPI_AS_1 ,Active status for PPI(1)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PPI_AS_0 ,Active status for PPI(0)" "Inactive,Active"
|
|
bitfld.long 0x00 15. " SGI_AS_15 ,Active status for SGI(15)" "Inactive,Active"
|
|
bitfld.long 0x00 14. " SGI_AS_14 ,Active status for SGI(14)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SGI_AS_13 ,Active status for SGI(13)" "Inactive,Active"
|
|
bitfld.long 0x00 12. " SGI_AS_12 ,Active status for SGI(12)" "Inactive,Active"
|
|
bitfld.long 0x00 11. " SGI_AS_11 ,Active status for SGI(11)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " SGI_AS_10 ,Active status for SGI(10)" "Inactive,Active"
|
|
bitfld.long 0x00 9. " SGI_AS_9 ,Active status for SGI(9)" "Inactive,Active"
|
|
bitfld.long 0x00 8. " SGI_AS_8 ,Active status for SGI(8)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SGI_AS_7 ,Active status for SGI(7)" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SGI_AS_6 ,Active status for SGI(6)" "Inactive,Active"
|
|
bitfld.long 0x00 5. " SGI_AS_5 ,Active status for SGI(5)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SGI_AS_4 ,Active status for SGI(4)" "Inactive,Active"
|
|
bitfld.long 0x00 3. " SGI_AS_3 ,Active status for SGI(3)" "Inactive,Active"
|
|
bitfld.long 0x00 2. " SGI_AS_2 ,Active status for SGI(2)" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SGI_AS_1 ,Active status for SGI(1)" "Inactive,Active"
|
|
bitfld.long 0x00 0. " SGI_AS_0 ,Active status for SGI(0)" "Inactive,Active"
|
|
tree.end
|
|
;section
|
|
width 15.
|
|
tree "Priority Level"
|
|
group.long 0xC400++0x9F
|
|
line.long 0x0 "ICDIPR0_CPU3,Priority level register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPR1_CPU3,Priority level register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPR2_CPU3,Priority level register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPR3_CPU3,Priority level register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPR4_CPU3,Priority level register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPR5_CPU3,Priority level register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPR6_CPU3,Priority level register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPR7_CPU3,Priority level register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
tree "CPU3 Processor Targets"
|
|
rgroup.long 0xC800++0x1F
|
|
line.long 0x0 "ICDIPTR0_CPU3,Processor target register for SGI [3:0]"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x4 "ICDIPTR1_CPU3,Processor target register for SGI [7:4]"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x8 "ICDIPTR2_CPU3,Processor target register for SGI [11:8]"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0xC "ICDIPTR3_CPU3,Processor target register for SGI [15:12]"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x10 "ICDIPTR4_CPU3,Processor target register for PPI [3:0]"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x14 "ICDIPTR5_CPU3,Processor target register for PPI [7:4]"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x18 "ICDIPTR6_CPU3,Processor target register for PPI [11:8]"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
line.long 0x1C "ICDIPTR7_CPU3,Processor target register for PPI [15:12]"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PBO3 ,Byte offset 3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PBO2 ,Byte offset 2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PBO1 ,Byte offset 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PBO0 ,Byte offset 0"
|
|
tree.end
|
|
;section
|
|
tree "CPU3 Interrupt Configuration"
|
|
group.long 0xCC00++0x07
|
|
line.long 0x00 "ICDICFR0_CPU3,Interrupt Configuration SGI Register"
|
|
bitfld.long 0x00 30.--31. " SGI[15] ,Interrupt Configuration SGI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 28.--29. " SGI[14] ,Interrupt Configuration SGI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 26.--27. " SGI[13] ,Interrupt Configuration SGI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " SGI[12] ,Interrupt Configuration SGI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 22.--23. " SGI[11] ,Interrupt Configuration SGI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 20.--21. " SGI[10] ,Interrupt Configuration SGI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SGI[9] ,Interrupt Configuration SGI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 16.--17. " SGI[8] ,Interrupt Configuration SGI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 14.--15. " SGI[7] ,Interrupt Configuration SGI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SGI[6] ,Interrupt Configuration SGI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 10.--11. " SGI[5] ,Interrupt Configuration SGI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 8.--9. " SGI[4] ,Interrupt Configuration SGI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " SGI[3] ,Interrupt Configuration SGI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 4.--5. " SGI[2] ,Interrupt Configuration SGI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x00 2.--3. " SGI[1] ,Interrupt Configuration SGI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SGI[0] ,Interrupt Configuration SGI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
line.long 0x04 "ICDICFR1_CPU3,Interrupt Configuration PPI Register"
|
|
bitfld.long 0x04 30.--31. " PPI[15] ,Interrupt Configuration PPI[15]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 28.--29. " PPI[14] ,Interrupt Configuration PPI[14]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 26.--27. " PPI[13] ,Interrupt Configuration PPI[13]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 24.--25. " PPI[12] ,Interrupt Configuration PPI[12]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 22.--23. " PPI[11] ,Interrupt Configuration PPI[11]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 20.--21. " PPI[10] ,Interrupt Configuration PPI[10]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " PPI[9] ,Interrupt Configuration PPI[9]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 16.--17. " PPI[8] ,Interrupt Configuration PPI[8]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 14.--15. " PPI[7] ,Interrupt Configuration PPI[7]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " PPI[6] ,Interrupt Configuration PPI[6]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 10.--11. " PPI[5] ,Interrupt Configuration PPI[5]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 8.--9. " PPI[4] ,Interrupt Configuration PPI[4]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " PPI[3] ,Interrupt Configuration PPI[3]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 4.--5. " PPI[2] ,Interrupt Configuration PPI[2]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
bitfld.long 0x04 2.--3. " PPI[1] ,Interrupt Configuration PPI[1]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " PPI[0] ,Interrupt Configuration PPI[0]" "N-N software/Level high,1-N software/Level high,N-N software/Rising edge,1-N software/Rising edge"
|
|
tree.end
|
|
;section
|
|
tree "PPI Status"
|
|
width 17.
|
|
rgroup.long 0xCd00++0x03
|
|
line.long 0x00 "PPI_STATUS_CPU3,PPI Status Register"
|
|
bitfld.long 0x00 15. " PPI[15] ,PPI[15] Status" "Low,High"
|
|
bitfld.long 0x00 14. " PPI[14] ,PPI[14] Status" "Low,High"
|
|
bitfld.long 0x00 13. " PPI[13] ,PPI[13] Status" "Low,High"
|
|
bitfld.long 0x00 12. " PPI[12] ,PPI[12] Status" "Low,High"
|
|
bitfld.long 0x00 11. " PPI[11] ,PPI[11] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PPI[10] ,PPI[10] Status" "Low,High"
|
|
bitfld.long 0x00 9. " PPI[9] ,PPI[9] Status" "Low,High"
|
|
bitfld.long 0x00 8. " PPI[8] ,PPI[8] Status" "Low,High"
|
|
bitfld.long 0x00 7. " PPI[7] ,PPI[7] Status" "Low,High"
|
|
bitfld.long 0x00 6. " PPI[6] ,PPI[6] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PPI[5] ,PPI[5] Status" "Low,High"
|
|
bitfld.long 0x00 4. " PPI[4] ,PPI[4] Status" "Low,High"
|
|
bitfld.long 0x00 3. " PPI[3] ,PPI[3] Status" "Low,High"
|
|
bitfld.long 0x00 2. " PPI[2] ,PPI[2] Status" "Low,High"
|
|
bitfld.long 0x00 1. " PPI[1] ,PPI[1] Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PPI[0] ,PPI[0] Status" "Low,High"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Combiner"
|
|
base ad:0x10440000
|
|
width 7.
|
|
group.long 0x08++0x03 "INTC0"
|
|
line.long 0x00 "ISTR0,Interrupt Status Register 0"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " NCTIIRQ_ISP_set/clr ,NCTIIRQ_ISP interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PMUIRQ_ISP_set/clr ,PMUIRQ_ISP interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " TMU_set/clr ,TMU INTG3 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " NCTIIRQ[1]_set/clr ,NCTIIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " PMUIRQ[1]_set/clr ,PMUIRQ[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " PARITYFAILSCU[1]_set/clr ,PARITYFAILSCU[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " PARITYFAIL1_set/clr ,PARITYFAIL1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " PARRINTR_set/clr ,PARRINTR[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " PARRDINTR_set/clr ,PARRDINTR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " TMU_set/clr ,TMU INTG2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " NCTIIRQ[0]_set/clr ,nCTIIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " PMUIRQ[0]_set/clr ,PMUIRQ[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " PARITYFAILSCU[0]_set/clr ,PARITYFAILSCU[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " PARITYFAIL0_set/clr ,PARITYFAIL0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TZASC1[1]_set/clr ,TZASC1[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TZASC1[0]_set/clr ,TZASC1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TZASC0[1]_set/clr ,TZASC0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TZASC0[0]_set/clr ,TZASC0[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IMSR0,Interrupt Masked Status Register 0"
|
|
bitfld.long 0x00 30. " NCTIIRQ_ISP ,NCTIIRQ_ISP interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PMUIRQ_ISP ,PMUIRQ_ISP interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " TMU ,TMU INTG3 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " NCTIIRQ[1] ,NCTIIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " PMUIRQ[1] ,PMUIRQ[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PARITYFAILSCU[1] ,PARITYFAILSCU[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PARITYFAIL1 ,PARITYFAIL1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " PARRINTR ,PARRINTR[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PARRDINTR ,PARRDINTR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TMU ,TMU INTG2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " NCTIIRQ[0] ,nCTIIRQ[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " PMUIRQ[0] ,PMUIRQ[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PARITYFAILSCU[0] ,PARITYFAILSCU[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " PARITYFAIL0 ,PARITYFAIL0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " TZASC1[1] ,TZASC1[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TZASC1[0] ,TZASC1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " TZASC0[1] ,TZASC0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " TZASC0[0] ,TZASC0[0] interrupt" "Not pending,Pending"
|
|
group.long 0x18++0x03 "INTC1"
|
|
line.long 0x00 "ISTR1,Interrupt Status Register 1"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SYSMMU_MFC_M1[1]_set/clr ,SYSMMU_MFC_M1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " SYSMMU_MFC_M0[1]_set/clr ,SYSMMU_MFC_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " SYSMMU_TV_M0[1]_set/clr ,SYSMMU_TV_M0[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " SYSMMU_LCD0_M0[1]_set/clr ,SYSMMU_LCD0_M0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " SYSMMU_GPS[1]_set/clr ,SYSMMU_MDMA1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SYSMMU_ROTATOR[1]_set/clr ,SYSMMU_ROTATOR[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " SYSMMU_2D[1]_set/clr ,SYSMMU_2D[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SYSMMU_JPEG[1]_set/clr ,SYSMMU_JPEG[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SYSMMU_FIMC3[1]_set/clr ,SYSMMU_FIMC3[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " SYSMMU_FIMC2[1]_set/clr ,SYSMMU_FIMC2[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " SYSMMU_FIMC1[1]_set/clr ,SYSMMU_FIMC1[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " SYSMMU_FIMC0[1]_set/clr ,SYSMMU_FIMC0[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " SYSMMU_SSS[1]_set/clr ,SYSMMU_SSS[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " SYSMMU_MDMA[1]_set/clr ,SYSMMU_MDMA[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " SYSMMU_MFC_M1[0]_set/clr ,SYSMMU_MFC_M1[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_MFC_M0[0]_set/clr ,SYSMMU_MFC_M0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_TV_M0[0]_set/clr ,SYSMMU_TV_M0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SYSMMU_LCD0_M0[0]_set/clr ,SYSMMU_LCD0_M0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SYSMMU_GPS[0]_set/clr ,SYSMMU_GPS[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SYSMMU_ROTATOR[0]_set/clr ,SYSMMU_ROTATOR[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " SYSMMU_2D[0]_set/clr ,SYSMMU_2D[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " SYSMMU_JPEG[0]_set/clr ,SYSMMU_JPEG[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_FIMC3[0]_set/clr ,SYSMMU_FIMC3[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SYSMMU_FIMC2[0]_set/clr ,SYSMMU_FIMC2[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " SYSMMU_FIMC1[0]_set/clr ,SYSMMU_FIMC1[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_FIMC0[0]_set/clr ,SYSMMU_FIMC0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_SSS[0]_set/clr ,SYSMMU_SSS[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " SYSMMU_MDMA[0]_set/clr ,SYSMMU_MDMA[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IMSR1,Interrupt Masked Status Register 1"
|
|
bitfld.long 0x00 30. " SYSMMU_MFC_M1[1] ,SYSMMU_MFC_M1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " SYSMMU_MFC_M0[1] ,SYSMMU_MFC_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " SYSMMU_TV_M0[1] ,SYSMMU_TV_M0[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SYSMMU_LCD0_M0[1] ,SYSMMU_LCD0_M0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " SYSMMU_GPS[1] ,SYSMMU_GPS[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SYSMMU_ROTATOR[1] ,SYSMMU_ROTATOR[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SYSMMU_2D[1] ,SYSMMU_2D[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " SYSMMU_JPEG[1] ,SYSMMU_JPEG[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " SYSMMU_FIMC3[1] ,SYSMMU_FIMC3[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SYSMMU_FIMC2[1] ,SYSMMU_FIMC2[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " SYSMMU_FIMC1[1] ,SYSMMU_FIMC1[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " SYSMMU_FIMC0[1] ,SYSMMU_FIMC0[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SYSMMU_SSS[1] ,SYSMMU_SSS[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " SYSMMU_MDMA[1] ,SYSMMU_MDMA[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " SYSMMU_MFC_M1[0] ,SYSMMU_MFC_M1[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SYSMMU_MFC_M0[0] ,SYSMMU_MFC_M0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_TV_M0[0] ,SYSMMU_TV_M0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " SYSMMU_LCD0_M0[0] ,SYSMMU_LCD0_M0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SYSMMU_GPS[0] ,SYSMMU_GPS[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " SYSMMU_ROTATOR[0] ,SYSMMU_ROTATOR[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " SYSMMU_2D[0] ,SYSMMU_2D[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SYSMMU_JPEG[0] ,SYSMMU_JPEG[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SYSMMU_FIMC3[0] ,SYSMMU_FIMC3[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " SYSMMU_FIMC2[0] ,SYSMMU_FIMC2[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYSMMU_FIMC1[0] ,SYSMMU_FIMC1[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_FIMC0[0] ,SYSMMU_FIMC0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " SYSMMU_SSS[0] ,SYSMMU_SSS[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSMMU_MDMA[0] ,SYSMMU_MDMA[0] interrupt" "Not pending,Pending"
|
|
group.long 0x28++0x03 "INTC2"
|
|
line.long 0x00 "ISTR2,Interrupt Status Register 2"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " LCD0[3]_set/clr ,LCD0[3] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " LCD0[2]_set/clr ,LCD0[2] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " LCD0[1]_set/clr ,LCD0[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " LCD0[0]_set/clr ,LCD0[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " DMC1_PPC_PEREV_M_set/clr ,DMC1_PPC_PEREV_M interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " DMC1_PPC_PEREV_A_set/clr ,DMC1_PPC_PEREV_A interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " DMC0_PPC_PEREV_M_set/clr ,DMC0_PPC_PEREV_M interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " DMC0_PPC_PEREV_A_set/clr ,DMC0_PPC_PEREV_A interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " ADC_set/clr ,ADC interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " L2CACHE_set/clr ,L2CACHE interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " RP_TIMER_set/clr ,RP_TIMER interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " GPIO_AUDIO_set/clr ,GPIO_AUDIO interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " PPMU_MFC_M1_set/clr ,PPMU_MFC_M1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " PPMU_MFC_M0_set/clr ,PPMU_MFC_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PPMU_3D_set/clr ,PPMU_3D interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PPMU_TV_M0_set/clr ,PPMU_TV_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " PPMU_FILE_D_M0_set/clr ,PPMU_FILE_D_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PPMU_ISP_MX_set/clr ,PPMU__ISP_MX interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PPMU_LCD0_set/clr ,SPPMU_LCD0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PPMU_IMAGE_M0_set/clr ,PPMU_IMAGE_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " PPMU_CAMIF_M0_set/clr ,PPMU_CAMIF_M0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " PPMU_D_RIGHT_M0_set/clr ,PPMU_D_RIGHT_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " PPMU_D_LEFT_M0_set/clr ,PPMU_D_LEFT_M0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PPMU_ACP0_M0_set/clr ,PPMU_ACP0_M0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PPMU_XIU_R_S1_set/clr ,PPMU_XIU_R_S1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PPMU_XIU_R_set/clr ,PPMU_XIU_R interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PPMU_XIU_L_set/clr ,PPMU_XIU_L interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x02C++0x03
|
|
line.long 0x00 "IMSR2,Interrupt Masked Status Register"
|
|
bitfld.long 0x00 27. " LCD0[3] ,LCD0[3] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " LCD0[2] ,LCD0[2] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " LCD0[1] ,LCD0[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LCD0[0] ,LCD0[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 23. " DMC1_PPC_PEREV_M ,DMC1_PPC_PEREV_M interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " DMC1_PPC_PEREV_A ,DMC1_PPC_PEREV_A interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DMC0_PPC_PEREV_M ,DMC0_PPC_PEREV_M interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " DMC0_PPC_PEREV_A ,DMC0_PPC_PEREV_A interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 19. " ADC ,ADC interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 18. " L2CACHE ,L2CACHE interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " RP_TIMER ,RP_TIMER interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " GPIO_AUDIO ,GPIO_AUDIO interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PPMU_MFC_M1 ,PPMU_MFC_M1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " PPMU_MFC_M0 ,PPMU_MFC_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " PPMU_3D ,PPMU_3D interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPMU_TV_M0 ,PPMU_TV_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " PPMU_FILE_D_M0 ,PPMU_FILE_D_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " PPMU_ISP_MX ,PPMU_ISP_MX interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PPMU_LCD0 ,SPPMU_LCD0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " PPMU_IMAGE_M0 ,PPMU_IMAGE_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " PPMU_CAMIF_M0 ,PPMU_CAMIF_M0 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PPMU_D_RIGHT_M0 ,PPMU_D_RIGHT_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " PPMU_D_LEFT_M0 ,PPMU_D_LEFT_M0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " PPMU_ACP0_M0 ,PPMU_ACP0_M0 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PPMU_XIU_R_S1 ,PPMU_XIU_R_S1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " PPMU_XIU_R ,PPMU_XIU_R interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " PPMU_XIU_L ,PPMU_XIU_L interrupt" "Not pending,Pending"
|
|
group.long 0x38++0x03 "INTC3"
|
|
line.long 0x00 "ISTR3,Interrupt Status Register 3"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DECERRINTR_set/clr ,DECERRINTR interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " SLVERRINTR_set/clr ,SLVERRINTR interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " ERRRDINTR_set/clr ,ERRRDINTR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " ERRRTINTR_set/clr ,ERRRTINTR interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " ERRWDINTR_set/clr ,ERRWDINTR interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " ERRWTINTR_set/clr ,ERRWTINTR interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " ECNTRINTR_set/clr ,ECNTRINTR interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " SCUEVABORT_set/clr ,SCUEVABORT interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CPU_NIRQOUT_1_set/clr ,CPU_nIRQOUT_1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CPU_NIRQOUT_0_set/clr ,CPU_nIRQOUT_0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MCT_G3_set/clr ,MCT_G3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " MCT_G2_set/clr ,MCT_G2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " MCT_G1_set/clr ,MCT_G1 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " MCT_G0_set/clr ,MCT_G0 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MIPI_HSI]_set/clr ,MIPI_HSI] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " UART4_set/clr ,UART4 interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "IMSR3,Interrupt Masked Status Register 3"
|
|
bitfld.long 0x00 31. " DECERRINTR ,DECERRINTR interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " SLVERRINTR ,SLVERRINTR interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " ERRRDINTR ,ERRRDINTR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ERRRTINTR ,ERRRTINTR interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " ERRWDINTR ,ERRWDINTR interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " ERRWTINTR ,ERRWTINTR interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ECNTRINTR ,ECNTRINTR interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " SCUEVABORT ,SCUEVABORT interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " CPU_NIRQOUT_1 ,CPU_nIRQOUT_1 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CPU_NIRQOUT_0 ,CPU_nIRQOUT_0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " MCT_G3 ,MCT_G3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " MCT_G2 ,MCT_G2 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MCT_G1 ,MCT_G1 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " MCT_G0 ,MCT_G0 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " MIPI_HSI] ,MIPI_HSI] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " UART4 ,UART4 interrupt" "Not pending,Pending"
|
|
width 8.
|
|
group.long 0x48++0x03 "INTC4"
|
|
line.long 0x00 "ISTR4,Interrupt Status Register 4"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CPU_NIRQOUT_3_set/clr ,CPU_NIRQOUT_3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " PARITYFAILSCU3_set/clr ,PARITYFAILSCU3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " PARITYFAIL3_set/clr ,PARITYFAIL3 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CPU_NCTIIRQ_3_set/clr ,CPU_NCTIIRQ_3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CPU_PMUIRQ_3_set/clr ,CPU_PMUIRQ_3 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " MCT_L0_set/clr ,MCT_L0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CPU_NIRQOUT_2_set/clr ,CPU_NIRQOUT_2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " PARITYFAILSCU2_set/clr ,PARITYFAILSCU2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " PARITYFAIL2_set/clr ,PARITYFAIL2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CPU_NCTIIRQ_2_set/clr ,CPU_NCTIIRQ_2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CPU_PMUIRQ_2_set/clr ,CPU_PMUIRQ_2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " MCT_L1_set/clr ,MCT_L1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " MCT_L2_set/clr ,MCT_L2 interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " SYSMMU_ISP_CX[1]_set/clr ,SYSMMU_ISP_CX[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SYSMMU_FIMC_FD[1]_set/clr ,SYSMMU_FIMC_FD[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " SYSMMU_FIMC_DRC[1]_set/clr ,SYSMMU_FIMC_DRC[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SYSMMU_FIMC_ISP[1]_set/clr ,SYSMMU_FIMC_ISP[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SYSMMU_FIMC_LITE0[1]_set/clr ,SYSMMU_FIMC_LITE0[1] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SYSMMU_FIMC_LITE0[1]_set/clr ,SYSMMU_FIMC_LITE0[1] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " SYSMMU_ISP_CX[0]_set/clr ,SYSMMU_ISP_CX[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SYSMMU_FIMC_FD[0]_set/clr ,SYSMMU_FIMC_FD[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " SYSMMU_FIMC_DRC[0]_set/clr ,SYSMMU_FIMC_DRC[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SYSMMU_FIMC_ISP[0]_set/clr ,SYSMMU_FIMC_ISP[0] interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SYSMMU_FIMC_LITE0[0]_set/clr ,SYSMMU_FIMC_LITE0[0] interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " SYSMMU_FIMC_LITE0[0]_set/clr ,SYSMMU_FIMC_LITE0[0] interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "IMSR4,Interrupt Masked Status Register 4"
|
|
bitfld.long 0x00 30. " CPU_NIRQOUT_3 ,CPU_NIRQOUT_3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " PARITYFAILSCU3 ,PARITYFAILSCU3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " PARITYFAIL3 ,PARITYFAIL3 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CPU_NCTIIRQ_3 ,CPU_NCTIIRQ_3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " CPU_PMUIRQ_3 ,CPU_PMUIRQ_3 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " MCT_L0 ,MCT_L0 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CPU_NIRQOUT_2 ,CPU_NIRQOUT_2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " PARITYFAILSCU2 ,PARITYFAILSCU2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " PARITYFAIL2 ,PARITYFAIL2 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CPU_NCTIIRQ_2 ,CPU_NCTIIRQ_2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " CPU_PMUIRQ_2 ,CPU_PMUIRQ_2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MCT_L1 ,MCT_L1 interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MCT_L2 ,MCT_L2 interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " SYSMMU_ISP_CX[1] ,SYSMMU_ISP_CX[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " SYSMMU_FIMC_FD[1] ,SYSMMU_FIMC_FD[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYSMMU_FIMC_DRC[1] ,SYSMMU_FIMC_DRC[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " SYSMMU_FIMC_ISP[1] ,SYSMMU_FIMC_ISP[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 9. " SYSMMU_FIMC_LITE0[1] ,SYSMMU_FIMC_LITE0[1] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SYSMMU_FIMC_LITE0[1] ,SYSMMU_FIMC_LITE0[1] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " SYSMMU_ISP_CX[0] ,SYSMMU_ISP_CX[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " SYSMMU_FIMC_FD[0] ,SYSMMU_FIMC_FD[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYSMMU_FIMC_DRC[0] ,SYSMMU_FIMC_DRC[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " SYSMMU_FIMC_ISP[0] ,SYSMMU_FIMC_ISP[0] interrupt" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " SYSMMU_FIMC_LITE0[0] ,SYSMMU_FIMC_LITE0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSMMU_FIMC_LITE0[0] ,SYSMMU_FIMC_LITE0[0] interrupt" "Not pending,Pending"
|
|
textline " "
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "CIPSR0,Current interrupt pending status register 0"
|
|
bitfld.long 0x00 19. " INT19 ,INT19 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " INT18 ,INT18 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 17. " INT17 ,INT17 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " INT16 ,INT16 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " INT15 ,INT15 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " INT14 ,INT14 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " INT13 ,INT13 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " INT12 ,INT12 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " INT11 ,INT11 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " INT10 ,INT10 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT9 ,INT9 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " INT8 ,INT8 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " INT7 ,INT7 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " INT6 ,INT6 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 5. " INT5 ,INT5 combined interrupt pending status" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT4 ,INT4 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " INT3 ,INT3 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " INT2 ,INT2 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 1. " INT1 ,INT1 combined interrupt pending status" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT0 ,INT0 combined interrupt pending status" "Not pending,Pending"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "DMA Controller"
|
|
tree "MDMA"
|
|
base ad:0x12840000
|
|
width 13.
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
else
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DS,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "ES,Event status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTSTATUS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Clear"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "FSM,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS[7] ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS[6] ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS[5] ,Fault status of the channel 5" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FAULT_STATUS[4] ,Fault status of the channel 4" "Not present,Present"
|
|
bitfld.long 0x04 3. " FAULT_STATUS[3] ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS[2] ,Fault status of the channel 2" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT_STATUS[1] ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS[0] ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTM,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA0"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "FTC0,Fault type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "CS0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x00 "SA_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CC_0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "FTC1,Fault type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x108++0x07
|
|
line.long 0x00 "CS1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
rgroup.long 0x420++0x13
|
|
line.long 0x00 "SA_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CC_1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA2"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FTC2,Fault type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "CS2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
rgroup.long 0x440++0x13
|
|
line.long 0x00 "SA_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CC_2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA3"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "FTC3,Fault type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x118++0x07
|
|
line.long 0x00 "CS3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
rgroup.long 0x460++0x13
|
|
line.long 0x00 "SA_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CC_3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA4"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FTC4,Fault type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "CS4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
rgroup.long 0x480++0x13
|
|
line.long 0x00 "SA_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CC_4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA5"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "FTC5,Fault type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x128++0x07
|
|
line.long 0x00 "CS5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
rgroup.long 0x4A0++0x13
|
|
line.long 0x00 "SA_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CC_5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA6"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FTC6,Fault type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x130++0x07
|
|
line.long 0x00 "CS6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
rgroup.long 0x4C0++0x13
|
|
line.long 0x00 "SA_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CC_6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA7"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FTC7,Fault type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x138++0x07
|
|
line.long 0x00 "CS7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
rgroup.long 0x4E0++0x13
|
|
line.long 0x00 "SA_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CC_7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0x12840000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
rgroup.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRDn,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,DMAC response on detected look-up condition" "Abort DMAC channels,Sets IRQ_ABORT high"
|
|
endif
|
|
rgroup.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision number" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree "PDMA0"
|
|
base ad:0x12680000
|
|
width 13.
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
else
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DS,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "ES,Event status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTSTATUS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Clear"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "FSM,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS[7] ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS[6] ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS[5] ,Fault status of the channel 5" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FAULT_STATUS[4] ,Fault status of the channel 4" "Not present,Present"
|
|
bitfld.long 0x04 3. " FAULT_STATUS[3] ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS[2] ,Fault status of the channel 2" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT_STATUS[1] ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS[0] ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTM,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA0"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "FTC0,Fault type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "CS0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x00 "SA_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CC_0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "FTC1,Fault type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x108++0x07
|
|
line.long 0x00 "CS1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
rgroup.long 0x420++0x13
|
|
line.long 0x00 "SA_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CC_1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA2"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FTC2,Fault type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "CS2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
rgroup.long 0x440++0x13
|
|
line.long 0x00 "SA_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CC_2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA3"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "FTC3,Fault type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x118++0x07
|
|
line.long 0x00 "CS3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
rgroup.long 0x460++0x13
|
|
line.long 0x00 "SA_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CC_3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA4"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FTC4,Fault type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "CS4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
rgroup.long 0x480++0x13
|
|
line.long 0x00 "SA_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CC_4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA5"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "FTC5,Fault type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x128++0x07
|
|
line.long 0x00 "CS5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
rgroup.long 0x4A0++0x13
|
|
line.long 0x00 "SA_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CC_5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA6"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FTC6,Fault type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x130++0x07
|
|
line.long 0x00 "CS6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
rgroup.long 0x4C0++0x13
|
|
line.long 0x00 "SA_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CC_6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA7"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FTC7,Fault type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x138++0x07
|
|
line.long 0x00 "CS7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
rgroup.long 0x4E0++0x13
|
|
line.long 0x00 "SA_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CC_7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0x12680000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
rgroup.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRDn,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,DMAC response on detected look-up condition" "Abort DMAC channels,Sets IRQ_ABORT high"
|
|
endif
|
|
rgroup.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision number" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree "PDMA1"
|
|
base ad:0x12690000
|
|
width 13.
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DSR,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
else
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "DS,DMA manager status register"
|
|
bitfld.long 0x00 9. " DNS ,Provides the security status of the DMA manager thread" "Secure,Non-secure"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_EVENT ,Wakeup event" "Event[0],Event[1],Event[2],Event[3],Event[4],Event[5],Event[6],Event[7],Event[8],Event[9],Event[10],Event[11],Event[12],Event[13],Event[14],Event[15],Event[16],Event[17],Event[18],Event[19],Event[20],Event[21],Event[22],Event[23],Event[24],Event[25],Event[26],Event[27],Event[28],Event[29],Event[30],Event[31]"
|
|
bitfld.long 0x00 0.--3. " DMA_STATUS ,The operating state of the DMA manager" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Faulting"
|
|
line.long 0x04 "DPC,DMA Program Counter Register"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x00 31. " EVENT_IRQ_SELECT[31] ,Event Interrupt Request Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EVENT_IRQ_SELECT[30] ,Event Interrupt Request Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EVENT_IRQ_SELECT[29] ,Event Interrupt Request Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EVENT_IRQ_SELECT[28] ,Event Interrupt Request Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EVENT_IRQ_SELECT[27] ,Event Interrupt Request Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EVENT_IRQ_SELECT[26] ,Event Interrupt Request Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EVENT_IRQ_SELECT[25] ,Event Interrupt Request Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EVENT_IRQ_SELECT[24] ,Event Interrupt Request Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EVENT_IRQ_SELECT[23] ,Event Interrupt Request Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EVENT_IRQ_SELECT[22] ,Event Interrupt Request Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EVENT_IRQ_SELECT[21] ,Event Interrupt Request Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EVENT_IRQ_SELECT[20] ,Event Interrupt Request Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EVENT_IRQ_SELECT[19] ,Event Interrupt Request Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EVENT_IRQ_SELECT[18] ,Event Interrupt Request Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EVENT_IRQ_SELECT[17] ,Event Interrupt Request Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EVENT_IRQ_SELECT[16] ,Event Interrupt Request Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EVENT_IRQ_SELECT[15] ,Event Interrupt Request Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EVENT_IRQ_SELECT[14] ,Event Interrupt Request Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVENT_IRQ_SELECT[13] ,Event Interrupt Request Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EVENT_IRQ_SELECT[12] ,Event Interrupt Request Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EVENT_IRQ_SELECT[11] ,Event Interrupt Request Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EVENT_IRQ_SELECT[10] ,Event Interrupt Request Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EVENT_IRQ_SELECT[9] ,Event Interrupt Request Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EVENT_IRQ_SELECT[8] ,Event Interrupt Request Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVENT_IRQ_SELECT[7] ,Event Interrupt Request Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EVENT_IRQ_SELECT[6] ,Event Interrupt Request Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EVENT_IRQ_SELECT[5] ,Event Interrupt Request Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EVENT_IRQ_SELECT[4] ,Event Interrupt Request Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EVENT_IRQ_SELECT[3] ,Event Interrupt Request Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EVENT_IRQ_SELECT[2] ,Event Interrupt Request Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVENT_IRQ_SELECT[1] ,Event Interrupt Request Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EVENT_IRQ_SELECT[0] ,Event Interrupt Request Enable 0" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "ES,Event status register"
|
|
bitfld.long 0x00 31. " DMASEV_ACTIVE[31] ,Status of the event-interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x00 30. " DMASEV_ACTIVE[30] ,Status of the event-interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x00 29. " DMASEV_ACTIVE[29] ,Status of the event-interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " DMASEV_ACTIVE[28] ,Status of the event-interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x00 27. " DMASEV_ACTIVE[27] ,Status of the event-interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x00 26. " DMASEV_ACTIVE[26] ,Status of the event-interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " DMASEV_ACTIVE[25] ,Status of the event-interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x00 24. " DMASEV_ACTIVE[24] ,Status of the event-interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x00 23. " DMASEV_ACTIVE[23] ,Status of the event-interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DMASEV_ACTIVE[22] ,Status of the event-interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x00 21. " DMASEV_ACTIVE[21] ,Status of the event-interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x00 20. " DMASEV_ACTIVE[20] ,Status of the event-interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DMASEV_ACTIVE[19] ,Status of the event-interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x00 18. " DMASEV_ACTIVE[18] ,Status of the event-interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x00 17. " DMASEV_ACTIVE[17] ,Status of the event-interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DMASEV_ACTIVE[16] ,Status of the event-interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x00 15. " DMASEV_ACTIVE[15] ,Status of the event-interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x00 14. " DMASEV_ACTIVE[14] ,Status of the event-interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DMASEV_ACTIVE[13] ,Status of the event-interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x00 12. " DMASEV_ACTIVE[12] ,Status of the event-interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x00 11. " DMASEV_ACTIVE[11] ,Status of the event-interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DMASEV_ACTIVE[10] ,Status of the event-interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x00 9. " DMASEV_ACTIVE[9] ,Status of the event-interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x00 8. " DMASEV_ACTIVE[8] ,Status of the event-interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DMASEV_ACTIVE[7] ,Status of the event-interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x00 6. " DMASEV_ACTIVE[6] ,Status of the event-interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x00 5. " DMASEV_ACTIVE[5] ,Status of the event-interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMASEV_ACTIVE[4] ,Status of the event-interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x00 3. " DMASEV_ACTIVE[3] ,Status of the event-interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x00 2. " DMASEV_ACTIVE[2] ,Status of the event-interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMASEV_ACTIVE[1] ,Status of the event-interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x00 0. " DMASEV_ACTIVE[0] ,Status of the event-interrupt 0" "Inactive,Active"
|
|
line.long 0x04 "INTSTATUS,Interrupt status register"
|
|
bitfld.long 0x04 31. " IRQ_STATUS[31] ,Status of the interrupt 31" "Inactive,Active"
|
|
bitfld.long 0x04 30. " IRQ_STATUS[30] ,Status of the interrupt 30" "Inactive,Active"
|
|
bitfld.long 0x04 29. " IRQ_STATUS[29] ,Status of the interrupt 29" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ_STATUS[28] ,Status of the interrupt 28" "Inactive,Active"
|
|
bitfld.long 0x04 27. " IRQ_STATUS[27] ,Status of the interrupt 27" "Inactive,Active"
|
|
bitfld.long 0x04 26. " IRQ_STATUS[26] ,Status of the interrupt 26" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ_STATUS[25] ,Status of the interrupt 25" "Inactive,Active"
|
|
bitfld.long 0x04 24. " IRQ_STATUS[24] ,Status of the interrupt 24" "Inactive,Active"
|
|
bitfld.long 0x04 23. " IRQ_STATUS[23] ,Status of the interrupt 23" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ_STATUS[22] ,Status of the interrupt 22" "Inactive,Active"
|
|
bitfld.long 0x04 21. " IRQ_STATUS[21] ,Status of the interrupt 21" "Inactive,Active"
|
|
bitfld.long 0x04 20. " IRQ_STATUS[20] ,Status of the interrupt 20" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ_STATUS[19] ,Status of the interrupt 19" "Inactive,Active"
|
|
bitfld.long 0x04 18. " IRQ_STATUS[18] ,Status of the interrupt 18" "Inactive,Active"
|
|
bitfld.long 0x04 17. " IRQ_STATUS[17] ,Status of the interrupt 17" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ_STATUS[16] ,Status of the interrupt 16" "Inactive,Active"
|
|
bitfld.long 0x04 15. " IRQ_STATUS[15] ,Status of the interrupt 15" "Inactive,Active"
|
|
bitfld.long 0x04 14. " IRQ_STATUS[14] ,Status of the interrupt 14" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ_STATUS[13] ,Status of the interrupt 13" "Inactive,Active"
|
|
bitfld.long 0x04 12. " IRQ_STATUS[12] ,Status of the interrupt 12" "Inactive,Active"
|
|
bitfld.long 0x04 11. " IRQ_STATUS[11] ,Status of the interrupt 11" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ_STATUS[10] ,Status of the interrupt 10" "Inactive,Active"
|
|
bitfld.long 0x04 9. " IRQ_STATUS[9] ,Status of the interrupt 9" "Inactive,Active"
|
|
bitfld.long 0x04 8. " IRQ_STATUS[8] ,Status of the interrupt 8" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ_STATUS[7] ,Status of the interrupt 7" "Inactive,Active"
|
|
bitfld.long 0x04 6. " IRQ_STATUS[6] ,Status of the interrupt 6" "Inactive,Active"
|
|
bitfld.long 0x04 5. " IRQ_STATUS[5] ,Status of the interrupt 5" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ_STATUS[4] ,Status of the interrupt 4" "Inactive,Active"
|
|
bitfld.long 0x04 3. " IRQ_STATUS[3] ,Status of the interrupt 3" "Inactive,Active"
|
|
bitfld.long 0x04 2. " IRQ_STATUS[2] ,Status of the interrupt 2" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ_STATUS[1] ,Status of the interrupt 1" "Inactive,Active"
|
|
bitfld.long 0x04 0. " IRQ_STATUS[0] ,Status of the interrupt 0" "Inactive,Active"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "INTCLR,Interrupt clear register"
|
|
bitfld.long 0x00 31. " IRQ_CLR[31] ,Interrupt 31 clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IRQ_CLR[30] ,Interrupt 30 clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IRQ_CLR[29] ,Interrupt 29 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQ_CLR[28] ,Interrupt 28 clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " IRQ_CLR[27] ,Interrupt 27 clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " IRQ_CLR[26] ,Interrupt 26 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ_CLR[25] ,Interrupt 25 clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IRQ_CLR[24] ,Interrupt 24 clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ_CLR[23] ,Interrupt 23 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQ_CLR[22] ,Interrupt 22 clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " IRQ_CLR[21] ,Interrupt 21 clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ_CLR[20] ,Interrupt 20 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ_CLR[19] ,Interrupt 19 clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " IRQ_CLR[18] ,Interrupt 18 clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ_CLR[17] ,Interrupt 17 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQ_CLR[16] ,Interrupt 16 clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " IRQ_CLR[15] ,Interrupt 15 clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IRQ_CLR[14] ,Interrupt 14 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ_CLR[13] ,Interrupt 13 clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " IRQ_CLR[12] ,Interrupt 12 clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IRQ_CLR[11] ,Interrupt 11 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQ_CLR[10] ,Interrupt 10 clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " IRQ_CLR[9] ,Interrupt 9 clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IRQ_CLR[8] ,Interrupt 8 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ_CLR[7] ,Interrupt 7 clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRQ_CLR[6] ,Interrupt 6 clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IRQ_CLR[5] ,Interrupt 5 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ_CLR[4] ,Interrupt 4 clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IRQ_CLR[3] ,Interrupt 3 clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IRQ_CLR[2] ,Interrupt 2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ_CLR[1] ,Interrupt 1 clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " IRQ_CLR[0] ,Interrupt 0 clear" "No effect,Clear"
|
|
rgroup.long 0x30++0x0B
|
|
line.long 0x00 "FSM,Fault status DMA manager register"
|
|
bitfld.long 0x00 0. " FS_MGR ,Provides the fault status of the DMA manager" "Disabled,Enabled"
|
|
line.long 0x04 "FSC,Fault status DMA channel register"
|
|
bitfld.long 0x04 7. " FAULT_STATUS[7] ,Fault status of the channel 7" "Not present,Present"
|
|
bitfld.long 0x04 6. " FAULT_STATUS[6] ,Fault status of the channel 6" "Not present,Present"
|
|
bitfld.long 0x04 5. " FAULT_STATUS[5] ,Fault status of the channel 5" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FAULT_STATUS[4] ,Fault status of the channel 4" "Not present,Present"
|
|
bitfld.long 0x04 3. " FAULT_STATUS[3] ,Fault status of the channel 3" "Not present,Present"
|
|
bitfld.long 0x04 2. " FAULT_STATUS[2] ,Fault status of the channel 2" "Not present,Present"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FAULT_STATUS[1] ,Fault status of the channel 1" "Not present,Present"
|
|
bitfld.long 0x04 0. " FAULT_STATUS[0] ,Fault status of the channel 0" "Not present,Present"
|
|
line.long 0x08 "FTM,Fault type DMA manager register"
|
|
bitfld.long 0x08 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
bitfld.long 0x08 16. " INSTR_FETCH_ERR ,Indicates the AXI response that the DMAC receives on the RRESP bus after the DMA manager" "No error,Error"
|
|
bitfld.long 0x08 5. " MGR_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x08 4. " DMAGO_ERR ,Execute DMAGO with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x08 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x08 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
tree "DMA0"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "FTC0,Fault type for DMA channel 0"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "CS0,Channel status for DMA channel 0"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC0,Channel PC for DMA channel 0"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x00 "SA_0,Source address for DMA channel 0"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 0"
|
|
line.long 0x08 "CC_0,Channel control for DMA channel 0"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_0,Loop counter 0 for DMA channel 0"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_0,Loop counter 1 for DMA channel 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "FTC1,Fault type for DMA channel 1"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x108++0x07
|
|
line.long 0x00 "CS1,Channel status for DMA channel 1"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC1,Channel PC for DMA channel 1"
|
|
rgroup.long 0x420++0x13
|
|
line.long 0x00 "SA_1,Source address for DMA channel 1"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 1"
|
|
line.long 0x08 "CC_1,Channel control for DMA channel 1"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_1,Loop counter 0 for DMA channel 1"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_1,Loop counter 1 for DMA channel 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA2"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "FTC2,Fault type for DMA channel 2"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x110++0x07
|
|
line.long 0x00 "CS2,Channel status for DMA channel 2"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC2,Channel PC for DMA channel 2"
|
|
rgroup.long 0x440++0x13
|
|
line.long 0x00 "SA_2,Source address for DMA channel 2"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 2"
|
|
line.long 0x08 "CC_2,Channel control for DMA channel 2"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_2,Loop counter 0 for DMA channel 2"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_2,Loop counter 1 for DMA channel 2"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA3"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "FTC3,Fault type for DMA channel 3"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x118++0x07
|
|
line.long 0x00 "CS3,Channel status for DMA channel 3"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC3,Channel PC for DMA channel 3"
|
|
rgroup.long 0x460++0x13
|
|
line.long 0x00 "SA_3,Source address for DMA channel 3"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 3"
|
|
line.long 0x08 "CC_3,Channel control for DMA channel 3"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_3,Loop counter 0 for DMA channel 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_3,Loop counter 1 for DMA channel 3"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA4"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "FTC4,Fault type for DMA channel 4"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x120++0x07
|
|
line.long 0x00 "CS4,Channel status for DMA channel 4"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC4,Channel PC for DMA channel 4"
|
|
rgroup.long 0x480++0x13
|
|
line.long 0x00 "SA_4,Source address for DMA channel 4"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 4"
|
|
line.long 0x08 "CC_4,Channel control for DMA channel 4"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_4,Loop counter 0 for DMA channel 4"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_4,Loop counter 1 for DMA channel 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA5"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "FTC5,Fault type for DMA channel 5"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x128++0x07
|
|
line.long 0x00 "CS5,Channel status for DMA channel 5"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC5,Channel PC for DMA channel 5"
|
|
rgroup.long 0x4A0++0x13
|
|
line.long 0x00 "SA_5,Source address for DMA channel 5"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 5"
|
|
line.long 0x08 "CC_5,Channel control for DMA channel 5"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_5,Loop counter 0 for DMA channel 5"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_5,Loop counter 1 for DMA channel 5"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA6"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "FTC6,Fault type for DMA channel 6"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x130++0x07
|
|
line.long 0x00 "CS6,Channel status for DMA channel 6"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC6,Channel PC for DMA channel 6"
|
|
rgroup.long 0x4C0++0x13
|
|
line.long 0x00 "SA_6,Source address for DMA channel 6"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 6"
|
|
line.long 0x08 "CC_6,Channel control for DMA channel 6"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_6,Loop counter 0 for DMA channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_6,Loop counter 1 for DMA channel 6"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
tree "DMA7"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FTC7,Fault type for DMA channel 7"
|
|
bitfld.long 0x00 31. " LOCKUP_ERR ,Indicates whether the DMA channel has locked-up because of resource starvation" "No error,Error"
|
|
bitfld.long 0x00 30. " DBG_INSTR ,Erroneous instruction was read from the system memory or from the debug interface" "System,Debug"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DATA_READ_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel thread performs a data read" "No error,Error"
|
|
bitfld.long 0x00 17. " DATA_WRITE_ERR ,AXI response that the DMAC receives on the BRESP bus, after the DMA channel" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INSTR_FETCH_ERR ,AXI response that the DMAC receives on the RRESP bus, after the DMA channel" "No error,Error"
|
|
bitfld.long 0x00 13. " ST_DATA_UNAVAILABLE ,Indicates whether the MFIFO did not contain the data to enable the DMAC to perform the DMAST" "Available,Unavailable"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MFIFO_ERR ,MFIFO prevented the DMA channel thread from executing DMALD or DMAST" "No error,Error"
|
|
bitfld.long 0x00 7. " CH_RDWR_ERR ,Program the CCRn Register to perform a secure read or secure write" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH_PERIPH_ERR ,Execute DMAWFP, DMALDP, DMASTP, or DMAFLUSHP with inappropriate security permissions" "No error,Error"
|
|
bitfld.long 0x00 5. " CH_EVNT_ERR ,Execute DMAWFE or DMASEV with inappropriate security permissions" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPERAND_INVALID ,Execute an instruction operand that was not valid" "Valid,Invalid"
|
|
bitfld.long 0x00 0. " UNDEF_INSTR ,Execute an undefined instruction" "Defined,Undefined"
|
|
rgroup.long 0x138++0x07
|
|
line.long 0x00 "CS7,Channel status for DMA channel 7"
|
|
bitfld.long 0x00 21. " CNS ,Security of the DMA channel" "Secure,Non-secure"
|
|
bitfld.long 0x00 15. " DMAWFP_PERIPH ,Indicates whether the periph operand was set" "Not set,Set"
|
|
textline " "
|
|
bitfld.long 0x00 14. " DMAWFP_B_NS ,Indicates whether the burst or single operand were set" "Single,Burst"
|
|
bitfld.long 0x00 4.--8. " WAKEUP_NUM ,DMA channel waiting for event or peripheral" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CHANNEL_STATUS ,Channel status encoding" "Stopped,Executing,Cache miss,Updating PC,Waiting for event,At barrier,Reserved,Waiting for peripheral,Killing,Completing,Reserved,Reserved,Reserved,Reserved,Faulting completing,Faulting"
|
|
line.long 0x04 "CPC7,Channel PC for DMA channel 7"
|
|
rgroup.long 0x4E0++0x13
|
|
line.long 0x00 "SA_7,Source address for DMA channel 7"
|
|
line.long 0x04 "DA_1,Destination address for DMA channel 7"
|
|
line.long 0x08 "CC_7,Channel control for DMA channel 7"
|
|
bitfld.long 0x08 28.--30. " ENDIAN_SWAP_SIZE ,Endian swap size" "No swap 8-bit,Swapped 16-bit,Swapped 32-bit,Swapped 64-bit,Swapped 128-bit,?..."
|
|
bitfld.long 0x08 27. " DST_CACHE_CTRL[3] ,State of AWCACHE[3]" "Low,High"
|
|
bitfld.long 0x08 26. " DST_CACHE_CTRL[1] ,State of AWCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DST_CACHE_CTRL[0] ,State of AWCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 24. " DST_PROT_CTRL[2] ,State of AWPROT[2]" "Low,High"
|
|
bitfld.long 0x08 23. " DST_PROT_CTRL[1] ,State of AWPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 22. " DST_PROT_CTRL[0] ,State of AWPROT[0]" "Low,High"
|
|
bitfld.long 0x08 18.--21. " DST_BURST_LEN ,Destination burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 15.--17. " DST_BURST_SIZE ,Destination burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 14. " DST_INC ,Destination burst type" "Fixed-address,Incrementing-address"
|
|
bitfld.long 0x08 13. " SRC_CACHE_CTRL[1] ,State of ARCACHE[2]" "Low,High"
|
|
bitfld.long 0x08 12. " SRC_CACHE_CTRL[1] ,State of ARCACHE[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SRC_CACHE_CTRL[0] ,State of ARCACHE[0]" "Low,High"
|
|
bitfld.long 0x08 10. " SRC_PROT_CTRL[2] ,State of ARPROT[2]" "Low,High"
|
|
bitfld.long 0x08 9. " SRC_PROT_CTRL[1] ,State of ARPROT[1]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 8. " SRC_PROT_CTRL[0] ,State of ARPROT[0]" "Low,High"
|
|
bitfld.long 0x08 4.--7. " SRC_BURST_LEN ,Source burst length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x08 1.--3. " SRC_BURST_SIZE ,Source burst size" "1,2,4,8,16,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0. " SRC_INC ,Source burst type" "Fixed-address,Incrementing-address"
|
|
line.long 0x0C "LC0_7,Loop counter 0 for DMA channel 7"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
line.long 0x10 "LC1_7,Loop counter 1 for DMA channel 7"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LOOP_COUNTER_ITERATION ,Provides the status of loop counter zero for the DMA channel"
|
|
tree.end
|
|
group.long 0xD00++0x0F
|
|
line.long 0x00 "DBGSTATUS,Debug status register"
|
|
bitfld.long 0x00 0. " DBGSTATUS ,Debug status" "Idle,Busy"
|
|
line.long 0x04 "DBGCMD,Debug command register"
|
|
bitfld.long 0x04 0.--1. " DBGCMD ,Debug command" "Executed,?..."
|
|
line.long 0x08 "DBGINST0,Debug instruction 0 register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " INSTRUCTION_BYTE1 ,Instruction byte 1"
|
|
hexmask.long.byte 0x08 16.--23. 1. " INSTRUCTION_BYTE0 ,Instruction byte 0"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " CHANNEL_NUM ,DMA channel number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " DEBUG_THREAD ,Debug thread" "Manager,Channel"
|
|
line.long 0x0C "DBGINST1,Debug instruction 1 register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " INSTRUCTION_BYTE5 ,Instruction byte 5"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " INSTRUCTION_BYTE4 ,Instruction byte 4"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " INSTRUCTION_BYTE3 ,Instruction byte 3"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " INSTRUCTION_BYTE2 ,Instruction byte 2"
|
|
if (((d.l(ad:0x12690000+0xE00))&0x1)==0x1)
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 12.--16. " NUM_PERIPH_REQ ,Number of peripheral request interfaces that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
else
|
|
group.long 0xE00++0x03
|
|
line.long 0x00 "CR0,Configuration Register 0"
|
|
bitfld.long 0x00 17.--21. " NUM_EVENTS ,Number of interrupt outputs that the DMAC provides" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 4.--6. " NUM_CHNLS ,Number of DMA channels that the DMAC supports" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MGR_NS_AT_RST ,Status of the boot_manager_ns signal when the DMAC exited from reset" "Low,High"
|
|
bitfld.long 0x00 1. " BOOT_EN ,Status of the boot_from_pc signal when the DMAC exited from reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERIPH_REQ ,Supports peripheral requests" "Not provided,Provided"
|
|
endif
|
|
rgroup.long 0xE04++0x13
|
|
line.long 0x00 "CR1,Configuration Register 1"
|
|
bitfld.long 0x00 4.--7. " NUM_ICACHE_LINES ,Number of i-cache lines" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 0.--2. " ICACHE_LEN ,I-cache line length" "Reserved,Reserved,4 bytes,8 bytes,16 bytes,32 bytes,?..."
|
|
line.long 0x04 "CR2,Configuration Register 2"
|
|
line.long 0x08 "CR3,Configuration Register 3"
|
|
bitfld.long 0x08 31. " INS[31] ,Security state of an event-interrupt resource 31" "Secure,Non-secure"
|
|
bitfld.long 0x08 30. " INS[30] ,Security state of an event-interrupt resource 30" "Secure,Non-secure"
|
|
bitfld.long 0x08 29. " INS[29] ,Security state of an event-interrupt resource 29" "Secure,Non-secure"
|
|
bitfld.long 0x08 28. " INS[28] ,Security state of an event-interrupt resource 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INS[27] ,Security state of an event-interrupt resource 27" "Secure,Non-secure"
|
|
bitfld.long 0x08 26. " INS[26] ,Security state of an event-interrupt resource 26" "Secure,Non-secure"
|
|
bitfld.long 0x08 25. " INS[25] ,Security state of an event-interrupt resource 25" "Secure,Non-secure"
|
|
bitfld.long 0x08 24. " INS[24] ,Security state of an event-interrupt resource 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INS[23] ,Security state of an event-interrupt resource 23" "Secure,Non-secure"
|
|
bitfld.long 0x08 22. " INS[22] ,Security state of an event-interrupt resource 22" "Secure,Non-secure"
|
|
bitfld.long 0x08 21. " INS[21] ,Security state of an event-interrupt resource 21" "Secure,Non-secure"
|
|
bitfld.long 0x08 20. " INS[20] ,Security state of an event-interrupt resource 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INS[19] ,Security state of an event-interrupt resource 19" "Secure,Non-secure"
|
|
bitfld.long 0x08 18. " INS[18] ,Security state of an event-interrupt resource 18" "Secure,Non-secure"
|
|
bitfld.long 0x08 17. " INS[17] ,Security state of an event-interrupt resource 17" "Secure,Non-secure"
|
|
bitfld.long 0x08 16. " INS[16] ,Security state of an event-interrupt resource 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INS[15] ,Security state of an event-interrupt resource 15" "Secure,Non-secure"
|
|
bitfld.long 0x08 14. " INS[14] ,Security state of an event-interrupt resource 14" "Secure,Non-secure"
|
|
bitfld.long 0x08 13. " INS[13] ,Security state of an event-interrupt resource 13" "Secure,Non-secure"
|
|
bitfld.long 0x08 12. " INS[12] ,Security state of an event-interrupt resource 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INS[11] ,Security state of an event-interrupt resource 11" "Secure,Non-secure"
|
|
bitfld.long 0x08 10. " INS[10] ,Security state of an event-interrupt resource 10" "Secure,Non-secure"
|
|
bitfld.long 0x08 9. " INS[9] ,Security state of an event-interrupt resource 9" "Secure,Non-secure"
|
|
bitfld.long 0x08 8. " INS[8] ,Security state of an event-interrupt resource 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INS[7] ,Security state of an event-interrupt resource 7" "Secure,Non-secure"
|
|
bitfld.long 0x08 6. " INS[6] ,Security state of an event-interrupt resource 6" "Secure,Non-secure"
|
|
bitfld.long 0x08 5. " INS[5] ,Security state of an event-interrupt resource 5" "Secure,Non-secure"
|
|
bitfld.long 0x08 4. " INS[4] ,Security state of an event-interrupt resource 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INS[3] ,Security state of an event-interrupt resource 3" "Secure,Non-secure"
|
|
bitfld.long 0x08 2. " INS[2] ,Security state of an event-interrupt resource 2" "Secure,Non-secure"
|
|
bitfld.long 0x08 1. " INS[1] ,Security state of an event-interrupt resource 1" "Secure,Non-secure"
|
|
bitfld.long 0x08 0. " INS[0] ,Security state of an event-interrupt resource 0" "Secure,Non-secure"
|
|
line.long 0x0C "CR4,Configuration Register 4"
|
|
bitfld.long 0x0C 31. " PNS[31] ,Security state of the peripheral request interface 31" "Secure,Non-secure"
|
|
bitfld.long 0x0C 30. " PNS[30] ,Security state of the peripheral request interface 30" "Secure,Non-secure"
|
|
bitfld.long 0x0C 29. " PNS[29] ,Security state of the peripheral request interface 29" "Secure,Non-secure"
|
|
bitfld.long 0x0C 28. " PNS[28] ,Security state of the peripheral request interface 28" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " PNS[27] ,Security state of the peripheral request interface 27" "Secure,Non-secure"
|
|
bitfld.long 0x0C 26. " PNS[26] ,Security state of the peripheral request interface 26" "Secure,Non-secure"
|
|
bitfld.long 0x0C 25. " PNS[25] ,Security state of the peripheral request interface 25" "Secure,Non-secure"
|
|
bitfld.long 0x0C 24. " PNS[24] ,Security state of the peripheral request interface 24" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " PNS[23] ,Security state of the peripheral request interface 23" "Secure,Non-secure"
|
|
bitfld.long 0x0C 22. " PNS[22] ,Security state of the peripheral request interface 22" "Secure,Non-secure"
|
|
bitfld.long 0x0C 21. " PNS[21] ,Security state of the peripheral request interface 21" "Secure,Non-secure"
|
|
bitfld.long 0x0C 20. " PNS[20] ,Security state of the peripheral request interface 20" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PNS[19] ,Security state of the peripheral request interface 19" "Secure,Non-secure"
|
|
bitfld.long 0x0C 18. " PNS[18] ,Security state of the peripheral request interface 18" "Secure,Non-secure"
|
|
bitfld.long 0x0C 17. " PNS[17] ,Security state of the peripheral request interface 17" "Secure,Non-secure"
|
|
bitfld.long 0x0C 16. " PNS[16] ,Security state of the peripheral request interface 16" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PNS[15] ,Security state of the peripheral request interface 15" "Secure,Non-secure"
|
|
bitfld.long 0x0C 14. " PNS[14] ,Security state of the peripheral request interface 14" "Secure,Non-secure"
|
|
bitfld.long 0x0C 13. " PNS[13] ,Security state of the peripheral request interface 13" "Secure,Non-secure"
|
|
bitfld.long 0x0C 12. " PNS[12] ,Security state of the peripheral request interface 12" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PNS[11] ,Security state of the peripheral request interface 11" "Secure,Non-secure"
|
|
bitfld.long 0x0C 10. " PNS[10] ,Security state of the peripheral request interface 10" "Secure,Non-secure"
|
|
bitfld.long 0x0C 9. " PNS[9] ,Security state of the peripheral request interface 9" "Secure,Non-secure"
|
|
bitfld.long 0x0C 8. " PNS[8] ,Security state of the peripheral request interface 8" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PNS[7] ,Security state of the peripheral request interface 7" "Secure,Non-secure"
|
|
bitfld.long 0x0C 6. " PNS[6] ,Security state of the peripheral request interface 6" "Secure,Non-secure"
|
|
bitfld.long 0x0C 5. " PNS[5] ,Security state of the peripheral request interface 5" "Secure,Non-secure"
|
|
bitfld.long 0x0C 4. " PNS[4] ,Security state of the peripheral request interface 4" "Secure,Non-secure"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PNS[3] ,Security state of the peripheral request interface 3" "Secure,Non-secure"
|
|
bitfld.long 0x0C 2. " PNS[2] ,Security state of the peripheral request interface 2" "Secure,Non-secure"
|
|
bitfld.long 0x0C 1. " PNS[1] ,Security state of the peripheral request interface 1" "Secure,Non-secure"
|
|
bitfld.long 0x0C 0. " PNS[0] ,Security state of the peripheral request interface 0" "Secure,Non-secure"
|
|
line.long 0x10 "CRDn,DMA configuration register"
|
|
hexmask.long.word 0x10 20.--29. 1. " DATA_BUFFER_DEP ,Number of lines that the data buffer contains"
|
|
bitfld.long 0x10 16.--19. " RD_Q_DEP ,Depth of the read queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
bitfld.long 0x10 12.--14. " RD_CAP ,Number of outstanding read transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 8.--11. " WR_Q_DEP ,Depth of the write queue" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines"
|
|
textline " "
|
|
bitfld.long 0x10 4.--6. " WR_CAP ,Number of outstanding write transactions" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x10 0.--2. " DATA_WIDTH ,Data bus width of the AXI master interface" "Reserved,Reserved,32-bit,64-bit,128-bit,?..."
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0xE80++0x03
|
|
line.long 0x00 "WD,Watchdog register"
|
|
bitfld.long 0x00 0. " WD_IRQ_ONLY ,DMAC response on detected look-up condition" "Abort DMAC channels,Sets IRQ_ABORT high"
|
|
endif
|
|
rgroup.long 0xFE0++0x1F
|
|
line.long 0x00 "PERIPH_ID_0,Peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part number 0"
|
|
line.long 0x04 "PERIPH_ID_1,Peripheral identification register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER_0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "PERIPH_ID_2,Peripheral identification register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision number" "r0p0,r1p0,r1p1,?..."
|
|
bitfld.long 0x08 0.--3. " DESIGNER_1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "PERIPH_ID_3,Peripheral identification register 3"
|
|
bitfld.long 0x0C 0. " INTEGRATION_CFG ,Integration test logic(ITL) configuration" "No ITL,ITL"
|
|
line.long 0x10 "PCELL_ID_0,Component identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PCELL_ID_0 ,Component identification 0"
|
|
line.long 0x14 "PCELL_ID_1,Component identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PCELL_ID_1 ,Component identification 1"
|
|
line.long 0x18 "PCELL_ID_2,Component identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PCELL_ID_2 ,Component identification 2"
|
|
line.long 0x1C "PCELL_ID_3,Component identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PCELL_ID_3 ,Component identification 3"
|
|
width 12.
|
|
tree.end
|
|
tree.end
|
|
tree "SROMC (SROM Controller)"
|
|
base ad:0x12570000
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SROM_BW,SROM Bus Width & Wait Control Register"
|
|
bitfld.long 0x00 15. " BYTEENABLE3 ,nWBE/ nBE (for UB/LB) control for Memory Bank3" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WAITENABLE3 ,Wait enable control for Memory Bank3" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ADDRMODE3 ,Select SROM ADDR Base for Memory Bank3" "Half-word,Byte"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DATAWIDTH3 ,Data bus width control for Memory Bank3" "8-bit,16-bit"
|
|
bitfld.long 0x00 11. " BYTEENABLE2 ,nWBE/ nBE (for UB/LB) control for Memory Bank2" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " WAITENABLE2 ,Wait enable control for Memory Bank2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADDRMODE2 ,Select SROM ADDR Base for Memory Bank2" "Half-word,Byte"
|
|
bitfld.long 0x00 8. " DATAWIDTH2 ,Data bus width control for Memory Bank2" "8-bit,16-bit"
|
|
bitfld.long 0x00 7. " BYTEENABLE1 ,nWBE/ nBE (for UB/LB) control for Memory Bank1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WAITENABLE1 ,Wait enable control for Memory Bank1" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADDRMODE1 ,Select SROM ADDR Base for Memory Bank1" "Half-word,Byte"
|
|
bitfld.long 0x00 4. " DATAWIDTH1 ,Data bus width control for Memory Bank1" "8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BYTEENABLE0 ,nWBE/ nBE (for UB/LB) control for Memory Bank0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WAITENABLE0 ,Wait enable control for Memory Bank0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ADDRMODE0 ,Select SROM ADDR Base for Memory Bank0" "Half-word,Byte"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DATAWIDTH0 ,Data bus width control for Memory Bank0" "8-bit,16-bit"
|
|
group.long 0x04++0xF
|
|
line.long 0x0 "SROM_BC0,SROM Bank Control Register 0"
|
|
bitfld.long 0x0 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 24.--27. " TCOS ,Chip selection set-up before 0OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x0 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0x4 "SROM_BC1,SROM Bank Control Register 1"
|
|
bitfld.long 0x4 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 24.--27. " TCOS ,Chip selection set-up before 1OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x4 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0x8 "SROM_BC2,SROM Bank Control Register 2"
|
|
bitfld.long 0x8 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 24.--27. " TCOS ,Chip selection set-up before 2OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0x8 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
line.long 0xC "SROM_BC3,SROM Bank Control Register 3"
|
|
bitfld.long 0xC 28.--31. " TACS ,Address set-up before nGCS" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 24.--27. " TCOS ,Chip selection set-up before 3OE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 16.--20. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks,24 clocks,25 clocks,26 clocks,27 clocks,28 clocks,29 clocks,30 clocks,31 clocks,32 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 12.--15. " TCOH ,Chip selection hold on nOE" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 8.--11. " TCAH ,Address holding time after nGCSn" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
bitfld.long 0xC 4.--7. " TACP ,Page mode access cycle @ Page mode" "0 clock,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 0.--1. " PMC ,Page mode configuration" "Normal,4 Data,?..."
|
|
width 0xB
|
|
tree.end
|
|
tree.open "NAND Flash Controller"
|
|
tree "Nand Flash Interface and 1/4-bit ECC Registers"
|
|
base ad:0x0CE00000
|
|
width 14.
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
if (((d.l(ad:0x0CE00000))&0x0C)==0x04)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " PAGESIZE ,Page size of NAND Flash Memory" "2048 Byte,512 Byte,4096 Byte,2048 Byte"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "3 cycle,4 cycle"
|
|
elif (((d.l(ad:0x0CE00000))&0x0C)==(0x00||0x08||0x0C))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " PAGESIZE ,Page size of NAND Flash Memory" "2048 Byte,512 Byte,4096 Byte,2048 Byte"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "4 cycle,5 cycle"
|
|
endif
|
|
else
|
|
if (((d.l(ad:0x0CE00000))&0x180000C)==0x0000004)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " PAGESIZE ,Page size of NAND Flash Memory" "2048 Byte,512 Byte,4096 Byte,2048 Byte"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "3 cycle,4 cycle"
|
|
elif (((d.l(ad:0x0CE00000))&0x180000C)==(0x0800004||0x1000004||0x1800004))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "3 cycle,4 cycle"
|
|
elif (((d.l(ad:0x0CE00000))&0x180000C)==(0x0000000||0x0000008||0x000000C))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " PAGESIZE ,Page size of NAND Flash Memory" "2048 Byte,512 Byte,4096 Byte,2048 Byte"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "4 cycle,5 cycle"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 25. " MSGLENGTH ,Message Length For 4/bit ECC" "512-byte,24-byte"
|
|
bitfld.long 0x00 23.--24. " ECCTYPE ,ECC Type Selection" "1-bit ECC,4-bit ECC,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADDRCYCLE ,NAND flash memory Address cycle for auto-booting" "4 cycle,5 cycle"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "NFCONT,NAND Flash Control Register"
|
|
bitfld.long 0x00 23. " REG_NCE3 ,NAND Flash Memory nRCS[3] signal control" "Low,High"
|
|
bitfld.long 0x00 23. " REG_NCE2 ,NAND Flash Memory nRCS[2] signal control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MLCECCDIRECTION ,4-bit/ ECC encoding/decoding control" "Decoding,Encoding"
|
|
bitfld.long 0x00 17. " LOCKTIGHT ,Lock-tight configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LOCK ,Soft lock configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ENBMLCENCINT ,4-bit ECC encoding completion interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ENBMLCDECINT ,4-bit ECC decoding completion interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " ENBILLEGALACCINT ,Illegal access interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ENBRNBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RNB_TRANSMODE ,RnB transition detection configuration" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MECCLOCK ,Lock main area ECC generation" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " SECCLOCK ,Lock spare area ECC generation" "Not locked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INITMECC ,Initialized main area ECC decoder/encoder" "Not initialized,Initialized"
|
|
bitfld.long 0x00 4. " INITSECC ,Initialized spare area ECC decoder/encoder" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 2. " REG_NCE1 ,NAND flash memory nRCS[1] signal control" "Low,High"
|
|
bitfld.long 0x00 1. " REG_NCE0 ,NAND flash memory nRCS[0] signal control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled"
|
|
group.long 0x08++0xB
|
|
line.long 0x00 "NFCMMD,NAND Flash Command Set Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NFCMMD ,NAND flash memory command value"
|
|
line.long 0x04 "NFADDR,NAND Flash Address Set Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " NFADDR ,NAND flash memory address value"
|
|
line.long 0x08 "NFDATA,NAND Flash Data Register"
|
|
group.word 0x14++0x3
|
|
line.long 0x00 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ECCDATA1 ,ECC1 for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ECCDATA0 ,ECC0 for I/O[7:0]"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ECCDATA3 ,ECC3 for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ECCDATA2 ,ECC2 for I/O[7:0]"
|
|
group.word 0x1C++0x3
|
|
line.long 0x00 "NFSECCD,NAND Flash ECC Register For Spare Area Data Data Read"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SECCDATA1 ,2nd spare area ECC for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SECCDATA0 ,1st spare area ECC for I/O[7:0]"
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " SBLK_ADDR0 ,1st block address of block erase operation" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "NFEBLK,NAND Flash Programmable End Block Address"
|
|
hexmask.long.byte 0x04 16.--23. 1. " EBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x04 8.--15. 1. " EBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
bitfld.long 0x04 5.--7. " EBLK_ADDR0 ,1st block address of block erase operation" "0,1,2,3,4,5,6,7"
|
|
if cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "NFSTAT,NAND Flash Operation Status Register"
|
|
bitfld.long 0x00 31. " FLASH_RNB_GRP3 ,The status of RnB[3] input pin" "Busy,Ready"
|
|
bitfld.long 0x00 30. " FLASH_RNB_GRP2 ,The status of RnB[2] input pin" "Busy,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLASH_RNB_GRP1 ,The status of RnB[1] input pin" "Busy,Ready"
|
|
bitfld.long 0x00 28. " FLASH_RNB_GRP0 ,The status of RnB[0] input pin" "Busy,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RNB_TRANSDETECT_GRP3 ,RnB[3] Transition Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " RNB_TRANSDETECT_GRP2 ,RnB[2] Transition Detect" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RNB_TRANSDETECT_GRP1 ,RnB[1] Transition Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " RNB_TRANSDETECT_GRP0 ,RnB[0] Transition Detect" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " FLASH_NCE[3] ,nCE[1] output status" "Low,High"
|
|
rbitfld.long 0x00 10. " FLASH_NCE[2] ,nCE[0] output status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 9. " FLASH_NCE[1] ,nCE[1] output status" "Low,High"
|
|
rbitfld.long 0x00 8. " FLASH_NCE[0] ,nCE[0] output status" "Low,High"
|
|
textline " "
|
|
eventfld.long 0x00 7. " MLCENCODEDONE ,4-bit ECC encoding finished" "Not finished,Finished"
|
|
eventfld.long 0x00 6. " MLCDECODEDONE ,4-bit ECC decoding finished" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ILLEGALACCESS ,Illegal access" "Not detected,Detected"
|
|
eventfld.long 0x00 4. " RNB_TRANSDETECT ,RnB low to high transition occurred" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " FLASH_NCE[1] ,nCE[1] output status" "Low,High"
|
|
rbitfld.long 0x00 2. " FLASH_NCE[0] ,nCE[0] output status" "Low,High"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " FLASH_RNB ,RnB input status" "Busy,Ready"
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "NFSTAT,NAND Flash Operation Status Register"
|
|
bitfld.long 0x00 31. " FLASH_RNB_GRP3 ,The status of RnB[3] input pin" "Busy,Ready"
|
|
bitfld.long 0x00 30. " FLASH_RNB_GRP2 ,The status of RnB[2] input pin" "Busy,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FLASH_RNB_GRP1 ,The status of RnB[1] input pin" "Busy,Ready"
|
|
bitfld.long 0x00 28. " FLASH_RNB_GRP0 ,The status of RnB[0] input pin" "Busy,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RNB_TRANSDETECT_GRP3 ,RnB[3] Transition Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " RNB_TRANSDETECT_GRP2 ,RnB[2] Transition Detect" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RNB_TRANSDETECT_GRP1 ,RnB[1] Transition Detect" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " RNB_TRANSDETECT_GRP0 ,RnB[0] Transition Detect" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 7. " MLCENCODEDONE ,4-bit ECC encoding finished" "Not finished,Finished"
|
|
eventfld.long 0x00 6. " MLCDECODEDONE ,4-bit ECC decoding finished" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ILLEGALACCESS ,Illegal access" "Not detected,Detected"
|
|
eventfld.long 0x00 4. " RNB_TRANSDETECT ,RnB low to high transition occurred" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FLASH_NCE[1] ,nCE[1] output status" "Low,High"
|
|
bitfld.long 0x00 2. " FLASH_NCE[0] ,nCE[0] output status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FLASH_RNB ,RnB input status" "Busy,Ready"
|
|
endif
|
|
if (((d.l(ad:0x0CE00000))&0x1800000)==0x0800000)
|
|
rgroup.long 0x2C++0xF
|
|
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
bitfld.long 0x00 31. " MLCECCBUSY ,4-bit ECC decoding engine busy" "Not busy,Busy"
|
|
bitfld.long 0x00 30. " MLCECCREADY ,ECC Ready bit " "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 29. " MLCFREEPAGE ,Indicates the page data read from NAND flash has all h'FF value" "Not free,Free"
|
|
bitfld.long 0x00 26.--28. " MLCECCERROR ,4-bit ECC decoding result" "No error,1 bit,2 bit,3 bit,4 bit,Uncorrectable,?..."
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " MLCERRLOCATION2 ,Error byte location of 2nd bit error "
|
|
hexmask.long.word 0x00 0.--9. 1. " MLCERRLOCATION1 ,Error byte location of 1st bit error"
|
|
line.long 0x04 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
|
|
hexmask.long.word 0x04 16.--25. 1. " MLCERRLOCATION4 ,Error byte location of 4th bit error"
|
|
hexmask.long.word 0x04 0.--9. 1. " MLCERRLOCATION3 ,Error byte location of 3rd bit error"
|
|
line.long 0x08 "NFMECC0,MLC NAND Flash ECC Status Register 0"
|
|
hexmask.long.byte 0x08 24.--31. 1. " 4THPAR ,4th check parity generated from main area"
|
|
hexmask.long.byte 0x08 16.--23. 1. " 3THPAR ,3th check parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " 2THPAR ,2th check parity generated from main area"
|
|
hexmask.long.byte 0x08 0.--7. 1. " 1THPAR ,1th check parity generated from main area"
|
|
line.long 0x0C "NFMECC1,MLC NAND Flash ECC Status Register 1"
|
|
hexmask.long.byte 0x0c 16.--23. 1. " 7THPAR ,7th check parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x0c 8.--15. 1. " 6THPAR ,6th check parity generated from main area"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " 5THPAR ,5th check parity generated from main area"
|
|
elif (((d.l(ad:0x0CE00000))&0x1800000)==(0x0000000))
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
bitfld.long 0x00 21.--24. " ECCSDATAADDR ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 18.--20. " ECCSBITADDR ,Number of error bit in spare area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 7.--17. 1. " ECCDATAADDR ,Number of error data in main area"
|
|
bitfld.long 0x00 4.--6. " ECCBITADDR ,Number of error bit in data area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " ECCSPRERRNO ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area"
|
|
bitfld.long 0x00 0.--1. " ECCMAINERRNO ,Main area data fail error occurred" "No error,1-bit,Multiple,Area"
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "NFMECC0,SLC NAND Flash ECC Status Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MECC3 ,ECC3 for data[7:0]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MECC2 ,ECC2 for data[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MECC1 ,ECC1 for data[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MECC0 ,ECC0 for data[7:0]"
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "NFMECC1,MLC NAND Flash ECC Status Register 1"
|
|
else
|
|
hgroup.long 0x2C++0x3
|
|
hide.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
hgroup.long 0x30++0x3
|
|
hide.long 0x00 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
|
|
hgroup.long 0x34++0x3
|
|
hide.long 0x00 "NFMECC0,MLC NAND Flash ECC Status Register 0"
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "NFMECC1,MLC NAND Flash ECC Status Register 1"
|
|
endif
|
|
rgroup.long 0x3C++0x7
|
|
line.long 0x00 "NFSECC,NAND Flash ECC Register For I/O[15:0]"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SECC1 ,Spare area ECC1 status for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SECC0 ,Spare area ECC0 status for I/O[7:0]"
|
|
line.long 0x04 "NFMLCBITPT,NAND Flash 4-bit ECC error pattern register for data[7:0]"
|
|
hexmask.long.byte 0x04 24.--31. 1. " 4THERRBITPAT ,4th error bit pattern"
|
|
hexmask.long.byte 0x04 16.--23. 1. " 3RDERRBITPAT ,3rd error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " 2NDERRBITPAT ,2nd error bit pattern"
|
|
hexmask.long.byte 0x04 0.--7. 1. " 1STERRBITPAT ,1st error bit pattern"
|
|
width 0xb
|
|
tree.end
|
|
tree "ECC Registers for 8, 12 and 16-bit ECC"
|
|
base ad:0x0CE20000
|
|
width 14.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFECCCONF,Nand Flash ECC Configuration Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MSGLENGTH ,ECC message size"
|
|
bitfld.long 0x00 0.--3. " ECCTYPE ,ECC Type Selection" "Disabled,Reserved,Reserved,8-bit ECC/512B,12-bit ECC,16-bit ECC/512B,?..."
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "NFECCCONT,Nand Flash ECC Control Register"
|
|
bitfld.long 0x00 25. " ENBMLCENCINT ,MLC ECC encoding completion interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " ENBMLCDECINT ,MLC ECC decoding completion interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ECCDIRECTION ,MLC ECC encoding/decoding control" "Decoding,Encoding"
|
|
bitfld.long 0x00 2. " INITMECC ,Initialize main area ECC decoder/encoder" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RESETECC ,Reset ECC logic" "No reset,Reset"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "NFECCSTAT,Nand Flash ECC Status Register"
|
|
rbitfld.long 0x00 31. " ECCBUSY ,8-bit ECC decoding engine is busy" "Not busy,Busy"
|
|
bitfld.long 0x00 25. " ENCODEDONE ,Encoding finished" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DECODEDONE ,Decoding finished" "Not finished,Finished"
|
|
rbitfld.long 0x00 8. " FREEPAGESTAT ,Free page status" "Not free,Free"
|
|
else
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "NFECCSTAT,Nand Flash ECC Status Register"
|
|
bitfld.long 0x00 31. " ECCBUSY ,8-bit ECC decoding engine is busy" "Not busy,Busy"
|
|
bitfld.long 0x00 25. " ENCODEDONE ,Encoding finished" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DECODEDONE ,Decoding finished" "Not finished,Finished"
|
|
bitfld.long 0x00 8. " FREEPAGESTAT ,Free page status" "Not free,Free"
|
|
endif
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "NFECCSECSTAT,Nand Flash ECC Sector Status Register"
|
|
bitfld.long 0x00 31. " VALDERRORSTAT[23] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 30. " VALDERRORSTAT[22] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 29. " VALDERRORSTAT[21] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 28. " VALDERRORSTAT[20] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 27. " VALDERRORSTAT[19] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 26. " VALDERRORSTAT[18] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 25. " VALDERRORSTAT[17] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 24. " VALDERRORSTAT[16] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 23. " VALDERRORSTAT[15] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 22. " VALDERRORSTAT[14] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 21. " VALDERRORSTAT[13] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 20. " VALDERRORSTAT[12] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VALDERRORSTAT[11] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 18. " VALDERRORSTAT[10] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VALDERRORSTAT[9] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 16. " VALDERRORSTAT[8] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 15. " VALDERRORSTAT[7] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 14. " VALDERRORSTAT[6] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VALDERRORSTAT[5] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 12. " VALDERRORSTAT[4] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 11. " VALDERRORSTAT[3] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 10. " VALDERRORSTAT[2] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VALDERRORSTAT[1] ,Valid Error Status" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " VALDERRORSTAT[0] ,Valid Error Status" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " ECCERRORNO ,ECC decoding result when page read" "No error,1-bit error,2-bit error,3-bit error,4-bit error,5-bit error,6-bit error,7-bit error,8-bit error,9-bit error,10-bit error,11-bit error,12-bit error,13-bit error,14-bit error,15-bit error,16-bit error,?..."
|
|
rgroup.long 0x90++0x1B
|
|
line.long 0x00 "NFECCPRGECC0,Nand Flash ECC Parity Code for Page Program Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " 4THPAR ,4th Check Parity for page program from main area"
|
|
hexmask.long.byte 0x00 16.--23. 1. " 3RDPAR ,3rd Check Parity for page program from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " 2NDPAR ,2nd Check Parity for page program from main area"
|
|
hexmask.long.byte 0x00 0.--7. 1. " 1STPAR ,1 Check Parity for page program from main area"
|
|
line.long 0x04 "NFECCPRGECC1,Nand Flash ECC Parity Code for Page Program Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " 8THPAR ,8th Check Parity generated from main area"
|
|
hexmask.long.byte 0x04 16.--23. 1. " 7THPAR ,7th Check Parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " 6THPAR ,6th Check Parity generated from main area"
|
|
hexmask.long.byte 0x04 0.--7. 1. " 5THPAR ,5th Check Parity generated from main area"
|
|
line.long 0x08 "NFECCPRGECC2,Nand Flash ECC Parity Code for Page Program Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " 12THPAR ,12th Check Parity generated from main area"
|
|
hexmask.long.byte 0x08 16.--23. 1. " 11THPAR ,11th Check Parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " 10THPAR ,10th Check Parity generated from main area"
|
|
hexmask.long.byte 0x08 0.--7. 1. " 9THPAR ,9th Check Parity generated from main area"
|
|
line.long 0x0C "NFECCPRGECC3,Nand Flash ECC Parity Code for Page Program Register 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " 16THPAR ,16th Check Parity generated from main area"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " 15THPAR ,15th Check Parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " 14THPAR ,14th Check Parity generated from main area"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " 13THPAR ,13th Check Parity generated from main area"
|
|
line.long 0x10 "NFECCPRGECC4,Nand Flash ECC Parity Code for Page Program Register 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " 20THPAR ,20th Check Parity generated from main area"
|
|
hexmask.long.byte 0x10 16.--23. 1. " 19THPAR ,19th Check Parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " 18THPAR ,18th Check Parity generated from main area"
|
|
hexmask.long.byte 0x10 0.--7. 1. " 17THPAR ,17th Check Parity generated from main area"
|
|
line.long 0x14 "NFECCPRGECC5,Nand Flash ECC Parity Code for Page Program Register 5"
|
|
hexmask.long.byte 0x14 24.--31. 1. " 24THPAR ,24th Check Parity generated from main area"
|
|
hexmask.long.byte 0x14 16.--23. 1. " 23THPAR ,23th Check Parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " 22THPAR ,22th Check Parity generated from main area"
|
|
hexmask.long.byte 0x14 0.--7. 1. " 21THPAR ,21th Check Parity generated from main area"
|
|
line.long 0x18 "NFECCPRGECC6,Nand Flash ECC Parity Code for Page Program Register 6"
|
|
hexmask.long.byte 0x18 8.--15. 1. " 26THPAR ,26th Check Parity generated from main area"
|
|
hexmask.long.byte 0x18 0.--7. 1. " 25THPAR ,25th Check Parity generated from main area"
|
|
rgroup.long 0xC0++0x1F
|
|
line.long 0x00 "NFECCERL0,MLC ECC Error Byte Location Status Register 0"
|
|
hexmask.long.word 0x00 16.--25. 1. " ERRBYTELOC2 ,Error byte location of 2nd bit error"
|
|
hexmask.long.word 0x00 0.--9. 1. " ERRBYTELOC1 ,Error byte location of 1st bit error"
|
|
line.long 0x04 "NFECCERL1,MLC ECC Error Byte Location Status Register 1"
|
|
hexmask.long.word 0x04 16.--25. 1. " ERRBYTELOC4 ,Error byte location of 4th bit error"
|
|
hexmask.long.word 0x04 0.--9. 1. " ERRBYTELOC3 ,Error byte location of 3rd bit error"
|
|
line.long 0x08 "NFECCERL2,MLC ECC Error Byte Location Status Register 2"
|
|
hexmask.long.word 0x08 16.--25. 1. " ERRBYTELOC6 ,Error byte location of 6th bit error"
|
|
hexmask.long.word 0x08 0.--9. 1. " ERRBYTELOC5 ,Error byte location of 5th bit error"
|
|
line.long 0x0C "NFECCERL3,MLC ECC Error Byte Location Status Register 3"
|
|
hexmask.long.word 0x0C 16.--25. 1. " ERRBYTELOC8 ,Error byte location of 8th bit error"
|
|
hexmask.long.word 0x0C 0.--9. 1. " ERRBYTELOC7 ,Error byte location of 7th bit error"
|
|
line.long 0x10 "NFECCERL4,MLC ECC Error Byte Location Status Register 4"
|
|
hexmask.long.word 0x10 16.--25. 1. " ERRBYTELOC10 ,Error byte location of 10th bit error"
|
|
hexmask.long.word 0x10 0.--9. 1. " ERRBYTELOC9 ,Error byte location of 9th bit error"
|
|
line.long 0x14 "NFECCERL5,MLC ECC Error Byte Location Status Register 5"
|
|
hexmask.long.word 0x14 16.--25. 1. " ERRBYTELOC12 ,Error byte location of 12th bit error"
|
|
hexmask.long.word 0x14 0.--9. 1. " ERRBYTELOC11 ,Error byte location of 11th bit error"
|
|
line.long 0x18 "NFECCERL6,MLC ECC Error Byte Location Status Register 6"
|
|
hexmask.long.word 0x18 16.--25. 1. " ERRBYTELOC14 ,Error byte location of 14th bit error"
|
|
hexmask.long.word 0x18 0.--9. 1. " ERRBYTELOC13 ,Error byte location of 13th bit error"
|
|
line.long 0x1C "NFECCERL7,MLC ECC Error Byte Location Status Register 7"
|
|
hexmask.long.word 0x1C 16.--25. 1. " ERRBYTELOC16 ,Error byte location of 16th bit error"
|
|
hexmask.long.word 0x1C 0.--9. 1. " ERRBYTELOC15 ,Error byte location of 15th bit error"
|
|
rgroup.long 0xF0++0xF
|
|
line.long 0x00 "NFECCERP0,MLC ECC Error Patten Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " 4THERR ,4th Error bit pattern"
|
|
hexmask.long.byte 0x00 16.--23. 1. " 3RDERR ,3rd Error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " 2NDERR ,2nd Error bit pattern"
|
|
hexmask.long.byte 0x00 0.--7. 1. " 1STERR ,1st Error bit pattern"
|
|
line.long 0x04 "NFECCERP1,MLC ECC Error Patten Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " 8THERR ,8th Error bit pattern"
|
|
hexmask.long.byte 0x04 16.--23. 1. " 7THERR ,7th Error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " 6THDERR ,6th Error bit pattern"
|
|
hexmask.long.byte 0x04 0.--7. 1. " 5THERR ,5th Error bit pattern"
|
|
line.long 0x08 "NFECCERP2,MLC ECC Error Patten Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " 12THERR ,12th Error bit pattern"
|
|
hexmask.long.byte 0x08 16.--23. 1. " 11THERR ,11th Error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " 10THDERR ,10th Error bit pattern"
|
|
hexmask.long.byte 0x08 0.--7. 1. " 9THERR ,9th Error bit pattern"
|
|
line.long 0x0C "NFECCERP3,MLC ECC Error Patten Register 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " 16THERR ,16th Error bit pattern"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " 15THERR ,15th Error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " 14THDERR ,14th Error bit pattern"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " 13THERR ,13th Error bit pattern"
|
|
group.long 0x110++0x1B
|
|
line.long 0x00 "NFECCCONECC0,ECC Parity Conversion Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " 4THCC ,4th ECC Parity conversion code"
|
|
hexmask.long.byte 0x00 16.--23. 1. " 3RDCC ,3rd ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " 2NDCC ,2nd ECC Parity conversion code"
|
|
hexmask.long.byte 0x00 0.--7. 1. " 1STCC ,1 ECC Parity conversion code"
|
|
line.long 0x04 "NFECCCONECC1,ECC Parity Conversion Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " 8THCC ,8th ECC Parity conversion code"
|
|
hexmask.long.byte 0x04 16.--23. 1. " 7THCC ,7th ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " 6THCC ,6th ECC Parity conversion code"
|
|
hexmask.long.byte 0x04 0.--7. 1. " 5THCC ,5th ECC Parity conversion code"
|
|
line.long 0x08 "NFECCCONECC2,ECC Parity Conversion Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " 12THCC ,12th ECC Parity conversion code"
|
|
hexmask.long.byte 0x08 16.--23. 1. " 11THCC ,11th ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " 10THCC ,10th ECC Parity conversion code"
|
|
hexmask.long.byte 0x08 0.--7. 1. " 9THCC ,9th ECC Parity conversion code"
|
|
line.long 0x0C "NFECCCONECC3,ECC Parity Conversion Register 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " 16THCC ,16th ECC Parity conversion code"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " 15THCC ,15th ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " 14THCC ,14th ECC Parity conversion code"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " 13THCC ,13th ECC Parity conversion code"
|
|
line.long 0x10 "NFECCCONECC4,ECC Parity Conversion Register 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " 20THCC ,20th ECC Parity conversion code"
|
|
hexmask.long.byte 0x10 16.--23. 1. " 19THCC ,19th ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " 18THCC ,18th ECC Parity conversion code"
|
|
hexmask.long.byte 0x10 0.--7. 1. " 17THCC ,17th ECC Parity conversion code"
|
|
line.long 0x14 "NFECCCONECC5,ECC Parity Conversion Register 5"
|
|
hexmask.long.byte 0x14 24.--31. 1. " 24THCC ,24th ECC Parity conversion code"
|
|
hexmask.long.byte 0x14 16.--23. 1. " 23THCC ,23th ECC Parity conversion code"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " 22THCC ,22th ECC Parity conversion code"
|
|
hexmask.long.byte 0x14 0.--7. 1. " 21THCC ,21th ECC Parity conversion code"
|
|
line.long 0x18 "NFECCCONECC6,ECC Parity Conversion Register 6"
|
|
hexmask.long.byte 0x18 8.--15. 1. " 26THCC ,26th ECC Parity conversion code"
|
|
hexmask.long.byte 0x18 0.--7. 1. " 25THCC ,25th ECC Parity conversion code"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "PWM Timer"
|
|
tree "PWM"
|
|
base ad:0x139D0000
|
|
width 12.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "TCFG0,Timer Configuration Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2, 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,Timer Configuration Register 1"
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCON,Timer Control Register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group.long 0xC++0x7 "Timer 0"
|
|
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
|
|
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
|
|
rgroup.long (0xC+0x8)++0x3
|
|
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
|
|
group.long 0x18++0x7 "Timer 1"
|
|
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
|
|
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
|
|
rgroup.long (0x18+0x8)++0x3
|
|
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
|
|
group.long 0x24++0x7 "Timer 2"
|
|
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
|
|
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
|
|
rgroup.long (0x24+0x8)++0x3
|
|
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
|
|
group.long 0x30++0x7 "Timer 3"
|
|
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
|
|
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
|
|
rgroup.long (0x30+0x8)++0x3
|
|
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
|
|
group.long 0x3c++0x3 "Timer 4"
|
|
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
|
|
textline " "
|
|
textline " "
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "TINT_CSTAT,Interrupt Control and Status Register"
|
|
eventfld.long 0x00 9. " TIM4IS ,Timer 4 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIM3IS ,Timer 3 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " TIM2IS ,Timer 2 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TIM1IS ,Timer 1 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " TIM0IS ,Timer 0 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIM4IE ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIM3IE ,Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TIM2IE ,Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIM1IE ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIM0IE ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM_ISP"
|
|
base ad:0x12160000
|
|
width 12.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "TCFG0,Timer Configuration Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2, 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,Timer Configuration Register 1"
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/1,1/2,1/4,1/8,1/16,?..."
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCON,Timer Control Register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group.long 0xC++0x7 "Timer 0"
|
|
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
|
|
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
|
|
rgroup.long (0xC+0x8)++0x3
|
|
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
|
|
group.long 0x18++0x7 "Timer 1"
|
|
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
|
|
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
|
|
rgroup.long (0x18+0x8)++0x3
|
|
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
|
|
group.long 0x24++0x7 "Timer 2"
|
|
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
|
|
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
|
|
rgroup.long (0x24+0x8)++0x3
|
|
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
|
|
group.long 0x30++0x7 "Timer 3"
|
|
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
|
|
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
|
|
rgroup.long (0x30+0x8)++0x3
|
|
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
|
|
group.long 0x3c++0x3 "Timer 4"
|
|
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
|
|
textline " "
|
|
textline " "
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "TINT_CSTAT,Interrupt Control and Status Register"
|
|
eventfld.long 0x00 9. " TIM4IS ,Timer 4 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " TIM3IS ,Timer 3 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " TIM2IS ,Timer 2 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TIM1IS ,Timer 1 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " TIM0IS ,Timer 0 Interrupt Status Bit" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TIM4IE ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TIM3IE ,Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TIM2IE ,Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TIM1IE ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIM0IE ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0x10060000
|
|
width 10.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "WTCON,Watchdog Timer Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PV ,Prescaler Value"
|
|
bitfld.long 0x00 5. " WDT ,Watchdog timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3.--4. " CLKSEL ,Clock division factor" "16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INTGEN ,Interrupt generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RSTEN ,Reset enable" "Disabled,Enabled"
|
|
line.long 0x04 "WTDAT,Watchdog Timer Data Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CNTRL ,Count reload value"
|
|
sif cpu()=="Exynos5250"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "WTCNT,Watchdog Timer Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNTVAL ,Count value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "WTCNT,Watchdog Timer Count Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNTVAL ,Count value"
|
|
endif
|
|
wgroup.long 0x0C++0x3
|
|
line.long 0x00 "WTCLRINT,Interrupt clear"
|
|
width 0xB
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver and Transmitter)"
|
|
tree "UART0"
|
|
base ad:0x13800000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON0, UART Line Control Register 0"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13800000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON0,UART Control Register 0"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON0,UART Control Register 0"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON0,UART FIFO Control Register 0"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,32 bytes,64 bytes,96 bytes,128 bytes,160 bytes,192 bytes,224 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "32 bytes,64 bytes,96 bytes,128 bytes,160 bytes,192 bytes,224 bytes,256 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON0,UART Modem Control Register 0"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "255 bytes,224 bytes,192 bytes,160 bytes,128 bytes,96 bytes,64 bytes,32 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT0,UART Tx/Rx Status Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT0,UART Error Status Register 0"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT0,Uart FIFO Status Register 0"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT0,Uart Modem Status Register 0"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH0,UART Transmit Buffer (Holding & FIFO) Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH0 ,Transmit data for UART0"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH0,UART Transmit Buffer (Holding & FIFO) Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH0 ,Transmit data for UART0"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH0,Receive data for UART0"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV0,UART Channel Baud Rate Division Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV0 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL0,UART Channel Divisor Fractional Value Register 0"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL0 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP0,UART Interrupt Pending Register 0"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP0,UART Interrupt Source Pending Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM0,UART Interrupt Mask Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP0,UART Interrupt Source Pending Register 0"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM0,UART Interrupt Mask Register 0"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x13810000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON1, UART Line Control Register 1"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13810000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON1,UART Control Register 1"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON1,UART Control Register 1"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART FIFO Control Register 1"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART FIFO Control Register 1"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON1,UART Modem Control Register 1"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON1,UART Modem Control Register 1"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT1,UART Tx/Rx Status Register 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT1,UART Error Status Register 1"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT1,Uart FIFO Status Register 1"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT1,Uart Modem Status Register 1"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH1,UART Transmit Buffer (Holding & FIFO) Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH1 ,Transmit data for UART1"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH1,UART Transmit Buffer (Holding & FIFO) Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH1 ,Transmit data for UART1"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH1,Receive data for UART1"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV1,UART Channel Baud Rate Division Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV1 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL1,UART Channel Divisor Fractional Value Register 1"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL1 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP1,UART Interrupt Pending Register 1"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP1,UART Interrupt Source Pending Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM1,UART Interrupt Mask Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP1,UART Interrupt Source Pending Register 1"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM1,UART Interrupt Mask Register 1"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x13820000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON2, UART Line Control Register 2"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13820000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON2,UART Control Register 2"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON2,UART Control Register 2"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON2,UART FIFO Control Register 2"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes,16 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON2,UART Modem Control Register 2"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "15 bytes,14 bytes,12 bytes,10 bytes,8 bytes,6 bytes,4 bytes,2 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT2,UART Tx/Rx Status Register 2"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT2,UART Error Status Register 2"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT2,Uart FIFO Status Register 2"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT2,Uart Modem Status Register 2"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH2,UART Transmit Buffer (Holding & FIFO) Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH2 ,Transmit data for UART2"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH2,UART Transmit Buffer (Holding & FIFO) Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH2 ,Transmit data for UART2"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH2,Receive data for UART2"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV2,UART Channel Baud Rate Division Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV2 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL2,UART Channel Divisor Fractional Value Register 2"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL2 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP2,UART Interrupt Pending Register 2"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP2,UART Interrupt Source Pending Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM2,UART Interrupt Mask Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP2,UART Interrupt Source Pending Register 2"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM2,UART Interrupt Mask Register 2"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART3"
|
|
base ad:0x13830000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON3, UART Line Control Register 3"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13830000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON3,UART Control Register 3"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON3,UART Control Register 3"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON3,UART FIFO Control Register 3"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes,16 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT3,UART Tx/Rx Status Register 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT3,UART Error Status Register 3"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT3,Uart FIFO Status Register 3"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH3,UART Transmit Buffer (Holding & FIFO) Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH3 ,Transmit data for UART3"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH3,UART Transmit Buffer (Holding & FIFO) Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH3 ,Transmit data for UART3"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH3,Receive data for UART3"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV3,UART Channel Baud Rate Division Register 3"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV3 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL3,UART Channel Divisor Fractional Value Register 3"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL3 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP3,UART Interrupt Pending Register 3"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP3,UART Interrupt Source Pending Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM3,UART Interrupt Mask Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP3,UART Interrupt Source Pending Register 3"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM3,UART Interrupt Mask Register 3"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART4"
|
|
base ad:0x13840000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON4, UART Line Control Register 4"
|
|
bitfld.long 0x00 6. " INFRAMODE ,Infra-red Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " PARMODE ,Parity Mode" "No parity,No parity,No parity,No parity,Odd parity,Even parity,Parity forced/Checked as 1,Parity forced/Checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NSB ,Number of Stop Bit" "One per frame,Two per frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
if (((d.l(ad:0x13840000+0x04))&0x80)==0x80)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON4,UART Control Register 4"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RXTWEFIFO ,RX Time-out with empty RX FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time-out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON4,UART Control Register 4"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
else
|
|
bitfld.long 0x00 20.--22. " TXBURSTSIZE ,Tx DMA Burst Size" "1 byte,4 bytes,8 bytes,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--18. " RXBURSTSIZE ,Rx DMA Burst Size" "1 byte,4 bytes,8 bytes,16 bytes,?..."
|
|
bitfld.long 0x00 12.--15. " RXTII ,Rx Timeout Interrupt Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXTDMASE ,RX Time-out DMA suspend enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TXIT ,Tx Interrupt Type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXIT ,Rx Interrupt Type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTE ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Rx Error Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LBM ,Loop-back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SBS ,Send Break Signal" "Not sent,Sent"
|
|
bitfld.long 0x00 2.--3. " TM ,Transmit Mode" "Disabled,Request/Polling,DMA,?..."
|
|
bitfld.long 0x00 0.--1. " RM ,Receive Mode" "Disabled,Request/Polling,DMA,?..."
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON4,UART FIFO Control Register 4"
|
|
bitfld.long 0x00 8.--10. " TXFIFOTL ,Tx FIFO Trigger Level" "0 bytes,8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes"
|
|
bitfld.long 0x00 4.--6. " RXFIFOTL ,Rx FIFO Trigger Level" "8 bytes,16 bytes,24 bytes,32 bytes,40 bytes,48 bytes,56 bytes,64 bytes"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON4,UART FIFO Control Register 4"
|
|
bitfld.long 0x00 2. " TXFIFOR ,Tx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " RXFIFOR ,Rx FIFO Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
endif
|
|
sif cpu()!="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON4,UART Modem Control Register 4"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "UMCON4,UART Modem Control Register 4"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "High,Low"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT4,UART Tx/Rx Status Register 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXFIFOCOUNTC ,RX FIFO count in RX time-out status"
|
|
rbitfld.long 0x00 12.--15. " TXDMAFSMS ,TX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
rbitfld.long 0x00 8.--11. " RXDMAFSMS ,RX DMA FSM State" "Idle,Burst request,Burst ack.,Burst next,Single request,Single ack.,Single next,Last burst request,Last burst ack.,Last single request,Last single ack.,?..."
|
|
textline " "
|
|
eventfld.long 0x00 3. " RXTSSC ,RX Time-out status/Clear" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x00 2. " TE ,Transmitter empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 1. " TBE ,Transmit buffer empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 0. " RBDR ,Receive buffer data ready" "Empty,Not empty"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT4,UART Error Status Register 4"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT4,Uart FIFO Status Register 4"
|
|
bitfld.long 0x00 24. " TXFIFOF ,Tx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXFIFOC ,Tx FIFO Count"
|
|
bitfld.long 0x00 9. " TXFIFOERR ,Rx FIFO Error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXFIFOF ,Rx FIFO Full " "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXFIFOC ,Rx FIFO Count"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "UMSTAT4,Uart Modem Status Register 4"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "UTXH4,UART Transmit Buffer (Holding & FIFO) Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH4 ,Transmit data for UART4"
|
|
else
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "UTXH4,UART Transmit Buffer (Holding & FIFO) Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " UTXH4 ,Transmit data for UART4"
|
|
endif
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x00 "URXH4,Receive data for UART4"
|
|
in
|
|
group.long 0x28++0xB
|
|
line.long 0x00 "UBRDIV4,UART Channel Baud Rate Division Register 4"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV4 ,Baud rate division value"
|
|
line.long 0x04 "UFRACVAL4,UART Channel Divisor Fractional Value Register 4"
|
|
bitfld.long 0x04 0.--3. " UFRACVAL4 ,Determine the fractional part of baud rate divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "UINTP4,UART Interrupt Pending Register 4"
|
|
eventfld.long 0x08 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
eventfld.long 0x08 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x08 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
if cpu()=="Exynos5250"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "UINTSP4,UART Interrupt Source Pending Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "UINTM4,UART Interrupt Mask Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
else
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UINTSP4,UART Interrupt Source Pending Register 4"
|
|
bitfld.long 0x00 3. " MODEM ,Generates Modem interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 2. " TXD ,Generates Transmit interrupt" "Not generated,Generated"
|
|
bitfld.long 0x00 1. " ERROR ,Generates Error interrupt" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXD ,Generates Receive interrupt" "Not generated,Generated"
|
|
line.long 0x04 "UINTM4,UART Interrupt Mask Register 4"
|
|
bitfld.long 0x04 3. " MODEM ,Generates Modem interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " TXD ,Generates Transmit interrupt" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " ERROR ,Generates Error interrupt" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXD ,Generates Receive interrupt" "Not masked,Masked"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree.open "Inter-Integrated Circuit Bus Interface"
|
|
base ad:0x13860000
|
|
width 10.
|
|
base ad:0x13860000+0x0
|
|
tree "IIC 0"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON0,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT0,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT0,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD0,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS0,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC0,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x10000
|
|
tree "IIC 1"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON1,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT1,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT1,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD1,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS1,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC1,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x20000
|
|
tree "IIC 2"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON2,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT2,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT2,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD2,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS2,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC2,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x30000
|
|
tree "IIC 3"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON3,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT3,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT3,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD3,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS3,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC3,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x40000
|
|
tree "IIC 4"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON4,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT4,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT4,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD4,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS4,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC4,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x50000
|
|
tree "IIC 5"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON5,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT5,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT5,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD5,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS5,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC5,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x60000
|
|
tree "IIC 6"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON6,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT6,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT6,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD6,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS6,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC6,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x70000
|
|
tree "IIC 7"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON7,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT7,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT7,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD7,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS7,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC7,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
base ad:0x13860000+0x80000
|
|
tree "IIC 8"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "I2CCON8,I2C-bus interface control register"
|
|
bitfld.long 0x00 7. " ACKNLGDE_GEN ,I2C-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TX_CLK_SRC_SEL ,Transmit clock prescaler selection bit" "fPCLK/16,fPCLK/512"
|
|
bitfld.long 0x00 5. " TX_RX_INT ,Tx/Rx enabled bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_PEND_FLAG ,Interrupt pending flag" "No interrupt/Resume,Interrupt is pending"
|
|
hexmask.long.byte 0x00 0.--3. 1. " TRANS_CLK_VAL ,Transmit clock prescaler"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x04 "I2CSTAT8,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
rbitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
rbitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
rbitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
else
|
|
line.long 0x04 "I2CSTAT8,I2C-bus interface control/status register"
|
|
bitfld.long 0x04 6.--7. " MODE_SEL ,Master/slave Tx/Rx mode selection" "Slave Rx,Slave Tx,Master Rx,Master Tx"
|
|
bitfld.long 0x04 5. " BUSY_SIGN ,Busy signal status" "Not busy/stop,Busy/start"
|
|
bitfld.long 0x04 4. " SERIAL_OUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " ARB_STAT_FLAG ,Arbitration procedure status flag" "Successful,Failed"
|
|
bitfld.long 0x04 2. " ADD_SLAVE ,Address as slave status flag" "Cleared,I2CADD"
|
|
bitfld.long 0x04 1. " ADD_ZERO ,Address zero status flag" "Cleared,0x00"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LAS_REC ,Last received bit status flag" "0,1"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2CADD8,I2C-bus interface address register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SLAVE_ADDR ,Slave address latched from the I2C-bus"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "I2CDS8,I2C-bus interface transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_SHIFT ,Data shift register for Tx/Rx operation"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "I2CLC8,I2C-bus interface line control register"
|
|
bitfld.long 0x00 2. " FILT_EN ,Filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " SDA_OUT_DEL ,SDA line delay length selection" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "Serial Peripheral Interface"
|
|
tree "SPI 0"
|
|
base ad:0x13920000
|
|
width 18.
|
|
if (((d.l(ad:0x13920000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG0,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG0,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG0,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x13920000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG0,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG0,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN0,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x13920000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS0,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS0,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA0,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA0,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN0,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG0,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG0,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL0,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 1"
|
|
base ad:0x13930000
|
|
width 18.
|
|
if (((d.l(ad:0x13930000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG1,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG1,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG1,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x13930000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG1,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG1,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN1,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x13930000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS1,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS1,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA1,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA1,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN1,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG1,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG1,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL1,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPI 2"
|
|
base ad:0x13940000
|
|
width 18.
|
|
if (((d.l(ad:0x13940000))&0x04)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG2,SPI Configuration"
|
|
bitfld.long 0x00 6. " HIGH_SPEED_EN ,Slave TX output time control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CH_CFG2,SPI Configuration"
|
|
bitfld.long 0x00 5. " SW_RST ,Software reset" "Inactive,Active"
|
|
bitfld.long 0x00 4. " SLAVE ,Choose Master or Slave for SPI Port" "Master,Slave"
|
|
bitfld.long 0x00 3. " CPOL ,Determines whether active high or active low clock" "Active High,Active Low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B"
|
|
bitfld.long 0x00 1. " RX_CH_ON ,SPI Rx Channel" "Off,On"
|
|
bitfld.long 0x00 0. " TX_CH_ON ,SPI Tx Channel" "Off,On"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "MODE_CFG2,SPI FIFO control register"
|
|
bitfld.long 0x00 29.--30. " CH_WIDTH ,Shift-register width" "Byte,Halfword,Word,?..."
|
|
hexmask.long.word 0x00 19.--28. 1. " TRAILING_CNT ,Count value from writing the last data in RX FIFO to flush trailing bytes in FIFO"
|
|
bitfld.long 0x00 17.--18. " BUS_WIDTH ,SPI FIFO width" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--16. 1. " RX_RDY_LVL ,Rx FIFO trigger level in INT mode"
|
|
hexmask.long.byte 0x00 5.--10. 1. " TX_RDY_LVL ,Tx FIFO trigger level in INT mode"
|
|
bitfld.long 0x00 2. " RX_DMA_SW ,Rx DMA mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_DMA_SW ,Tx DMA mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMA_TYPE ,DMA transfer type" "Single,4 burst"
|
|
if (((d.l(ad:0x13940000+0x0C))&0x02)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG2,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
bitfld.long 0x00 0. " NSSOUT ,Slave selection signal (manual only)" "Active,Inactive"
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CS_REG2,Slave selection signal control signal"
|
|
hexmask.long.byte 0x00 4.--9. 1. " NCS_TIME_COUNT ,NSSOUT inactive time"
|
|
bitfld.long 0x00 1. " AUTO_N_MANUAL ,Chip select toggle manual or auto selection" "Manual,Auto"
|
|
endif
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SPI_INT_EN2,SPI interrupt enable register"
|
|
bitfld.long 0x00 6. " INT_EN_TRAILING ,Interrupt enable for trailing count to be 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " INT_EN_RX_OVERRUN ,Interrupt enable for RxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INT_EN_RX_UNDERRUN ,Interrupt enable for RxUnderrun" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_EN_TX_OVERRUN ,Interrupt enable for TxOverrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INT_EN_TX_UNDERRUN ,Interrupt enable for TxUnderrun" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_EN_RX_FIFO_RDY ,Interrupt enable for RxFifoRdy" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_EN_TX_FIFO_RDY ,Interrupt enable for TxFifoRdy" "Disabled,Enabled"
|
|
if (((d.l(ad:0x13940000))&0x10)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS2,SPI status register"
|
|
bitfld.long 0x00 25. " TX_DONE ,Indication of transfer done in shift register" "All case except below case,Tx FIFO and Shift empty"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SPI_STATUS2,SPI status register"
|
|
hexmask.long.word 0x00 15.--23. 1. " RX_FIFO_LVL ,Data level in Rx FIFO"
|
|
hexmask.long.word 0x00 6.--14. 1. " TX_FIFO_LVL ,Data level in Tx FIFO"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RX_OVERRUN ,Rx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 4. " RX_UNDERRUN ,Rx FIFO underrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_OVERRUN ,Tx FIFO overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " TX_UNDERRUN ,Tx FIFO underrun error" "No error,Error"
|
|
bitfld.long 0x00 1. " RX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "Less,More"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TX_FIFO_RDY ,Amount of data in FIFO compared to trigger level" "More,Less"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "SPI_TX_DATA2,SPI Tx data register"
|
|
hexmask.long 0x00 0.--31. 1. " TX_DATA ,Data to be transmitted over the SPI channel"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SPI_RX_DATA2,SPI Rx data register"
|
|
hexmask.long 0x00 0.--31. 1. " RX_DATA ,Data to be received over the SPI channel"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "PACKET_CNT_EN2,Packet count register"
|
|
bitfld.long 0x00 16. " PACKET_CNT_EN ,Enable bit for packet count" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT_VALUE ,Packet count value"
|
|
line.long 0x04 "PENDING_CLR_REG2,Status Pending Clear Register"
|
|
bitfld.long 0x04 4. " TX_UNDERRUN_CLR ,Tx underrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 3. " TX_OVERRUN_CLR ,Tx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 2. " RX_UNDERRUN_CLR ,Rx underrun pending clear bit" "Non-clear,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RX_OVERRUN_CLR ,Rx overrun pending clear bit" "Non-clear,Clear"
|
|
bitfld.long 0x04 0. " TRAILING_CLR ,Trailing pending clear bit" "Non-clear,Clear"
|
|
line.long 0x08 "SWAP_CFG2,SWAP configuration register"
|
|
bitfld.long 0x08 7. " RX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 6. " RX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
bitfld.long 0x08 5. " RX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TX_HWORD_SWAP ,Halfword swap" "Off,Swap"
|
|
bitfld.long 0x08 2. " TX_BYTE_SWAP ,Byte swap" "Off,Swap"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TX_BIT_SWAP ,Bit swap" "Off,Swap"
|
|
bitfld.long 0x08 0. " TX_SWAP_EN ,Swap enable" "Disabled,Enabled"
|
|
line.long 0x0C "FB_CLK_SEL2,Feedback clock selection register"
|
|
bitfld.long 0x0C 0.--1. " FB_CLK_SEL ,Feedback clock" "Disabled,90 degree,180 degree,270 degree"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "Display Controller"
|
|
base ad:0x11C00000
|
|
width 10.
|
|
tree "Video Control"
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "VIDCON0,Video output format"
|
|
bitfld.long 0x00 30. " DSI_EN ,Enables MIPI DSI" "Disabled,Enabled"
|
|
bitfld.long 0x00 26.--28. " VIDOUT ,Output format of video controller" "RGB,Reserved,LDI0,LDI1,WB and RGB,Reserved,WB and LDI0,WB and LDI1"
|
|
bitfld.long 0x00 23.--25. " L1_DATA16 ,Output data format mode for LDI1" "16-bit,16+2-bit,9+9-bit,16+8-bit,18-bit,8+8-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 20.--22. " L0_DATA16 ,Output data format mode for LDI0" "16-bit,16+2-bit,9+9-bit,16+8-bit,18-bit,8+8-bit,?..."
|
|
bitfld.long 0x00 18. " RGSPSEL ,RGB display mode" "Parallel,Serial"
|
|
bitfld.long 0x00 17. " PNRMODE ,Controls inverting RGB_ORDER" "Normal,Invert"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLKVALUP , CLKVAL_F update timing control" "Always,Start of frame"
|
|
hexmask.long.byte 0x00 6.--13. 1. " CLKVAL_F ,Rates of VCLK and CLKVAL"
|
|
bitfld.long 0x00 5. " VCLKFREE ,Controls VCLK Free Run mode" "Normal,Free-run"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENVID ,Video output and logic control signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENVID_F ,Video output and logic control signal at current frame end" "Disabled,Enabled"
|
|
line.long 0x04 "VIDCON1,RGB I/F control signal"
|
|
hexmask.long.word 0x04 16.--26. 1. " LINECNT ,Status of the line counter"
|
|
rbitfld.long 0x04 15. " FSTATUS ,Field status" "ODD,EVEN"
|
|
rbitfld.long 0x04 13.--14. " VSTATUS ,Vertical status" "VSYNC,BACK Porch,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x04 9.--10. " FIXVCLK ,VCLK hold scheme at data under-flow" "Hold,Running,Reserved,Running and VDEN disable"
|
|
bitfld.long 0x04 7. " IVCLK ,Polarity of the VCLK active edge" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 6. " IHSYNC ,HSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IVSYNC ,VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x04 4. " IVDEN ,VDEN pulse polarity" "Normal,Inverted"
|
|
if (((d.l(ad:0x11C00000))&0x40000)==0x40000)||((((d.l(ad:0x11C00000))&0x40000)==0x00000)&&(((d.l(ad:0x11C00000+0x08))&0x8000000)==0x8000000))
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "VIDCON2,Output date format control"
|
|
bitfld.long 0x00 27. " RGB_SKIN_EN ,RGB skip mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " RGB_DUMMY_LOC ,RGB dummy insertion location" "Last,First"
|
|
bitfld.long 0x00 24. " RGB_DUMMY_EN ,RGB dummy insertion mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " RGB_ORDER_E ,RGB interface output order (even line)" "R->G->B,G->B->R,B->R->G,Reserved,B->G->R,R->B->G,G->R->B,?..."
|
|
bitfld.long 0x00 16.--18. " RGB_ORDER_O ,RGB interface output order (odd line)" "R->G->B,G->B->R,B->R->G,Reserved,B->G->R,R->B->G,G->R->B,?..."
|
|
bitfld.long 0x00 12.--13. " TVFORMATSEL ,Output format of YUV data" "Reserved,YUV422,YUV444,YUV444"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ORGYCBCR ,Order of YUV data" "Y-CbCr,CbCr-Y"
|
|
bitfld.long 0x00 7. " YUVORD ,Order of Chroma data" "Cb-Cr,Cr-Cb"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 0.--4. " WB_FRAME_SKIP ,WB frame skip rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16,1:17,1:18,1:19,1:20,1:21,1:22,1:23,1:24,1:25,1:26,1:27,1:28,1:29,1:0,?..."
|
|
;Documentation contradicts about 11101 bit - 1:30 or 1:0
|
|
else
|
|
bitfld.long 0x00 0.--4. " WB_FRAME_SKIP ,WB frame skip rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16,1:17,1:18,1:19,1:20,1:21,1:22,1:23,1:24,1:25,1:26,1:27,1:28,1:29,1:30,?..."
|
|
endif
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "VIDCON2,Output date format control"
|
|
bitfld.long 0x00 27. " RGB_SKIN_EN ,RGB skip mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " RGB_DUMMY_LOC ,RGB dummy insertion location" "Last,First"
|
|
bitfld.long 0x00 24. " RGB_DUMMY_EN ,RGB dummy insertion mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " RGB_ORDER_E ,RGB interface output order (even line)" "RGB,GBR,BRG,Reserved,BGR,RBG,GRB,?..."
|
|
bitfld.long 0x00 16.--18. " RGB_ORDER_O ,RGB interface output order (odd line)" "RGB,GBR,BRG,Reserved,BGR,RBG,GRB,?..."
|
|
bitfld.long 0x00 12.--13. " TVFORMATSEL ,Output format of YUV data" "Reserved,YUV422,YUV444,YUV444"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ORGYCBCR ,Order of YUV data" "Y-CbCr,CbCr-Y"
|
|
bitfld.long 0x00 7. " YUVORD ,Order of Chroma data" "Cb-Cr,Cr-Cb"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 0.--4. " WB_FRAME_SKIP ,WB frame skip rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16,1:17,1:18,1:19,1:20,1:21,1:22,1:23,1:24,1:25,1:26,1:27,1:28,1:29,1:0,?..."
|
|
;Documentation contradicts about 11101 bit - 1:30 or 1:0
|
|
else
|
|
bitfld.long 0x00 0.--4. " WB_FRAME_SKIP ,WB frame skip rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16,1:17,1:18,1:19,1:20,1:21,1:22,1:23,1:24,1:25,1:26,1:27,1:28,1:29,1:30,?..."
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "VIDCON3,Image enhancement control"
|
|
bitfld.long 0x00 18. " CG_ON ,Control color gain" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " GM_ON ,Control gamma" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " GM_MODE ,Gamma mode selection" "64 step,16 step"
|
|
textline " "
|
|
bitfld.long 0x00 14. " HUE_CSC_F_NARROW ,Controls HUE CSC_F" "Wide,Narrow"
|
|
bitfld.long 0x00 13. " HUE_CSC_F_EQ709 ,Controls HUE CSC_F parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 12. " HUE_CSC_F_ON ,Enables HUE_CSC_F" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HUE_CSC_B_NARROW ,Controls HUE CSC_B" "Wide,Narrow"
|
|
bitfld.long 0x00 9. " HUE_CSC_B_EQ709 ,Controls HUE CSC_B parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 8. " HUE_CSC_B_ON ,Enables HUE_CSC_B" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HUE_ON ,Enables control HUE" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PC_DIR ,Controls Pixel Compensation direction" "+0.5,-0.5"
|
|
bitfld.long 0x00 0. " PC_ON ,Enables Pixel Compensation" "Disabled,Enabled"
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "VIDTCON0,Video time control 0 register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBPDE ,Vertical back porch for even field"
|
|
hexmask.long.byte 0x00 16.--23. 1. " VBPD ,Vertical back porch"
|
|
hexmask.long.byte 0x00 8.--15. 1. " VFPD ,Vertical front porch"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " VSPW ,Vertical sync pulse width"
|
|
line.long 0x04 "VIDTCON1,Video time control 1 register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VFPDE ,Vertical front porch for even field"
|
|
hexmask.long.byte 0x04 16.--23. 1. " HBPD ,Horizontal back porch"
|
|
hexmask.long.byte 0x04 8.--15. 1. " HFPD ,Horizontal front porch"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " HSPW ,Horizontal sync pulse width"
|
|
line.long 0x08 "VIDTCON2,Video time control 2 register"
|
|
hexmask.long.word 0x08 11.--21. 1. " LINEVAL ,Vertical size of display"
|
|
hexmask.long.word 0x08 0.--10. 1. " HOZVAL ,Horizontal size of display"
|
|
line.long 0x0C "VIDTCON3,Video time control 3 register"
|
|
bitfld.long 0x0C 31. " VSYNCEN ,VSYNC signal output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 29. " FRMEN ,FRM signal output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " INVFRM ,Polarity of FRM pulse" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 24.--27. " FRMVRATE ,FRM issue rate" "1:1,1:2,1:3,1:4,1:5,1:6,1:7,1:8,1:9,1:10,1:11,1:12,1:13,1:14,1:15,1:16"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " FRMVFPD ,Number of line between data active and FRM signal"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " FRNVSPW ,Number of line of FRM signal width"
|
|
tree.end
|
|
width 9.
|
|
tree "Video Window Control"
|
|
if (((d.l(ad:0x11C00000+0x20))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x20))&0x4000)==0x0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x20))&0x40)==0x40)&&(((d.l(ad:0x11C00000+0x20))&0x4000)==0x0000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x20))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x20))&0x4000)==0x4000)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "WINCON0,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS_H ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL_H ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Trigger,No trigger"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x11C00000+0x24))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x24))&0x4000)==0x0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x24))&0x40)==0x40)&&(((d.l(ad:0x11C00000+0x24))&0x4000)==0x0000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x24))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x24))&0x4000)==0x4000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WINCON1,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "Update,No update"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x11C00000+0x28))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x28))&0x4000)==0x0000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x28))&0x40)==0x40)&&(((d.l(ad:0x11C00000+0x28))&0x4000)==0x0000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x28))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x28))&0x4000)==0x4000)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "WINCON2,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 1,?..."
|
|
bitfld.long 0x00 29. " LIMIT_ON ,CSC source limiter" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EQ709 ,Controls CSC parameter" "Eq.601,Eq.709"
|
|
bitfld.long 0x00 26.--27. " NWIDE/NARROW ,Colour space conversion from YCbCr to RGB" "Wide,Reserved,Reserved,Narrow"
|
|
bitfld.long 0x00 23. " LOCALSEL_F ,Local path source" "Path 2,Path 3"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENLOCAL_F ,Data access method" "Dedicated DMA,Local Path"
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
bitfld.long 0x00 13. " INRGB ,Input color space of source image" "RGB,YCbCr"
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x11C00000+0x2C))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x2C))&0x4000)==0x0000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x2C))&0x40)==0x40)&&(((d.l(ad:0x11C00000+0x2C))&0x4000)==0x0000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x2C))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x2C))&0x4000)==0x4000)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WINCON3,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
if (((d.l(ad:0x11C00000+0x30))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x30))&0x4000)==0x0000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x30))&0x40)==0x40)&&(((d.l(ad:0x11C00000+0x30))&0x4000)==0x0000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
elif (((d.l(ad:0x11C00000+0x30))&0x40)==0x00)&&(((d.l(ad:0x11C00000+0x30))&0x4000)==0x4000)
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "ALPHA0,ALPHA1"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WINCON4,Window feature setting"
|
|
rbitfld.long 0x00 31. 21. " BUFSTATUS ,Buffer status" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
bitfld.long 0x00 30. 20. " BUFSEL ,Buffer set" "Buffer set 0,Buffer set 1,Buffer set 2,?..."
|
|
rbitfld.long 0x00 25. " TRGSTATUS ,Trigger status" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFAUTOEN ,Double Buffer Auto control" "Fixed,Auto changed"
|
|
bitfld.long 0x00 18. " BITSWP_F ,Bit swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BYTSWP_F ,Byte swap control bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HAWSWP_F ,Half-Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WSWP_F ,Word swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BUF_MODE ,Auto buffering mode" "Double,Triple"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " BURTSLEN ,DMA Burst Maximum Length" "16 word,8 word,4 word,?..."
|
|
bitfld.long 0x00 7. " ALPHA_MUL_F ,Multiplied Alpha value mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " BLD_PIX_F ,Blending category" "Per plane,Per pixel"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " BPPMODE_F ,Bits Per Pixel mode for window image" "1 bpp,2 bpp,4 bpp,8 bpp(1),8 bpp(2),16 bpp(1),16 bpp(2),16 bpp(3),18 bpp(1),18 bpp(2),19 bpp,24 bpp(1),24 bpp(2),25 bpp,13 bpp,15 bpp"
|
|
bitfld.long 0x00 1. " ALPHA_SEL_F ,Alpha value" "AEN,DATA"
|
|
bitfld.long 0x00 0. " ENWIN_F ,Enable/disable video output and logic immediately" "Disable,Enable"
|
|
endif
|
|
tree.end
|
|
width 11.
|
|
tree "Window Shadow & Position Control"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SHADOWCON,Window shadow control register"
|
|
bitfld.long 0x00 14. " W4_SHADOW_PROTECT ,Protects to update window 4's shadow register" "Updates per frame,Protects to update"
|
|
bitfld.long 0x00 13. " W3_SHADOW_PROTECT ,Protects to update window 3's shadow register" "Updates per frame,Protects to update"
|
|
bitfld.long 0x00 12. " W2_SHADOW_PROTECT ,Protects to update window 2's shadow register" "Updates per frame,Protects to update"
|
|
textline " "
|
|
bitfld.long 0x00 11. " W1_SHADOW_PROTECT ,Protects to update window 1's shadow register" "Updates per frame,Protects to update"
|
|
bitfld.long 0x00 10. " W0_SHADOW_PROTECT ,Protects to update window 0's shadow register" "Updates per frame,Protects to update"
|
|
bitfld.long 0x00 7. " C2_ENLOCAL_F ,Enables Channel 2 Local Path" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " C1_ENLOCAL_F ,Enables Channel 1 Local Path" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " C0_ENLOCAL_F ,Enables Channel 0 Local Path" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " C4_EN_F ,Enables Channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C3_EN_F ,Enables Channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " C2_EN_F ,Enables Channel 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " C1_EN_F ,Enables Channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C0_EN_F ,Enables Channel 0" "Disabled,Enabled"
|
|
width 11.
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "WINCHMAP2,Channel mapping control register"
|
|
bitfld.long 0x00 28.--30. " CH4FISEL ,Select Channel 4's channel" "Reserved,Window 0,Window 1,Reserved,Reserved,Window 2,Window 3,Window 4"
|
|
bitfld.long 0x00 25.--27. " CH3FISEL ,Select Channel 3's channel" "Reserved,Window 0,Window 1,Reserved,Reserved,Window 2,Window 3,Window 4"
|
|
bitfld.long 0x00 22.--24. " CH2FISEL ,Select Channel 2's channel" "Reserved,Window 0,Window 1,Reserved,Reserved,Window 2,Window 3,Window 4"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " CH1FISEL ,Select Channel 1's channel" "Reserved,Window 0,Window 1,Reserved,Reserved,Window 2,Window 3,Window 4"
|
|
bitfld.long 0x00 16.--18. " CH0FISEL ,Select Channel 0's channel" "Reserved,Window 0,Window 1,Reserved,Reserved,Window 2,Window 3,Window 4"
|
|
bitfld.long 0x00 12.--14. " W4FISEL ,Select Window 4's channel" "Reserved,Channel 0,Channel 1,Reserved,Reserved,Channel 2,Channel 3,Channel 4"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " W3FISEL ,Select Window 3's channel" "Reserved,Channel 0,Channel 1,Reserved,Reserved,Channel 2,Channel 3,Channel 4"
|
|
bitfld.long 0x00 9.--11. " W2FISEL ,Select Window 2's channel" "Reserved,Channel 0,Channel 1,Reserved,Reserved,Channel 2,Channel 3,Channel 4"
|
|
bitfld.long 0x00 9.--11. " W1FISEL ,Select Window 1's channel" "Reserved,Channel 0,Channel 1,Reserved,Reserved,Channel 2,Channel 3,Channel 4"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " W0FISEL ,Select Window 0's channel" "Reserved,Channel 0,Channel 1,Reserved,Reserved,Channel 2,Channel 3,Channel 4"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "WINCHMAP2,Channel mapping control register"
|
|
;no detailed information in documentation about this register for Exynos4210
|
|
endif
|
|
group.long 0x40++0x0B
|
|
line.long 0x00 "VIDOSD0A,Window 0 position control A register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD0B,Window 0 position control B register"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD0C,Window 0 position control C register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " OSDSIZE ,Window size"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "VIDOSD1A,Window 1 position control A register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD1B,Window 1 position control B register"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD1C,Window 1 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "VIDOSD1D,Window 1 position control D register"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " OSDSIZE ,Window size"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "VIDOSD2A,Window 2 position control A register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD2B,Window 2 position control B register"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD2C,Window 2 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "VIDOSD2D,Window 2 position control D register"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " OSDSIZE ,Window size"
|
|
group.long 0x70++0x0B
|
|
line.long 0x00 "VIDOSD3A,Window 3 position control A register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD3B,Window 3 position control B register"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD3C,Window 3 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x80++0x0B
|
|
line.long 0x00 "VIDOSD4A,Window 4 position control A register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OSD_LEFTTOPX_F ,Horizontal screen coordinate for left top pixel"
|
|
hexmask.long.word 0x00 0.--10. 1. " OSD_LEFTTOPY_F ,Vertical screen coordinate for left top pixel"
|
|
line.long 0x04 "VIDOSD4B,Window 4 position control B register"
|
|
hexmask.long.word 0x04 11.--21. 1. " OSD_RIGHTBOTX_F ,Horizontal screen coordinate for right bottom pixel"
|
|
hexmask.long.word 0x04 0.--10. 1. " OSD_RIGHTBOTY_F ,Vertical screen coordinate for right bottom pixel"
|
|
line.long 0x08 "VIDOSD4C,Window 4 position control C register"
|
|
bitfld.long 0x08 20.--23. " ALPHA0_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " ALPHA0_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " ALPHA0_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " ALPHA1_R_H_F ,Red Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " ALPHA1_G_H_F ,Green Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " ALPHA1_B_H_F ,Blue Alpha upper value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
width 14.
|
|
tree "Frame Buffer"
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "VIDW00ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW00ADD0B1,Frame buffer address register"
|
|
group.long 0x20A0++0x03
|
|
line.long 0x00 "VIDW00ADD0B2,Frame buffer address register"
|
|
group.long 0xA8++0x07
|
|
line.long 0x00 "VIDW01ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW01ADD0B1,Frame buffer address register"
|
|
group.long 0x20A8++0x03
|
|
line.long 0x00 "VIDW01ADD0B2,Frame buffer address register"
|
|
group.long 0xB0++0x07
|
|
line.long 0x00 "VIDW02ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW02ADD0B1,Frame buffer address register"
|
|
group.long 0x20B0++0x03
|
|
line.long 0x00 "VIDW02ADD0B2,Frame buffer address register"
|
|
group.long 0xB8++0x07
|
|
line.long 0x00 "VIDW03ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW03ADD0B1,Frame buffer address register"
|
|
group.long 0x20B8++0x03
|
|
line.long 0x00 "VIDW03ADD0B2,Frame buffer address register"
|
|
group.long 0xC0++0x07
|
|
line.long 0x00 "VIDW04ADD0B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW04ADD0B1,Frame buffer address register"
|
|
group.long 0x20C0++0x03
|
|
line.long 0x00 "VIDW04ADD0B2,Frame buffer address register"
|
|
group.long 0xD0++0x07
|
|
line.long 0x00 "VIDW00ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW00ADD1B1,Frame buffer address register"
|
|
group.long 0x20D0++0x03
|
|
line.long 0x00 "VIDW00ADD1B2,Frame buffer address register"
|
|
group.long 0xD8++0x07
|
|
line.long 0x00 "VIDW01ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW01ADD1B1,Frame buffer address register"
|
|
group.long 0x20D8++0x03
|
|
line.long 0x00 "VIDW01ADD1B2,Frame buffer address register"
|
|
group.long 0xE0++0x07
|
|
line.long 0x00 "VIDW02ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW02ADD1B1,Frame buffer address register"
|
|
group.long 0x20E0++0x03
|
|
line.long 0x00 "VIDW02ADD1B2,Frame buffer address register"
|
|
group.long 0xE8++0x07
|
|
line.long 0x00 "VIDW03ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW03ADD1B1,Frame buffer address register"
|
|
group.long 0x20E8++0x03
|
|
line.long 0x00 "VIDW03ADD1B2,Frame buffer address register"
|
|
group.long 0xF0++0x07
|
|
line.long 0x00 "VIDW04ADD1B0,Frame buffer address register"
|
|
line.long 0x04 "VIDW04ADD1B1,Frame buffer address register"
|
|
group.long 0x20F0++0x03
|
|
line.long 0x00 "VIDW04ADD1B2,Frame buffer address register"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "VIDW00ADD2,Frame buffer address 2"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "VIDW01ADD2,Frame buffer address 2"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "VIDW02ADD2,Frame buffer address 2"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "VIDW03ADD2,Frame buffer address 2"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "VIDW04ADD2,Frame buffer address 2"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
tree.end
|
|
width 14.
|
|
tree "Video Interrupt & Color Control"
|
|
if (((d.l(ad:0x11C00000+0x130))&0x1)==0x1)&&(((d.l(ad:0x11C00000+0x130))&0x20000)==0x20000)&&(((d.l(ad:0x11C00000+0x130))&0x2)==0x2)
|
|
group.long 0x0130++0x07
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 19. " SYSMAINCON ,Interrupt enable bit to main LCD" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SYSSUBCON ,Interrupt enable bit to sub LCD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " FIFOSEL_WIN4 ,Window 4 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FIFOSEL_WIN3 ,Window 3 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FIFOSEL_WIN2 ,Window 2 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FIFOSEL_WIN1 ,Window 1 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " FIFOSEL_WIN0 ,Window 0 control" "Disabled,Enabled"
|
|
textline " "
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
else
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "Reserved,Reserved,Reserved,Empty,Full,?..."
|
|
endif
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
line.long 0x04 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x04 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
elif (((d.l(ad:0x11C00000+0x130))&0x1)==0x1)&&(((d.l(ad:0x11C00000+0x130))&0x20000)==0x20000)&&(((d.l(ad:0x11C00000+0x130))&0x2)==0x0)
|
|
group.long 0x0130++0x07
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 19. " SYSMAINCON ,Interrupt enable bit to main LCD" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SYSSUBCON ,Interrupt enable bit to Sub LCD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
else
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "Reserved,Reserved,Reserved,Empty,Full,?..."
|
|
endif
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
line.long 0x04 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x04 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
elif (((d.l(ad:0x11C00000+0x130))&0x1)==0x1)&&(((d.l(ad:0x11C00000+0x130))&0x20000)==0x00000)&&(((d.l(ad:0x11C00000+0x130))&0x2)==0x2)
|
|
group.long 0x0130++0x07
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " FIFOSEL_WIN4 ,Window 4 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FIFOSEL_WIN3 ,Window 3 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FIFOSEL_WIN2 ,Window 2 control" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " FIFOSEL_WIN1 ,Window 1 control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FIFOSEL_WIN0 ,Window 0 control" "Disabled,Enabled"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
else
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "Reserved,Reserved,Reserved,Empty,Full,?..."
|
|
endif
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
line.long 0x04 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x04 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
elif (((d.l(ad:0x11C00000+0x130))&0x1)==0x1)&&(((d.l(ad:0x11C00000+0x130))&0x20000)==0x00000)&&(((d.l(ad:0x11C00000+0x130))&0x2)==0x0)
|
|
group.long 0x0130++0x07
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 17. " I80IFDONE ,I80 Interface interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupt Enable Control Bit" "Disabled,Enabled"
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
else
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "Reserved,Reserved,Reserved,Empty,Full,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO Interrupt enable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
line.long 0x04 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x04 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
elif (((d.l(ad:0x11C00000+0x130))&0x1)==0x0)
|
|
group.long 0x0130++0x07
|
|
line.long 0x00 "VIDINTCON0,Video interrupt control 0 register"
|
|
hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Interval of the FIFO interrupt"
|
|
bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start of" "BACK Porch,VSYNC,ACTIVE,FRONT Porch"
|
|
bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start of" "None,BACK Porch,VSYNC,FRONT Porch"
|
|
textline " "
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "0-25%,0-50%,0-75%,Empty,Full,?..."
|
|
else
|
|
bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO interrupt Level" "Reserved,Reserved,Reserved,Empty,Full,?..."
|
|
endif
|
|
bitfld.long 0x00 0. " INTEN ,Video interrupt enable control bit" "Disabled,Enabled"
|
|
line.long 0x04 "VIDINTCON1,Video interrupt control 1 register"
|
|
eventfld.long 0x04 2. " INTI80PEND ,I80 Done interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 1. " INTFRMPEND ,Frame sync interrupt" "Not requested,Requested"
|
|
eventfld.long 0x04 0. " INTFIFOPEND ,FIFO Level interrupt" "Not requested,Requested"
|
|
endif
|
|
textline " "
|
|
group.long 0x140++0x07
|
|
line.long 0x00 "W1KEYCON0,Win1 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W1KEYCON1,Win1 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x148++0x07
|
|
line.long 0x00 "W2KEYCON0,Win2 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W2KEYCON1,Win2 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x150++0x07
|
|
line.long 0x00 "W3KEYCON0,Win3 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W3KEYCON1,Win3 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x158++0x07
|
|
line.long 0x00 "W4KEYCON0,Win4 color key 0 register"
|
|
bitfld.long 0x00 26. " KEYBLEN_F ,Blending" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " KEYEN_F ,Color key" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " DIRCON_F ,Color key direction" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " COMPKEY_F ,Position bit of COLVAL"
|
|
line.long 0x04 "W4KEYCON1,Win4 color key 1 value"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL_F ,Color key value for transparent pixel effect"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "W1KEYALPHA,Win1 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "W2KEYALPHA,Win2 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "W3KEYALPHA,Win3 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "W4KEYALPHA,Win4 Color Key ALPHA Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " KEYALPHA_R_F ,Key alpha R value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " KEYALPHA_G_F ,Key alpha G value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " KEYALPHA_B_F ,Key alpha B value"
|
|
group.long 0x0170++0x03
|
|
line.long 0x00 "DITHMODE,Dithering control 1 register"
|
|
bitfld.long 0x00 5.--6. " RDITHPOS ,Red dither bit" "8-bit,6-bit,5-bit,?..."
|
|
bitfld.long 0x00 3.--4. " GDITHPOS ,Green dither bit" "8-bit,6-bit,5-bit,?..."
|
|
bitfld.long 0x00 1.--2. " BDITHPOS ,Blue dither bit" "8-bit,6-bit,5-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " DITHEN_F ,Enables dithering bit" "Disabled,Enabled"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "WIN0MAP,Win0 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "WIN1MAP,Win1 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "WIN2MAP,Win2 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "WIN3MAP,Win3 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "WIN4MAP,Win4 color MAP"
|
|
bitfld.long 0x00 24. " MAPCOLEN_F ,Window's color mapping control bit" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " MAPCOLOR ,Color value"
|
|
group.long 0x019C++0x07
|
|
line.long 0x00 "WPALCON_H,Window palette control register"
|
|
bitfld.long 0x00 17.--18. " W4PAL_H ,Size of palette data format of window 4" "00,01,10,11"
|
|
bitfld.long 0x00 13.--14. " W3PAL_H ,Size of palette data format of window 3" "00,01,10,11"
|
|
bitfld.long 0x00 9.--10. " W2PAL_H ,Size of palette data format of window 2" "00,01,10,11"
|
|
line.long 0x04 "WPALCON_L,Window palette control register"
|
|
bitfld.long 0x04 9. " PALUPDATEEN ,Palette update" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " W4PAL_L ,Size of palette data format of window 4" "0,1"
|
|
bitfld.long 0x04 7. " W3PAL_L ,Size of palette data format of window 3" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " W2PAL_L ,Size of palette data format of window 2" "0,1"
|
|
bitfld.long 0x04 3.--5. " W1PAL_L ,Size of palette data format of window 1" "25-bit (A:8:8:8),24-bit (8:8:8),19-bit (A:6:6:6),18-bit (A:6:6:5),18-bit (6:6:6),16-bit (A:5:5:5),16-bit (5:6:5),32-bit (8:8:8:8)"
|
|
bitfld.long 0x04 0.--2. " W0PAL_L ,Size of palette data format of window 0" "25-bit (A:8:8:8),24-bit (8:8:8),19-bit (A:6:6:6),18-bit (A:6:6:5),18-bit (6:6:6),16-bit (A:5:5:5),16-bit (5:6:5),32-bit (8:8:8:8)"
|
|
group.long 0x01A4++0x03
|
|
line.long 0x00 "TRIGCON,I80/RGB trigger control register"
|
|
bitfld.long 0x00 26. " SWTRGCMD_W4BUF ,Window 4 double buffer software trigger command (when TRGMODE_W4BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " TRGMODE_W4BUF ,Window 4 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SWTRGCMD_W3BUF ,Window 3 double buffer software trigger command (when TRGMODE_W3BUF is 1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TRGMODE_W3BUF ,Window 3 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SWTRGCMD_W2BUF ,Window 2 double buffer software trigger command (when TRGMODE_W2BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TRGMODE_W2BUF ,Window 2 double buffer trigger" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SWTRGCMD_W1BUF ,Window 1 double buffer software trigger command (when TRGMODE_W1BUF is 1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " TRGMODE_W1BUF ,Window 1 double buffer trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SWTRGCMD_W0BUF ,Window 0 double buffer software trigger command (when TRGMODE_W0BUF is 1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TRGMODE_W0BUF ,Window 0 double buffer trigger" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " SWFRSTATUS_I80 ,Frame Done Status (when TRGMODE is 1)" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " SWTRGCMD_I80 ,I80 start software trigger command (when TRGMODE is 1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TRGMODE_I80 ,I80 start trigger" "Disabled,Enabled"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "I80IFCONA0,LCD I80 Interface Control 0"
|
|
bitfld.long 0x00 16.--19. " LCD_CS_SETUP ,CLK cycles of address signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " LCD_WR_SETUP ,CLK cycles of CS signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " LCD_WR_ACT ,CLK cycles of chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " LCD_WR_HOLD ,CLK cycles of chip select disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " RSPOL ,Polarity of RS signal" "Low,High"
|
|
bitfld.long 0x00 0. " I80IFEN ,LCD I80 Interface" "Disabled,Enabled"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "I80IFCONA1,LCD I80 Interface Control 1"
|
|
bitfld.long 0x00 16.--19. " LCD_CS_SETUP ,CLK cycles of address signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " LCD_WR_SETUP ,CLK cycles of CS signal enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " LCD_WR_ACT ,CLK cycles of chip select enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " LCD_WR_HOLD ,CLK cycles of chip select disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " RSPOL ,Polarity of RS signal" "Low,High"
|
|
bitfld.long 0x00 0. " I80IFEN ,LCD I80 Interface" "Disabled,Enabled"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "I80IFCONB0,LCD I80 Interface Control 0"
|
|
bitfld.long 0x00 9. " NORMAL_CMD_ST ,Normal command start" "Off,On"
|
|
bitfld.long 0x00 5.--6. " FRAME_SKIP ,I80 interface output frame decimation factor" "1,2,3,?..."
|
|
bitfld.long 0x00 0.--3. " AUTO_CMD_RATE ,Auto command rate" "Disabled,Per 2 frames,Per 4 frames,Per 6 frames,Per 8 frames,Per 10 frames,Per 12 frames,Per 14 frames,Per 16 frames,Per 18 frames,Per 20 frames,Per 22 frames,Per 24 frames,Per 26 frames,Per 28 frames,Per 30 frames"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "I80IFCONB1,LCD I80 Interface Control 1"
|
|
bitfld.long 0x00 9. " NORMAL_CMD_ST ,Normal command start" "Off,On"
|
|
bitfld.long 0x00 5.--6. " FRAME_SKIP ,I80 interface output frame decimation factor" "1,2,3,?..."
|
|
bitfld.long 0x00 0.--3. " AUTO_CMD_RATE ,Auto command rate" "Disabled,Per 2 frames,Per 4 frames,Per 6 frames,Per 8 frames,Per 10 frames,Per 12 frames,Per 14 frames,Per 16 frames,Per 18 frames,Per 20 frames,Per 22 frames,Per 24 frames,Per 26 frames,Per 28 frames,Per 30 frames"
|
|
group.long 0x01C0++0x03
|
|
line.long 0x00 "COLORGAINCON,Color GAIN Control Register"
|
|
hexmask.long.word 0x00 20.--29. 1. " CG_RGAIN ,Color gain value of R data"
|
|
hexmask.long.word 0x00 10.--19. 1. " CG_GGAIN ,Color gain value of G data"
|
|
hexmask.long.word 0x00 0.--9. 1. " CG_BGAIN ,Color gain value of B data"
|
|
tree.end
|
|
width 14.
|
|
tree "LCD & Window Control"
|
|
group.long 0x01D0++0x07
|
|
line.long 0x00 "LDI_CMDCON0,LCD i80 interface command control 0"
|
|
bitfld.long 0x00 22.--23. " CMD11_EN ,Command 11" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 20.--21. " CMD10_EN ,Command 10" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 18.--19. " CMD9_EN ,Command 9" "Disabled,Normal,Auto,Normal and Auto"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " CMD8_EN ,Command 8" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 14.--15. " CMD7_EN ,Command 7" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 12.--13. " CMD6_EN ,Command 6" "Disabled,Normal,Auto,Normal and Auto"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " CMD5_EN ,Command 5" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 8.--9. " CMD4_EN ,Command 4" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 6.--7. " CMD3_EN ,Command 3" "Disabled,Normal,Auto,Normal and Auto"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CMD2_EN ,Command 2" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 2.--3. " CMD1_EN ,Command 1" "Disabled,Normal,Auto,Normal and Auto"
|
|
bitfld.long 0x00 0.--1. " CMD0_EN ,Command 0" "Disabled,Normal,Auto,Normal and Auto"
|
|
line.long 0x04 "LDI_CMDCON1,LCD i80 interface command control 1"
|
|
bitfld.long 0x04 11. " CMD11_RS ,Controls Command 11 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " CMD10_RS ,Controls Command 10 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " CMD9_RS ,Controls Command 9 RS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 8. " CMD8_RS ,Controls Command 8 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " CMD7_RS ,Controls Command 7 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CMD6_RS ,Controls Command 6 RS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " CMD5_RS ,Controls Command 5 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CMD4_RS ,Controls Command 4 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " CMD3_RS ,Controls Command 3 RS" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " CMD2_RS ,Controls Command 2 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CMD1_RS ,Controls Command 1 RS" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CMD0_RS ,Controls Command 0 RS" "Disabled,Enabled"
|
|
group.long 0x01E0++0x0B
|
|
line.long 0x00 "SIFCCON0,I80 system interface manual command control 0"
|
|
bitfld.long 0x00 6. " SYS_ST_CON ,ST Signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYS_RS_CON ,RS Signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SYS_NCS0_CON ,nCS0 Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYS_NCS1_CON ,nCS1 Signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SYS_NOE_CON ,cOE Signal" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SYS_NWE_CON ,nWE Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SCOMEN ,Command mode" "Normal,Manual"
|
|
line.long 0x04 "SIFCCON1,I80 system interface manual command control 1"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " SYS_WDATA ,LCD i80 system interface write data"
|
|
rgroup.long 0x01E8++0x03
|
|
line.long 0x00 "SIFCCON2,I80 system interface manual command control 2"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " SYS_RDATA ,LCD i80 system interface read data"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "HUECOEF_CR_1,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CRG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CRG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "HUECOEF_CR_2,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CRG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CRG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x1F4++0x03
|
|
line.long 0x00 "HUECOEF_CR_3,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CRG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CRG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x1F8++0x03
|
|
line.long 0x00 "HUECOEF_CR_4,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CRG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CRG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x1FC++0x03
|
|
line.long 0x00 "HUECOEF_CB_1,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CBG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CBG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "HUECOEF_CB_2,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CBG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CBG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "HUECOEF_CB_3,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CBG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CBG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "HUECOEF_CB_4,Hue control register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CBG0_X ,Hue matrix coefficient 00 (when 'cb+In_offset is positive)"
|
|
hexmask.long.word 0x00 0.--9. 1. " CBG1_X ,Hue matrix coefficient 00 (when 'cb+In_offset is negative)"
|
|
group.long 0x020C++0x03
|
|
line.long 0x00 "HUEOFFSET,Hue offset control register"
|
|
hexmask.long.word 0x00 16.--24. 1. " OFFSET_IN ,Hue matrix input offset"
|
|
hexmask.long.word 0x00 0.--8. 1. " OFFSET_OUT ,Hue matrix output offset"
|
|
group.long 0x021C++0x27
|
|
line.long 0x00 "VIDW0ALPHA0,Window 0 Alpha0 control register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ALPHA0_R_F ,Red Alpha value"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ALPHA0_G_F ,Green Alpha value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ALPHA0_B_F ,Blue Alpha value"
|
|
line.long 0x04 "VIDW0ALPHA1,Window 0 Alpha1 control register"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ALPHA1_R_F ,Red Alpha value"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ALPHA1_G_F ,Green Alpha value"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ALPHA1_B_F ,Blue Alpha value"
|
|
line.long 0x08 "VIDW1ALPHA0,Window 1 Alpha0 control register"
|
|
hexmask.long.byte 0x08 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x08 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x08 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x0C "VIDW1ALPHA1,Window 1 Alpha1 control register"
|
|
hexmask.long.byte 0x0C 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x0C 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x10 "VIDW2ALPHA0,Window 2 Alpha0 control register"
|
|
hexmask.long.byte 0x10 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x10 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x10 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x14 "VIDW2ALPHA1,Window 2 Alpha1 control register"
|
|
hexmask.long.byte 0x14 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x14 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x14 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x18 "VIDW3ALPHA0,Window 3 Alpha0 control register"
|
|
hexmask.long.byte 0x18 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x18 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x18 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x1C "VIDW3ALPHA1,Window 3 Alpha1 control register"
|
|
hexmask.long.byte 0x1C 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x1C 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x1C 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
line.long 0x20 "VIDW4ALPHA0,Window 4 Alpha0 control register"
|
|
hexmask.long.byte 0x20 16.--19. 1. " ALPHA0_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x20 8.--11. 1. " ALPHA0_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x20 0.--3. 1. " ALPHA0_B_F ,Blue Alpha lower value"
|
|
line.long 0x24 "VIDW4ALPHA1,Window 4 Alpha1 control register"
|
|
hexmask.long.byte 0x24 16.--19. 1. " ALPHA1_R_F ,Red Alpha lower value"
|
|
hexmask.long.byte 0x24 8.--11. 1. " ALPHA1_G_F ,Green Alpha lower value"
|
|
hexmask.long.byte 0x24 0.--3. 1. " ALPHA1_B_F ,Blue Alpha lower value"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "BLENDEQ1,Window 1 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "BLENDEQ2,Window 2 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "BLENDEQ3,Window 3 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "BLENDEQ4,Window 4 blending equation control register"
|
|
bitfld.long 0x00 18.--21. " Q_FUNC_F ,Constant used in alphaB" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 12.--15. " P_FUNC_F ,Constant used in alpha" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
bitfld.long 0x00 6.--9. " B_FUNC_F ,Constant used in B" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " A_FUNC_F ,Constant used in A" "0,1,alphaA,1-alphaA,alphaB,1-alphaB,ALPHA0,Reserved,Reserved,Reserved,A,1-A,B,1-B,?..."
|
|
group.long 0x0260++0x03
|
|
line.long 0x00 "BLENDCON,Blending equation control register"
|
|
bitfld.long 0x00 0. " BLEND_NEW ,Alpha value width" "4-bit,8-bit"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "W0RTQOSCON,Window RTQOS control register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " FIFOLEVEL ,Real-time QoS FIFO level"
|
|
bitfld.long 0x00 1. " QOS_GATE_DIS ,RTQoS output signal gate" "Gated,Not gated"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "W1RTQOSCON,Window RTQOS control register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " FIFOLEVEL ,Real-time QoS FIFO level"
|
|
bitfld.long 0x00 1. " QOS_GATE_DIS ,RTQoS output signal gate" "Gated,Not gated"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "W2RTQOSCON,Window RTQOS control register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " FIFOLEVEL ,Real-time QoS FIFO level"
|
|
bitfld.long 0x00 1. " QOS_GATE_DIS ,RTQoS output signal gate" "Gated,Not gated"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "W3RTQOSCON,Window RTQOS control register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " FIFOLEVEL ,Real-time QoS FIFO level"
|
|
bitfld.long 0x00 1. " QOS_GATE_DIS ,RTQoS output signal gate" "Gated,Not gated"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "W4RTQOSCON,Window RTQOS control register"
|
|
hexmask.long.byte 0x00 4.--11. 1. " FIFOLEVEL ,Real-time QoS FIFO level"
|
|
bitfld.long 0x00 1. " QOS_GATE_DIS ,RTQoS output signal gate" "Gated,Not gated"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "I80IFCON0,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD0 ,Specifies the LDI command"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "I80IFCON1,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD1 ,Specifies the LDI command"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "I80IFCON2,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD2 ,Specifies the LDI command"
|
|
group.long 0x28C++0x03
|
|
line.long 0x00 "I80IFCON3,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD3 ,Specifies the LDI command"
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "I80IFCON4,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD4 ,Specifies the LDI command"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "I80IFCON5,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD5 ,Specifies the LDI command"
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "I80IFCON6,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD6 ,Specifies the LDI command"
|
|
group.long 0x29C++0x03
|
|
line.long 0x00 "I80IFCON7,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD7 ,Specifies the LDI command"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "I80IFCON8,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD8 ,Specifies the LDI command"
|
|
group.long 0x2A4++0x03
|
|
line.long 0x00 "I80IFCON9,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD9 ,Specifies the LDI command"
|
|
group.long 0x2A8++0x03
|
|
line.long 0x00 "I80IFCON10,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD10 ,Specifies the LDI command"
|
|
group.long 0x2AC++0x03
|
|
line.long 0x00 "I80IFCON11,LCD i80 interface command"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " LDI_CMD11 ,Specifies the LDI command"
|
|
tree.end
|
|
width 16.
|
|
tree "Gamma Lookup Table "
|
|
if (((d.l(ad:0x11C00000+0x0C))&0x8000)==0x0000)
|
|
group.long 0x37C++0x03
|
|
line.long 0x00 "GAMMALUT_01_00,Gamma LUT data of the index 0, 1"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "GAMMALUT_03_02,Gamma LUT data of the index 2, 3"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "GAMMALUT_05_04,Gamma LUT data of the index 4, 5"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "GAMMALUT_07_06,Gamma LUT data of the index 6, 7"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "GAMMALUT_09_08,Gamma LUT data of the index 8, 9"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "GAMMALUT_11_10,Gamma LUT data of the index 10, 11"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "GAMMALUT_13_12,Gamma LUT data of the index 12, 13"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "GAMMALUT_15_14,Gamma LUT data of the index 14, 15"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x39C++0x03
|
|
line.long 0x00 "GAMMALUT_17_16,Gamma LUT data of the index 16, 17"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "GAMMALUT_19_18,Gamma LUT data of the index 18, 19"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A4++0x03
|
|
line.long 0x00 "GAMMALUT_21_20,Gamma LUT data of the index 20, 21"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A8++0x03
|
|
line.long 0x00 "GAMMALUT_23_22,Gamma LUT data of the index 22, 23"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3AC++0x03
|
|
line.long 0x00 "GAMMALUT_25_24,Gamma LUT data of the index 24, 25"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "GAMMALUT_27_26,Gamma LUT data of the index 26, 27"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B4++0x03
|
|
line.long 0x00 "GAMMALUT_29_28,Gamma LUT data of the index 28, 29"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B8++0x03
|
|
line.long 0x00 "GAMMALUT_31_30,Gamma LUT data of the index 30, 31"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3BC++0x03
|
|
line.long 0x00 "GAMMALUT_33_32,Gamma LUT data of the index 32, 33"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3C0++0x03
|
|
line.long 0x00 "GAMMALUT_35_34,Gamma LUT data of the index 34, 35"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3C4++0x03
|
|
line.long 0x00 "GAMMALUT_37_36,Gamma LUT data of the index 36, 37"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3C8++0x03
|
|
line.long 0x00 "GAMMALUT_39_38,Gamma LUT data of the index 38, 39"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3CC++0x03
|
|
line.long 0x00 "GAMMALUT_41_40,Gamma LUT data of the index 40, 41"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D0++0x03
|
|
line.long 0x00 "GAMMALUT_43_42,Gamma LUT data of the index 42, 43"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D4++0x03
|
|
line.long 0x00 "GAMMALUT_45_44,Gamma LUT data of the index 44, 45"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D8++0x03
|
|
line.long 0x00 "GAMMALUT_47_46,Gamma LUT data of the index 46, 47"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3DC++0x03
|
|
line.long 0x00 "GAMMALUT_49_48,Gamma LUT data of the index 48, 49"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "GAMMALUT_51_50,Gamma LUT data of the index 50, 51"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3E4++0x03
|
|
line.long 0x00 "GAMMALUT_53_52,Gamma LUT data of the index 52, 53"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3E8++0x03
|
|
line.long 0x00 "GAMMALUT_55_54,Gamma LUT data of the index 54, 55"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3EC++0x03
|
|
line.long 0x00 "GAMMALUT_57_56,Gamma LUT data of the index 56, 57"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3F0++0x03
|
|
line.long 0x00 "GAMMALUT_59_58,Gamma LUT data of the index 58, 59"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3F4++0x03
|
|
line.long 0x00 "GAMMALUT_61_60,Gamma LUT data of the index 60, 61"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3F8++0x03
|
|
line.long 0x00 "GAMMALUT_63_62,Gamma LUT data of the index 62, 63"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x03FC++0x03
|
|
line.long 0x00 "GAMMALUT_xx_64,Gamma LUT data of the index 64"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
else
|
|
group.long 0x37C++0x03
|
|
line.long 0x00 "GAMMALUT_R_1_0,Gamma RED LUT data of the index 0, 1"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x380++0x03
|
|
line.long 0x00 "GAMMALUT_R_3_2,Gamma RED LUT data of the index 2, 3"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x384++0x03
|
|
line.long 0x00 "GAMMALUT_R_5_4,Gamma RED LUT data of the index 4, 5"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x388++0x03
|
|
line.long 0x00 "GAMMALUT_R_7_6,Gamma RED LUT data of the index 6, 7"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x38C++0x03
|
|
line.long 0x00 "GAMMALUT_R_9_8,Gamma RED LUT data of the index 8, 9"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x390++0x03
|
|
line.long 0x00 "GAMMALUT_R_11_10,Gamma RED LUT data of the index 10, 11"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x394++0x03
|
|
line.long 0x00 "GAMMALUT_R_13_12,Gamma RED LUT data of the index 12, 13"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x398++0x03
|
|
line.long 0x00 "GAMMALUT_R_15_14,Gamma RED LUT data of the index 14, 15"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x039C++0x03
|
|
line.long 0x00 "GAMMALUT_R_16,Gamma RED LUT data of the index 16"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A0++0x03
|
|
line.long 0x00 "GAMMALUT_G_1_0,Gamma GREEN LUT data of the index 0, 1"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A4++0x03
|
|
line.long 0x00 "GAMMALUT_G_3_2,Gamma GREEN LUT data of the index 2, 3"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3A8++0x03
|
|
line.long 0x00 "GAMMALUT_G_5_4,Gamma GREEN LUT data of the index 4, 5"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3AC++0x03
|
|
line.long 0x00 "GAMMALUT_G_7_6,Gamma GREEN LUT data of the index 6, 7"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B0++0x03
|
|
line.long 0x00 "GAMMALUT_G_9_8,Gamma GREEN LUT data of the index 8, 9"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B4++0x03
|
|
line.long 0x00 "GAMMALUT_G_11_10,Gamma GREEN LUT data of the index 10, 11"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3B8++0x03
|
|
line.long 0x00 "GAMMALUT_G_13_12,Gamma GREEN LUT data of the index 12, 13"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3BC++0x03
|
|
line.long 0x00 "GAMMALUT_G_15_14,Gamma GREEN LUT data of the index 14, 15"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x03C0++0x03
|
|
line.long 0x00 "GAMMALUT_G_16,Gamma GREEN LUT data of the index 16"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3C4++0x03
|
|
line.long 0x00 "GAMMALUT_B_1_0,Gamma BLUE LUT data of the index 0, 1"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3C8++0x03
|
|
line.long 0x00 "GAMMALUT_B_3_2,Gamma BLUE LUT data of the index 2, 3"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3CC++0x03
|
|
line.long 0x00 "GAMMALUT_B_5_4,Gamma BLUE LUT data of the index 4, 5"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D0++0x03
|
|
line.long 0x00 "GAMMALUT_B_7_6,Gamma BLUE LUT data of the index 6, 7"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D4++0x03
|
|
line.long 0x00 "GAMMALUT_B_9_8,Gamma BLUE LUT data of the index 8, 9"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3D8++0x03
|
|
line.long 0x00 "GAMMALUT_B_11_10,Gamma BLUE LUT data of the index 10, 11"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3DC++0x03
|
|
line.long 0x00 "GAMMALUT_B_13_12,Gamma BLUE LUT data of the index 12, 13"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x3E0++0x03
|
|
line.long 0x00 "GAMMALUT_B_15_14,Gamma BLUE LUT data of the index 14, 15"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
group.long 0x03E4++0x03
|
|
line.long 0x00 "GAMMALUT_B_16,Gamma BLUE LUT data of the index 16"
|
|
hexmask.long.word 0x00 18.--26. 1. " GM_LUT_x ,Gamma LUT value register of index x"
|
|
hexmask.long.word 0x00 2.--10. 1. " GM_LUT_y ,Gamma LUT value register of index y"
|
|
endif
|
|
tree.end
|
|
tree "Shadow Windows Control"
|
|
rgroup.long 0x40A0++0x03
|
|
line.long 0x00 "SHG_VIDW00ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40A8++0x03
|
|
line.long 0x00 "SHG_VIDW01ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40B0++0x03
|
|
line.long 0x00 "SHG_VIDW02ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40B8++0x03
|
|
line.long 0x00 "SHG_VIDW03ADD0,Frame buffer address 0 shadow register"
|
|
rgroup.long 0x40C0++0x03
|
|
line.long 0x00 "SHG_VIDW04ADD0,Frame buffer address 0 shadow register"
|
|
textline " "
|
|
rgroup.long 0x40D0++0x03
|
|
line.long 0x00 "SHG_VIDW00ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40D8++0x03
|
|
line.long 0x00 "SHG_VIDW01ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40E0++0x03
|
|
line.long 0x00 "SHG_VIDW02ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40E8++0x03
|
|
line.long 0x00 "SHG_VIDW03ADD1,Frame buffer address 1 shadow register"
|
|
rgroup.long 0x40F0++0x03
|
|
line.long 0x00 "SHG_VIDW04ADD1,Frame buffer address 1 shadow register"
|
|
textline " "
|
|
rgroup.long 0x4100++0x03
|
|
line.long 0x00 "SHG_VIDW00ADD2,Frame buffer address 0 shadow register"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4104++0x03
|
|
line.long 0x00 "SHG_VIDW01ADD2,Frame buffer address 1 shadow register"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4108++0x03
|
|
line.long 0x00 "SHG_VIDW02ADD2,Frame buffer address 2 shadow register"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x410C++0x03
|
|
line.long 0x00 "SHG_VIDW03ADD2,Frame buffer address 3 shadow register"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
rgroup.long 0x4110++0x03
|
|
line.long 0x00 "SHG_VIDW04ADD2,Frame buffer address 4 shadow register"
|
|
hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width"
|
|
tree.end
|
|
tree "Palette Memory"
|
|
group.long 0x2400++0x03
|
|
line.long 0x00 "Win0_PAL_RAM_ADD,Window 0 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x11C00000+0x2400)--(ad:0x11C00000+0x27FF) /long"
|
|
group.long 0x2800++0x03
|
|
line.long 0x00 "Win1_PAL_RAM_ADD,Window 1 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x11C00000+0x2800)--(ad:0x11C00000+0x2BFF) /long"
|
|
group.long 0x2C00++0x03
|
|
line.long 0x00 "Win2_PAL_RAM_ADD,Window 2 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x11C00000+0x2C00)--(ad:0x11C00000+0x2FFF) /long"
|
|
group.long 0x3000++0x03
|
|
line.long 0x00 "Win3_PAL_RAM_ADD,Window 3 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x11C00000+0x3000)--(ad:0x11C00000+0x33FF) /long"
|
|
group.long 0x3400++0x03
|
|
line.long 0x00 "Win4_PAL_RAM_ADD,Window 4 Palette Ram Access Address"
|
|
button "Memory" "d (ad:0x11C00000+0x3400)--(ad:0x11C00000+0x37FF) /long"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "Keypad Interface"
|
|
base ad:0x100A0000
|
|
width 13.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "KEYIFCON,KEYPAD interface control register"
|
|
hexmask.long.word 0x00 16.--31. 1. " H_CNT ,Counter value for HW scan"
|
|
bitfld.long 0x00 9. " HIZSCAN_EN ,Hi-Z mode scan for hardware scan" "Normal mode,Hi-Z mode"
|
|
bitfld.long 0x00 8. " SEL_HSCAN ,Scan type" "Software,Hardware"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FC_EN ,10-bit counter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DF_EN ,Input debouncing filter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INT_R_EN ,Input port rising edge interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_F_EN ,Input port falling edge interrupt" "Disabled,Enabled"
|
|
line.long 0x04 "KEYIFSTSCLR,KEYPAD interrupt for software scan status"
|
|
eventfld.long 0x04 29. " R_INT13 ,Input release 13 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 28. " R_INT12 ,Input release 12 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 27. " R_INT11 ,Input release 11 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 26. " R_INT10 ,Input release 10 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 25. " R_INT9 ,Input release 9 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 24. " R_INT8 ,Input release 8 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 23. " R_INT7 ,Input release 7 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 22. " R_INT6 ,Input release 6 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 21. " R_INT5 ,Input release 5 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 20. " R_INT4 ,Input release 4 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 19. " R_INT3 ,Input release 3 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 18. " R_INT2 ,Input release 2 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 17. " R_INT1 ,Input release 1 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 16. " R_INT0 ,Input release 0 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 13. " P_INT13 ,Input press 13 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 12. " P_INT12 ,Input press 12 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 11. " P_INT11 ,Input press 11 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 10. " P_INT10 ,Input press 10 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 9. " P_INT9 ,Input press 9 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 8. " P_INT8 ,Input press 8 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 7. " P_INT7 ,Input press 7 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 6. " P_INT6 ,Input press 6 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 5. " P_INT5 ,Input press 5 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 4. " P_INT4 ,Input press 4 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 3. " P_INT3 ,Input press 3 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 2. " P_INT2 ,Input press 2 interrupt" "Occurred,Not occurred"
|
|
textline " "
|
|
eventfld.long 0x04 1. " P_INT1 ,Input press 1 interrupt" "Occurred,Not occurred"
|
|
eventfld.long 0x04 0. " P_INT0 ,Input press 0 interrupt" "Occurred,Not occurred"
|
|
line.long 0x08 "KEYIFCOL,KEYPAD interface column output register"
|
|
bitfld.long 0x08 15. " KEYIFCOLEN_7 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " KEYIFCOLEN_6 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " KEYIFCOLEN_5 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 12. " KEYIFCOLEN_4 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
bitfld.long 0x08 11. " KEYIFCOLEN_3 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " KEYIFCOLEN_2 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 9. " KEYIFCOLEN_1 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " KEYIFCOLEN_0 ,Keypad interface column data output enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " KEYIFCOL_7 ,Keypad interface column data output" "0,1"
|
|
bitfld.long 0x08 6. " KEYIFCOL_6 ,Keypad interface column data output" "0,1"
|
|
bitfld.long 0x08 5. " KEYIFCOL_5 ,Keypad interface column data output" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 4. " KEYIFCOL_4 ,Keypad interface column data output" "0,1"
|
|
bitfld.long 0x08 3. " KEYIFCOL_3 ,Keypad interface column data output" "0,1"
|
|
bitfld.long 0x08 2. " KEYIFCOL_2 ,Keypad interface column data output" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 1. " KEYIFCOL_1 ,Keypad interface column data output" "0,1"
|
|
bitfld.long 0x08 0. " KEYIFCOL_0 ,Keypad interface column data output" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "KEYIFROW,KEYPAD interface row data input register"
|
|
hexmask.long.word 0x00 0.--13. 1. " KEYIFROW ,Row data input register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "KEYIFFC,KEYPAD interface debouncing filter clock division register"
|
|
hexmask.long.word 0x00 0.--9. 1. " KEYIFFC ,Debouncing filter clock division"
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "KEYIFSCAN1,KEYPAD interface output result of hardware scan for first register"
|
|
hexmask.long.word 0x00 8.--21. 1. " ROWSCAN1 ,Scan result of row"
|
|
hexmask.long.byte 0x00 0.--7. 1. " COLSCAN1 ,Scan result of column"
|
|
line.long 0x04 "KEYIFSCAN2,KEYPAD interface output result of hardware scan for second register"
|
|
hexmask.long.word 0x04 8.--21. 1. " ROWSCAN2 ,Scan result of row"
|
|
hexmask.long.byte 0x04 0.--7. 1. " COLSCAN2 ,Scan result of column"
|
|
group.long 0x1C++0x03
|
|
sif cpu()=="Exynos4212"||cpu()=="Exynos4412"
|
|
line.long 0x00 "KEYIFHSC,KEYPAD interrupt for hardware scan status"
|
|
eventfld.long 0x00 3. " HSCAN_R2 ,Input release interrupt (rising edge) of second Key" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " HSCAN_P2 ,Input press interrupt (falling edge) of second Key" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " HSCAN_R1 ,Input release interrupt (rising edge) of first Key" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " HSCAN_P1 ,Input press interrupt (falling edge) of first Key" "No interrupt,Interrupt"
|
|
else
|
|
line.long 0x00 "KEYIFHSC,KEYPAD interrupt for hardware scan status"
|
|
eventfld.long 0x00 3. " HSCAN_R2 ,Input release interrupt (rising edge) of second Key" "Interrupt,No interrupt"
|
|
eventfld.long 0x00 2. " HSCAN_P2 ,Input press interrupt (falling edge) of second Key" "Interrupt,No interrupt"
|
|
eventfld.long 0x00 1. " HSCAN_R1 ,Input release interrupt (rising edge) of first Key" "Interrupt,No interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " HSCAN_P1 ,Input press interrupt (falling edge) of first Key" "Interrupt,No interrupt"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC"
|
|
base ad:0x126C0000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCCON,ADC control register"
|
|
bitfld.long 0x00 16. " RES ,ADC output resolution selection" "10-bit,12-bit"
|
|
rbitfld.long 0x00 15. " ECFLG ,End of conversion flag" "Ongoing,Finished"
|
|
bitfld.long 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value"
|
|
bitfld.long 0x00 2. " STANDBY ,Standby mode select" "Normal mode,Standby mode"
|
|
bitfld.long 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE_START ,A/D conversion starts by enable" "No operation,A/D conversion"
|
|
sif cpu()=="Exynos5250"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ADCDLY,ADC start or interval delay register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Conversion delay value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ADCDATX,ADC Conversion data register"
|
|
hexmask.long.word 0x00 0.--11. 1. " XPDATA ,ADC conversion data value"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ADCDLY,ADC start or interval delay register"
|
|
bitfld.long 0x00 16. " FILCLKSRC ,Clock source for delay" "X-tal,RTC"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Conversion delay value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ADCDAT,ADC Conversion data register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,ADC conversion data value"
|
|
endif
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "CLRINTADC,Clear ADC interrupt"
|
|
bitfld.long 0x00 0. " INTADCCLR ,INT_ADC Interrupt Clear" "Clear,Clear"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADCMUX,Analog input channel selection"
|
|
sif cpu()=="Exynos5250"
|
|
bitfld.long 0x00 0.--3. " SEL_MUX ,Analog input channel" "AIN 0,AIN 1,AIN 2,AIN 3,AIN 4,AIN 5,AIN 6,AIN 7,Reserved..."
|
|
else
|
|
bitfld.long 0x00 0.--3. " SEL_MUX ,Analog input channel" "AIN 0,AIN 1,AIN 2,AIN 3,Reserved..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
textline ""
|