15959 lines
1.1 MiB
15959 lines
1.1 MiB
; --------------------------------------------------------------------------------
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; @Title: EFR32BG On-Chip Peripherals
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; @Props: Released
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; @Author: JAM
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; @Changelog: 2019-05-24 JAM
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; @Manufacturer: SiliconLabs - Silicon Laboratories Inc.
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; @Doc: EFR32BG13P532F512GM32.svd, EFR32BG13P532F512GM48.svd,
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; EFR32BG13P632F512GM32.svd, EFR32BG13P632F512GM48.svd,
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; EFR32BG13P632F512GM51.svd, EFR32BG13P632F512IM32.svd,
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; EFR32BG13P632F512IM48.svd, EFR32BG13P732F512GM32.svd,
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; EFR32BG13P732F512GM48.svd, EFR32BG13P732F512GM51.svd
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; EFR32BG13P733F512GM48.svd
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; @Core: Cortex-M4
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; @Chip: EFR32BG13P532F512, EFR32BG13P632F512, EFR32BG13P732F512,
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; EFR32BG13P733F512
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; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perefr32bg.per 17736 2024-04-08 09:26:07Z kwisniewski $
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tree.close "Core Registers (Cortex-M4)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "MSC"
|
|
base ad:0x400E0000
|
|
width 16.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Memory System Control Register"
|
|
bitfld.long 0x00 4. " TIMEOUTFAULTEN ,Timeout Bus Fault Response Enable" "0,1"
|
|
bitfld.long 0x00 3. " IFCREADCLEAR ,IFC Read Clears IF" "0,1"
|
|
bitfld.long 0x00 2. " PWRUPONDEMAND ,Power Up on Demand During Wake Up" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLKDISFAULTEN ,Clock-disabled Bus Fault Response Enable" "0,1"
|
|
bitfld.long 0x00 0. " ADDRFAULTEN ,Invalid Address Bus Fault Response Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "READCTRL,Read Control Register"
|
|
bitfld.long 0x00 28. " SCBTP ,Suppress Conditional Branch Target Perfetch" "0,1"
|
|
bitfld.long 0x00 24.--25. " MODE ,Read Mode" "WS0,WS1,WS2,WS3"
|
|
bitfld.long 0x00 9. " USEHPROT ,AHB_HPROT Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PREFETCH ,Prefetch Mode" "0,1"
|
|
bitfld.long 0x00 5. " ICCDIS ,Interrupt Context Cache Disable" "0,1"
|
|
bitfld.long 0x00 4. " AIDIS ,Automatic Invalidate Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IFCDIS ,Internal Flash Cache Disable" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "WRITECTRL,Write Control Register"
|
|
bitfld.long 0x00 1. " IRQERASEABORT ,Abort Page Erase on Interrupt" "0,1"
|
|
bitfld.long 0x00 0. " WREN ,Enable Write/Erase Controller" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x00 "WRITECMD,Write Command Register"
|
|
bitfld.long 0x00 12. " CLEARWDATA ,Clear WDATA State" "0,1"
|
|
bitfld.long 0x00 8. " ERASEMAIN0 ,Mass Erase Region 0" "0,1"
|
|
bitfld.long 0x00 5. " ERASEABORT ,Abort Erase Sequence" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WRITETRIG ,Word Write Sequence Trigger" "0,1"
|
|
bitfld.long 0x00 3. " WRITEONCE ,Word Write-Once Trigger" "0,1"
|
|
bitfld.long 0x00 2. " WRITEEND ,End Write Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ERASEPAGE ,Erase Page" "0,1"
|
|
bitfld.long 0x00 0. " LADDRIM ,Load MSC_ADDRB Into ADDR" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "ADDRB,Page Erase/Write Address Buffer"
|
|
hexmask.long 0x00 0.--31. 1. " ADDRB ,Page Erase or Write Address Buffer"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "WDATA,Write Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " WDATA ,Write Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 28.--31. " PWRUPCKBDFAILCOUNT ,Flash Power Up Checkerboard Pattern Check Fail Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " WDATAVALID ,Write Data Buffer Valid Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. " PCRUNNING ,Performance Counters Running" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ERASEABORTED ,The Current Flash Erase Operation Aborted" "0,1"
|
|
bitfld.long 0x00 4. " WORDTIMEOUT ,Flash Write Word Timeout" "0,1"
|
|
bitfld.long 0x00 3. " WDATAREADY ,WDATA Write Ready" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " INVADDR ,Invalid Write Address or Erase Page" "0,1"
|
|
bitfld.long 0x00 1. " LOCKED ,Access Locked" "0,1"
|
|
bitfld.long 0x00 0. " BUSY ,Erase/Write Busy" "0,1"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 8. " LVEWRITE ,Flash LVE Write Error Flag" "0,1"
|
|
bitfld.long 0x00 6. " WDATAOV ,Flash Controller Write Buffer Overflow" "0,1"
|
|
bitfld.long 0x00 5. " ICACHERR ,ICache RAM Parity Error Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWRUPF ,Flash Power Up Sequence Complete Flag" "0,1"
|
|
bitfld.long 0x00 3. " CMOF ,Cache Misses Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CHOF ,Cache Hits Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE ,Write Done Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 0. " ERASE ,Erase Done Interrupt Read Flag" "0,1"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 8. " LVEWRITE ,Set LVEWRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " WDATAOV ,Set WDATAOV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " ICACHERR ,Set ICACHERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWRUPF ,Set PWRUPF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CMOF ,Set CMOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CHOF ,Set CHOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE ,Set WRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " ERASE ,Set ERASE Interrupt Flag" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 8. " LVEWRITE ,Clear LVEWRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " WDATAOV ,Clear WDATAOV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " ICACHERR ,Clear ICACHERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWRUPF ,Clear PWRUPF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CMOF ,Clear CMOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CHOF ,Clear CHOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE ,Clear WRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " ERASE ,Clear ERASE Interrupt Flag" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 8. " LVEWRITE ,LVEWRITE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " WDATAOV ,WDATAOV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " ICACHERR ,ICACHERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWRUPF ,PWRUPF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " CMOF ,CMOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " CHOF ,CHOF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WRITE ,WRITE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " ERASE ,ERASE Interrupt Enable" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "CACHECMD,Flash Cache Command Register"
|
|
bitfld.long 0x00 2. " STOPPC ,Stop Performance Counters" "0,1"
|
|
bitfld.long 0x00 1. " STARTPC ,Start Performance Counters" "0,1"
|
|
bitfld.long 0x00 0. " INVCACHE ,Invalidate Instruction Cache" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x00 "CACHEHITS,Cache Hits Performance Counter"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CACHEHITS ,Cache Hits Since Last Performance Counter Start Command"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x00 "CACHEMISSES,Cache Misses Performance Counter"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CACHEMISSES ,Cache Misses Since Last Performance Counter Start Command"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "MASSLOCK,Mass Erase Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Mass Erase Lock"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "STARTUP,Startup Control"
|
|
bitfld.long 0x00 28.--30. " STWS ,Startup Waitstates" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26. " STWSAEN ,Startup Waitstates Always Enable" "0,1"
|
|
bitfld.long 0x00 25. " STWSEN ,Startup Waitstates Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ASTWAIT ,Active Startup Wait" "0,1"
|
|
hexmask.long.word 0x00 12.--21. 1. " STDLY1 ,Startup Delay 0"
|
|
hexmask.long.word 0x00 0.--9. 1. " STDLY0 ,Startup Delay 0"
|
|
wgroup.long 0x74++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " PWRUP ,Flash Power Up Command" "0,1"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "BOOTLOADERCTRL,Bootloader Read and Write Enable, Write Once Register"
|
|
bitfld.long 0x00 1. " BLWDIS ,Flash Bootloader Write/Erase Disable" "0,1"
|
|
bitfld.long 0x00 0. " BLRDIS ,Flash Bootloader Read Disable" "0,1"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "AAPUNLOCKCMD,Software Unlock AAP Command Register"
|
|
bitfld.long 0x00 0. " UNLOCKAAP ,Software Unlock AAP Command" "0,1"
|
|
group.long 0x98++0x3
|
|
line.long 0x00 "CACHECONFIG0,Cache Configuration Register 0"
|
|
bitfld.long 0x00 0.--1. " CACHELPLEVEL ,Instruction Cache Low-Power Level" "BASE,ADVANCED,2,MINACTIVITY"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EMU"
|
|
base ad:0x400E3000
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width 23.
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group.long 0x0++0x3
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line.long 0x00 "CTRL,Control Register"
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bitfld.long 0x00 16.--17. " EM4HVSCALE ,EM4H Voltage Scale" "VSCALE2,1,VSCALE0,RESV"
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bitfld.long 0x00 8.--9. " EM23VSCALE ,EM23 Voltage Scale" "VSCALE2,1,VSCALE0,RESV"
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bitfld.long 0x00 4. " EM23VSCALEAUTOWSEN ,Automatically Configures Flash and Frequency to Wakeup From EM2 or EM3 at Low Voltage" "0,1"
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textline " "
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bitfld.long 0x00 3. " EM01LD ,Reserved for internal use. Do not change" "0,1"
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bitfld.long 0x00 2. " EM2BODDIS ,Disable BOD in EM2" "0,1"
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bitfld.long 0x00 1. " EM2BLOCK ,Energy Mode 2 Block" "0,1"
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rgroup.long 0x4++0x3
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line.long 0x00 "STATUS,Status Register"
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bitfld.long 0x00 26. " TEMPACTIVE ,Temperature Measurement Active" "0,1"
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bitfld.long 0x00 20. " EM4IORET ,IO Retention Status" "0,1"
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bitfld.long 0x00 18. " VSCALEBUSY ,System is Busy Scaling Voltage" "0,1"
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textline " "
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bitfld.long 0x00 16.--17. " VSCALE ,Current Voltage Scale Value" "VSCALE2,1,VSCALE0,RESV"
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bitfld.long 0x00 8. " VMONFVDD ,VMON VDDFLASH Channel" "0,1"
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bitfld.long 0x00 4. " VMONIO0 ,VMON IOVDD0 Channel" "0,1"
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textline " "
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bitfld.long 0x00 3. " VMONDVDD ,VMON DVDD Channel" "0,1"
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bitfld.long 0x00 2. " VMONALTAVDD ,Alternate VMON AVDD Channel" "0,1"
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bitfld.long 0x00 1. " VMONAVDD ,VMON AVDD Channel" "0,1"
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textline " "
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bitfld.long 0x00 0. " VMONRDY ,VMON Ready" "0,1"
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group.long 0x8++0x3
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line.long 0x00 "LOCK,Configuration Lock Register"
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hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock Key"
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group.long 0xC++0x3
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line.long 0x00 "RAM0CTRL,Memory Control Register"
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bitfld.long 0x00 0. " RAMPOWERDOWN ,RAM0 Blockset Power-down" "NONE,BLK1"
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wgroup.long 0x10++0x3
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line.long 0x00 "CMD,Command Register"
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bitfld.long 0x00 6. " EM01VSCALE2 ,EM01 Voltage Scale Command to Scale to Voltage Scale Level 2" "0,1"
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bitfld.long 0x00 4. " EM01VSCALE0 ,EM01 Voltage Scale Command to Scale to Voltage Scale Level 0" "0,1"
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bitfld.long 0x00 0. " EM4UNLATCH ,EM4 Unlatch" "0,1"
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group.long 0x18++0x3
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line.long 0x00 "EM4CTRL,EM4 Control Register"
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bitfld.long 0x00 16.--17. " EM4ENTRY ,Energy Mode 4 Entry" "0,1,2,3"
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bitfld.long 0x00 4.--5. " EM4IORETMODE ,EM4 IO Retention Disable" "DISABLE,EM4EXIT,SWUNLATCH,3"
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bitfld.long 0x00 3. " RETAINULFRCO ,ULFRCO Retain During EM4S" "0,1"
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textline " "
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bitfld.long 0x00 2. " RETAINLFXO ,LFXO Retain During EM4" "0,1"
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bitfld.long 0x00 1. " RETAINLFRCO ,LFRCO Retain During EM4" "0,1"
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bitfld.long 0x00 0. " EM4STATE ,Energy Mode 4 State" "0,1"
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group.long 0x1C++0x3
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line.long 0x00 "TEMPLIMITS,Temperature Limits for Interrupt Generation"
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bitfld.long 0x00 16. " EM4WUEN ,Enable EM4 Wakeup Due to Low/high Temperature" "0,1"
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hexmask.long.byte 0x00 8.--15. 1. " TEMPHIGH ,Temperature High Limit"
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hexmask.long.byte 0x00 0.--7. 1. " TEMPLOW ,Temperature Low Limit"
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rgroup.long 0x20++0x3
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line.long 0x00 "TEMP,Value of Last Temperature Measurement"
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hexmask.long.byte 0x00 0.--7. 1. " TEMP ,Temperature Measurement"
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rgroup.long 0x24++0x3
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line.long 0x00 "IF,Interrupt Flag Register"
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bitfld.long 0x00 31. " TEMPHIGH ,Temperature High Limit Reached" "0,1"
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bitfld.long 0x00 30. " TEMPLOW ,Temperature Low Limit Reached" "0,1"
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bitfld.long 0x00 29. " TEMP ,New Temperature Measurement Valid" "0,1"
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textline " "
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bitfld.long 0x00 25. " VSCALEDONE ,Voltage Scale Steps Done IRQ" "0,1"
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bitfld.long 0x00 24. " EM23WAKEUP ,Wakeup IRQ From EM2 and EM3" "0,1"
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bitfld.long 0x00 20. " DCDCINBYPASS ,DCDC is in Bypass" "0,1"
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textline " "
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bitfld.long 0x00 19. " DCDCLNRUNNING ,LN Mode is Running" "0,1"
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bitfld.long 0x00 18. " DCDCLPRUNNING ,LP Mode is Running" "0,1"
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bitfld.long 0x00 17. " NFETOVERCURRENTLIMIT ,NFET Current Limit Hit" "0,1"
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textline " "
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bitfld.long 0x00 16. " PFETOVERCURRENTLIMIT ,PFET Current Limit Hit" "0,1"
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bitfld.long 0x00 15. " VMONFVDDRISE ,VMON VDDFLASH Channel Rise" "0,1"
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bitfld.long 0x00 14. " VMONFVDDFALL ,VMON VDDFLASH Channel Fall" "0,1"
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textline " "
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bitfld.long 0x00 7. " VMONIO0RISE ,VMON IOVDD0 Channel Rise" "0,1"
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bitfld.long 0x00 6. " VMONIO0FALL ,VMON IOVDD0 Channel Fall" "0,1"
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bitfld.long 0x00 5. " VMONDVDDRISE ,VMON DVDD Channel Rise" "0,1"
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textline " "
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bitfld.long 0x00 4. " VMONDVDDFALL ,VMON DVDD Channel Fall" "0,1"
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bitfld.long 0x00 3. " VMONALTAVDDRISE ,Alternate VMON AVDD Channel Rise" "0,1"
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bitfld.long 0x00 2. " VMONALTAVDDFALL ,Alternate VMON AVDD Channel Fall" "0,1"
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textline " "
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bitfld.long 0x00 1. " VMONAVDDRISE ,VMON AVDD Channel Rise" "0,1"
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bitfld.long 0x00 0. " VMONAVDDFALL ,VMON AVDD Channel Fall" "0,1"
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wgroup.long 0x28++0x3
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line.long 0x00 "IFS,Interrupt Flag Set Register"
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bitfld.long 0x00 31. " TEMPHIGH ,Set TEMPHIGH Interrupt Flag" "0,1"
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bitfld.long 0x00 30. " TEMPLOW ,Set TEMPLOW Interrupt Flag" "0,1"
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bitfld.long 0x00 29. " TEMP ,Set TEMP Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 25. " VSCALEDONE ,Set VSCALEDONE Interrupt Flag" "0,1"
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bitfld.long 0x00 24. " EM23WAKEUP ,Set EM23WAKEUP Interrupt Flag" "0,1"
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bitfld.long 0x00 20. " DCDCINBYPASS ,Set DCDCINBYPASS Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 19. " DCDCLNRUNNING ,Set DCDCLNRUNNING Interrupt Flag" "0,1"
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bitfld.long 0x00 18. " DCDCLPRUNNING ,Set DCDCLPRUNNING Interrupt Flag" "0,1"
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bitfld.long 0x00 17. " NFETOVERCURRENTLIMIT ,Set NFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 16. " PFETOVERCURRENTLIMIT ,Set PFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
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bitfld.long 0x00 15. " VMONFVDDRISE ,Set VMONFVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 14. " VMONFVDDFALL ,Set VMONFVDDFALL Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 7. " VMONIO0RISE ,Set VMONIO0RISE Interrupt Flag" "0,1"
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bitfld.long 0x00 6. " VMONIO0FALL ,Set VMONIO0FALL Interrupt Flag" "0,1"
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bitfld.long 0x00 5. " VMONDVDDRISE ,Set VMONDVDDRISE Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 4. " VMONDVDDFALL ,Set VMONDVDDFALL Interrupt Flag" "0,1"
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bitfld.long 0x00 3. " VMONALTAVDDRISE ,Set VMONALTAVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 2. " VMONALTAVDDFALL ,Set VMONALTAVDDFALL Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 1. " VMONAVDDRISE ,Set VMONAVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 0. " VMONAVDDFALL ,Set VMONAVDDFALL Interrupt Flag" "0,1"
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wgroup.long 0x2C++0x3
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line.long 0x00 "IFC,Interrupt Flag Clear Register"
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bitfld.long 0x00 31. " TEMPHIGH ,Clear TEMPHIGH Interrupt Flag" "0,1"
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bitfld.long 0x00 30. " TEMPLOW ,Clear TEMPLOW Interrupt Flag" "0,1"
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bitfld.long 0x00 29. " TEMP ,Clear TEMP Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 25. " VSCALEDONE ,Clear VSCALEDONE Interrupt Flag" "0,1"
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bitfld.long 0x00 24. " EM23WAKEUP ,Clear EM23WAKEUP Interrupt Flag" "0,1"
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bitfld.long 0x00 20. " DCDCINBYPASS ,Clear DCDCINBYPASS Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 19. " DCDCLNRUNNING ,Clear DCDCLNRUNNING Interrupt Flag" "0,1"
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bitfld.long 0x00 18. " DCDCLPRUNNING ,Clear DCDCLPRUNNING Interrupt Flag" "0,1"
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bitfld.long 0x00 17. " NFETOVERCURRENTLIMIT ,Clear NFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 16. " PFETOVERCURRENTLIMIT ,Clear PFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
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bitfld.long 0x00 15. " VMONFVDDRISE ,Clear VMONFVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 14. " VMONFVDDFALL ,Clear VMONFVDDFALL Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 7. " VMONIO0RISE ,Clear VMONIO0RISE Interrupt Flag" "0,1"
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bitfld.long 0x00 6. " VMONIO0FALL ,Clear VMONIO0FALL Interrupt Flag" "0,1"
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bitfld.long 0x00 5. " VMONDVDDRISE ,Clear VMONDVDDRISE Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 4. " VMONDVDDFALL ,Clear VMONDVDDFALL Interrupt Flag" "0,1"
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bitfld.long 0x00 3. " VMONALTAVDDRISE ,Clear VMONALTAVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 2. " VMONALTAVDDFALL ,Clear VMONALTAVDDFALL Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 1. " VMONAVDDRISE ,Clear VMONAVDDRISE Interrupt Flag" "0,1"
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bitfld.long 0x00 0. " VMONAVDDFALL ,Clear VMONAVDDFALL Interrupt Flag" "0,1"
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group.long 0x30++0x3
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line.long 0x00 "IEN,Interrupt Enable Register"
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bitfld.long 0x00 31. " TEMPHIGH ,TEMPHIGH Interrupt Enable" "0,1"
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bitfld.long 0x00 30. " TEMPLOW ,TEMPLOW Interrupt Enable" "0,1"
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bitfld.long 0x00 29. " TEMP ,TEMP Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 25. " VSCALEDONE ,VSCALEDONE Interrupt Enable" "0,1"
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bitfld.long 0x00 24. " EM23WAKEUP ,EM23WAKEUP Interrupt Enable" "0,1"
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bitfld.long 0x00 20. " DCDCINBYPASS ,DCDCINBYPASS Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 19. " DCDCLNRUNNING ,DCDCLNRUNNING Interrupt Enable" "0,1"
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bitfld.long 0x00 18. " DCDCLPRUNNING ,DCDCLPRUNNING Interrupt Enable" "0,1"
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bitfld.long 0x00 17. " NFETOVERCURRENTLIMIT ,NFETOVERCURRENTLIMIT Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 16. " PFETOVERCURRENTLIMIT ,PFETOVERCURRENTLIMIT Interrupt Enable" "0,1"
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bitfld.long 0x00 15. " VMONFVDDRISE ,VMONFVDDRISE Interrupt Enable" "0,1"
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bitfld.long 0x00 14. " VMONFVDDFALL ,VMONFVDDFALL Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 7. " VMONIO0RISE ,VMONIO0RISE Interrupt Enable" "0,1"
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bitfld.long 0x00 6. " VMONIO0FALL ,VMONIO0FALL Interrupt Enable" "0,1"
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bitfld.long 0x00 5. " VMONDVDDRISE ,VMONDVDDRISE Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 4. " VMONDVDDFALL ,VMONDVDDFALL Interrupt Enable" "0,1"
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bitfld.long 0x00 3. " VMONALTAVDDRISE ,VMONALTAVDDRISE Interrupt Enable" "0,1"
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bitfld.long 0x00 2. " VMONALTAVDDFALL ,VMONALTAVDDFALL Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 1. " VMONAVDDRISE ,VMONAVDDRISE Interrupt Enable" "0,1"
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bitfld.long 0x00 0. " VMONAVDDFALL ,VMONAVDDFALL Interrupt Enable" "0,1"
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group.long 0x34++0x3
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line.long 0x00 "PWRLOCK,Regulator and Supply Lock Register"
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hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Regulator and Supply Configuration Lock Key"
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group.long 0x3C++0x3
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line.long 0x00 "PWRCTRL,Power Control Register"
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bitfld.long 0x00 13. " IMMEDIATEPWRSWITCH ,Allows Immediate Switching of ANASW and REGPWRSEL Bitfields" "0,1"
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bitfld.long 0x00 10. " REGPWRSEL ,This Field Selects the Input Supply Pin for the Digital LDO" "0,1"
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bitfld.long 0x00 5. " ANASW ,Analog Switch Selection" "0,1"
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group.long 0x40++0x3
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line.long 0x00 "DCDCCTRL,DCDC Control"
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bitfld.long 0x00 5. " DCDCMODEEM4 ,DCDC Mode EM4H" "0,1"
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bitfld.long 0x00 4. " DCDCMODEEM23 ,DCDC Mode EM23" "0,1"
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bitfld.long 0x00 0.--1. " DCDCMODE ,Regulator Mode" "BYPASS,LOWNOISE,LOWPOWER,OFF"
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group.long 0x4C++0x3
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line.long 0x00 "DCDCMISCCTRL,DCDC Miscellaneous Control Register"
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bitfld.long 0x00 28.--29. " LPCMPBIASEM234H ,LP Mode Comparator Bias Selection for EM23 or EM4H" "BIAS0,BIAS1,BIAS2,BIAS3"
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bitfld.long 0x00 24.--26. " LNCLIMILIMSEL ,Current Limit Level Selection for Current Limiter in LN Mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 20.--22. " LPCLIMILIMSEL ,Current Limit Level Selection for Current Limiter in LP Mode" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 16.--19. " BYPLIMSEL ,Current Limit in Bypass Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " NFETCNT ,NFET Switch Number Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " PFETCNT ,PFET Switch Number Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 5. " LNFORCECCMIMM ,Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM" "0,1"
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bitfld.long 0x00 2. " LPCMPHYSHI ,Comparator Threshold on the High Side" "0,1"
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bitfld.long 0x00 1. " LPCMPHYSDIS ,Disable LP Mode Hysteresis in the State Machine Control" "0,1"
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textline " "
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bitfld.long 0x00 0. " LNFORCECCM ,Force DCDC Into CCM Mode in Low Noise Operation" "0,1"
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group.long 0x50++0x3
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line.long 0x00 "DCDCZDETCTRL,DCDC Power Train NFET Zero Current Detector Control Register"
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bitfld.long 0x00 8.--9. " ZDETBLANKDLY ,Reserved for internal use. Do not change" "0,1,2,3"
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bitfld.long 0x00 4.--6. " ZDETILIMSEL ,Reverse Current Limit Level Selection for Zero Detector" "0,1,2,3,4,5,6,7"
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group.long 0x54++0x3
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line.long 0x00 "DCDCCLIMCTRL,DCDC Power Train PFET Current Limiter Control Register"
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bitfld.long 0x00 13. " BYPLIMEN ,Bypass Current Limit Enable" "0,1"
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bitfld.long 0x00 8.--9. " CLIMBLANKDLY ,Reserved for internal use. Do not change" "0,1,2,3"
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group.long 0x58++0x3
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line.long 0x00 "DCDCLNCOMPCTRL,DCDC Low Noise Compensator Control Register"
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bitfld.long 0x00 28.--31. " COMPENC3 ,Low Noise Mode Compensator C3 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--26. " COMPENC2 ,Low Noise Mode Compensator C2 Trim Value" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 20.--21. " COMPENC1 ,Low Noise Mode Compensator C1 Trim Value" "0,1,2,3"
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textline " "
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bitfld.long 0x00 12.--15. " COMPENR3 ,Low Noise Mode Compensator R3 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 4.--8. " COMPENR2 ,Low Noise Mode Compensator R2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--2. " COMPENR1 ,Low Noise Mode Compensator R1 Trim Value" "0,1,2,3,4,5,6,7"
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group.long 0x5C++0x3
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line.long 0x00 "DCDCLNVCTRL,DCDC Low Noise Voltage Register"
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hexmask.long.byte 0x00 8.--14. 1. " LNVREF ,Low Noise Mode VREF Trim"
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bitfld.long 0x00 1. " LNATT ,Low Noise Mode Feedback Attenuation" "0,1"
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group.long 0x64++0x3
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line.long 0x00 "DCDCLPVCTRL,DCDC Low Power Voltage Register"
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hexmask.long.byte 0x00 1.--8. 1. " LPVREF ,LP Mode Reference Selection for EM23 and EM4H"
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bitfld.long 0x00 0. " LPATT ,Low Power Feedback Attenuation" "0,1"
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group.long 0x6C++0x3
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line.long 0x00 "DCDCLPCTRL,DCDC Low Power Control Register"
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bitfld.long 0x00 25.--26. " LPBLANK ,Reserved for internal use. Do not change" "0,1,2,3"
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bitfld.long 0x00 24. " LPVREFDUTYEN ,LP Mode Duty Cycling Enable" "0,1"
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bitfld.long 0x00 12.--15. " LPCMPHYSSELEM234H ,LP Mode Hysteresis Selection for EM23 and EM4H" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x70++0x3
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line.long 0x00 "DCDCLNFREQCTRL,DCDC Low Noise Controller Frequency Control"
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bitfld.long 0x00 24.--28. " RCOTRIM ,Reserved for internal use. Do not change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--2. " RCOBAND ,LN Mode RCO Frequency Band Selection" "0,1,2,3,4,5,6,7"
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rgroup.long 0x78++0x3
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line.long 0x00 "DCDCSYNC,DCDC Read Status Register"
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bitfld.long 0x00 0. " DCDCCTRLBUSY ,DCDC CTRL Register Transfer Busy" "0,1"
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group.long 0x90++0x3
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line.long 0x00 "VMONAVDDCTRL,VMON AVDD Channel Control"
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bitfld.long 0x00 20.--23. " RISETHRESCOARSE ,Rising Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. " RISETHRESFINE ,Rising Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " FALLTHRESCOARSE ,Falling Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 8.--11. " FALLTHRESFINE ,Falling Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. " FALLWU ,Fall Wakeup" "0,1"
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bitfld.long 0x00 2. " RISEWU ,Rise Wakeup" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable" "0,1"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "VMONALTAVDDCTRL,Alternate VMON AVDD Channel Control"
|
|
bitfld.long 0x00 12.--15. " THRESCOARSE ,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " THRESFINE ,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " FALLWU ,Fall Wakeup" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RISEWU ,Rise Wakeup" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable" "0,1"
|
|
group.long 0x98++0x3
|
|
line.long 0x00 "VMONDVDDCTRL,VMON DVDD Channel Control"
|
|
bitfld.long 0x00 12.--15. " THRESCOARSE ,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " THRESFINE ,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " FALLWU ,Fall Wakeup" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RISEWU ,Rise Wakeup" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable" "0,1"
|
|
group.long 0x9C++0x3
|
|
line.long 0x00 "VMONIO0CTRL,VMON IOVDD0 Channel Control"
|
|
bitfld.long 0x00 12.--15. " THRESCOARSE ,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. " THRESFINE ,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " RETDIS ,EM4 IO0 Retention Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FALLWU ,Fall Wakeup" "0,1"
|
|
bitfld.long 0x00 2. " RISEWU ,Rise Wakeup" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable" "0,1"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "RAM1CTRL,Memory Control Register"
|
|
bitfld.long 0x00 0.--1. " RAMPOWERDOWN ,RAM1 Blockset Power-down" "NONE,1,BLK1,BLK0TO1"
|
|
group.long 0xB4++0x3
|
|
line.long 0x00 "RAM2CTRL,Memory Control Register"
|
|
bitfld.long 0x00 0. " RAMPOWERDOWN ,RAM2 Blockset Power-down" "NONE,BLK"
|
|
group.long 0xE0++0x3
|
|
line.long 0x00 "DCDCLPEM01CFG,Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01"
|
|
bitfld.long 0x00 12.--15. " LPCMPHYSSELEM01 ,LP Mode Hysteresis Selection for EM01" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--9. " LPCMPBIASEM01 ,LP Mode Comparator Bias Selection for EM01" "BIAS0,BIAS1,BIAS2,BIAS3"
|
|
wgroup.long 0xF4++0x3
|
|
line.long 0x00 "EM23PERNORETAINCMD,Clears Corresponding Bits in EM23PERNORETAINSTATUS Unlocking Access to Peripheral"
|
|
bitfld.long 0x00 15. " LEUART0UNLOCK ,Clears Status Bit of LEUART0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 14. " CSENUNLOCK ,Clears Status Bit of CSEN and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 13. " LESENSE0UNLOCK ,Clears Status Bit of LESENSE0 and Unlocks Access to It" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WDOG1UNLOCK ,Clears Status Bit of WDOG1 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 11. " WDOG0UNLOCK ,Clears Status Bit of WDOG0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 10. " LETIMER0UNLOCK ,Clears Status Bit of LETIMER0 and Unlocks Access to It" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADC0UNLOCK ,Clears Status Bit of ADC0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 8. " IDAC0UNLOCK ,Clears Status Bit of IDAC0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 7. " DAC0UNLOCK ,Clears Status Bit of DAC0 and Unlocks Access to It" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " I2C1UNLOCK ,Clears Status Bit of I2C1 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 5. " I2C0UNLOCK ,Clears Status Bit of I2C0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 2. " PCNT0UNLOCK ,Clears Status Bit of PCNT0 and Unlocks Access to It" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACMP1UNLOCK ,Clears Status Bit of ACMP1 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 0. " ACMP0UNLOCK ,Clears Status Bit of ACMP0 and Unlocks Access to It" "0,1"
|
|
rgroup.long 0xF8++0x3
|
|
line.long 0x00 "EM23PERNORETAINSTATUS,Status Indicating If Peripherals Were Powered Down in EM23, Subsequently Locking Access to It"
|
|
bitfld.long 0x00 15. " LEUART0LOCKED ,Indicates If LEUART0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 14. " CSENLOCKED ,Indicates If CSEN Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 13. " LESENSE0LOCKED ,Indicates If LESENSE0 Powered Down During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WDOG1LOCKED ,Indicates If WDOG1 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 11. " WDOG0LOCKED ,Indicates If WDOG0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 10. " LETIMER0LOCKED ,Indicates If LETIMER0 Powered Down During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADC0LOCKED ,Indicates If ADC0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 8. " IDAC0LOCKED ,Indicates If IDAC0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 7. " DAC0LOCKED ,Indicates If DAC0 Powered Down During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " I2C1LOCKED ,Indicates If I2C1 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 5. " I2C0LOCKED ,Indicates If I2C0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 2. " PCNT0LOCKED ,Indicates If PCNT0 Powered Down During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACMP1LOCKED ,Indicates If ACMP1 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 0. " ACMP0LOCKED ,Indicates If ACMP0 Powered Down During EM23" "0,1"
|
|
group.long 0xFC++0x3
|
|
line.long 0x00 "EM23PERNORETAINCTRL,When Set Corresponding Peripherals May Get Powered Down in EM23"
|
|
bitfld.long 0x00 15. " LEUART0DIS ,Allow Power Down of LEUART0 During EM23" "0,1"
|
|
bitfld.long 0x00 14. " CSENDIS ,Allow Power Down of CSEN During EM23" "0,1"
|
|
bitfld.long 0x00 13. " LESENSE0DIS ,Allow Power Down of LESENSE0 During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WDOG1DIS ,Allow Power Down of WDOG1 During EM23" "0,1"
|
|
bitfld.long 0x00 11. " WDOG0DIS ,Allow Power Down of WDOG0 During EM23" "0,1"
|
|
bitfld.long 0x00 10. " LETIMER0DIS ,Allow Power Down of LETIMER0 During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADC0DIS ,Allow Power Down of ADC0 During EM23" "0,1"
|
|
bitfld.long 0x00 8. " IDAC0DIS ,Allow Power Down of IDAC0 During EM23" "0,1"
|
|
bitfld.long 0x00 7. " VDAC0DIS ,Allow Power Down of DAC0 During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " I2C1DIS ,Allow Power Down of I2C1 During EM23" "0,1"
|
|
bitfld.long 0x00 5. " I2C0DIS ,Allow Power Down of I2C0 During EM23" "0,1"
|
|
bitfld.long 0x00 2. " PCNT0DIS ,Allow Power Down of PCNT0 During EM23" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACMP1DIS ,Allow Power Down of ACMP1 During EM23" "0,1"
|
|
bitfld.long 0x00 0. " ACMP0DIS ,Allow Power Down of ACMP0 During EM23" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "RMU"
|
|
base ad:0x400E5000
|
|
width 10.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 24.--25. " RESETSTATE ,System Software Reset State" "0,1,2,3"
|
|
bitfld.long 0x00 12.--14. " PINRMODE ,PIN Reset Mode" "DISABLED,LIMITED,EXTENDED,3,FULL,5,6,7"
|
|
bitfld.long 0x00 8.--10. " SYSRMODE ,Core Sysreset Reset Mode" "DISABLED,LIMITED,EXTENDED,3,FULL,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " LOCKUPRMODE ,Core LOCKUP Reset Mode" "DISABLED,LIMITED,EXTENDED,3,FULL,5,6,7"
|
|
bitfld.long 0x00 0.--2. " WDOGRMODE ,WDOG Reset Mode" "DISABLED,LIMITED,EXTENDED,3,FULL,5,6,7"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x00 "RSTCAUSE,Reset Cause Register"
|
|
bitfld.long 0x00 16. " EM4RST ,EM4 Reset" "0,1"
|
|
bitfld.long 0x00 11. " WDOGRST ,Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 10. " SYSREQRST ,System Request Reset" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LOCKUPRST ,LOCKUP Reset" "0,1"
|
|
bitfld.long 0x00 8. " EXTRST ,External Pin Reset" "0,1"
|
|
bitfld.long 0x00 4. " DECBOD ,Brown Out Detector Decouple Domain Reset" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DVDDBOD ,Brown Out Detector DVDD Reset" "0,1"
|
|
bitfld.long 0x00 2. " AVDDBOD ,Brown Out Detector AVDD Reset" "0,1"
|
|
bitfld.long 0x00 0. " PORST ,Power on Reset" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " RCCLR ,Reset Cause Clear" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "RST,Reset Control Register"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock Key"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CMU"
|
|
base ad:0x400E4000
|
|
width 21.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,CMU Control Register"
|
|
bitfld.long 0x00 20. " HFPERCLKEN ,HFPERCLK Enable" "0,1"
|
|
bitfld.long 0x00 16. " WSHFLE ,Wait State for High-Frequency LE Interface" "0,1"
|
|
bitfld.long 0x00 5.--9. " CLKOUTSEL1 ,Clock Output Select 1" "DISABLED,ULFRCO,LFRCO,LFXO,4,5,HFXO,HFEXPCLK,8,ULFRCOQ,LFRCOQ,LFXOQ,HFRCOQ,AUXHFRCOQ,HFXOQ,HFSRCCLK,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " CLKOUTSEL0 ,Clock Output Select 0" "DISABLED,ULFRCO,LFRCO,LFXO,4,5,HFXO,HFEXPCLK,8,ULFRCOQ,LFRCOQ,LFXOQ,HFRCOQ,AUXHFRCOQ,HFXOQ,HFSRCCLK,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "HFRCOCTRL,HFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. " VREFTC ,HFRCO Temperature Coefficient Trim on Comparator Reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. " FINETUNINGEN ,Enable Reference for Fine Tuning" "0,1"
|
|
bitfld.long 0x00 25.--26. " CLKDIV ,Locally Divide HFRCO Clock Output" "DIV1,DIV2,DIV4,3"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LDOHP ,HFRCO LDO High Power Mode" "0,1"
|
|
bitfld.long 0x00 21.--23. " CMPBIAS ,HFRCO Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. " FREQRANGE ,HFRCO Frequency Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " FINETUNING ,HFRCO Fine Tuning Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TUNING ,HFRCO Tuning Value"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "AUXHFRCOCTRL,AUXHFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. " VREFTC ,AUXHFRCO Temperature Coefficient Trim on Comparator Reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. " FINETUNINGEN ,Enable Reference for Fine Tuning" "0,1"
|
|
bitfld.long 0x00 25.--26. " CLKDIV ,Locally Divide AUXHFRCO Clock Output" "DIV1,DIV2,DIV4,3"
|
|
textline " "
|
|
bitfld.long 0x00 24. " LDOHP ,AUXHFRCO LDO High Power Mode" "0,1"
|
|
bitfld.long 0x00 21.--23. " CMPBIAS ,AUXHFRCO Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. " FREQRANGE ,AUXHFRCO Frequency Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " FINETUNING ,AUXHFRCO Fine Tuning Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TUNING ,AUXHFRCO Tuning Value"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "LFRCOCTRL,LFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. " GMCCURTUNE ,Tuning of Gmc Current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--25. " TIMEOUT ,LFRCO Timeout" "2CYCLES,16CYCLES,32CYCLES,3"
|
|
bitfld.long 0x00 20.--21. " VREFUPDATE ,Control Vref Update Rate" "32CYCLES,64CYCLES,128CYCLES,256CYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ENDEM ,Enable Dynamic Element Matching" "0,1"
|
|
bitfld.long 0x00 17. " ENCHOP ,Enable Comparator Chopping" "0,1"
|
|
bitfld.long 0x00 16. " ENVREF ,Enable Duty Cycling of Vref" "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " TUNING ,LFRCO Tuning Value"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "HFXOCTRL,HFXO Control Register"
|
|
bitfld.long 0x00 29. " AUTOSTARTSELEM0EM1 ,Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3" "0,1"
|
|
bitfld.long 0x00 28. " AUTOSTARTEM0EM1 ,Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3" "0,1"
|
|
bitfld.long 0x00 24.--26. " LFTIMEOUT ,HFXO Low Frequency Timeout" "0CYCLES,2CYCLES,4CYCLES,16CYCLES,32CYCLES,64CYCLES,1KCYCLES,4KCYCLES"
|
|
textline " "
|
|
bitfld.long 0x00 10. " XTO2GND ,Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off" "0,1"
|
|
bitfld.long 0x00 9. " XTI2GND ,Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off" "0,1"
|
|
bitfld.long 0x00 8. " LOWPOWER ,Low Power Mode Control" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PEAKDETSHUNTOPTMODE ,HFXO Automatic Peak Detection and Shunt Current Optimization Mode" "AUTOCMD,CMD,MANUAL,3"
|
|
bitfld.long 0x00 0. " MODE ,HFXO Mode" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "HFXOSTARTUPCTRL,HFXO Startup Control"
|
|
hexmask.long.word 0x00 11.--19. 1. " CTUNE ,Sets Oscillator Tuning Capacitance"
|
|
hexmask.long.byte 0x00 0.--6. 1. " IBTRIMXOCORE ,Sets the Startup Oscillator Core Bias Current"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "HFXOSTEADYSTATECTRL,HFXO Steady State Control"
|
|
bitfld.long 0x00 28.--31. " REGISHUPPER ,Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 26. " PEAKDETEN ,Enables Oscillator Peak Detectors" "0,1"
|
|
bitfld.long 0x00 24.--25. " REGSELILOW ,Controls Regulator Minimum Shunt Current Detection Relative to Nominal" "0,1,2,3"
|
|
textline " "
|
|
hexmask.long.word 0x00 11.--19. 1. " CTUNE ,Sets Oscillator Tuning Capacitance"
|
|
bitfld.long 0x00 7.--10. " REGISH ,Sets the Steady State Regulator Output Current Level (shunt Regulator)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--6. 1. " IBTRIMXOCORE ,Sets the Steady State Oscillator Core Bias Current"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "HFXOTIMEOUTCTRL,HFXO Timeout Control"
|
|
bitfld.long 0x00 16.--19. " SHUNTOPTTIMEOUT ,Wait Duration in HFXO Shunt Current Optimization Wait State" "2CYCLES,4CYCLES,16CYCLES,32CYCLES,256CYCLES,1KCYCLES,2KCYCLES,4KCYCLES,8KCYCLES,16KCYCLES,32KCYCLES,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " PEAKDETTIMEOUT ,Wait Duration in HFXO Peak Detection Wait State" "2CYCLES,4CYCLES,16CYCLES,32CYCLES,256CYCLES,1KCYCLES,2KCYCLES,4KCYCLES,8KCYCLES,16KCYCLES,32KCYCLES,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " STEADYTIMEOUT ,Wait Duration in HFXO Startup Steady Wait State" "2CYCLES,4CYCLES,16CYCLES,32CYCLES,256CYCLES,1KCYCLES,2KCYCLES,4KCYCLES,8KCYCLES,16KCYCLES,32KCYCLES,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STARTUPTIMEOUT ,Wait Duration in HFXO Startup Enable Wait State" "2CYCLES,4CYCLES,16CYCLES,32CYCLES,256CYCLES,1KCYCLES,2KCYCLES,4KCYCLES,8KCYCLES,16KCYCLES,32KCYCLES,11,12,13,14,15"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "LFXOCTRL,LFXO Control Register"
|
|
bitfld.long 0x00 24.--26. " TIMEOUT ,LFXO Timeout" "2CYCLES,256CYCLES,1KCYCLES,2KCYCLES,4KCYCLES,8KCYCLES,16KCYCLES,32KCYCLES"
|
|
bitfld.long 0x00 20. " BUFCUR ,LFXO Buffer Bias Current" "0,1"
|
|
bitfld.long 0x00 16.--17. " CUR ,LFXO Current Trim" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " AGC ,LFXO AGC Enable" "0,1"
|
|
bitfld.long 0x00 14. " HIGHAMPL ,LFXO High XTAL Oscillation Amplitude Enable" "0,1"
|
|
bitfld.long 0x00 11.--12. " GAIN ,LFXO Startup Gain" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MODE ,LFXO Mode" "XTAL,BUFEXTCLK,DIGEXTCLK,3"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TUNING ,LFXO Internal Capacitor Array Tuning Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "DPLLCTRL,DPLL Control Register"
|
|
bitfld.long 0x00 3.--4. " REFSEL ,Reference Clock Selection Control" "HFXO,LFXO,2,CLKIN0"
|
|
bitfld.long 0x00 2. " AUTORECOVER ,Automatic Recovery Ctrl" "0,1"
|
|
bitfld.long 0x00 1. " EDGESEL ,Reference Edge Select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MODE ,Operating Mode Control" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "DPLLCTRL1,DPLL Control Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " N ,Factor N"
|
|
hexmask.long.word 0x00 0.--11. 1. " M ,Factor M"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "CALCTRL,Calibration Control Register"
|
|
bitfld.long 0x00 24.--27. " PRSDOWNSEL ,PRS Select for PRS Input When Selected in DOWNSEL" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " PRSUPSEL ,PRS Select for PRS Input When Selected in UPSEL" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 8. " CONT ,Continuous Calibration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DOWNSEL ,Calibration Down-counter Select" "HFCLK,HFXO,LFXO,HFRCO,LFRCO,AUXHFRCO,PRS,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " UPSEL ,Calibration Up-counter Select" "HFXO,LFXO,HFRCO,LFRCO,AUXHFRCO,PRS,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "CALCNT,Calibration Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CALCNT ,Calibration Counter"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x00 "OSCENCMD,Oscillator Enable/Disable Command Register"
|
|
bitfld.long 0x00 13. " DPLLDIS ,DPLL Disable" "0,1"
|
|
bitfld.long 0x00 12. " DPLLEN ,DPLL Enable" "0,1"
|
|
bitfld.long 0x00 9. " LFXODIS ,LFXO Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LFXOEN ,LFXO Enable" "0,1"
|
|
bitfld.long 0x00 7. " LFRCODIS ,LFRCO Disable" "0,1"
|
|
bitfld.long 0x00 6. " LFRCOEN ,LFRCO Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " AUXHFRCODIS ,AUXHFRCO Disable" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCOEN ,AUXHFRCO Enable" "0,1"
|
|
bitfld.long 0x00 3. " HFXODIS ,HFXO Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HFXOEN ,HFXO Enable" "0,1"
|
|
bitfld.long 0x00 1. " HFRCODIS ,HFRCO Disable" "0,1"
|
|
bitfld.long 0x00 0. " HFRCOEN ,HFRCO Enable" "0,1"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 5. " HFXOSHUNTOPTSTART ,HFXO Shunt Current Optimization Start" "0,1"
|
|
bitfld.long 0x00 4. " HFXOPEAKDETSTART ,HFXO Peak Detection Start" "0,1"
|
|
bitfld.long 0x00 1. " CALSTOP ,Calibration Stop" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CALSTART ,Calibration Start" "0,1"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "DBGCLKSEL,Debug Trace Clock Select"
|
|
bitfld.long 0x00 0. " DBG ,Debug Trace Clock" "AUXHFRCO,HFCLK"
|
|
wgroup.long 0x74++0x3
|
|
line.long 0x00 "HFCLKSEL,High Frequency Clock Select Command Register"
|
|
bitfld.long 0x00 0.--2. " HF ,HFCLK Select" "0,HFRCO,HFXO,LFRCO,LFXO,HFRCODIV2,6,CLKIN0"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "LFACLKSEL,Low Frequency A Clock Select Register"
|
|
bitfld.long 0x00 0.--2. " LFA ,Clock Select for LFA" "DISABLED,LFRCO,LFXO,3,ULFRCO,5,6,7"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "LFBCLKSEL,Low Frequency B Clock Select Register"
|
|
bitfld.long 0x00 0.--2. " LFB ,Clock Select for LFB" "DISABLED,LFRCO,LFXO,HFCLKLE,ULFRCO,5,6,7"
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "LFECLKSEL,Low Frequency E Clock Select Register"
|
|
bitfld.long 0x00 0.--2. " LFE ,Clock Select for LFE" "DISABLED,LFRCO,LFXO,3,ULFRCO,5,6,7"
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 29. " ULFRCOPHASE ,ULFRCO Clock Phase" "0,1"
|
|
bitfld.long 0x00 28. " LFRCOPHASE ,LFRCO Clock Phase" "0,1"
|
|
bitfld.long 0x00 27. " LFXOPHASE ,LFXO Clock Phase" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HFXOREGILOW ,HFXO Regulator Shunt Current Too Low" "0,1"
|
|
bitfld.long 0x00 25. " HFXOAMPLOW ,HFXO Amplitude Tuning Value Too Low" "0,1"
|
|
bitfld.long 0x00 24. " HFXOAMPHIGH ,HFXO Oscillation Amplitude is Too High" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HFXOSHUNTOPTRDY ,HFXO Shunt Current Optimization Ready" "0,1"
|
|
bitfld.long 0x00 22. " HFXOPEAKDETRDY ,HFXO Peak Detection Ready" "0,1"
|
|
bitfld.long 0x00 21. " HFXOREQ ,HFXO is Required By Hardware" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CALRDY ,Calibration Ready" "0,1"
|
|
bitfld.long 0x00 13. " DPLLRDY ,DPLL Ready" "0,1"
|
|
bitfld.long 0x00 12. " DPLLENS ,DPLL Enable Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LFXORDY ,LFXO Ready" "0,1"
|
|
bitfld.long 0x00 8. " LFXOENS ,LFXO Enable Status" "0,1"
|
|
bitfld.long 0x00 7. " LFRCORDY ,LFRCO Ready" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LFRCOENS ,LFRCO Enable Status" "0,1"
|
|
bitfld.long 0x00 5. " AUXHFRCORDY ,AUXHFRCO Ready" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCOENS ,AUXHFRCO Enable Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HFXORDY ,HFXO Ready" "0,1"
|
|
bitfld.long 0x00 2. " HFXOENS ,HFXO Enable Status" "0,1"
|
|
bitfld.long 0x00 1. " HFRCORDY ,HFRCO Ready" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HFRCOENS ,HFRCO Enable Status" "0,1"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x00 "HFCLKSTATUS,HFCLK Status Register"
|
|
bitfld.long 0x00 0.--2. " SELECTED ,HFCLK Selected" "0,HFRCO,HFXO,LFRCO,LFXO,HFRCODIV2,6,CLKIN0"
|
|
rgroup.long 0x9C++0x3
|
|
line.long 0x00 "HFXOTRIMSTATUS,HFXO Trim Status"
|
|
bitfld.long 0x00 7.--10. " REGISH ,Value of REGISH Found By Automatic HFXO Shunt Current Optimization Algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--6. 1. " IBTRIMXOCORE ,Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm"
|
|
rgroup.long 0xA0++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. " CMUERR ,CMU Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " ULFRCOEDGE ,ULFRCO Clock Edge Detected Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " LFRCOEDGE ,LFRCO Clock Edge Detected Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " LFXOEDGE ,LFXO Clock Edge Detected Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DPLLLOCKFAILHIGH ,DPLL Lock Failure Low Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " DPLLLOCKFAILLOW ,DPLL Lock Failure Low Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DPLLRDY ,DPLL Lock Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " LFTIMEOUTERR ,Low Frequency Timeout Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " HFRCODIS ,HFRCO Disable Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HFXOSHUNTOPTRDY ,HFXO Automatic Shunt Current Optimization Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " HFXOPEAKDETRDY ,HFXO Automatic Peak Detection Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " HFXOPEAKDETERR ,HFXO Automatic Peak Detection Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HFXOAUTOSW ,HFXO Automatic Switch Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " HFXODISERR ,HFXO Disable Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CALOF ,Calibration Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CALRDY ,Calibration Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCORDY ,AUXHFRCO Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " LFXORDY ,LFXO Ready Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LFRCORDY ,LFRCO Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " HFXORDY ,HFXO Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " HFRCORDY ,HFRCO Ready Interrupt Flag" "0,1"
|
|
wgroup.long 0xA4++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. " CMUERR ,Set CMUERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " ULFRCOEDGE ,Set ULFRCOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " LFRCOEDGE ,Set LFRCOEDGE Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " LFXOEDGE ,Set LFXOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DPLLLOCKFAILHIGH ,Set DPLLLOCKFAILHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " DPLLLOCKFAILLOW ,Set DPLLLOCKFAILLOW Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DPLLRDY ,Set DPLLRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " LFTIMEOUTERR ,Set LFTIMEOUTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " HFRCODIS ,Set HFRCODIS Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HFXOSHUNTOPTRDY ,Set HFXOSHUNTOPTRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " HFXOPEAKDETRDY ,Set HFXOPEAKDETRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " HFXOPEAKDETERR ,Set HFXOPEAKDETERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HFXOAUTOSW ,Set HFXOAUTOSW Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " HFXODISERR ,Set HFXODISERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CALOF ,Set CALOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CALRDY ,Set CALRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCORDY ,Set AUXHFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " LFXORDY ,Set LFXORDY Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LFRCORDY ,Set LFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " HFXORDY ,Set HFXORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " HFRCORDY ,Set HFRCORDY Interrupt Flag" "0,1"
|
|
wgroup.long 0xA8++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. " CMUERR ,Clear CMUERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " ULFRCOEDGE ,Clear ULFRCOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " LFRCOEDGE ,Clear LFRCOEDGE Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " LFXOEDGE ,Clear LFXOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DPLLLOCKFAILHIGH ,Clear DPLLLOCKFAILHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " DPLLLOCKFAILLOW ,Clear DPLLLOCKFAILLOW Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DPLLRDY ,Clear DPLLRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " LFTIMEOUTERR ,Clear LFTIMEOUTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " HFRCODIS ,Clear HFRCODIS Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HFXOSHUNTOPTRDY ,Clear HFXOSHUNTOPTRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " HFXOPEAKDETRDY ,Clear HFXOPEAKDETRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " HFXOPEAKDETERR ,Clear HFXOPEAKDETERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HFXOAUTOSW ,Clear HFXOAUTOSW Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " HFXODISERR ,Clear HFXODISERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CALOF ,Clear CALOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CALRDY ,Clear CALRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCORDY ,Clear AUXHFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " LFXORDY ,Clear LFXORDY Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LFRCORDY ,Clear LFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " HFXORDY ,Clear HFXORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " HFRCORDY ,Clear HFRCORDY Interrupt Flag" "0,1"
|
|
group.long 0xAC++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " CMUERR ,CMUERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 29. " ULFRCOEDGE ,ULFRCOEDGE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. " LFRCOEDGE ,LFRCOEDGE Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " LFXOEDGE ,LFXOEDGE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. " DPLLLOCKFAILHIGH ,DPLLLOCKFAILHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. " DPLLLOCKFAILLOW ,DPLLLOCKFAILLOW Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DPLLRDY ,DPLLRDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " LFTIMEOUTERR ,LFTIMEOUTERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. " HFRCODIS ,HFRCODIS Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HFXOSHUNTOPTRDY ,HFXOSHUNTOPTRDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " HFXOPEAKDETRDY ,HFXOPEAKDETRDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " HFXOPEAKDETERR ,HFXOPEAKDETERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HFXOAUTOSW ,HFXOAUTOSW Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " HFXODISERR ,HFXODISERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CALOF ,CALOF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CALRDY ,CALRDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " AUXHFRCORDY ,AUXHFRCORDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " LFXORDY ,LFXORDY Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LFRCORDY ,LFRCORDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " HFXORDY ,HFXORDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " HFRCORDY ,HFRCORDY Interrupt Enable" "0,1"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "HFBUSCLKEN0,High Frequency Bus Clock Enable Register 0"
|
|
bitfld.long 0x00 6. " GPCRC ,General Purpose CRC Clock Enable" "0,1"
|
|
bitfld.long 0x00 5. " LDMA ,Linked Direct Memory Access Controller Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. " PRS ,Peripheral Reflex System Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO ,General purpose Input/Output Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. " LE ,Low Energy Peripheral Interface Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. " CRYPTO1 ,Advanced Encryption Standard Accelerator 1 Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CRYPTO0 ,Advanced Encryption Standard Accelerator 0 Clock Enable" "0,1"
|
|
group.long 0xC0++0x3
|
|
line.long 0x00 "HFPERCLKEN0,High Frequency Peripheral Clock Enable Register 0"
|
|
bitfld.long 0x00 15. " TRNG0 ,True Random Number Generator 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 14. " IDAC0 ,Current Digital to Analog Converter 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 13. " CSEN ,Capacitive touch sense module Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " VDAC0 ,Digital to Analog Converter 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 11. " ADC0 ,Analog to Digital Converter 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 10. " CRYOTIMER ,CryoTimer Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ACMP1 ,Analog Comparator 1 Clock Enable" "0,1"
|
|
bitfld.long 0x00 8. " ACMP0 ,Analog Comparator 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 7. " I2C1 ,I2C 1 Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " I2C0 ,I2C 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 5. " USART2 ,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. " USART1 ,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " USART0 ,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. " WTIMER0 ,Wide Timer 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. " TIMER1 ,Timer 1 Clock Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TIMER0 ,Timer 0 Clock Enable" "0,1"
|
|
group.long 0xE0++0x3
|
|
line.long 0x00 "LFACLKEN0,Low Frequency a Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 1. " LESENSE ,Low Energy Sensor Interface Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. " LETIMER0 ,Low Energy Timer 0 Clock Enable" "0,1"
|
|
group.long 0xE8++0x3
|
|
line.long 0x00 "LFBCLKEN0,Low Frequency B Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 2. " CSEN ,Capacitive touch sense module Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. " LEUART0 ,Low Energy UART 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. " SYSTICK ,Clock Enable" "0,1"
|
|
group.long 0xF0++0x3
|
|
line.long 0x00 "LFECLKEN0,Low Frequency E Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 0. " RTCC ,Real-Time Counter and Calendar Clock Enable" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "HFPRESC,High Frequency Clock Prescaler Register"
|
|
bitfld.long 0x00 24. " HFCLKLEPRESC ,HFCLKLE Prescaler" "DIV2,DIV4"
|
|
bitfld.long 0x00 8.--12. " PRESC ,HFCLK Prescaler" "NODIVISION,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "HFCOREPRESC,High Frequency Core Clock Prescaler Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " PRESC ,HFCORECLK Prescaler"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "HFPERPRESC,High Frequency Peripheral Clock Prescaler Register"
|
|
hexmask.long.word 0x00 8.--16. 1. " PRESC ,HFPERCLK Prescaler"
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "HFEXPPRESC,High Frequency Export Clock Prescaler Register"
|
|
bitfld.long 0x00 8.--12. " PRESC ,HFEXPCLK Prescaler" "NODIVISION,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "LFAPRESC0,Low Frequency a Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 4.--5. " LESENSE ,Low Energy Sensor Interface Prescaler" "DIV1,DIV2,DIV4,DIV8"
|
|
bitfld.long 0x00 0.--3. " LETIMER0 ,Low Energy Timer 0 Prescaler" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,DIV2048,DIV4096,DIV8192,DIV16384,DIV32768"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "LFBPRESC0,Low Frequency B Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 8.--9. " CSEN ,Capacitive touch sense module Prescaler" "DIV16,DIV32,DIV64,DIV128"
|
|
bitfld.long 0x00 4.--5. " LEUART0 ,Low Energy UART 0 Prescaler" "DIV1,DIV2,DIV4,DIV8"
|
|
rbitfld.long 0x00 0.--3. " SYSTICK ,Prescaler" "DIV1,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "LFEPRESC0,Low Frequency E Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 0.--1. " RTCC ,Real-Time Counter and Calendar Prescaler" "DIV1,DIV2,DIV4,3"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 29. " LFXOBSY ,LFXO Busy" "0,1"
|
|
bitfld.long 0x00 28. " HFXOBSY ,HFXO Busy" "0,1"
|
|
bitfld.long 0x00 27. " LFRCOVREFBSY ,LFRCO VREF Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " LFRCOBSY ,LFRCO Busy" "0,1"
|
|
bitfld.long 0x00 25. " AUXHFRCOBSY ,AUXHFRCO Busy" "0,1"
|
|
bitfld.long 0x00 24. " HFRCOBSY ,HFRCO Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " LFEPRESC0 ,Low Frequency E Prescaler 0 Busy" "0,1"
|
|
bitfld.long 0x00 16. " LFECLKEN0 ,Low Frequency E Clock Enable 0 Busy" "0,1"
|
|
bitfld.long 0x00 6. " LFBPRESC0 ,Low Frequency B Prescaler 0 Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LFBCLKEN0 ,Low Frequency B Clock Enable 0 Busy" "0,1"
|
|
bitfld.long 0x00 2. " LFAPRESC0 ,Low Frequency a Prescaler 0 Busy" "0,1"
|
|
bitfld.long 0x00 0. " LFACLKEN0 ,Low Frequency a Clock Enable 0 Busy" "0,1"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. " REGFREEZE ,Register Update Freeze" "0,1"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "PCNTCTRL,PCNT Control Register"
|
|
bitfld.long 0x00 1. " PCNT0CLKSEL ,PCNT0 Clock Select" "0,1"
|
|
bitfld.long 0x00 0. " PCNT0CLKEN ,PCNT0 Clock Enable" "0,1"
|
|
group.long 0x15C++0x3
|
|
line.long 0x00 "ADCCTRL,ADC Control Register"
|
|
bitfld.long 0x00 8. " ADC0CLKINV ,Invert Clock Selected By ADC0CLKSEL" "0,1"
|
|
bitfld.long 0x00 4.--5. " ADC0CLKSEL ,ADC0 Clock Select" "DISABLED,AUXHFRCO,HFXO,HFSRCCLK"
|
|
group.long 0x170++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 28. " CLKIN0PEN ,CLKIN0 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " CLKOUT1PEN ,CLKOUT1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " CLKOUT0PEN ,CLKOUT0 Pin Enable" "0,1"
|
|
group.long 0x174++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " CLKOUT1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKOUT0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x178++0x3
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 0.--5. " CLKIN0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x180++0x3
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock Key"
|
|
group.long 0x184++0x3
|
|
line.long 0x00 "HFRCOSS,HFRCO Spread Spectrum Register"
|
|
bitfld.long 0x00 8.--12. " SSINV ,Spread Spectrum Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--2. " SSAMP ,Spread Spectrum Amplitude" "0,1,2,3,4,5,6,7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CRYPTO0"
|
|
base ad:0x400F0000
|
|
width 14.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " COMBDMA0WEREQ ,Combined Data0 Write DMA Request" "0,1"
|
|
bitfld.long 0x00 28.--29. " DMA1RSEL ,DATA0 DMA Unaligned Read Register Select" "DATA1,DDATA1,QDATA1,QDATA1BIG"
|
|
bitfld.long 0x00 24.--25. " DMA1MODE ,DMA1 Read Mode" "FULL,LENLIMIT,FULLBYTE,LENLIMITBYTE"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " DMA0RSEL ,DMA0 Read Register Select" "DATA0,DDATA0,DDATA0BIG,QDATA0"
|
|
bitfld.long 0x00 16.--17. " DMA0MODE ,DMA0 Read Mode" "FULL,LENLIMIT,FULLBYTE,LENLIMITBYTE"
|
|
bitfld.long 0x00 14.--15. " INCWIDTH ,Increment Width" "INCWIDTH1,INCWIDTH2,INCWIDTH3,INCWIDTH4"
|
|
textline " "
|
|
bitfld.long 0x00 10. " NOBUSYSTALL ,No Stalling of Bus When Busy" "0,1"
|
|
bitfld.long 0x00 2. " SHA ,SHA Mode" "0,1"
|
|
bitfld.long 0x00 1. " KEYBUFDIS ,Key Buffer Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AES ,AES Mode" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "WAC,Wide Arithmetic Configuration"
|
|
bitfld.long 0x00 10.--11. " RESULTWIDTH ,Result Width" "256BIT,128BIT,260BIT,3"
|
|
bitfld.long 0x00 8.--9. " MULWIDTH ,Multiply Width" "MUL256,MUL128,MULMOD,3"
|
|
bitfld.long 0x00 4. " MODOP ,Modular Operation Field Type" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODULUS ,Modular Operation Modulus" "BIN256,BIN128,ECCBIN233P,ECCBIN163P,GCMBIN128,ECCPRIME256P,ECCPRIME224P,ECCPRIME192P,ECCBIN233N,ECCBIN233KN,ECCBIN163N,ECCBIN163KN,ECCPRIME256N,ECCPRIME224N,ECCPRIME192N,15"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. " SEQSTEP ,Sequence Step" "0,1"
|
|
bitfld.long 0x00 10. " SEQSTOP ,Sequence Stop" "0,1"
|
|
bitfld.long 0x00 9. " SEQSTART ,Encryption/Decryption SEQUENCE Start" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR ,Execute Instruction"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " DMAACTIVE ,DMA Action is Active" "0,1"
|
|
bitfld.long 0x00 1. " INSTRRUNNING ,Action is Active" "0,1"
|
|
bitfld.long 0x00 0. " SEQRUNNING ,AES SEQUENCE Running" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "DSTATUS,Data Status Register"
|
|
bitfld.long 0x00 24. " CARRY ,Carry From Arithmetic Operation" "0,1"
|
|
bitfld.long 0x00 20. " DDATA1MSB ,MSB in DDATA1" "0,1"
|
|
bitfld.long 0x00 16.--19. " DDATA0MSBS ,MSB in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " DDATA0LSBS ,LSBs in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DATA0ZERO ,Data 0 Zero" "0,ZERO0TO31,ZERO32TO63,3,ZERO64TO95,5,6,7,ZERO96TO127,9,10,11,12,13,14,15"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "CSTATUS,Control Status Register"
|
|
bitfld.long 0x00 20.--24. " SEQIP ,Sequence Next Instruction Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17. " SEQSKIP ,Sequence Skip Next Instruction" "0,1"
|
|
bitfld.long 0x00 16. " SEQPART ,Sequence Part" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " V1 ,Selected ALU Operand 1" "DDATA0,DDATA1,DDATA2,DDATA3,DDATA4,DATA0,DATA1,DATA2"
|
|
bitfld.long 0x00 0.--2. " V0 ,Selected ALU Operand 0" "DDATA0,DDATA1,DDATA2,DDATA3,DDATA4,DATA0,DATA1,DATA2"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "KEY,KEY Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " KEY ,Key Access"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "KEYBUF,KEY Buffer Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " KEYBUF ,Key Buffer Access"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "SEQCTRL,Sequence Control"
|
|
bitfld.long 0x00 31. " HALT ,Halt Sequence" "0,1"
|
|
bitfld.long 0x00 29. " DMA1PRESA ,DMA1 Preserve a" "0,1"
|
|
bitfld.long 0x00 28. " DMA0PRESA ,DMA0 Preserve a" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " DMA1SKIP ,DMA1 Skip" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. " DMA0SKIP ,DMA0 Skip" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. " BLOCKSIZE ,Size of Data Blocks" "16BYTES,32BYTES,64BYTES,3"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--13. 1. " LENGTHA ,Buffer Length a in Bytes"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "SEQCTRLB,Sequence Control B"
|
|
bitfld.long 0x00 29. " DMA1PRESB ,DMA1 Preserve B" "0,1"
|
|
bitfld.long 0x00 28. " DMA0PRESB ,DMA0 Preserve B" "0,1"
|
|
hexmask.long.word 0x00 0.--13. 1. " LENGTHB ,Buffer Length B in Bytes"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "IF,AES Interrupt Flags"
|
|
bitfld.long 0x00 1. " SEQDONE ,Sequence Done" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Instruction Done" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,Set SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Set INSTRDONE Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,Clear SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Clear INSTRDONE Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,SEQDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,INSTRDONE Interrupt Enable" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "SEQ0,Sequence Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR3 ,Sequence Instruction 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR2 ,Sequence Instruction 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR1 ,Sequence Instruction 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR0 ,Sequence Instruction 0"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "SEQ1,Sequence Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR7 ,Sequence Instruction 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR6 ,Sequence Instruction 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR5 ,Sequence Instruction 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR4 ,Sequence Instruction 4"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "SEQ2,Sequence Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR11 ,Sequence Instruction 11"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR10 ,Sequence Instruction 10"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR9 ,Sequence Instruction 9"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR8 ,Sequence Instruction 8"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "SEQ3,Sequence Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR15 ,Sequence Instruction 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR14 ,Sequence Instruction 14"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR13 ,Sequence Instruction 13"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR12 ,Sequence Instruction 12"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "SEQ4,Sequence Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR19 ,Sequence Instruction 19"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR18 ,Sequence Instruction 18"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR17 ,Sequence Instruction 17"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR16 ,Sequence Instruction 16"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "DATA0,DATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA0 ,Data 0 Access"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "DATA1,DATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA1 ,Data 1 Access"
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "DATA2,DATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA2 ,Data 2 Access"
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "DATA3,DATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA3 ,Data 3 Access"
|
|
group.long 0xA0++0x3
|
|
line.long 0x00 "DATA0XOR,DATA0XOR Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA0XOR ,XOR Data 0 Access"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "DATA0BYTE,DATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE ,Data 0 Byte Access"
|
|
group.long 0xB4++0x3
|
|
line.long 0x00 "DATA1BYTE,DATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA1BYTE ,Data 1 Byte Access"
|
|
group.long 0xBC++0x3
|
|
line.long 0x00 "DATA0XORBYTE,DATA0 Register Byte XOR Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0XORBYTE ,Data 0 XOR Byte Access"
|
|
group.long 0xC0++0x3
|
|
line.long 0x00 "DATA0BYTE12,DATA0 Register Byte 12 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE12 ,Data 0 Byte 12 Access"
|
|
group.long 0xC4++0x3
|
|
line.long 0x00 "DATA0BYTE13,DATA0 Register Byte 13 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE13 ,Data 0 Byte 13 Access"
|
|
group.long 0xC8++0x3
|
|
line.long 0x00 "DATA0BYTE14,DATA0 Register Byte 14 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE14 ,Data 0 Byte 14 Access"
|
|
group.long 0xCC++0x3
|
|
line.long 0x00 "DATA0BYTE15,DATA0 Register Byte 15 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE15 ,Data 0 Byte 15 Access"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "DDATA0,DDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA0 ,Double Data 0 Access"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "DDATA1,DDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA1 ,Double Data 0 Access"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "DDATA2,DDATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA2 ,Double Data 0 Access"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "DDATA3,DDATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA3 ,Double Data 0 Access"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "DDATA4,DDATA4 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA4 ,Double Data 0 Access"
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "DDATA0BIG,DDATA0 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA0BIG ,Double Data 0 Big Endian Access"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "DDATA0BYTE,DDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DDATA0BYTE ,Ddata 0 Byte Access"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "DDATA1BYTE,DDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DDATA1BYTE ,Ddata 1 Byte Access"
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "DDATA0BYTE32,DDATA0 Register Byte 32 Access"
|
|
bitfld.long 0x00 0.--3. " DDATA0BYTE32 ,Ddata 0 Byte 32 Access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x180++0x3
|
|
line.long 0x00 "QDATA0,QDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA0 ,Quad Data 0 Access"
|
|
group.long 0x184++0x3
|
|
line.long 0x00 "QDATA1,QDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA1 ,Quad Data 1 Access"
|
|
group.long 0x1A4++0x3
|
|
line.long 0x00 "QDATA1BIG,QDATA1 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA1BIG ,Quad Data 1 Big Endian Access"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x00 "QDATA0BYTE,QDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " QDATA0BYTE ,Qdata 0 Byte Access"
|
|
group.long 0x1C4++0x3
|
|
line.long 0x00 "QDATA1BYTE,QDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " QDATA1BYTE ,Qdata 1 Byte Access"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CRYPTO1"
|
|
base ad:0x400F0400
|
|
width 14.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " COMBDMA0WEREQ ,Combined Data0 Write DMA Request" "0,1"
|
|
bitfld.long 0x00 28.--29. " DMA1RSEL ,DATA0 DMA Unaligned Read Register Select" "DATA1,DDATA1,QDATA1,QDATA1BIG"
|
|
bitfld.long 0x00 24.--25. " DMA1MODE ,DMA1 Read Mode" "FULL,LENLIMIT,FULLBYTE,LENLIMITBYTE"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " DMA0RSEL ,DMA0 Read Register Select" "DATA0,DDATA0,DDATA0BIG,QDATA0"
|
|
bitfld.long 0x00 16.--17. " DMA0MODE ,DMA0 Read Mode" "FULL,LENLIMIT,FULLBYTE,LENLIMITBYTE"
|
|
bitfld.long 0x00 14.--15. " INCWIDTH ,Increment Width" "INCWIDTH1,INCWIDTH2,INCWIDTH3,INCWIDTH4"
|
|
textline " "
|
|
bitfld.long 0x00 10. " NOBUSYSTALL ,No Stalling of Bus When Busy" "0,1"
|
|
bitfld.long 0x00 2. " SHA ,SHA Mode" "0,1"
|
|
bitfld.long 0x00 1. " KEYBUFDIS ,Key Buffer Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AES ,AES Mode" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "WAC,Wide Arithmetic Configuration"
|
|
bitfld.long 0x00 10.--11. " RESULTWIDTH ,Result Width" "256BIT,128BIT,260BIT,3"
|
|
bitfld.long 0x00 8.--9. " MULWIDTH ,Multiply Width" "MUL256,MUL128,MULMOD,3"
|
|
bitfld.long 0x00 4. " MODOP ,Modular Operation Field Type" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " MODULUS ,Modular Operation Modulus" "BIN256,BIN128,ECCBIN233P,ECCBIN163P,GCMBIN128,ECCPRIME256P,ECCPRIME224P,ECCPRIME192P,ECCBIN233N,ECCBIN233KN,ECCBIN163N,ECCBIN163KN,ECCPRIME256N,ECCPRIME224N,ECCPRIME192N,15"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. " SEQSTEP ,Sequence Step" "0,1"
|
|
bitfld.long 0x00 10. " SEQSTOP ,Sequence Stop" "0,1"
|
|
bitfld.long 0x00 9. " SEQSTART ,Encryption/Decryption SEQUENCE Start" "0,1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR ,Execute Instruction"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " DMAACTIVE ,DMA Action is Active" "0,1"
|
|
bitfld.long 0x00 1. " INSTRRUNNING ,Action is Active" "0,1"
|
|
bitfld.long 0x00 0. " SEQRUNNING ,AES SEQUENCE Running" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "DSTATUS,Data Status Register"
|
|
bitfld.long 0x00 24. " CARRY ,Carry From Arithmetic Operation" "0,1"
|
|
bitfld.long 0x00 20. " DDATA1MSB ,MSB in DDATA1" "0,1"
|
|
bitfld.long 0x00 16.--19. " DDATA0MSBS ,MSB in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " DDATA0LSBS ,LSBs in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DATA0ZERO ,Data 0 Zero" "0,ZERO0TO31,ZERO32TO63,3,ZERO64TO95,5,6,7,ZERO96TO127,9,10,11,12,13,14,15"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "CSTATUS,Control Status Register"
|
|
bitfld.long 0x00 20.--24. " SEQIP ,Sequence Next Instruction Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17. " SEQSKIP ,Sequence Skip Next Instruction" "0,1"
|
|
bitfld.long 0x00 16. " SEQPART ,Sequence Part" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " V1 ,Selected ALU Operand 1" "DDATA0,DDATA1,DDATA2,DDATA3,DDATA4,DATA0,DATA1,DATA2"
|
|
bitfld.long 0x00 0.--2. " V0 ,Selected ALU Operand 0" "DDATA0,DDATA1,DDATA2,DDATA3,DDATA4,DATA0,DATA1,DATA2"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "KEY,KEY Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " KEY ,Key Access"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "KEYBUF,KEY Buffer Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " KEYBUF ,Key Buffer Access"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "SEQCTRL,Sequence Control"
|
|
bitfld.long 0x00 31. " HALT ,Halt Sequence" "0,1"
|
|
bitfld.long 0x00 29. " DMA1PRESA ,DMA1 Preserve a" "0,1"
|
|
bitfld.long 0x00 28. " DMA0PRESA ,DMA0 Preserve a" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " DMA1SKIP ,DMA1 Skip" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. " DMA0SKIP ,DMA0 Skip" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. " BLOCKSIZE ,Size of Data Blocks" "16BYTES,32BYTES,64BYTES,3"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--13. 1. " LENGTHA ,Buffer Length a in Bytes"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "SEQCTRLB,Sequence Control B"
|
|
bitfld.long 0x00 29. " DMA1PRESB ,DMA1 Preserve B" "0,1"
|
|
bitfld.long 0x00 28. " DMA0PRESB ,DMA0 Preserve B" "0,1"
|
|
hexmask.long.word 0x00 0.--13. 1. " LENGTHB ,Buffer Length B in Bytes"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "IF,AES Interrupt Flags"
|
|
bitfld.long 0x00 1. " SEQDONE ,Sequence Done" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Instruction Done" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,Set SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Set INSTRDONE Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,Clear SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,Clear INSTRDONE Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " SEQDONE ,SEQDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " INSTRDONE ,INSTRDONE Interrupt Enable" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "SEQ0,Sequence Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR3 ,Sequence Instruction 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR2 ,Sequence Instruction 2"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR1 ,Sequence Instruction 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR0 ,Sequence Instruction 0"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "SEQ1,Sequence Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR7 ,Sequence Instruction 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR6 ,Sequence Instruction 6"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR5 ,Sequence Instruction 5"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR4 ,Sequence Instruction 4"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "SEQ2,Sequence Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR11 ,Sequence Instruction 11"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR10 ,Sequence Instruction 10"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR9 ,Sequence Instruction 9"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR8 ,Sequence Instruction 8"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "SEQ3,Sequence Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR15 ,Sequence Instruction 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR14 ,Sequence Instruction 14"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR13 ,Sequence Instruction 13"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR12 ,Sequence Instruction 12"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "SEQ4,Sequence Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INSTR19 ,Sequence Instruction 19"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INSTR18 ,Sequence Instruction 18"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INSTR17 ,Sequence Instruction 17"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INSTR16 ,Sequence Instruction 16"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "DATA0,DATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA0 ,Data 0 Access"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "DATA1,DATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA1 ,Data 1 Access"
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "DATA2,DATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA2 ,Data 2 Access"
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "DATA3,DATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA3 ,Data 3 Access"
|
|
group.long 0xA0++0x3
|
|
line.long 0x00 "DATA0XOR,DATA0XOR Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DATA0XOR ,XOR Data 0 Access"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "DATA0BYTE,DATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE ,Data 0 Byte Access"
|
|
group.long 0xB4++0x3
|
|
line.long 0x00 "DATA1BYTE,DATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA1BYTE ,Data 1 Byte Access"
|
|
group.long 0xBC++0x3
|
|
line.long 0x00 "DATA0XORBYTE,DATA0 Register Byte XOR Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0XORBYTE ,Data 0 XOR Byte Access"
|
|
group.long 0xC0++0x3
|
|
line.long 0x00 "DATA0BYTE12,DATA0 Register Byte 12 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE12 ,Data 0 Byte 12 Access"
|
|
group.long 0xC4++0x3
|
|
line.long 0x00 "DATA0BYTE13,DATA0 Register Byte 13 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE13 ,Data 0 Byte 13 Access"
|
|
group.long 0xC8++0x3
|
|
line.long 0x00 "DATA0BYTE14,DATA0 Register Byte 14 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE14 ,Data 0 Byte 14 Access"
|
|
group.long 0xCC++0x3
|
|
line.long 0x00 "DATA0BYTE15,DATA0 Register Byte 15 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0BYTE15 ,Data 0 Byte 15 Access"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "DDATA0,DDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA0 ,Double Data 0 Access"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "DDATA1,DDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA1 ,Double Data 0 Access"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "DDATA2,DDATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA2 ,Double Data 0 Access"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "DDATA3,DDATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA3 ,Double Data 0 Access"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "DDATA4,DDATA4 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA4 ,Double Data 0 Access"
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "DDATA0BIG,DDATA0 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. " DDATA0BIG ,Double Data 0 Big Endian Access"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "DDATA0BYTE,DDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DDATA0BYTE ,Ddata 0 Byte Access"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "DDATA1BYTE,DDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DDATA1BYTE ,Ddata 1 Byte Access"
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "DDATA0BYTE32,DDATA0 Register Byte 32 Access"
|
|
bitfld.long 0x00 0.--3. " DDATA0BYTE32 ,Ddata 0 Byte 32 Access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x180++0x3
|
|
line.long 0x00 "QDATA0,QDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA0 ,Quad Data 0 Access"
|
|
group.long 0x184++0x3
|
|
line.long 0x00 "QDATA1,QDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA1 ,Quad Data 1 Access"
|
|
group.long 0x1A4++0x3
|
|
line.long 0x00 "QDATA1BIG,QDATA1 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. " QDATA1BIG ,Quad Data 1 Big Endian Access"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x00 "QDATA0BYTE,QDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " QDATA0BYTE ,Qdata 0 Byte Access"
|
|
group.long 0x1C4++0x3
|
|
line.long 0x00 "QDATA1BYTE,QDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. " QDATA1BYTE ,Qdata 1 Byte Access"
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO"
|
|
base ad:0x4000A000
|
|
width 13.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "PA_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
|
|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "PA_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "PA_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
textline " "
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|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
group.long 0xC++0x3
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|
line.long 0x00 "PA_DOUT,Port Data Out Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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|
wgroup.long 0x18++0x3
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|
line.long 0x00 "PA_DOUTTGL,Port Data Out Toggle Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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|
rgroup.long 0x1C++0x3
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|
line.long 0x00 "PA_DIN,Port Data in Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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|
group.long 0x20++0x3
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|
line.long 0x00 "PA_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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|
group.long 0x28++0x3
|
|
line.long 0x00 "PA_OVTDIS,Over Voltage Disable for All Modes"
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|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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|
group.long 0x30++0x3
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|
line.long 0x00 "PB_CTRL,Port Control Register"
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|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
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|
textline " "
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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|
group.long 0x34++0x3
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|
line.long 0x00 "PB_MODEL,Port Pin Mode Low Register"
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|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x38++0x3
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|
line.long 0x00 "PB_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x3C++0x3
|
|
line.long 0x00 "PB_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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|
wgroup.long 0x48++0x3
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|
line.long 0x00 "PB_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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|
rgroup.long 0x4C++0x3
|
|
line.long 0x00 "PB_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "PB_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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|
group.long 0x58++0x3
|
|
line.long 0x00 "PB_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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|
group.long 0x60++0x3
|
|
line.long 0x00 "PC_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
|
|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0x64++0x3
|
|
line.long 0x00 "PC_MODEL,Port Pin Mode Low Register"
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|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x68++0x3
|
|
line.long 0x00 "PC_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
group.long 0x6C++0x3
|
|
line.long 0x00 "PC_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "PC_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
|
|
rgroup.long 0x7C++0x3
|
|
line.long 0x00 "PC_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "PC_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "PC_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "PD_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
|
|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "PD_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x98++0x3
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|
line.long 0x00 "PD_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
textline " "
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|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x9C++0x3
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line.long 0x00 "PD_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0xA8++0x3
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line.long 0x00 "PD_DOUTTGL,Port Data Out Toggle Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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rgroup.long 0xAC++0x3
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line.long 0x00 "PD_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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group.long 0xB0++0x3
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line.long 0x00 "PD_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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group.long 0xB8++0x3
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line.long 0x00 "PD_OVTDIS,Over Voltage Disable for All Modes"
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|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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group.long 0xC0++0x3
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|
line.long 0x00 "PE_CTRL,Port Control Register"
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|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
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textline " "
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0xC4++0x3
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|
line.long 0x00 "PE_MODEL,Port Pin Mode Low Register"
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|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0xC8++0x3
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line.long 0x00 "PE_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0xCC++0x3
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line.long 0x00 "PE_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0xD8++0x3
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line.long 0x00 "PE_DOUTTGL,Port Data Out Toggle Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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rgroup.long 0xDC++0x3
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line.long 0x00 "PE_DIN,Port Data in Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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|
group.long 0xE0++0x3
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line.long 0x00 "PE_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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group.long 0xE8++0x3
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line.long 0x00 "PE_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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|
group.long 0xF0++0x3
|
|
line.long 0x00 "PF_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0xF4++0x3
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line.long 0x00 "PF_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0xF8++0x3
|
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line.long 0x00 "PF_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
group.long 0xFC++0x3
|
|
line.long 0x00 "PF_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
|
|
wgroup.long 0x108++0x3
|
|
line.long 0x00 "PF_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
|
|
rgroup.long 0x10C++0x3
|
|
line.long 0x00 "PF_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "PF_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
|
|
group.long 0x118++0x3
|
|
line.long 0x00 "PF_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "PG_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
|
|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "PG_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
group.long 0x128++0x3
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|
line.long 0x00 "PG_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
textline " "
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|
bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x12C++0x3
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line.long 0x00 "PG_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0x138++0x3
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line.long 0x00 "PG_DOUTTGL,Port Data Out Toggle Register"
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|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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|
rgroup.long 0x13C++0x3
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line.long 0x00 "PG_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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group.long 0x140++0x3
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|
line.long 0x00 "PG_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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|
group.long 0x148++0x3
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|
line.long 0x00 "PG_OVTDIS,Over Voltage Disable for All Modes"
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|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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group.long 0x150++0x3
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|
line.long 0x00 "PH_CTRL,Port Control Register"
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|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
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textline " "
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0x154++0x3
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|
line.long 0x00 "PH_MODEL,Port Pin Mode Low Register"
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|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x158++0x3
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|
line.long 0x00 "PH_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x15C++0x3
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line.long 0x00 "PH_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0x168++0x3
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line.long 0x00 "PH_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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rgroup.long 0x16C++0x3
|
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line.long 0x00 "PH_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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|
group.long 0x170++0x3
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|
line.long 0x00 "PH_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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group.long 0x178++0x3
|
|
line.long 0x00 "PH_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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|
group.long 0x180++0x3
|
|
line.long 0x00 "PI_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0x184++0x3
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line.long 0x00 "PI_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x188++0x3
|
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line.long 0x00 "PI_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
|
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x18C++0x3
|
|
line.long 0x00 "PI_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
|
|
wgroup.long 0x198++0x3
|
|
line.long 0x00 "PI_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
|
|
rgroup.long 0x19C++0x3
|
|
line.long 0x00 "PI_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x00 "PI_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x00 "PI_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x00 "PJ_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
|
|
bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
|
|
group.long 0x1B4++0x3
|
|
line.long 0x00 "PJ_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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|
bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x1B8++0x3
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line.long 0x00 "PJ_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x1BC++0x3
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line.long 0x00 "PJ_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0x1C8++0x3
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line.long 0x00 "PJ_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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rgroup.long 0x1CC++0x3
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line.long 0x00 "PJ_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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group.long 0x1D0++0x3
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line.long 0x00 "PJ_PINLOCKN,Port Unlocked Pins Register"
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hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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group.long 0x1D8++0x3
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line.long 0x00 "PJ_OVTDIS,Over Voltage Disable for All Modes"
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hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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group.long 0x1E0++0x3
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line.long 0x00 "PK_CTRL,Port Control Register"
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bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
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textline " "
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0x1E4++0x3
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line.long 0x00 "PK_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x1E8++0x3
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line.long 0x00 "PK_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x1EC++0x3
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line.long 0x00 "PK_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
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wgroup.long 0x1F8++0x3
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line.long 0x00 "PK_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
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rgroup.long 0x1FC++0x3
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line.long 0x00 "PK_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
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group.long 0x200++0x3
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line.long 0x00 "PK_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
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group.long 0x208++0x3
|
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line.long 0x00 "PK_OVTDIS,Over Voltage Disable for All Modes"
|
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hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
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group.long 0x210++0x3
|
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line.long 0x00 "PL_CTRL,Port Control Register"
|
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bitfld.long 0x00 28. " DINDISALT ,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. " SLEWRATEALT ,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 16. " DRIVESTRENGTHALT ,Alternate Drive Strength for Port" "0,1"
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textline " "
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bitfld.long 0x00 12. " DINDIS ,Data in Disable" "0,1"
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bitfld.long 0x00 4.--6. " SLEWRATE ,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. " DRIVESTRENGTH ,Drive Strength for Port" "0,1"
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group.long 0x214++0x3
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line.long 0x00 "PL_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. " MODE7 ,Pin 7 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE6 ,Pin 6 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE5 ,Pin 5 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE4 ,Pin 4 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE3 ,Pin 3 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE2 ,Pin 2 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE1 ,Pin 1 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE0 ,Pin 0 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x218++0x3
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line.long 0x00 "PL_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. " MODE15 ,Pin 15 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 24.--27. " MODE14 ,Pin 14 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 20.--23. " MODE13 ,Pin 13 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 16.--19. " MODE12 ,Pin 12 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 12.--15. " MODE11 ,Pin 11 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 8.--11. " MODE10 ,Pin 10 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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textline " "
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bitfld.long 0x00 4.--7. " MODE9 ,Pin 9 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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bitfld.long 0x00 0.--3. " MODE8 ,Pin 8 Mode" "DISABLED,INPUT,INPUTPULL,INPUTPULLFILTER,PUSHPULL,PUSHPULLALT,WIREDOR,WIREDORPULLDOWN,WIREDAND,WIREDANDFILTER,WIREDANDPULLUP,WIREDANDPULLUPFILTER,WIREDANDALT,WIREDANDALTFILTER,WIREDANDALTPULLUP,WIREDANDALTPULLUPFILTER"
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group.long 0x21C++0x3
|
|
line.long 0x00 "PL_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUT ,Data Out"
|
|
wgroup.long 0x228++0x3
|
|
line.long 0x00 "PL_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DOUTTGL ,Data Out Toggle"
|
|
rgroup.long 0x22C++0x3
|
|
line.long 0x00 "PL_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIN ,Data in"
|
|
group.long 0x230++0x3
|
|
line.long 0x00 "PL_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PINLOCKN ,Unlocked Pins"
|
|
group.long 0x238++0x3
|
|
line.long 0x00 "PL_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. " OVTDIS ,Disable Over Voltage Capability"
|
|
group.long 0x400++0x3
|
|
line.long 0x00 "EXTIPSELL,External Interrupt Port Select Low Register"
|
|
bitfld.long 0x00 28.--31. " EXTIPSEL7 ,External Interrupt 7 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " EXTIPSEL6 ,External Interrupt 6 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " EXTIPSEL5 ,External Interrupt 5 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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textline " "
|
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bitfld.long 0x00 16.--19. " EXTIPSEL4 ,External Interrupt 4 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " EXTIPSEL3 ,External Interrupt 3 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " EXTIPSEL2 ,External Interrupt 2 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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textline " "
|
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bitfld.long 0x00 4.--7. " EXTIPSEL1 ,External Interrupt 1 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " EXTIPSEL0 ,External Interrupt 0 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x404++0x3
|
|
line.long 0x00 "EXTIPSELH,External Interrupt Port Select High Register"
|
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bitfld.long 0x00 28.--31. " EXTIPSEL15 ,External Interrupt 15 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 24.--27. " EXTIPSEL14 ,External Interrupt 14 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 20.--23. " EXTIPSEL13 ,External Interrupt 13 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " EXTIPSEL12 ,External Interrupt 12 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 12.--15. " EXTIPSEL11 ,External Interrupt 11 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. " EXTIPSEL10 ,External Interrupt 10 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 4.--7. " EXTIPSEL9 ,External Interrupt 9 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " EXTIPSEL8 ,External Interrupt 8 Port Select" "PORTA,PORTB,PORTC,PORTD,4,PORTF,6,7,8,9,10,11,12,13,14,15"
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group.long 0x408++0x3
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line.long 0x00 "EXTIPINSELL,External Interrupt Pin Select Low Register"
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bitfld.long 0x00 28.--29. " EXTIPINSEL7 ,External Interrupt 7 Pin Select" "PIN4,PIN5,PIN6,PIN7"
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bitfld.long 0x00 24.--25. " EXTIPINSEL6 ,External Interrupt 6 Pin Select" "PIN4,PIN5,PIN6,PIN7"
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bitfld.long 0x00 20.--21. " EXTIPINSEL5 ,External Interrupt 5 Pin Select" "PIN4,PIN5,PIN6,PIN7"
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textline " "
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bitfld.long 0x00 16.--17. " EXTIPINSEL4 ,External Interrupt 4 Pin Select" "PIN4,PIN5,PIN6,PIN7"
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bitfld.long 0x00 12.--13. " EXTIPINSEL3 ,External Interrupt 3 Pin Select" "PIN0,PIN1,PIN2,PIN3"
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bitfld.long 0x00 8.--9. " EXTIPINSEL2 ,External Interrupt 2 Pin Select" "PIN0,PIN1,PIN2,PIN3"
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textline " "
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bitfld.long 0x00 4.--5. " EXTIPINSEL1 ,External Interrupt 1 Pin Select" "PIN0,PIN1,PIN2,PIN3"
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bitfld.long 0x00 0.--1. " EXTIPINSEL0 ,External Interrupt 0 Pin Select" "PIN0,PIN1,PIN2,PIN3"
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group.long 0x40C++0x3
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line.long 0x00 "EXTIPINSELH,External Interrupt Pin Select High Register"
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bitfld.long 0x00 28.--29. " EXTIPINSEL15 ,External Interrupt 15 Pin Select" "PIN12,PIN13,PIN14,PIN15"
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bitfld.long 0x00 24.--25. " EXTIPINSEL14 ,External Interrupt 14 Pin Select" "PIN12,PIN13,PIN14,PIN15"
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bitfld.long 0x00 20.--21. " EXTIPINSEL13 ,External Interrupt 13 Pin Select" "PIN12,PIN13,PIN14,PIN15"
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textline " "
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bitfld.long 0x00 16.--17. " EXTIPINSEL12 ,External Interrupt 12 Pin Select" "PIN12,PIN13,PIN14,PIN15"
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bitfld.long 0x00 12.--13. " EXTIPINSEL11 ,External Interrupt 11 Pin Select" "PIN8,PIN9,PIN10,PIN11"
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bitfld.long 0x00 8.--9. " EXTIPINSEL10 ,External Interrupt 10 Pin Select" "PIN8,PIN9,PIN10,PIN11"
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textline " "
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bitfld.long 0x00 4.--5. " EXTIPINSEL9 ,External Interrupt 9 Pin Select" "PIN8,PIN9,PIN10,PIN11"
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bitfld.long 0x00 0.--1. " EXTIPINSEL8 ,External Interrupt 8 Pin Select" "PIN8,PIN9,PIN10,PIN11"
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group.long 0x410++0x3
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line.long 0x00 "EXTIRISE,External Interrupt Rising Edge Trigger Register"
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hexmask.long.word 0x00 0.--15. 1. " EXTIRISE ,External Interrupt N Rising Edge Trigger Enable"
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group.long 0x414++0x3
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line.long 0x00 "EXTIFALL,External Interrupt Falling Edge Trigger Register"
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hexmask.long.word 0x00 0.--15. 1. " EXTIFALL ,External Interrupt N Falling Edge Trigger Enable"
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group.long 0x418++0x3
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line.long 0x00 "EXTILEVEL,External Interrupt Level Register"
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bitfld.long 0x00 28. " EM4WU12 ,EM4 Wake Up Level for EM4WU12 Pin" "0,1"
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bitfld.long 0x00 25. " EM4WU9 ,EM4 Wake Up Level for EM4WU9 Pin" "0,1"
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bitfld.long 0x00 24. " EM4WU8 ,EM4 Wake Up Level for EM4WU8 Pin" "0,1"
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textline " "
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bitfld.long 0x00 20. " EM4WU4 ,EM4 Wake Up Level for EM4WU4 Pin" "0,1"
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bitfld.long 0x00 17. " EM4WU1 ,EM4 Wake Up Level for EM4WU1 Pin" "0,1"
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bitfld.long 0x00 16. " EM4WU0 ,EM4 Wake Up Level for EM4WU0 Pin" "0,1"
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rgroup.long 0x41C++0x3
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line.long 0x00 "IF,Interrupt Flag Register"
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hexmask.long.word 0x00 16.--31. 1. " EM4WU ,EM4 Wake Up Pin Interrupt Flag"
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hexmask.long.word 0x00 0.--15. 1. " EXT ,External Pin Interrupt Flag"
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wgroup.long 0x420++0x3
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line.long 0x00 "IFS,Interrupt Flag Set Register"
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hexmask.long.word 0x00 16.--31. 1. " EM4WU ,Set EM4WU Interrupt Flag"
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hexmask.long.word 0x00 0.--15. 1. " EXT ,Set EXT Interrupt Flag"
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wgroup.long 0x424++0x3
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line.long 0x00 "IFC,Interrupt Flag Clear Register"
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hexmask.long.word 0x00 16.--31. 1. " EM4WU ,Clear EM4WU Interrupt Flag"
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hexmask.long.word 0x00 0.--15. 1. " EXT ,Clear EXT Interrupt Flag"
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group.long 0x428++0x3
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line.long 0x00 "IEN,Interrupt Enable Register"
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hexmask.long.word 0x00 16.--31. 1. " EM4WU ,EM4WU Interrupt Enable"
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hexmask.long.word 0x00 0.--15. 1. " EXT ,EXT Interrupt Enable"
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group.long 0x42C++0x3
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line.long 0x00 "EM4WUEN,EM4 Wake Up Enable Register"
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hexmask.long.word 0x00 16.--31. 1. " EM4WUEN ,EM4 Wake Up Enable"
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group.long 0x440++0x3
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line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
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bitfld.long 0x00 20. " ETMTD3PEN ,ETM Trace Data Pin Enable" "0,1"
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bitfld.long 0x00 19. " ETMTD2PEN ,ETM Trace Data Pin Enable" "0,1"
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bitfld.long 0x00 18. " ETMTD1PEN ,ETM Trace Data Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 17. " ETMTD0PEN ,ETM Trace Data Pin Enable" "0,1"
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bitfld.long 0x00 16. " ETMTCLKPEN ,ETM Trace Clock Pin Enable" "0,1"
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bitfld.long 0x00 4. " SWVPEN ,Serial Wire Viewer Output Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 3. " TDIPEN ,JTAG Test Debug Input Pin Enable" "0,1"
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bitfld.long 0x00 2. " TDOPEN ,JTAG Test Debug Output Pin Enable" "0,1"
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bitfld.long 0x00 1. " SWDIOTMSPEN ,Serial Wire Data and JTAG Test Mode Select Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 0. " SWCLKTCKPEN ,Serial Wire Clock and JTAG Test Clock Pin Enable" "0,1"
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group.long 0x444++0x3
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line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
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bitfld.long 0x00 0.--5. " SWVLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x448++0x3
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line.long 0x00 "ROUTELOC1,I/O Routing Location Register 1"
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bitfld.long 0x00 26.--31. " ETMTD3LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 20.--25. " ETMTD2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 14.--19. " ETMTD1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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textline " "
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bitfld.long 0x00 8.--13. " ETMTD0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--5. " ETMTCLKLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x450++0x3
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line.long 0x00 "INSENSE,Input Sense Register"
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bitfld.long 0x00 1. " EM4WU ,EM4WU Interrupt Sense Enable" "0,1"
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bitfld.long 0x00 0. " INT ,Interrupt Sense Enable" "0,1"
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group.long 0x454++0x3
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line.long 0x00 "LOCK,Configuration Lock Register"
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hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock Key"
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width 0x0B
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tree.end
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tree "PRS"
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base ad:0x400E6000
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width 11.
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wgroup.long 0x0++0x3
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line.long 0x00 "SWPULSE,Software Pulse Register"
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bitfld.long 0x00 11. " CH11PULSE ,Channel 11 Pulse Generation" "0,1"
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bitfld.long 0x00 10. " CH10PULSE ,Channel 10 Pulse Generation" "0,1"
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bitfld.long 0x00 9. " CH9PULSE ,Channel 9 Pulse Generation" "0,1"
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textline " "
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bitfld.long 0x00 8. " CH8PULSE ,Channel 8 Pulse Generation" "0,1"
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bitfld.long 0x00 7. " CH7PULSE ,Channel 7 Pulse Generation" "0,1"
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bitfld.long 0x00 6. " CH6PULSE ,Channel 6 Pulse Generation" "0,1"
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textline " "
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bitfld.long 0x00 5. " CH5PULSE ,Channel 5 Pulse Generation" "0,1"
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bitfld.long 0x00 4. " CH4PULSE ,Channel 4 Pulse Generation" "0,1"
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bitfld.long 0x00 3. " CH3PULSE ,Channel 3 Pulse Generation" "0,1"
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textline " "
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bitfld.long 0x00 2. " CH2PULSE ,Channel 2 Pulse Generation" "0,1"
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bitfld.long 0x00 1. " CH1PULSE ,Channel 1 Pulse Generation" "0,1"
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bitfld.long 0x00 0. " CH0PULSE ,Channel 0 Pulse Generation" "0,1"
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group.long 0x4++0x3
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line.long 0x00 "SWLEVEL,Software Level Register"
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bitfld.long 0x00 11. " CH11LEVEL ,Channel 11 Software Level" "0,1"
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bitfld.long 0x00 10. " CH10LEVEL ,Channel 10 Software Level" "0,1"
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bitfld.long 0x00 9. " CH9LEVEL ,Channel 9 Software Level" "0,1"
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textline " "
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bitfld.long 0x00 8. " CH8LEVEL ,Channel 8 Software Level" "0,1"
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bitfld.long 0x00 7. " CH7LEVEL ,Channel 7 Software Level" "0,1"
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bitfld.long 0x00 6. " CH6LEVEL ,Channel 6 Software Level" "0,1"
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textline " "
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bitfld.long 0x00 5. " CH5LEVEL ,Channel 5 Software Level" "0,1"
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bitfld.long 0x00 4. " CH4LEVEL ,Channel 4 Software Level" "0,1"
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bitfld.long 0x00 3. " CH3LEVEL ,Channel 3 Software Level" "0,1"
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textline " "
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bitfld.long 0x00 2. " CH2LEVEL ,Channel 2 Software Level" "0,1"
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bitfld.long 0x00 1. " CH1LEVEL ,Channel 1 Software Level" "0,1"
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bitfld.long 0x00 0. " CH0LEVEL ,Channel 0 Software Level" "0,1"
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group.long 0x8++0x3
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line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
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bitfld.long 0x00 11. " CH11PEN ,CH11 Pin Enable" "0,1"
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bitfld.long 0x00 10. " CH10PEN ,CH10 Pin Enable" "0,1"
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bitfld.long 0x00 9. " CH9PEN ,CH9 Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 8. " CH8PEN ,CH8 Pin Enable" "0,1"
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bitfld.long 0x00 7. " CH7PEN ,CH7 Pin Enable" "0,1"
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bitfld.long 0x00 6. " CH6PEN ,CH6 Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 5. " CH5PEN ,CH5 Pin Enable" "0,1"
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bitfld.long 0x00 4. " CH4PEN ,CH4 Pin Enable" "0,1"
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bitfld.long 0x00 3. " CH3PEN ,CH3 Pin Enable" "0,1"
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textline " "
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bitfld.long 0x00 2. " CH2PEN ,CH2 Pin Enable" "0,1"
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bitfld.long 0x00 1. " CH1PEN ,CH1 Pin Enable" "0,1"
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bitfld.long 0x00 0. " CH0PEN ,CH0 Pin Enable" "0,1"
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group.long 0x10++0x3
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line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
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bitfld.long 0x00 24.--29. " CH3LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--21. " CH2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--13. " CH1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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textline " "
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bitfld.long 0x00 0.--5. " CH0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x14++0x3
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line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
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bitfld.long 0x00 24.--29. " CH7LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--21. " CH6LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--13. " CH5LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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textline " "
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bitfld.long 0x00 0.--5. " CH4LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0x18++0x3
|
|
line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
|
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bitfld.long 0x00 24.--29. " CH11LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--21. " CH10LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--13. " CH9LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
textline " "
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bitfld.long 0x00 0.--5. " CH8LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
group.long 0x30++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 1.--4. " SEVONPRSSEL ,SEVONPRS PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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bitfld.long 0x00 0. " SEVONPRS ,Set Event on PRS" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "DMAREQ0,DMA Request 0 Register"
|
|
bitfld.long 0x00 6.--9. " PRSSEL ,DMA Request 0 PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "DMAREQ1,DMA Request 1 Register"
|
|
bitfld.long 0x00 6.--9. " PRSSEL ,DMA Request 1 PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "PEEK,PRS Channel Values"
|
|
bitfld.long 0x00 11. " CH11VAL ,Channel 11 Current Value" "0,1"
|
|
bitfld.long 0x00 10. " CH10VAL ,Channel 10 Current Value" "0,1"
|
|
bitfld.long 0x00 9. " CH9VAL ,Channel 9 Current Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CH8VAL ,Channel 8 Current Value" "0,1"
|
|
bitfld.long 0x00 7. " CH7VAL ,Channel 7 Current Value" "0,1"
|
|
bitfld.long 0x00 6. " CH6VAL ,Channel 6 Current Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH5VAL ,Channel 5 Current Value" "0,1"
|
|
bitfld.long 0x00 4. " CH4VAL ,Channel 4 Current Value" "0,1"
|
|
bitfld.long 0x00 3. " CH3VAL ,Channel 3 Current Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH2VAL ,Channel 2 Current Value" "0,1"
|
|
bitfld.long 0x00 1. " CH1VAL ,Channel 1 Current Value" "0,1"
|
|
bitfld.long 0x00 0. " CH0VAL ,Channel 0 Current Value" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "CH0_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "CH1_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "CH2_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "CH3_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "CH4_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CH5_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "CH6_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "CH7_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "CH8_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "CH9_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x78++0x3
|
|
line.long 0x00 "CH10_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "CH11_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. " ASYNC ,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. " ANDNEXT ,And Next" "0,1"
|
|
bitfld.long 0x00 27. " ORPREV ,Or Previous" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " INV ,Invert Channel" "0,1"
|
|
bitfld.long 0x00 25. " STRETCH ,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. " EDSEL ,Edge Detect Select" "OFF,POSEDGE,NEGEDGE,BOTHEDGES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " SOURCESEL ,Source Select"
|
|
bitfld.long 0x00 0.--2. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "LDMA"
|
|
base ad:0x400E2000
|
|
width 12.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,DMA Control Register"
|
|
bitfld.long 0x00 24.--26. " NUMFIXED ,Number of Fixed Priority Channels" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SYNCPRSCLREN ,Synchronization PRS Clear Enable"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SYNCPRSSETEN ,Synchronization PRS Set Enable"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x00 "STATUS,DMA Status Register"
|
|
bitfld.long 0x00 24.--28. " CHNUM ,Number of Channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " FIFOLEVEL ,FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " CHERROR ,Errant Channel Number" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " CHGRANT ,Granted Channel Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. " ANYREQ ,Any DMA Channel Request Pending" "0,1"
|
|
bitfld.long 0x00 0. " ANYBUSY ,Any DMA Channel Busy" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "SYNC,DMA Synchronization Trigger Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SYNCTRIG ,Synchronization Trigger"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "CHEN,DMA Channel Enable Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CHEN ,Channel Enables"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "CHBUSY,DMA Channel Busy Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BUSY ,Channels Busy"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "CHDONE,DMA Channel Linking Done Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CHDONE ,DMA Channel Linking or Done"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "DBGHALT,DMA Channel Debug Halt Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DBGHALT ,DMA Debug Halt"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x00 "SWREQ,DMA Channel Software Transfer Request Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SWREQ ,Software Transfer Requests"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "REQDIS,DMA Channel Request Disable Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REQDIS ,DMA Request Disables"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "REQPEND,DMA Channel Requests Pending Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REQPEND ,DMA Requests Pending"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x00 "LINKLOAD,DMA Channel Link Load Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LINKLOAD ,DMA Link Loads"
|
|
wgroup.long 0x40++0x3
|
|
line.long 0x00 "REQCLEAR,DMA Channel Request Clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REQCLEAR ,DMA Request Clear"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. " ERROR ,Transfer Error Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DONE ,DMA Structure Operation Done Interrupt Flag"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. " ERROR ,Set ERROR Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DONE ,Set DONE Interrupt Flag"
|
|
wgroup.long 0x68++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. " ERROR ,Clear ERROR Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DONE ,Clear DONE Interrupt Flag"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. " ERROR ,ERROR Interrupt Enable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DONE ,DONE Interrupt Enable"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "CH0_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "CH0_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "CH0_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "CH0_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "CH0_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "CH0_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x98++0x3
|
|
line.long 0x00 "CH0_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "CH1_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xB4++0x3
|
|
line.long 0x00 "CH1_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0xB8++0x3
|
|
line.long 0x00 "CH1_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0xBC++0x3
|
|
line.long 0x00 "CH1_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0xC0++0x3
|
|
line.long 0x00 "CH1_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0xC4++0x3
|
|
line.long 0x00 "CH1_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0xC8++0x3
|
|
line.long 0x00 "CH1_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0xE0++0x3
|
|
line.long 0x00 "CH2_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xE4++0x3
|
|
line.long 0x00 "CH2_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0xE8++0x3
|
|
line.long 0x00 "CH2_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0xEC++0x3
|
|
line.long 0x00 "CH2_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0xF0++0x3
|
|
line.long 0x00 "CH2_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0xF4++0x3
|
|
line.long 0x00 "CH2_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0xF8++0x3
|
|
line.long 0x00 "CH2_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "CH3_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "CH3_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x118++0x3
|
|
line.long 0x00 "CH3_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x11C++0x3
|
|
line.long 0x00 "CH3_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "CH3_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "CH3_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "CH3_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "CH4_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "CH4_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "CH4_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x14C++0x3
|
|
line.long 0x00 "CH4_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "CH4_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x154++0x3
|
|
line.long 0x00 "CH4_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x158++0x3
|
|
line.long 0x00 "CH4_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x170++0x3
|
|
line.long 0x00 "CH5_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x174++0x3
|
|
line.long 0x00 "CH5_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x178++0x3
|
|
line.long 0x00 "CH5_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x17C++0x3
|
|
line.long 0x00 "CH5_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x180++0x3
|
|
line.long 0x00 "CH5_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x184++0x3
|
|
line.long 0x00 "CH5_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x188++0x3
|
|
line.long 0x00 "CH5_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x00 "CH6_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1A4++0x3
|
|
line.long 0x00 "CH6_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x00 "CH6_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x1AC++0x3
|
|
line.long 0x00 "CH6_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x00 "CH6_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x1B4++0x3
|
|
line.long 0x00 "CH6_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x1B8++0x3
|
|
line.long 0x00 "CH6_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x1D0++0x3
|
|
line.long 0x00 "CH7_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. " SOURCESEL ,Source Select" "NONE,PRS,2,3,4,5,6,7,ADC0,9,VDAC0,11,USART0,USART1,USART2,15,LEUART0,17,18,19,I2C0,I2C1,22,23,TIMER0,TIMER1,WTIMER0,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,MSC,CRYPTO0,CSEN,LESENSE,CRYPTO1,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " SIGSEL ,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1D4++0x3
|
|
line.long 0x00 "CH7_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. " DSTINCSIGN ,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. " SRCINCSIGN ,Source Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 16.--17. " ARBSLOTS ,Arbitration Slot Number Select" "ONE,TWO,FOUR,EIGHT"
|
|
group.long 0x1D8++0x3
|
|
line.long 0x00 "CH7_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LOOPCNT ,Linked Structure Sequence Loop Counter"
|
|
group.long 0x1DC++0x3
|
|
line.long 0x00 "CH7_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. " DSTMODE ,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. " SRCMODE ,Source Addressing Mode" "0,1"
|
|
bitfld.long 0x00 28.--29. " DSTINC ,Destination Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " SIZE ,Unit Data Transfer Size" "BYTE,HALFWORD,WORD,3"
|
|
bitfld.long 0x00 24.--25. " SRCINC ,Source Address Increment Size" "ONE,TWO,FOUR,NONE"
|
|
bitfld.long 0x00 23. " IGNORESREQ ,Ignore Sreq" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DECLOOPCNT ,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. " REQMODE ,DMA Request Transfer Mode Select" "0,1"
|
|
bitfld.long 0x00 20. " DONEIFSEN ,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " BLOCKSIZE ,Block Transfer Size" "UNIT1,UNIT2,UNIT3,UNIT4,UNIT6,UNIT8,6,UNIT16,8,UNIT32,UNIT64,UNIT128,UNIT256,UNIT512,UNIT1024,ALL"
|
|
bitfld.long 0x00 15. " BYTESWAP ,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. " XFERCNT ,DMA Unit Data Transfer Count"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STRUCTREQ ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. " STRUCTTYPE ,DMA Structure Type" "TRANSFER,SYNCHRONIZE,WRITE,3"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x00 "CH7_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRCADDR ,Source Data Address"
|
|
group.long 0x1E4++0x3
|
|
line.long 0x00 "CH7_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " DSTADDR ,Destination Data Address"
|
|
group.long 0x1E8++0x3
|
|
line.long 0x00 "CH7_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. " LINKADDR ,Link Structure Address"
|
|
bitfld.long 0x00 1. " LINK ,Link Next Structure" "0,1"
|
|
rbitfld.long 0x00 0. " LINKMODE ,Link Structure Addressing Mode" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "FPUEH"
|
|
base ad:0x400E1000
|
|
width 5.
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 5. " FPIXC ,FPU inexact exception" "0,1"
|
|
bitfld.long 0x00 4. " FPIDC ,FPU input denormal exception" "0,1"
|
|
bitfld.long 0x00 3. " FPOFC ,FPU overflow exception" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FPUFC ,FPU underflow exception" "0,1"
|
|
bitfld.long 0x00 1. " FPDZC ,FPU divide-by-zero exception" "0,1"
|
|
bitfld.long 0x00 0. " FPIOC ,FPU invalid operation" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 5. " FPIXC ,Set FPIXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " FPIDC ,Set FPIDC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " FPOFC ,Set FPOFC Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FPUFC ,Set FPUFC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " FPDZC ,Set FPDZC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " FPIOC ,Set FPIOC Interrupt Flag" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 5. " FPIXC ,Clear FPIXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " FPIDC ,Clear FPIDC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " FPOFC ,Clear FPOFC Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FPUFC ,Clear FPUFC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " FPDZC ,Clear FPDZC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " FPIOC ,Clear FPIOC Interrupt Flag" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. " FPIXC ,FPIXC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " FPIDC ,FPIDC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " FPOFC ,FPOFC Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FPUFC ,FPUFC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " FPDZC ,FPDZC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " FPIOC ,FPIOC Interrupt Enable" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPCRC"
|
|
base ad:0x4001C000
|
|
width 16.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 13. " AUTOINIT ,Auto Init Enable" "0,1"
|
|
bitfld.long 0x00 10. " BYTEREVERSE ,Byte Reverse Mode" "0,1"
|
|
bitfld.long 0x00 9. " BITREVERSE ,Byte-level Bit Reverse Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BYTEMODE ,Byte Mode Enable" "0,1"
|
|
bitfld.long 0x00 4. " POLYSEL ,Polynomial Select" "0,1"
|
|
bitfld.long 0x00 0. " EN ,CRC Functionality Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " INIT ,Initialization Enable" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "INIT,CRC Init Value"
|
|
hexmask.long 0x00 0.--31. 1. " INIT ,CRC Initialization Value"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "POLY,CRC Polynomial Value"
|
|
hexmask.long.word 0x00 0.--15. 1. " POLY ,CRC Polynomial Value"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "INPUTDATA,Input 32-bit Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " INPUTDATA ,Input Data for 32-bit"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "INPUTDATAHWORD,Input 16-bit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INPUTDATAHWORD ,Input Data for 16-bit"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "INPUTDATABYTE,Input 8-bit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INPUTDATABYTE ,Input Data for 8-bit"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "DATA,CRC Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,CRC Data Register"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "DATAREV,CRC Data Reverse Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATAREV ,Data Reverse Value"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "DATABYTEREV,CRC Data Byte Reverse Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATABYTEREV ,Data Byte Reverse Value"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER0"
|
|
base ad:0x40018000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "0,1"
|
|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,3"
|
|
bitfld.long 0x00 14. " DISSYNCOUT ,Disable Timer From Start/Stop/Reload Other Synchronized Timers" "0,1"
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "0,1"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "0,1"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 27. " CCPOL3 ,CC3 Polarity" "0,1"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "0,1"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "0,1"
|
|
bitfld.long 0x00 19. " ICV3 ,CC3 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 11. " CCVBV3 ,CC3 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "0,1"
|
|
bitfld.long 0x00 1. " DIR ,Direction" "0,1"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,CC Channel 3 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Direction Change Detect Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Set ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Set ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Set ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Set ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Set CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Set CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Set CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Set DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Set UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Clear ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Clear ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Clear ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Clear ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Clear CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Clear CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Clear CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Clear DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Clear UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,ICBOF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,ICBOF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,ICBOF1 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,ICBOF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC2 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,DIRCHG Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " OF ,OF Interrupt Enable" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "TOP,Counter Top Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOP ,Counter Top Value"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOPB ,Counter Top Value Buffer"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CNT ,Counter Value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LOCK,TIMER Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMERLOCKKEY ,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 10. " CDTI2PEN ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 9. " CDTI1PEN ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 8. " CDTI0PEN ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CC3PEN ,CC Channel 3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. " CC2PEN ,CC Channel 2 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " CC1PEN ,CC Channel 1 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CC0PEN ,CC Channel 0 Pin Enable" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CC3LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--21. " CC2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 8.--13. " CC1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
textline " "
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|
bitfld.long 0x00 0.--5. " CC0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
group.long 0x3C++0x3
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|
line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
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|
bitfld.long 0x00 16.--21. " CDTI2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 8.--13. " CDTI1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--5. " CDTI0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
group.long 0x60++0x3
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line.long 0x00 "CC0_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
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bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
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bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
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|
textline " "
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bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
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bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
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bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
textline " "
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bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
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textline " "
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bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
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bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
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bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
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group.long 0x64++0x3
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line.long 0x00 "CC0_CCV,CC Channel Value Register"
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|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
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rgroup.long 0x68++0x3
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line.long 0x00 "CC0_CCVP,CC Channel Value Peek Register"
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|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
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group.long 0x6C++0x3
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|
line.long 0x00 "CC0_CCVB,CC Channel Buffer Register"
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|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
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|
group.long 0x70++0x3
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|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
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|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
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bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
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|
textline " "
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bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
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|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
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|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
textline " "
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bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
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bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
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bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
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|
group.long 0x74++0x3
|
|
line.long 0x00 "CC1_CCV,CC Channel Value Register"
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|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
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|
rgroup.long 0x78++0x3
|
|
line.long 0x00 "CC1_CCVP,CC Channel Value Peek Register"
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|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
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|
group.long 0x7C++0x3
|
|
line.long 0x00 "CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
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|
group.long 0x80++0x3
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|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
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|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
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|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
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|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
textline " "
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bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
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|
textline " "
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bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
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bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
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bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
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group.long 0x84++0x3
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line.long 0x00 "CC2_CCV,CC Channel Value Register"
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hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
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rgroup.long 0x88++0x3
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line.long 0x00 "CC2_CCVP,CC Channel Value Peek Register"
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hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
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group.long 0x8C++0x3
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line.long 0x00 "CC2_CCVB,CC Channel Buffer Register"
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hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
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group.long 0x90++0x3
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line.long 0x00 "CC3_CTRL,CC Channel Control Register"
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bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
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bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
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bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
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textline " "
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bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
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bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
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bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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textline " "
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bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
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bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
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textline " "
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bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
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bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
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bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
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group.long 0x94++0x3
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line.long 0x00 "CC3_CCV,CC Channel Value Register"
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hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
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rgroup.long 0x98++0x3
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line.long 0x00 "CC3_CCVP,CC Channel Value Peek Register"
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hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
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group.long 0x9C++0x3
|
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line.long 0x00 "CC3_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
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group.long 0xA0++0x3
|
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line.long 0x00 "DTCTRL,DTI Control Register"
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bitfld.long 0x00 24. " DTPRSEN ,DTI PRS Source Enable" "0,1"
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bitfld.long 0x00 10. " DTFATS ,DTI Fault Action on Timer Stop" "0,1"
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bitfld.long 0x00 9. " DTAR ,DTI Always Run" "0,1"
|
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textline " "
|
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bitfld.long 0x00 4.--7. " DTPRSSEL ,DTI PRS Source Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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bitfld.long 0x00 3. " DTCINV ,DTI Complementary Output Invert" "0,1"
|
|
bitfld.long 0x00 2. " DTIPOL ,DTI Inactive Polarity" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 1. " DTDAS ,DTI Automatic Start-up Functionality" "0,1"
|
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bitfld.long 0x00 0. " DTEN ,DTI Enable" "0,1"
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group.long 0xA4++0x3
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line.long 0x00 "DTTIME,DTI Time Control Register"
|
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bitfld.long 0x00 16.--21. " DTFALLT ,DTI Fall-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 8.--13. " DTRISET ,DTI Rise-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--3. " DTPRESC ,DTI Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
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group.long 0xA8++0x3
|
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line.long 0x00 "DTFC,DTI Fault Configuration Register"
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bitfld.long 0x00 27. " DTLOCKUPFEN ,DTI Lockup Fault Enable" "0,1"
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bitfld.long 0x00 26. " DTDBGFEN ,DTI Debugger Fault Enable" "0,1"
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bitfld.long 0x00 25. " DTPRS1FEN ,DTI PRS 1 Fault Enable" "0,1"
|
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textline " "
|
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bitfld.long 0x00 24. " DTPRS0FEN ,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x00 16.--17. " DTFA ,DTI Fault Action" "NONE,INACTIVE,CLEAR,TRISTATE"
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bitfld.long 0x00 8.--11. " DTPRS1FSEL ,DTI PRS Fault Source 1 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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textline " "
|
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bitfld.long 0x00 0.--3. " DTPRS0FSEL ,DTI PRS Fault Source 0 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
group.long 0xAC++0x3
|
|
line.long 0x00 "DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x00 5. " DTOGCDTI2EN ,DTI CDTI2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 4. " DTOGCDTI1EN ,DTI CDTI1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 3. " DTOGCDTI0EN ,DTI CDTI0 Output Generation Enable" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 2. " DTOGCC2EN ,DTI CC2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 1. " DTOGCC1EN ,DTI CC1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 0. " DTOGCC0EN ,DTI CC0 Output Generation Enable" "0,1"
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x00 "DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. " DTLOCKUPF ,DTI Lockup Fault" "0,1"
|
|
bitfld.long 0x00 2. " DTDBGF ,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1F ,DTI PRS 1 Fault" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 0. " DTPRS0F ,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xB4++0x3
|
|
line.long 0x00 "DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. " TLOCKUPFC ,DTI Lockup Fault Clear" "0,1"
|
|
bitfld.long 0x00 2. " DTDBGFC ,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1FC ,DTI PRS1 Fault Clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTPRS0FC ,DTI PRS0 Fault Clear" "0,1"
|
|
group.long 0xB8++0x3
|
|
line.long 0x00 "DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,DTI Lock Key"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER1"
|
|
base ad:0x40018400
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "0,1"
|
|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,3"
|
|
bitfld.long 0x00 14. " DISSYNCOUT ,Disable Timer From Start/Stop/Reload Other Synchronized Timers" "0,1"
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "0,1"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "0,1"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 27. " CCPOL3 ,CC3 Polarity" "0,1"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "0,1"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "0,1"
|
|
bitfld.long 0x00 19. " ICV3 ,CC3 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 11. " CCVBV3 ,CC3 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "0,1"
|
|
bitfld.long 0x00 1. " DIR ,Direction" "0,1"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,CC Channel 3 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Direction Change Detect Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Set ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Set ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Set ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Set ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Set CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Set CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Set CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Set DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Set UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Clear ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Clear ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Clear ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Clear ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Clear CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Clear CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Clear CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Clear DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Clear UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,ICBOF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,ICBOF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,ICBOF1 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,ICBOF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC2 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,DIRCHG Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " OF ,OF Interrupt Enable" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "TOP,Counter Top Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOP ,Counter Top Value"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOPB ,Counter Top Value Buffer"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CNT ,Counter Value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LOCK,TIMER Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMERLOCKKEY ,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 10. " CDTI2PEN ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 9. " CDTI1PEN ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 8. " CDTI0PEN ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CC3PEN ,CC Channel 3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. " CC2PEN ,CC Channel 2 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " CC1PEN ,CC Channel 1 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CC0PEN ,CC Channel 0 Pin Enable" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CC3LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " CC2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CC1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CC0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
|
|
bitfld.long 0x00 16.--21. " CDTI2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CDTI1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CDTI0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "CC0_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CC0_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x00 "CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "CC1_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x78++0x3
|
|
line.long 0x00 "CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "CC2_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x00 "CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "CC3_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "CC3_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x00 "CC3_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x9C++0x3
|
|
line.long 0x00 "CC3_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0xA0++0x3
|
|
line.long 0x00 "DTCTRL,DTI Control Register"
|
|
bitfld.long 0x00 24. " DTPRSEN ,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x00 10. " DTFATS ,DTI Fault Action on Timer Stop" "0,1"
|
|
bitfld.long 0x00 9. " DTAR ,DTI Always Run" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DTPRSSEL ,DTI PRS Source Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 3. " DTCINV ,DTI Complementary Output Invert" "0,1"
|
|
bitfld.long 0x00 2. " DTIPOL ,DTI Inactive Polarity" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTDAS ,DTI Automatic Start-up Functionality" "0,1"
|
|
bitfld.long 0x00 0. " DTEN ,DTI Enable" "0,1"
|
|
group.long 0xA4++0x3
|
|
line.long 0x00 "DTTIME,DTI Time Control Register"
|
|
bitfld.long 0x00 16.--21. " DTFALLT ,DTI Fall-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " DTRISET ,DTI Rise-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " DTPRESC ,DTI Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
|
|
group.long 0xA8++0x3
|
|
line.long 0x00 "DTFC,DTI Fault Configuration Register"
|
|
bitfld.long 0x00 27. " DTLOCKUPFEN ,DTI Lockup Fault Enable" "0,1"
|
|
bitfld.long 0x00 26. " DTDBGFEN ,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x00 25. " DTPRS1FEN ,DTI PRS 1 Fault Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DTPRS0FEN ,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x00 16.--17. " DTFA ,DTI Fault Action" "NONE,INACTIVE,CLEAR,TRISTATE"
|
|
bitfld.long 0x00 8.--11. " DTPRS1FSEL ,DTI PRS Fault Source 1 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DTPRS0FSEL ,DTI PRS Fault Source 0 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
group.long 0xAC++0x3
|
|
line.long 0x00 "DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x00 5. " DTOGCDTI2EN ,DTI CDTI2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 4. " DTOGCDTI1EN ,DTI CDTI1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 3. " DTOGCDTI0EN ,DTI CDTI0 Output Generation Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DTOGCC2EN ,DTI CC2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 1. " DTOGCC1EN ,DTI CC1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 0. " DTOGCC0EN ,DTI CC0 Output Generation Enable" "0,1"
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x00 "DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. " DTLOCKUPF ,DTI Lockup Fault" "0,1"
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|
bitfld.long 0x00 2. " DTDBGF ,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1F ,DTI PRS 1 Fault" "0,1"
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|
textline " "
|
|
bitfld.long 0x00 0. " DTPRS0F ,DTI PRS 0 Fault" "0,1"
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|
wgroup.long 0xB4++0x3
|
|
line.long 0x00 "DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. " TLOCKUPFC ,DTI Lockup Fault Clear" "0,1"
|
|
bitfld.long 0x00 2. " DTDBGFC ,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1FC ,DTI PRS1 Fault Clear" "0,1"
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|
textline " "
|
|
bitfld.long 0x00 0. " DTPRS0FC ,DTI PRS0 Fault Clear" "0,1"
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|
group.long 0xB8++0x3
|
|
line.long 0x00 "DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,DTI Lock Key"
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|
width 0x0B
|
|
tree.end
|
|
tree "WTIMER0"
|
|
base ad:0x4001A000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 29. " RSSCOIST ,Reload-Start Sets Compare Output Initial State" "0,1"
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|
bitfld.long 0x00 28. " ATI ,Always Track Inputs" "0,1"
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|
bitfld.long 0x00 24.--27. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
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|
textline " "
|
|
bitfld.long 0x00 16.--17. " CLKSEL ,Clock Source Select" "PRESCHFPERCLK,CC1,TIMEROUF,3"
|
|
bitfld.long 0x00 14. " DISSYNCOUT ,Disable Timer From Start/Stop/Reload Other Synchronized Timers" "0,1"
|
|
bitfld.long 0x00 13. " X2CNT ,2x Count Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " FALLA ,Timer Falling Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 8.--9. " RISEA ,Timer Rising Input Edge Action" "NONE,START,STOP,RELOADSTART"
|
|
bitfld.long 0x00 7. " DMACLRACT ,DMA Request Clear on Active" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 5. " QDM ,Quadrature Decoder Mode Selection" "0,1"
|
|
bitfld.long 0x00 4. " OSMEN ,One-shot Mode Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SYNC ,Timer Start/Stop/Reload Synchronization" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,Timer Mode" "UP,DOWN,UPDOWN,QDEC"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. " STOP ,Stop Timer" "0,1"
|
|
bitfld.long 0x00 0. " START ,Start Timer" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 27. " CCPOL3 ,CC3 Polarity" "0,1"
|
|
bitfld.long 0x00 26. " CCPOL2 ,CC2 Polarity" "0,1"
|
|
bitfld.long 0x00 25. " CCPOL1 ,CC1 Polarity" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CCPOL0 ,CC0 Polarity" "0,1"
|
|
bitfld.long 0x00 19. " ICV3 ,CC3 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 18. " ICV2 ,CC2 Input Capture Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ICV1 ,CC1 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 16. " ICV0 ,CC0 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 11. " CCVBV3 ,CC3 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CCVBV2 ,CC2 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 9. " CCVBV1 ,CC1 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 8. " CCVBV0 ,CC0 CCVB Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TOPBV ,TOPB Valid" "0,1"
|
|
bitfld.long 0x00 1. " DIR ,Direction" "0,1"
|
|
bitfld.long 0x00 0. " RUNNING ,Running" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,CC Channel 3 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC Channel 2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC Channel 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Direction Change Detect Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Set ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Set ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Set ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Set ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Set CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Set CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Set CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Set DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Set UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,Clear ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,Clear ICBOF2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,Clear ICBOF1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,Clear ICBOF0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,Clear CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,Clear CC2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,Clear CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,Clear DIRCHG Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,Clear UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 11. " ICBOF3 ,ICBOF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " ICBOF2 ,ICBOF2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " ICBOF1 ,ICBOF1 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ICBOF0 ,ICBOF0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " CC3 ,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CC2 ,CC2 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CC1 ,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " CC0 ,CC0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " DIRCHG ,DIRCHG Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " UF ,UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " OF ,OF Interrupt Enable" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "TOP,Counter Top Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOP ,Counter Top Value"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " TOPB ,Counter Top Value Buffer"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CNT ,Counter Value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "LOCK,TIMER Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMERLOCKKEY ,Timer Lock Key"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 10. " CDTI2PEN ,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 9. " CDTI1PEN ,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 8. " CDTI0PEN ,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CC3PEN ,CC Channel 3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. " CC2PEN ,CC Channel 2 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " CC1PEN ,CC Channel 1 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CC0PEN ,CC Channel 0 Pin Enable" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CC3LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " CC2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CC1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CC0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
|
|
bitfld.long 0x00 16.--21. " CDTI2LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CDTI1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CDTI0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "CC0_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CC0_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x00 "CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "CC1_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x78++0x3
|
|
line.long 0x00 "CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "CC2_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x88++0x3
|
|
line.long 0x00 "CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0x90++0x3
|
|
line.long 0x00 "CC3_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. " FILT ,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. " INSEL ,Input Selection" "0,1"
|
|
bitfld.long 0x00 28. " PRSCONF ,PRS Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " ICEVCTRL ,Input Capture Event Control" "EVERYEDGE,EVERYSECONDEDGE,RISING,FALLING"
|
|
bitfld.long 0x00 24.--25. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 16.--19. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CUFOA ,Counter Underflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 10.--11. " COFOA ,Counter Overflow Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
bitfld.long 0x00 8.--9. " CMOA ,Compare Match Output Action" "NONE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COIST ,Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 2. " OUTINV ,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,PWM"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "CC3_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,CC Channel Value"
|
|
rgroup.long 0x98++0x3
|
|
line.long 0x00 "CC3_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVP ,CC Channel Value Peek"
|
|
group.long 0x9C++0x3
|
|
line.long 0x00 "CC3_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCVB ,CC Channel Value Buffer"
|
|
group.long 0xA0++0x3
|
|
line.long 0x00 "DTCTRL,DTI Control Register"
|
|
bitfld.long 0x00 24. " DTPRSEN ,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x00 10. " DTFATS ,DTI Fault Action on Timer Stop" "0,1"
|
|
bitfld.long 0x00 9. " DTAR ,DTI Always Run" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " DTPRSSEL ,DTI PRS Source Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 3. " DTCINV ,DTI Complementary Output Invert" "0,1"
|
|
bitfld.long 0x00 2. " DTIPOL ,DTI Inactive Polarity" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DTDAS ,DTI Automatic Start-up Functionality" "0,1"
|
|
bitfld.long 0x00 0. " DTEN ,DTI Enable" "0,1"
|
|
group.long 0xA4++0x3
|
|
line.long 0x00 "DTTIME,DTI Time Control Register"
|
|
bitfld.long 0x00 16.--21. " DTFALLT ,DTI Fall-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " DTRISET ,DTI Rise-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " DTPRESC ,DTI Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,11,12,13,14,15"
|
|
group.long 0xA8++0x3
|
|
line.long 0x00 "DTFC,DTI Fault Configuration Register"
|
|
bitfld.long 0x00 27. " DTLOCKUPFEN ,DTI Lockup Fault Enable" "0,1"
|
|
bitfld.long 0x00 26. " DTDBGFEN ,DTI Debugger Fault Enable" "0,1"
|
|
bitfld.long 0x00 25. " DTPRS1FEN ,DTI PRS 1 Fault Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " DTPRS0FEN ,DTI PRS 0 Fault Enable" "0,1"
|
|
bitfld.long 0x00 16.--17. " DTFA ,DTI Fault Action" "NONE,INACTIVE,CLEAR,TRISTATE"
|
|
bitfld.long 0x00 8.--11. " DTPRS1FSEL ,DTI PRS Fault Source 1 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DTPRS0FSEL ,DTI PRS Fault Source 0 Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0xAC++0x3
|
|
line.long 0x00 "DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x00 5. " DTOGCDTI2EN ,DTI CDTI2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 4. " DTOGCDTI1EN ,DTI CDTI1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 3. " DTOGCDTI0EN ,DTI CDTI0 Output Generation Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DTOGCC2EN ,DTI CC2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 1. " DTOGCC1EN ,DTI CC1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 0. " DTOGCC0EN ,DTI CC0 Output Generation Enable" "0,1"
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x00 "DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. " DTLOCKUPF ,DTI Lockup Fault" "0,1"
|
|
bitfld.long 0x00 2. " DTDBGF ,DTI Debugger Fault" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1F ,DTI PRS 1 Fault" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTPRS0F ,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xB4++0x3
|
|
line.long 0x00 "DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. " TLOCKUPFC ,DTI Lockup Fault Clear" "0,1"
|
|
bitfld.long 0x00 2. " DTDBGFC ,DTI Debugger Fault Clear" "0,1"
|
|
bitfld.long 0x00 1. " DTPRS1FC ,DTI PRS1 Fault Clear" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DTPRS0FC ,DTI PRS0 Fault Clear" "0,1"
|
|
group.long 0xB8++0x3
|
|
line.long 0x00 "DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,DTI Lock Key"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USART0"
|
|
base ad:0x40010000
|
|
width 12.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " SMSDELAY ,Synchronous Master Sample Delay" "0,1"
|
|
bitfld.long 0x00 30. " MVDIS ,Majority Vote Disable" "0,1"
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BYTESWAP ,Byteswap in Double Accesses" "0,1"
|
|
bitfld.long 0x00 25. " SSSEARLY ,Synchronous Slave Setup Early" "0,1"
|
|
bitfld.long 0x00 24. " ERRSTX ,Disable TX on Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ERRSRX ,Disable RX on Error" "0,1"
|
|
bitfld.long 0x00 22. " ERRSDMA ,Halt DMA on Error" "0,1"
|
|
bitfld.long 0x00 21. " BIT8DV ,Bit 8 Default Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SKIPPERRF ,Skip Parity Error Frames" "0,1"
|
|
bitfld.long 0x00 19. " SCRETRANS ,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x00 18. " SCMODE ,SmartCard Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " AUTOTRI ,Automatic TX Tristate" "0,1"
|
|
bitfld.long 0x00 16. " AUTOCS ,Automatic Chip Select" "0,1"
|
|
bitfld.long 0x00 15. " CSINV ,Chip Select Invert" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXINV ,Transmitter Output Invert" "0,1"
|
|
bitfld.long 0x00 13. " RXINV ,Receiver Input Invert" "0,1"
|
|
bitfld.long 0x00 12. " TXBIL ,TX Buffer Interrupt Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CSMA ,Action on Slave-Select in Master Mode" "0,1"
|
|
bitfld.long 0x00 10. " MSBF ,Most Significant Bit First" "0,1"
|
|
bitfld.long 0x00 9. " CLKPHA ,Clock Edge for Setup/Sample" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKPOL ,Clock Polarity" "0,1"
|
|
bitfld.long 0x00 5.--6. " OVS ,Oversampling" "X16,X8,X6,X4"
|
|
bitfld.long 0x00 4. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MPM ,Multi-Processor Mode" "0,1"
|
|
bitfld.long 0x00 2. " CCEN ,Collision Check Enable" "0,1"
|
|
bitfld.long 0x00 1. " LOOPBK ,Loopback Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNC ,USART Synchronous Mode" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "FRAME,USART Frame Format Register"
|
|
bitfld.long 0x00 12.--13. " STOPBITS ,Stop-Bit Mode" "HALF,ONE,ONEANDAHALF,TWO"
|
|
bitfld.long 0x00 8.--9. " PARITY ,Parity-Bit Mode" "NONE,1,EVEN,ODD"
|
|
bitfld.long 0x00 0.--3. " DATABITS ,Data-Bit Mode" "0,FOUR,FIVE,SIX,SEVEN,EIGHT,NINE,TEN,ELEVEN,TWELVE,THIRTEEN,FOURTEEN,FIFTEEN,SIXTEEN,14,15"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "TRIGCTRL,USART Trigger Control Register"
|
|
bitfld.long 0x00 16.--19. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 12. " RXATX2EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times" "0,1"
|
|
bitfld.long 0x00 11. " RXATX1EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXATX0EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times" "0,1"
|
|
bitfld.long 0x00 9. " TXARX2EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL" "0,1"
|
|
bitfld.long 0x00 8. " TXARX1EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXARX0EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL" "0,1"
|
|
bitfld.long 0x00 6. " AUTOTXTEN ,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0x00 5. " TXTEN ,Transmit Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXTEN ,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. " CLEARRX ,Clear RX" "0,1"
|
|
bitfld.long 0x00 10. " CLEARTX ,Clear TX" "0,1"
|
|
bitfld.long 0x00 9. " TXTRIDIS ,Transmitter Tristate Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXTRIEN ,Transmitter Tristate Enable" "0,1"
|
|
bitfld.long 0x00 7. " RXBLOCKDIS ,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x00 6. " RXBLOCKEN ,Receiver Block Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MASTERDIS ,Master Disable" "0,1"
|
|
bitfld.long 0x00 4. " MASTEREN ,Master Enable" "0,1"
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "0,1"
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "0,1"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "STATUS,USART Status Register"
|
|
bitfld.long 0x00 16.--17. " TXBUFCNT ,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x00 14. " TIMERRESTARTED ,The USART Timer Restarted Itself" "0,1"
|
|
bitfld.long 0x00 13. " TXIDLE ,TX Idle" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RXFULLRIGHT ,RX Full of Right Data" "0,1"
|
|
bitfld.long 0x00 11. " RXDATAVRIGHT ,RX Data Right" "0,1"
|
|
bitfld.long 0x00 10. " TXBSRIGHT ,TX Buffer Expects Single Right Data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXBDRIGHT ,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "0,1"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "0,1"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "0,1"
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "0,1"
|
|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "0,1"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
bitfld.long 0x00 31. " AUTOBAUDEN ,AUTOBAUD Detection Enable" "0,1"
|
|
hexmask.long.tbyte 0x00 3.--22. 1. " DIV ,Fractional Clock Divider"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "RXDATAX,RX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " FERR ,Data Framing Error" "0,1"
|
|
bitfld.long 0x00 14. " PERR ,Data Parity Error" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RXDATA,RX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RXDOUBLEX,RX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " FERR1 ,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x00 30. " PERR1 ,Data Parity Error 1" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATA1 ,RX Data 1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FERR0 ,Data Framing Error 0" "0,1"
|
|
bitfld.long 0x00 14. " PERR0 ,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "RXDOUBLE,RX FIFO Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "RXDATAXP,RX Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. " FERRP ,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x00 14. " PERRP ,Data Parity Error Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP ,RX Data Peek"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
|
|
bitfld.long 0x00 31. " FERRP1 ,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x00 30. " PERRP1 ,Data Parity Error 1 Peek" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATAP1 ,RX Data 1 Peek"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FERRP0 ,Data Framing Error 0 Peek" "0,1"
|
|
bitfld.long 0x00 14. " PERRP0 ,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP0 ,RX Data 0 Peek"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATAX ,TX Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " RXENAT1 ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 30. " TXDISAT1 ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 29. " TXBREAK1 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TXTRIAT1 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 27. " UBRXAT1 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " TXDATA1 ,TX Data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXENAT0 ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT0 ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK0 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT0 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT0 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATA0 ,TX Data"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,TX Data"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Timer Comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Timer Comparator 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Timer Comparator 0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,TX Idle Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Slave-Select in Master Mode Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Parity Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TX Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RX Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RX Buffer Full Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Set TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Set TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Set TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Set TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Set CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Set SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Set MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Set FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Set PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Set TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Set RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Set RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Clear TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Clear TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Clear TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Clear TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Clear CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Clear SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Clear MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Clear FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Clear PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Clear TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Clear RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Clear RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,TCMP2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,TCMP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,TCMP0 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,TXIDLE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,CCF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,SSM Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,MPAF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,FERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,PERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TXUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RXFULL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TXC Interrupt Enable" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "IRCTRL,IrDA Control Register"
|
|
bitfld.long 0x00 8.--11. " IRPRSSEL ,IrDA PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " IRPRSEN ,IrDA PRS Channel Enable" "0,1"
|
|
bitfld.long 0x00 3. " IRFILT ,IrDA RX Filter" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IRPW ,IrDA TX Pulse Width" "ONE,TWO,THREE,FOUR"
|
|
bitfld.long 0x00 0. " IREN ,Enable IrDA Module" "0,1"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "INPUT,USART Input Register"
|
|
bitfld.long 0x00 15. " CLKPRS ,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x00 8.--11. " CLKPRSSEL ,CLK PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " RXPRS ,PRS RX Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. " FORMAT ,I2S Word Format" "W32D32,W32D24M,W32D24,W32D16,W32D8,W16D16,W16D8,W8D8"
|
|
bitfld.long 0x00 4. " DELAY ,Delay on I2S Data" "0,1"
|
|
bitfld.long 0x00 3. " DMASPLIT ,Separate DMA Request for Left/Right Data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " JUSTIFY ,Justification of I2S Data" "0,1"
|
|
bitfld.long 0x00 1. " MONO ,Stero or Mono" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable I2S Mode" "0,1"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "TIMING,Timing Register"
|
|
bitfld.long 0x00 28.--30. " CSHOLD ,Chip Select Hold" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 24.--26. " ICS ,Inter-character Spacing" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 20.--22. " CSSETUP ,Chip Select Setup" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TXDELAY ,TX Frame Start Delay" "DISABLE,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CTRLX,Control Register Extended"
|
|
bitfld.long 0x00 3. " RTSINV ,RTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 2. " CTSEN ,CTS Function Enabled" "0,1"
|
|
bitfld.long 0x00 1. " CTSINV ,CTS Pin Inversion" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DBGHALT ,Debug Halt" "0,1"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "TIMECMP0,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP0" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 0" "TCMP0,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 0"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "TIMECMP1,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP1" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 1" "TCMP1,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 1"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "TIMECMP2,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP2" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 2" "TCMP2,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 2"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 5. " RTSPEN ,RTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. " CTSPEN ,CTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSPEN ,CS Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "0,1"
|
|
group.long 0x78++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CLKLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " CSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " TXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " RXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " RTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40010400
|
|
width 12.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " SMSDELAY ,Synchronous Master Sample Delay" "0,1"
|
|
bitfld.long 0x00 30. " MVDIS ,Majority Vote Disable" "0,1"
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BYTESWAP ,Byteswap in Double Accesses" "0,1"
|
|
bitfld.long 0x00 25. " SSSEARLY ,Synchronous Slave Setup Early" "0,1"
|
|
bitfld.long 0x00 24. " ERRSTX ,Disable TX on Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ERRSRX ,Disable RX on Error" "0,1"
|
|
bitfld.long 0x00 22. " ERRSDMA ,Halt DMA on Error" "0,1"
|
|
bitfld.long 0x00 21. " BIT8DV ,Bit 8 Default Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SKIPPERRF ,Skip Parity Error Frames" "0,1"
|
|
bitfld.long 0x00 19. " SCRETRANS ,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x00 18. " SCMODE ,SmartCard Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " AUTOTRI ,Automatic TX Tristate" "0,1"
|
|
bitfld.long 0x00 16. " AUTOCS ,Automatic Chip Select" "0,1"
|
|
bitfld.long 0x00 15. " CSINV ,Chip Select Invert" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXINV ,Transmitter Output Invert" "0,1"
|
|
bitfld.long 0x00 13. " RXINV ,Receiver Input Invert" "0,1"
|
|
bitfld.long 0x00 12. " TXBIL ,TX Buffer Interrupt Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CSMA ,Action on Slave-Select in Master Mode" "0,1"
|
|
bitfld.long 0x00 10. " MSBF ,Most Significant Bit First" "0,1"
|
|
bitfld.long 0x00 9. " CLKPHA ,Clock Edge for Setup/Sample" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKPOL ,Clock Polarity" "0,1"
|
|
bitfld.long 0x00 5.--6. " OVS ,Oversampling" "X16,X8,X6,X4"
|
|
bitfld.long 0x00 4. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MPM ,Multi-Processor Mode" "0,1"
|
|
bitfld.long 0x00 2. " CCEN ,Collision Check Enable" "0,1"
|
|
bitfld.long 0x00 1. " LOOPBK ,Loopback Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNC ,USART Synchronous Mode" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "FRAME,USART Frame Format Register"
|
|
bitfld.long 0x00 12.--13. " STOPBITS ,Stop-Bit Mode" "HALF,ONE,ONEANDAHALF,TWO"
|
|
bitfld.long 0x00 8.--9. " PARITY ,Parity-Bit Mode" "NONE,1,EVEN,ODD"
|
|
bitfld.long 0x00 0.--3. " DATABITS ,Data-Bit Mode" "0,FOUR,FIVE,SIX,SEVEN,EIGHT,NINE,TEN,ELEVEN,TWELVE,THIRTEEN,FOURTEEN,FIFTEEN,SIXTEEN,14,15"
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|
group.long 0x8++0x3
|
|
line.long 0x00 "TRIGCTRL,USART Trigger Control Register"
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|
bitfld.long 0x00 16.--19. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
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|
bitfld.long 0x00 12. " RXATX2EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times" "0,1"
|
|
bitfld.long 0x00 11. " RXATX1EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times" "0,1"
|
|
textline " "
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|
bitfld.long 0x00 10. " RXATX0EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times" "0,1"
|
|
bitfld.long 0x00 9. " TXARX2EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL" "0,1"
|
|
bitfld.long 0x00 8. " TXARX1EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL" "0,1"
|
|
textline " "
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|
bitfld.long 0x00 7. " TXARX0EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL" "0,1"
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|
bitfld.long 0x00 6. " AUTOTXTEN ,AUTOTX Trigger Enable" "0,1"
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|
bitfld.long 0x00 5. " TXTEN ,Transmit Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXTEN ,Receive Trigger Enable" "0,1"
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|
wgroup.long 0xC++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. " CLEARRX ,Clear RX" "0,1"
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|
bitfld.long 0x00 10. " CLEARTX ,Clear TX" "0,1"
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|
bitfld.long 0x00 9. " TXTRIDIS ,Transmitter Tristate Disable" "0,1"
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|
textline " "
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bitfld.long 0x00 8. " TXTRIEN ,Transmitter Tristate Enable" "0,1"
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|
bitfld.long 0x00 7. " RXBLOCKDIS ,Receiver Block Disable" "0,1"
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bitfld.long 0x00 6. " RXBLOCKEN ,Receiver Block Enable" "0,1"
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|
textline " "
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bitfld.long 0x00 5. " MASTERDIS ,Master Disable" "0,1"
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bitfld.long 0x00 4. " MASTEREN ,Master Enable" "0,1"
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|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "0,1"
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|
textline " "
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bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "0,1"
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bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "0,1"
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bitfld.long 0x00 0. " RXEN ,Receiver Enable" "0,1"
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|
rgroup.long 0x10++0x3
|
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line.long 0x00 "STATUS,USART Status Register"
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|
bitfld.long 0x00 16.--17. " TXBUFCNT ,TX Buffer Count" "0,1,2,3"
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|
bitfld.long 0x00 14. " TIMERRESTARTED ,The USART Timer Restarted Itself" "0,1"
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bitfld.long 0x00 13. " TXIDLE ,TX Idle" "0,1"
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|
textline " "
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bitfld.long 0x00 12. " RXFULLRIGHT ,RX Full of Right Data" "0,1"
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bitfld.long 0x00 11. " RXDATAVRIGHT ,RX Data Right" "0,1"
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bitfld.long 0x00 10. " TXBSRIGHT ,TX Buffer Expects Single Right Data" "0,1"
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|
textline " "
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bitfld.long 0x00 9. " TXBDRIGHT ,TX Buffer Expects Double Right Data" "0,1"
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bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "0,1"
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bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "0,1"
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textline " "
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bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "0,1"
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bitfld.long 0x00 5. " TXC ,TX Complete" "0,1"
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bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "0,1"
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textline " "
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bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "0,1"
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bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "0,1"
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bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "0,1"
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textline " "
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bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "0,1"
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group.long 0x14++0x3
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line.long 0x00 "CLKDIV,Clock Control Register"
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bitfld.long 0x00 31. " AUTOBAUDEN ,AUTOBAUD Detection Enable" "0,1"
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hexmask.long.tbyte 0x00 3.--22. 1. " DIV ,Fractional Clock Divider"
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rgroup.long 0x18++0x3
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line.long 0x00 "RXDATAX,RX Buffer Data Extended Register"
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bitfld.long 0x00 15. " FERR ,Data Framing Error" "0,1"
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bitfld.long 0x00 14. " PERR ,Data Parity Error" "0,1"
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hexmask.long.word 0x00 0.--8. 1. " RXDATA ,RX Data"
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rgroup.long 0x1C++0x3
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line.long 0x00 "RXDATA,RX Buffer Data Register"
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hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
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rgroup.long 0x20++0x3
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line.long 0x00 "RXDOUBLEX,RX Buffer Double Data Extended Register"
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bitfld.long 0x00 31. " FERR1 ,Data Framing Error 1" "0,1"
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bitfld.long 0x00 30. " PERR1 ,Data Parity Error 1" "0,1"
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hexmask.long.word 0x00 16.--24. 1. " RXDATA1 ,RX Data 1"
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textline " "
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bitfld.long 0x00 15. " FERR0 ,Data Framing Error 0" "0,1"
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bitfld.long 0x00 14. " PERR0 ,Data Parity Error 0" "0,1"
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hexmask.long.word 0x00 0.--8. 1. " RXDATA0 ,RX Data 0"
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rgroup.long 0x24++0x3
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line.long 0x00 "RXDOUBLE,RX FIFO Double Data Register"
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hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,RX Data 1"
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hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,RX Data 0"
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rgroup.long 0x28++0x3
|
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line.long 0x00 "RXDATAXP,RX Buffer Data Extended Peek Register"
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|
bitfld.long 0x00 15. " FERRP ,Data Framing Error Peek" "0,1"
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|
bitfld.long 0x00 14. " PERRP ,Data Parity Error Peek" "0,1"
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hexmask.long.word 0x00 0.--8. 1. " RXDATAP ,RX Data Peek"
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rgroup.long 0x2C++0x3
|
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line.long 0x00 "RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
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bitfld.long 0x00 31. " FERRP1 ,Data Framing Error 1 Peek" "0,1"
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|
bitfld.long 0x00 30. " PERRP1 ,Data Parity Error 1 Peek" "0,1"
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hexmask.long.word 0x00 16.--24. 1. " RXDATAP1 ,RX Data 1 Peek"
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textline " "
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bitfld.long 0x00 15. " FERRP0 ,Data Framing Error 0 Peek" "0,1"
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|
bitfld.long 0x00 14. " PERRP0 ,Data Parity Error 0 Peek" "0,1"
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|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP0 ,RX Data 0 Peek"
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|
group.long 0x30++0x3
|
|
line.long 0x00 "TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATAX ,TX Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " RXENAT1 ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 30. " TXDISAT1 ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 29. " TXBREAK1 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TXTRIAT1 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 27. " UBRXAT1 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " TXDATA1 ,TX Data"
|
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textline " "
|
|
bitfld.long 0x00 15. " RXENAT0 ,Enable RX After Transmission" "0,1"
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|
bitfld.long 0x00 14. " TXDISAT0 ,Clear TXEN After Transmission" "0,1"
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|
bitfld.long 0x00 13. " TXBREAK0 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT0 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT0 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATA0 ,TX Data"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,TX Data"
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hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,TX Data"
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rgroup.long 0x40++0x3
|
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line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Timer Comparator 2 Interrupt Flag" "0,1"
|
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bitfld.long 0x00 15. " TCMP1 ,Timer Comparator 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Timer Comparator 0 Interrupt Flag" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 13. " TXIDLE ,TX Idle Interrupt Flag" "0,1"
|
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bitfld.long 0x00 12. " CCF ,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Slave-Select in Master Mode Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Parity Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TX Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RX Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RX Buffer Full Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Set TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Set TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Set TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Set TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Set CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Set SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Set MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Set FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Set PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Set TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Set RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Set RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Clear TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Clear TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Clear TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Clear TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Clear CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Clear SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Clear MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Clear FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Clear PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Clear TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Clear RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Clear RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,TCMP2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,TCMP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,TCMP0 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,TXIDLE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,CCF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,SSM Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,MPAF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,FERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,PERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TXUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RXFULL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TXC Interrupt Enable" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "IRCTRL,IrDA Control Register"
|
|
bitfld.long 0x00 8.--11. " IRPRSSEL ,IrDA PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " IRPRSEN ,IrDA PRS Channel Enable" "0,1"
|
|
bitfld.long 0x00 3. " IRFILT ,IrDA RX Filter" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IRPW ,IrDA TX Pulse Width" "ONE,TWO,THREE,FOUR"
|
|
bitfld.long 0x00 0. " IREN ,Enable IrDA Module" "0,1"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "INPUT,USART Input Register"
|
|
bitfld.long 0x00 15. " CLKPRS ,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x00 8.--11. " CLKPRSSEL ,CLK PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " RXPRS ,PRS RX Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. " FORMAT ,I2S Word Format" "W32D32,W32D24M,W32D24,W32D16,W32D8,W16D16,W16D8,W8D8"
|
|
bitfld.long 0x00 4. " DELAY ,Delay on I2S Data" "0,1"
|
|
bitfld.long 0x00 3. " DMASPLIT ,Separate DMA Request for Left/Right Data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " JUSTIFY ,Justification of I2S Data" "0,1"
|
|
bitfld.long 0x00 1. " MONO ,Stero or Mono" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable I2S Mode" "0,1"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "TIMING,Timing Register"
|
|
bitfld.long 0x00 28.--30. " CSHOLD ,Chip Select Hold" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 24.--26. " ICS ,Inter-character Spacing" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 20.--22. " CSSETUP ,Chip Select Setup" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TXDELAY ,TX Frame Start Delay" "DISABLE,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CTRLX,Control Register Extended"
|
|
bitfld.long 0x00 3. " RTSINV ,RTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 2. " CTSEN ,CTS Function Enabled" "0,1"
|
|
bitfld.long 0x00 1. " CTSINV ,CTS Pin Inversion" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DBGHALT ,Debug Halt" "0,1"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "TIMECMP0,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP0" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 0" "TCMP0,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 0"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "TIMECMP1,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP1" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 1" "TCMP1,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 1"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "TIMECMP2,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP2" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 2" "TCMP2,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 2"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 5. " RTSPEN ,RTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. " CTSPEN ,CTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSPEN ,CS Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "0,1"
|
|
group.long 0x78++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CLKLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " CSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " TXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " RXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " RTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40010800
|
|
width 12.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " SMSDELAY ,Synchronous Master Sample Delay" "0,1"
|
|
bitfld.long 0x00 30. " MVDIS ,Majority Vote Disable" "0,1"
|
|
bitfld.long 0x00 29. " AUTOTX ,Always Transmit When RX Not Full" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BYTESWAP ,Byteswap in Double Accesses" "0,1"
|
|
bitfld.long 0x00 25. " SSSEARLY ,Synchronous Slave Setup Early" "0,1"
|
|
bitfld.long 0x00 24. " ERRSTX ,Disable TX on Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ERRSRX ,Disable RX on Error" "0,1"
|
|
bitfld.long 0x00 22. " ERRSDMA ,Halt DMA on Error" "0,1"
|
|
bitfld.long 0x00 21. " BIT8DV ,Bit 8 Default Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " SKIPPERRF ,Skip Parity Error Frames" "0,1"
|
|
bitfld.long 0x00 19. " SCRETRANS ,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x00 18. " SCMODE ,SmartCard Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " AUTOTRI ,Automatic TX Tristate" "0,1"
|
|
bitfld.long 0x00 16. " AUTOCS ,Automatic Chip Select" "0,1"
|
|
bitfld.long 0x00 15. " CSINV ,Chip Select Invert" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXINV ,Transmitter Output Invert" "0,1"
|
|
bitfld.long 0x00 13. " RXINV ,Receiver Input Invert" "0,1"
|
|
bitfld.long 0x00 12. " TXBIL ,TX Buffer Interrupt Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CSMA ,Action on Slave-Select in Master Mode" "0,1"
|
|
bitfld.long 0x00 10. " MSBF ,Most Significant Bit First" "0,1"
|
|
bitfld.long 0x00 9. " CLKPHA ,Clock Edge for Setup/Sample" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKPOL ,Clock Polarity" "0,1"
|
|
bitfld.long 0x00 5.--6. " OVS ,Oversampling" "X16,X8,X6,X4"
|
|
bitfld.long 0x00 4. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MPM ,Multi-Processor Mode" "0,1"
|
|
bitfld.long 0x00 2. " CCEN ,Collision Check Enable" "0,1"
|
|
bitfld.long 0x00 1. " LOOPBK ,Loopback Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYNC ,USART Synchronous Mode" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "FRAME,USART Frame Format Register"
|
|
bitfld.long 0x00 12.--13. " STOPBITS ,Stop-Bit Mode" "HALF,ONE,ONEANDAHALF,TWO"
|
|
bitfld.long 0x00 8.--9. " PARITY ,Parity-Bit Mode" "NONE,1,EVEN,ODD"
|
|
bitfld.long 0x00 0.--3. " DATABITS ,Data-Bit Mode" "0,FOUR,FIVE,SIX,SEVEN,EIGHT,NINE,TEN,ELEVEN,TWELVE,THIRTEEN,FOURTEEN,FIFTEEN,SIXTEEN,14,15"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "TRIGCTRL,USART Trigger Control Register"
|
|
bitfld.long 0x00 16.--19. " TSEL ,Trigger PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 12. " RXATX2EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times" "0,1"
|
|
bitfld.long 0x00 11. " RXATX1EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RXATX0EN ,Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times" "0,1"
|
|
bitfld.long 0x00 9. " TXARX2EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL" "0,1"
|
|
bitfld.long 0x00 8. " TXARX1EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXARX0EN ,Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL" "0,1"
|
|
bitfld.long 0x00 6. " AUTOTXTEN ,AUTOTX Trigger Enable" "0,1"
|
|
bitfld.long 0x00 5. " TXTEN ,Transmit Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXTEN ,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0xC++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. " CLEARRX ,Clear RX" "0,1"
|
|
bitfld.long 0x00 10. " CLEARTX ,Clear TX" "0,1"
|
|
bitfld.long 0x00 9. " TXTRIDIS ,Transmitter Tristate Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXTRIEN ,Transmitter Tristate Enable" "0,1"
|
|
bitfld.long 0x00 7. " RXBLOCKDIS ,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x00 6. " RXBLOCKEN ,Receiver Block Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MASTERDIS ,Master Disable" "0,1"
|
|
bitfld.long 0x00 4. " MASTEREN ,Master Enable" "0,1"
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "0,1"
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "0,1"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "STATUS,USART Status Register"
|
|
bitfld.long 0x00 16.--17. " TXBUFCNT ,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x00 14. " TIMERRESTARTED ,The USART Timer Restarted Itself" "0,1"
|
|
bitfld.long 0x00 13. " TXIDLE ,TX Idle" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RXFULLRIGHT ,RX Full of Right Data" "0,1"
|
|
bitfld.long 0x00 11. " RXDATAVRIGHT ,RX Data Right" "0,1"
|
|
bitfld.long 0x00 10. " TXBSRIGHT ,TX Buffer Expects Single Right Data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXBDRIGHT ,TX Buffer Expects Double Right Data" "0,1"
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|
bitfld.long 0x00 8. " RXFULL ,RX FIFO Full" "0,1"
|
|
bitfld.long 0x00 7. " RXDATAV ,RX Data Valid" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXBL ,TX Buffer Level" "0,1"
|
|
bitfld.long 0x00 5. " TXC ,TX Complete" "0,1"
|
|
bitfld.long 0x00 4. " TXTRI ,Transmitter Tristated" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RXBLOCK ,Block Incoming Data" "0,1"
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|
bitfld.long 0x00 2. " MASTER ,SPI Master Mode" "0,1"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
bitfld.long 0x00 31. " AUTOBAUDEN ,AUTOBAUD Detection Enable" "0,1"
|
|
hexmask.long.tbyte 0x00 3.--22. 1. " DIV ,Fractional Clock Divider"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "RXDATAX,RX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " FERR ,Data Framing Error" "0,1"
|
|
bitfld.long 0x00 14. " PERR ,Data Parity Error" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RXDATA,RX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RXDOUBLEX,RX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " FERR1 ,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x00 30. " PERR1 ,Data Parity Error 1" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATA1 ,RX Data 1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FERR0 ,Data Framing Error 0" "0,1"
|
|
bitfld.long 0x00 14. " PERR0 ,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "RXDOUBLE,RX FIFO Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "RXDATAXP,RX Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. " FERRP ,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x00 14. " PERRP ,Data Parity Error Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP ,RX Data Peek"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
|
|
bitfld.long 0x00 31. " FERRP1 ,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x00 30. " PERRP1 ,Data Parity Error 1 Peek" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " RXDATAP1 ,RX Data 1 Peek"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FERRP0 ,Data Framing Error 0 Peek" "0,1"
|
|
bitfld.long 0x00 14. " PERRP0 ,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP0 ,RX Data 0 Peek"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATAX ,TX Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. " RXENAT1 ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 30. " TXDISAT1 ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 29. " TXBREAK1 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TXTRIAT1 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 27. " UBRXAT1 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. " TXDATA1 ,TX Data"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RXENAT0 ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT0 ,Clear TXEN After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK0 ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXTRIAT0 ,Set TXTRI After Transmission" "0,1"
|
|
bitfld.long 0x00 11. " UBRXAT0 ,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATA0 ,TX Data"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,TX Data"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Timer Comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Timer Comparator 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Timer Comparator 0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,TX Idle Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Slave-Select in Master Mode Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Parity Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TX Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RX Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RX Buffer Full Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Set TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Set TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Set TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Set TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Set CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Set SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Set MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Set FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Set PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Set TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Set RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Set RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,Clear TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,Clear TCMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,Clear TCMP0 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,Clear TXIDLE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,Clear CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,Clear SSM Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,Clear MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,Clear FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,Clear PERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,Clear TXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,Clear RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,Clear RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 16. " TCMP2 ,TCMP2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. " TCMP1 ,TCMP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " TCMP0 ,TCMP0 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TXIDLE ,TXIDLE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. " CCF ,CCF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " SSM ,SSM Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MPAF ,MPAF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " FERR ,FERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " PERR ,PERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TXUF ,TXUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXOF ,RXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " RXFULL ,RXFULL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TXC Interrupt Enable" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "IRCTRL,IrDA Control Register"
|
|
bitfld.long 0x00 8.--11. " IRPRSSEL ,IrDA PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " IRPRSEN ,IrDA PRS Channel Enable" "0,1"
|
|
bitfld.long 0x00 3. " IRFILT ,IrDA RX Filter" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " IRPW ,IrDA TX Pulse Width" "ONE,TWO,THREE,FOUR"
|
|
bitfld.long 0x00 0. " IREN ,Enable IrDA Module" "0,1"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "INPUT,USART Input Register"
|
|
bitfld.long 0x00 15. " CLKPRS ,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x00 8.--11. " CLKPRSSEL ,CLK PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 7. " RXPRS ,PRS RX Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. " FORMAT ,I2S Word Format" "W32D32,W32D24M,W32D24,W32D16,W32D8,W16D16,W16D8,W8D8"
|
|
bitfld.long 0x00 4. " DELAY ,Delay on I2S Data" "0,1"
|
|
bitfld.long 0x00 3. " DMASPLIT ,Separate DMA Request for Left/Right Data" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " JUSTIFY ,Justification of I2S Data" "0,1"
|
|
bitfld.long 0x00 1. " MONO ,Stero or Mono" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Enable I2S Mode" "0,1"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "TIMING,Timing Register"
|
|
bitfld.long 0x00 28.--30. " CSHOLD ,Chip Select Hold" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 24.--26. " ICS ,Inter-character Spacing" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
bitfld.long 0x00 20.--22. " CSSETUP ,Chip Select Setup" "ZERO,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TXDELAY ,TX Frame Start Delay" "DISABLE,ONE,TWO,THREE,SEVEN,TCMP0,TCMP1,TCMP2"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CTRLX,Control Register Extended"
|
|
bitfld.long 0x00 3. " RTSINV ,RTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 2. " CTSEN ,CTS Function Enabled" "0,1"
|
|
bitfld.long 0x00 1. " CTSINV ,CTS Pin Inversion" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DBGHALT ,Debug Halt" "0,1"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "TIMECMP0,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP0" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 0" "TCMP0,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 0"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "TIMECMP1,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP1" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 1" "TCMP1,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 1"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "TIMECMP2,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. " RESTARTEN ,Restart Timer on TCMP2" "0,1"
|
|
bitfld.long 0x00 20.--22. " TSTOP ,Source Used to Disable Comparator 2" "TCMP2,TXST,RXACT,RXACTN,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " TSTART ,Timer Start Source" "DISABLE,TXEOF,TXC,RXACT,RXEOF,5,6,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " TCMPVAL ,Timer Comparator 2"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 5. " RTSPEN ,RTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. " CTSPEN ,CTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. " CLKPEN ,CLK Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CSPEN ,CS Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "0,1"
|
|
group.long 0x78++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. " CLKLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " CSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " TXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " RXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " RTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CTSLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree "LEUART0"
|
|
base ad:0x4004A000
|
|
width 12.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 14.--15. " TXDELAY ,TX Delay Transmission" "NONE,SINGLE,DOUBLE,TRIPLE"
|
|
bitfld.long 0x00 13. " TXDMAWU ,TX DMA Wakeup" "0,1"
|
|
bitfld.long 0x00 12. " RXDMAWU ,RX DMA Wakeup" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BIT8DV ,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x00 10. " MPAB ,Multi-Processor Address-Bit" "0,1"
|
|
bitfld.long 0x00 9. " MPM ,Multi-Processor Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SFUBRX ,Start-Frame UnBlock RX" "0,1"
|
|
bitfld.long 0x00 7. " LOOPBK ,Loopback Enable" "0,1"
|
|
bitfld.long 0x00 6. " ERRSDMA ,Clear RX DMA on Error" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INV ,Invert Input and Output" "0,1"
|
|
bitfld.long 0x00 4. " STOPBITS ,Stop-Bit Mode" "0,1"
|
|
bitfld.long 0x00 2.--3. " PARITY ,Parity-Bit Mode" "NONE,1,EVEN,ODD"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DATABITS ,Data-Bit Mode" "0,1"
|
|
bitfld.long 0x00 0. " AUTOTRI ,Automatic Transmitter Tristate" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. " CLEARRX ,Clear RX" "0,1"
|
|
bitfld.long 0x00 6. " CLEARTX ,Clear TX" "0,1"
|
|
bitfld.long 0x00 5. " RXBLOCKDIS ,Receiver Block Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXBLOCKEN ,Receiver Block Enable" "0,1"
|
|
bitfld.long 0x00 3. " TXDIS ,Transmitter Disable" "0,1"
|
|
bitfld.long 0x00 2. " TXEN ,Transmitter Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXDIS ,Receiver Disable" "0,1"
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 6. " TXIDLE ,TX Idle" "0,1"
|
|
bitfld.long 0x00 5. " RXDATAV ,RX Data Valid" "0,1"
|
|
bitfld.long 0x00 4. " TXBL ,TX Buffer Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXC ,TX Complete" "0,1"
|
|
bitfld.long 0x00 2. " RXBLOCK ,Block Incoming Data" "0,1"
|
|
bitfld.long 0x00 1. " TXENS ,Transmitter Enable Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXENS ,Receiver Enable Status" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
hexmask.long.word 0x00 3.--16. 1. " DIV ,Fractional Clock Divider"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "STARTFRAME,Start Frame Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " STARTFRAME ,Start Frame"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SIGFRAME,Signal Frame Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " SIGFRAME ,Signal Frame"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "RXDATAX,Receive Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " FERR ,Receive Data Framing Error" "0,1"
|
|
bitfld.long 0x00 14. " PERR ,Receive Data Parity Error" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RXDATAXP,Receive Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. " FERRP ,Receive Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x00 14. " PERRP ,Receive Data Parity Error Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXDATAP ,RX Data Peek"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "TXDATAX,Transmit Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. " RXENAT ,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. " TXDISAT ,Disable TX After Transmission" "0,1"
|
|
bitfld.long 0x00 13. " TXBREAK ,Transmit Data as Break" "0,1"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " TXDATA ,TX Data"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 10. " SIGF ,Signal Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " STARTF ,Start Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MPAF ,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FERR ,Framing Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " PERR ,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " TXOF ,TX Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXUF ,RX Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXOF ,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RX Data Valid Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TX Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x30++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 10. " SIGF ,Set SIGF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " STARTF ,Set STARTF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MPAF ,Set MPAF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FERR ,Set FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " PERR ,Set PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXOF ,Set RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 10. " SIGF ,Clear SIGF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " STARTF ,Clear STARTF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MPAF ,Clear MPAF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FERR ,Clear FERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " PERR ,Clear PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " RXOF ,Clear RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " SIGF ,SIGF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " STARTF ,STARTF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " MPAF ,MPAF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FERR ,FERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " PERR ,PERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " RXOF ,RXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TXC ,TXC Interrupt Enable" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "PULSECTRL,Pulse Control Register"
|
|
bitfld.long 0x00 5. " PULSEFILT ,Pulse Filter" "0,1"
|
|
bitfld.long 0x00 4. " PULSEEN ,Pulse Generator/Extender Enable" "0,1"
|
|
bitfld.long 0x00 0.--3. " PULSEW ,Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. " REGFREEZE ,Register Update Freeze" "0,1"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 7. " PULSECTRL ,PULSECTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 6. " TXDATA ,TXDATA Register Busy" "0,1"
|
|
bitfld.long 0x00 5. " TXDATAX ,TXDATAX Register Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SIGFRAME ,SIGFRAME Register Busy" "0,1"
|
|
bitfld.long 0x00 3. " STARTFRAME ,STARTFRAME Register Busy" "0,1"
|
|
bitfld.long 0x00 2. " CLKDIV ,CLKDIV Register Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "0,1"
|
|
bitfld.long 0x00 0. " CTRL ,CTRL Register Busy" "0,1"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. " TXPEN ,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " RXPEN ,RX Pin Enable" "0,1"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " TXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RXLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "INPUT,LEUART Input Register"
|
|
bitfld.long 0x00 5. " RXPRS ,PRS RX Enable" "0,1"
|
|
bitfld.long 0x00 0.--3. " RXPRSSEL ,RX PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "LETIMER0"
|
|
base ad:0x40046000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 12. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 9. " COMP0TOP ,Compare Value 0 is Top Value" "0,1"
|
|
bitfld.long 0x00 8. " BUFTOP ,Buffered Top" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OPOL1 ,Output 1 Polarity" "0,1"
|
|
bitfld.long 0x00 6. " OPOL0 ,Output 0 Polarity" "0,1"
|
|
bitfld.long 0x00 4.--5. " UFOA1 ,Underflow Output Action 1" "NONE,TOGGLE,PULSE,PWM"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " UFOA0 ,Underflow Output Action 0" "NONE,TOGGLE,PULSE,PWM"
|
|
bitfld.long 0x00 0.--1. " REPMODE ,Repeat Mode" "FREE,ONESHOT,BUFFERED,DOUBLE"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 4. " CTO1 ,Clear Toggle Output 1" "0,1"
|
|
bitfld.long 0x00 3. " CTO0 ,Clear Toggle Output 0" "0,1"
|
|
bitfld.long 0x00 2. " CLEAR ,Clear LETIMER" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STOP ,Stop LETIMER" "0,1"
|
|
bitfld.long 0x00 0. " START ,Start LETIMER" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 0. " RUNNING ,LETIMER Running" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNT ,Counter Value"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "COMP0,Compare Value Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMP0 ,Compare Value 0"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "COMP1,Compare Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMP1 ,Compare Value 1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "REP0,Repeat Counter Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REP0 ,Repeat Counter 0"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "REP1,Repeat Counter Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REP1 ,Repeat Counter 1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 4. " REP1 ,Repeat Counter 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " REP0 ,Repeat Counter 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " UF ,Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMP1 ,Compare Match 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " COMP0 ,Compare Match 0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 4. " REP1 ,Set REP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " REP0 ,Set REP0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " UF ,Set UF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMP1 ,Set COMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " COMP0 ,Set COMP0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 4. " REP1 ,Clear REP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " REP0 ,Clear REP0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " UF ,Clear UF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMP1 ,Clear COMP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " COMP0 ,Clear COMP0 Interrupt Flag" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 4. " REP1 ,REP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " REP0 ,REP0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " UF ,UF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " COMP1 ,COMP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " COMP0 ,COMP0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. " OUT1PEN ,Output 1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " OUT0PEN ,Output 0 Pin Enable" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " OUT1LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " OUT0LOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "PRSSEL,PRS Input Select Register"
|
|
bitfld.long 0x00 26.--27. " PRSCLEARMODE ,PRS Clear Mode" "NONE,RISING,FALLING,BOTH"
|
|
bitfld.long 0x00 22.--23. " PRSSTOPMODE ,PRS Stop Mode" "NONE,RISING,FALLING,BOTH"
|
|
bitfld.long 0x00 18.--19. " PRSSTARTMODE ,PRS Start Mode" "NONE,RISING,FALLING,BOTH"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " PRSCLEARSEL ,PRS Clear Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 6.--9. " PRSSTOPSEL ,PRS Stop Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " PRSSTARTSEL ,PRS Start Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CRYOTIMER"
|
|
base ad:0x4001E000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 5.--7. " PRESC ,Prescaler Setting" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128"
|
|
bitfld.long 0x00 2.--4. " OSCSEL ,Select Low Frequency Oscillator" "DISABLED,LFRCO,LFXO,ULFRCO,4,5,6,7"
|
|
bitfld.long 0x00 1. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Enable CRYOTIMER" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "PERIODSEL,Interrupt Duration"
|
|
bitfld.long 0x00 0.--5. " PERIODSEL ,Interrupts/Wakeup Events Period Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "CNT,Counter Value"
|
|
hexmask.long 0x00 0.--31. 1. " CNT ,Counter Value"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "EM4WUEN,Wake Up Enable"
|
|
bitfld.long 0x00 0. " EM4WU ,EM4 Wake-up Enable" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 0. " PERIOD ,Wakeup Event/Interrupt" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. " PERIOD ,Set PERIOD Interrupt Flag" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. " PERIOD ,Clear PERIOD Interrupt Flag" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " PERIOD ,PERIOD Interrupt Enable" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PCNT0"
|
|
base ad:0x4004E000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " TOPBHFSEL ,TOPB High Frequency Value Select" "0,1"
|
|
bitfld.long 0x00 26.--29. " TCCPRSSEL ,TCC PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 25. " TCCPRSPOL ,TCC PRS Polarity Select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PRSGATEEN ,PRS Gate Enable" "0,1"
|
|
bitfld.long 0x00 22.--23. " TCCCOMP ,Triggered Compare and Clear Compare Mode" "LTOE,GTOE,RANGE,3"
|
|
bitfld.long 0x00 19.--20. " TCCPRESC ,Set the LFA Prescaler for Triggered Compare and Clear" "DIV1,DIV2,DIV4,DIV8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " TCCMODE ,Sets the Mode for Triggered Compare and Clear" "DISABLED,LFA,PRS,3"
|
|
bitfld.long 0x00 15. " EDGE ,Edge Select" "0,1"
|
|
bitfld.long 0x00 14. " CNTDIR ,Non-Quadrature Mode Counter Direction Control" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " AUXCNTEV ,Controls When the Auxiliary Counter Counts" "NONE,UP,DOWN,BOTH"
|
|
bitfld.long 0x00 10.--11. " CNTEV ,Controls When the Counter Counts" "BOTH,UP,DOWN,NONE"
|
|
bitfld.long 0x00 9. " S1CDIR ,Count Direction Determined By S1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HYST ,Enable Hysteresis" "0,1"
|
|
bitfld.long 0x00 7. " DEBUGHALT ,Debug Mode Halt Enable" "0,1"
|
|
bitfld.long 0x00 6. " AUXCNTRSTEN ,Enable AUXCNT Reset" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CNTRSTEN ,Enable CNT Reset" "0,1"
|
|
bitfld.long 0x00 4. " RSTEN ,Enable PCNT Clock Domain Reset" "0,1"
|
|
bitfld.long 0x00 3. " FILT ,Enable Digital Pulse Width Filter" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " MODE ,Mode Select" "DISABLE,OVSSINGLE,EXTCLKSINGLE,EXTCLKQUAD,OVSQUAD1X,OVSQUAD2X,OVSQUAD4X,7"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. " LTOPBIM ,Load TOPB Immediately" "0,1"
|
|
bitfld.long 0x00 0. " LCNTIM ,Load CNT Immediately" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 0. " DIR ,Current Counter Direction" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CNT ,Counter Value"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "TOP,Top Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOP ,Counter Top Value"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "TOPB,Top Value Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOPB ,Counter Top Buffer"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 5. " OQSTERR ,Oversampling Quadrature State Error Interrupt" "0,1"
|
|
bitfld.long 0x00 4. " TCC ,Triggered Compare Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 3. " AUXOF ,Auxiliary Overflow Interrupt Read Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DIRCNG ,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " OF ,Overflow Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 0. " UF ,Underflow Interrupt Read Flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 5. " OQSTERR ,Set OQSTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " TCC ,Set TCC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " AUXOF ,Set AUXOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DIRCNG ,Set DIRCNG Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " OF ,Set OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " UF ,Set UF Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 5. " OQSTERR ,Clear OQSTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " TCC ,Clear TCC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " AUXOF ,Clear AUXOF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DIRCNG ,Clear DIRCNG Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " OF ,Clear OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " UF ,Clear UF Interrupt Flag" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. " OQSTERR ,OQSTERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " TCC ,TCC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " AUXOF ,AUXOF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DIRCNG ,DIRCNG Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " OF ,OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " UF ,UF Interrupt Enable" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " S1INLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " S0INLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. " REGFREEZE ,Register Update Freeze" "0,1"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 3. " OVSCFG ,OVSCFG Register Busy" "0,1"
|
|
bitfld.long 0x00 2. " TOPB ,TOPB Register Busy" "0,1"
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTRL ,CTRL Register Busy" "0,1"
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x00 "AUXCNT,Auxiliary Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUXCNT ,Auxiliary Counter Value"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "INPUT,PCNT Input Register"
|
|
bitfld.long 0x00 11. " S1PRSEN ,S1IN PRS Enable" "0,1"
|
|
bitfld.long 0x00 6.--9. " S1PRSSEL ,S1IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 5. " S0PRSEN ,S0IN PRS Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " S0PRSSEL ,S0IN PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "OVSCFG,Oversampling Config Register"
|
|
bitfld.long 0x00 12. " FLUTTERRM ,Flutter Remove" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FILTLEN ,Configure Filter Length for Inputs S0IN and S1IN"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C0"
|
|
base ad:0x4000C000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 16.--18. " CLTO ,Clock Low Timeout" "OFF,40PCC,80PCC,160PCC,320PCC,1024PCC,6,7"
|
|
bitfld.long 0x00 15. " GIBITO ,Go Idle on Bus Idle Timeout" "0,1"
|
|
bitfld.long 0x00 12.--13. " BITO ,Bus Idle Timeout" "OFF,40PCC,80PCC,160PCC"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CLHR ,Clock Low High Ratio" "STANDARD,ASYMMETRIC,FAST,3"
|
|
bitfld.long 0x00 7. " TXBIL ,TX Buffer Interrupt Level" "0,1"
|
|
bitfld.long 0x00 6. " GCAMEN ,General Call Address Match Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ARBDIS ,Arbitration Disable" "0,1"
|
|
bitfld.long 0x00 4. " AUTOSN ,Automatic STOP on NACK" "0,1"
|
|
bitfld.long 0x00 3. " AUTOSE ,Automatic STOP When Empty" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AUTOACK ,Automatic Acknowledge" "0,1"
|
|
bitfld.long 0x00 1. " SLAVE ,Addressable as Slave" "0,1"
|
|
bitfld.long 0x00 0. " EN ,I2C Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. " CLEARPC ,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x00 6. " CLEARTX ,Clear TX" "0,1"
|
|
bitfld.long 0x00 5. " ABORT ,Abort Transmission" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CONT ,Continue Transmission" "0,1"
|
|
bitfld.long 0x00 3. " NACK ,Send NACK" "0,1"
|
|
bitfld.long 0x00 2. " ACK ,Send ACK" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STOP ,Send Stop Condition" "0,1"
|
|
bitfld.long 0x00 0. " START ,Send Start Condition" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATE,State Register"
|
|
bitfld.long 0x00 5.--7. " STATE ,Transmission State" "IDLE,WAIT,START,ADDR,ADDRACK,DATA,DATAACK,7"
|
|
bitfld.long 0x00 4. " BUSHOLD ,Bus Held" "0,1"
|
|
bitfld.long 0x00 3. " NACKED ,Nack Received" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TRANSMITTER ,Transmitter" "0,1"
|
|
bitfld.long 0x00 1. " MASTER ,Master" "0,1"
|
|
bitfld.long 0x00 0. " BUSY ,Bus Busy" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 9. " RXFULL ,RX FIFO Full" "0,1"
|
|
bitfld.long 0x00 8. " RXDATAV ,RX Data Valid" "0,1"
|
|
bitfld.long 0x00 7. " TXBL ,TX Buffer Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXC ,TX Complete" "0,1"
|
|
bitfld.long 0x00 5. " PABORT ,Pending Abort" "0,1"
|
|
bitfld.long 0x00 4. " PCONT ,Pending Continue" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PNACK ,Pending NACK" "0,1"
|
|
bitfld.long 0x00 2. " PACK ,Pending ACK" "0,1"
|
|
bitfld.long 0x00 1. " PSTOP ,Pending STOP" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTART ,Pending START" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CLKDIV,Clock Division Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " DIV ,Clock Divider"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SADDR,Slave Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. " ADDR ,Slave Address"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SADDRMASK,Slave Address Mask Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. " MASK ,Slave Address Mask"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RXDOUBLE,Receive Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "RXDATAP,Receive Buffer Data Peek Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATAP ,RX Data Peek"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "RXDOUBLEP,Receive Buffer Double Data Peek Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATAP1 ,RX Data 1 Peek"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATAP0 ,RX Data 0 Peek"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TXDOUBLE,Transmit Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,TX Data"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 18. " CLERR ,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Receive Buffer Full Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Slave STOP Condition Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Clock Low Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Bus Held Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Bus Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Arbitration Lost Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Master STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXDATAV ,Receive Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " TXBL ,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXC ,Transfer Completed Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " RSTART ,Repeated START Condition Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,START Condition Interrupt Flag" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 18. " CLERR ,Set CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Set RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Set SSTOP Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Set CLTO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Set BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Set BUSHOLD Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Set BUSERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Set ARBLOST Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Set MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Set NACK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Set ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Set ADDR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RSTART ,Set RSTART Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " START ,Set START Interrupt Flag" "0,1"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 18. " CLERR ,Clear CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Clear RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Clear SSTOP Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Clear CLTO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Clear BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Clear BUSHOLD Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Clear BUSERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Clear ARBLOST Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Clear MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Clear NACK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Clear ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Clear ADDR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RSTART ,Clear RSTART Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " START ,Clear START Interrupt Flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 18. " CLERR ,CLERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,RXFULL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,SSTOP Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,CLTO Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,BITO Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,BUSHOLD Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,BUSERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,ARBLOST Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,MSTOP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,NACK Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,ACK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXC ,TXC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,ADDR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " RSTART ,RSTART Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,START Interrupt Enable" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. " SCLPEN ,SCL Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " SDAPEN ,SDA Pin Enable" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " SCLLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " SDALOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x4000C400
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 16.--18. " CLTO ,Clock Low Timeout" "OFF,40PCC,80PCC,160PCC,320PCC,1024PCC,6,7"
|
|
bitfld.long 0x00 15. " GIBITO ,Go Idle on Bus Idle Timeout" "0,1"
|
|
bitfld.long 0x00 12.--13. " BITO ,Bus Idle Timeout" "OFF,40PCC,80PCC,160PCC"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CLHR ,Clock Low High Ratio" "STANDARD,ASYMMETRIC,FAST,3"
|
|
bitfld.long 0x00 7. " TXBIL ,TX Buffer Interrupt Level" "0,1"
|
|
bitfld.long 0x00 6. " GCAMEN ,General Call Address Match Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ARBDIS ,Arbitration Disable" "0,1"
|
|
bitfld.long 0x00 4. " AUTOSN ,Automatic STOP on NACK" "0,1"
|
|
bitfld.long 0x00 3. " AUTOSE ,Automatic STOP When Empty" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AUTOACK ,Automatic Acknowledge" "0,1"
|
|
bitfld.long 0x00 1. " SLAVE ,Addressable as Slave" "0,1"
|
|
bitfld.long 0x00 0. " EN ,I2C Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. " CLEARPC ,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x00 6. " CLEARTX ,Clear TX" "0,1"
|
|
bitfld.long 0x00 5. " ABORT ,Abort Transmission" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CONT ,Continue Transmission" "0,1"
|
|
bitfld.long 0x00 3. " NACK ,Send NACK" "0,1"
|
|
bitfld.long 0x00 2. " ACK ,Send ACK" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STOP ,Send Stop Condition" "0,1"
|
|
bitfld.long 0x00 0. " START ,Send Start Condition" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATE,State Register"
|
|
bitfld.long 0x00 5.--7. " STATE ,Transmission State" "IDLE,WAIT,START,ADDR,ADDRACK,DATA,DATAACK,7"
|
|
bitfld.long 0x00 4. " BUSHOLD ,Bus Held" "0,1"
|
|
bitfld.long 0x00 3. " NACKED ,Nack Received" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TRANSMITTER ,Transmitter" "0,1"
|
|
bitfld.long 0x00 1. " MASTER ,Master" "0,1"
|
|
bitfld.long 0x00 0. " BUSY ,Bus Busy" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 9. " RXFULL ,RX FIFO Full" "0,1"
|
|
bitfld.long 0x00 8. " RXDATAV ,RX Data Valid" "0,1"
|
|
bitfld.long 0x00 7. " TXBL ,TX Buffer Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXC ,TX Complete" "0,1"
|
|
bitfld.long 0x00 5. " PABORT ,Pending Abort" "0,1"
|
|
bitfld.long 0x00 4. " PCONT ,Pending Continue" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PNACK ,Pending NACK" "0,1"
|
|
bitfld.long 0x00 2. " PACK ,Pending ACK" "0,1"
|
|
bitfld.long 0x00 1. " PSTOP ,Pending STOP" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTART ,Pending START" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "CLKDIV,Clock Division Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " DIV ,Clock Divider"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SADDR,Slave Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. " ADDR ,Slave Address"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SADDRMASK,Slave Address Mask Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. " MASK ,Slave Address Mask"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA ,RX Data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "RXDOUBLE,Receive Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,RX Data 0"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "RXDATAP,Receive Buffer Data Peek Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATAP ,RX Data Peek"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "RXDOUBLEP,Receive Buffer Double Data Peek Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATAP1 ,RX Data 1 Peek"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATAP0 ,RX Data 0 Peek"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,TX Data"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TXDOUBLE,Transmit Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,TX Data"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 18. " CLERR ,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Receive Buffer Full Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Slave STOP Condition Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Clock Low Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Bus Held Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Bus Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Arbitration Lost Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Master STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " RXDATAV ,Receive Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " TXBL ,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXC ,Transfer Completed Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " RSTART ,Repeated START Condition Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,START Condition Interrupt Flag" "0,1"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 18. " CLERR ,Set CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Set RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Set SSTOP Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Set CLTO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Set BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Set RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Set BUSHOLD Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Set BUSERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Set ARBLOST Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Set MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Set NACK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Set ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " TXC ,Set TXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Set ADDR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RSTART ,Set RSTART Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " START ,Set START Interrupt Flag" "0,1"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 18. " CLERR ,Clear CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,Clear RXFULL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,Clear SSTOP Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,Clear CLTO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,Clear BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,Clear RXUF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,Clear BUSHOLD Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,Clear BUSERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,Clear ARBLOST Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,Clear MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,Clear NACK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,Clear ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " TXC ,Clear TXC Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,Clear ADDR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RSTART ,Clear RSTART Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " START ,Clear START Interrupt Flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 18. " CLERR ,CLERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. " RXFULL ,RXFULL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. " SSTOP ,SSTOP Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLTO ,CLTO Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " BITO ,BITO Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. " RXUF ,RXUF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXOF ,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " BUSHOLD ,BUSHOLD Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. " BUSERR ,BUSERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ARBLOST ,ARBLOST Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " MSTOP ,MSTOP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " NACK ,NACK Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ACK ,ACK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " RXDATAV ,RXDATAV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " TXBL ,TXBL Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TXC ,TXC Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " ADDR ,ADDR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " RSTART ,RSTART Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,START Interrupt Enable" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. " SCLPEN ,SCL Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " SDAPEN ,SDA Pin Enable" "0,1"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. " SCLLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " SDALOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC0"
|
|
base ad:0x40002000
|
|
width 17.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 30.--31. " CHCONREFWARMIDLE ,Channel Connect and Reference Warm Sel When ADC is IDLE" "PREFSCAN,PREFSINGLE,KEEPPREV,3"
|
|
bitfld.long 0x00 29. " CHCONMODE ,Channel Connect" "0,1"
|
|
bitfld.long 0x00 28. " DBGHALT ,Debug Mode Halt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24.--27. " OVSRSEL ,Oversample Rate Select" "X2,X4,X8,X16,X32,X64,X128,X256,X512,X1024,X2048,X4096,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TIMEBASE ,1us Time Base"
|
|
hexmask.long.byte 0x00 8.--14. 1. " PRESC ,Prescalar Setting for ADC Sample and Conversion Clock"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADCCLKMODE ,ADC Clock Mode" "0,1"
|
|
bitfld.long 0x00 6. " ASYNCCLKEN ,Selects ASYNC CLK Enable Mode When ADCCLKMODE=1" "0,1"
|
|
bitfld.long 0x00 4. " TAILGATE ,Conversion Tailgating" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SCANDMAWU ,SCANFIFO DMA Wakeup" "0,1"
|
|
bitfld.long 0x00 2. " SINGLEDMAWU ,SINGLEFIFO DMA Wakeup" "0,1"
|
|
bitfld.long 0x00 0.--1. " WARMUPMODE ,Warm-up Mode" "NORMAL,KEEPINSTANDBY,KEEPINSLOWACC,KEEPADCWARM"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 3. " SCANSTOP ,Scan Sequence Stop" "0,1"
|
|
bitfld.long 0x00 2. " SCANSTART ,Scan Sequence Start" "0,1"
|
|
bitfld.long 0x00 1. " SINGLESTOP ,Single Channel Conversion Stop" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SINGLESTART ,Single Channel Conversion Start" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 17. " SCANDV ,Scan Data Valid" "0,1"
|
|
bitfld.long 0x00 16. " SINGLEDV ,Single Channel Data Valid" "0,1"
|
|
bitfld.long 0x00 12. " WARM ,ADC Warmed Up" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " PROGERR ,Programming Error Status" "0,BUSCONF,NEGSELCONF,3"
|
|
bitfld.long 0x00 9. " SCANREFWARM ,Scan Reference Warmed Up" "0,1"
|
|
bitfld.long 0x00 8. " SINGLEREFWARM ,Single Channel Reference Warmed Up" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SCANPENDING ,Scan Conversion Pending" "0,1"
|
|
bitfld.long 0x00 1. " SCANACT ,Scan Conversion Active" "0,1"
|
|
bitfld.long 0x00 0. " SINGLEACT ,Single Channel Conversion Active" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "SINGLECTRL,Single Channel Control Register"
|
|
bitfld.long 0x00 31. " CMPEN ,Compare Logic Enable for Single Channel" "0,1"
|
|
bitfld.long 0x00 29. " PRSEN ,Single Channel PRS Trigger Enable" "0,1"
|
|
bitfld.long 0x00 24.--27. " AT ,Single Channel Acquisition Time" "1CYCLE,2CYCLES,3CYCLES,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " NEGSEL ,Single Channel Negative Input Selection"
|
|
hexmask.long.byte 0x00 8.--15. 1. " POSSEL ,Single Channel Positive Input Selection"
|
|
bitfld.long 0x00 5.--7. " REF ,Single Channel Reference Selection" "1V25,2V5,VDD,5V,EXTSINGLE,2XEXTDIFF,2XVDD,CONF"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RES ,Single Channel Resolution Select" "12BIT,8BIT,6BIT,OVS"
|
|
bitfld.long 0x00 2. " ADJ ,Single Channel Result Adjustment" "0,1"
|
|
bitfld.long 0x00 1. " DIFF ,Single Channel Differential Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REP ,Single Channel Repetitive Mode" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SINGLECTRLX,Single Channel Control Register Continued"
|
|
bitfld.long 0x00 29.--31. " REPDELAY ,REPDELAY Select for SINGLE REP Mode" "NODELAY,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES"
|
|
bitfld.long 0x00 27. " CONVSTARTDELAYEN ,Enable Delaying Next Conversion Start" "0,1"
|
|
bitfld.long 0x00 22.--26. " CONVSTARTDELAY ,Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 17.--20. " PRSSEL ,Single Channel PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PRSMODE ,Single Channel PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 14. " FIFOOFACT ,Single Channel FIFO Overflow Action" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DVL ,Single Channel DV Level Select" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " VINATT ,Code for VIN Attenuation Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " VREFATT ,Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VREFATTFIX ,Enable Fixed Scaling on VREF" "0,1"
|
|
bitfld.long 0x00 0.--2. " VREFSEL ,Single Channel Reference Selection" "VBGR,VDDXWATT,VREFPWATT,VREFP,VENTROPY,VREFPNWATT,VREFPN,VBGRLOW"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SCANCTRL,Scan Control Register"
|
|
bitfld.long 0x00 31. " CMPEN ,Compare Logic Enable for Scan" "0,1"
|
|
bitfld.long 0x00 29. " PRSEN ,Scan Sequence PRS Trigger Enable" "0,1"
|
|
bitfld.long 0x00 24.--27. " AT ,Scan Acquisition Time" "1CYCLE,2CYCLES,3CYCLES,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " REF ,Scan Sequence Reference Selection" "1V25,2V5,VDD,5V,EXTSINGLE,2XEXTDIFF,2XVDD,CONF"
|
|
bitfld.long 0x00 3.--4. " RES ,Scan Sequence Resolution Select" "12BIT,8BIT,6BIT,OVS"
|
|
bitfld.long 0x00 2. " ADJ ,Scan Sequence Result Adjustment" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DIFF ,Scan Sequence Differential Mode" "0,1"
|
|
bitfld.long 0x00 0. " REP ,Scan Sequence Repetitive Mode" "0,1"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "SCANCTRLX,Scan Control Register Continued"
|
|
bitfld.long 0x00 29.--31. " REPDELAY ,REPDELAY Select for SCAN REP Mode" "NODELAY,4CYCLES,8CYCLES,16CYCLES,32CYCLES,64CYCLES,128CYCLES,256CYCLES"
|
|
bitfld.long 0x00 27. " CONVSTARTDELAYEN ,Enable Delaying Next Conversion Start" "0,1"
|
|
bitfld.long 0x00 22.--26. " CONVSTARTDELAY ,Delay Next Conversion Start If CONVSTARTDELAYEN is Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 17.--20. " PRSSEL ,Scan Sequence PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PRSMODE ,Scan PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 14. " FIFOOFACT ,Scan FIFO Overflow Action" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DVL ,Scan DV Level Select" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. " VINATT ,Code for VIN Attenuation Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " VREFATT ,Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VREFATTFIX ,Enable Fixed Scaling on VREF" "0,1"
|
|
bitfld.long 0x00 0.--2. " VREFSEL ,Scan Channel Reference Selection" "VBGR,VDDXWATT,VREFPWATT,VREFP,4,VREFPNWATT,VREFPN,VBGRLOW"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "SCANMASK,Scan Sequence Input Mask Register"
|
|
hexmask.long 0x00 0.--31. 1. " SCANINPUTEN ,Scan Sequence Input Mask"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "SCANINPUTSEL,Input Selection Register for Scan Mode"
|
|
bitfld.long 0x00 24.--28. " INPUT24TO31SEL ,Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK" "APORT0CH0TO7,APORT0CH8TO15,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,APORT2CH0TO7,APORT2CH8TO15,APORT2CH16TO23,APORT2CH24TO31,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31,APORT4CH0TO7,APORT4CH8TO15,APORT4CH16TO23,APORT4CH24TO31,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 16.--20. " INPUT16TO23SEL ,Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK" "APORT0CH0TO7,APORT0CH8TO15,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,APORT2CH0TO7,APORT2CH8TO15,APORT2CH16TO23,APORT2CH24TO31,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31,APORT4CH0TO7,APORT4CH8TO15,APORT4CH16TO23,APORT4CH24TO31,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 8.--12. " INPUT8TO15SEL ,Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK" "APORT0CH0TO7,APORT0CH8TO15,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,APORT2CH0TO7,APORT2CH8TO15,APORT2CH16TO23,APORT2CH24TO31,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31,APORT4CH0TO7,APORT4CH8TO15,APORT4CH16TO23,APORT4CH24TO31,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 0.--4. " INPUT0TO7SEL ,Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK" "APORT0CH0TO7,APORT0CH8TO15,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,APORT2CH0TO7,APORT2CH8TO15,APORT2CH16TO23,APORT2CH24TO31,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31,APORT4CH0TO7,APORT4CH8TO15,APORT4CH16TO23,APORT4CH24TO31,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x28++0x3
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line.long 0x00 "SCANNEGSEL,Negative Input Select Register for Scan"
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bitfld.long 0x00 14.--15. " INPUT15NEGSEL ,Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode" "INPUT8,INPUT10,INPUT12,INPUT14"
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bitfld.long 0x00 12.--13. " INPUT13NEGSEL ,Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode" "INPUT8,INPUT10,INPUT12,INPUT14"
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bitfld.long 0x00 10.--11. " INPUT11NEGSEL ,Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode" "INPUT8,INPUT10,INPUT12,INPUT14"
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textline " "
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bitfld.long 0x00 8.--9. " INPUT9NEGSEL ,Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode" "INPUT8,INPUT10,INPUT12,INPUT14"
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bitfld.long 0x00 6.--7. " INPUT6NEGSEL ,Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode" "INPUT1,INPUT3,INPUT5,INPUT7"
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bitfld.long 0x00 4.--5. " INPUT4NEGSEL ,Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode" "INPUT1,INPUT3,INPUT5,INPUT7"
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textline " "
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bitfld.long 0x00 2.--3. " INPUT2NEGSEL ,Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode" "INPUT1,INPUT3,INPUT5,INPUT7"
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bitfld.long 0x00 0.--1. " INPUT0NEGSEL ,Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode" "INPUT1,INPUT3,INPUT5,INPUT7"
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group.long 0x2C++0x3
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line.long 0x00 "CMPTHR,Compare Threshold Register"
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hexmask.long.word 0x00 16.--31. 1. " ADGT ,Greater Than Compare Threshold"
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hexmask.long.word 0x00 0.--15. 1. " ADLT ,Less Than Compare Threshold"
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group.long 0x30++0x3
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line.long 0x00 "BIASPROG,Bias Programming Register for Various Analog Blocks Used in ADC Operation"
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bitfld.long 0x00 16. " GPBIASACC ,Accuracy Setting for the System Bias During ADC Operation" "0,1"
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bitfld.long 0x00 12. " VFAULTCLR ,Clear VREFOF Flag" "0,1"
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bitfld.long 0x00 0.--3. " ADCBIASPROG ,Bias Programming Value of Analog ADC Block" "NORMAL,1,2,3,SCALE2,5,6,7,SCALE4,9,10,11,SCALE8,13,SCALE16,SCALE32"
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group.long 0x34++0x3
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line.long 0x00 "CAL,Calibration Register"
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bitfld.long 0x00 31. " CALEN ,Calibration Mode is Enabled" "0,1"
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hexmask.long.byte 0x00 24.--30. 1. " SCANGAIN ,Scan Mode Gain Calibration Value"
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bitfld.long 0x00 20.--23. " SCANOFFSETINV ,Scan Mode Offset Calibration Value for Negative Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 16.--19. " SCANOFFSET ,Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 15. " OFFSETINVMODE ,Negative Single-ended Offset Calibration is Enabled" "0,1"
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hexmask.long.byte 0x00 8.--14. 1. " SINGLEGAIN ,Single Mode Gain Calibration Value"
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textline " "
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bitfld.long 0x00 4.--7. " SINGLEOFFSETINV ,Single Mode Offset Calibration Value for Negative Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " SINGLEOFFSET ,Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup.long 0x38++0x3
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line.long 0x00 "IF,Interrupt Flag Register"
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bitfld.long 0x00 29. " EM23ERR ,EM23 Entry Error Flag" "0,1"
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bitfld.long 0x00 28. " PRSTIMEDERR ,PRS Timed Mode Error Flag" "0,1"
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bitfld.long 0x00 27. " SCANPEND ,Scan Trigger Pending Flag" "0,1"
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textline " "
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bitfld.long 0x00 26. " SCANEXTPEND ,External Scan Trigger Pending Flag" "0,1"
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bitfld.long 0x00 25. " PROGERR ,Programming Error Interrupt Flag" "0,1"
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bitfld.long 0x00 24. " VREFOV ,VREF Over Voltage Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 17. " SCANCMP ,Scan Result Compare Match Interrupt Flag" "0,1"
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bitfld.long 0x00 16. " SINGLECMP ,Single Result Compare Match Interrupt Flag" "0,1"
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bitfld.long 0x00 11. " SCANUF ,Scan FIFO Underflow Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 10. " SINGLEUF ,Single FIFO Underflow Interrupt Flag" "0,1"
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bitfld.long 0x00 9. " SCANOF ,Scan FIFO Overflow Interrupt Flag" "0,1"
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bitfld.long 0x00 8. " SINGLEOF ,Single FIFO Overflow Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 1. " SCAN ,Scan Conversion Complete Interrupt Flag" "0,1"
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bitfld.long 0x00 0. " SINGLE ,Single Conversion Complete Interrupt Flag" "0,1"
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wgroup.long 0x3C++0x3
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line.long 0x00 "IFS,Interrupt Flag Set Register"
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bitfld.long 0x00 29. " EM23ERR ,Set EM23ERR Interrupt Flag" "0,1"
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bitfld.long 0x00 28. " PRSTIMEDERR ,Set PRSTIMEDERR Interrupt Flag" "0,1"
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bitfld.long 0x00 27. " SCANPEND ,Set SCANPEND Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 26. " SCANEXTPEND ,Set SCANEXTPEND Interrupt Flag" "0,1"
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bitfld.long 0x00 25. " PROGERR ,Set PROGERR Interrupt Flag" "0,1"
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bitfld.long 0x00 24. " VREFOV ,Set VREFOV Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 17. " SCANCMP ,Set SCANCMP Interrupt Flag" "0,1"
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bitfld.long 0x00 16. " SINGLECMP ,Set SINGLECMP Interrupt Flag" "0,1"
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bitfld.long 0x00 11. " SCANUF ,Set SCANUF Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 10. " SINGLEUF ,Set SINGLEUF Interrupt Flag" "0,1"
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bitfld.long 0x00 9. " SCANOF ,Set SCANOF Interrupt Flag" "0,1"
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bitfld.long 0x00 8. " SINGLEOF ,Set SINGLEOF Interrupt Flag" "0,1"
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wgroup.long 0x40++0x3
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line.long 0x00 "IFC,Interrupt Flag Clear Register"
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bitfld.long 0x00 29. " EM23ERR ,Clear EM23ERR Interrupt Flag" "0,1"
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bitfld.long 0x00 28. " PRSTIMEDERR ,Clear PRSTIMEDERR Interrupt Flag" "0,1"
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bitfld.long 0x00 27. " SCANPEND ,Clear SCANPEND Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 26. " SCANEXTPEND ,Clear SCANEXTPEND Interrupt Flag" "0,1"
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bitfld.long 0x00 25. " PROGERR ,Clear PROGERR Interrupt Flag" "0,1"
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bitfld.long 0x00 24. " VREFOV ,Clear VREFOV Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 17. " SCANCMP ,Clear SCANCMP Interrupt Flag" "0,1"
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bitfld.long 0x00 16. " SINGLECMP ,Clear SINGLECMP Interrupt Flag" "0,1"
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bitfld.long 0x00 11. " SCANUF ,Clear SCANUF Interrupt Flag" "0,1"
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textline " "
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bitfld.long 0x00 10. " SINGLEUF ,Clear SINGLEUF Interrupt Flag" "0,1"
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bitfld.long 0x00 9. " SCANOF ,Clear SCANOF Interrupt Flag" "0,1"
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bitfld.long 0x00 8. " SINGLEOF ,Clear SINGLEOF Interrupt Flag" "0,1"
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group.long 0x44++0x3
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line.long 0x00 "IEN,Interrupt Enable Register"
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bitfld.long 0x00 29. " EM23ERR ,EM23ERR Interrupt Enable" "0,1"
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bitfld.long 0x00 28. " PRSTIMEDERR ,PRSTIMEDERR Interrupt Enable" "0,1"
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bitfld.long 0x00 27. " SCANPEND ,SCANPEND Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 26. " SCANEXTPEND ,SCANEXTPEND Interrupt Enable" "0,1"
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bitfld.long 0x00 25. " PROGERR ,PROGERR Interrupt Enable" "0,1"
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bitfld.long 0x00 24. " VREFOV ,VREFOV Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 17. " SCANCMP ,SCANCMP Interrupt Enable" "0,1"
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bitfld.long 0x00 16. " SINGLECMP ,SINGLECMP Interrupt Enable" "0,1"
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bitfld.long 0x00 11. " SCANUF ,SCANUF Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 10. " SINGLEUF ,SINGLEUF Interrupt Enable" "0,1"
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bitfld.long 0x00 9. " SCANOF ,SCANOF Interrupt Enable" "0,1"
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bitfld.long 0x00 8. " SINGLEOF ,SINGLEOF Interrupt Enable" "0,1"
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textline " "
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bitfld.long 0x00 1. " SCAN ,SCAN Interrupt Enable" "0,1"
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bitfld.long 0x00 0. " SINGLE ,SINGLE Interrupt Enable" "0,1"
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rgroup.long 0x48++0x3
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line.long 0x00 "SINGLEDATA,Single Conversion Result Data"
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hexmask.long 0x00 0.--31. 1. " DATA ,Single Conversion Result Data"
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rgroup.long 0x4C++0x3
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line.long 0x00 "SCANDATA,Scan Conversion Result Data"
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hexmask.long 0x00 0.--31. 1. " DATA ,Scan Conversion Result Data"
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rgroup.long 0x50++0x3
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line.long 0x00 "SINGLEDATAP,Single Conversion Result Data Peek Register"
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hexmask.long 0x00 0.--31. 1. " DATAP ,Single Conversion Result Data Peek"
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rgroup.long 0x54++0x3
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line.long 0x00 "SCANDATAP,Scan Sequence Result Data Peek Register"
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hexmask.long 0x00 0.--31. 1. " DATAP ,Scan Conversion Result Data Peek"
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rgroup.long 0x68++0x3
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line.long 0x00 "SCANDATAX,Scan Sequence Result Data + Data Source Register"
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bitfld.long 0x00 16.--20. " SCANINPUTID ,Scan Conversion Input ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Conversion Result Data"
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rgroup.long 0x6C++0x3
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line.long 0x00 "SCANDATAXP,Scan Sequence Result Data + Data Source Peek Register"
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bitfld.long 0x00 16.--20. " SCANINPUTIDPEEK ,Scan Conversion Data Source Peek" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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hexmask.long.word 0x00 0.--15. 1. " DATAP ,Scan Conversion Result Data Peek"
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rgroup.long 0x7C++0x3
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line.long 0x00 "APORTREQ,APORT Request Status Register"
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bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
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bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
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bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
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textline " "
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bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
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bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
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bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
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textline " "
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bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1Y is Requested" "0,1"
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bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
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bitfld.long 0x00 1. " APORT0YREQ ,1 If the Bus Connected to APORT0Y is Requested" "0,1"
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textline " "
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bitfld.long 0x00 0. " APORT0XREQ ,1 If the Bus Connected to APORT0X is Requested" "0,1"
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rgroup.long 0x80++0x3
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line.long 0x00 "APORTCONFLICT,APORT Conflict Status Register"
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bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
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textline " "
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bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
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textline " "
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bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 1. " APORT0YCONFLICT ,1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral" "0,1"
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textline " "
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bitfld.long 0x00 0. " APORT0XCONFLICT ,1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral" "0,1"
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rgroup.long 0x84++0x3
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line.long 0x00 "SINGLEFIFOCOUNT,Single FIFO Count Register"
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bitfld.long 0x00 0.--2. " SINGLEDC ,Single Data Count" "0,1,2,3,4,5,6,7"
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rgroup.long 0x88++0x3
|
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line.long 0x00 "SCANFIFOCOUNT,Scan FIFO Count Register"
|
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bitfld.long 0x00 0.--2. " SCANDC ,Scan Data Count" "0,1,2,3,4,5,6,7"
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wgroup.long 0x8C++0x3
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line.long 0x00 "SINGLEFIFOCLEAR,Single FIFO Clear Register"
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bitfld.long 0x00 0. " SINGLEFIFOCLEAR ,Clear Single FIFO Content" "0,1"
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wgroup.long 0x90++0x3
|
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line.long 0x00 "SCANFIFOCLEAR,Scan FIFO Clear Register"
|
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bitfld.long 0x00 0. " SCANFIFOCLEAR ,Clear Scan FIFO Content" "0,1"
|
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group.long 0x94++0x3
|
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line.long 0x00 "APORTMASTERDIS,APORT Bus Master Disable Register"
|
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bitfld.long 0x00 9. " APORT4YMASTERDIS ,APORT4Y Master Disable" "0,1"
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bitfld.long 0x00 8. " APORT4XMASTERDIS ,APORT4X Master Disable" "0,1"
|
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bitfld.long 0x00 7. " APORT3YMASTERDIS ,APORT3Y Master Disable" "0,1"
|
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textline " "
|
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bitfld.long 0x00 6. " APORT3XMASTERDIS ,APORT3X Master Disable" "0,1"
|
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bitfld.long 0x00 5. " APORT2YMASTERDIS ,APORT2Y Master Disable" "0,1"
|
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bitfld.long 0x00 4. " APORT2XMASTERDIS ,APORT2X Master Disable" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 3. " APORT1YMASTERDIS ,APORT1Y Master Disable" "0,1"
|
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bitfld.long 0x00 2. " APORT1XMASTERDIS ,APORT1X Master Disable" "0,1"
|
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width 0x0B
|
|
tree.end
|
|
tree "ACMP0"
|
|
base ad:0x40000000
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full Bias Current" "0,1"
|
|
bitfld.long 0x00 24.--29. " BIASPROG ,Bias Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
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bitfld.long 0x00 21. " IFALL ,Falling Edge Interrupt Sense" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " IRISE ,Rising Edge Interrupt Sense" "0,1"
|
|
bitfld.long 0x00 18.--19. " INPUTRANGE ,Input Range" "FULL,GTVDDDIV2,LTVDDDIV2,3"
|
|
bitfld.long 0x00 15. " ACCURACY ,ACMP Accuracy Mode" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 12.--14. " PWRSEL ,Power Select" "AVDD,DVDD,IOVDD0,3,IOVDD1,5,6,7"
|
|
bitfld.long 0x00 10. " APORTVMASTERDIS ,APORT Bus Master Disable for Bus Selected By VASEL" "0,1"
|
|
bitfld.long 0x00 9. " APORTYMASTERDIS ,APORT Bus Y Master Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " APORTXMASTERDIS ,APORT Bus X Master Disable" "0,1"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO Output Invert" "0,1"
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog Comparator Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x00 28.--30. " CSRESSEL ,Capacitive Sense Mode Internal Resistor Select" "RES0,RES1,RES2,RES3,RES4,RES5,RES6,RES7"
|
|
bitfld.long 0x00 26. " CSRESEN ,Capacitive Sense Mode Internal Resistor Enable" "0,1"
|
|
bitfld.long 0x00 24. " VLPSEL ,Low-Power Sampled Voltage Selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " VBSEL ,VB Selection" "0,1"
|
|
bitfld.long 0x00 16.--21. " VASEL ,VA Selection" "VDD,APORT2YCH0,2,APORT2YCH2,4,APORT2YCH4,6,APORT2YCH6,8,APORT2YCH8,10,APORT2YCH10,12,APORT2YCH12,14,APORT2YCH14,16,APORT2YCH16,18,APORT2YCH18,20,APORT2YCH20,22,APORT2YCH22,24,APORT2YCH24,26,APORT2YCH26,28,APORT2YCH28,30,APORT2YCH30,APORT1XCH0,APORT1YCH1,APORT1XCH2,APORT1YCH3,APORT1XCH4,APORT1YCH5,APORT1XCH6,APORT1YCH7,APORT1XCH8,APORT1YCH9,APORT1XCH10,APORT1YCH11,APORT1XCH12,APORT1YCH13,APORT1XCH14,APORT1YCH15,APORT1XCH16,APORT1YCH17,APORT1XCH18,APORT1YCH19,APORT1XCH20,APORT1YCH21,APORT1XCH22,APORT1YCH23,APORT1XCH24,APORT1YCH25,APORT1XCH26,APORT1YCH27,APORT1XCH28,APORT1YCH29,APORT1XCH30,APORT1YCH31"
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|
hexmask.long.byte 0x00 8.--15. 1. " NEGSEL ,Negative Input Select"
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|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " POSSEL ,Positive Input Select"
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|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 3. " EXTIFACT ,External Override Interface Active" "0,1"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,APORT Conflict Output" "0,1"
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|
bitfld.long 0x00 1. " ACMPOUT ,Analog Comparator Output" "0,1"
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|
textline " "
|
|
bitfld.long 0x00 0. " ACMPACT ,Analog Comparator Active" "0,1"
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|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
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|
bitfld.long 0x00 2. " APORTCONFLICT ,APORT Conflict Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,Warm-up Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " EDGE ,Edge Triggered Interrupt Flag" "0,1"
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|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,Set WARMUP Interrupt Flag" "0,1"
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|
bitfld.long 0x00 0. " EDGE ,Set EDGE Interrupt Flag" "0,1"
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|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
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|
bitfld.long 0x00 2. " APORTCONFLICT ,Clear APORTCONFLICT Interrupt Flag" "0,1"
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|
bitfld.long 0x00 1. " WARMUP ,Clear WARMUP Interrupt Flag" "0,1"
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|
bitfld.long 0x00 0. " EDGE ,Clear EDGE Interrupt Flag" "0,1"
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|
group.long 0x18++0x3
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|
line.long 0x00 "IEN,Interrupt Enable Register"
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|
bitfld.long 0x00 2. " APORTCONFLICT ,APORTCONFLICT Interrupt Enable" "0,1"
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|
bitfld.long 0x00 1. " WARMUP ,WARMUP Interrupt Enable" "0,1"
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|
bitfld.long 0x00 0. " EDGE ,EDGE Interrupt Enable" "0,1"
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|
rgroup.long 0x20++0x3
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|
line.long 0x00 "APORTREQ,APORT Request Status Register"
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|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
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|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
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|
textline " "
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|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
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|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
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|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
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|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
bitfld.long 0x00 1. " APORT0YREQ ,1 If the Bus Connected to APORT0Y is Requested" "0,1"
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|
textline " "
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|
bitfld.long 0x00 0. " APORT0XREQ ,1 If the Bus Connected to APORT0X is Requested" "0,1"
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|
rgroup.long 0x24++0x3
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|
line.long 0x00 "APORTCONFLICT,APORT Conflict Status Register"
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|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
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|
textline " "
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|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 1. " APORT0YCONFLICT ,1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APORT0XCONFLICT ,1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "HYSTERESIS0,Hysteresis 0 Register"
|
|
bitfld.long 0x00 24.--29. " DIVVB ,Divider for VB Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--21. " DIVVA ,Divider for VA Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--3. " HYST ,Hysteresis Select When ACMPOUT=0" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7,HYST8,HYST9,HYST10,HYST11,HYST12,HYST13,HYST14,HYST15"
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|
group.long 0x2C++0x3
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|
line.long 0x00 "HYSTERESIS1,Hysteresis 1 Register"
|
|
bitfld.long 0x00 24.--29. " DIVVB ,Divider for VB Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--21. " DIVVA ,Divider for VA Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--3. " HYST ,Hysteresis Select When ACMPOUT=1" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7,HYST8,HYST9,HYST10,HYST11,HYST12,HYST13,HYST14,HYST15"
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|
group.long 0x40++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pine Enable Register"
|
|
bitfld.long 0x00 0. " OUTPEN ,ACMP Output Pin Enable" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 0.--5. " OUTLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
group.long 0x48++0x3
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|
line.long 0x00 "EXTIFCTRL,External Override Interface Control"
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|
bitfld.long 0x00 4.--7. " APORTSEL ,APORT Selection for External Interface" "APORT0X,APORT0Y,APORT1X,APORT1Y,APORT1XY,APORT2X,APORT2Y,APORT2YX,APORT3X,APORT3Y,APORT3XY,APORT4X,APORT4Y,APORT4YX,14,15"
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|
bitfld.long 0x00 0. " EN ,Enable External Interface" "0,1"
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|
width 0x0B
|
|
tree.end
|
|
tree "ACMP1"
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|
base ad:0x40000400
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " FULLBIAS ,Full Bias Current" "0,1"
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|
bitfld.long 0x00 24.--29. " BIASPROG ,Bias Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 21. " IFALL ,Falling Edge Interrupt Sense" "0,1"
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|
textline " "
|
|
bitfld.long 0x00 20. " IRISE ,Rising Edge Interrupt Sense" "0,1"
|
|
bitfld.long 0x00 18.--19. " INPUTRANGE ,Input Range" "FULL,GTVDDDIV2,LTVDDDIV2,3"
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|
bitfld.long 0x00 15. " ACCURACY ,ACMP Accuracy Mode" "0,1"
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|
textline " "
|
|
bitfld.long 0x00 12.--14. " PWRSEL ,Power Select" "AVDD,DVDD,IOVDD0,3,IOVDD1,5,6,7"
|
|
bitfld.long 0x00 10. " APORTVMASTERDIS ,APORT Bus Master Disable for Bus Selected By VASEL" "0,1"
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|
bitfld.long 0x00 9. " APORTYMASTERDIS ,APORT Bus Y Master Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " APORTXMASTERDIS ,APORT Bus X Master Disable" "0,1"
|
|
bitfld.long 0x00 3. " GPIOINV ,Comparator GPIO Output Invert" "0,1"
|
|
bitfld.long 0x00 2. " INACTVAL ,Inactive Value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Analog Comparator Enable" "0,1"
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|
group.long 0x4++0x3
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|
line.long 0x00 "INPUTSEL,Input Selection Register"
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|
bitfld.long 0x00 28.--30. " CSRESSEL ,Capacitive Sense Mode Internal Resistor Select" "RES0,RES1,RES2,RES3,RES4,RES5,RES6,RES7"
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|
bitfld.long 0x00 26. " CSRESEN ,Capacitive Sense Mode Internal Resistor Enable" "0,1"
|
|
bitfld.long 0x00 24. " VLPSEL ,Low-Power Sampled Voltage Selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " VBSEL ,VB Selection" "0,1"
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|
bitfld.long 0x00 16.--21. " VASEL ,VA Selection" "VDD,APORT2YCH0,2,APORT2YCH2,4,APORT2YCH4,6,APORT2YCH6,8,APORT2YCH8,10,APORT2YCH10,12,APORT2YCH12,14,APORT2YCH14,16,APORT2YCH16,18,APORT2YCH18,20,APORT2YCH20,22,APORT2YCH22,24,APORT2YCH24,26,APORT2YCH26,28,APORT2YCH28,30,APORT2YCH30,APORT1XCH0,APORT1YCH1,APORT1XCH2,APORT1YCH3,APORT1XCH4,APORT1YCH5,APORT1XCH6,APORT1YCH7,APORT1XCH8,APORT1YCH9,APORT1XCH10,APORT1YCH11,APORT1XCH12,APORT1YCH13,APORT1XCH14,APORT1YCH15,APORT1XCH16,APORT1YCH17,APORT1XCH18,APORT1YCH19,APORT1XCH20,APORT1YCH21,APORT1XCH22,APORT1YCH23,APORT1XCH24,APORT1YCH25,APORT1XCH26,APORT1YCH27,APORT1XCH28,APORT1YCH29,APORT1XCH30,APORT1YCH31"
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|
hexmask.long.byte 0x00 8.--15. 1. " NEGSEL ,Negative Input Select"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " POSSEL ,Positive Input Select"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 3. " EXTIFACT ,External Override Interface Active" "0,1"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,APORT Conflict Output" "0,1"
|
|
bitfld.long 0x00 1. " ACMPOUT ,Analog Comparator Output" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ACMPACT ,Analog Comparator Active" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,APORT Conflict Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,Warm-up Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " EDGE ,Edge Triggered Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,Set WARMUP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " EDGE ,Set EDGE Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,Clear APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,Clear WARMUP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " EDGE ,Clear EDGE Interrupt Flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 2. " APORTCONFLICT ,APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " WARMUP ,WARMUP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " EDGE ,EDGE Interrupt Enable" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "APORTREQ,APORT Request Status Register"
|
|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
bitfld.long 0x00 1. " APORT0YREQ ,1 If the Bus Connected to APORT0Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APORT0XREQ ,1 If the Bus Connected to APORT0X is Requested" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "APORTCONFLICT,APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 1. " APORT0YCONFLICT ,1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " APORT0XCONFLICT ,1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "HYSTERESIS0,Hysteresis 0 Register"
|
|
bitfld.long 0x00 24.--29. " DIVVB ,Divider for VB Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " DIVVA ,Divider for VA Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " HYST ,Hysteresis Select When ACMPOUT=0" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7,HYST8,HYST9,HYST10,HYST11,HYST12,HYST13,HYST14,HYST15"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "HYSTERESIS1,Hysteresis 1 Register"
|
|
bitfld.long 0x00 24.--29. " DIVVB ,Divider for VB Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " DIVVA ,Divider for VA Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--3. " HYST ,Hysteresis Select When ACMPOUT=1" "HYST0,HYST1,HYST2,HYST3,HYST4,HYST5,HYST6,HYST7,HYST8,HYST9,HYST10,HYST11,HYST12,HYST13,HYST14,HYST15"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pine Enable Register"
|
|
bitfld.long 0x00 0. " OUTPEN ,ACMP Output Pin Enable" "0,1"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 0.--5. " OUTLOC ,I/O Location" "LOC0,LOC1,LOC2,LOC3,LOC4,LOC5,LOC6,LOC7,LOC8,LOC9,LOC10,LOC11,LOC12,LOC13,LOC14,LOC15,LOC16,LOC17,LOC18,LOC19,LOC20,LOC21,LOC22,LOC23,LOC24,LOC25,LOC26,LOC27,LOC28,LOC29,LOC30,LOC31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "EXTIFCTRL,External Override Interface Control"
|
|
bitfld.long 0x00 4.--7. " APORTSEL ,APORT Selection for External Interface" "APORT0X,APORT0Y,APORT1X,APORT1Y,APORT1XY,APORT2X,APORT2Y,APORT2YX,APORT3X,APORT3Y,APORT3XY,APORT4X,APORT4Y,APORT4YX,14,15"
|
|
bitfld.long 0x00 0. " EN ,Enable External Interface" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "VDAC0"
|
|
base ad:0x40008000
|
|
width 20.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " DACCLKMODE ,Clock Mode" "0,1"
|
|
bitfld.long 0x00 28. " WARMUPMODE ,Warm-up Mode" "0,1"
|
|
bitfld.long 0x00 24.--25. " REFRESHPERIOD ,Refresh Period" "8CYCLES,16CYCLES,32CYCLES,64CYCLES"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--22. 1. " PRESC ,Prescaler Setting for DAC Clock"
|
|
bitfld.long 0x00 8.--10. " REFSEL ,Reference Selection" "1V25LN,2V5LN,1V25,2V5,VDD,5,EXT,7"
|
|
bitfld.long 0x00 6. " CH0PRESCRST ,Channel 0 Start Reset Prescaler" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OUTENPRS ,PRS Controlled Output Enable" "0,1"
|
|
bitfld.long 0x00 4. " SINEMODE ,Sine Mode" "0,1"
|
|
bitfld.long 0x00 0. " DIFF ,Differential Mode" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 30. " OPA2OUTVALID ,OPA2 Output Valid Status" "0,1"
|
|
bitfld.long 0x00 29. " OPA1OUTVALID ,OPA1 Output Valid Status" "0,1"
|
|
bitfld.long 0x00 28. " OPA0OUTVALID ,OPA0 Output Valid Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 26. " OPA2WARM ,OPA2 Warm Status" "0,1"
|
|
bitfld.long 0x00 25. " OPA1WARM ,OPA1 Warm Status" "0,1"
|
|
bitfld.long 0x00 24. " OPA0WARM ,OPA0 Warm Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " OPA2ENS ,OPA2 Enabled Status" "0,1"
|
|
bitfld.long 0x00 21. " OPA1ENS ,OPA1 Enabled Status" "0,1"
|
|
bitfld.long 0x00 20. " OPA0ENS ,OPA0 Enabled Status" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA2APORTCONFLICT ,OPA2 Bus Conflict Output" "0,1"
|
|
bitfld.long 0x00 17. " OPA1APORTCONFLICT ,OPA1 Bus Conflict Output" "0,1"
|
|
bitfld.long 0x00 16. " OPA0APORTCONFLICT ,OPA0 Bus Conflict Output" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1WARM ,Channel 1 Warm" "0,1"
|
|
bitfld.long 0x00 4. " CH0WARM ,Channel 0 Warm" "0,1"
|
|
bitfld.long 0x00 3. " CH1BL ,Channel 1 Buffer Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH0BL ,Channel 0 Buffer Level" "0,1"
|
|
bitfld.long 0x00 1. " CH1ENS ,Channel 1 Enabled Status" "0,1"
|
|
bitfld.long 0x00 0. " CH0ENS ,Channel 0 Enabled Status" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "CH0CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 12.--15. " PRSSEL ,Channel 0 PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 8. " PRSASYNC ,Channel 0 PRS Asynchronous Enable" "0,1"
|
|
bitfld.long 0x00 4.--6. " TRIGMODE ,Channel 0 Trigger Mode" "SW,PRS,REFRESH,SWPRS,SWREFRESH,LESENSE,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CONVMODE ,Conversion Mode" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "CH1CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 12.--15. " PRSSEL ,Channel 1 PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 8. " PRSASYNC ,Channel 1 PRS Asynchronous Enable" "0,1"
|
|
bitfld.long 0x00 4.--6. " TRIGMODE ,Channel 1 Trigger Mode" "SW,PRS,REFRESH,SWPRS,SWREFRESH,LESENSE,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CONVMODE ,Conversion Mode" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 21. " OPA2DIS ,OPA2 Disable" "0,1"
|
|
bitfld.long 0x00 20. " OPA2EN ,OPA2 Enable" "0,1"
|
|
bitfld.long 0x00 19. " OPA1DIS ,OPA1 Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA1EN ,OPA1 Enable" "0,1"
|
|
bitfld.long 0x00 17. " OPA0DIS ,OPA0 Disable" "0,1"
|
|
bitfld.long 0x00 16. " OPA0EN ,OPA0 Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH1DIS ,DAC Channel 1 Disable" "0,1"
|
|
bitfld.long 0x00 2. " CH1EN ,DAC Channel 1 Enable" "0,1"
|
|
bitfld.long 0x00 1. " CH0DIS ,DAC Channel 0 Disable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH0EN ,DAC Channel 0 Enable" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 30. " OPA2OUTVALID ,OPA3 Output Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " OPA1OUTVALID ,OPA1 Output Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " OPA0OUTVALID ,OPA0 Output Valid Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " OPA2PRSTIMEDERR ,OPA2 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " OPA1PRSTIMEDERR ,OPA1 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " OPA0PRSTIMEDERR ,OPA0 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA2APORTCONFLICT ,OPA2 Bus Conflict Output Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " OPA1APORTCONFLICT ,OPA1 Bus Conflict Output Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " OPA0APORTCONFLICT ,OPA0 Bus Conflict Output Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EM23ERR ,EM2/3 Entry Error Flag" "0,1"
|
|
bitfld.long 0x00 7. " CH1BL ,Channel 1 Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CH0BL ,Channel 0 Buffer Level Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1UF ,Channel 1 Data Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CH0UF ,Channel 0 Data Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CH1OF ,Channel 1 Data Overflow Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH0OF ,Channel 0 Data Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " CH1CD ,Channel 1 Conversion Done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CH0CD ,Channel 0 Conversion Done Interrupt Flag" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 30. " OPA2OUTVALID ,Set OPA2OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " OPA1OUTVALID ,Set OPA1OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " OPA0OUTVALID ,Set OPA0OUTVALID Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " OPA2PRSTIMEDERR ,Set OPA2PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " OPA1PRSTIMEDERR ,Set OPA1PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " OPA0PRSTIMEDERR ,Set OPA0PRSTIMEDERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA2APORTCONFLICT ,Set OPA2APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " OPA1APORTCONFLICT ,Set OPA1APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " OPA0APORTCONFLICT ,Set OPA0APORTCONFLICT Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EM23ERR ,Set EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CH1UF ,Set CH1UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CH0UF ,Set CH0UF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH1OF ,Set CH1OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CH0OF ,Set CH0OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " CH1CD ,Set CH1CD Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH0CD ,Set CH0CD Interrupt Flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 30. " OPA2OUTVALID ,Clear OPA2OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. " OPA1OUTVALID ,Clear OPA1OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. " OPA0OUTVALID ,Clear OPA0OUTVALID Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " OPA2PRSTIMEDERR ,Clear OPA2PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " OPA1PRSTIMEDERR ,Clear OPA1PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " OPA0PRSTIMEDERR ,Clear OPA0PRSTIMEDERR Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA2APORTCONFLICT ,Clear OPA2APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " OPA1APORTCONFLICT ,Clear OPA1APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. " OPA0APORTCONFLICT ,Clear OPA0APORTCONFLICT Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EM23ERR ,Clear EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CH1UF ,Clear CH1UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. " CH0UF ,Clear CH0UF Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH1OF ,Clear CH1OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CH0OF ,Clear CH0OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. " CH1CD ,Clear CH1CD Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH0CD ,Clear CH0CD Interrupt Flag" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 30. " OPA2OUTVALID ,OPA2OUTVALID Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 29. " OPA1OUTVALID ,OPA1OUTVALID Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. " OPA0OUTVALID ,OPA0OUTVALID Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " OPA2PRSTIMEDERR ,OPA2PRSTIMEDERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 21. " OPA1PRSTIMEDERR ,OPA1PRSTIMEDERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. " OPA0PRSTIMEDERR ,OPA0PRSTIMEDERR Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " OPA2APORTCONFLICT ,OPA2APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. " OPA1APORTCONFLICT ,OPA1APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. " OPA0APORTCONFLICT ,OPA0APORTCONFLICT Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EM23ERR ,EM23ERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. " CH1BL ,CH1BL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CH0BL ,CH0BL Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH1UF ,CH1UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. " CH0UF ,CH0UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " CH1OF ,CH1OF Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH0OF ,CH0OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. " CH1CD ,CH1CD Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " CH0CD ,CH0CD Interrupt Enable" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "CH0DATA,Channel 0 Data Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,Channel 0 Data"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "CH1DATA,Channel 1 Data Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,Channel 1 Data"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "COMBDATA,Combined Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " CH1DATA ,Channel 1 Data"
|
|
hexmask.long.word 0x00 0.--11. 1. " CH0DATA ,Channel 0 Data"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "CAL,Calibration Register"
|
|
bitfld.long 0x00 16.--19. " GAINERRTRIMCH1 ,Gain Error Trim Value for CH1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--13. " GAINERRTRIM ,Gain Error Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--2. " OFFSETTRIM ,Input Buffer Offset Calibration Value" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xA0++0x3
|
|
line.long 0x00 "OPA0_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0xA4++0x3
|
|
line.long 0x00 "OPA0_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0xA8++0x3
|
|
line.long 0x00 "OPA0_CTRL,Operational Amplifier Control Register"
|
|
bitfld.long 0x00 21. " APORTYMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 20. " APORTXMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 16. " PRSOUTMODE ,OPAx PRS Output Select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " PRSSEL ,OPAx PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 9. " PRSMODE ,OPAx PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 8. " PRSEN ,OPAx PRS Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTSCALE ,Scale OPAx Output Driving Strength" "0,1"
|
|
bitfld.long 0x00 3. " HCMDIS ,High Common Mode Disable" "0,1"
|
|
bitfld.long 0x00 2. " INCBW ,OPAx Unity Gain Bandwidth Scale" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DRIVESTRENGTH ,OPAx Operation Mode" "0,1,2,3"
|
|
group.long 0xAC++0x3
|
|
line.long 0x00 "OPA0_TIMER,Operational Amplifier Timer Control Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " SETTLETIME ,OPAx Output Settling Timeout Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. " WARMUPTIME ,OPAx Warmup Time Count Value"
|
|
bitfld.long 0x00 0.--5. " STARTUPDLY ,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "OPA0_MUX,Operational Amplifier Mux Configuration Register"
|
|
bitfld.long 0x00 24.--26. " RESSEL ,OPAx Resistor Ladder Select" "RES0,RES1,RES2,RES3,RES4,RES5,RES6,RES7"
|
|
bitfld.long 0x00 20. " GAIN3X ,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
|
|
bitfld.long 0x00 16.--18. " RESINMUX ,OPAx Resistor Ladder Input Mux" "DISABLE,OPANEXT,NEGPAD,POSPAD,COMPAD,CENTER,VSS,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " NEGSEL ,OPAx Inverting Input Mux"
|
|
hexmask.long.byte 0x00 0.--7. 1. " POSSEL ,OPAx Non-inverting Input Mux"
|
|
group.long 0xB4++0x3
|
|
line.long 0x00 "OPA0_OUT,Operational Amplifier Output Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " APORTOUTSEL ,OPAx APORT Output"
|
|
bitfld.long 0x00 4.--8. " ALTOUTPADEN ,OPAx Output Enable Value" "0,OUT0,OUT1,3,OUT2,5,6,7,OUT3,9,10,11,12,13,14,15,OUT4,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " SHORT ,OPAx Main and Alternative Output Short" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " APORTOUTEN ,OPAx Aport Output Enable" "0,1"
|
|
bitfld.long 0x00 1. " ALTOUTEN ,OPAx Alternative Output Enable" "0,1"
|
|
bitfld.long 0x00 0. " MAINOUTEN ,OPAx Main Output Enable" "0,1"
|
|
group.long 0xB8++0x3
|
|
line.long 0x00 "OPA0_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. " OFFSETN ,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. " OFFSETP ,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17.--18. " GM3 ,Gm3 Trim Value" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " GM ,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--11. " CM3 ,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. " CM2 ,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CM1 ,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xC0++0x3
|
|
line.long 0x00 "OPA1_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0xC4++0x3
|
|
line.long 0x00 "OPA1_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0xC8++0x3
|
|
line.long 0x00 "OPA1_CTRL,Operational Amplifier Control Register"
|
|
bitfld.long 0x00 21. " APORTYMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 20. " APORTXMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 16. " PRSOUTMODE ,OPAx PRS Output Select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " PRSSEL ,OPAx PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 9. " PRSMODE ,OPAx PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 8. " PRSEN ,OPAx PRS Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTSCALE ,Scale OPAx Output Driving Strength" "0,1"
|
|
bitfld.long 0x00 3. " HCMDIS ,High Common Mode Disable" "0,1"
|
|
bitfld.long 0x00 2. " INCBW ,OPAx Unity Gain Bandwidth Scale" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DRIVESTRENGTH ,OPAx Operation Mode" "0,1,2,3"
|
|
group.long 0xCC++0x3
|
|
line.long 0x00 "OPA1_TIMER,Operational Amplifier Timer Control Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " SETTLETIME ,OPAx Output Settling Timeout Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. " WARMUPTIME ,OPAx Warmup Time Count Value"
|
|
bitfld.long 0x00 0.--5. " STARTUPDLY ,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD0++0x3
|
|
line.long 0x00 "OPA1_MUX,Operational Amplifier Mux Configuration Register"
|
|
bitfld.long 0x00 24.--26. " RESSEL ,OPAx Resistor Ladder Select" "RES0,RES1,RES2,RES3,RES4,RES5,RES6,RES7"
|
|
bitfld.long 0x00 20. " GAIN3X ,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
|
|
bitfld.long 0x00 16.--18. " RESINMUX ,OPAx Resistor Ladder Input Mux" "DISABLE,OPANEXT,NEGPAD,POSPAD,COMPAD,CENTER,VSS,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " NEGSEL ,OPAx Inverting Input Mux"
|
|
hexmask.long.byte 0x00 0.--7. 1. " POSSEL ,OPAx Non-inverting Input Mux"
|
|
group.long 0xD4++0x3
|
|
line.long 0x00 "OPA1_OUT,Operational Amplifier Output Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " APORTOUTSEL ,OPAx APORT Output"
|
|
bitfld.long 0x00 4.--8. " ALTOUTPADEN ,OPAx Output Enable Value" "0,OUT0,OUT1,3,OUT2,5,6,7,OUT3,9,10,11,12,13,14,15,OUT4,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " SHORT ,OPAx Main and Alternative Output Short" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " APORTOUTEN ,OPAx Aport Output Enable" "0,1"
|
|
bitfld.long 0x00 1. " ALTOUTEN ,OPAx Alternative Output Enable" "0,1"
|
|
bitfld.long 0x00 0. " MAINOUTEN ,OPAx Main Output Enable" "0,1"
|
|
group.long 0xD8++0x3
|
|
line.long 0x00 "OPA1_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. " OFFSETN ,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. " OFFSETP ,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17.--18. " GM3 ,Gm3 Trim Value" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " GM ,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--11. " CM3 ,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. " CM2 ,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CM1 ,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x00 "OPA2_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0xE4++0x3
|
|
line.long 0x00 "OPA2_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0xE8++0x3
|
|
line.long 0x00 "OPA2_CTRL,Operational Amplifier Control Register"
|
|
bitfld.long 0x00 21. " APORTYMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 20. " APORTXMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 16. " PRSOUTMODE ,OPAx PRS Output Select" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " PRSSEL ,OPAx PRS Trigger Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 9. " PRSMODE ,OPAx PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 8. " PRSEN ,OPAx PRS Trigger Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTSCALE ,Scale OPAx Output Driving Strength" "0,1"
|
|
bitfld.long 0x00 3. " HCMDIS ,High Common Mode Disable" "0,1"
|
|
bitfld.long 0x00 2. " INCBW ,OPAx Unity Gain Bandwidth Scale" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DRIVESTRENGTH ,OPAx Operation Mode" "0,1,2,3"
|
|
group.long 0xEC++0x3
|
|
line.long 0x00 "OPA2_TIMER,Operational Amplifier Timer Control Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " SETTLETIME ,OPAx Output Settling Timeout Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. " WARMUPTIME ,OPAx Warmup Time Count Value"
|
|
bitfld.long 0x00 0.--5. " STARTUPDLY ,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xF0++0x3
|
|
line.long 0x00 "OPA2_MUX,Operational Amplifier Mux Configuration Register"
|
|
bitfld.long 0x00 24.--26. " RESSEL ,OPAx Resistor Ladder Select" "RES0,RES1,RES2,RES3,RES4,RES5,RES6,RES7"
|
|
bitfld.long 0x00 20. " GAIN3X ,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
|
|
bitfld.long 0x00 16.--18. " RESINMUX ,OPAx Resistor Ladder Input Mux" "DISABLE,OPANEXT,NEGPAD,POSPAD,COMPAD,CENTER,VSS,7"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " NEGSEL ,OPAx Inverting Input Mux"
|
|
hexmask.long.byte 0x00 0.--7. 1. " POSSEL ,OPAx Non-inverting Input Mux"
|
|
group.long 0xF4++0x3
|
|
line.long 0x00 "OPA2_OUT,Operational Amplifier Output Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " APORTOUTSEL ,OPAx APORT Output"
|
|
bitfld.long 0x00 4.--8. " ALTOUTPADEN ,OPAx Output Enable Value" "0,OUT0,OUT1,3,OUT2,5,6,7,OUT3,9,10,11,12,13,14,15,OUT4,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 3. " SHORT ,OPAx Main and Alternative Output Short" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " APORTOUTEN ,OPAx Aport Output Enable" "0,1"
|
|
bitfld.long 0x00 1. " ALTOUTEN ,OPAx Alternative Output Enable" "0,1"
|
|
bitfld.long 0x00 0. " MAINOUTEN ,OPAx Main Output Enable" "0,1"
|
|
group.long 0xF8++0x3
|
|
line.long 0x00 "OPA2_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. " OFFSETN ,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. " OFFSETP ,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17.--18. " GM3 ,Gm3 Trim Value" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " GM ,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--11. " CM3 ,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. " CM2 ,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " CM1 ,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CSEN"
|
|
base ad:0x4001F000
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control"
|
|
bitfld.long 0x00 28. " CPACCURACY ,Charge Pump Accuracy" "0,1"
|
|
bitfld.long 0x00 27. " LOCALSENS ,Local Sensing Enable" "0,1"
|
|
bitfld.long 0x00 26. " WARMUPMODE ,Select Warmup Mode for CSEN" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EMACMPEN ,Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled" "0,1"
|
|
bitfld.long 0x00 24. " MXUC ,CSEN Mux Disconnect" "0,1"
|
|
bitfld.long 0x00 23. " AUTOGND ,CSEN Automatic Ground Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CHOPEN ,CSEN Chop Enable" "0,1"
|
|
bitfld.long 0x00 21. " CONVSEL ,CSEN Converter Select" "0,1"
|
|
bitfld.long 0x00 20. " DMAEN ,CSEN DMA Enable Bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DRSF ,CSEN Disable Right-Shift" "0,1"
|
|
bitfld.long 0x00 18. " CMPEN ,CSEN Digital Comparator Enable" "0,1"
|
|
bitfld.long 0x00 16.--17. " STM ,Start Trigger Select" "PRS,TIMER,START,3"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MCEN ,CSEN Multiple Channel Enable" "0,1"
|
|
bitfld.long 0x00 12.--14. " ACU ,CSEN Accumulator Mode Select" "ACC1,ACC2,ACC4,ACC8,ACC16,ACC32,ACC64,7"
|
|
bitfld.long 0x00 8.--9. " SARCR ,SAR Conversion Resolution" "CLK10,CLK12,CLK14,CLK16"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CM ,CSEN Conversion Mode Select" "SGL,SCAN,CONTSGL,CONTSCAN"
|
|
bitfld.long 0x00 2. " CMPPOL ,CSEN Digital Comparator Polarity Select" "0,1"
|
|
bitfld.long 0x00 1. " EN ,CSEN Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "TIMCTRL,Timing Control"
|
|
bitfld.long 0x00 16.--17. " WARMUPCNT ,Warmup Period Counter" "0,1,2,3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PCTOP ,Period Counter Top Value"
|
|
bitfld.long 0x00 0.--2. " PCPRESC ,Period Counter Prescaler" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x00 "CMD,Command"
|
|
bitfld.long 0x00 0. " START ,Start Software-Triggered Conversions" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "STATUS,Status"
|
|
bitfld.long 0x00 0. " CSENBUSY ,Busy Flag" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PRSSEL,PRS Select"
|
|
bitfld.long 0x00 0.--3. " PRSSEL ,PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DATA,Output Data"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Output Data"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SCANMASK0,Scan Channel Mask 0"
|
|
hexmask.long 0x00 0.--31. 1. " SCANINPUTEN ,Scan Channel Mask"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "SCANINPUTSEL0,Scan Input Selection 0"
|
|
bitfld.long 0x00 24.--27. " INPUT24TO31SEL ,CSEN_INPUT24-31 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
bitfld.long 0x00 16.--19. " INPUT16TO23SEL ,CSEN_INPUT16-23 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
bitfld.long 0x00 8.--11. " INPUT8TO15SEL ,CSEN_INPUT8-15 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " INPUT0TO7SEL ,CSEN_INPUT0-7 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "SCANMASK1,Scan Channel Mask 1"
|
|
hexmask.long 0x00 0.--31. 1. " SCANINPUTEN ,Scan Channel Mask"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "SCANINPUTSEL1,Scan Input Selection 1"
|
|
bitfld.long 0x00 24.--27. " INPUT56TO63SEL ,CSEN_INPUT56-63 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
bitfld.long 0x00 16.--19. " INPUT48TO55SEL ,CSEN_INPUT48-55 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
bitfld.long 0x00 8.--11. " INPUT40TO47SEL ,CSEN_INPUT40-47 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " INPUT32TO39SEL ,CSEN_INPUT32-39 Select" "0,1,2,3,APORT1CH0TO7,APORT1CH8TO15,APORT1CH16TO23,APORT1CH24TO31,8,9,10,11,APORT3CH0TO7,APORT3CH8TO15,APORT3CH16TO23,APORT3CH24TO31"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "APORTREQ,APORT Request Status"
|
|
bitfld.long 0x00 9. " APORT4YREQ ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XREQ ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YREQ ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XREQ ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YREQ ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "APORTCONFLICT,APORT Request Conflict"
|
|
bitfld.long 0x00 9. " APORT4YCONFLICT ,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. " APORT4XCONFLICT ,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 7. " APORT3YCONFLICT ,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " APORT3XCONFLICT ,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 5. " APORT2YCONFLICT ,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. " APORT2XCONFLICT ,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "CMPTHR,Comparator Threshold"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMPTHR ,Comparator Threshold"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "EMA,Exponential Moving Average"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. " EMA ,Calculated Exponential Moving Average"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "EMACTRL,Exponential Moving Average Control"
|
|
bitfld.long 0x00 0.--2. " EMASAMPLE ,EMA Sample Weight" "W1,W2,W4,W8,W16,W32,W64,7"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "SINGLECTRL,Single Conversion Control"
|
|
hexmask.long.byte 0x00 4.--10. 1. " SINGLESEL ,Single Channel Input Select"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "DMBASELINE,Delta Modulation Baseline"
|
|
hexmask.long.word 0x00 16.--31. 1. " BASELINEDN ,Delta Modulator Integrator Initial Value"
|
|
hexmask.long.word 0x00 0.--15. 1. " BASELINEUP ,Delta Modulator Integrator Initial Value"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "DMCFG,Delta Modulation Configuration"
|
|
bitfld.long 0x00 28. " DMGRDIS ,Delta Modulation Gain Step Reduction Disable" "0,1"
|
|
bitfld.long 0x00 20.--21. " CRMODE ,Delta Modulator Conversion Resolution" "DM10,DM12,DM14,DM16"
|
|
bitfld.long 0x00 16.--19. " DMCR ,Delta Modulator Conversion Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " DMR ,Delta Modulator Gain Reduction Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DMG ,Delta Modulator Gain Step"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "ANACTRL,Analog Control"
|
|
bitfld.long 0x00 20.--22. " TRSTPROG ,Reset Timing" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " IDACIREFS ,Current DAC and Reference Current Scale" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " IREFPROG ,Reference Current Control" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x00 "IF,Interrupt Flag"
|
|
bitfld.long 0x00 4. " APORTCONFLICT ,APORT Conflict Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " DMAOF ,DMA Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " EOS ,End of Scan Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CONV ,Conversion Done Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CMP ,Digital Comparator Interrupt Flag" "0,1"
|
|
wgroup.long 0x58++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set"
|
|
bitfld.long 0x00 4. " APORTCONFLICT ,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " DMAOF ,Set DMAOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " EOS ,Set EOS Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CONV ,Set CONV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CMP ,Set CMP Interrupt Flag" "0,1"
|
|
wgroup.long 0x5C++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear"
|
|
bitfld.long 0x00 4. " APORTCONFLICT ,Clear APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " DMAOF ,Clear DMAOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " EOS ,Clear EOS Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CONV ,Clear CONV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CMP ,Clear CMP Interrupt Flag" "0,1"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable"
|
|
bitfld.long 0x00 4. " APORTCONFLICT ,APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " DMAOF ,DMAOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " EOS ,EOS Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CONV ,CONV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " CMP ,CMP Interrupt Enable" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "LESENSE"
|
|
base ad:0x40055000
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 22. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 20.--21. " DMAWU ,DMA Wake-up From EM2" "DISABLE,BUFDATAV,BUFLEVEL,3"
|
|
bitfld.long 0x00 19. " BUFIDL ,Result Buffer Interrupt and DMA Trigger Level" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " STRSCANRES ,Enable Storing of SCANRES" "0,1"
|
|
bitfld.long 0x00 16. " BUFOW ,Result Buffer Overwrite" "0,1"
|
|
bitfld.long 0x00 13. " DUALSAMPLE ,Enable Dual Sample Mode" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ALTEXMAP ,Alternative Excitation Map" "0,1"
|
|
bitfld.long 0x00 7.--8. " SCANCONF ,Select Scan Configuration" "DIRMAP,INVMAP,TOGGLE,DECDEF"
|
|
bitfld.long 0x00 2.--5. " PRSSEL ,Scan Start PRS Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SCANMODE ,Configure Scan Mode" "PERIODIC,ONESHOT,PRS,3"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "TIMCTRL,Timing Control Register"
|
|
bitfld.long 0x00 28. " AUXSTARTUP ,AUXHFRCO Startup Configuration" "0,1"
|
|
bitfld.long 0x00 22.--23. " STARTDLY ,Start Delay Configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x00 12.--19. 1. " PCTOP ,Period Counter Top Value"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " PCPRESC ,Period Counter Prescaling" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128"
|
|
bitfld.long 0x00 4.--6. " LFPRESC ,Prescaling Factor for Low Frequency Timer" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128"
|
|
bitfld.long 0x00 0.--1. " AUXPRESC ,Prescaling Factor for High Frequency Timer" "DIV1,DIV2,DIV4,DIV8"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "PERCTRL,Peripheral Control Register"
|
|
bitfld.long 0x00 28.--29. " WARMUPMODE ,ACMP and VDAC Duty Cycle Mode" "NORMAL,KEEPACMPWARM,KEEPDACWARM,KEEPACMPDACWARM"
|
|
bitfld.long 0x00 27. " ACMP1HYSTEN ,ACMP1 Hysteresis Enable" "0,1"
|
|
bitfld.long 0x00 26. " ACMP0HYSTEN ,ACMP0 Hysteresis Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACMP1INV ,Invert Analog Comparator 1 Output" "0,1"
|
|
bitfld.long 0x00 24. " ACMP0INV ,Invert Analog Comparator 0 Output" "0,1"
|
|
bitfld.long 0x00 22.--23. " ACMP1MODE ,ACMP1 Mode" "DISABLE,MUX,MUXTHRES,3"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " ACMP0MODE ,ACMP0 Mode" "DISABLE,MUX,MUXTHRES,3"
|
|
bitfld.long 0x00 8. " DACCONVTRIG ,VDAC Conversion Trigger Configuration" "0,1"
|
|
bitfld.long 0x00 6. " DACSTARTUP ,VDAC Startup Configuration" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DACCH1DATA ,VDAC CH1 Data Selection" "0,1"
|
|
bitfld.long 0x00 2. " DACCH0DATA ,VDAC CH0 Data Selection" "0,1"
|
|
bitfld.long 0x00 1. " DACCH1EN ,VDAC CH1 Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DACCH0EN ,VDAC CH0 Enable" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "DECCTRL,Decoder Control Register"
|
|
bitfld.long 0x00 25.--28. " PRSSEL3 ,LESENSE Decoder PRS Input 3 Configuration" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " PRSSEL2 ,LESENSE Decoder PRS Input 2 Configuration" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 15.--18. " PRSSEL1 ,LESENSE Decoder PRS Input 1 Configuration" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--13. " PRSSEL0 ,LESENSE Decoder PRS Input 0 Configuration" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 8. " INPUT ,LESENSE Decoder Input Configuration" "0,1"
|
|
bitfld.long 0x00 7. " PRSCNT ,Enable Count Mode on Decoder PRS Channels 0 and 1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " HYSTIRQ ,Enable Decoder Hysteresis on Interrupt Requests" "0,1"
|
|
bitfld.long 0x00 5. " HYSTPRS2 ,Enable Decoder Hysteresis on PRS2 Output" "0,1"
|
|
bitfld.long 0x00 4. " HYSTPRS1 ,Enable Decoder Hysteresis on PRS1 Output" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HYSTPRS0 ,Enable Decoder Hysteresis on PRS0 Output" "0,1"
|
|
bitfld.long 0x00 2. " INTMAP ,Enable Decoder to Channel Interrupt Mapping" "0,1"
|
|
bitfld.long 0x00 1. " ERRCHK ,Enable Check of Current State" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DISABLE ,Disable the Decoder" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "BIASCTRL,Bias Control Register"
|
|
bitfld.long 0x00 0.--1. " BIASMODE ,Select Bias Mode" "DONTTOUCH,DUTYCYCLE,HIGHACC,3"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "EVALCTRL,LESENSE Evaluation Control"
|
|
hexmask.long.word 0x00 0.--15. 1. " WINSIZE ,Sliding Window and Step Detection Size"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 16. " DECCMPEN ,Enable PRS Output DECCMP" "0,1"
|
|
bitfld.long 0x00 8.--12. " DECCMPMASK ,Decoder State Compare Value Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " DECCMPVAL ,Decoder State Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 3. " CLEARBUF ,Clear Result Buffer" "0,1"
|
|
bitfld.long 0x00 2. " DECODE ,Start Decoder" "0,1"
|
|
bitfld.long 0x00 1. " STOP ,Stop Scanning of Sensors" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,Start Scanning of Sensors" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "CHEN,Channel Enable Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CHEN ,Enable Scan Channel"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "SCANRES,Scan Result Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " STEPDIR ,Direction of Previous Step Detection"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCANRES ,Scan Results"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 5. " DACACTIVE ,LESENSE VDAC Interface is Active" "0,1"
|
|
bitfld.long 0x00 4. " SCANACTIVE ,LESENSE Scan Active" "0,1"
|
|
bitfld.long 0x00 3. " RUNNING ,LESENSE Periodic Counter Running" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BUFFULL ,Result Buffer Full" "0,1"
|
|
bitfld.long 0x00 1. " BUFHALFFULL ,Result Buffer Half Full" "0,1"
|
|
bitfld.long 0x00 0. " BUFDATAV ,Result Data Valid" "0,1"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x00 "PTR,Result Buffer Pointers"
|
|
bitfld.long 0x00 4.--7. " WR ,Result Buffer Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " RD ,Result Buffer Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "BUFDATA,Result Buffer Data Register"
|
|
bitfld.long 0x00 16.--19. " BUFDATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " BUFDATA ,Result Data"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "CURCH,Current Channel Index"
|
|
bitfld.long 0x00 0.--3. " CURCH ,Current Channel Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "DECSTATE,Current Decoder State"
|
|
bitfld.long 0x00 0.--4. " DECSTATE ,Current Decoder State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "SENSORSTATE,Decoder Input Register"
|
|
bitfld.long 0x00 0.--3. " SENSORSTATE ,Decoder Input Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "IDLECONF,GPIO Idle Phase Configuration"
|
|
bitfld.long 0x00 30.--31. " CH15 ,Channel 15 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 28.--29. " CH14 ,Channel 14 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 26.--27. " CH13 ,Channel 13 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " CH12 ,Channel 12 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 22.--23. " CH11 ,Channel 11 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 20.--21. " CH10 ,Channel 10 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " CH9 ,Channel 9 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 16.--17. " CH8 ,Channel 8 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 14.--15. " CH7 ,Channel 7 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CH6 ,Channel 6 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 10.--11. " CH5 ,Channel 5 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 8.--9. " CH4 ,Channel 4 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CH3 ,Channel 3 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 4.--5. " CH2 ,Channel 2 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
bitfld.long 0x00 2.--3. " CH1 ,Channel 1 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CH0 ,Channel 0 Idle Phase Configuration" "DISABLE,HIGH,LOW,DAC"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ALTEXCONF,Alternative Excite Pin Configuration"
|
|
bitfld.long 0x00 23. " AEX7 ,ALTEX7 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 22. " AEX6 ,ALTEX6 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 21. " AEX5 ,ALTEX5 Always Excite Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AEX4 ,ALTEX4 Always Excite Enable" "0,1"
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|
bitfld.long 0x00 19. " AEX3 ,ALTEX3 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 18. " AEX2 ,ALTEX2 Always Excite Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " AEX1 ,ALTEX1 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 16. " AEX0 ,ALTEX0 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 14.--15. " IDLECONF7 ,ALTEX7 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IDLECONF6 ,ALTEX6 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
bitfld.long 0x00 10.--11. " IDLECONF5 ,ALTEX5 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
bitfld.long 0x00 8.--9. " IDLECONF4 ,ALTEX4 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IDLECONF3 ,ALTEX3 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
bitfld.long 0x00 4.--5. " IDLECONF2 ,ALTEX2 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
bitfld.long 0x00 2.--3. " IDLECONF1 ,ALTEX1 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IDLECONF0 ,ALTEX0 Idle Phase Configuration" "DISABLE,HIGH,LOW,3"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 22. " CNTOF ,CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " BUFOF ,BUFOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " BUFLEVEL ,BUFLEVEL Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFDATAV ,BUFDATAV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. " DECERR ,DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DEC ,DEC Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SCANCOMPLETE ,SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " CH15 ,CH15 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " CH14 ,CH14 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH13 ,CH13 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CH12 ,CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " CH11 ,CH11 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH10 ,CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " CH9 ,CH9 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " CH8 ,CH8 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH7 ,CH7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CH6 ,CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CH5 ,CH5 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH4 ,CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CH3 ,CH3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CH2 ,CH2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1 ,CH1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CH0 ,CH0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x54++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 22. " CNTOF ,Set CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " BUFOF ,Set BUFOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " BUFLEVEL ,Set BUFLEVEL Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFDATAV ,Set BUFDATAV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. " DECERR ,Set DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DEC ,Set DEC Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SCANCOMPLETE ,Set SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " CH15 ,Set CH15 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " CH14 ,Set CH14 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH13 ,Set CH13 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CH12 ,Set CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " CH11 ,Set CH11 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH10 ,Set CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " CH9 ,Set CH9 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " CH8 ,Set CH8 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH7 ,Set CH7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CH6 ,Set CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CH5 ,Set CH5 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH4 ,Set CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CH3 ,Set CH3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CH2 ,Set CH2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1 ,Set CH1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CH0 ,Set CH0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x58++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 22. " CNTOF ,Clear CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. " BUFOF ,Clear BUFOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. " BUFLEVEL ,Clear BUFLEVEL Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFDATAV ,Clear BUFDATAV Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. " DECERR ,Clear DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. " DEC ,Clear DEC Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SCANCOMPLETE ,Clear SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. " CH15 ,Clear CH15 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. " CH14 ,Clear CH14 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH13 ,Clear CH13 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 12. " CH12 ,Clear CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. " CH11 ,Clear CH11 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH10 ,Clear CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " CH9 ,Clear CH9 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " CH8 ,Clear CH8 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH7 ,Clear CH7 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " CH6 ,Clear CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CH5 ,Clear CH5 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH4 ,Clear CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CH3 ,Clear CH3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CH2 ,Clear CH2 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1 ,Clear CH1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " CH0 ,Clear CH0 Interrupt Flag" "0,1"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 22. " CNTOF ,CNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 21. " BUFOF ,BUFOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. " BUFLEVEL ,BUFLEVEL Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " BUFDATAV ,BUFDATAV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. " DECERR ,DECERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. " DEC ,DEC Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SCANCOMPLETE ,SCANCOMPLETE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. " CH15 ,CH15 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. " CH14 ,CH14 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH13 ,CH13 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 12. " CH12 ,CH12 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. " CH11 ,CH11 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH10 ,CH10 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " CH9 ,CH9 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " CH8 ,CH8 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH7 ,CH7 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " CH6 ,CH6 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " CH5 ,CH5 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH4 ,CH4 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " CH3 ,CH3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " CH2 ,CH2 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1 ,CH1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " CH0 ,CH0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 7. " CMD ,CMD Register Busy" "0,1"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Register"
|
|
bitfld.long 0x00 23. " ALTEX7PEN ,ALTEX7 Pin Enable" "0,1"
|
|
bitfld.long 0x00 22. " ALTEX6PEN ,ALTEX6 Pin Enable" "0,1"
|
|
bitfld.long 0x00 21. " ALTEX5PEN ,ALTEX5 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ALTEX4PEN ,ALTEX4 Pin Enable" "0,1"
|
|
bitfld.long 0x00 19. " ALTEX3PEN ,ALTEX3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 18. " ALTEX2PEN ,ALTEX2 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ALTEX1PEN ,ALTEX1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 16. " ALTEX0PEN ,ALTEX0 Pin Enable" "0,1"
|
|
bitfld.long 0x00 15. " CH15PEN ,CH15 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CH14PEN ,CH14 Pin Enable" "0,1"
|
|
bitfld.long 0x00 13. " CH13PEN ,CH13 Pin Enable" "0,1"
|
|
bitfld.long 0x00 12. " CH12PEN ,CH12 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH11PEN ,CH11 Pin Enable" "0,1"
|
|
bitfld.long 0x00 10. " CH10PEN ,CH10 Pin Enable" "0,1"
|
|
bitfld.long 0x00 9. " CH9PEN ,CH9 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CH8PEN ,CH8 Pin Enable" "0,1"
|
|
bitfld.long 0x00 7. " CH7PEN ,CH7 Pin Enable" "0,1"
|
|
bitfld.long 0x00 6. " CH6PEN ,CH6 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH5PEN ,CH5 Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. " CH4PEN ,CH4 Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. " CH3PEN ,CH3 Pin Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CH2PEN ,CH2 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. " CH1PEN ,CH1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. " CH0PEN ,CH0 Pin Enable" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "ST0_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "ST0_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "ST1_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "ST1_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "ST2_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "ST2_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x118++0x3
|
|
line.long 0x00 "ST3_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x11C++0x3
|
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line.long 0x00 "ST3_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "ST4_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x124++0x3
|
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line.long 0x00 "ST4_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x128++0x3
|
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line.long 0x00 "ST5_TCONFA,State Transition Configuration a"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x12C++0x3
|
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line.long 0x00 "ST5_TCONFB,State Transition Configuration B"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x130++0x3
|
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line.long 0x00 "ST6_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x134++0x3
|
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line.long 0x00 "ST6_TCONFB,State Transition Configuration B"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x138++0x3
|
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line.long 0x00 "ST7_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x13C++0x3
|
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line.long 0x00 "ST7_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x140++0x3
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line.long 0x00 "ST8_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x144++0x3
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line.long 0x00 "ST8_TCONFB,State Transition Configuration B"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x148++0x3
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line.long 0x00 "ST9_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x14C++0x3
|
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line.long 0x00 "ST9_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x150++0x3
|
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line.long 0x00 "ST10_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x154++0x3
|
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line.long 0x00 "ST10_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x158++0x3
|
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line.long 0x00 "ST11_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x15C++0x3
|
|
line.long 0x00 "ST11_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x160++0x3
|
|
line.long 0x00 "ST12_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x164++0x3
|
|
line.long 0x00 "ST12_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x168++0x3
|
|
line.long 0x00 "ST13_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x16C++0x3
|
|
line.long 0x00 "ST13_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x170++0x3
|
|
line.long 0x00 "ST14_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x174++0x3
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line.long 0x00 "ST14_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x178++0x3
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line.long 0x00 "ST15_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x17C++0x3
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line.long 0x00 "ST15_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x180++0x3
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line.long 0x00 "ST16_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x184++0x3
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line.long 0x00 "ST16_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x188++0x3
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line.long 0x00 "ST17_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x18C++0x3
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line.long 0x00 "ST17_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x190++0x3
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line.long 0x00 "ST18_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x194++0x3
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line.long 0x00 "ST18_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x198++0x3
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line.long 0x00 "ST19_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x19C++0x3
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line.long 0x00 "ST19_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1A0++0x3
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line.long 0x00 "ST20_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1A4++0x3
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line.long 0x00 "ST20_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x1A8++0x3
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line.long 0x00 "ST21_TCONFA,State Transition Configuration a"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
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textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x1AC++0x3
|
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line.long 0x00 "ST21_TCONFB,State Transition Configuration B"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x1B0++0x3
|
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line.long 0x00 "ST22_TCONFA,State Transition Configuration a"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1B4++0x3
|
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line.long 0x00 "ST22_TCONFB,State Transition Configuration B"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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group.long 0x1B8++0x3
|
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line.long 0x00 "ST23_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1BC++0x3
|
|
line.long 0x00 "ST23_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x00 "ST24_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C4++0x3
|
|
line.long 0x00 "ST24_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
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textline " "
|
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x00 "ST25_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
|
bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
|
|
textline " "
|
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1CC++0x3
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line.long 0x00 "ST25_TCONFB,State Transition Configuration B"
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|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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|
bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1D0++0x3
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line.long 0x00 "ST26_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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|
textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1D4++0x3
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line.long 0x00 "ST26_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1D8++0x3
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line.long 0x00 "ST27_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1DC++0x3
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line.long 0x00 "ST27_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1E0++0x3
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line.long 0x00 "ST28_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1E4++0x3
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line.long 0x00 "ST28_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1E8++0x3
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line.long 0x00 "ST29_TCONFA,State Transition Configuration a"
|
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1EC++0x3
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line.long 0x00 "ST29_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1F0++0x3
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line.long 0x00 "ST30_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1F4++0x3
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line.long 0x00 "ST30_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1F8++0x3
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line.long 0x00 "ST31_TCONFA,State Transition Configuration a"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag Enable" "0,1"
|
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bitfld.long 0x00 14. " CHAIN ,Enable State Descriptor Chaining" "0,1"
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textline " "
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x1FC++0x3
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line.long 0x00 "ST31_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. " PRSACT ,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. " SETIF ,Set Interrupt Flag" "0,1"
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bitfld.long 0x00 8.--12. " NEXTSTATE ,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0x00 4.--7. " MASK ,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. " COMP ,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x200++0x3
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line.long 0x00 "BUF0_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
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group.long 0x204++0x3
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line.long 0x00 "BUF1_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x208++0x3
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line.long 0x00 "BUF2_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
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group.long 0x20C++0x3
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line.long 0x00 "BUF3_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x210++0x3
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line.long 0x00 "BUF4_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x214++0x3
|
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line.long 0x00 "BUF5_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x218++0x3
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line.long 0x00 "BUF6_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x21C++0x3
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line.long 0x00 "BUF7_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x220++0x3
|
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line.long 0x00 "BUF8_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x224++0x3
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line.long 0x00 "BUF9_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x228++0x3
|
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line.long 0x00 "BUF10_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
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group.long 0x22C++0x3
|
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line.long 0x00 "BUF11_DATA,Scan Results"
|
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rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
|
group.long 0x230++0x3
|
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line.long 0x00 "BUF12_DATA,Scan Results"
|
|
rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
|
group.long 0x234++0x3
|
|
line.long 0x00 "BUF13_DATA,Scan Results"
|
|
rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
|
group.long 0x238++0x3
|
|
line.long 0x00 "BUF14_DATA,Scan Results"
|
|
rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
|
group.long 0x23C++0x3
|
|
line.long 0x00 "BUF15_DATA,Scan Results"
|
|
rbitfld.long 0x00 16.--19. " DATASRC ,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Scan Result Buffer"
|
|
group.long 0x240++0x3
|
|
line.long 0x00 "CH0_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x244++0x3
|
|
line.long 0x00 "CH0_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x248++0x3
|
|
line.long 0x00 "CH0_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x250++0x3
|
|
line.long 0x00 "CH1_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x254++0x3
|
|
line.long 0x00 "CH1_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x258++0x3
|
|
line.long 0x00 "CH1_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x260++0x3
|
|
line.long 0x00 "CH2_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x264++0x3
|
|
line.long 0x00 "CH2_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x268++0x3
|
|
line.long 0x00 "CH2_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x270++0x3
|
|
line.long 0x00 "CH3_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x274++0x3
|
|
line.long 0x00 "CH3_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x278++0x3
|
|
line.long 0x00 "CH3_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x280++0x3
|
|
line.long 0x00 "CH4_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "CH4_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x288++0x3
|
|
line.long 0x00 "CH4_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x290++0x3
|
|
line.long 0x00 "CH5_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x294++0x3
|
|
line.long 0x00 "CH5_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x298++0x3
|
|
line.long 0x00 "CH5_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x00 "CH6_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2A4++0x3
|
|
line.long 0x00 "CH6_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x00 "CH6_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2B0++0x3
|
|
line.long 0x00 "CH7_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2B4++0x3
|
|
line.long 0x00 "CH7_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x00 "CH7_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x00 "CH8_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2C4++0x3
|
|
line.long 0x00 "CH8_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2C8++0x3
|
|
line.long 0x00 "CH8_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2D0++0x3
|
|
line.long 0x00 "CH9_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x00 "CH9_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2D8++0x3
|
|
line.long 0x00 "CH9_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2E0++0x3
|
|
line.long 0x00 "CH10_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2E4++0x3
|
|
line.long 0x00 "CH10_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2E8++0x3
|
|
line.long 0x00 "CH10_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x2F0++0x3
|
|
line.long 0x00 "CH11_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2F4++0x3
|
|
line.long 0x00 "CH11_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x2F8++0x3
|
|
line.long 0x00 "CH11_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x300++0x3
|
|
line.long 0x00 "CH12_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x304++0x3
|
|
line.long 0x00 "CH12_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x308++0x3
|
|
line.long 0x00 "CH12_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x310++0x3
|
|
line.long 0x00 "CH13_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x314++0x3
|
|
line.long 0x00 "CH13_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x318++0x3
|
|
line.long 0x00 "CH13_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x320++0x3
|
|
line.long 0x00 "CH14_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x324++0x3
|
|
line.long 0x00 "CH14_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x328++0x3
|
|
line.long 0x00 "CH14_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
group.long 0x330++0x3
|
|
line.long 0x00 "CH15_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. " MEASUREDLY ,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. " SAMPLEDLY ,Set Sample Delay"
|
|
bitfld.long 0x00 0.--5. " EXTIME ,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x334++0x3
|
|
line.long 0x00 "CH15_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. " ALTEX ,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. " SAMPLECLK ,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
bitfld.long 0x00 19. " EXCLK ,Select Clock Used for Excitation Timing" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " EXMODE ,Set GPIO Mode" "DISABLE,HIGH,LOW,DACOUT"
|
|
bitfld.long 0x00 14.--16. " SETIF ,Enable Interrupt Generation" "NONE,LEVEL,POSEDGE,NEGEDGE,BOTHEDGES,5,6,7"
|
|
bitfld.long 0x00 12.--13. " SAMPLE ,Select Sample Mode" "ACMPCOUNT,ACMP,ADC,ADCDIFF"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--11. 1. " THRES ,ACMP Threshold or VDAC Data"
|
|
group.long 0x338++0x3
|
|
line.long 0x00 "CH15_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. " MODE ,Configure Evaluation Mode" "THRES,SLIDINGWIN,STEPDET,3"
|
|
bitfld.long 0x00 20. " SCANRESINV ,Enable Inversion of Result" "0,1"
|
|
bitfld.long 0x00 18.--19. " STRSAMPLE ,Enable Storing of Sensor Sample in Result Buffer" "DISABLE,DATA,DATASRC,3"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DECODE ,Send Result to Decoder" "0,1"
|
|
bitfld.long 0x00 16. " COMP ,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. " COMPTHRES ,Decision Threshold for Sensor Data"
|
|
width 0x0B
|
|
tree.end
|
|
tree "RTCC"
|
|
base ad:0x40042000
|
|
width 11.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 17. " LYEARCORRDIS ,Leap Year Correction Disabled" "0,1"
|
|
bitfld.long 0x00 16. " CNTMODE ,Main Counter Mode" "0,1"
|
|
bitfld.long 0x00 15. " OSCFDETEN ,Oscillator Failure Detection Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CNTTICK ,Counter Prescaler Mode" "0,1"
|
|
bitfld.long 0x00 8.--11. " CNTPRESC ,Counter Prescaler Value" "DIV1,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128,DIV256,DIV512,DIV1024,DIV2048,DIV4096,DIV8192,DIV16384,DIV32768"
|
|
bitfld.long 0x00 5. " CCV1TOP ,CCV1 Top Value Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PRECCV0TOP ,Pre-counter CCV0 Top Value Enable" "0,1"
|
|
bitfld.long 0x00 2. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 0. " ENABLE ,RTCC Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "PRECNT,Pre-Counter Value Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " PRECNT ,Pre-Counter Value"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CNT ,Counter Value"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "COMBCNT,Combined Pre-Counter and Counter Value Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 1. " CNTLSB ,Counter Value"
|
|
hexmask.long.word 0x00 0.--14. 1. " PRECNT ,Pre-Counter Value"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "TIME,Time of Day Register"
|
|
bitfld.long 0x00 20.--21. " HOURT ,Hours, Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " HOURU ,Hours, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " MINT ,Minutes, Tens" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MINU ,Minutes, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. " SECT ,Seconds, Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. " SECU ,Seconds, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DATE,Date Register"
|
|
bitfld.long 0x00 24.--26. " DAYOW ,Day of Week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--23. " YEART ,Year, Tens" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " YEARU ,Year, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MONTHT ,Month, Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. " MONTHU ,Month, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " DAYOMT ,Day of Month, Tens" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DAYOMU ,Day of Month, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "IF,RTCC Interrupt Flags"
|
|
bitfld.long 0x00 10. " MONTHTICK ,Month Tick" "0,1"
|
|
bitfld.long 0x00 9. " DAYOWOF ,Day of Week Overflow" "0,1"
|
|
bitfld.long 0x00 8. " DAYTICK ,Day Tick" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HOURTICK ,Hour Tick" "0,1"
|
|
bitfld.long 0x00 6. " MINTICK ,Minute Tick" "0,1"
|
|
bitfld.long 0x00 5. " CNTTICK ,Main Counter Tick" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OSCFAIL ,Oscillator Failure Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CC2 ,Channel 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CC1 ,Channel 1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CC0 ,Channel 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 10. " MONTHTICK ,Set MONTHTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " DAYOWOF ,Set DAYOWOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " DAYTICK ,Set DAYTICK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HOURTICK ,Set HOURTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " MINTICK ,Set MINTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CNTTICK ,Set CNTTICK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OSCFAIL ,Set OSCFAIL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CC2 ,Set CC2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CC1 ,Set CC1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CC0 ,Set CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 10. " MONTHTICK ,Clear MONTHTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. " DAYOWOF ,Clear DAYOWOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. " DAYTICK ,Clear DAYTICK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HOURTICK ,Clear HOURTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. " MINTICK ,Clear MINTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. " CNTTICK ,Clear CNTTICK Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OSCFAIL ,Clear OSCFAIL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " CC2 ,Clear CC2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " CC1 ,Clear CC1 Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CC0 ,Clear CC0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " OF ,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. " MONTHTICK ,MONTHTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. " DAYOWOF ,DAYOWOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. " DAYTICK ,DAYTICK Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HOURTICK ,HOURTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. " MINTICK ,MINTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. " CNTTICK ,CNTTICK Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OSCFAIL ,OSCFAIL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " CC2 ,CC2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " CC1 ,CC1 Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CC0 ,CC0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " OF ,OF Interrupt Enable" "0,1"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " CLRSTATUS ,Clear RTCC_STATUS Register" "0,1"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 5. " CMD ,CMD Register Busy" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "POWERDOWN,Retention RAM Power-down Register"
|
|
bitfld.long 0x00 0. " RAM ,Retention RAM Power-down" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOCKKEY ,Configuration Lock Key"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "EM4WUEN,Wake Up Enable"
|
|
bitfld.long 0x00 0. " EM4WU ,EM4 Wake-up Enable" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "CC0_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. " DAYCC ,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. " COMPMASK ,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11. " COMPBASE ,Capture Compare Channel Comparison Base" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 2.--3. " CMOA ,Compare Match Output Action" "PULSE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,3"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "CC0_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,Capture/Compare Value"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "CC0_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. " HOURT ,Hours, Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " HOURU ,Hours, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " MINT ,Minutes, Tens" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MINU ,Minutes, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. " SECT ,Seconds, Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. " SECU ,Seconds, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "CC0_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. " MONTHT ,Month, Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. " MONTHU ,Month, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " DAYT ,Day of Month/week, Tens" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DAYU ,Day of Month/week, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. " DAYCC ,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. " COMPMASK ,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11. " COMPBASE ,Capture Compare Channel Comparison Base" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 2.--3. " CMOA ,Compare Match Output Action" "PULSE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,3"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "CC1_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,Capture/Compare Value"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "CC1_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. " HOURT ,Hours, Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " HOURU ,Hours, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " MINT ,Minutes, Tens" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MINU ,Minutes, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. " SECT ,Seconds, Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. " SECU ,Seconds, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "CC1_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. " MONTHT ,Month, Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. " MONTHU ,Month, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " DAYT ,Day of Month/week, Tens" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DAYU ,Day of Month/week, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. " DAYCC ,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. " COMPMASK ,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11. " COMPBASE ,Capture Compare Channel Comparison Base" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " PRSSEL ,Compare/Capture Channel PRS Input Channel Selection" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " ICEDGE ,Input Capture Edge Select" "RISING,FALLING,BOTH,NONE"
|
|
bitfld.long 0x00 2.--3. " CMOA ,Compare Match Output Action" "PULSE,TOGGLE,CLEAR,SET"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MODE ,CC Channel Mode" "OFF,INPUTCAPTURE,OUTPUTCOMPARE,3"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "CC2_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " CCV ,Capture/Compare Value"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "CC2_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. " HOURT ,Hours, Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " HOURU ,Hours, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " MINT ,Minutes, Tens" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " MINU ,Minutes, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--6. " SECT ,Seconds, Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. " SECU ,Seconds, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "CC2_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. " MONTHT ,Month, Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. " MONTHU ,Month, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. " DAYT ,Day of Month/week, Tens" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DAYU ,Day of Month/week, Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "RET0_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "RET1_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x10C++0x3
|
|
line.long 0x00 "RET2_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "RET3_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "RET4_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x118++0x3
|
|
line.long 0x00 "RET5_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x11C++0x3
|
|
line.long 0x00 "RET6_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "RET7_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "RET8_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "RET9_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x12C++0x3
|
|
line.long 0x00 "RET10_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "RET11_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x134++0x3
|
|
line.long 0x00 "RET12_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x138++0x3
|
|
line.long 0x00 "RET13_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x13C++0x3
|
|
line.long 0x00 "RET14_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "RET15_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x144++0x3
|
|
line.long 0x00 "RET16_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "RET17_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x14C++0x3
|
|
line.long 0x00 "RET18_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "RET19_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x154++0x3
|
|
line.long 0x00 "RET20_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x158++0x3
|
|
line.long 0x00 "RET21_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x15C++0x3
|
|
line.long 0x00 "RET22_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x160++0x3
|
|
line.long 0x00 "RET23_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x164++0x3
|
|
line.long 0x00 "RET24_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x168++0x3
|
|
line.long 0x00 "RET25_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x16C++0x3
|
|
line.long 0x00 "RET26_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x170++0x3
|
|
line.long 0x00 "RET27_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x174++0x3
|
|
line.long 0x00 "RET28_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x178++0x3
|
|
line.long 0x00 "RET29_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x17C++0x3
|
|
line.long 0x00 "RET30_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
group.long 0x180++0x3
|
|
line.long 0x00 "RET31_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. " REG ,General Purpose Retention Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDOG0"
|
|
base ad:0x40052000
|
|
width 14.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " WDOGRSTDIS ,Watchdog Reset Disable" "0,1"
|
|
bitfld.long 0x00 30. " CLRSRC ,Watchdog Clear Source" "0,1"
|
|
bitfld.long 0x00 24.--26. " WINSEL ,Watchdog Illegal Window Select" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " WARNSEL ,Watchdog Timeout Period Select" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " CLKSEL ,Watchdog Clock Select" "ULFRCO,LFRCO,LFXO,HFCORECLK"
|
|
bitfld.long 0x00 8.--11. " PERSEL ,Watchdog Timeout Period Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWOSCBLOCK ,Software Oscillator Disable Block" "0,1"
|
|
bitfld.long 0x00 5. " EM4BLOCK ,Energy Mode 4 Block" "0,1"
|
|
bitfld.long 0x00 4. " LOCK ,Configuration Lock" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EM3RUN ,Energy Mode 3 Run Enable" "0,1"
|
|
bitfld.long 0x00 2. " EM2RUN ,Energy Mode 2 Run Enable" "0,1"
|
|
bitfld.long 0x00 1. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Watchdog Timer Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " CLEAR ,Watchdog Timer Clear" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 3. " PCH1_PRSCTRL ,PCH1_PRSCTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 2. " PCH0_PRSCTRL ,PCH0_PRSCTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTRL ,CTRL Register Busy" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "PCH0_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--3. " PRSSEL ,PRS Channel PRS Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PCH1_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--3. " PRSSEL ,PRS Channel PRS Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "IF,Watchdog Interrupt Flags"
|
|
bitfld.long 0x00 4. " PEM1 ,PRS Channel One Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,PRS Channel Zero Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,WDOG Window Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,WDOG Warning Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,WDOG Timeout Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 4. " PEM1 ,Set PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,Set PEM0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,Set WIN Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,Set WARN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,Set TOUT Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 4. " PEM1 ,Clear PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,Clear PEM0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,Clear WIN Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,Clear WARN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,Clear TOUT Interrupt Flag" "0,1"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 4. " PEM1 ,PEM1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,PEM0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,WIN Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,WARN Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,TOUT Interrupt Enable" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDOG1"
|
|
base ad:0x40052400
|
|
width 14.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " WDOGRSTDIS ,Watchdog Reset Disable" "0,1"
|
|
bitfld.long 0x00 30. " CLRSRC ,Watchdog Clear Source" "0,1"
|
|
bitfld.long 0x00 24.--26. " WINSEL ,Watchdog Illegal Window Select" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " WARNSEL ,Watchdog Timeout Period Select" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " CLKSEL ,Watchdog Clock Select" "ULFRCO,LFRCO,LFXO,HFCORECLK"
|
|
bitfld.long 0x00 8.--11. " PERSEL ,Watchdog Timeout Period Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWOSCBLOCK ,Software Oscillator Disable Block" "0,1"
|
|
bitfld.long 0x00 5. " EM4BLOCK ,Energy Mode 4 Block" "0,1"
|
|
bitfld.long 0x00 4. " LOCK ,Configuration Lock" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EM3RUN ,Energy Mode 3 Run Enable" "0,1"
|
|
bitfld.long 0x00 2. " EM2RUN ,Energy Mode 2 Run Enable" "0,1"
|
|
bitfld.long 0x00 1. " DEBUGRUN ,Debug Mode Run Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,Watchdog Timer Enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. " CLEAR ,Watchdog Timer Clear" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 3. " PCH1_PRSCTRL ,PCH1_PRSCTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 2. " PCH0_PRSCTRL ,PCH0_PRSCTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 1. " CMD ,CMD Register Busy" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTRL ,CTRL Register Busy" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "PCH0_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--3. " PRSSEL ,PRS Channel PRS Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PCH1_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. " PRSMISSRSTEN ,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--3. " PRSSEL ,PRS Channel PRS Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x00 "IF,Watchdog Interrupt Flags"
|
|
bitfld.long 0x00 4. " PEM1 ,PRS Channel One Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,PRS Channel Zero Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,WDOG Window Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,WDOG Warning Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,WDOG Timeout Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 4. " PEM1 ,Set PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,Set PEM0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,Set WIN Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,Set WARN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,Set TOUT Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 4. " PEM1 ,Clear PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,Clear PEM0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,Clear WIN Interrupt Flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,Clear WARN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,Clear TOUT Interrupt Flag" "0,1"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 4. " PEM1 ,PEM1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. " PEM0 ,PEM0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. " WIN ,WIN Interrupt Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WARN ,WARN Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. " TOUT ,TOUT Interrupt Enable" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ETM"
|
|
base ad:0xE0041000
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "ETMCR,Main Control Register"
|
|
bitfld.long 0x00 28. " TSTAMPEN ,Time Stamp Enable" "0,1"
|
|
bitfld.long 0x00 21.--22. " EPORTSIZE ,Port Size[3]" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " PORTMODE ,Port Mode Control" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PORTMODE2 ,Port Mode[2]" "0,1"
|
|
bitfld.long 0x00 11. " ETMPORTSEL ,ETM Port Selection" "0,1"
|
|
bitfld.long 0x00 10. " ETMPROG ,ETM Programming" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DBGREQCTRL ,Debug Request Control" "0,1"
|
|
bitfld.long 0x00 8. " BRANCHOUTPUT ,Branch Output" "0,1"
|
|
bitfld.long 0x00 7. " STALL ,Stall Processor" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " PORTSIZE ,ETM Port Size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " POWERDWN ,ETM Control in low power mode" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x00 "ETMCCR,Configuration Code Register"
|
|
bitfld.long 0x00 31. " ETMID ,ETM ID Register Present" "0,1"
|
|
bitfld.long 0x00 27. " MMACCESS ,Coprocessor and Memeory Access" "0,1"
|
|
bitfld.long 0x00 26. " TRACESS ,Trace Start/Stop Block Present" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IDCOMPNUM ,Number of context ID Comparators" "0,1,2,3"
|
|
bitfld.long 0x00 23. " FIFOFULLPRES ,FIFIO FULL present" "0,1"
|
|
bitfld.long 0x00 20.--22. " EXTOUTNUM ,Number of External Output" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 17.--19. " EXTINPNUM ,Number of External Inputs" "ZERO,ONE,TWO,3,4,5,6,7"
|
|
bitfld.long 0x00 16. " SEQPRES ,Sequencer Present" "0,1"
|
|
bitfld.long 0x00 13.--15. " COUNTNUM ,Number of Counters" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--12. " MMDECCNT ,Number of Memeory Map Decoders" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. " DATACMPNUM ,Number of Data Value Comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " ADRCMPPAIR ,Number of Address Comparator Pairs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x8++0x3
|
|
line.long 0x00 "ETMTRIGGER,ETM Trigger Event Register"
|
|
bitfld.long 0x00 14.--16. " ETMFCN ,ETM Function" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " RESB ,ETM Resource B"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RESA ,ETM Resource A"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "ETMSR,ETM Status Register"
|
|
bitfld.long 0x00 3. " TRIGBIT ,Trigger Bit" "0,1"
|
|
bitfld.long 0x00 2. " TRACESTAT ,Trace Start/Stop Status" "0,1"
|
|
rbitfld.long 0x00 1. " ETMPROGBIT ,ETM Programming Bit Status" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " ETHOF ,ETM Overflow" "0,1"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "ETMSCR,ETM System Configuration Register"
|
|
bitfld.long 0x00 17. " NOFETCHCOMP ,No Fetch Comparison" "0,1"
|
|
bitfld.long 0x00 12.--14. " PROCNUM ,Number of Supported Processros" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 11. " PORTMODE ,Port Mode Supported" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PORTSIZE ,Port Size Supported" "0,1"
|
|
bitfld.long 0x00 9. " MAXPORTSIZE3 ,Max Port Size[3]" "0,1"
|
|
bitfld.long 0x00 8. " FIFOFULL ,FIFO FULL Supported" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " MAXPORTSIZE ,Maximum Port Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "ETMTEEVR,ETM TraceEnable Event Register"
|
|
bitfld.long 0x00 14.--16. " ETMFCNEN ,ETM Function Trace Enable" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " RESB ,ETM Resource B Trace Enable"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RESA ,ETM Resource A Trace Enable"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "ETMTECR1,ETM Trace control Register"
|
|
bitfld.long 0x00 25. " TCE ,Trace Control Enable" "0,1"
|
|
bitfld.long 0x00 24. " INCEXCTL ,Trace Include/Exclude Flag" "0,1"
|
|
hexmask.long.word 0x00 8.--23. 1. " MEMMAP ,Memmap"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ADRCMP ,Address Comparator"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "ETMFFLR,ETM Fifo Full Level Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BYTENUM ,Bytes left in FIFO"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "ETMCNTRLDVR1,Counter Reload Value"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Free running counter reload value"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x00 "ETMSYNCFR,Synchronisation Frequency Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " FREQ ,Synchronisation Frequency Value"
|
|
rgroup.long 0x1E4++0x3
|
|
line.long 0x00 "ETMIDR,ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPCODE ,Implementer Code"
|
|
bitfld.long 0x00 20. " BPE ,Branch Packet Encoding" "0,1"
|
|
bitfld.long 0x00 19. " SECEXT ,Security Extension Support" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " THUMBT ,32-bit Thumb Instruction Tracing" "0,1"
|
|
bitfld.long 0x00 16. " LPCF ,Load PC First" "0,1"
|
|
bitfld.long 0x00 12.--15. " PROCFAM ,Implementer Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " ETMMAJVER ,Major ETM Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " ETMMINVER ,Minor ETM Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " IMPVER ,Implementation Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1E8++0x3
|
|
line.long 0x00 "ETMCCER,Configuration Code Extension Register"
|
|
bitfld.long 0x00 29. " TSIZE ,Timestamp Size" "0,1"
|
|
bitfld.long 0x00 28. " TENC ,Timestamp Encoding" "0,1"
|
|
bitfld.long 0x00 27. " RFCNT ,Reduced Function Counter" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TIMP ,Timestamping Implemented" "0,1"
|
|
bitfld.long 0x00 21. " EICEIMP ,EmbeddedICE Behavior control Implemented" "0,1"
|
|
bitfld.long 0x00 20. " TEICEWPNT ,Trace Sart/Stop Block Uses EmbeddedICE watchpoint inputs" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " EICEWPNT ,EmbeddedICE watchpoint inputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 13.--15. " INSTRES ,Instrumentation Resources" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12. " DADDRCMP ,Data Address comparisons" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " READREGS ,Readable Registers" "0,1"
|
|
hexmask.long.byte 0x00 3.--10. 1. " EXTINPBUS ,Extended External Input Bus"
|
|
bitfld.long 0x00 0.--1. " EXTINPSEL ,Extended External Input Selectors" "0,1,2,3"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x00 "ETMTESSEICR,TraceEnable Start/Stop EmbeddedICE Control Register"
|
|
bitfld.long 0x00 16.--19. " STOPRSEL ,Stop Resource Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " STARTRSEL ,Stop Resource Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1F8++0x3
|
|
line.long 0x00 "ETMTSEVR,Timestamp Event Register"
|
|
bitfld.long 0x00 14.--16. " ETMFCNEVT ,ETM Function Event" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 7.--13. 1. " RESBEVT ,ETM Resource B Event"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RESAEVT ,ETM Resource A Event"
|
|
group.long 0x200++0x3
|
|
line.long 0x00 "ETMTRACEIDR,CoreSight Trace ID Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TRACEID ,Trace ID"
|
|
rgroup.long 0x208++0x3
|
|
line.long 0x00 "ETMIDR2,ETM ID Register 2"
|
|
bitfld.long 0x00 1. " SWP ,SWP Transfer Order" "0,1"
|
|
bitfld.long 0x00 0. " RFE ,RFE Transfer Order" "0,1"
|
|
rgroup.long 0x314++0x3
|
|
line.long 0x00 "ETMPDSR,Device Power-down Status Register"
|
|
bitfld.long 0x00 0. " ETMUP ,ETM Powered Up" "0,1"
|
|
group.long 0xEE0++0x3
|
|
line.long 0x00 "ETMISCIN,Integration Test Miscellaneous Inputs Register"
|
|
bitfld.long 0x00 4. " COREHALT ,Core Halt" "0,1"
|
|
bitfld.long 0x00 0.--1. " EXTIN ,EXTIN Value" "0,1,2,3"
|
|
group.long 0xEE8++0x3
|
|
line.long 0x00 "ITTRIGOUT,Integration Test Trigger Out Register"
|
|
bitfld.long 0x00 0. " TRIGGEROUT ,Trigger output value" "0,1"
|
|
rgroup.long 0xEF0++0x3
|
|
line.long 0x00 "ETMITATBCTR2,ETM Integration Test ATB Control 2 Register"
|
|
bitfld.long 0x00 0. " ATREADY ,ATREADY Input Value" "0,1"
|
|
group.long 0xEF8++0x3
|
|
line.long 0x00 "ETMITATBCTR0,ETM Integration Test ATB Control 0 Register"
|
|
bitfld.long 0x00 0. " ATVALID ,ATVALID Output Value" "0,1"
|
|
group.long 0xF00++0x3
|
|
line.long 0x00 "ETMITCTRL,ETM Integration Control Register"
|
|
bitfld.long 0x00 0. " ITEN ,Integration Mode Enable" "0,1"
|
|
group.long 0xFA0++0x3
|
|
line.long 0x00 "ETMCLAIMSET,ETM Claim Tag Set Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SETTAG ,Tag Bits"
|
|
group.long 0xFA4++0x3
|
|
line.long 0x00 "ETMCLAIMCLR,ETM Claim Tag Clear Register"
|
|
bitfld.long 0x00 0. " CLRTAG ,Tag Bits" "0,1"
|
|
group.long 0xFB0++0x3
|
|
line.long 0x00 "ETMLAR,ETM Lock Access Register"
|
|
bitfld.long 0x00 0. " KEY ,Key Value" "0,1"
|
|
rgroup.long 0xFB4++0x3
|
|
line.long 0x00 "ETMLSR,Lock Status Register"
|
|
bitfld.long 0x00 1. " LOCKED ,ETM locked" "0,1"
|
|
bitfld.long 0x00 0. " LOCKIMP ,ETM Locking Implemented" "0,1"
|
|
rgroup.long 0xFB8++0x3
|
|
line.long 0x00 "ETMAUTHSTATUS,ETM Authentication Status Register"
|
|
bitfld.long 0x00 6.--7. " SECNONINVDBG ,Secure non-invasive Debug Status" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " SECINVDBG ,Secure invasive Debug Status" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " NONSECNONINVDBG ,Non-secure non-invasive Debug Status" "0,1,DISABLE,ENABLE"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " NONSECINVDBG ,Non-secure invasive Debug Status" "0,1,2,3"
|
|
rgroup.long 0xFCC++0x3
|
|
line.long 0x00 "ETMDEVTYPE,CoreSight Device Type Register"
|
|
bitfld.long 0x00 4.--7. " PROCTRACE ,Processor Trace" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " TRACESRC ,Trace Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFD0++0x3
|
|
line.long 0x00 "ETMPIDR4,Peripheral ID4 Register"
|
|
bitfld.long 0x00 4.--7. " COUNT ,4KB Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " CONTCODE ,JEP106 Continuation Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
wgroup.long 0xFD4++0x3
|
|
line.long 0x00 "ETMPIDR5,Peripheral ID5 Register"
|
|
wgroup.long 0xFD8++0x3
|
|
line.long 0x00 "ETMPIDR6,Peripheral ID6 Register"
|
|
wgroup.long 0xFDC++0x3
|
|
line.long 0x00 "ETMPIDR7,Peripheral ID7 Register"
|
|
rgroup.long 0xFE0++0x3
|
|
line.long 0x00 "ETMPIDR0,Peripheral ID0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUM ,Part Number"
|
|
rgroup.long 0xFE4++0x3
|
|
line.long 0x00 "ETMPIDR1,Peripheral ID1 Register"
|
|
bitfld.long 0x00 4.--7. " IDCODE ,JEP106 Identity Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " PARTNUM ,Part Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFE8++0x3
|
|
line.long 0x00 "ETMPIDR2,Peripheral ID2 Register"
|
|
bitfld.long 0x00 4.--7. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. " ALWAYS1 ,Always 1" "0,1"
|
|
bitfld.long 0x00 0.--2. " IDCODE ,JEP106 Identity Code" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xFEC++0x3
|
|
line.long 0x00 "ETMPIDR3,Peripheral ID3 Register"
|
|
bitfld.long 0x00 4.--7. " REVAND ,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " CUSTMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xFF0++0x3
|
|
line.long 0x00 "ETMCIDR0,Component ID0 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMB ,CoreSight Preamble"
|
|
rgroup.long 0xFF4++0x3
|
|
line.long 0x00 "ETMCIDR1,Component ID1 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMB ,CoreSight Preamble"
|
|
rgroup.long 0xFF8++0x3
|
|
line.long 0x00 "ETMCIDR2,Component ID2 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMB ,CoreSight Preamble"
|
|
rgroup.long 0xFFC++0x3
|
|
line.long 0x00 "ETMCIDR3,Component ID3 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREAMB ,CoreSight Preamble"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IDAC0"
|
|
base ad:0x40006000
|
|
width 15.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 20.--23. " PRSSEL ,IDAC Output Enable PRS Channel Select" "PRSCH0,PRSCH1,PRSCH2,PRSCH3,PRSCH4,PRSCH5,PRSCH6,PRSCH7,PRSCH8,PRSCH9,PRSCH10,PRSCH11,12,13,14,15"
|
|
bitfld.long 0x00 19. " MAINOUTENPRS ,PRS Controlled Main Pad Output Enable" "0,1"
|
|
bitfld.long 0x00 18. " MAINOUTEN ,Output Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " APORTOUTENPRS ,PRS Controlled APORT Output Enable" "0,1"
|
|
bitfld.long 0x00 14. " APORTMASTERDIS ,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 13. " EM2DELAY ,EM2 Delay" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWRSEL ,Power Select" "0,1"
|
|
hexmask.long.byte 0x00 4.--11. 1. " APORTOUTSEL ,APORT Output Select"
|
|
bitfld.long 0x00 3. " APORTOUTEN ,APORT Output Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MINOUTTRANS ,Minimum Output Transition Enable" "0,1"
|
|
bitfld.long 0x00 1. " CURSINK ,Current Sink Enable" "0,1"
|
|
bitfld.long 0x00 0. " EN ,Current DAC Enable" "0,1"
|
|
group.long 0x4++0x3
|
|
line.long 0x00 "CURPROG,Current Programming Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TUNING ,Tune the Current to Given Accuracy"
|
|
bitfld.long 0x00 8.--12. " STEPSEL ,Current Step Size Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--1. " RANGESEL ,Current Range Select" "RANGE0,RANGE1,RANGE2,RANGE3"
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "DUTYCONFIG,Duty Cycle Configuration Register"
|
|
bitfld.long 0x00 1. " EM2DUTYCYCLEDIS ,Duty Cycle Enable" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 1. " APORTCONFLICT ,APORT Conflict Output" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 1. " APORTCONFLICT ,APORT Conflict Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 1. " APORTCONFLICT ,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 1. " APORTCONFLICT ,Clear APORTCONFLICT Interrupt Flag" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " APORTCONFLICT ,APORTCONFLICT Interrupt Enable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "APORTREQ,APORT Request Status Register"
|
|
bitfld.long 0x00 3. " APORT1YREQ ,1 If the Bus Connected to APORT1Y is Requested" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XREQ ,1 If the APORT Bus Connected to APORT1X is Requested" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "APORTCONFLICT,APORT Request Status Register"
|
|
bitfld.long 0x00 3. " APORT1YCONFLICT ,1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. " APORT1XCONFLICT ,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SMU"
|
|
base ad:0x40022000
|
|
width 10.
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 0. " PPUPRIV ,PPU Privilege Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. " PPUPRIV ,Set PPUPRIV Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. " PPUPRIV ,Clear PPUPRIV Interrupt Flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. " PPUPRIV ,PPUPRIV Interrupt Enable" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "PPUCTRL,PPU Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ," "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "PPUPATD0,PPU Privilege Access Type Descriptor 0"
|
|
bitfld.long 0x00 27. " PCNT0 ,Pulse Counter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 25. " LEUART0 ,Low Energy UART 0 access control bit" "0,1"
|
|
bitfld.long 0x00 24. " LETIMER0 ,Low Energy Timer 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " LESENSE ,Low Energy Sensor Interface access control bit" "0,1"
|
|
bitfld.long 0x00 22. " LDMA ,Linked Direct Memory Access Controller access control bit" "0,1"
|
|
bitfld.long 0x00 21. " MSC ,Memory System Controller access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 20. " IDAC0 ,Current Digital to Analog Converter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 19. " I2C1 ,I2C 1 access control bit" "0,1"
|
|
bitfld.long 0x00 18. " I2C0 ,I2C 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " GPIO ,General purpose Input/Output access control bit" "0,1"
|
|
bitfld.long 0x00 16. " GPCRC ,General Purpose CRC access control bit" "0,1"
|
|
bitfld.long 0x00 14. " FPUEH ,FPU Exception Handler access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EMU ,Energy Management Unit access control bit" "0,1"
|
|
bitfld.long 0x00 12. " PRS ,Peripheral Reflex System access control bit" "0,1"
|
|
bitfld.long 0x00 11. " VDAC0 ,Digital to Analog Converter 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CSEN ,Capacitive touch sense module access control bit" "0,1"
|
|
bitfld.long 0x00 9. " CRYPTO1 ,Advanced Encryption Standard Accelerator 1 access control bit" "0,1"
|
|
bitfld.long 0x00 8. " CRYPTO0 ,Advanced Encryption Standard Accelerator 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CRYOTIMER ,CryoTimer access control bit" "0,1"
|
|
bitfld.long 0x00 5. " CMU ,Clock Management Unit access control bit" "0,1"
|
|
bitfld.long 0x00 2. " ADC0 ,Analog to Digital Converter 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACMP1 ,Analog Comparator 1 access control bit" "0,1"
|
|
bitfld.long 0x00 0. " ACMP0 ,Analog Comparator 0 access control bit" "0,1"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "PPUPATD1,PPU Privilege Access Type Descriptor 1"
|
|
bitfld.long 0x00 12. " WTIMER0 ,Wide Timer 0 access control bit" "0,1"
|
|
bitfld.long 0x00 11. " WDOG1 ,Watchdog 1 access control bit" "0,1"
|
|
bitfld.long 0x00 10. " WDOG0 ,Watchdog 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 9. " USART2 ,Universal Synchronous/Asynchronous Receiver/Transmitter 2 access control bit" "0,1"
|
|
bitfld.long 0x00 8. " USART1 ,Universal Synchronous/Asynchronous Receiver/Transmitter 1 access control bit" "0,1"
|
|
bitfld.long 0x00 7. " USART0 ,Universal Synchronous/Asynchronous Receiver/Transmitter 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TRNG0 ,True Random Number Generator 0 access control bit" "0,1"
|
|
bitfld.long 0x00 5. " TIMER1 ,Timer 1 access control bit" "0,1"
|
|
bitfld.long 0x00 4. " TIMER0 ,Timer 0 access control bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMU ,Security Management Unit access control bit" "0,1"
|
|
bitfld.long 0x00 1. " RTCC ,Real-Time Counter and Calendar access control bit" "0,1"
|
|
bitfld.long 0x00 0. " RMU ,Reset Management Unit access control bit" "0,1"
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "PPUFS,PPU Fault Status"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PERIPHID ,"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TRNG0"
|
|
base ad:0x4001D000
|
|
width 13.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "CONTROL,Main Control Register"
|
|
bitfld.long 0x00 13. " BYPAIS31 ,AIS31 Start-up Test Bypass" "0,1"
|
|
bitfld.long 0x00 12. " BYPNIST ,NIST Start-up Test Bypass" "0,1"
|
|
bitfld.long 0x00 11. " FORCERUN ,Oscillator Force Run" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ALMIEN ,Interrupt enable for AIS31 noise alarm" "0,1"
|
|
bitfld.long 0x00 9. " PREIEN ,Interrupt enable for AIS31 preliminary noise alarm" "0,1"
|
|
bitfld.long 0x00 8. " SOFTRESET ,Software Reset" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FULLIEN ,Interrupt Enable for FIFO Full" "0,1"
|
|
bitfld.long 0x00 6. " APT4096IEN ,Interrupt Enable for Adaptive Proportion Test Failure (4096-sample Window)" "0,1"
|
|
bitfld.long 0x00 5. " APT64IEN ,Interrupt Enable for Adaptive Proportion Test Failure (64-sample Window)" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " REPCOUNTIEN ,Interrupt Enable for Repetition Count Test Failure" "0,1"
|
|
bitfld.long 0x00 3. " CONDBYPASS ,Conditioning Bypass" "0,1"
|
|
bitfld.long 0x00 2. " TESTEN ,Test Enable" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,TRNG Module Enable" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x00 "FIFOLEVEL,FIFO Level Register"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,FIFO Level"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x00 "FIFODEPTH,FIFO Depth Register"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,FIFO Depth"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "KEY0,Key Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,Key 0"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "KEY1,Key Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,Key 1"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "KEY2,Key Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,Key 2"
|
|
group.long 0x1C++0x3
|
|
line.long 0x00 "KEY3,Key Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,Key 3"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TESTDATA,Test Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,Test data input to conditioning function or to the continuous tests"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "STATUS,Status Register"
|
|
rbitfld.long 0x00 9. " ALMIF ,AIS31 Noise Alarm interrupt status" "0,1"
|
|
bitfld.long 0x00 8. " PREIF ,AIS31 Preliminary Noise Alarm interrupt status" "0,1"
|
|
rbitfld.long 0x00 7. " FULLIF ,FIFO Full Interrupt Status" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " APT4096IF ,Adaptive Proportion test failure (4096-sample window) interrupt status" "0,1"
|
|
rbitfld.long 0x00 5. " APT64IF ,Adaptive Proportion test failure (64-sample window) interrupt status" "0,1"
|
|
rbitfld.long 0x00 4. " REPCOUNTIF ,Repetition Count Test Interrupt Status" "0,1"
|
|
textline " "
|
|
rbitfld.long 0x00 0. " TESTDATABUSY ,Test Data Busy" "0,1"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "INITWAITVAL,Initial Wait Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Wait counter value"
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x00 "FIFO,FIFO Data"
|
|
hexmask.long 0x00 0.--31. 1. " VALUE ,FIFO Read Data"
|
|
width 0x0B
|
|
tree.end
|
|
textline ""
|