9203 lines
654 KiB
Plaintext
9203 lines
654 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: EFM32TG11 On-Chip Peripherals
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; @Props: Released
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; @Author: KWI, PIW
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; @Changelog: 2018-11-24 KWI
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; 2022-01-29 PIW
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; @Manufacturer: SILICONLABS - Silicon Laboratories Inc.
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; @Doc: SVD Generated
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; @Core: Cortex-M0P
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; @Chip: EFM32TG11B120F128, EFM32TG11B140F64, EFM32TG11B320F128, EFM32TG11B340F64,
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; EFM32TG11B520F128, EFM32TG11B540F64
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; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perefm32tg11.per 14234 2022-02-03 10:27:40Z kwisniewski $
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config 16. 8.
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tree.close "Core Registers (Cortex-M0+)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 0x8
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if (CORENAME()=="CORTEXM1")
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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else
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group.long 0x10++0x0b
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line.long 0x00 "STCSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
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bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
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textline " "
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bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
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bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
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line.long 0x04 "STRVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
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line.long 0x08 "STCVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
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endif
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if (CORENAME()=="CORTEXM1")
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
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bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
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else
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rgroup.long 0x1c++0x03
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line.long 0x00 "STCR,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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textline " "
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
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endif
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rgroup.long 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
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hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
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textline " "
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hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
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hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
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group.long 0xd04++0x03
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
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bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
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bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
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textline " "
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bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
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bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
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hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
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textline " "
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hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
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if (CORENAME()=="CORTEXM0+")
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group.long 0xd08++0x03
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line.long 0x00 "VTOR,Vector Table Offset Register"
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hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
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else
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textline " "
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endif
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group.long 0xd0c++0x03
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line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
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bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
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textline " "
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bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
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bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
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group.long 0xd10++0x03
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line.long 0x00 "SCR,System Control Register"
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bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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rgroup.long 0xd14++0x03
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line.long 0x00 "CCR,Configuration and Control Register"
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bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
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bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
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group.long 0xd1c++0x0b
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line.long 0x00 "SHPR2,System Handler Priority Register 2"
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bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
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line.long 0x04 "SHPR3,System Handler Priority Register 3"
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bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
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bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
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line.long 0x08 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
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if (CORENAME()=="CORTEXM0+")
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hgroup.long 0x08++0x03
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hide.long 0x00 "ACTLR,Auxiliary Control Register"
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else
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textline " "
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endif
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else
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newline
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textline "COREDEBUG component base address not specified"
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newline
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endif
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tree.end
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tree "Memory Protection Unit (MPU)"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 15.
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rgroup.long 0xD90++0x03
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line.long 0x00 "MPU_TYPE,MPU Type Register"
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bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
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group.long 0xD94++0x03
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line.long 0x00 "MPU_CTRL,MPU Control Register"
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bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
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bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
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bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
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group.long 0xD98++0x03
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line.long 0x00 "MPU_RNR,MPU Region Number Register"
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hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
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tree.close "MPU regions"
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
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group.long 0xD9C++0x03 "Region 0"
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x0
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hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
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group.long 0xD9C++0x03 "Region 1"
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x1
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hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
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group.long 0xD9C++0x03 "Region 2"
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saveout 0xD98 %l 0x2
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line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
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saveout 0xD98 %l 0x2
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hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x2
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hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
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textline " "
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textline " "
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endif
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if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
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group.long 0xD9C++0x03 "Region 3"
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saveout 0xD98 %l 0x3
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line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
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hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
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group.long 0xDA0++0x03
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saveout 0xD98 %l 0x3
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line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
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bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
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bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
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bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
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bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
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bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
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textline " "
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bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
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bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
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bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
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bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
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bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
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bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
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bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
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bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
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bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
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bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
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else
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hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
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saveout 0xD98 %l 0x3
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hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
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hgroup.long 0xDA0++0x03
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saveout 0xD98 %l 0x3
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hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
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textline " "
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textline " "
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endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
autoindent.on center tree
|
|
tree "MSC"
|
|
base ad:0x40000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Memory System Control Register"
|
|
bitfld.long 0x00 4. "TIMEOUTFAULTEN,Timeout Bus Fault Response Enable" "0,1"
|
|
bitfld.long 0x00 3. "IFCREADCLEAR,IFC Read Clears IF" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PWRUPONDEMAND,Power Up on Demand During Wake Up" "0,1"
|
|
bitfld.long 0x00 1. "CLKDISFAULTEN,Clock-disabled Bus Fault Response Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ADDRFAULTEN,Invalid Address Bus Fault Response Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "READCTRL,Read Control Register"
|
|
bitfld.long 0x00 28. "SCBTP,Suppress Conditional Branch Target Perfetch" "0,1"
|
|
bitfld.long 0x00 24.--25. "MODE,Read Mode" "0: Zero wait-states inserted in fetch or read..,1: One wait-state inserted for each fetch or..,2: Two wait-states inserted for eatch fetch or..,3: Three wait-states inserted for eatch fetch or.."
|
|
newline
|
|
bitfld.long 0x00 9. "USEHPROT,AHB_HPROT Mode" "0,1"
|
|
bitfld.long 0x00 8. "PREFETCH,Prefetch Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ICCDIS,Interrupt Context Cache Disable" "0,1"
|
|
bitfld.long 0x00 4. "AIDIS,Automatic Invalidate Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "IFCDIS,Internal Flash Cache Disable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "WRITECTRL,Write Control Register"
|
|
bitfld.long 0x00 1. "IRQERASEABORT,Abort Page Erase on Interrupt" "0,1"
|
|
bitfld.long 0x00 0. "WREN,Enable Write/Erase Controller" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "WRITECMD,Write Command Register"
|
|
bitfld.long 0x00 12. "CLEARWDATA,Clear WDATA State" "0,1"
|
|
bitfld.long 0x00 8. "ERASEMAIN0,Mass Erase Region 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ERASEABORT,Abort Erase Sequence" "0,1"
|
|
bitfld.long 0x00 4. "WRITETRIG,Word Write Sequence Trigger" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "WRITEONCE,Word Write-Once Trigger" "0,1"
|
|
bitfld.long 0x00 2. "WRITEEND,End Write Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ERASEPAGE,Erase Page" "0,1"
|
|
bitfld.long 0x00 0. "LADDRIM,Load MSC_ADDRB Into ADDR" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ADDRB,Page Erase/Write Address Buffer"
|
|
hexmask.long 0x00 0.--31. 1. "ADDRB,Page Erase or Write Address Buffer"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "WDATA,Write Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "WDATA,Write Data"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 28.--31. "PWRUPCKBDFAILCOUNT,Flash Power Up Checkerboard Pattern Check Fail Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. "WDATAVALID,Write Data Buffer Valid Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "PCRUNNING,Performance Counters Running" "0,1"
|
|
bitfld.long 0x00 5. "ERASEABORTED,The Current Flash Erase Operation Aborted" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "WORDTIMEOUT,Flash Write Word Timeout" "0,1"
|
|
bitfld.long 0x00 3. "WDATAREADY,WDATA Write Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INVADDR,Invalid Write Address or Erase Page" "0,1"
|
|
bitfld.long 0x00 1. "LOCKED,Access Locked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BUSY,Erase/Write Busy" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 8. "LVEWRITE,Flash LVE Write Error Flag" "0,1"
|
|
bitfld.long 0x00 6. "WDATAOV,Flash Controller Write Buffer Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ICACHERR,ICache RAM Parity Error Flag" "0,1"
|
|
bitfld.long 0x00 4. "PWRUPF,Flash Power Up Sequence Complete Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CMOF,Cache Misses Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "CHOF,Cache Hits Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WRITE,Write Done Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 0. "ERASE,Erase Done Interrupt Read Flag" "0,1"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 8. "LVEWRITE,Set LVEWRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "WDATAOV,Set WDATAOV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ICACHERR,Set ICACHERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "PWRUPF,Set PWRUPF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CMOF,Set CMOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "CHOF,Set CHOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WRITE,Set WRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "ERASE,Set ERASE Interrupt Flag" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 8. "LVEWRITE,Clear LVEWRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "WDATAOV,Clear WDATAOV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ICACHERR,Clear ICACHERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "PWRUPF,Clear PWRUPF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CMOF,Clear CMOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "CHOF,Clear CHOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WRITE,Clear WRITE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "ERASE,Clear ERASE Interrupt Flag" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 8. "LVEWRITE,LVEWRITE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "WDATAOV,WDATAOV Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ICACHERR,ICACHERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "PWRUPF,PWRUPF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CMOF,CMOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "CHOF,CHOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WRITE,WRITE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "ERASE,ERASE Interrupt Enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "CACHECMD,Flash Cache Command Register"
|
|
bitfld.long 0x00 2. "STOPPC,Stop Performance Counters" "0,1"
|
|
bitfld.long 0x00 1. "STARTPC,Start Performance Counters" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "INVCACHE,Invalidate Instruction Cache" "0,1"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "CACHEHITS,Cache Hits Performance Counter"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "CACHEHITS,Cache Hits Since Last Performance Counter Start Command"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "CACHEMISSES,Cache Misses Performance Counter"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "CACHEMISSES,Cache Misses Since Last Performance Counter Start Command"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "MASSLOCK,Mass Erase Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Mass Erase Lock"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "IRQLATENCY,Irq Latency Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IRQLATENCY,Irq Latency Register"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "STARTUP,Startup Control"
|
|
bitfld.long 0x00 28.--30. "STWS,Startup Waitstates" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26. "STWSAEN,Startup Waitstates Always Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STWSEN,Startup Waitstates Enable" "0,1"
|
|
bitfld.long 0x00 24. "ASTWAIT,Active Startup Wait" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 12.--21. 1. "STDLY1,Startup Delay 0"
|
|
hexmask.long.word 0x00 0.--9. 1. "STDLY0,Startup Delay 0"
|
|
wgroup.long 0x74++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. "PWRUP,Flash Power Up Command" "0,1"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "BOOTLOADERCTRL,Bootloader Read and Write Enable Write Once Register"
|
|
bitfld.long 0x00 1. "BLWDIS,Flash Bootloader Write/Erase Disable" "0,1"
|
|
bitfld.long 0x00 0. "BLRDIS,Flash Bootloader Read Disable" "0,1"
|
|
wgroup.long 0x94++0x03
|
|
line.long 0x00 "AAPUNLOCKCMD,Software Unlock AAP Command Register"
|
|
bitfld.long 0x00 0. "UNLOCKAAP,Software Unlock AAP Command" "0,1"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CACHECONFIG0,Cache Configuration Register 0"
|
|
bitfld.long 0x00 0.--1. "CACHELPLEVEL,Instruction Cache Low-Power Level" "0: Base instruction cache functionality,1: Advanced buffering mode where the cache uses..,?,3: Minimum activity mode which allows the cache.."
|
|
tree.end
|
|
tree "EMU"
|
|
base ad:0x400E3000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 16.--17. "EM4HVSCALE,EM4H Voltage Scale" "0: Voltage Scale Level 2,?,2: Voltage Scale Level 0,3: RESV"
|
|
bitfld.long 0x00 8.--9. "EM23VSCALE,EM23 Voltage Scale" "0: Voltage Scale Level 2,?,2: Voltage Scale Level 0,3: RESV"
|
|
newline
|
|
bitfld.long 0x00 4. "EM23VSCALEAUTOWSEN,Automatically Configures Flash and Frequency to Wakeup From EM2 or EM3 at Low Voltage" "0,1"
|
|
bitfld.long 0x00 3. "EM01LD,Reserved for internal use" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EM2BODDIS,Disable BOD in EM2" "0,1"
|
|
bitfld.long 0x00 1. "EM2BLOCK,Energy Mode 2 Block" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 26. "TEMPACTIVE,Temperature Measurement Active" "0,1"
|
|
bitfld.long 0x00 20. "EM4IORET,IO Retention Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "VSCALEBUSY,System is Busy Scaling Voltage" "0,1"
|
|
bitfld.long 0x00 16.--17. "VSCALE,Current Voltage Scale Value" "0: Voltage Scale Level 2,?,2: Voltage Scale Level 0,3: RESV"
|
|
newline
|
|
bitfld.long 0x00 12. "BURDY,Backup Mode Ready" "0,1"
|
|
bitfld.long 0x00 8. "VMONFVDD,VMON VDDFLASH Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "VMONBUVDD,VMON BUVDD Channel" "0,1"
|
|
bitfld.long 0x00 4. "VMONIO0,VMON IOVDD0 Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "VMONDVDD,VMON DVDD Channel" "0,1"
|
|
bitfld.long 0x00 2. "VMONALTAVDD,Alternate VMON AVDD Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "VMONAVDD,VMON AVDD Channel" "0,1"
|
|
bitfld.long 0x00 0. "VMONRDY,VMON Ready" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RAM0CTRL,Memory Control Register"
|
|
bitfld.long 0x00 0.--2. "RAMPOWERDOWN,RAM0 Blockset Power-down" "0: None of the RAM blocks powered down,?,?,?,4: Power down RAM block 3,?,6: Power down RAM blocks 2 and above,7: Power down RAM blocks 1 and above"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 6. "EM01VSCALE2,EM01 Voltage Scale Command to Scale to Voltage Scale Level 2" "0,1"
|
|
bitfld.long 0x00 4. "EM01VSCALE0,EM01 Voltage Scale Command to Scale to Voltage Scale Level 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EM4UNLATCH,EM4 Unlatch" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "EM4CTRL,EM4 Control Register"
|
|
bitfld.long 0x00 16.--17. "EM4ENTRY,Energy Mode 4 Entry" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. "EM4IORETMODE,EM4 IO Retention Disable" "0: No Retention,1: Retention through EM4,2: Retention through EM4 and Wakeup,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "RETAINULFRCO,ULFRCO Retain During EM4S" "0,1"
|
|
bitfld.long 0x00 2. "RETAINLFXO,LFXO Retain During EM4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "RETAINLFRCO,LFRCO Retain During EM4" "0,1"
|
|
bitfld.long 0x00 0. "EM4STATE,Energy Mode 4 State" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TEMPLIMITS,Temperature Limits for Interrupt Generation"
|
|
bitfld.long 0x00 16. "EM4WUEN,Enable EM4 Wakeup Due to Low/high Temperature" "0,1"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TEMPHIGH,Temperature High Limit"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TEMPLOW,Temperature Low Limit"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "TEMP,Value of Last Temperature Measurement"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TEMP,Temperature Measurement"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. "TEMPHIGH,Temperature High Limit Reached" "0,1"
|
|
bitfld.long 0x00 30. "TEMPLOW,Temperature Low Limit Reached" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "TEMP,New Temperature Measurement Valid" "0,1"
|
|
bitfld.long 0x00 25. "VSCALEDONE,Voltage Scale Steps Done IRQ" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "EM23WAKEUP,Wakeup IRQ From EM2 and EM3" "0,1"
|
|
bitfld.long 0x00 22. "BURDY,Backup Functionality Ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DCDCINBYPASS,DCDC is in Bypass" "0,1"
|
|
bitfld.long 0x00 19. "DCDCLNRUNNING,LN Mode is Running" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DCDCLPRUNNING,LP Mode is Running" "0,1"
|
|
bitfld.long 0x00 17. "NFETOVERCURRENTLIMIT,NFET Current Limit Hit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PFETOVERCURRENTLIMIT,PFET Current Limit Hit" "0,1"
|
|
bitfld.long 0x00 15. "VMONFVDDRISE,VMON VDDFLASH Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "VMONFVDDFALL,VMON VDDFLASH Channel Fall" "0,1"
|
|
bitfld.long 0x00 13. "VMONBUVDDRISE,VMON BUVDD Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "VMONBUVDDFALL,VMON BACKUP Channel Fall" "0,1"
|
|
bitfld.long 0x00 7. "VMONIO0RISE,VMON IOVDD0 Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "VMONIO0FALL,VMON IOVDD0 Channel Fall" "0,1"
|
|
bitfld.long 0x00 5. "VMONDVDDRISE,VMON DVDD Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VMONDVDDFALL,VMON DVDD Channel Fall" "0,1"
|
|
bitfld.long 0x00 3. "VMONALTAVDDRISE,Alternate VMON AVDD Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "VMONALTAVDDFALL,Alternate VMON AVDD Channel Fall" "0,1"
|
|
bitfld.long 0x00 1. "VMONAVDDRISE,VMON AVDD Channel Rise" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "VMONAVDDFALL,VMON AVDD Channel Fall" "0,1"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. "TEMPHIGH,Set TEMPHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 30. "TEMPLOW,Set TEMPLOW Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "TEMP,Set TEMP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 25. "VSCALEDONE,Set VSCALEDONE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "EM23WAKEUP,Set EM23WAKEUP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "BURDY,Set BURDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DCDCINBYPASS,Set DCDCINBYPASS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 19. "DCDCLNRUNNING,Set DCDCLNRUNNING Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DCDCLPRUNNING,Set DCDCLPRUNNING Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "NFETOVERCURRENTLIMIT,Set NFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PFETOVERCURRENTLIMIT,Set PFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "VMONFVDDRISE,Set VMONFVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "VMONFVDDFALL,Set VMONFVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "VMONBUVDDRISE,Set VMONBUVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "VMONBUVDDFALL,Set VMONBUVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "VMONIO0RISE,Set VMONIO0RISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "VMONIO0FALL,Set VMONIO0FALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VMONDVDDRISE,Set VMONDVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "VMONDVDDFALL,Set VMONDVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "VMONALTAVDDRISE,Set VMONALTAVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "VMONALTAVDDFALL,Set VMONALTAVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "VMONAVDDRISE,Set VMONAVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "VMONAVDDFALL,Set VMONAVDDFALL Interrupt Flag" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. "TEMPHIGH,Clear TEMPHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 30. "TEMPLOW,Clear TEMPLOW Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "TEMP,Clear TEMP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 25. "VSCALEDONE,Clear VSCALEDONE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "EM23WAKEUP,Clear EM23WAKEUP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "BURDY,Clear BURDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DCDCINBYPASS,Clear DCDCINBYPASS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 19. "DCDCLNRUNNING,Clear DCDCLNRUNNING Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DCDCLPRUNNING,Clear DCDCLPRUNNING Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "NFETOVERCURRENTLIMIT,Clear NFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
|
|
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|
|
bitfld.long 0x00 16. "PFETOVERCURRENTLIMIT,Clear PFETOVERCURRENTLIMIT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "VMONFVDDRISE,Clear VMONFVDDRISE Interrupt Flag" "0,1"
|
|
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|
|
bitfld.long 0x00 14. "VMONFVDDFALL,Clear VMONFVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "VMONBUVDDRISE,Clear VMONBUVDDRISE Interrupt Flag" "0,1"
|
|
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|
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bitfld.long 0x00 12. "VMONBUVDDFALL,Clear VMONBUVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "VMONIO0RISE,Clear VMONIO0RISE Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 6. "VMONIO0FALL,Clear VMONIO0FALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "VMONDVDDRISE,Clear VMONDVDDRISE Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 4. "VMONDVDDFALL,Clear VMONDVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "VMONALTAVDDRISE,Clear VMONALTAVDDRISE Interrupt Flag" "0,1"
|
|
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|
|
bitfld.long 0x00 2. "VMONALTAVDDFALL,Clear VMONALTAVDDFALL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "VMONAVDDRISE,Clear VMONAVDDRISE Interrupt Flag" "0,1"
|
|
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|
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bitfld.long 0x00 0. "VMONAVDDFALL,Clear VMONAVDDFALL Interrupt Flag" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "TEMPHIGH,TEMPHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 30. "TEMPLOW,TEMPLOW Interrupt Enable" "0,1"
|
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|
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bitfld.long 0x00 29. "TEMP,TEMP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 25. "VSCALEDONE,VSCALEDONE Interrupt Enable" "0,1"
|
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|
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bitfld.long 0x00 24. "EM23WAKEUP,EM23WAKEUP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "BURDY,BURDY Interrupt Enable" "0,1"
|
|
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|
|
bitfld.long 0x00 20. "DCDCINBYPASS,DCDCINBYPASS Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "DCDCLNRUNNING,DCDCLNRUNNING Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 18. "DCDCLPRUNNING,DCDCLPRUNNING Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "NFETOVERCURRENTLIMIT,NFETOVERCURRENTLIMIT Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 16. "PFETOVERCURRENTLIMIT,PFETOVERCURRENTLIMIT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. "VMONFVDDRISE,VMONFVDDRISE Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 14. "VMONFVDDFALL,VMONFVDDFALL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "VMONBUVDDRISE,VMONBUVDDRISE Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 12. "VMONBUVDDFALL,VMONBUVDDFALL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "VMONIO0RISE,VMONIO0RISE Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 6. "VMONIO0FALL,VMONIO0FALL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "VMONDVDDRISE,VMONDVDDRISE Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 4. "VMONDVDDFALL,VMONDVDDFALL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "VMONALTAVDDRISE,VMONALTAVDDRISE Interrupt Enable" "0,1"
|
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|
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bitfld.long 0x00 2. "VMONALTAVDDFALL,VMONALTAVDDFALL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "VMONAVDDRISE,VMONAVDDRISE Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 0. "VMONAVDDFALL,VMONAVDDFALL Interrupt Enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "PWRLOCK,Regulator and Supply Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Regulator and Supply Configuration Lock Key"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PWRCTRL,Power Control Register"
|
|
bitfld.long 0x00 13. "IMMEDIATEPWRSWITCH,Allows Immediate Switching of ANASW and REGPWRSEL Bitfields" "0,1"
|
|
bitfld.long 0x00 10. "REGPWRSEL,This Field Selects the Input Supply Pin for the Digital LDO" "0,1"
|
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|
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bitfld.long 0x00 5. "ANASW,Analog Switch Selection" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DCDCCTRL,DCDC Control"
|
|
bitfld.long 0x00 5. "DCDCMODEEM4,DCDC Mode EM4H" "0,1"
|
|
bitfld.long 0x00 4. "DCDCMODEEM23,DCDC Mode EM23" "0,1"
|
|
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|
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bitfld.long 0x00 0.--1. "DCDCMODE,Regulator Mode" "0: DCDC regulator is operating in bypass mode,1: DCDC regulator is operating in low noise mode,2: DCDC regulator is operating in low power mode,3: DCDC regulator is off and the bypass switch.."
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DCDCMISCCTRL,DCDC Miscellaneous Control Register"
|
|
bitfld.long 0x00 28.--29. "LPCMPBIASEM234H,LP Mode Comparator Bias Selection for EM23 or EM4H" "0: Maximum load current less than 75uA,1: Maximum load current less than 500uA,2: Maximum load current less than 2.5mA,3: Maximum load current less than 10mA"
|
|
bitfld.long 0x00 24.--26. "LNCLIMILIMSEL,Current Limit Level Selection for Current Limiter in LN Mode" "0,1,2,3,4,5,6,7"
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|
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bitfld.long 0x00 20.--22. "LPCLIMILIMSEL,Current Limit Level Selection for Current Limiter in LP Mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--19. "BYPLIMSEL,Current Limit in Bypass Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
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|
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bitfld.long 0x00 12.--15. "NFETCNT,NFET Switch Number Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "PFETCNT,PFET Switch Number Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 5. "LNFORCECCMIMM,Force DCDC Into CCM Mode Immediately Based on LNFORCECCM" "0,1"
|
|
bitfld.long 0x00 2. "LPCMPHYSHI,Comparator Threshold on the High Side" "0,1"
|
|
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|
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bitfld.long 0x00 1. "LPCMPHYSDIS,Disable LP Mode Hysteresis in the State Machine Control" "0,1"
|
|
bitfld.long 0x00 0. "LNFORCECCM,Force DCDC Into CCM Mode in Low Noise Operation" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DCDCZDETCTRL,DCDC Power Train NFET Zero Current Detector Control Register"
|
|
bitfld.long 0x00 8.--9. "ZDETBLANKDLY,Reserved for internal use" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. "ZDETILIMSEL,Reverse Current Limit Level Selection for Zero Detector" "0,1,2,3,4,5,6,7"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DCDCCLIMCTRL,DCDC Power Train PFET Current Limiter Control Register"
|
|
bitfld.long 0x00 13. "BYPLIMEN,Bypass Current Limit Enable" "0,1"
|
|
bitfld.long 0x00 8.--9. "CLIMBLANKDLY,Reserved for internal use" "0,1,2,3"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DCDCLNCOMPCTRL,DCDC Low Noise Compensator Control Register"
|
|
bitfld.long 0x00 28.--31. "COMPENC3,Low Noise Mode Compensator C3 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 24.--26. "COMPENC2,Low Noise Mode Compensator C2 Trim Value" "0,1,2,3,4,5,6,7"
|
|
newline
|
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bitfld.long 0x00 20.--21. "COMPENC1,Low Noise Mode Compensator C1 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 12.--15. "COMPENR3,Low Noise Mode Compensator R3 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 4.--8. "COMPENR2,Low Noise Mode Compensator R2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--2. "COMPENR1,Low Noise Mode Compensator R1 Trim Value" "0,1,2,3,4,5,6,7"
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group.long 0x5C++0x03
|
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line.long 0x00 "DCDCLNVCTRL,DCDC Low Noise Voltage Register"
|
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hexmask.long.byte 0x00 8.--14. 1. "LNVREF,Low Noise Mode VREF Trim"
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bitfld.long 0x00 1. "LNATT,Low Noise Mode Feedback Attenuation" "0,1"
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group.long 0x64++0x03
|
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line.long 0x00 "DCDCLPVCTRL,DCDC Low Power Voltage Register"
|
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hexmask.long.byte 0x00 1.--8. 1. "LPVREF,LP Mode Reference Selection for EM23 and EM4H"
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bitfld.long 0x00 0. "LPATT,Low Power Feedback Attenuation" "0,1"
|
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group.long 0x6C++0x03
|
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line.long 0x00 "DCDCLPCTRL,DCDC Low Power Control Register"
|
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bitfld.long 0x00 25.--26. "LPBLANK,Reserved for internal use" "0,1,2,3"
|
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bitfld.long 0x00 24. "LPVREFDUTYEN,LP Mode Duty Cycling Enable" "0,1"
|
|
newline
|
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bitfld.long 0x00 12.--15. "LPCMPHYSSELEM234H,LP Mode Hysteresis Selection for EM23 and EM4H" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x70++0x03
|
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line.long 0x00 "DCDCLNFREQCTRL,DCDC Low Noise Controller Frequency Control"
|
|
bitfld.long 0x00 24.--28. "RCOTRIM,Reserved for internal use" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 0.--2. "RCOBAND,LN Mode RCO Frequency Band Selection" "0,1,2,3,4,5,6,7"
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rgroup.long 0x78++0x03
|
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line.long 0x00 "DCDCSYNC,DCDC Read Status Register"
|
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bitfld.long 0x00 0. "DCDCCTRLBUSY,DCDC CTRL Register Transfer Busy" "0,1"
|
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group.long 0x90++0x03
|
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line.long 0x00 "VMONAVDDCTRL,VMON AVDD Channel Control"
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bitfld.long 0x00 20.--23. "RISETHRESCOARSE,Rising Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. "RISETHRESFINE,Rising Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.long 0x00 12.--15. "FALLTHRESCOARSE,Falling Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. "FALLTHRESFINE,Falling Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.long 0x00 3. "FALLWU,Fall Wakeup" "0,1"
|
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bitfld.long 0x00 2. "RISEWU,Rise Wakeup" "0,1"
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newline
|
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bitfld.long 0x00 0. "EN,Enable" "0,1"
|
|
group.long 0x94++0x03
|
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line.long 0x00 "VMONALTAVDDCTRL,Alternate VMON AVDD Channel Control"
|
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bitfld.long 0x00 12.--15. "THRESCOARSE,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. "THRESFINE,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 3. "FALLWU,Fall Wakeup" "0,1"
|
|
bitfld.long 0x00 2. "RISEWU,Rise Wakeup" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "EN,Enable" "0,1"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "VMONDVDDCTRL,VMON DVDD Channel Control"
|
|
bitfld.long 0x00 12.--15. "THRESCOARSE,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 8.--11. "THRESFINE,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 3. "FALLWU,Fall Wakeup" "0,1"
|
|
bitfld.long 0x00 2. "RISEWU,Rise Wakeup" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "EN,Enable" "0,1"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "VMONIO0CTRL,VMON IOVDD0 Channel Control"
|
|
bitfld.long 0x00 12.--15. "THRESCOARSE,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "THRESFINE,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 4. "RETDIS,EM4 IO0 Retention Disable" "0,1"
|
|
bitfld.long 0x00 3. "FALLWU,Fall Wakeup" "0,1"
|
|
newline
|
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bitfld.long 0x00 2. "RISEWU,Rise Wakeup" "0,1"
|
|
bitfld.long 0x00 0. "EN,Enable" "0,1"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "VMONBUVDDCTRL,VMON BUVDD Channel Control"
|
|
bitfld.long 0x00 12.--15. "THRESCOARSE,Threshold Coarse Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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bitfld.long 0x00 8.--11. "THRESFINE,Threshold Fine Adjust" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 3. "FALLWU,Fall Wakeup" "0,1"
|
|
bitfld.long 0x00 2. "RISEWU,Rise Wakeup" "0,1"
|
|
newline
|
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bitfld.long 0x00 0. "EN,Enable" "0,1"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "BUCTRL,Backup Power Configuration Register"
|
|
bitfld.long 0x00 31. "DISMAXCOMP,Disable MAIN-BU Comparator" "0,1"
|
|
bitfld.long 0x00 20.--21. "BUINACTPWRCON,Power Connection Configuration When Not in Backup Mode" "0: No connection,1: Main power and backup power are connected..,2: Main power and backup power are connected..,3: Main power and backup power are connected.."
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|
newline
|
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bitfld.long 0x00 16.--17. "BUACTPWRCON,Power Connection Configuration in Backup Mode" "0: No connection,1: Main power and backup power are connected..,2: Main power and backup power are connected..,3: Main power and backup power are connected.."
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|
bitfld.long 0x00 12.--13. "PWRRES,Power Domain Resistor Select" "0: Main power and backup power connected with..,1: Main power and backup power connected with..,2: Main power and backup power connected with..,3: Main power and backup power connected with.."
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|
newline
|
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bitfld.long 0x00 8.--9. "VOUTRES,BU_VOUT Resistor Select" "0: BU_VOUT is not connected,1: Enable weak switch between BU_VOUT and backup..,2: Enable medium switch between BU_VOUT and..,3: Enable strong switch between BU_VOUT and.."
|
|
bitfld.long 0x00 2. "BUVINPROBEEN,Enable BU_VIN Probing" "0,1"
|
|
newline
|
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bitfld.long 0x00 1. "STATEN,Enable Backup Mode Status Export" "0,1"
|
|
bitfld.long 0x00 0. "EN,Enable Backup Mode" "0,1"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "DCDCLPEM01CFG,Configuration Bits for Low Power Mode to Be Applied During EM01 This Field is Only Relevant If LP Mode is Used in EM01"
|
|
bitfld.long 0x00 12.--15. "LPCMPHYSSELEM01,LP Mode Hysteresis Selection for EM01" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--9. "LPCMPBIASEM01,LP Mode Comparator Bias Selection for EM01" "0: Maximum load current less than 75uA,1: Maximum load current less than 500uA,2: Maximum load current less than 2.5mA,3: Maximum load current less than 10mA"
|
|
wgroup.long 0x100++0x03
|
|
line.long 0x00 "EM23PERNORETAINCMD,Clears Corresponding Bits in EM23PERNORETAINSTATUS Unlocking Access to Peripheral"
|
|
bitfld.long 0x00 17. "LCDUNLOCK,Clears Status Bit of LCD and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 15. "LEUART0UNLOCK,Clears Status Bit of LEUART0 and Unlocks Access to It" "0,1"
|
|
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|
|
bitfld.long 0x00 14. "CSENUNLOCK,Clears Status Bit of CSEN and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 13. "LESENSE0UNLOCK,Clears Status Bit of LESENSE0 and Unlocks Access to It" "0,1"
|
|
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|
|
bitfld.long 0x00 11. "WDOG0UNLOCK,Clears Status Bit of WDOG0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 10. "LETIMER0UNLOCK,Clears Status Bit of LETIMER0 and Unlocks Access to It" "0,1"
|
|
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|
|
bitfld.long 0x00 9. "ADC0UNLOCK,Clears Status Bit of ADC0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 7. "DAC0UNLOCK,Clears Status Bit of DAC0 and Unlocks Access to It" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "I2C1UNLOCK,Clears Status Bit of I2C1 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 5. "I2C0UNLOCK,Clears Status Bit of I2C0 and Unlocks Access to It" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCNT0UNLOCK,Clears Status Bit of PCNT0 and Unlocks Access to It" "0,1"
|
|
bitfld.long 0x00 1. "ACMP1UNLOCK,Clears Status Bit of ACMP1 and Unlocks Access to It" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACMP0UNLOCK,Clears Status Bit of ACMP0 and Unlocks Access to It" "0,1"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "EM23PERNORETAINSTATUS,Status Indicating If Peripherals Were Powered Down in EM23 Subsequently Locking Access to It"
|
|
bitfld.long 0x00 17. "LCDLOCKED,Indicates If LCD Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 15. "LEUART0LOCKED,Indicates If LEUART0 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CSENLOCKED,Indicates If CSEN Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 13. "LESENSE0LOCKED,Indicates If LESENSE0 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WDOG0LOCKED,Indicates If WDOG0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 10. "LETIMER0LOCKED,Indicates If LETIMER0 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ADC0LOCKED,Indicates If ADC0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 7. "DAC0LOCKED,Indicates If DAC0 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "I2C1LOCKED,Indicates If I2C1 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 5. "I2C0LOCKED,Indicates If I2C0 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCNT0LOCKED,Indicates If PCNT0 Powered Down During EM23" "0,1"
|
|
bitfld.long 0x00 1. "ACMP1LOCKED,Indicates If ACMP1 Powered Down During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACMP0LOCKED,Indicates If ACMP0 Powered Down During EM23" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "EM23PERNORETAINCTRL,When Set Corresponding Peripherals May Get Powered Down in EM23"
|
|
bitfld.long 0x00 17. "LCDDIS,Allow Power Down of LCD During EM23" "0,1"
|
|
bitfld.long 0x00 15. "LEUART0DIS,Allow Power Down of LEUART0 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CSENDIS,Allow Power Down of CSEN During EM23" "0,1"
|
|
bitfld.long 0x00 13. "LESENSE0DIS,Allow Power Down of LESENSE0 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WDOG0DIS,Allow Power Down of WDOG0 During EM23" "0,1"
|
|
bitfld.long 0x00 10. "LETIMER0DIS,Allow Power Down of LETIMER0 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ADC0DIS,Allow Power Down of ADC0 During EM23" "0,1"
|
|
bitfld.long 0x00 7. "VDAC0DIS,Allow Power Down of DAC0 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "I2C1DIS,Allow Power Down of I2C1 During EM23" "0,1"
|
|
bitfld.long 0x00 5. "I2C0DIS,Allow Power Down of I2C0 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PCNT0DIS,Allow Power Down of PCNT0 During EM23" "0,1"
|
|
bitfld.long 0x00 1. "ACMP1DIS,Allow Power Down of ACMP1 During EM23" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACMP0DIS,Allow Power Down of ACMP0 During EM23" "0,1"
|
|
tree.end
|
|
tree "RMU"
|
|
base ad:0x400E5000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 24.--25. "RESETSTATE,System Software Reset State" "0,1,2,3"
|
|
bitfld.long 0x00 12.--14. "PINRMODE,PIN Reset Mode" "0: Reset request is blocked,1: The CRYOTIMER DEBUGGER RTCC are not reset,2: The CRYOTIMER DEBUGGER are not reset,?,4: The entire device is reset except some EMU..,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. "SYSRMODE,Core Sysreset Reset Mode" "0: Reset request is blocked,1: The CRYOTIMER DEBUGGER RTCC are not reset,2: The CRYOTIMER DEBUGGER are not reset,?,4: The entire device is reset except some EMU..,?..."
|
|
bitfld.long 0x00 4.--6. "LOCKUPRMODE,Core LOCKUP Reset Mode" "0: Reset request is blocked,1: The CRYOTIMER DEBUGGER RTCC are not reset,2: The CRYOTIMER DEBUGGER are not reset,?,4: The entire device is reset except some EMU..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "WDOGRMODE,WDOG Reset Mode" "0: Reset request is blocked,1: The CRYOTIMER DEBUGGER RTCC are not reset,2: The CRYOTIMER DEBUGGER are not reset,?,4: The entire device is reset except some EMU..,?..."
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "RSTCAUSE,Reset Cause Register"
|
|
bitfld.long 0x00 16. "EM4RST,EM4 Reset" "0,1"
|
|
bitfld.long 0x00 12. "BUMODERST,Backup Mode Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "WDOGRST,Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 10. "SYSREQRST,System Request Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "LOCKUPRST,LOCKUP Reset" "0,1"
|
|
bitfld.long 0x00 8. "EXTRST,External Pin Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "DECBOD,Brown Out Detector Decouple Domain Reset" "0,1"
|
|
bitfld.long 0x00 3. "DVDDBOD,Brown Out Detector DVDD Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "AVDDBOD,Brown Out Detector AVDD Reset" "0,1"
|
|
bitfld.long 0x00 0. "PORST,Power on Reset" "0,1"
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. "RCCLR,Reset Cause Clear" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "RST,Reset Control Register"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
tree.end
|
|
tree "CMU"
|
|
base ad:0x400E4000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,CMU Control Register"
|
|
bitfld.long 0x00 20. "HFPERCLKEN,HFPERCLK Enable" "0,1"
|
|
bitfld.long 0x00 16. "WSHFLE,Wait State for High-Frequency LE Interface" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CLKOUTSEL2,Clock Output Select 2" "0: DISABLED,1: ULFRCO (directly from oscillator),2: LFRCO (directly from oscillator),3: LFXO (directly from oscillator),?,5: HFXO divided by two (qualified),6: HFXO (directly from oscillator),7: HFEXPCLK,?,9: ULFRCO (qualified),10: LFRCO (qualified),11: LFXO (qualified),12: HFRCO (qualified),13: AUXHFRCO (qualified),14: HFXO (qualified),15: HFSRCCLK"
|
|
bitfld.long 0x00 5.--8. "CLKOUTSEL1,Clock Output Select 1" "0: DISABLED,1: ULFRCO (directly from oscillator),2: LFRCO (directly from oscillator),3: LFXO (directly from oscillator),?,?,6: HFXO (directly from oscillator),7: HFEXPCLK,?,9: ULFRCO (qualified),10: LFRCO (qualified),11: LFXO (qualified),12: HFRCO (qualified),13: AUXHFRCO (qualified),14: HFXO (qualified),15: HFSRCCLK"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CLKOUTSEL0,Clock Output Select 0" "0: DISABLED,1: ULFRCO (directly from oscillator),2: LFRCO (directly from oscillator),3: LFXO (directly from oscillator),?,?,6: HFXO (directly from oscillator),7: HFEXPCLK,?,9: ULFRCO (qualified),10: LFRCO (qualified),11: LFXO (qualified),12: HFRCO (qualified),13: AUXHFRCO (qualified),14: HFXO (qualified),15: HFSRCCLK"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HFRCOCTRL,HFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. "VREFTC,HFRCO Temperature Coefficient Trim on Comparator Reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. "FINETUNINGEN,Enable Reference for Fine Tuning" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "CLKDIV,Locally Divide HFRCO Clock Output" "0: Divide by 1,1: Divide by 2,2: Divide by 4,?..."
|
|
bitfld.long 0x00 24. "LDOHP,HFRCO LDO High Power Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "CMPBIAS,HFRCO Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. "FREQRANGE,HFRCO Frequency Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "FINETUNING,HFRCO Fine Tuning Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TUNING,HFRCO Tuning Value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AUXHFRCOCTRL,AUXHFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. "VREFTC,AUXHFRCO Temperature Coefficient Trim on Comparator Reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 27. "FINETUNINGEN,Enable Reference for Fine Tuning" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "CLKDIV,Locally Divide AUXHFRCO Clock Output" "0: Divide by 1,1: Divide by 2,2: Divide by 4,?..."
|
|
bitfld.long 0x00 24. "LDOHP,AUXHFRCO LDO High Power Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21.--23. "CMPBIAS,AUXHFRCO Comparator Bias Current" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--20. "FREQRANGE,AUXHFRCO Frequency Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "FINETUNING,AUXHFRCO Fine Tuning Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--6. 1. "TUNING,AUXHFRCO Tuning Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "LFRCOCTRL,LFRCO Control Register"
|
|
bitfld.long 0x00 28.--31. "GMCCURTUNE,Tuning of Gmc Current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--25. "TIMEOUT,LFRCO Timeout" "0: Timeout period of 2 cycles,1: Timeout period of 16 cycles,2: Timeout period of 32 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. "VREFUPDATE,Control Vref Update Rate" "0: 32 clocks,1: 64 clocks,2: 128 clocks,3: 256 clocks"
|
|
bitfld.long 0x00 18. "ENDEM,Enable Dynamic Element Matching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "ENCHOP,Enable Comparator Chopping" "0,1"
|
|
bitfld.long 0x00 16. "ENVREF,Enable Duty Cycling of Vref" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "TUNING,LFRCO Tuning Value"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "HFXOCTRL,HFXO Control Register"
|
|
bitfld.long 0x00 29. "AUTOSTARTSELEM0EM1,Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3" "0,1"
|
|
bitfld.long 0x00 28. "AUTOSTARTEM0EM1,Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "LFTIMEOUT,HFXO Low Frequency Timeout" "0: Timeout period of 0 cycles (disabled),1: Timeout period of 2 cycles,2: Timeout period of 4 cycles,3: Timeout period of 16 cycles,4: Timeout period of 32 cycles,5: Timeout period of 64 cycles,6: Timeout period of 1024 cycles,7: Timeout period of 4096 cycles"
|
|
bitfld.long 0x00 4.--5. "PEAKDETMODE,HFXO Automatic Peak Detection Mode" "0: Automatic control of HFXO peak detection..,1: Automatic control of HFXO peak detection..,2: CMU_CMD HFXOPEAKDETSTART can be used to..,3: CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and.."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MODE,HFXO Mode" "0: 4 MHz - 48 MHz crystal oscillator,1: An AC coupled buffer is coupled in series..,2: A DC coupled buffer is coupled in series with..,3: Digital external clock can be supplied on.."
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HFXOCTRL1,HFXO Control 1"
|
|
bitfld.long 0x00 12.--14. "PEAKDETTHR,Sets the Amplitude Detection Level (mV)" "0: 50mV amplitude detection level,1: 75mV amplitude detection level,2: 115mV amplitude detection level,3: 160mV amplitude detection level,4: 220mV amplitude detection level,5: 260mV amplitude detection level,6: 320mV amplitude detection level,7: Same as THR6"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "HFXOSTARTUPCTRL,HFXO Startup Control"
|
|
hexmask.long.word 0x00 11.--19. 1. "CTUNE,Sets Oscillator Tuning Capacitance"
|
|
hexmask.long.word 0x00 0.--10. 1. "IBTRIMXOCORE,Sets the Startup Oscillator Core Bias Current"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "HFXOSTEADYSTATECTRL,HFXO Steady State Control"
|
|
bitfld.long 0x00 27. "PEAKMONEN,Automatically Perform Peak Monitoring Algorithm on Every Rising Edge of ULFRCO" "0,1"
|
|
bitfld.long 0x00 26. "PEAKDETEN,Enables Oscillator Peak Detectors" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 11.--19. 1. "CTUNE,Sets Oscillator Tuning Capacitance"
|
|
hexmask.long.word 0x00 0.--10. 1. "IBTRIMXOCORE,Sets the Steady State Oscillator Core Bias Current"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "HFXOTIMEOUTCTRL,HFXO Timeout Control"
|
|
bitfld.long 0x00 12.--15. "PEAKDETTIMEOUT,Wait Duration in HFXO Peak Detection Wait State" "0: Timeout period of 2 cycles,1: Timeout period of 4 cycles,2: Timeout period of 16 cycles,3: Timeout period of 32 cycles,4: Timeout period of 64 cycles,5: Timeout period of 128 cycles,6: Timeout period of 256 cycles,7: Timeout period of 1024 cycles,8: Timeout period of 2048 cycles,9: Timeout period of 4096 cycles,10: Timeout period of 8192 cycles,11: Timeout period of 16384 cycles,12: Timeout period of 32768 cycles,13: Timeout period of 65536 cycles,14: Timeout period of 131072 cycles,?..."
|
|
bitfld.long 0x00 4.--7. "STEADYTIMEOUT,Wait Duration in HFXO Startup Steady Wait State" "0: Timeout period of 2 cycles,1: Timeout period of 4 cycles,2: Timeout period of 16 cycles,3: Timeout period of 32 cycles,4: Timeout period of 64 cycles,5: Timeout period of 128 cycles,6: Timeout period of 256 cycles,7: Timeout period of 1024 cycles,8: Timeout period of 2048 cycles,9: Timeout period of 4096 cycles,10: Timeout period of 8192 cycles,11: Timeout period of 16384 cycles,12: Timeout period of 32768 cycles,13: Timeout period of 65536 cycles,14: Timeout period of 131072 cycles,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "STARTUPTIMEOUT,Wait Duration in HFXO Startup Enable Wait State" "0: Timeout period of 2 cycles,1: Timeout period of 4 cycles,2: Timeout period of 16 cycles,3: Timeout period of 32 cycles,4: Timeout period of 64 cycles,5: Timeout period of 128 cycles,6: Timeout period of 256 cycles,7: Timeout period of 1024 cycles,8: Timeout period of 2048 cycles,9: Timeout period of 4096 cycles,10: Timeout period of 8192 cycles,11: Timeout period of 16384 cycles,12: Timeout period of 32768 cycles,13: Timeout period of 65536 cycles,14: Timeout period of 131072 cycles,?..."
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LFXOCTRL,LFXO Control Register"
|
|
bitfld.long 0x00 24.--26. "TIMEOUT,LFXO Timeout" "0: Timeout period of 2 cycles,1: Timeout period of 256 cycles,2: Timeout period of 1024 cycles,3: Timeout period of 2048 cycles,4: Timeout period of 4096 cycles,5: Timeout period of 8192 cycles,6: Timeout period of 16384 cycles,7: Timeout period of 32768 cycles"
|
|
bitfld.long 0x00 20. "BUFCUR,LFXO Buffer Bias Current" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "CUR,LFXO Current Trim" "0,1,2,3"
|
|
bitfld.long 0x00 15. "AGC,LFXO AGC Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "HIGHAMPL,LFXO High XTAL Oscillation Amplitude Enable" "0,1"
|
|
bitfld.long 0x00 11.--12. "GAIN,LFXO Startup Gain" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "MODE,LFXO Mode" "0: 32768 Hz crystal oscillator,1: An AC coupled buffer is coupled in series..,2: Digital external clock on LFXTAL_N pin,?..."
|
|
hexmask.long.byte 0x00 0.--6. 1. "TUNING,LFXO Internal Capacitor Array Tuning Value"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DPLLCTRL,DPLL Control Register"
|
|
bitfld.long 0x00 6. "DITHEN,Dither Enable Control" "0,1"
|
|
bitfld.long 0x00 3.--4. "REFSEL,Reference Clock Selection Control" "0: HFXO selected,1: LFXO selected,?,3: CLKIN0 selected"
|
|
newline
|
|
bitfld.long 0x00 2. "AUTORECOVER,Automatic Recovery Ctrl" "0,1"
|
|
bitfld.long 0x00 1. "EDGESEL,Reference Edge Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "MODE,Operating Mode Control" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DPLLCTRL1,DPLL Control Register"
|
|
hexmask.long.word 0x00 16.--27. 1. "N,Factor N"
|
|
hexmask.long.word 0x00 0.--11. 1. "M,Factor M"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CALCTRL,Calibration Control Register"
|
|
bitfld.long 0x00 24.--26. "PRSDOWNSEL,PRS Select for PRS Input When Selected in DOWNSEL" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
bitfld.long 0x00 16.--18. "PRSUPSEL,PRS Select for PRS Input When Selected in UPSEL" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 8. "CONT,Continuous Calibration" "0,1"
|
|
bitfld.long 0x00 4.--6. "DOWNSEL,Calibration Down-counter Select" "0: Select HFCLK for down-counter,1: Select HFXO for down-counter,2: Select LFXO for down-counter,3: Select HFRCO for down-counter,4: Select LFRCO for down-counter,5: Select AUXHFRCO for down-counter,6: Select PRS input selected by PRSDOWNSEL as..,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "UPSEL,Calibration Up-counter Select" "0: Select HFXO as up-counter,1: Select LFXO as up-counter,2: Select HFRCO as up-counter,3: Select LFRCO as up-counter,4: Select AUXHFRCO as up-counter,5: Select PRS input selected by PRSUPSEL as..,?..."
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CALCNT,Calibration Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "CALCNT,Calibration Counter"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "OSCENCMD,Oscillator Enable/Disable Command Register"
|
|
bitfld.long 0x00 13. "DPLLDIS,DPLL Disable" "0,1"
|
|
bitfld.long 0x00 12. "DPLLEN,DPLL Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "LFXODIS,LFXO Disable" "0,1"
|
|
bitfld.long 0x00 8. "LFXOEN,LFXO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "LFRCODIS,LFRCO Disable" "0,1"
|
|
bitfld.long 0x00 6. "LFRCOEN,LFRCO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "AUXHFRCODIS,AUXHFRCO Disable" "0,1"
|
|
bitfld.long 0x00 4. "AUXHFRCOEN,AUXHFRCO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "HFXODIS,HFXO Disable" "0,1"
|
|
bitfld.long 0x00 2. "HFXOEN,HFXO Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "HFRCODIS,HFRCO Disable" "0,1"
|
|
bitfld.long 0x00 0. "HFRCOEN,HFRCO Enable" "0,1"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 4. "HFXOPEAKDETSTART,HFXO Peak Detection Start" "0,1"
|
|
bitfld.long 0x00 1. "CALSTOP,Calibration Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CALSTART,Calibration Start" "0,1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "DBGCLKSEL,Debug Trace Clock Select"
|
|
bitfld.long 0x00 0.--1. "DBG,Debug Trace Clock" "0: AUXHFRCO is the debug trace clock,1: HFCLK is the debug trace clock,2: HFRCO divided by 2 is the debug trace clock,?..."
|
|
wgroup.long 0x74++0x03
|
|
line.long 0x00 "HFCLKSEL,High Frequency Clock Select Command Register"
|
|
bitfld.long 0x00 0.--2. "HF,HFCLK Select" "?,1: Select HFRCO as HFCLK,2: Select HFXO as HFCLK,3: Select LFRCO as HFCLK,4: Select LFXO as HFCLK,5: Select HFRCO divided by 2 as HFCLK,?,7: Select CLKIN0 as HFCLK"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "LFACLKSEL,Low Frequency A Clock Select Register"
|
|
bitfld.long 0x00 0.--2. "LFA,Clock Select for LFA" "0: LFACLK is disabled,1: LFRCO selected as LFACLK,2: LFXO selected as LFACLK,?,4: ULFRCO selected as LFACLK,?..."
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "LFBCLKSEL,Low Frequency B Clock Select Register"
|
|
bitfld.long 0x00 0.--2. "LFB,Clock Select for LFB" "0: LFBCLK is disabled,1: LFRCO selected as LFBCLK,2: LFXO selected as LFBCLK,3: HFCLK divided by two/four is selected as LFBCLK,4: ULFRCO selected as LFBCLK,?..."
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LFECLKSEL,Low Frequency E Clock Select Register"
|
|
bitfld.long 0x00 0.--2. "LFE,Clock Select for LFE" "0: LFECLK is disabled,1: LFRCO selected as LFECLK,2: LFXO selected as LFECLK,?,4: ULFRCO selected as LFECLK,?..."
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 29. "ULFRCOPHASE,ULFRCO Clock Phase" "0,1"
|
|
bitfld.long 0x00 28. "LFRCOPHASE,LFRCO Clock Phase" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LFXOPHASE,LFXO Clock Phase" "0,1"
|
|
bitfld.long 0x00 25. "HFXOAMPLOW,HFXO Amplitude Tuning Value Too Low" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "HFXOPEAKDETRDY,HFXO Peak Detection Ready" "0,1"
|
|
bitfld.long 0x00 16. "CALRDY,Calibration Ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "DPLLRDY,DPLL Ready" "0,1"
|
|
bitfld.long 0x00 12. "DPLLENS,DPLL Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "LFXORDY,LFXO Ready" "0,1"
|
|
bitfld.long 0x00 8. "LFXOENS,LFXO Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "LFRCORDY,LFRCO Ready" "0,1"
|
|
bitfld.long 0x00 6. "LFRCOENS,LFRCO Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "AUXHFRCORDY,AUXHFRCO Ready" "0,1"
|
|
bitfld.long 0x00 4. "AUXHFRCOENS,AUXHFRCO Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "HFXORDY,HFXO Ready" "0,1"
|
|
bitfld.long 0x00 2. "HFXOENS,HFXO Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "HFRCORDY,HFRCO Ready" "0,1"
|
|
bitfld.long 0x00 0. "HFRCOENS,HFRCO Enable Status" "0,1"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "HFCLKSTATUS,HFCLK Status Register"
|
|
bitfld.long 0x00 0.--2. "SELECTED,HFCLK Selected" "?,1: HFRCO is selected as HFCLK clock source,2: HFXO is selected as HFCLK clock source,3: LFRCO is selected as HFCLK clock source,4: LFXO is selected as HFCLK clock source,5: HFRCO divided by 2 is selected as HFCLK clock..,?,7: CLKIN0 is selected as HFCLK clock source"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "HFXOTRIMSTATUS,HFXO Trim Status"
|
|
bitfld.long 0x00 31. "MONVALID,Peak Detection Algorithm or Peak Monitoring Algorithm Found a Value for IBTRIMXOCOREMON" "0,1"
|
|
bitfld.long 0x00 30. "VALID,Peak Detection Algorithm Found a Value for IBTRIMXOCORE" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 16.--26. 1. "IBTRIMXOCOREMON,Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm or Peak Monitoring Algorithm (completion of Either Algorithm Will Cause an Update of IBTRIMXOCOREMON)"
|
|
hexmask.long.word 0x00 0.--10. 1. "IBTRIMXOCORE,Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm"
|
|
rgroup.long 0xA0++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. "CMUERR,CMU Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. "ULFRCOEDGE,ULFRCO Clock Edge Detected Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "LFRCOEDGE,LFRCO Clock Edge Detected Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 27. "LFXOEDGE,LFXO Clock Edge Detected Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "DPLLLOCKFAILHIGH,DPLL Lock Failure Low Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLOCKFAILLOW,DPLL Lock Failure Low Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DPLLRDY,DPLL Lock Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "LFTIMEOUTERR,Low Frequency Timeout Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HFRCODIS,HFRCO Disable Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "HFXOPEAKDETRDY,HFXO Automatic Peak Detection Ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "HFXOAUTOSW,HFXO Automatic Switch Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "HFXODISERR,HFXO Disable Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CALOF,Calibration Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CALRDY,Calibration Ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXHFRCORDY,AUXHFRCO Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "LFXORDY,LFXO Ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LFRCORDY,LFRCO Ready Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "HFXORDY,HFXO Ready Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "HFRCORDY,HFRCO Ready Interrupt Flag" "0,1"
|
|
wgroup.long 0xA4++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. "CMUERR,Set CMUERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. "ULFRCOEDGE,Set ULFRCOEDGE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "LFRCOEDGE,Set LFRCOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 27. "LFXOEDGE,Set LFXOEDGE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "DPLLLOCKFAILHIGH,Set DPLLLOCKFAILHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLOCKFAILLOW,Set DPLLLOCKFAILLOW Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DPLLRDY,Set DPLLRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "LFTIMEOUTERR,Set LFTIMEOUTERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HFRCODIS,Set HFRCODIS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "HFXOPEAKDETRDY,Set HFXOPEAKDETRDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "HFXOAUTOSW,Set HFXOAUTOSW Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "HFXODISERR,Set HFXODISERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CALOF,Set CALOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CALRDY,Set CALRDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXHFRCORDY,Set AUXHFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "LFXORDY,Set LFXORDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LFRCORDY,Set LFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "HFXORDY,Set HFXORDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "HFRCORDY,Set HFRCORDY Interrupt Flag" "0,1"
|
|
wgroup.long 0xA8++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. "CMUERR,Clear CMUERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 29. "ULFRCOEDGE,Clear ULFRCOEDGE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "LFRCOEDGE,Clear LFRCOEDGE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 27. "LFXOEDGE,Clear LFXOEDGE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "DPLLLOCKFAILHIGH,Clear DPLLLOCKFAILHIGH Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLOCKFAILLOW,Clear DPLLLOCKFAILLOW Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DPLLRDY,Clear DPLLRDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 14. "LFTIMEOUTERR,Clear LFTIMEOUTERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HFRCODIS,Clear HFRCODIS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "HFXOPEAKDETRDY,Clear HFXOPEAKDETRDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "HFXOAUTOSW,Clear HFXOAUTOSW Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "HFXODISERR,Clear HFXODISERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CALOF,Clear CALOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CALRDY,Clear CALRDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXHFRCORDY,Clear AUXHFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "LFXORDY,Clear LFXORDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LFRCORDY,Clear LFRCORDY Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "HFXORDY,Clear HFXORDY Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "HFRCORDY,Clear HFRCORDY Interrupt Flag" "0,1"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "CMUERR,CMUERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 29. "ULFRCOEDGE,ULFRCOEDGE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "LFRCOEDGE,LFRCOEDGE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 27. "LFXOEDGE,LFXOEDGE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "DPLLLOCKFAILHIGH,DPLLLOCKFAILHIGH Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "DPLLLOCKFAILLOW,DPLLLOCKFAILLOW Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "DPLLRDY,DPLLRDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 14. "LFTIMEOUTERR,LFTIMEOUTERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "HFRCODIS,HFRCODIS Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "HFXOPEAKDETRDY,HFXOPEAKDETRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "HFXOAUTOSW,HFXOAUTOSW Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "HFXODISERR,HFXODISERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CALOF,CALOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "CALRDY,CALRDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "AUXHFRCORDY,AUXHFRCORDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "LFXORDY,LFXORDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LFRCORDY,LFRCORDY Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "HFXORDY,HFXORDY Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "HFRCORDY,HFRCORDY Interrupt Enable" "0,1"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "HFBUSCLKEN0,High Frequency Bus Clock Enable Register 0"
|
|
bitfld.long 0x00 5. "GPCRC,General Purpose CRC Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. "LDMA,Linked Direct Memory Access Controller Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PRS,Peripheral Reflex System Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. "GPIO,General purpose Input/Output Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CRYPTO0,Advanced Encryption Standard Accelerator Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. "LE,Low Energy Peripheral Interface Clock Enable" "0,1"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "HFPERCLKEN0,High Frequency Peripheral Clock Enable Register 0"
|
|
bitfld.long 0x00 12. "TRNG0,True Random Number Generator 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 11. "ADC0,Analog to Digital Converter 0 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CRYOTIMER,CryoTimer Clock Enable" "0,1"
|
|
bitfld.long 0x00 9. "ACMP1,Analog Comparator 1 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "ACMP0,Analog Comparator 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 7. "I2C1,I2C 1 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "I2C0,I2C 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 5. "TIMER1,Timer 1 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TIMER0,Timer 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 3. "USART3,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "USART2,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "USART1,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "USART0,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable" "0,1"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "HFPERCLKEN1,High Frequency Peripheral Clock Enable Register 1"
|
|
bitfld.long 0x00 5. "CSEN,Capacitive touch sense module Clock Enable" "0,1"
|
|
bitfld.long 0x00 4. "VDAC0,Digital to Analog Converter 0 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CAN0,CAN 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 2. "WTIMER1,Wide Timer 1 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WTIMER0,Wide Timer 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. "UART0,Universal Asynchronous Receiver/Transmitter 0 Clock Enable" "0,1"
|
|
sif !cpuis("EFM32TG11B1*")
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "LFACLKEN0,Low Frequency a Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 2. "LCD,Liquid Crystal Display Controller Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "LETIMER0,Low Energy Timer 0 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "LESENSE,Low Energy Sensor Interface Clock Enable" "0,1"
|
|
endif
|
|
sif !cpuis("EFM32TG11B1*")
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "LFACLKEN0,Low Frequency a Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 1. "LETIMER0,Low Energy Timer 0 Clock Enable" "0,1"
|
|
bitfld.long 0x00 0. "LESENSE,Low Energy Sensor Interface Clock Enable" "0,1"
|
|
endif
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "LFBCLKEN0,Low Frequency B Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 2. "CSEN,Capacitive touch sense module Clock Enable" "0,1"
|
|
bitfld.long 0x00 1. "LEUART0,Low Energy UART 0 Clock Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SYSTICK,Clock Enable" "0,1"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "LFECLKEN0,Low Frequency E Clock Enable Register 0 (Async Reg)"
|
|
bitfld.long 0x00 0. "RTCC,Real-Time Counter and Calendar Clock Enable" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "HFPRESC,High Frequency Clock Prescaler Register"
|
|
bitfld.long 0x00 24.--25. "HFCLKLEPRESC,HFCLKLE Prescaler" "0: HFCLKLE is HFBUSCLKLE divided by 2,1: HFCLKLE is HFBUSCLKLE divided by 4,2: HFCLKLE is HFBUSCLKLE divided by 8,?..."
|
|
bitfld.long 0x00 8.--12. "PRESC,HFCLK Prescaler" "0: NODIVISION,?..."
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "HFBUSPRESC,High Frequency Bus Clock Prescaler Register"
|
|
hexmask.long.word 0x00 8.--16. 1. "PRESC,HFBUSCLK Prescaler"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "HFCOREPRESC,High Frequency Core Clock Prescaler Register"
|
|
hexmask.long.word 0x00 8.--16. 1. "PRESC,HFCORECLK Prescaler"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "HFPERPRESC,High Frequency Peripheral Clock Prescaler Register"
|
|
hexmask.long.word 0x00 8.--16. 1. "PRESC,HFPERCLK Prescaler"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "HFEXPPRESC,High Frequency Export Clock Prescaler Register"
|
|
bitfld.long 0x00 8.--12. "PRESC,HFEXPCLK Prescaler" "0: NODIVISION,?..."
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "HFPERPRESCB,High Frequency Peripheral Clock Prescaler B Register"
|
|
hexmask.long.word 0x00 8.--16. 1. "PRESC,HFPERCLK Prescaler"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "HFPERPRESCC,High Frequency Peripheral Clock Prescaler C Register"
|
|
hexmask.long.word 0x00 8.--16. 1. "PRESC,HFPERCLK Prescaler"
|
|
sif !cpuis("EFM32TG11B1*")
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "LFAPRESC0,Low Frequency a Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 8.--10. "LCD,Liquid Crystal Display Controller Prescaler" "0: LFACLKLCD = LFACLK,1: LFACLKLCD = LFACLK/2,2: LFACLKLCD = LFACLK/4,3: LFACLKLCD = LFACLK/8,4: LFACLKLCD = LFACLK/16,5: LFACLKLCD = LFACLK/32,6: LFACLKLCD = LFACLK/64,7: LFACLKLCD = LFACLK/128"
|
|
bitfld.long 0x00 4.--7. "LETIMER0,Low Energy Timer 0 Prescaler" "0: LFACLKLETIMER0 = LFACLK,1: LFACLKLETIMER0 = LFACLK/2,2: LFACLKLETIMER0 = LFACLK/4,3: LFACLKLETIMER0 = LFACLK/8,4: LFACLKLETIMER0 = LFACLK/16,5: LFACLKLETIMER0 = LFACLK/32,6: LFACLKLETIMER0 = LFACLK/64,7: LFACLKLETIMER0 = LFACLK/128,8: LFACLKLETIMER0 = LFACLK/256,9: LFACLKLETIMER0 = LFACLK/512,10: LFACLKLETIMER0 = LFACLK/1024,11: LFACLKLETIMER0 = LFACLK/2048,12: LFACLKLETIMER0 = LFACLK/4096,13: LFACLKLETIMER0 = LFACLK/8192,14: LFACLKLETIMER0 = LFACLK/16384,15: LFACLKLETIMER0 = LFACLK/32768"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "LESENSE,Low Energy Sensor Interface Prescaler" "0: LFACLKLESENSE = LFACLK,1: LFACLKLESENSE = LFACLK/2,2: LFACLKLESENSE = LFACLK/4,3: LFACLKLESENSE = LFACLK/8"
|
|
endif
|
|
sif cpuis("EFM32TG11B1*")
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "LFAPRESC0,Low Frequency a Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 4.--7. "LETIMER0,Low Energy Timer 0 Prescaler" "0: LFACLKLETIMER0 = LFACLK,1: LFACLKLETIMER0 = LFACLK/2,2: LFACLKLETIMER0 = LFACLK/4,3: LFACLKLETIMER0 = LFACLK/8,4: LFACLKLETIMER0 = LFACLK/16,5: LFACLKLETIMER0 = LFACLK/32,6: LFACLKLETIMER0 = LFACLK/64,7: LFACLKLETIMER0 = LFACLK/128,8: LFACLKLETIMER0 = LFACLK/256,9: LFACLKLETIMER0 = LFACLK/512,10: LFACLKLETIMER0 = LFACLK/1024,11: LFACLKLETIMER0 = LFACLK/2048,12: LFACLKLETIMER0 = LFACLK/4096,13: LFACLKLETIMER0 = LFACLK/8192,14: LFACLKLETIMER0 = LFACLK/16384,15: LFACLKLETIMER0 = LFACLK/32768"
|
|
bitfld.long 0x00 0.--1. "LESENSE,Low Energy Sensor Interface Prescaler" "0: LFACLKLESENSE = LFACLK,1: LFACLKLESENSE = LFACLK/2,2: LFACLKLESENSE = LFACLK/4,3: LFACLKLESENSE = LFACLK/8"
|
|
endif
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "LFBPRESC0,Low Frequency B Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 8.--9. "CSEN,Capacitive touch sense module Prescaler" "0: LFBCLKCSEN = LFBCLK/16,1: LFBCLKCSEN = LFBCLK/32,2: LFBCLKCSEN = LFBCLK/64,3: LFBCLKCSEN = LFBCLK/128"
|
|
bitfld.long 0x00 4.--5. "LEUART0,Low Energy UART 0 Prescaler" "0: LFBCLKLEUART0 = LFBCLK,1: LFBCLKLEUART0 = LFBCLK/2,2: LFBCLKLEUART0 = LFBCLK/4,3: LFBCLKLEUART0 = LFBCLK/8"
|
|
newline
|
|
rbitfld.long 0x00 0.--3. "SYSTICK,Prescaler" "0: LFBCLKSYSTICK = LFBCLK,?..."
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "LFEPRESC0,Low Frequency E Prescaler Register 0 (Async Reg)"
|
|
bitfld.long 0x00 0.--1. "RTCC,Real-Time Counter and Calendar Prescaler" "0: LFECLKRTCC = LFECLK,1: LFECLKRTCC = LFECLK/2,2: LFECLKRTCC = LFECLK/4,?..."
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 29. "LFXOBSY,LFXO Busy" "0,1"
|
|
bitfld.long 0x00 28. "HFXOBSY,HFXO Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "LFRCOVREFBSY,LFRCO VREF Busy" "0,1"
|
|
bitfld.long 0x00 26. "LFRCOBSY,LFRCO Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "AUXHFRCOBSY,AUXHFRCO Busy" "0,1"
|
|
bitfld.long 0x00 24. "HFRCOBSY,HFRCO Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "LFEPRESC0,Low Frequency E Prescaler 0 Busy" "0,1"
|
|
bitfld.long 0x00 16. "LFECLKEN0,Low Frequency E Clock Enable 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "LFBPRESC0,Low Frequency B Prescaler 0 Busy" "0,1"
|
|
bitfld.long 0x00 4. "LFBCLKEN0,Low Frequency B Clock Enable 0 Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "LFAPRESC0,Low Frequency a Prescaler 0 Busy" "0,1"
|
|
bitfld.long 0x00 0. "LFACLKEN0,Low Frequency a Clock Enable 0 Busy" "0,1"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. "REGFREEZE,Register Update Freeze" "0,1"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "PCNTCTRL,PCNT Control Register"
|
|
bitfld.long 0x00 1. "PCNT0CLKSEL,PCNT0 Clock Select" "0,1"
|
|
bitfld.long 0x00 0. "PCNT0CLKEN,PCNT0 Clock Enable" "0,1"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "ADCCTRL,ADC Control Register"
|
|
bitfld.long 0x00 8. "ADC0CLKINV,Invert Clock Selected By ADC0CLKSEL" "0,1"
|
|
bitfld.long 0x00 4.--5. "ADC0CLKSEL,ADC0 Clock Select" "0: ADC0 is not clocked,1: AUXHFRCO is clocking ADC0,2: HFXO is clocking ADC0,3: HFSRCCLK is clocking ADC0"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "ADC0CLKDIV,ADC0 Clock Prescaler" "0: NODIVISION,?..."
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 28. "CLKIN0PEN,CLKIN0 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "CLKOUT2PEN,CLKOUT2 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CLKOUT1PEN,CLKOUT1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "CLKOUT0PEN,CLKOUT0 Pin Enable" "0,1"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 16.--21. "CLKOUT2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,?..."
|
|
bitfld.long 0x00 8.--13. "CLKOUT1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--5. "CLKOUT0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,?..."
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 0.--5. "CLKIN0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "HFRCOSS,HFRCO Spread Spectrum Register"
|
|
bitfld.long 0x00 8.--12. "SSINV,Spread Spectrum Update Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--2. "SSAMP,Spread Spectrum Amplitude" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "CRYPTO0"
|
|
base ad:0x400F0000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "COMBDMA0WEREQ,Combined Data0 Write DMA Request" "0,1"
|
|
bitfld.long 0x00 28.--29. "DMA1RSEL,DATA0 DMA Unaligned Read Register Select" "0: DATA1,1: DDATA1,2: QDATA1,3: QDATA1BIG"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "DMA1MODE,DMA1 Read Mode" "0: Target register is fully read/written during..,1: Length Limited,2: Target register is fully read/written during..,3: Length Limited"
|
|
bitfld.long 0x00 20.--21. "DMA0RSEL,DMA0 Read Register Select" "0: DATA0,1: DDATA0,2: DDATA0BIG,3: QDATA0"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "DMA0MODE,DMA0 Read Mode" "0: Target register is fully read/written during..,1: Length Limited,2: Target register is fully read/written during..,3: Length Limited"
|
|
bitfld.long 0x00 14.--15. "INCWIDTH,Increment Width" "0: Byte 15 in DATA1 is used for the increment..,1: Bytes 14 and 15 in DATA1 are used for the..,2: Bytes 13 to 15 in DATA1 are used for the..,3: Bytes 12 to 15 in DATA1 are used for the.."
|
|
newline
|
|
bitfld.long 0x00 10. "NOBUSYSTALL,No Stalling of Bus When Busy" "0,1"
|
|
bitfld.long 0x00 2. "SHA,SHA Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "KEYBUFDIS,Key Buffer Disable" "0,1"
|
|
bitfld.long 0x00 0. "AES,AES Mode" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "WAC,Wide Arithmetic Configuration"
|
|
bitfld.long 0x00 10.--11. "RESULTWIDTH,Result Width" "0: Results have 256 bits,1: Results have 128 bits,2: Results have 260 bits,?..."
|
|
bitfld.long 0x00 8.--9. "MULWIDTH,Multiply Width" "0: Multiply 256 bits,1: Multiply 128 bits,2: Same number of bits as specified by MODULUS,?..."
|
|
newline
|
|
bitfld.long 0x00 4. "MODOP,Modular Operation Field Type" "0,1"
|
|
bitfld.long 0x00 0.--3. "MODULUS,Modular Operation Modulus" "0: Generic modulus,1: Generic modulus,2: Modulus for B-233 and K-233 ECC curves,3: Modulus for B-163 and K-163 ECC curves,4: Modulus for GCM,5: Modulus for P-256 ECC curve,6: Modulus for P-224 ECC curve,7: Modulus for P-192 ECC curve,8: P modulus for B-233 ECC curve,9: P modulus for K-233 ECC curve,10: P modulus for B-163 ECC curve,11: P modulus for K-163 ECC curve,12: P modulus for P-256 ECC curve,13: P modulus for P-224 ECC curve,14: P modulus for P-192 ECC curve,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. "SEQSTEP,Sequence Step" "0,1"
|
|
bitfld.long 0x00 10. "SEQSTOP,Sequence Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SEQSTART,Encryption/Decryption SEQUENCE Start" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR,Execute Instruction"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. "DMAACTIVE,DMA Action is Active" "0,1"
|
|
bitfld.long 0x00 1. "INSTRRUNNING,Action is Active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "SEQRUNNING,AES SEQUENCE Running" "0,1"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "DSTATUS,Data Status Register"
|
|
bitfld.long 0x00 24. "CARRY,Carry From Arithmetic Operation" "0,1"
|
|
bitfld.long 0x00 20. "DDATA1MSB,MSB in DDATA1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DDATA0MSBS,MSB in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "DDATA0LSBS,LSBs in DDATA0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DATA0ZERO,Data 0 Zero" "?,1: In DATA0 bits 0 to 31 are all zero,2: In DATA0 bits 32 to 63 are all zero,?,4: In DATA0 bits 64 to 95 are all zero,?,?,?,8: In DATA0 bits 96 to 127 are all zero,?..."
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "CSTATUS,Control Status Register"
|
|
bitfld.long 0x00 20.--24. "SEQIP,Sequence Next Instruction Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 17. "SEQSKIP,Sequence Skip Next Instruction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SEQPART,Sequence Part" "0,1"
|
|
bitfld.long 0x00 8.--10. "V1,Selected ALU Operand 1" "0: DDATA0,1: DDATA1,2: DDATA2,3: DDATA3,4: DDATA4,5: DATA0,6: DATA1,7: DATA2"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "V0,Selected ALU Operand 0" "0: DDATA0,1: DDATA1,2: DDATA2,3: DDATA3,4: DDATA4,5: DATA0,6: DATA1,7: DATA2"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "KEY,KEY Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "KEY,Key Access"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "KEYBUF,KEY Buffer Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "KEYBUF,Key Buffer Access"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SEQCTRL,Sequence Control"
|
|
bitfld.long 0x00 31. "HALT,Halt Sequence" "0,1"
|
|
bitfld.long 0x00 29. "DMA1PRESA,DMA1 Preserve a" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "DMA0PRESA,DMA0 Preserve a" "0,1"
|
|
bitfld.long 0x00 26.--27. "DMA1SKIP,DMA1 Skip" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "DMA0SKIP,DMA0 Skip" "0,1,2,3"
|
|
bitfld.long 0x00 20.--21. "BLOCKSIZE,Size of Data Blocks" "0: A block is 16 bytes long,1: A block is 32 bytes long,2: A block is 64 bytes long,?..."
|
|
newline
|
|
hexmask.long.word 0x00 0.--13. 1. "LENGTHA,Buffer Length a in Bytes"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SEQCTRLB,Sequence Control B"
|
|
bitfld.long 0x00 29. "DMA1PRESB,DMA1 Preserve B" "0,1"
|
|
bitfld.long 0x00 28. "DMA0PRESB,DMA0 Preserve B" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--13. 1. "LENGTHB,Buffer Length B in Bytes"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IF,AES Interrupt Flags"
|
|
bitfld.long 0x00 1. "SEQDONE,Sequence Done" "0,1"
|
|
bitfld.long 0x00 0. "INSTRDONE,Instruction Done" "0,1"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 1. "SEQDONE,Set SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "INSTRDONE,Set INSTRDONE Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 1. "SEQDONE,Clear SEQDONE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "INSTRDONE,Clear INSTRDONE Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 1. "SEQDONE,SEQDONE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "INSTRDONE,INSTRDONE Interrupt Enable" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SEQ0,Sequence Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. "INSTR3,Sequence Instruction 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INSTR2,Sequence Instruction 2"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "INSTR1,Sequence Instruction 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR0,Sequence Instruction 0"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SEQ1,Sequence Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. "INSTR7,Sequence Instruction 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INSTR6,Sequence Instruction 6"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "INSTR5,Sequence Instruction 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR4,Sequence Instruction 4"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SEQ2,Sequence Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. "INSTR11,Sequence Instruction 11"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INSTR10,Sequence Instruction 10"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "INSTR9,Sequence Instruction 9"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR8,Sequence Instruction 8"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SEQ3,Sequence Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. "INSTR15,Sequence Instruction 15"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INSTR14,Sequence Instruction 14"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "INSTR13,Sequence Instruction 13"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR12,Sequence Instruction 12"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SEQ4,Sequence Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. "INSTR19,Sequence Instruction 19"
|
|
hexmask.long.byte 0x00 16.--23. 1. "INSTR18,Sequence Instruction 18"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "INSTR17,Sequence Instruction 17"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INSTR16,Sequence Instruction 16"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "DATA0,DATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DATA0,Data 0 Access"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "DATA1,DATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DATA1,Data 1 Access"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "DATA2,DATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DATA2,Data 2 Access"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "DATA3,DATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DATA3,Data 3 Access"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DATA0XOR,DATA0XOR Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DATA0XOR,XOR Data 0 Access"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "DATA0BYTE,DATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0BYTE,Data 0 Byte Access"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "DATA1BYTE,DATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA1BYTE,Data 1 Byte Access"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "DATA0XORBYTE,DATA0 Register Byte XOR Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0XORBYTE,Data 0 XOR Byte Access"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "DATA0BYTE12,DATA0 Register Byte 12 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0BYTE12,Data 0 Byte 12 Access"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "DATA0BYTE13,DATA0 Register Byte 13 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0BYTE13,Data 0 Byte 13 Access"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "DATA0BYTE14,DATA0 Register Byte 14 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0BYTE14,Data 0 Byte 14 Access"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "DATA0BYTE15,DATA0 Register Byte 15 Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0BYTE15,Data 0 Byte 15 Access"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "DDATA0,DDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA0,Double Data 0 Access"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "DDATA1,DDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA1,Double Data 0 Access"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "DDATA2,DDATA2 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA2,Double Data 0 Access"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "DDATA3,DDATA3 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA3,Double Data 0 Access"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "DDATA4,DDATA4 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA4,Double Data 0 Access"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "DDATA0BIG,DDATA0 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. "DDATA0BIG,Double Data 0 Big Endian Access"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "DDATA0BYTE,DDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DDATA0BYTE,Ddata 0 Byte Access"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "DDATA1BYTE,DDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DDATA1BYTE,Ddata 1 Byte Access"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "DDATA0BYTE32,DDATA0 Register Byte 32 Access"
|
|
bitfld.long 0x00 0.--3. "DDATA0BYTE32,Ddata 0 Byte 32 Access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "QDATA0,QDATA0 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "QDATA0,Quad Data 0 Access"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "QDATA1,QDATA1 Register Access"
|
|
hexmask.long 0x00 0.--31. 1. "QDATA1,Quad Data 1 Access"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "QDATA1BIG,QDATA1 Register Big Endian Access"
|
|
hexmask.long 0x00 0.--31. 1. "QDATA1BIG,Quad Data 1 Big Endian Access"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "QDATA0BYTE,QDATA0 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "QDATA0BYTE,Qdata 0 Byte Access"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "QDATA1BYTE,QDATA1 Register Byte Access"
|
|
hexmask.long.byte 0x00 0.--7. 1. "QDATA1BYTE,Qdata 1 Byte Access"
|
|
tree.end
|
|
tree "LESENSE"
|
|
base ad:0x40055000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 22. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 20.--21. "DMAWU,DMA Wake-up From EM2" "0: No DMA wake-up from EM2,1: DMA wake-up from EM2 when data is valid in..,2: DMA wake-up from EM2 when the result buffer..,?..."
|
|
newline
|
|
bitfld.long 0x00 19. "BUFIDL,Result Buffer Interrupt and DMA Trigger Level" "0,1"
|
|
bitfld.long 0x00 17. "STRSCANRES,Enable Storing of SCANRES" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "BUFOW,Result Buffer Over" "0,1"
|
|
bitfld.long 0x00 13. "DUALSAMPLE,Enable Dual Sample Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "ALTEXMAP,Alternative Excitation Map" "0,1"
|
|
bitfld.long 0x00 7.--8. "SCANCONF,Select Scan Configuration" "0: The channel configuration register registers..,1: The channel configuration register registers..,2: The channel configuration register registers..,3: The decoder state defines the CONF registers.."
|
|
newline
|
|
bitfld.long 0x00 2.--4. "PRSSEL,Scan Start PRS Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
bitfld.long 0x00 0.--1. "SCANMODE,Configure Scan Mode" "0: A new scan is started each time the period..,1: A single scan is performed when START in CMD..,2: Pulse on PRS channel,?..."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TIMCTRL,Timing Control Register"
|
|
bitfld.long 0x00 28. "AUXSTARTUP,AUXHFRCO Startup Configuration" "0,1"
|
|
bitfld.long 0x00 22.--23. "STARTDLY,Start Delay Configuration" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x00 12.--19. 1. "PCTOP,Period Counter Top Value"
|
|
bitfld.long 0x00 8.--10. "PCPRESC,Period Counter Prescaling" "0: The period counter clock frequency is..,1: The period counter clock frequency is..,2: The period counter clock frequency is..,3: The period counter clock frequency is..,4: The period counter clock frequency is..,5: The period counter clock frequency is..,6: The period counter clock frequency is..,7: The period counter clock frequency is.."
|
|
newline
|
|
bitfld.long 0x00 4.--6. "LFPRESC,Prescaling Factor for Low Frequency Timer" "0: Low frequency timer is clocked with..,1: Low frequency timer is clocked with..,2: Low frequency timer is clocked with..,3: Low frequency timer is clocked with..,4: Low frequency timer is clocked with..,5: Low frequency timer is clocked with..,6: Low frequency timer is clocked with..,7: Low frequency timer is clocked with.."
|
|
bitfld.long 0x00 0.--1. "AUXPRESC,Prescaling Factor for High Frequency Timer" "0: High frequency timer is clocked with AUXHFRCO/1,1: High frequency timer is clocked with AUXHFRCO/2,2: High frequency timer is clocked with AUXHFRCO/4,3: High frequency timer is clocked with AUXHFRCO/8"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PERCTRL,Peripheral Control Register"
|
|
bitfld.long 0x00 28.--29. "WARMUPMODE,ACMP and VDAC Duty Cycle Mode" "0: The analog comparators and VDAC are shut down..,1: The analog comparators are kept powered up..,2: The VDAC is kept powered up when LESENSE is..,3: The analog comparators and VDAC are kept.."
|
|
bitfld.long 0x00 27. "ACMP1HYSTEN,ACMP1 Hysteresis Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "ACMP0HYSTEN,ACMP0 Hysteresis Enable" "0,1"
|
|
bitfld.long 0x00 25. "ACMP1INV,Invert Analog Comparator 1 Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "ACMP0INV,Invert Analog Comparator 0 Output" "0,1"
|
|
bitfld.long 0x00 22.--23. "ACMP1MODE,ACMP1 Mode" "0: LESENSE does not control ACMP1,1: LESENSE controls the input mux (POSSEL) of..,2: LESENSE controls the input mux and the..,?..."
|
|
newline
|
|
bitfld.long 0x00 20.--21. "ACMP0MODE,ACMP0 Mode" "0: LESENSE does not control ACMP0,1: LESENSE controls the input mux (POSSEL) of..,2: LESENSE controls the input mux (POSSEL) and..,?..."
|
|
bitfld.long 0x00 8. "DACCONVTRIG,VDAC Conversion Trigger Configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "DACSTARTUP,VDAC Startup Configuration" "0,1"
|
|
bitfld.long 0x00 3. "DACCH1DATA,VDAC CH1 Data Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DACCH0DATA,VDAC CH0 Data Selection" "0,1"
|
|
bitfld.long 0x00 1. "DACCH1EN,VDAC CH1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DACCH0EN,VDAC CH0 Enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "DECCTRL,Decoder Control Register"
|
|
bitfld.long 0x00 25.--27. "PRSSEL3,LESENSE Decoder PRS Input 3 Configuration" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
bitfld.long 0x00 20.--22. "PRSSEL2,LESENSE Decoder PRS Input 2 Configuration" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 15.--17. "PRSSEL1,LESENSE Decoder PRS Input 1 Configuration" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
bitfld.long 0x00 10.--12. "PRSSEL0,LESENSE Decoder PRS Input 0 Configuration" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 8. "INPUT,LESENSE Decoder Input Configuration" "0,1"
|
|
bitfld.long 0x00 7. "PRSCNT,Enable Count Mode on Decoder PRS Channels 0 and 1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "HYSTIRQ,Enable Decoder Hysteresis on Interrupt Requests" "0,1"
|
|
bitfld.long 0x00 5. "HYSTPRS2,Enable Decoder Hysteresis on PRS2 Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "HYSTPRS1,Enable Decoder Hysteresis on PRS1 Output" "0,1"
|
|
bitfld.long 0x00 3. "HYSTPRS0,Enable Decoder Hysteresis on PRS0 Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INTMAP,Enable Decoder to Channel Interrupt Mapping" "0,1"
|
|
bitfld.long 0x00 1. "ERRCHK,Enable Check of Current State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DISABLE,Disable the Decoder" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BIASCTRL,Bias Control Register"
|
|
bitfld.long 0x00 0.--1. "BIASMODE,Select Bias Mode" "0: Bias module is controlled by the EMU and is..,1: Bias module duty cycled between low power and..,2: Bias module always in high accuracy mode,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EVALCTRL,LESENSE Evaluation Control"
|
|
hexmask.long.word 0x00 0.--15. 1. "WINSIZE,Sliding Window and Step Detection Size"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 16. "DECCMPEN,Enable PRS Output DECCMP" "0,1"
|
|
bitfld.long 0x00 8.--12. "DECCMPMASK,Decoder State Compare Value Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "DECCMPVAL,Decoder State Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 3. "CLEARBUF,Clear Result Buffer" "0,1"
|
|
bitfld.long 0x00 2. "DECODE,Start Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STOP,Stop Scanning of Sensors" "0,1"
|
|
bitfld.long 0x00 0. "START,Start Scanning of Sensors" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHEN,Channel Enable Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CHEN,Enable Scan Channel"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SCANRES,Scan Result Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "STEPDIR,Direction of Previous Step Detection"
|
|
hexmask.long.word 0x00 0.--15. 1. "SCANRES,Scan Results"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 5. "DACACTIVE,LESENSE VDAC Interface is Active" "0,1"
|
|
bitfld.long 0x00 4. "SCANACTIVE,LESENSE Scan Active" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RUNNING,LESENSE Periodic Counter Running" "0,1"
|
|
bitfld.long 0x00 2. "BUFFULL,Result Buffer Full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BUFHALFFULL,Result Buffer Half Full" "0,1"
|
|
bitfld.long 0x00 0. "BUFDATAV,Result Data Valid" "0,1"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "PTR,Result Buffer Pointers"
|
|
bitfld.long 0x00 4.--7. "WR,Result Buffer Write Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "RD,Result Buffer Read Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "BUFDATA,Result Buffer Data Register"
|
|
bitfld.long 0x00 16.--19. "BUFDATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. "BUFDATA,Result Data"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "CURCH,Current Channel Index"
|
|
bitfld.long 0x00 0.--3. "CURCH,Current Channel Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DECSTATE,Current Decoder State"
|
|
bitfld.long 0x00 0.--4. "DECSTATE,Current Decoder State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SENSORSTATE,Decoder Input Register"
|
|
bitfld.long 0x00 0.--3. "SENSORSTATE,Decoder Input Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IDLECONF,GPIO Idle Phase Configuration"
|
|
bitfld.long 0x00 30.--31. "CH15,Channel 15 Idle Phase Configuration" "0: CH15 output is disabled in idle phase,1: CH15 output is high in idle phase,2: CH15 output is low in idle phase,3: CH15 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 28.--29. "CH14,Channel 14 Idle Phase Configuration" "0: CH14 output is disabled in idle phase,1: CH14 output is high in idle phase,2: CH14 output is low in idle phase,3: CH14 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 26.--27. "CH13,Channel 13 Idle Phase Configuration" "0: CH13 output is disabled in idle phase,1: CH13 output is high in idle phase,2: CH13 output is low in idle phase,3: CH13 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 24.--25. "CH12,Channel 12 Idle Phase Configuration" "0: CH12 output is disabled in idle phase,1: CH12 output is high in idle phase,2: CH12 output is low in idle phase,3: CH12 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 22.--23. "CH11,Channel 11 Idle Phase Configuration" "0: CH11 output is disabled in idle phase,1: CH11 output is high in idle phase,2: CH11 output is low in idle phase,3: CH11 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 20.--21. "CH10,Channel 10 Idle Phase Configuration" "0: CH10 output is disabled in idle phase,1: CH10 output is high in idle phase,2: CH10 output is low in idle phase,3: CH10 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 18.--19. "CH9,Channel 9 Idle Phase Configuration" "0: CH9 output is disabled in idle phase,1: CH9 output is high in idle phase,2: CH9 output is low in idle phase,3: CH9 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 16.--17. "CH8,Channel 8 Idle Phase Configuration" "0: CH8 output is disabled in idle phase,1: CH8 output is high in idle phase,2: CH8 output is low in idle phase,3: CH8 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 14.--15. "CH7,Channel 7 Idle Phase Configuration" "0: CH7 output is disabled in idle phase,1: CH7 output is high in idle phase,2: CH7 output is low in idle phase,3: CH7 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 12.--13. "CH6,Channel 6 Idle Phase Configuration" "0: CH6 output is disabled in idle phase,1: CH6 output is high in idle phase,2: CH6 output is low in idle phase,3: CH6 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CH5,Channel 5 Idle Phase Configuration" "0: CH5 output is disabled in idle phase,1: CH5 output is high in idle phase,2: CH5 output is low in idle phase,3: CH5 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 8.--9. "CH4,Channel 4 Idle Phase Configuration" "0: CH4 output is disabled in idle phase,1: CH4 output is high in idle phase,2: CH4 output is low in idle phase,3: CH4 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "CH3,Channel 3 Idle Phase Configuration" "0: CH3 output is disabled in idle phase,1: CH3 output is high in idle phase,2: CH3 output is low in idle phase,3: CH3 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 4.--5. "CH2,Channel 2 Idle Phase Configuration" "0: CH2 output is disabled in idle phase,1: CH2 output is high in idle phase,2: CH2 output is low in idle phase,3: CH2 output is connected to VDAC output in.."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "CH1,Channel 1 Idle Phase Configuration" "0: CH1 output is disabled in idle phase,1: CH1 output is high in idle phase,2: CH1 output is low in idle phase,3: CH1 output is connected to VDAC output in.."
|
|
bitfld.long 0x00 0.--1. "CH0,Channel 0 Idle Phase Configuration" "0: CH0 output is disabled in idle phase,1: CH0 output is high in idle phase,2: CH0 output is low in idle phase,3: CH0 output is connected to VDAC output in.."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ALTEXCONF,Alternative Excite Pin Configuration"
|
|
bitfld.long 0x00 23. "AEX7,ALTEX7 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 22. "AEX6,ALTEX6 Always Excite Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "AEX5,ALTEX5 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 20. "AEX4,ALTEX4 Always Excite Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "AEX3,ALTEX3 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 18. "AEX2,ALTEX2 Always Excite Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "AEX1,ALTEX1 Always Excite Enable" "0,1"
|
|
bitfld.long 0x00 16. "AEX0,ALTEX0 Always Excite Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "IDLECONF7,ALTEX7 Idle Phase Configuration" "0: ALTEX7 output is disabled in idle phase,1: ALTEX7 output is high in idle phase,2: ALTEX7 output is low in idle phase,?..."
|
|
bitfld.long 0x00 12.--13. "IDLECONF6,ALTEX6 Idle Phase Configuration" "0: ALTEX6 output is disabled in idle phase,1: ALTEX6 output is high in idle phase,2: ALTEX6 output is low in idle phase,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "IDLECONF5,ALTEX5 Idle Phase Configuration" "0: ALTEX5 output is disabled in idle phase,1: ALTEX5 output is high in idle phase,2: ALTEX5 output is low in idle phase,?..."
|
|
bitfld.long 0x00 8.--9. "IDLECONF4,ALTEX4 Idle Phase Configuration" "0: ALTEX4 output is disabled in idle phase,1: ALTEX4 output is high in idle phase,2: ALTEX4 output is low in idle phase,?..."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "IDLECONF3,ALTEX3 Idle Phase Configuration" "0: ALTEX3 output is disabled in idle phase,1: ALTEX3 output is high in idle phase,2: ALTEX3 output is low in idle phase,?..."
|
|
bitfld.long 0x00 4.--5. "IDLECONF2,ALTEX2 Idle Phase Configuration" "0: ALTEX2 output is disabled in idle phase,1: ALTEX2 output is high in idle phase,2: ALTEX2 output is low in idle phase,?..."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "IDLECONF1,ALTEX1 Idle Phase Configuration" "0: ALTEX1 output is disabled in idle phase,1: ALTEX1 output is high in idle phase,2: ALTEX1 output is low in idle phase,?..."
|
|
bitfld.long 0x00 0.--1. "IDLECONF0,ALTEX0 Idle Phase Configuration" "0: ALTEX0 output is disabled in idle phase,1: ALTEX0 output is high in idle phase,2: ALTEX0 output is low in idle phase,?..."
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 22. "CNTOF,CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. "BUFOF,BUFOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUFLEVEL,BUFLEVEL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 19. "BUFDATAV,BUFDATAV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DECERR,DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "DEC,DEC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SCANCOMPLETE,SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CH15,CH15 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CH14,CH14 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "CH13,CH13 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CH12,CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "CH11,CH11 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CH10,CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "CH9,CH9 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CH8,CH8 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "CH7,CH7 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CH6,CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH5,CH5 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH4,CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH3,CH3 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2,CH2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1,CH1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0,CH0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 22. "CNTOF,Set CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. "BUFOF,Set BUFOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUFLEVEL,Set BUFLEVEL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 19. "BUFDATAV,Set BUFDATAV Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 18. "DECERR,Set DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "DEC,Set DEC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SCANCOMPLETE,Set SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CH15,Set CH15 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CH14,Set CH14 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "CH13,Set CH13 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CH12,Set CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "CH11,Set CH11 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CH10,Set CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "CH9,Set CH9 Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 8. "CH8,Set CH8 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "CH7,Set CH7 Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 6. "CH6,Set CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH5,Set CH5 Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 4. "CH4,Set CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH3,Set CH3 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2,Set CH2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1,Set CH1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0,Set CH0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 22. "CNTOF,Clear CNTOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 21. "BUFOF,Clear BUFOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUFLEVEL,Clear BUFLEVEL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 19. "BUFDATAV,Clear BUFDATAV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DECERR,Clear DECERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "DEC,Clear DEC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SCANCOMPLETE,Clear SCANCOMPLETE Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CH15,Clear CH15 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CH14,Clear CH14 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "CH13,Clear CH13 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CH12,Clear CH12 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "CH11,Clear CH11 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CH10,Clear CH10 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "CH9,Clear CH9 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CH8,Clear CH8 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "CH7,Clear CH7 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CH6,Clear CH6 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH5,Clear CH5 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH4,Clear CH4 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH3,Clear CH3 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2,Clear CH2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1,Clear CH1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0,Clear CH0 Interrupt Flag" "0,1"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 22. "CNTOF,CNTOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 21. "BUFOF,BUFOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "BUFLEVEL,BUFLEVEL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 19. "BUFDATAV,BUFDATAV Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "DECERR,DECERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "DEC,DEC Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SCANCOMPLETE,SCANCOMPLETE Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. "CH15,CH15 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CH14,CH14 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "CH13,CH13 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CH12,CH12 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "CH11,CH11 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "CH10,CH10 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "CH9,CH9 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CH8,CH8 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "CH7,CH7 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CH6,CH6 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "CH5,CH5 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH4,CH4 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "CH3,CH3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH2,CH2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "CH1,CH1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0,CH0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 7. "CMD,CMD Register Busy" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Register"
|
|
bitfld.long 0x00 23. "ALTEX7PEN,ALTEX7 Pin Enable" "0,1"
|
|
bitfld.long 0x00 22. "ALTEX6PEN,ALTEX6 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "ALTEX5PEN,ALTEX5 Pin Enable" "0,1"
|
|
bitfld.long 0x00 20. "ALTEX4PEN,ALTEX4 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "ALTEX3PEN,ALTEX3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 18. "ALTEX2PEN,ALTEX2 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "ALTEX1PEN,ALTEX1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 16. "ALTEX0PEN,ALTEX0 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CH15PEN,CH15 Pin Enable" "0,1"
|
|
bitfld.long 0x00 14. "CH14PEN,CH14 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "CH13PEN,CH13 Pin Enable" "0,1"
|
|
bitfld.long 0x00 12. "CH12PEN,CH12 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CH11PEN,CH11 Pin Enable" "0,1"
|
|
bitfld.long 0x00 10. "CH10PEN,CH10 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CH9PEN,CH9 Pin Enable" "0,1"
|
|
bitfld.long 0x00 8. "CH8PEN,CH8 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CH7PEN,CH7 Pin Enable" "0,1"
|
|
bitfld.long 0x00 6. "CH6PEN,CH6 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH5PEN,CH5 Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. "CH4PEN,CH4 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH3PEN,CH3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2PEN,CH2 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1PEN,CH1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "CH0PEN,CH0 Pin Enable" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "ST0_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "ST0_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ST1_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ST1_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ST2_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "ST2_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "ST3_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "ST3_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "ST4_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ST4_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "ST5_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "ST5_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "ST6_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x134++0x03
|
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line.long 0x00 "ST6_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "ST7_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "ST7_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x140++0x03
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line.long 0x00 "ST8_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "ST8_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
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newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x148++0x03
|
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line.long 0x00 "ST9_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "ST9_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "ST10_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "ST10_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "ST11_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "ST11_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "ST12_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "ST12_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "ST13_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "ST13_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "ST14_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "ST14_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "ST15_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "ST15_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "ST16_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "ST16_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "ST17_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "ST17_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "ST18_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "ST18_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "ST19_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "ST19_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "ST20_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "ST20_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "ST21_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "ST21_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "ST22_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "ST22_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "ST23_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "ST23_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "ST24_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "ST24_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "ST25_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "ST25_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "ST26_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "ST26_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1D8++0x03
|
|
line.long 0x00 "ST27_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
|
|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
newline
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1DC++0x03
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|
line.long 0x00 "ST27_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
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|
newline
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1E0++0x03
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|
line.long 0x00 "ST28_TCONFA,State Transition Configuration a"
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|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
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|
newline
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
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|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1E4++0x03
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|
line.long 0x00 "ST28_TCONFB,State Transition Configuration B"
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|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
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|
newline
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1E8++0x03
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line.long 0x00 "ST29_TCONFA,State Transition Configuration a"
|
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bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
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|
newline
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1EC++0x03
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|
line.long 0x00 "ST29_TCONFB,State Transition Configuration B"
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|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1F0++0x03
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line.long 0x00 "ST30_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
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|
newline
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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newline
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1F4++0x03
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line.long 0x00 "ST30_TCONFB,State Transition Configuration B"
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bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x1F8++0x03
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|
line.long 0x00 "ST31_TCONFA,State Transition Configuration a"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag Enable" "0,1"
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|
newline
|
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bitfld.long 0x00 14. "CHAIN,Enable State Descriptor Chaining" "0,1"
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|
bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
newline
|
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1FC++0x03
|
|
line.long 0x00 "ST31_TCONFB,State Transition Configuration B"
|
|
bitfld.long 0x00 16.--18. "PRSACT,Configure Transition Action" "0,1,2,3,4,5,6,7"
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|
bitfld.long 0x00 15. "SETIF,Set Interrupt Flag" "0,1"
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|
newline
|
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bitfld.long 0x00 8.--12. "NEXTSTATE,Next State Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 4.--7. "MASK,Sensor Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
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bitfld.long 0x00 0.--3. "COMP,Sensor Compare Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0x200++0x03
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line.long 0x00 "BUF0_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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group.long 0x204++0x03
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line.long 0x00 "BUF1_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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group.long 0x208++0x03
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line.long 0x00 "BUF2_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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|
group.long 0x20C++0x03
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line.long 0x00 "BUF3_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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|
group.long 0x210++0x03
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line.long 0x00 "BUF4_DATA,Scan Results"
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|
rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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group.long 0x214++0x03
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line.long 0x00 "BUF5_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
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group.long 0x218++0x03
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line.long 0x00 "BUF6_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
|
group.long 0x21C++0x03
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line.long 0x00 "BUF7_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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group.long 0x220++0x03
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line.long 0x00 "BUF8_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
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group.long 0x224++0x03
|
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line.long 0x00 "BUF9_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
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group.long 0x228++0x03
|
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line.long 0x00 "BUF10_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
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group.long 0x22C++0x03
|
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line.long 0x00 "BUF11_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
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group.long 0x230++0x03
|
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line.long 0x00 "BUF12_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
|
group.long 0x234++0x03
|
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line.long 0x00 "BUF13_DATA,Scan Results"
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
|
group.long 0x238++0x03
|
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line.long 0x00 "BUF14_DATA,Scan Results"
|
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rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "BUF15_DATA,Scan Results"
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|
rbitfld.long 0x00 16.--19. "DATASRC,Result Data Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Result Buffer"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "CH0_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
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|
newline
|
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bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "CH0_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
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|
newline
|
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bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
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|
newline
|
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bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
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bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
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|
newline
|
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hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "CH0_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
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|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "CH1_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "CH1_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "CH1_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "CH2_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "CH2_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "CH2_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "CH3_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "CH3_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "CH3_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "CH4_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "CH4_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "CH4_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "CH5_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "CH5_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "CH5_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "CH6_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2A4++0x03
|
|
line.long 0x00 "CH6_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2A8++0x03
|
|
line.long 0x00 "CH6_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "CH7_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2B4++0x03
|
|
line.long 0x00 "CH7_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2B8++0x03
|
|
line.long 0x00 "CH7_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "CH8_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2C4++0x03
|
|
line.long 0x00 "CH8_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2C8++0x03
|
|
line.long 0x00 "CH8_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2D0++0x03
|
|
line.long 0x00 "CH9_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2D4++0x03
|
|
line.long 0x00 "CH9_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2D8++0x03
|
|
line.long 0x00 "CH9_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "CH10_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2E4++0x03
|
|
line.long 0x00 "CH10_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2E8++0x03
|
|
line.long 0x00 "CH10_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
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|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x2F0++0x03
|
|
line.long 0x00 "CH11_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2F4++0x03
|
|
line.long 0x00 "CH11_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
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|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
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|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x2F8++0x03
|
|
line.long 0x00 "CH11_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "CH12_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "CH12_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
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|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "CH12_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x310++0x03
|
|
line.long 0x00 "CH13_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x314++0x03
|
|
line.long 0x00 "CH13_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x318++0x03
|
|
line.long 0x00 "CH13_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x320++0x03
|
|
line.long 0x00 "CH14_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x324++0x03
|
|
line.long 0x00 "CH14_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x328++0x03
|
|
line.long 0x00 "CH14_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
group.long 0x330++0x03
|
|
line.long 0x00 "CH15_TIMING,Scan Configuration"
|
|
hexmask.long.word 0x00 14.--23. 1. "MEASUREDLY,Set Measure Delay"
|
|
hexmask.long.byte 0x00 6.--13. 1. "SAMPLEDLY,Set Sample Delay"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "EXTIME,Set Excitation Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x334++0x03
|
|
line.long 0x00 "CH15_INTERACT,Scan Configuration"
|
|
bitfld.long 0x00 21. "ALTEX,Use Alternative Excite Pin" "0,1"
|
|
bitfld.long 0x00 20. "SAMPLECLK,Select Clock Used for Timing of Sample Delay" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "EXCLK,Select Clock Used for Excitation Timing" "0,1"
|
|
bitfld.long 0x00 17.--18. "EXMODE,Set GPIO Mode" "0: Disabled,1: Push Pull GPIO is driven high,2: Push Pull GPIO is driven low,3: VDAC output"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "SETIF,Enable Interrupt Generation" "0: No interrupt is generated,1: Set interrupt flag if the sensor triggers,2: Set interrupt flag on positive edge of the..,3: Set interrupt flag on negative edge of the..,4: Set interrupt flag on both edges of the..,?..."
|
|
bitfld.long 0x00 12.--13. "SAMPLE,Select Sample Mode" "0: Counter output will be used in evaluation,1: ACMP output will be used in evaluation,2: ADC output will be used in evaluation,3: Differential ADC output will be used in.."
|
|
newline
|
|
hexmask.long.word 0x00 0.--11. 1. "THRES,ACMP Threshold or VDAC Data"
|
|
group.long 0x338++0x03
|
|
line.long 0x00 "CH15_EVAL,Scan Configuration"
|
|
bitfld.long 0x00 21.--22. "MODE,Configure Evaluation Mode" "0: Threshold comparison is used to evaluate..,1: Sliding window is used to evaluate sensor..,2: Step detection is used to evaluate sensor..,?..."
|
|
bitfld.long 0x00 20. "SCANRESINV,Enable Inversion of Result" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "STRSAMPLE,Enable Storing of Sensor Sample in Result Buffer" "0: Nothing will be stored in the result buffer,1: The sensor sample data will be stored in the..,2: The data source (i.e. the channel) will be..,?..."
|
|
bitfld.long 0x00 17. "DECODE,Send Result to Decoder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "COMP,Select Mode for Threshold Comparison" "0,1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMPTHRES,Decision Threshold for Sensor Data"
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
|
|
base ad:0x40088000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PA_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PA_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
|
bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PA_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x0C++0x03
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line.long 0x00 "PA_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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wgroup.long 0x18++0x03
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line.long 0x00 "PA_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
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rgroup.long 0x1C++0x03
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line.long 0x00 "PA_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
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group.long 0x20++0x03
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line.long 0x00 "PA_PINLOCKN,Port Unlocked Pins Register"
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hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
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group.long 0x28++0x03
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line.long 0x00 "PA_OVTDIS,Over Voltage Disable for All Modes"
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hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
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group.long 0x30++0x03
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line.long 0x00 "PB_CTRL,Port Control Register"
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bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
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bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
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bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
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group.long 0x34++0x03
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line.long 0x00 "PB_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x38++0x03
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line.long 0x00 "PB_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x3C++0x03
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line.long 0x00 "PB_DOUT,Port Data Out Register"
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|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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|
wgroup.long 0x48++0x03
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line.long 0x00 "PB_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
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|
rgroup.long 0x4C++0x03
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|
line.long 0x00 "PB_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
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|
group.long 0x50++0x03
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line.long 0x00 "PB_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
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|
group.long 0x58++0x03
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|
line.long 0x00 "PB_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
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|
group.long 0x60++0x03
|
|
line.long 0x00 "PC_CTRL,Port Control Register"
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|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
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|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
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|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
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|
group.long 0x64++0x03
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line.long 0x00 "PC_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x68++0x03
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line.long 0x00 "PC_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x6C++0x03
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line.long 0x00 "PC_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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wgroup.long 0x78++0x03
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line.long 0x00 "PC_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
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rgroup.long 0x7C++0x03
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line.long 0x00 "PC_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
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group.long 0x80++0x03
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line.long 0x00 "PC_PINLOCKN,Port Unlocked Pins Register"
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|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
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group.long 0x88++0x03
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line.long 0x00 "PC_OVTDIS,Over Voltage Disable for All Modes"
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|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
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|
group.long 0x90++0x03
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line.long 0x00 "PD_CTRL,Port Control Register"
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|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
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bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
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bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
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group.long 0x94++0x03
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line.long 0x00 "PD_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x98++0x03
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line.long 0x00 "PD_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
group.long 0x9C++0x03
|
|
line.long 0x00 "PD_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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|
wgroup.long 0xA8++0x03
|
|
line.long 0x00 "PD_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0xAC++0x03
|
|
line.long 0x00 "PD_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "PD_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "PD_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "PE_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
newline
|
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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|
newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "PE_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
group.long 0xC8++0x03
|
|
line.long 0x00 "PE_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
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newline
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "PE_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0xD8++0x03
|
|
line.long 0x00 "PE_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0xDC++0x03
|
|
line.long 0x00 "PE_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "PE_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "PE_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "PF_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
newline
|
|
bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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|
newline
|
|
bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "PF_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "PF_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "PF_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0x108++0x03
|
|
line.long 0x00 "PF_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "PF_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "PF_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "PF_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "PG_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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|
newline
|
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "PG_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "PG_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "PG_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0x138++0x03
|
|
line.long 0x00 "PG_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0x13C++0x03
|
|
line.long 0x00 "PG_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "PG_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "PG_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "PH_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
|
|
newline
|
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "PH_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x158++0x03
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line.long 0x00 "PH_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x15C++0x03
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line.long 0x00 "PH_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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wgroup.long 0x168++0x03
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line.long 0x00 "PH_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
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rgroup.long 0x16C++0x03
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line.long 0x00 "PH_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
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group.long 0x170++0x03
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line.long 0x00 "PH_PINLOCKN,Port Unlocked Pins Register"
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hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
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group.long 0x178++0x03
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line.long 0x00 "PH_OVTDIS,Over Voltage Disable for All Modes"
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hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
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|
group.long 0x180++0x03
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line.long 0x00 "PI_CTRL,Port Control Register"
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bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
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bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
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bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
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group.long 0x184++0x03
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line.long 0x00 "PI_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x188++0x03
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|
line.long 0x00 "PI_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
group.long 0x18C++0x03
|
|
line.long 0x00 "PI_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0x198++0x03
|
|
line.long 0x00 "PI_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0x19C++0x03
|
|
line.long 0x00 "PI_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "PI_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "PI_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "PJ_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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|
newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "PJ_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x1B8++0x03
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line.long 0x00 "PJ_MODEH,Port Pin Mode High Register"
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bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x1BC++0x03
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line.long 0x00 "PJ_DOUT,Port Data Out Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
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wgroup.long 0x1C8++0x03
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line.long 0x00 "PJ_DOUTTGL,Port Data Out Toggle Register"
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hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
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rgroup.long 0x1CC++0x03
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line.long 0x00 "PJ_DIN,Port Data in Register"
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hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
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group.long 0x1D0++0x03
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line.long 0x00 "PJ_PINLOCKN,Port Unlocked Pins Register"
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hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
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group.long 0x1D8++0x03
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line.long 0x00 "PJ_OVTDIS,Over Voltage Disable for All Modes"
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hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
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group.long 0x1E0++0x03
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line.long 0x00 "PK_CTRL,Port Control Register"
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bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
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bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
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bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
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group.long 0x1E4++0x03
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line.long 0x00 "PK_MODEL,Port Pin Mode Low Register"
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bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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group.long 0x1E8++0x03
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|
line.long 0x00 "PK_MODEH,Port Pin Mode High Register"
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|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
group.long 0x1EC++0x03
|
|
line.long 0x00 "PK_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0x1F8++0x03
|
|
line.long 0x00 "PK_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0x1FC++0x03
|
|
line.long 0x00 "PK_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "PK_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "PK_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "PL_CTRL,Port Control Register"
|
|
bitfld.long 0x00 28. "DINDISALT,Alternate Data in Disable" "0,1"
|
|
bitfld.long 0x00 20.--22. "SLEWRATEALT,Alternate Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
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|
newline
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bitfld.long 0x00 16. "DRIVESTRENGTHALT,Alternate Drive Strength for Port" "0,1"
|
|
bitfld.long 0x00 12. "DINDIS,Data in Disable" "0,1"
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|
newline
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bitfld.long 0x00 4.--6. "SLEWRATE,Slewrate Limit for Port" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. "DRIVESTRENGTH,Drive Strength for Port" "0,1"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "PL_MODEL,Port Pin Mode Low Register"
|
|
bitfld.long 0x00 28.--31. "MODE7,Pin 7 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 24.--27. "MODE6,Pin 6 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 20.--23. "MODE5,Pin 5 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 16.--19. "MODE4,Pin 4 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 12.--15. "MODE3,Pin 3 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 8.--11. "MODE2,Pin 2 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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newline
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bitfld.long 0x00 4.--7. "MODE1,Pin 1 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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bitfld.long 0x00 0.--3. "MODE0,Pin 0 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "PL_MODEH,Port Pin Mode High Register"
|
|
bitfld.long 0x00 28.--31. "MODE15,Pin 15 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 24.--27. "MODE14,Pin 14 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
newline
|
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bitfld.long 0x00 20.--23. "MODE13,Pin 13 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 16.--19. "MODE12,Pin 12 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
newline
|
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bitfld.long 0x00 12.--15. "MODE11,Pin 11 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
bitfld.long 0x00 8.--11. "MODE10,Pin 10 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
newline
|
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bitfld.long 0x00 4.--7. "MODE9,Pin 9 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
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|
bitfld.long 0x00 0.--3. "MODE8,Pin 8 Mode" "0: Input disabled,1: Input enabled,2: Input enabled,3: Input enabled with filter,4: Push-pull output,5: Push-pull using alternate control,6: Wired-or output,7: Wired-or output with pull-down,8: Open-drain output,9: Open-drain output with filter,10: Open-drain output with pullup,11: Open-drain output with filter and pullup,12: Open-drain output using alternate control,13: Open-drain output using alternate control..,14: Open-drain output using alternate control..,15: Open-drain output using alternate control.."
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "PL_DOUT,Port Data Out Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUT,Data Out"
|
|
wgroup.long 0x228++0x03
|
|
line.long 0x00 "PL_DOUTTGL,Port Data Out Toggle Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DOUTTGL,Data Out Toggle"
|
|
rgroup.long 0x22C++0x03
|
|
line.long 0x00 "PL_DIN,Port Data in Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIN,Data in"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "PL_PINLOCKN,Port Unlocked Pins Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "PINLOCKN,Unlocked Pins"
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "PL_OVTDIS,Over Voltage Disable for All Modes"
|
|
hexmask.long.word 0x00 0.--15. 1. "OVTDIS,Disable Over Voltage Capability"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "EXTIPSELL,External Interrupt Port Select Low Register"
|
|
bitfld.long 0x00 28.--31. "EXTIPSEL7,External Interrupt 7 Port Select" "0: Port A group selected for external interrupt 7,1: Port B group selected for external interrupt 7,2: Port C group selected for external interrupt 7,3: Port D group selected for external interrupt 7,4: Port E group selected for external interrupt 7,5: Port F group selected for external interrupt 7,?..."
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bitfld.long 0x00 24.--27. "EXTIPSEL6,External Interrupt 6 Port Select" "0: Port A group selected for external interrupt 6,1: Port B group selected for external interrupt 6,2: Port C group selected for external interrupt 6,3: Port D group selected for external interrupt 6,4: Port E group selected for external interrupt 6,5: Port F group selected for external interrupt 6,?..."
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newline
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bitfld.long 0x00 20.--23. "EXTIPSEL5,External Interrupt 5 Port Select" "0: Port A group selected for external interrupt 5,1: Port B group selected for external interrupt 5,2: Port C group selected for external interrupt 5,3: Port D group selected for external interrupt 5,4: Port E group selected for external interrupt 5,5: Port F group selected for external interrupt 5,?..."
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bitfld.long 0x00 16.--19. "EXTIPSEL4,External Interrupt 4 Port Select" "0: Port A group selected for external interrupt 4,1: Port B group selected for external interrupt 4,2: Port C group selected for external interrupt 4,3: Port D group selected for external interrupt 4,4: Port E group selected for external interrupt 4,5: Port F group selected for external interrupt 4,?..."
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newline
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bitfld.long 0x00 12.--15. "EXTIPSEL3,External Interrupt 3 Port Select" "0: Port A group selected for external interrupt 3,1: Port B group selected for external interrupt 3,2: Port C group selected for external interrupt 3,3: Port D group selected for external interrupt 3,4: Port E group selected for external interrupt 3,5: Port F group selected for external interrupt 3,?..."
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bitfld.long 0x00 8.--11. "EXTIPSEL2,External Interrupt 2 Port Select" "0: Port A group selected for external interrupt 2,1: Port B group selected for external interrupt 2,2: Port C group selected for external interrupt 2,3: Port D group selected for external interrupt 2,4: Port E group selected for external interrupt 2,5: Port F group selected for external interrupt 2,?..."
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newline
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bitfld.long 0x00 4.--7. "EXTIPSEL1,External Interrupt 1 Port Select" "0: Port A group selected for external interrupt 1,1: Port B group selected for external interrupt 1,2: Port C group selected for external interrupt 1,3: Port D group selected for external interrupt 1,4: Port E group selected for external interrupt 1,5: Port F group selected for external interrupt 1,?..."
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bitfld.long 0x00 0.--3. "EXTIPSEL0,External Interrupt 0 Port Select" "0: Port A group selected for external interrupt 0,1: Port B group selected for external interrupt 0,2: Port C group selected for external interrupt 0,3: Port D group selected for external interrupt 0,4: Port E group selected for external interrupt 0,5: Port F group selected for external interrupt 0,?..."
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|
group.long 0x404++0x03
|
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line.long 0x00 "EXTIPSELH,External Interrupt Port Select High Register"
|
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bitfld.long 0x00 28.--31. "EXTIPSEL15,External Interrupt 15 Port Select" "0: Port A group selected for external interrupt 15,1: Port B group selected for external interrupt 15,2: Port C group selected for external interrupt 15,3: Port D group selected for external interrupt 15,4: Port E group selected for external interrupt 15,5: Port F group selected for external interrupt 15,?..."
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bitfld.long 0x00 24.--27. "EXTIPSEL14,External Interrupt 14 Port Select" "0: Port A group selected for external interrupt 14,1: Port B group selected for external interrupt 14,2: Port C group selected for external interrupt 14,3: Port D group selected for external interrupt 14,4: Port E group selected for external interrupt 14,5: Port F group selected for external interrupt 14,?..."
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newline
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bitfld.long 0x00 20.--23. "EXTIPSEL13,External Interrupt 13 Port Select" "0: Port A group selected for external interrupt 13,1: Port B group selected for external interrupt 13,2: Port C group selected for external interrupt 13,3: Port D group selected for external interrupt 13,4: Port E group selected for external interrupt 13,5: Port F group selected for external interrupt 13,?..."
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bitfld.long 0x00 16.--19. "EXTIPSEL12,External Interrupt 12 Port Select" "0: Port A group selected for external interrupt 12,1: Port B group selected for external interrupt 12,2: Port C group selected for external interrupt 12,3: Port D group selected for external interrupt 12,4: Port E group selected for external interrupt 12,5: Port F group selected for external interrupt 12,?..."
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newline
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bitfld.long 0x00 12.--15. "EXTIPSEL11,External Interrupt 11 Port Select" "0: Port A group selected for external interrupt 11,1: Port B group selected for external interrupt 11,2: Port C group selected for external interrupt 11,3: Port D group selected for external interrupt 11,4: Port E group selected for external interrupt 11,5: Port F group selected for external interrupt 11,?..."
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bitfld.long 0x00 8.--11. "EXTIPSEL10,External Interrupt 10 Port Select" "0: Port A group selected for external interrupt 10,1: Port B group selected for external interrupt 10,2: Port C group selected for external interrupt 10,3: Port D group selected for external interrupt 10,4: Port E group selected for external interrupt 10,5: Port F group selected for external interrupt 10,?..."
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newline
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bitfld.long 0x00 4.--7. "EXTIPSEL9,External Interrupt 9 Port Select" "0: Port A group selected for external interrupt 9,1: Port B group selected for external interrupt 9,2: Port C group selected for external interrupt 9,3: Port D group selected for external interrupt 9,4: Port E group selected for external interrupt 9,5: Port F group selected for external interrupt 9,?..."
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bitfld.long 0x00 0.--3. "EXTIPSEL8,External Interrupt 8 Port Select" "0: Port A group selected for external interrupt 8,1: Port B group selected for external interrupt 8,2: Port C group selected for external interrupt 8,3: Port D group selected for external interrupt 8,4: Port E group selected for external interrupt 8,5: Port F group selected for external interrupt 8,?..."
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|
group.long 0x408++0x03
|
|
line.long 0x00 "EXTIPINSELL,External Interrupt Pin Select Low Register"
|
|
bitfld.long 0x00 28.--29. "EXTIPINSEL7,External Interrupt 7 Pin Select" "0: Pin 4,1: Pin 5,2: Pin 6,3: Pin 7"
|
|
bitfld.long 0x00 24.--25. "EXTIPINSEL6,External Interrupt 6 Pin Select" "0: Pin 4,1: Pin 5,2: Pin 6,3: Pin 7"
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|
newline
|
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bitfld.long 0x00 20.--21. "EXTIPINSEL5,External Interrupt 5 Pin Select" "0: Pin 4,1: Pin 5,2: Pin 6,3: Pin 7"
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bitfld.long 0x00 16.--17. "EXTIPINSEL4,External Interrupt 4 Pin Select" "0: Pin 4,1: Pin 5,2: Pin 6,3: Pin 7"
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newline
|
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bitfld.long 0x00 12.--13. "EXTIPINSEL3,External Interrupt 3 Pin Select" "0: Pin 0,1: Pin 1,2: Pin 2,3: Pin 3"
|
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bitfld.long 0x00 8.--9. "EXTIPINSEL2,External Interrupt 2 Pin Select" "0: Pin 0,1: Pin 1,2: Pin 2,3: Pin 3"
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|
newline
|
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bitfld.long 0x00 4.--5. "EXTIPINSEL1,External Interrupt 1 Pin Select" "0: Pin 0,1: Pin 1,2: Pin 2,3: Pin 3"
|
|
bitfld.long 0x00 0.--1. "EXTIPINSEL0,External Interrupt 0 Pin Select" "0: Pin 0,1: Pin 1,2: Pin 2,3: Pin 3"
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "EXTIPINSELH,External Interrupt Pin Select High Register"
|
|
bitfld.long 0x00 28.--29. "EXTIPINSEL15,External Interrupt 15 Pin Select" "0: Pin 12,1: Pin 13,2: Pin 14,3: Pin 15"
|
|
bitfld.long 0x00 24.--25. "EXTIPINSEL14,External Interrupt 14 Pin Select" "0: Pin 12,1: Pin 13,2: Pin 14,3: Pin 15"
|
|
newline
|
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bitfld.long 0x00 20.--21. "EXTIPINSEL13,External Interrupt 13 Pin Select" "0: Pin 12,1: Pin 13,2: Pin 14,3: Pin 15"
|
|
bitfld.long 0x00 16.--17. "EXTIPINSEL12,External Interrupt 12 Pin Select" "0: Pin 12,1: Pin 13,2: Pin 14,3: Pin 15"
|
|
newline
|
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bitfld.long 0x00 12.--13. "EXTIPINSEL11,External Interrupt 11 Pin Select" "0: Pin 8,1: Pin 9,2: Pin 10,3: Pin 11"
|
|
bitfld.long 0x00 8.--9. "EXTIPINSEL10,External Interrupt 10 Pin Select" "0: Pin 8,1: Pin 9,2: Pin 10,3: Pin 11"
|
|
newline
|
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bitfld.long 0x00 4.--5. "EXTIPINSEL9,External Interrupt 9 Pin Select" "0: Pin 8,1: Pin 9,2: Pin 10,3: Pin 11"
|
|
bitfld.long 0x00 0.--1. "EXTIPINSEL8,External Interrupt 8 Pin Select" "0: Pin 8,1: Pin 9,2: Pin 10,3: Pin 11"
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "EXTIRISE,External Interrupt Rising Edge Trigger Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXTIRISE,External Interrupt N Rising Edge Trigger Enable"
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "EXTIFALL,External Interrupt Falling Edge Trigger Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXTIFALL,External Interrupt N Falling Edge Trigger Enable"
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "EXTILEVEL,External Interrupt Level Register"
|
|
bitfld.long 0x00 25. "EM4WU9,EM4 Wake Up Level for EM4WU9 Pin" "0,1"
|
|
bitfld.long 0x00 23. "EM4WU7,EM4 Wake Up Level for EM4WU7 Pin" "0,1"
|
|
newline
|
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bitfld.long 0x00 22. "EM4WU6,EM4 Wake Up Level for EM4WU6 Pin" "0,1"
|
|
bitfld.long 0x00 21. "EM4WU5,EM4 Wake Up Level for EM4WU5 Pin" "0,1"
|
|
newline
|
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bitfld.long 0x00 20. "EM4WU4,EM4 Wake Up Level for EM4WU4 Pin" "0,1"
|
|
bitfld.long 0x00 19. "EM4WU3,EM4 Wake Up Level for EM4WU3 Pin" "0,1"
|
|
newline
|
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bitfld.long 0x00 18. "EM4WU2,EM4 Wake Up Level for EM4WU2 Pin" "0,1"
|
|
bitfld.long 0x00 17. "EM4WU1,EM4 Wake Up Level for EM4WU1 Pin" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "EM4WU0,EM4 Wake Up Level for EM4WU0 Pin" "0,1"
|
|
rgroup.long 0x41C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "EM4WU,EM4 Wake Up Pin Interrupt Flag"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXT,External Pin Interrupt Flag"
|
|
wgroup.long 0x420++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "EM4WU,Set EM4WU Interrupt Flag"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXT,Set EXT Interrupt Flag"
|
|
wgroup.long 0x424++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "EM4WU,Clear EM4WU Interrupt Flag"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXT,Clear EXT Interrupt Flag"
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "EM4WU,EM4WU Interrupt Enable"
|
|
hexmask.long.word 0x00 0.--15. 1. "EXT,EXT Interrupt Enable"
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "EM4WUEN,EM4 Wake Up Enable Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "EM4WUEN,EM4 Wake Up Enable"
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 3. "TDIPEN,JTAG Test Debug Input Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "TDOPEN,JTAG Test Debug Output Pin Enable" "0,1"
|
|
newline
|
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bitfld.long 0x00 1. "SWDIOTMSPEN,Serial Wire Data and JTAG Test Mode Select Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "SWCLKTCKPEN,Serial Wire Clock and JTAG Test Clock Pin Enable" "0,1"
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "INSENSE,Input Sense Register"
|
|
bitfld.long 0x00 1. "EM4WU,EM4WU Interrupt Sense Enable" "0,1"
|
|
bitfld.long 0x00 0. "INT,Interrupt Sense Enable" "0,1"
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
tree.end
|
|
tree "PRS"
|
|
base ad:0x400E6000
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SWPULSE,Software Pulse Register"
|
|
bitfld.long 0x00 7. "CH7PULSE,Channel 7 Pulse Generation" "0,1"
|
|
bitfld.long 0x00 6. "CH6PULSE,Channel 6 Pulse Generation" "0,1"
|
|
newline
|
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bitfld.long 0x00 5. "CH5PULSE,Channel 5 Pulse Generation" "0,1"
|
|
bitfld.long 0x00 4. "CH4PULSE,Channel 4 Pulse Generation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH3PULSE,Channel 3 Pulse Generation" "0,1"
|
|
bitfld.long 0x00 2. "CH2PULSE,Channel 2 Pulse Generation" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1PULSE,Channel 1 Pulse Generation" "0,1"
|
|
bitfld.long 0x00 0. "CH0PULSE,Channel 0 Pulse Generation" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SWLEVEL,Software Level Register"
|
|
bitfld.long 0x00 7. "CH7LEVEL,Channel 7 Software Level" "0,1"
|
|
bitfld.long 0x00 6. "CH6LEVEL,Channel 6 Software Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH5LEVEL,Channel 5 Software Level" "0,1"
|
|
bitfld.long 0x00 4. "CH4LEVEL,Channel 4 Software Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH3LEVEL,Channel 3 Software Level" "0,1"
|
|
bitfld.long 0x00 2. "CH2LEVEL,Channel 2 Software Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1LEVEL,Channel 1 Software Level" "0,1"
|
|
bitfld.long 0x00 0. "CH0LEVEL,Channel 0 Software Level" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 7. "CH7PEN,CH7 Pin Enable" "0,1"
|
|
bitfld.long 0x00 6. "CH6PEN,CH6 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH5PEN,CH5 Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. "CH4PEN,CH4 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH3PEN,CH3 Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "CH2PEN,CH2 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1PEN,CH1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "CH0PEN,CH0 Pin Enable" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. "CH3LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,?..."
|
|
bitfld.long 0x00 16.--21. "CH2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "CH1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,?..."
|
|
bitfld.long 0x00 0.--5. "CH0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. "CH7LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,?..."
|
|
bitfld.long 0x00 16.--21. "CH6LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "CH5LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,?..."
|
|
bitfld.long 0x00 0.--5. "CH4LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,?..."
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 1.--3. "SEVONPRSSEL,SEVONPRS PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
bitfld.long 0x00 0. "SEVONPRS,Set Event on PRS" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DMAREQ0,DMA Request 0 Register"
|
|
bitfld.long 0x00 6.--8. "PRSSEL,DMA Request 0 PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DMAREQ1,DMA Request 1 Register"
|
|
bitfld.long 0x00 6.--8. "PRSSEL,DMA Request 1 PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "PEEK,PRS Channel Values"
|
|
bitfld.long 0x00 7. "CH7VAL,Channel 7 Current Value" "0,1"
|
|
bitfld.long 0x00 6. "CH6VAL,Channel 6 Current Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH5VAL,Channel 5 Current Value" "0,1"
|
|
bitfld.long 0x00 4. "CH4VAL,Channel 4 Current Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH3VAL,Channel 3 Current Value" "0,1"
|
|
bitfld.long 0x00 2. "CH2VAL,Channel 2 Current Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1VAL,Channel 1 Current Value" "0,1"
|
|
bitfld.long 0x00 0. "CH0VAL,Channel 0 Current Value" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CH3_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CH6_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CH7_CTRL,Channel Control Register"
|
|
bitfld.long 0x00 30. "ASYNC,Asynchronous Reflex" "0,1"
|
|
bitfld.long 0x00 28. "ANDNEXT,And Next" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "ORPREV,Or Previous" "0,1"
|
|
bitfld.long 0x00 26. "INV,Invert Channel" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "STRETCH,Stretch Channel Output" "0,1"
|
|
bitfld.long 0x00 20.--21. "EDSEL,Edge Detect Select" "0: Signal is left as it is,1: A one HFCLK cycle pulse is generated for..,2: A one HFCLK clock cycle pulse is generated..,3: A one HFCLK clock cycle pulse is generated.."
|
|
newline
|
|
hexmask.long.byte 0x00 8.--14. 1. "SOURCESEL,Source Select"
|
|
bitfld.long 0x00 0.--2. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "TRACECTRL,MTB Trace Control Register"
|
|
bitfld.long 0x00 9.--11. "TSTOP,MTB TSTOP PRS Select" "0: PRS ch 0 is controlling TSTOP,1: PRS ch 1 is controlling TSTOP,2: PRS ch 2 is controlling TSTOP,3: PRS ch 3 is controlling TSTOP,4: PRS ch 4 is controlling TSTOP,5: PRS ch 5 is controlling TSTOP,6: PRS ch 6 is controlling TSTOP,7: PRS ch 7 is controlling TSTOP"
|
|
bitfld.long 0x00 8. "TSTOPEN,PRS TSTOP Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1.--3. "TSTART,MTB TSTART PRS Select" "0: PRS ch 0 is controlling TSTART,1: PRS ch 1 is controlling TSTART,2: PRS ch 2 is controlling TSTART,3: PRS ch 3 is controlling TSTART,4: PRS ch 4 is controlling TSTART,5: PRS ch 5 is controlling TSTART,6: PRS ch 6 is controlling TSTART,7: PRS ch 7 is controlling TSTART"
|
|
bitfld.long 0x00 0. "TSTARTEN,PRS TSTART Enable" "0,1"
|
|
tree.end
|
|
tree "LDMA"
|
|
base ad:0x40002000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,DMA Control Register"
|
|
bitfld.long 0x00 24.--26. "NUMFIXED,Number of Fixed Priority Channels" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--15. 1. "SYNCPRSCLREN,Synchronization PRS Clear Enable"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "SYNCPRSSETEN,Synchronization PRS Set Enable"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,DMA Status Register"
|
|
bitfld.long 0x00 24.--28. "CHNUM,Number of Channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. "FIFOLEVEL,FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "CHERROR,Errant Channel Number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 3.--5. "CHGRANT,Granted Channel Number" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 1. "ANYREQ,Any DMA Channel Request Pending" "0,1"
|
|
bitfld.long 0x00 0. "ANYBUSY,Any DMA Channel Busy" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SYNC,DMA Synchronization Trigger Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SYNCTRIG,Synchronization Trigger"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHEN,DMA Channel Enable Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHEN,Channel Enables"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CHBUSY,DMA Channel Busy Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "BUSY,Channels Busy"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHDONE,DMA Channel Linking Done Register (Single-Cycle RMW)"
|
|
hexmask.long.byte 0x00 0.--7. 1. "CHDONE,DMA Channel Linking or Done"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DBGHALT,DMA Channel Debug Halt Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DBGHALT,DMA Debug Halt"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "SWREQ,DMA Channel Software Transfer Request Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWREQ,Software Transfer Requests"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "REQDIS,DMA Channel Request Disable Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REQDIS,DMA Request Disables"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "REQPEND,DMA Channel Requests Pending Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REQPEND,DMA Requests Pending"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "LINKLOAD,DMA Channel Link Load Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LINKLOAD,DMA Link Loads"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "REQCLEAR,DMA Channel Request Clear Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REQCLEAR,DMA Request Clear"
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. "ERROR,Transfer Error Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DONE,DMA Structure Operation Done Interrupt Flag"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. "ERROR,Set ERROR Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DONE,Set DONE Interrupt Flag"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. "ERROR,Clear ERROR Interrupt Flag" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DONE,Clear DONE Interrupt Flag"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "ERROR,ERROR Interrupt Enable" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DONE,DONE Interrupt Enable"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CH0_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CH0_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CH0_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CH0_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CH0_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CH0_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "CH0_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "CH1_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "CH1_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "CH1_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "CH1_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "CH1_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "CH1_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "CH1_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
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|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
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|
newline
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rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "CH2_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
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|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0xE4++0x03
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|
line.long 0x00 "CH2_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
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|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
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|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "CH2_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
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|
group.long 0xEC++0x03
|
|
line.long 0x00 "CH2_CTRL,Channel Descriptor Control Word Register"
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|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
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|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
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|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
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|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
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|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
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|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
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|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "CH2_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "CH2_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
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|
group.long 0xF8++0x03
|
|
line.long 0x00 "CH2_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
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|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
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|
newline
|
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rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CH3_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
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|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
group.long 0x114++0x03
|
|
line.long 0x00 "CH3_CFG,Channel Configuration Register"
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|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
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|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
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newline
|
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bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x118++0x03
|
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line.long 0x00 "CH3_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
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|
group.long 0x11C++0x03
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line.long 0x00 "CH3_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
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|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
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bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
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|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
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|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "CH3_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "CH3_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "CH3_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "CH4_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "CH4_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "CH4_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CH4_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "CH4_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "CH4_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "CH4_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "CH5_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "CH5_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "CH5_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "CH5_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "CH5_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "CH5_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "CH5_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "CH6_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "CH6_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "CH6_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "CH6_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "CH6_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "CH6_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "CH6_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "CH7_REQSEL,Channel Peripheral Request Select Register"
|
|
bitfld.long 0x00 16.--21. "SOURCESEL,Source Select" "0: No source selected,1: Peripheral Reflex System,?,?,?,?,?,?,8: Analog to Digital Converter 0,?,10: Digital to Analog Converter 0,?,12: Universal Synchronous/Asynchronous..,13: Universal Synchronous/Asynchronous..,14: Universal Synchronous/Asynchronous..,15: Universal Synchronous/Asynchronous..,?,?,18: Universal Asynchronous Receiver/Transmitter 0,?,20: Low Energy UART 0,?,22: I2C 0,23: I2C 1,?,25: Timer 0,26: Timer 1,?,?,?,?,?,32: Wide Timer 0,33: Wide Timer 1,?,?,?,?,?,?,?,?,?,?,?,?,?,?,48: Memory System Controller,49: Advanced Encryption Standard Accelerator,?,?,?,?,?,?,?,?,?,?,?,61: Capacitive touch sense module,62: Low Energy Sensor Interface,?..."
|
|
bitfld.long 0x00 0.--3. "SIGSEL,Signal Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "CH7_CFG,Channel Configuration Register"
|
|
bitfld.long 0x00 21. "DSTINCSIGN,Destination Address Increment Sign" "0,1"
|
|
bitfld.long 0x00 20. "SRCINCSIGN,Source Address Increment Sign" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "ARBSLOTS,Arbitration Slot Number Select" "0: One arbitration slot selected,1: Two arbitration slots selected,2: Four arbitration slots selected,3: Eight arbitration slots selected"
|
|
group.long 0x1D8++0x03
|
|
line.long 0x00 "CH7_LOOP,Channel Loop Counter Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "LOOPCNT,Linked Structure Sequence Loop Counter"
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "CH7_CTRL,Channel Descriptor Control Word Register"
|
|
rbitfld.long 0x00 31. "DSTMODE,Destination Addressing Mode" "0,1"
|
|
rbitfld.long 0x00 30. "SRCMODE,Source Addressing Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28.--29. "DSTINC,Destination Address Increment Size" "0: Increment destination address by one unit..,1: Increment destination address by two unit..,2: Increment destination address by four unit..,3: Do not increment the destination address"
|
|
bitfld.long 0x00 26.--27. "SIZE,Unit Data Transfer Size" "0: Each unit transfer is a byte,1: Each unit transfer is a half-word,2: Each unit transfer is a word,?..."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "SRCINC,Source Address Increment Size" "0: Increment source address by one unit data..,1: Increment source address by two unit data..,2: Increment source address by four unit data..,3: Do not increment the source address"
|
|
bitfld.long 0x00 23. "IGNORESREQ,Ignore Sreq" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "DECLOOPCNT,Decrement Loop Count" "0,1"
|
|
bitfld.long 0x00 21. "REQMODE,DMA Request Transfer Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DONEIFSEN,DMA Operation Done Interrupt Flag Set Enable" "0,1"
|
|
bitfld.long 0x00 16.--19. "BLOCKSIZE,Block Transfer Size" "0: One unit transfer per arbitration,1: Two unit transfers per arbitration,2: Three unit transfers per arbitration,3: Four unit transfers per arbitration,4: Six unit transfers per arbitration,5: Eight unit transfers per arbitration,?,7: Sixteen unit transfers per arbitration,?,9: 32 unit transfers per arbitration,10: 64 unit transfers per arbitration,11: 128 unit transfers per arbitration,12: 256 unit transfers per arbitration,13: 512 unit transfers per arbitration,14: 1024 unit transfers per arbitration,15: Transfer all units as specified by the.."
|
|
newline
|
|
bitfld.long 0x00 15. "BYTESWAP,Endian Byte Swap" "0,1"
|
|
hexmask.long.word 0x00 4.--14. 1. "XFERCNT,DMA Unit Data Transfer Count"
|
|
newline
|
|
bitfld.long 0x00 3. "STRUCTREQ,Structure DMA Transfer Request" "0,1"
|
|
rbitfld.long 0x00 0.--1. "STRUCTTYPE,DMA Structure Type" "0: DMA transfer structure type selected,1: Synchronization structure type selected,2: Write immediate value structure type selected,?..."
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "CH7_SRC,Channel Descriptor Source Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "SRCADDR,Source Data Address"
|
|
group.long 0x1E4++0x03
|
|
line.long 0x00 "CH7_DST,Channel Descriptor Destination Data Address Register"
|
|
hexmask.long 0x00 0.--31. 1. "DSTADDR,Destination Data Address"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "CH7_LINK,Channel Descriptor Link Structure Address Register"
|
|
hexmask.long 0x00 2.--31. 1. "LINKADDR,Link Structure Address"
|
|
bitfld.long 0x00 1. "LINK,Link Next Structure" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "LINKMODE,Link Structure Addressing Mode" "0,1"
|
|
tree.end
|
|
tree "GPCRC"
|
|
base ad:0x4001C000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 13. "AUTOINIT,Auto Init Enable" "0,1"
|
|
bitfld.long 0x00 10. "BYTEREVERSE,Byte Reverse Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "BITREVERSE,Byte-level Bit Reverse Enable" "0,1"
|
|
bitfld.long 0x00 8. "BYTEMODE,Byte Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "POLYSEL,Polynomial Select" "0,1"
|
|
bitfld.long 0x00 0. "EN,CRC Functionality Enable" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. "INIT,Initialization Enable" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INIT,CRC Init Value"
|
|
hexmask.long 0x00 0.--31. 1. "INIT,CRC Initialization Value"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "POLY,CRC Polynomial Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "POLY,CRC Polynomial Value"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "INPUTDATA,Input 32-bit Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "INPUTDATA,Input Data for 32-bit"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "INPUTDATAHWORD,Input 16-bit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "INPUTDATAHWORD,Input Data for 16-bit"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "INPUTDATABYTE,Input 8-bit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "INPUTDATABYTE,Input Data for 8-bit"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DATA,CRC Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,CRC Data Register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "DATAREV,CRC Data Reverse Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATAREV,Data Reverse Value"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "DATABYTEREV,CRC Data Byte Reverse Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATABYTEREV,Data Byte Reverse Value"
|
|
tree.end
|
|
tree "CAN0"
|
|
base ad:0x40004000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 7. "TEST,Test Mode Enable Write Access to the Test Register is Enabled By Setting Bit Test in the CAN Control Register" "0,1"
|
|
bitfld.long 0x00 6. "CCE,Configuration Change Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "DAR,Disable Automatic Retransmission" "0,1"
|
|
bitfld.long 0x00 3. "EIE,Error Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "SIE,Status Change Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "IE,Module Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "INIT,Initialize" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
rbitfld.long 0x00 7. "BOFF,Bus Off Status" "0,1"
|
|
rbitfld.long 0x00 6. "EWARN,Warning Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 5. "EPASS,Error Passive" "0,1"
|
|
bitfld.long 0x00 4. "RXOK,Received a Message Successfully" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXOK,Transmitted a Message Successfully" "0,1"
|
|
bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0: No error occurred during last CAN bus event,1: More than 5 equal bits in a sequence have..,2: A fixed format part of a received frame has..,3: The message this CAN Core transmitted was not..,4: During the transmission of a message (with..,5: During the transmission of a message (or..,6: The CRC check sum was incorrect in the..,7: When the LEC shows the value '7' no CAN bus.."
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "ERRCNT,Error Count Register"
|
|
bitfld.long 0x00 15. "RECERRP,Receive Error Passive" "0,1"
|
|
hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BITTIMING,Bit Timing Register"
|
|
bitfld.long 0x00 12.--14. "TSEG2,Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "TSEG1,Time Segment Before the Sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "SJW,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. "BRP,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "INTID,Interrupt Identification Register"
|
|
bitfld.long 0x00 15. "INTSTAT,Status Interupt" "0,1"
|
|
bitfld.long 0x00 0.--5. "INTID,Interrupt Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TEST,Test Register"
|
|
rbitfld.long 0x00 7. "RX,Monitors the Actual Value of CAN_RX Pin" "0,1"
|
|
bitfld.long 0x00 5.--6. "TX,Control of CAN_TX Pin" "0: Reset value CAN_TX is controlled by the CAN..,1: Sample Point can be monitored at CAN_TX pin,2: CAN_TX pin drives a dominant bit (0) value,3: CAN_TX pin drives a recessive bit (1) value"
|
|
newline
|
|
bitfld.long 0x00 4. "LBACK,Loopback Mode" "0,1"
|
|
bitfld.long 0x00 3. "SILENT,Silent Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "BASIC,Basic Mode" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BRPE,BRP Extension Register"
|
|
bitfld.long 0x00 0.--3. "BRPE,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "TRANSREQ,Transmission Request Register"
|
|
hexmask.long 0x00 0.--31. 1. "TXRQSTOUT,Transmission Request Bits (Of All Message Objects)"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "MESSAGEDATA,New Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "VALID,DATAVALID Bits (of All Message Objects)"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "MESSAGESTATE,Message Valid Register"
|
|
hexmask.long 0x00 0.--31. 1. "VALID,Message Valid Bits (of All Message Objects)"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CONFIG,Configuration Register"
|
|
bitfld.long 0x00 15. "DBGHALT,Debug Halt" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "IF0IF,Message Object Interrupt Flag Register"
|
|
hexmask.long 0x00 0.--31. 1. "MESSAGE,Message Object Interrupt Flag"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "IF0IFS,Message Object Interrupt Flag Set Register"
|
|
hexmask.long 0x00 0.--31. 1. "MESSAGE,Set MESSAGE Interrupt Flag"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "IF0IFC,Message Object Interrupt Flag Clear Register"
|
|
hexmask.long 0x00 0.--31. 1. "MESSAGE,Clear MESSAGE Interrupt Flag"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "IF0IEN,Message Object Interrupt Enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "MESSAGE,MESSAGE Interrupt Enable"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IF1IF,Status Interrupt Flag Register"
|
|
bitfld.long 0x00 0. "STATUS,Status Interrupt Flag" "0,1"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "IF1IFS,Message Object Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. "STATUS,Set STATUS Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x03
|
|
line.long 0x00 "IF1IFC,Message Object Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. "STATUS,Clear STATUS Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "IF1IEN,Status Interrupt Enable Register"
|
|
bitfld.long 0x00 0. "STATUS,STATUS Interrupt Enable" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "ROUTE,I/O Routing Register"
|
|
bitfld.long 0x00 8.--13. "TXLOC,TX Pin Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
bitfld.long 0x00 2.--7. "RXLOC,RX Pin Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TXPEN,TX Pin Enable" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "MIR0_CMDMASK,Interface Command Mask Register"
|
|
bitfld.long 0x00 7. "WRRD,Write/Read RAM" "0,1"
|
|
bitfld.long 0x00 6. "MASKACC,Access Mask Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ARBACC,Access Arbitration Bits" "0,1"
|
|
bitfld.long 0x00 4. "CONTROL,Access Control Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLRINTPND,Clear Interrupt Pending Bit" "0,1"
|
|
bitfld.long 0x00 2. "TXRQSTNEWDAT,Transmission Request Bit/ New Data Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DATAA,Access Data Bytes 0-3" "0,1"
|
|
bitfld.long 0x00 0. "DATAB,CC Channel Mode" "0,1"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "MIR0_MASK,Interface Mask Register"
|
|
bitfld.long 0x00 31. "MXTD,Mask Extended Identifier" "0,1"
|
|
bitfld.long 0x00 30. "MDIR,Mask Message Direction" "0,1"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. "MASK,Identifier Mask"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "MIR0_ARB,Interface Arbitration Register"
|
|
bitfld.long 0x00 31. "MSGVAL,Message Valid" "0,1"
|
|
bitfld.long 0x00 30. "XTD,Extended Identifier" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DIR,Message Direction" "0,1"
|
|
hexmask.long 0x00 0.--28. 1. "ID,Message Identifier"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "MIR0_CTRL,Interface Message Control Register"
|
|
bitfld.long 0x00 15. "DATAVALID,New Data" "0,1"
|
|
bitfld.long 0x00 14. "MESSAGEOF,Message Lost (only Valid for Message Objects With Direction = Receive)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "INTPND,Interrupt Pending" "0,1"
|
|
bitfld.long 0x00 12. "UMASK,Use Acceptance Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TXIE,Transmit Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "RXIE,Receive Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RMTEN,Remote Enable" "0,1"
|
|
bitfld.long 0x00 8. "TXRQST,Transmit Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EOB,End of Buffer" "0,1"
|
|
bitfld.long 0x00 0.--3. "DLC,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MIR0_DATAL,Interface Data a Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DATA3,Fourth Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DATA2,Third Byte of CAN Data Frame"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DATA1,Second Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0,First Byte of CAN Data Frame"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "MIR0_DATAH,Interface Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DATA7,Eight Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DATA6,Seventh Byte of CAN Data Frame"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DATA5,Sixth Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA4,Fifth Byte of CAN Data Frame"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "MIR0_CMDREQ,Interface Command Request Register"
|
|
rbitfld.long 0x00 15. "BUSY,Busy Flag" "0,1"
|
|
bitfld.long 0x00 0.--5. "MSGNUM,Message Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MIR1_CMDMASK,Interface Command Mask Register"
|
|
bitfld.long 0x00 7. "WRRD,Write/Read RAM" "0,1"
|
|
bitfld.long 0x00 6. "MASKACC,Access Mask Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ARBACC,Access Arbitration Bits" "0,1"
|
|
bitfld.long 0x00 4. "CONTROL,Access Control Bits" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLRINTPND,Clear Interrupt Pending Bit" "0,1"
|
|
bitfld.long 0x00 2. "TXRQSTNEWDAT,Transmission Request Bit/ New Data Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DATAA,Access Data Bytes 0-3" "0,1"
|
|
bitfld.long 0x00 0. "DATAB,CC Channel Mode" "0,1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "MIR1_MASK,Interface Mask Register"
|
|
bitfld.long 0x00 31. "MXTD,Mask Extended Identifier" "0,1"
|
|
bitfld.long 0x00 30. "MDIR,Mask Message Direction" "0,1"
|
|
newline
|
|
hexmask.long 0x00 0.--28. 1. "MASK,Identifier Mask"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "MIR1_ARB,Interface Arbitration Register"
|
|
bitfld.long 0x00 31. "MSGVAL,Message Valid" "0,1"
|
|
bitfld.long 0x00 30. "XTD,Extended Identifier" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "DIR,Message Direction" "0,1"
|
|
hexmask.long 0x00 0.--28. 1. "ID,Message Identifier"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MIR1_CTRL,Interface Message Control Register"
|
|
bitfld.long 0x00 15. "DATAVALID,New Data" "0,1"
|
|
bitfld.long 0x00 14. "MESSAGEOF,Message Lost (only Valid for Message Objects With Direction = Receive)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "INTPND,Interrupt Pending" "0,1"
|
|
bitfld.long 0x00 12. "UMASK,Use Acceptance Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "TXIE,Transmit Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "RXIE,Receive Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RMTEN,Remote Enable" "0,1"
|
|
bitfld.long 0x00 8. "TXRQST,Transmit Request" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "EOB,End of Buffer" "0,1"
|
|
bitfld.long 0x00 0.--3. "DLC,Data Length Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "MIR1_DATAL,Interface Data a Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DATA3,Fourth Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DATA2,Third Byte of CAN Data Frame"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DATA1,Second Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA0,First Byte of CAN Data Frame"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "MIR1_DATAH,Interface Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "DATA7,Eight Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 16.--23. 1. "DATA6,Seventh Byte of CAN Data Frame"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "DATA5,Sixth Byte of CAN Data Frame"
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA4,Fifth Byte of CAN Data Frame"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "MIR1_CMDREQ,Interface Command Request Register"
|
|
rbitfld.long 0x00 15. "BUSY,Busy Flag" "0,1"
|
|
bitfld.long 0x00 0.--5. "MSGNUM,Message Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
tree "TIMER (Timer/Counter)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40018000 ad:0x40018400)
|
|
tree "TIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 29. "RSSCOIST,Reload-Start Sets Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 28. "ATI,Always Track Inputs" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "PRESC,Prescaler Setting" "0: The HFPERCLK is undivided,1: The HFPERCLK is divided by 2,2: The HFPERCLK is divided by 4,3: The HFPERCLK is divided by 8,4: The HFPERCLK is divided by 16,5: The HFPERCLK is divided by 32,6: The HFPERCLK is divided by 64,7: The HFPERCLK is divided by 128,8: The HFPERCLK is divided by 256,9: The HFPERCLK is divided by 512,10: The HFPERCLK is divided by 1024,?..."
|
|
bitfld.long 0x00 16.--17. "CLKSEL,Clock Source Select" "0: Prescaled HFPERCLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "DISSYNCOUT,Disable Timer From Start/Stop/Reload Other Synchronized Timers" "0,1"
|
|
bitfld.long 0x00 13. "X2CNT,2x Count Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
bitfld.long 0x00 8.--9. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x00 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
bitfld.long 0x00 6. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "QDM,Quadrature Decoder Mode Selection" "0,1"
|
|
bitfld.long 0x00 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x00 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 27. "CCPOL3,CC3 Polarity" "0,1"
|
|
bitfld.long 0x00 26. "CCPOL2,CC2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "CCPOL1,CC1 Polarity" "0,1"
|
|
bitfld.long 0x00 24. "CCPOL0,CC0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "ICV3,CC3 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 18. "ICV2,CC2 Input Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "ICV1,CC1 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 16. "ICV0,CC0 Input Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CCVBV3,CC3 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 10. "CCVBV2,CC2 CCVB Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CCVBV1,CC1 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 8. "CCVBV0,CC0 CCVB Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TOPBV,TOPB Valid" "0,1"
|
|
bitfld.long 0x00 1. "DIR,Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RUNNING,Running" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 11. "ICBOF3,CC Channel 3 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 11. "ICBOF3,Set ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,Set ICBOF2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,Set ICBOF1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,Set ICBOF0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,Set CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,Set CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,Set CC0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,Set DIRCHG Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "UF,Set UF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 11. "ICBOF3,Clear ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,Clear ICBOF2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,Clear ICBOF1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,Clear ICBOF0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,Clear CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,Clear CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,Clear CC0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,Clear DIRCHG Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "UF,Clear UF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 11. "ICBOF3,ICBOF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,ICBOF2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,ICBOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,ICBOF0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,DIRCHG Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "UF,UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,OF Interrupt Enable" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TOP,Counter Top Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "TOP,Counter Top Value"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "TOPB,Counter Top Value Buffer"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,Counter Value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "LOCK,TIMER Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TIMERLOCKKEY,Timer Lock Key"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 10. "CDTI2PEN,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 9. "CDTI1PEN,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "CDTI0PEN,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. "CC3PEN,CC Channel 3 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CC2PEN,CC Channel 2 Pin Enable" "0,1"
|
|
bitfld.long 0x00 1. "CC1PEN,CC Channel 1 Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CC0PEN,CC Channel 0 Pin Enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. "CC3LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
bitfld.long 0x00 16.--21. "CC2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "CC1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
bitfld.long 0x00 0.--5. "CC0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
|
|
bitfld.long 0x00 16.--21. "CDTI2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
|
|
bitfld.long 0x00 8.--13. "CDTI1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--5. "CDTI0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CC0_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
|
|
bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CC0_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "CC0_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CC0_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
|
|
bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "CC1_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
|
|
rgroup.long 0x78++0x03
|
|
line.long 0x00 "CC1_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
|
|
bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "CC2_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "CC2_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "CC2_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "CC3_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
|
|
bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
|
|
newline
|
|
bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
|
|
bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "CC3_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "CC3_CCVP,CC Channel Value Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "CC3_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "DTCTRL,DTI Control Register"
|
|
bitfld.long 0x00 24. "DTPRSEN,DTI PRS Source Enable" "0,1"
|
|
bitfld.long 0x00 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "DTAR,DTI Always Run" "0,1"
|
|
bitfld.long 0x00 4.--6. "DTPRSSEL,DTI PRS Source Channel Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 3. "DTCINV,DTI Complementary Output Invert" "0,1"
|
|
bitfld.long 0x00 2. "DTIPOL,DTI Inactive Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DTDAS,DTI Automatic Start-up Functionality" "0,1"
|
|
bitfld.long 0x00 0. "DTEN,DTI Enable" "0,1"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "DTTIME,DTI Time Control Register"
|
|
bitfld.long 0x00 16.--21. "DTFALLT,DTI Fall-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "DTRISET,DTI Rise-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DTPRESC,DTI Prescaler Setting" "0: The HFPERCLK is undivided,1: The HFPERCLK is divided by 2,2: The HFPERCLK is divided by 4,3: The HFPERCLK is divided by 8,4: The HFPERCLK is divided by 16,5: The HFPERCLK is divided by 32,6: The HFPERCLK is divided by 64,7: The HFPERCLK is divided by 128,8: The HFPERCLK is divided by 256,9: The HFPERCLK is divided by 512,10: The HFPERCLK is divided by 1024,?..."
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "DTFC,DTI Fault Configuration Register"
|
|
bitfld.long 0x00 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
|
|
bitfld.long 0x00 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
|
bitfld.long 0x00 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
|
|
bitfld.long 0x00 8.--10. "DTPRS1FSEL,DTI PRS Fault Source 1 Select" "0: PRS Channel 0 selected as fault source 1,1: PRS Channel 1 selected as fault source 1,2: PRS Channel 2 selected as fault source 1,3: PRS Channel 3 selected as fault source 1,4: PRS Channel 4 selected as fault source 1,5: PRS Channel 5 selected as fault source 1,6: PRS Channel 6 selected as fault source 1,7: PRS Channel 7 selected as fault source 1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "DTPRS0FSEL,DTI PRS Fault Source 0 Select" "0: PRS Channel 0 selected as fault source 0,1: PRS Channel 1 selected as fault source 1,2: PRS Channel 2 selected as fault source 2,3: PRS Channel 3 selected as fault source 3,4: PRS Channel 4 selected as fault source 4,5: PRS Channel 5 selected as fault source 5,6: PRS Channel 6 selected as fault source 6,7: PRS Channel 7 selected as fault source 7"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x00 5. "DTOGCDTI2EN,DTI CDTI2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 4. "DTOGCDTI1EN,DTI CDTI1 Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DTOGCDTI0EN,DTI CDTI0 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 2. "DTOGCC2EN,DTI CC2 Output Generation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DTOGCC1EN,DTI CC1 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 0. "DTOGCC0EN,DTI CC0 Output Generation Enable" "0,1"
|
|
rgroup.long 0xB0++0x03
|
|
line.long 0x00 "DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
bitfld.long 0x00 2. "DTDBGF,DTI Debugger Fault" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
bitfld.long 0x00 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xB4++0x03
|
|
line.long 0x00 "DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. "TLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
bitfld.long 0x00 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
bitfld.long 0x00 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,DTI Lock Key"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "WTIMER (WTIMER0)"
|
|
repeat 2. (list 0. 1.) (list ad:0x4001A000 ad:0x4001A400)
|
|
tree "WTIMER$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 29. "RSSCOIST,Reload-Start Sets Compare Output Initial State" "0,1"
|
|
bitfld.long 0x00 28. "ATI,Always Track Inputs" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--27. "PRESC,Prescaler Setting" "0: The HFPERCLK is undivided,1: The HFPERCLK is divided by 2,2: The HFPERCLK is divided by 4,3: The HFPERCLK is divided by 8,4: The HFPERCLK is divided by 16,5: The HFPERCLK is divided by 32,6: The HFPERCLK is divided by 64,7: The HFPERCLK is divided by 128,8: The HFPERCLK is divided by 256,9: The HFPERCLK is divided by 512,10: The HFPERCLK is divided by 1024,?..."
|
|
bitfld.long 0x00 16.--17. "CLKSEL,Clock Source Select" "0: Prescaled HFPERCLK,1: Compare/Capture Channel 1 Input,2: Timer is clocked by underflow(down-count) or..,?..."
|
|
newline
|
|
bitfld.long 0x00 14. "DISSYNCOUT,Disable Timer From Start/Stop/Reload Other Synchronized Timers" "0,1"
|
|
bitfld.long 0x00 13. "X2CNT,2x Count Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "FALLA,Timer Falling Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
bitfld.long 0x00 8.--9. "RISEA,Timer Rising Input Edge Action" "0: No action,1: Start counter without reload,2: Stop counter without reload,3: Reload and start counter"
|
|
newline
|
|
bitfld.long 0x00 7. "DMACLRACT,DMA Request Clear on Active" "0,1"
|
|
bitfld.long 0x00 6. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "QDM,Quadrature Decoder Mode Selection" "0,1"
|
|
bitfld.long 0x00 4. "OSMEN,One-shot Mode Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "SYNC,Timer Start/Stop/Reload Synchronization" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,Timer Mode" "0: Up-count mode,1: Down-count mode,2: Up/down-count mode,3: Quadrature decoder mode"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. "STOP,Stop Timer" "0,1"
|
|
bitfld.long 0x00 0. "START,Start Timer" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 27. "CCPOL3,CC3 Polarity" "0,1"
|
|
bitfld.long 0x00 26. "CCPOL2,CC2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "CCPOL1,CC1 Polarity" "0,1"
|
|
bitfld.long 0x00 24. "CCPOL0,CC0 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "ICV3,CC3 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 18. "ICV2,CC2 Input Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "ICV1,CC1 Input Capture Valid" "0,1"
|
|
bitfld.long 0x00 16. "ICV0,CC0 Input Capture Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CCVBV3,CC3 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 10. "CCVBV2,CC2 CCVB Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CCVBV1,CC1 CCVB Valid" "0,1"
|
|
bitfld.long 0x00 8. "CCVBV0,CC0 CCVB Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "TOPBV,TOPB Valid" "0,1"
|
|
bitfld.long 0x00 1. "DIR,Direction" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RUNNING,Running" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 11. "ICBOF3,CC Channel 3 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,CC Channel 2 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,CC Channel 1 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,CC Channel 0 Input Capture Buffer Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,CC Channel 3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,CC Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,CC Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,CC Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,Direction Change Detect Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "UF,Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 11. "ICBOF3,Set ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,Set ICBOF2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,Set ICBOF1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,Set ICBOF0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,Set CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,Set CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,Set CC0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DIRCHG,Set DIRCHG Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "UF,Set UF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 11. "ICBOF3,Clear ICBOF3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,Clear ICBOF2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "ICBOF1,Clear ICBOF1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,Clear ICBOF0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CC3,Clear CC3 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 6. "CC2,Clear CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CC1,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "CC0,Clear CC0 Interrupt Flag" "0,1"
|
|
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bitfld.long 0x00 2. "DIRCHG,Clear DIRCHG Interrupt Flag" "0,1"
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|
bitfld.long 0x00 1. "UF,Clear UF Interrupt Flag" "0,1"
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|
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bitfld.long 0x00 0. "OF,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x18++0x03
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|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 11. "ICBOF3,ICBOF3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "ICBOF2,ICBOF2 Interrupt Enable" "0,1"
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|
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|
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bitfld.long 0x00 9. "ICBOF1,ICBOF1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "ICBOF0,ICBOF0 Interrupt Enable" "0,1"
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|
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|
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bitfld.long 0x00 7. "CC3,CC3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 6. "CC2,CC2 Interrupt Enable" "0,1"
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|
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|
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bitfld.long 0x00 5. "CC1,CC1 Interrupt Enable" "0,1"
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|
bitfld.long 0x00 4. "CC0,CC0 Interrupt Enable" "0,1"
|
|
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|
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bitfld.long 0x00 2. "DIRCHG,DIRCHG Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "UF,UF Interrupt Enable" "0,1"
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bitfld.long 0x00 0. "OF,OF Interrupt Enable" "0,1"
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|
group.long 0x1C++0x03
|
|
line.long 0x00 "TOP,Counter Top Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "TOP,Counter Top Value"
|
|
group.long 0x20++0x03
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|
line.long 0x00 "TOPB,Counter Top Value Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "TOPB,Counter Top Value Buffer"
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|
group.long 0x24++0x03
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|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,Counter Value"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "LOCK,TIMER Configuration Lock Register"
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|
hexmask.long.word 0x00 0.--15. 1. "TIMERLOCKKEY,Timer Lock Key"
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group.long 0x30++0x03
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line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
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|
bitfld.long 0x00 10. "CDTI2PEN,CC Channel 2 Complementary Dead-Time Insertion Pin Enable" "0,1"
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|
bitfld.long 0x00 9. "CDTI1PEN,CC Channel 1 Complementary Dead-Time Insertion Pin Enable" "0,1"
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bitfld.long 0x00 8. "CDTI0PEN,CC Channel 0 Complementary Dead-Time Insertion Pin Enable" "0,1"
|
|
bitfld.long 0x00 3. "CC3PEN,CC Channel 3 Pin Enable" "0,1"
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bitfld.long 0x00 2. "CC2PEN,CC Channel 2 Pin Enable" "0,1"
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|
bitfld.long 0x00 1. "CC1PEN,CC Channel 1 Pin Enable" "0,1"
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|
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bitfld.long 0x00 0. "CC0PEN,CC Channel 0 Pin Enable" "0,1"
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|
group.long 0x34++0x03
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|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
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|
bitfld.long 0x00 24.--29. "CC3LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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|
bitfld.long 0x00 16.--21. "CC2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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bitfld.long 0x00 8.--13. "CC1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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|
bitfld.long 0x00 0.--5. "CC0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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|
group.long 0x3C++0x03
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line.long 0x00 "ROUTELOC2,I/O Routing Location Register"
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bitfld.long 0x00 16.--21. "CDTI2LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
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|
bitfld.long 0x00 8.--13. "CDTI1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
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bitfld.long 0x00 0.--5. "CDTI0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,?..."
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group.long 0x60++0x03
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line.long 0x00 "CC0_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
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bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
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bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
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bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
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bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
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bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
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|
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bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
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bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
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bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
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bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
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|
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bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
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bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
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group.long 0x64++0x03
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line.long 0x00 "CC0_CCV,CC Channel Value Register"
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hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
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rgroup.long 0x68++0x03
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line.long 0x00 "CC0_CCVP,CC Channel Value Peek Register"
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hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
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group.long 0x6C++0x03
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line.long 0x00 "CC0_CCVB,CC Channel Buffer Register"
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hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
|
|
group.long 0x70++0x03
|
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line.long 0x00 "CC1_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
|
|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
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|
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bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
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bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
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|
newline
|
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bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
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bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
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|
newline
|
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bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
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bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
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|
newline
|
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bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
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|
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|
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bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
|
|
group.long 0x74++0x03
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line.long 0x00 "CC1_CCV,CC Channel Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
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rgroup.long 0x78++0x03
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line.long 0x00 "CC1_CCVP,CC Channel Value Peek Register"
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|
hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
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group.long 0x7C++0x03
|
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line.long 0x00 "CC1_CCVB,CC Channel Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
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group.long 0x80++0x03
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line.long 0x00 "CC2_CTRL,CC Channel Control Register"
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|
bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
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|
bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
|
|
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|
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bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
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|
bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
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newline
|
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bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
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bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
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|
newline
|
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bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
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bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
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|
newline
|
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bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
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|
bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
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newline
|
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bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
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|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
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group.long 0x84++0x03
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line.long 0x00 "CC2_CCV,CC Channel Value Register"
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hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
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rgroup.long 0x88++0x03
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line.long 0x00 "CC2_CCVP,CC Channel Value Peek Register"
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hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
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group.long 0x8C++0x03
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line.long 0x00 "CC2_CCVB,CC Channel Buffer Register"
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hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
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group.long 0x90++0x03
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line.long 0x00 "CC3_CTRL,CC Channel Control Register"
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bitfld.long 0x00 30. "FILT,Digital Filter" "0,1"
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bitfld.long 0x00 29. "INSEL,Input Selection" "0,1"
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newline
|
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bitfld.long 0x00 28. "PRSCONF,PRS Configuration" "0,1"
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bitfld.long 0x00 26.--27. "ICEVCTRL,Input Capture Event Control" "0: PRS output pulse and interrupt flag set on..,1: PRS output pulse and interrupt flag set on..,2: PRS output pulse and interrupt flag set on..,3: PRS output pulse and interrupt flag set on.."
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newline
|
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bitfld.long 0x00 24.--25. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
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bitfld.long 0x00 16.--18. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
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newline
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bitfld.long 0x00 12.--13. "CUFOA,Counter Underflow Output Action" "0: No action on counter underflow,1: Toggle output on counter underflow,2: Clear output on counter underflow,3: Set output on counter underflow"
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bitfld.long 0x00 10.--11. "COFOA,Counter Overflow Output Action" "0: No action on counter overflow,1: Toggle output on counter overflow,2: Clear output on counter overflow,3: Set output on counter overflow"
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newline
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bitfld.long 0x00 8.--9. "CMOA,Compare Match Output Action" "0: No action on compare match,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
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bitfld.long 0x00 4. "COIST,Compare Output Initial State" "0,1"
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newline
|
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bitfld.long 0x00 2. "OUTINV,Output Invert" "0,1"
|
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bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,3: Pulse-Width Modulation"
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group.long 0x94++0x03
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line.long 0x00 "CC3_CCV,CC Channel Value Register"
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hexmask.long 0x00 0.--31. 1. "CCV,CC Channel Value"
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rgroup.long 0x98++0x03
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line.long 0x00 "CC3_CCVP,CC Channel Value Peek Register"
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hexmask.long 0x00 0.--31. 1. "CCVP,CC Channel Value Peek"
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group.long 0x9C++0x03
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line.long 0x00 "CC3_CCVB,CC Channel Buffer Register"
|
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hexmask.long 0x00 0.--31. 1. "CCVB,CC Channel Value Buffer"
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group.long 0xA0++0x03
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line.long 0x00 "DTCTRL,DTI Control Register"
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bitfld.long 0x00 24. "DTPRSEN,DTI PRS Source Enable" "0,1"
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bitfld.long 0x00 10. "DTFATS,DTI Fault Action on Timer Stop" "0,1"
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newline
|
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bitfld.long 0x00 9. "DTAR,DTI Always Run" "0,1"
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bitfld.long 0x00 4.--6. "DTPRSSEL,DTI PRS Source Channel Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
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newline
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bitfld.long 0x00 3. "DTCINV,DTI Complementary Output Invert" "0,1"
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bitfld.long 0x00 2. "DTIPOL,DTI Inactive Polarity" "0,1"
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newline
|
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bitfld.long 0x00 1. "DTDAS,DTI Automatic Start-up Functionality" "0,1"
|
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bitfld.long 0x00 0. "DTEN,DTI Enable" "0,1"
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group.long 0xA4++0x03
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line.long 0x00 "DTTIME,DTI Time Control Register"
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|
bitfld.long 0x00 16.--21. "DTFALLT,DTI Fall-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 8.--13. "DTRISET,DTI Rise-time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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newline
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bitfld.long 0x00 0.--3. "DTPRESC,DTI Prescaler Setting" "0: The HFPERCLK is undivided,1: The HFPERCLK is divided by 2,2: The HFPERCLK is divided by 4,3: The HFPERCLK is divided by 8,4: The HFPERCLK is divided by 16,5: The HFPERCLK is divided by 32,6: The HFPERCLK is divided by 64,7: The HFPERCLK is divided by 128,8: The HFPERCLK is divided by 256,9: The HFPERCLK is divided by 512,10: The HFPERCLK is divided by 1024,?..."
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group.long 0xA8++0x03
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line.long 0x00 "DTFC,DTI Fault Configuration Register"
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bitfld.long 0x00 27. "DTLOCKUPFEN,DTI Lockup Fault Enable" "0,1"
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bitfld.long 0x00 26. "DTDBGFEN,DTI Debugger Fault Enable" "0,1"
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newline
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bitfld.long 0x00 25. "DTPRS1FEN,DTI PRS 1 Fault Enable" "0,1"
|
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bitfld.long 0x00 24. "DTPRS0FEN,DTI PRS 0 Fault Enable" "0,1"
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newline
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bitfld.long 0x00 16.--17. "DTFA,DTI Fault Action" "0: No action on fault,1: Set outputs inactive,2: Clear outputs,3: Tristate outputs"
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bitfld.long 0x00 8.--10. "DTPRS1FSEL,DTI PRS Fault Source 1 Select" "0: PRS Channel 0 selected as fault source 1,1: PRS Channel 1 selected as fault source 1,2: PRS Channel 2 selected as fault source 1,3: PRS Channel 3 selected as fault source 1,4: PRS Channel 4 selected as fault source 1,5: PRS Channel 5 selected as fault source 1,6: PRS Channel 6 selected as fault source 1,7: PRS Channel 7 selected as fault source 1"
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newline
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bitfld.long 0x00 0.--2. "DTPRS0FSEL,DTI PRS Fault Source 0 Select" "0: PRS Channel 0 selected as fault source 0,1: PRS Channel 1 selected as fault source 1,2: PRS Channel 2 selected as fault source 2,3: PRS Channel 3 selected as fault source 3,4: PRS Channel 4 selected as fault source 4,5: PRS Channel 5 selected as fault source 5,6: PRS Channel 6 selected as fault source 6,7: PRS Channel 7 selected as fault source 7"
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group.long 0xAC++0x03
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line.long 0x00 "DTOGEN,DTI Output Generation Enable Register"
|
|
bitfld.long 0x00 5. "DTOGCDTI2EN,DTI CDTI2 Output Generation Enable" "0,1"
|
|
bitfld.long 0x00 4. "DTOGCDTI1EN,DTI CDTI1 Output Generation Enable" "0,1"
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newline
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bitfld.long 0x00 3. "DTOGCDTI0EN,DTI CDTI0 Output Generation Enable" "0,1"
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|
bitfld.long 0x00 2. "DTOGCC2EN,DTI CC2 Output Generation Enable" "0,1"
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newline
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bitfld.long 0x00 1. "DTOGCC1EN,DTI CC1 Output Generation Enable" "0,1"
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bitfld.long 0x00 0. "DTOGCC0EN,DTI CC0 Output Generation Enable" "0,1"
|
|
rgroup.long 0xB0++0x03
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line.long 0x00 "DTFAULT,DTI Fault Register"
|
|
bitfld.long 0x00 3. "DTLOCKUPF,DTI Lockup Fault" "0,1"
|
|
bitfld.long 0x00 2. "DTDBGF,DTI Debugger Fault" "0,1"
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|
newline
|
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bitfld.long 0x00 1. "DTPRS1F,DTI PRS 1 Fault" "0,1"
|
|
bitfld.long 0x00 0. "DTPRS0F,DTI PRS 0 Fault" "0,1"
|
|
wgroup.long 0xB4++0x03
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|
line.long 0x00 "DTFAULTC,DTI Fault Clear Register"
|
|
bitfld.long 0x00 3. "TLOCKUPFC,DTI Lockup Fault Clear" "0,1"
|
|
bitfld.long 0x00 2. "DTDBGFC,DTI Debugger Fault Clear" "0,1"
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|
newline
|
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bitfld.long 0x00 1. "DTPRS1FC,DTI PRS1 Fault Clear" "0,1"
|
|
bitfld.long 0x00 0. "DTPRS0FC,DTI PRS0 Fault Clear" "0,1"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "DTLOCK,DTI Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,DTI Lock Key"
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tree.end
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repeat.end
|
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tree.end
|
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tree "USART (USART0)"
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repeat 4. (list 0. 1. 2. 3.) (list ad:0x40010000 ad:0x40010400 ad:0x40010800 ad:0x40010C00)
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tree "USART$1"
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base $2
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group.long 0x00++0x03
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line.long 0x00 "CTRL,Control Register"
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bitfld.long 0x00 31. "SMSDELAY,Synchronous Master Sample Delay" "0,1"
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bitfld.long 0x00 30. "MVDIS,Majority Vote Disable" "0,1"
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newline
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bitfld.long 0x00 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
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bitfld.long 0x00 28. "BYTESWAP,Byteswap in Double Accesses" "0,1"
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newline
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bitfld.long 0x00 25. "SSSEARLY,Synchronous Slave Setup Early" "0,1"
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bitfld.long 0x00 24. "ERRSTX,Disable TX on Error" "0,1"
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newline
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bitfld.long 0x00 23. "ERRSRX,Disable RX on Error" "0,1"
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bitfld.long 0x00 22. "ERRSDMA,Halt DMA on Error" "0,1"
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newline
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bitfld.long 0x00 21. "BIT8DV,Bit 8 Default Value" "0,1"
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bitfld.long 0x00 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
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newline
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bitfld.long 0x00 19. "SCRETRANS,SmartCard Retransmit" "0,1"
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bitfld.long 0x00 18. "SCMODE,SmartCard Mode" "0,1"
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newline
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bitfld.long 0x00 17. "AUTOTRI,Automatic TX Tristate" "0,1"
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bitfld.long 0x00 16. "AUTOCS,Automatic Chip Select" "0,1"
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newline
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bitfld.long 0x00 15. "CSINV,Chip Select Invert" "0,1"
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bitfld.long 0x00 14. "TXINV,Transmitter Output Invert" "0,1"
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newline
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bitfld.long 0x00 13. "RXINV,Receiver Input Invert" "0,1"
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bitfld.long 0x00 12. "TXBIL,TX Buffer Interrupt Level" "0,1"
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newline
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bitfld.long 0x00 11. "CSMA,Action on Slave-Select in Master Mode" "0,1"
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bitfld.long 0x00 10. "MSBF,Most Significant Bit First" "0,1"
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newline
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bitfld.long 0x00 9. "CLKPHA,Clock Edge for Setup/Sample" "0,1"
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bitfld.long 0x00 8. "CLKPOL,Clock Polarity" "0,1"
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newline
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bitfld.long 0x00 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
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bitfld.long 0x00 4. "MPAB,Multi-Processor Address-Bit" "0,1"
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newline
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bitfld.long 0x00 3. "MPM,Multi-Processor Mode" "0,1"
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bitfld.long 0x00 2. "CCEN,Collision Check Enable" "0,1"
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newline
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bitfld.long 0x00 1. "LOOPBK,Loopback Enable" "0,1"
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bitfld.long 0x00 0. "SYNC,USART Synchronous Mode" "0,1"
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group.long 0x04++0x03
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line.long 0x00 "FRAME,USART Frame Format Register"
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bitfld.long 0x00 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits"
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bitfld.long 0x00 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used,3: Odd parity is used"
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newline
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bitfld.long 0x00 0.--3. "DATABITS,Data-Bit Mode" "?,1: Each frame contains 4 data bits,2: Each frame contains 5 data bits,3: Each frame contains 6 data bits,4: Each frame contains 7 data bits,5: Each frame contains 8 data bits,6: Each frame contains 9 data bits,7: Each frame contains 10 data bits,8: Each frame contains 11 data bits,9: Each frame contains 12 data bits,10: Each frame contains 13 data bits,11: Each frame contains 14 data bits,12: Each frame contains 15 data bits,13: Each frame contains 16 data bits,?..."
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group.long 0x08++0x03
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line.long 0x00 "TRIGCTRL,USART Trigger Control Register"
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bitfld.long 0x00 16.--18. "TSEL,Trigger PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
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bitfld.long 0x00 12. "RXATX2EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times" "0,1"
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newline
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bitfld.long 0x00 11. "RXATX1EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times" "0,1"
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bitfld.long 0x00 10. "RXATX0EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times" "0,1"
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newline
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bitfld.long 0x00 9. "TXARX2EN,Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL" "0,1"
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bitfld.long 0x00 8. "TXARX1EN,Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL" "0,1"
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newline
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bitfld.long 0x00 7. "TXARX0EN,Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL" "0,1"
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bitfld.long 0x00 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
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newline
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bitfld.long 0x00 5. "TXTEN,Transmit Trigger Enable" "0,1"
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bitfld.long 0x00 4. "RXTEN,Receive Trigger Enable" "0,1"
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wgroup.long 0x0C++0x03
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line.long 0x00 "CMD,Command Register"
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bitfld.long 0x00 11. "CLEARRX,Clear RX" "0,1"
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bitfld.long 0x00 10. "CLEARTX,Clear TX" "0,1"
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newline
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bitfld.long 0x00 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
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bitfld.long 0x00 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
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newline
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bitfld.long 0x00 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
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bitfld.long 0x00 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
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newline
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bitfld.long 0x00 5. "MASTERDIS,Master Disable" "0,1"
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bitfld.long 0x00 4. "MASTEREN,Master Enable" "0,1"
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newline
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bitfld.long 0x00 3. "TXDIS,Transmitter Disable" "0,1"
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bitfld.long 0x00 2. "TXEN,Transmitter Enable" "0,1"
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newline
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bitfld.long 0x00 1. "RXDIS,Receiver Disable" "0,1"
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bitfld.long 0x00 0. "RXEN,Receiver Enable" "0,1"
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rgroup.long 0x10++0x03
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line.long 0x00 "STATUS,USART Status Register"
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bitfld.long 0x00 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
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bitfld.long 0x00 14. "TIMERRESTARTED,The USART Timer Restarted Itself" "0,1"
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newline
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bitfld.long 0x00 13. "TXIDLE,TX Idle" "0,1"
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bitfld.long 0x00 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
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newline
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bitfld.long 0x00 11. "RXDATAVRIGHT,RX Data Right" "0,1"
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bitfld.long 0x00 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
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newline
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bitfld.long 0x00 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
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bitfld.long 0x00 8. "RXFULL,RX FIFO Full" "0,1"
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newline
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bitfld.long 0x00 7. "RXDATAV,RX Data Valid" "0,1"
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bitfld.long 0x00 6. "TXBL,TX Buffer Level" "0,1"
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newline
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bitfld.long 0x00 5. "TXC,TX Complete" "0,1"
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bitfld.long 0x00 4. "TXTRI,Transmitter Tristated" "0,1"
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newline
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bitfld.long 0x00 3. "RXBLOCK,Block Incoming Data" "0,1"
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bitfld.long 0x00 2. "MASTER,SPI Master Mode" "0,1"
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newline
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bitfld.long 0x00 1. "TXENS,Transmitter Enable Status" "0,1"
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bitfld.long 0x00 0. "RXENS,Receiver Enable Status" "0,1"
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group.long 0x14++0x03
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line.long 0x00 "CLKDIV,Clock Control Register"
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bitfld.long 0x00 31. "AUTOBAUDEN,AUTOBAUD Detection Enable" "0,1"
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hexmask.long.tbyte 0x00 3.--22. 1. "DIV,Fractional Clock Divider"
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rgroup.long 0x18++0x03
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line.long 0x00 "RXDATAX,RX Buffer Data Extended Register"
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bitfld.long 0x00 15. "FERR,Data Framing Error" "0,1"
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bitfld.long 0x00 14. "PERR,Data Parity Error" "0,1"
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newline
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hexmask.long.word 0x00 0.--8. 1. "RXDATA,RX Data"
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rgroup.long 0x1C++0x03
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line.long 0x00 "RXDATA,RX Buffer Data Register"
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hexmask.long.byte 0x00 0.--7. 1. "RXDATA,RX Data"
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rgroup.long 0x20++0x03
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line.long 0x00 "RXDOUBLEX,RX Buffer Double Data Extended Register"
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bitfld.long 0x00 31. "FERR1,Data Framing Error 1" "0,1"
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bitfld.long 0x00 30. "PERR1,Data Parity Error 1" "0,1"
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newline
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hexmask.long.word 0x00 16.--24. 1. "RXDATA1,RX Data 1"
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bitfld.long 0x00 15. "FERR0,Data Framing Error 0" "0,1"
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newline
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bitfld.long 0x00 14. "PERR0,Data Parity Error 0" "0,1"
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hexmask.long.word 0x00 0.--8. 1. "RXDATA0,RX Data 0"
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rgroup.long 0x24++0x03
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line.long 0x00 "RXDOUBLE,RX FIFO Double Data Register"
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hexmask.long.byte 0x00 8.--15. 1. "RXDATA1,RX Data 1"
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hexmask.long.byte 0x00 0.--7. 1. "RXDATA0,RX Data 0"
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rgroup.long 0x28++0x03
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line.long 0x00 "RXDATAXP,RX Buffer Data Extended Peek Register"
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bitfld.long 0x00 15. "FERRP,Data Framing Error Peek" "0,1"
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bitfld.long 0x00 14. "PERRP,Data Parity Error Peek" "0,1"
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newline
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hexmask.long.word 0x00 0.--8. 1. "RXDATAP,RX Data Peek"
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rgroup.long 0x2C++0x03
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line.long 0x00 "RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
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bitfld.long 0x00 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
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bitfld.long 0x00 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
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newline
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hexmask.long.word 0x00 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
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bitfld.long 0x00 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
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newline
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bitfld.long 0x00 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
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hexmask.long.word 0x00 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
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group.long 0x30++0x03
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line.long 0x00 "TXDATAX,TX Buffer Data Extended Register"
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bitfld.long 0x00 15. "RXENAT,Enable RX After Transmission" "0,1"
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bitfld.long 0x00 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
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newline
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bitfld.long 0x00 13. "TXBREAK,Transmit Data as Break" "0,1"
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bitfld.long 0x00 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
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newline
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bitfld.long 0x00 11. "UBRXAT,Unblock RX After Transmission" "0,1"
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hexmask.long.word 0x00 0.--8. 1. "TXDATAX,TX Data"
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group.long 0x34++0x03
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line.long 0x00 "TXDATA,TX Buffer Data Register"
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hexmask.long.byte 0x00 0.--7. 1. "TXDATA,TX Data"
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group.long 0x38++0x03
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line.long 0x00 "TXDOUBLEX,TX Buffer Double Data Extended Register"
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bitfld.long 0x00 31. "RXENAT1,Enable RX After Transmission" "0,1"
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bitfld.long 0x00 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
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newline
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bitfld.long 0x00 29. "TXBREAK1,Transmit Data as Break" "0,1"
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bitfld.long 0x00 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
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newline
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bitfld.long 0x00 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
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hexmask.long.word 0x00 16.--24. 1. "TXDATA1,TX Data"
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newline
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bitfld.long 0x00 15. "RXENAT0,Enable RX After Transmission" "0,1"
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bitfld.long 0x00 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
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newline
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bitfld.long 0x00 13. "TXBREAK0,Transmit Data as Break" "0,1"
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bitfld.long 0x00 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
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newline
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bitfld.long 0x00 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
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hexmask.long.word 0x00 0.--8. 1. "TXDATA0,TX Data"
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group.long 0x3C++0x03
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line.long 0x00 "TXDOUBLE,TX Buffer Double Data Register"
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hexmask.long.byte 0x00 8.--15. 1. "TXDATA1,TX Data"
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hexmask.long.byte 0x00 0.--7. 1. "TXDATA0,TX Data"
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rgroup.long 0x40++0x03
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line.long 0x00 "IF,Interrupt Flag Register"
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bitfld.long 0x00 16. "TCMP2,Timer Comparator 2 Interrupt Flag" "0,1"
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bitfld.long 0x00 15. "TCMP1,Timer Comparator 1 Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 14. "TCMP0,Timer Comparator 0 Interrupt Flag" "0,1"
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bitfld.long 0x00 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
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bitfld.long 0x00 11. "SSM,Slave-Select in Master Mode Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 10. "MPAF,Multi-Processor Address Frame Interrupt Flag" "0,1"
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bitfld.long 0x00 9. "FERR,Framing Error Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 8. "PERR,Parity Error Interrupt Flag" "0,1"
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bitfld.long 0x00 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
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bitfld.long 0x00 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
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bitfld.long 0x00 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
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bitfld.long 0x00 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 0. "TXC,TX Complete Interrupt Flag" "0,1"
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wgroup.long 0x44++0x03
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line.long 0x00 "IFS,Interrupt Flag Set Register"
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bitfld.long 0x00 16. "TCMP2,Set TCMP2 Interrupt Flag" "0,1"
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bitfld.long 0x00 15. "TCMP1,Set TCMP1 Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 14. "TCMP0,Set TCMP0 Interrupt Flag" "0,1"
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bitfld.long 0x00 13. "TXIDLE,Set TXIDLE Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 12. "CCF,Set CCF Interrupt Flag" "0,1"
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bitfld.long 0x00 11. "SSM,Set SSM Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 10. "MPAF,Set MPAF Interrupt Flag" "0,1"
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bitfld.long 0x00 9. "FERR,Set FERR Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 8. "PERR,Set PERR Interrupt Flag" "0,1"
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bitfld.long 0x00 7. "TXUF,Set TXUF Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 6. "TXOF,Set TXOF Interrupt Flag" "0,1"
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bitfld.long 0x00 5. "RXUF,Set RXUF Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 4. "RXOF,Set RXOF Interrupt Flag" "0,1"
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bitfld.long 0x00 3. "RXFULL,Set RXFULL Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 0. "TXC,Set TXC Interrupt Flag" "0,1"
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wgroup.long 0x48++0x03
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line.long 0x00 "IFC,Interrupt Flag Clear Register"
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bitfld.long 0x00 16. "TCMP2,Clear TCMP2 Interrupt Flag" "0,1"
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bitfld.long 0x00 15. "TCMP1,Clear TCMP1 Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 14. "TCMP0,Clear TCMP0 Interrupt Flag" "0,1"
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bitfld.long 0x00 13. "TXIDLE,Clear TXIDLE Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 12. "CCF,Clear CCF Interrupt Flag" "0,1"
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bitfld.long 0x00 11. "SSM,Clear SSM Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 10. "MPAF,Clear MPAF Interrupt Flag" "0,1"
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bitfld.long 0x00 9. "FERR,Clear FERR Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 8. "PERR,Clear PERR Interrupt Flag" "0,1"
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bitfld.long 0x00 7. "TXUF,Clear TXUF Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 6. "TXOF,Clear TXOF Interrupt Flag" "0,1"
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bitfld.long 0x00 5. "RXUF,Clear RXUF Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 4. "RXOF,Clear RXOF Interrupt Flag" "0,1"
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bitfld.long 0x00 3. "RXFULL,Clear RXFULL Interrupt Flag" "0,1"
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newline
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bitfld.long 0x00 0. "TXC,Clear TXC Interrupt Flag" "0,1"
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group.long 0x4C++0x03
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line.long 0x00 "IEN,Interrupt Enable Register"
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bitfld.long 0x00 16. "TCMP2,TCMP2 Interrupt Enable" "0,1"
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bitfld.long 0x00 15. "TCMP1,TCMP1 Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 14. "TCMP0,TCMP0 Interrupt Enable" "0,1"
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bitfld.long 0x00 13. "TXIDLE,TXIDLE Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 12. "CCF,CCF Interrupt Enable" "0,1"
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bitfld.long 0x00 11. "SSM,SSM Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 10. "MPAF,MPAF Interrupt Enable" "0,1"
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bitfld.long 0x00 9. "FERR,FERR Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 8. "PERR,PERR Interrupt Enable" "0,1"
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bitfld.long 0x00 7. "TXUF,TXUF Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 6. "TXOF,TXOF Interrupt Enable" "0,1"
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bitfld.long 0x00 5. "RXUF,RXUF Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 4. "RXOF,RXOF Interrupt Enable" "0,1"
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bitfld.long 0x00 3. "RXFULL,RXFULL Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 2. "RXDATAV,RXDATAV Interrupt Enable" "0,1"
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bitfld.long 0x00 1. "TXBL,TXBL Interrupt Enable" "0,1"
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newline
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bitfld.long 0x00 0. "TXC,TXC Interrupt Enable" "0,1"
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group.long 0x50++0x03
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line.long 0x00 "IRCTRL,IrDA Control Register"
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bitfld.long 0x00 8.--10. "IRPRSSEL,IrDA PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
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bitfld.long 0x00 7. "IRPRSEN,IrDA PRS Channel Enable" "0,1"
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newline
|
|
bitfld.long 0x00 3. "IRFILT,IrDA RX Filter" "0,1"
|
|
bitfld.long 0x00 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8.."
|
|
newline
|
|
bitfld.long 0x00 0. "IREN,Enable IrDA Module" "0,1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "INPUT,USART Input Register"
|
|
bitfld.long 0x00 15. "CLKPRS,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "CLKPRSSEL,CLK PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
newline
|
|
bitfld.long 0x00 7. "RXPRS,PRS RX Enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "RXPRSSEL,RX PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0x00 4. "DELAY,Delay on I2S Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DMASPLIT,Separate DMA Request for Left/Right Data" "0,1"
|
|
bitfld.long 0x00 2. "JUSTIFY,Justification of I2S Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0x00 0. "EN,Enable I2S Mode" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TIMING,Timing Register"
|
|
bitfld.long 0x00 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end..,2: CS is asserted for 2 baud-times after the end..,3: CS is asserted for 3 baud-times after the end..,4: CS is asserted for 7 baud-times after the end..,5: CS is asserted after the end of transmission..,6: CS is asserted after the end of transmission..,7: CS is asserted after the end of transmission.."
|
|
bitfld.long 0x00 24.--26. "ICS,Inter-character Spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start..,2: Create a space of 2 baud-times before start..,3: Create a space of 3 baud-times before start..,4: Create a space of 7 baud-times before start..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x00 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start..,2: CS is asserted for 2 baud-times before start..,3: CS is asserted for 3 baud-times before start..,4: CS is asserted for 7 baud-times before start..,5: CS is asserted before the start of..,6: CS is asserted before the start of..,7: CS is asserted before the start of.."
|
|
bitfld.long 0x00 16.--18. "TXDELAY,TX Frame Start Delay" "0: Disable - TXDELAY in USARTn_CTRL can be used..,1: Start of transmission is delayed for 1..,2: Start of transmission is delayed for 2..,3: Start of transmission is delayed for 3..,4: Start of transmission is delayed for 7..,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CTRLX,Control Register Extended"
|
|
bitfld.long 0x00 3. "RTSINV,RTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 2. "CTSEN,CTS Function Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CTSINV,CTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 0. "DBGHALT,Debug Halt" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TIMECMP0,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP0" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 0" "0: Comparator 0 is disabled when the counter..,1: Comparator 0 is disabled at the start of..,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end..,2: Comparator 0 and timer are started at TX..,3: Comparator 0 and timer are started at RX..,4: Comparator 0 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 0"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TIMECMP1,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP1" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 1" "0: Comparator 1 is disabled when the counter..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end..,2: Comparator 1 and timer are started at TX..,3: Comparator 1 and timer are started at RX..,4: Comparator 1 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TIMECMP2,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP2" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 2" "0: Comparator 2 is disabled when the counter..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end..,2: Comparator 2 and timer are started at TX..,3: Comparator 2 and timer are started at RX..,4: Comparator 2 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 2"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 5. "RTSPEN,RTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. "CTSPEN,CTS Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLKPEN,CLK Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "CSPEN,CS Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXPEN,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "RXPEN,RX Pin Enable" "0,1"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. "CLKLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 16.--21. "CSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "TXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 0.--5. "RXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. "RTSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 0.--5. "CTSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "UART0"
|
|
base ad:0x40014000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "SMSDELAY,Synchronous Master Sample Delay" "0,1"
|
|
bitfld.long 0x00 30. "MVDIS,Majority Vote Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "AUTOTX,Always Transmit When RX Not Full" "0,1"
|
|
bitfld.long 0x00 28. "BYTESWAP,Byteswap in Double Accesses" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "SSSEARLY,Synchronous Slave Setup Early" "0,1"
|
|
bitfld.long 0x00 24. "ERRSTX,Disable TX on Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "ERRSRX,Disable RX on Error" "0,1"
|
|
bitfld.long 0x00 22. "ERRSDMA,Halt DMA on Error" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
bitfld.long 0x00 20. "SKIPPERRF,Skip Parity Error Frames" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "SCRETRANS,SmartCard Retransmit" "0,1"
|
|
bitfld.long 0x00 18. "SCMODE,SmartCard Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "AUTOTRI,Automatic TX Tristate" "0,1"
|
|
bitfld.long 0x00 16. "AUTOCS,Automatic Chip Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "CSINV,Chip Select Invert" "0,1"
|
|
bitfld.long 0x00 14. "TXINV,Transmitter Output Invert" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "RXINV,Receiver Input Invert" "0,1"
|
|
bitfld.long 0x00 12. "TXBIL,TX Buffer Interrupt Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "CSMA,Action on Slave-Select in Master Mode" "0,1"
|
|
bitfld.long 0x00 10. "MSBF,Most Significant Bit First" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "CLKPHA,Clock Edge for Setup/Sample" "0,1"
|
|
bitfld.long 0x00 8. "CLKPOL,Clock Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5.--6. "OVS,Oversampling" "0: Regular UART mode with 16X oversampling in..,1: Double speed with 8X oversampling in..,2: 6X oversampling in asynchronous mode,3: Quadruple speed with 4X oversampling in.."
|
|
bitfld.long 0x00 4. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "MPM,Multi-Processor Mode" "0,1"
|
|
bitfld.long 0x00 2. "CCEN,Collision Check Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "LOOPBK,Loopback Enable" "0,1"
|
|
bitfld.long 0x00 0. "SYNC,USART Synchronous Mode" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FRAME,USART Frame Format Register"
|
|
bitfld.long 0x00 12.--13. "STOPBITS,Stop-Bit Mode" "0: The transmitter generates a half stop bit,1: One stop bit is generated and verified,2: The transmitter generates one and a half stop..,3: The transmitter generates two stop bits"
|
|
bitfld.long 0x00 8.--9. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used,3: Odd parity is used"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DATABITS,Data-Bit Mode" "?,1: Each frame contains 4 data bits,2: Each frame contains 5 data bits,3: Each frame contains 6 data bits,4: Each frame contains 7 data bits,5: Each frame contains 8 data bits,6: Each frame contains 9 data bits,7: Each frame contains 10 data bits,8: Each frame contains 11 data bits,9: Each frame contains 12 data bits,10: Each frame contains 13 data bits,11: Each frame contains 14 data bits,12: Each frame contains 15 data bits,13: Each frame contains 16 data bits,?..."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TRIGCTRL,USART Trigger Control Register"
|
|
bitfld.long 0x00 16.--18. "TSEL,Trigger PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
bitfld.long 0x00 12. "RXATX2EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "RXATX1EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times" "0,1"
|
|
bitfld.long 0x00 10. "RXATX0EN,Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TXARX2EN,Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL" "0,1"
|
|
bitfld.long 0x00 8. "TXARX1EN,Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TXARX0EN,Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL" "0,1"
|
|
bitfld.long 0x00 6. "AUTOTXTEN,AUTOTX Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TXTEN,Transmit Trigger Enable" "0,1"
|
|
bitfld.long 0x00 4. "RXTEN,Receive Trigger Enable" "0,1"
|
|
wgroup.long 0x0C++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 11. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x00 10. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TXTRIDIS,Transmitter Tristate Disable" "0,1"
|
|
bitfld.long 0x00 8. "TXTRIEN,Transmitter Tristate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x00 6. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "MASTERDIS,Master Disable" "0,1"
|
|
bitfld.long 0x00 4. "MASTEREN,Master Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x00 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x00 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS,USART Status Register"
|
|
bitfld.long 0x00 16.--17. "TXBUFCNT,TX Buffer Count" "0,1,2,3"
|
|
bitfld.long 0x00 14. "TIMERRESTARTED,The USART Timer Restarted Itself" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x00 12. "RXFULLRIGHT,RX Full of Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "RXDATAVRIGHT,RX Data Right" "0,1"
|
|
bitfld.long 0x00 10. "TXBSRIGHT,TX Buffer Expects Single Right Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "TXBDRIGHT,TX Buffer Expects Double Right Data" "0,1"
|
|
bitfld.long 0x00 8. "RXFULL,RX FIFO Full" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "RXDATAV,RX Data Valid" "0,1"
|
|
bitfld.long 0x00 6. "TXBL,TX Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TXC,TX Complete" "0,1"
|
|
bitfld.long 0x00 4. "TXTRI,Transmitter Tristated" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x00 2. "MASTER,SPI Master Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
bitfld.long 0x00 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
bitfld.long 0x00 31. "AUTOBAUDEN,AUTOBAUD Detection Enable" "0,1"
|
|
hexmask.long.tbyte 0x00 3.--22. 1. "DIV,Fractional Clock Divider"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RXDATAX,RX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. "FERR,Data Framing Error" "0,1"
|
|
bitfld.long 0x00 14. "PERR,Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATA,RX Data"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RXDATA,RX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATA,RX Data"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RXDOUBLEX,RX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. "FERR1,Data Framing Error 1" "0,1"
|
|
bitfld.long 0x00 30. "PERR1,Data Parity Error 1" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 16.--24. 1. "RXDATA1,RX Data 1"
|
|
bitfld.long 0x00 15. "FERR0,Data Framing Error 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PERR0,Data Parity Error 0" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATA0,RX Data 0"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RXDOUBLE,RX FIFO Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATA0,RX Data 0"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "RXDATAXP,RX Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. "FERRP,Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x00 14. "PERRP,Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "RXDOUBLEXP,RX Buffer Double Data Extended Peek Register"
|
|
bitfld.long 0x00 31. "FERRP1,Data Framing Error 1 Peek" "0,1"
|
|
bitfld.long 0x00 30. "PERRP1,Data Parity Error 1 Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 16.--24. 1. "RXDATAP1,RX Data 1 Peek"
|
|
bitfld.long 0x00 15. "FERRP0,Data Framing Error 0 Peek" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PERRP0,Data Parity Error 0 Peek" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATAP0,RX Data 0 Peek"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TXDATAX,TX Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. "TXDISAT,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "TXBREAK,Transmit Data as Break" "0,1"
|
|
bitfld.long 0x00 12. "TXTRIAT,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "UBRXAT,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "TXDATAX,TX Data"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TXDATA,TX Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXDATA,TX Data"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TXDOUBLEX,TX Buffer Double Data Extended Register"
|
|
bitfld.long 0x00 31. "RXENAT1,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 30. "TXDISAT1,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "TXBREAK1,Transmit Data as Break" "0,1"
|
|
bitfld.long 0x00 28. "TXTRIAT1,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "UBRXAT1,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 16.--24. 1. "TXDATA1,TX Data"
|
|
newline
|
|
bitfld.long 0x00 15. "RXENAT0,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. "TXDISAT0,Clear TXEN After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "TXBREAK0,Transmit Data as Break" "0,1"
|
|
bitfld.long 0x00 12. "TXTRIAT0,Set TXTRI After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "UBRXAT0,Unblock RX After Transmission" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "TXDATA0,TX Data"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TXDOUBLE,TX Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXDATA0,TX Data"
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 16. "TCMP2,Timer Comparator 2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "TCMP1,Timer Comparator 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TCMP0,Timer Comparator 0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "TXIDLE,TX Idle Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CCF,Collision Check Fail Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "SSM,Slave-Select in Master Mode Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "MPAF,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "TXUF,TX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXFULL,RX Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 16. "TCMP2,Set TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "TCMP1,Set TCMP1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TCMP0,Set TCMP0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "TXIDLE,Set TXIDLE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CCF,Set CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "SSM,Set SSM Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "MPAF,Set MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "FERR,Set FERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PERR,Set PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "TXUF,Set TXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXOF,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "RXUF,Set RXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXOF,Set RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXFULL,Set RXFULL Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x48++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 16. "TCMP2,Clear TCMP2 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "TCMP1,Clear TCMP1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TCMP0,Clear TCMP0 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "TXIDLE,Clear TXIDLE Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CCF,Clear CCF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "SSM,Clear SSM Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "MPAF,Clear MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "FERR,Clear FERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PERR,Clear PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "TXUF,Clear TXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXOF,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "RXUF,Clear RXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXOF,Clear RXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXFULL,Clear RXFULL Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 16. "TCMP2,TCMP2 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. "TCMP1,TCMP1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "TCMP0,TCMP0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "TXIDLE,TXIDLE Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CCF,CCF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "SSM,SSM Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "MPAF,MPAF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "FERR,FERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PERR,PERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "TXUF,TXUF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TXOF,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "RXUF,RXUF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXOF,RXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "RXFULL,RXFULL Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXDATAV,RXDATAV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "TXBL,TXBL Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,TXC Interrupt Enable" "0,1"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "IRCTRL,IrDA Control Register"
|
|
bitfld.long 0x00 8.--10. "IRPRSSEL,IrDA PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
bitfld.long 0x00 7. "IRPRSEN,IrDA PRS Channel Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "IRFILT,IrDA RX Filter" "0,1"
|
|
bitfld.long 0x00 1.--2. "IRPW,IrDA TX Pulse Width" "0: IrDA pulse width is 1/16 for OVS=0 and 1/8..,1: IrDA pulse width is 2/16 for OVS=0 and 2/8..,2: IrDA pulse width is 3/16 for OVS=0 and 3/8..,3: IrDA pulse width is 4/16 for OVS=0 and 4/8.."
|
|
newline
|
|
bitfld.long 0x00 0. "IREN,Enable IrDA Module" "0,1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "INPUT,USART Input Register"
|
|
bitfld.long 0x00 15. "CLKPRS,PRS CLK Enable" "0,1"
|
|
bitfld.long 0x00 8.--10. "CLKPRSSEL,CLK PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
newline
|
|
bitfld.long 0x00 7. "RXPRS,PRS RX Enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "RXPRSSEL,RX PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "I2SCTRL,I2S Control Register"
|
|
bitfld.long 0x00 8.--10. "FORMAT,I2S Word Format" "0: 32-bit word 32-bit data,1: 32-bit word 32-bit data with 8 lsb masked,2: 32-bit word 24-bit data,3: 32-bit word 16-bit data,4: 32-bit word 8-bit data,5: 16-bit word 16-bit data,6: 16-bit word 8-bit data,7: 8-bit word 8-bit data"
|
|
bitfld.long 0x00 4. "DELAY,Delay on I2S Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "DMASPLIT,Separate DMA Request for Left/Right Data" "0,1"
|
|
bitfld.long 0x00 2. "JUSTIFY,Justification of I2S Data" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MONO,Stero or Mono" "0,1"
|
|
bitfld.long 0x00 0. "EN,Enable I2S Mode" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TIMING,Timing Register"
|
|
bitfld.long 0x00 28.--30. "CSHOLD,Chip Select Hold" "0: Disable CS being asserted after the end of..,1: CS is asserted for 1 baud-times after the end..,2: CS is asserted for 2 baud-times after the end..,3: CS is asserted for 3 baud-times after the end..,4: CS is asserted for 7 baud-times after the end..,5: CS is asserted after the end of transmission..,6: CS is asserted after the end of transmission..,7: CS is asserted after the end of transmission.."
|
|
bitfld.long 0x00 24.--26. "ICS,Inter-character Spacing" "0: There is no space between charcters,1: Create a space of 1 baud-times before start..,2: Create a space of 2 baud-times before start..,3: Create a space of 3 baud-times before start..,4: Create a space of 7 baud-times before start..,5: Create a space of before the start of..,6: Create a space of before the start of..,7: Create a space of before the start of.."
|
|
newline
|
|
bitfld.long 0x00 20.--22. "CSSETUP,Chip Select Setup" "0: CS is not asserted before start of transmission,1: CS is asserted for 1 baud-times before start..,2: CS is asserted for 2 baud-times before start..,3: CS is asserted for 3 baud-times before start..,4: CS is asserted for 7 baud-times before start..,5: CS is asserted before the start of..,6: CS is asserted before the start of..,7: CS is asserted before the start of.."
|
|
bitfld.long 0x00 16.--18. "TXDELAY,TX Frame Start Delay" "0: Disable - TXDELAY in USARTn_CTRL can be used..,1: Start of transmission is delayed for 1..,2: Start of transmission is delayed for 2..,3: Start of transmission is delayed for 3..,4: Start of transmission is delayed for 7..,5: Start of transmission is delayed for TCMPVAL0..,6: Start of transmission is delayed for TCMPVAL1..,7: Start of transmission is delayed for TCMPVAL2.."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CTRLX,Control Register Extended"
|
|
bitfld.long 0x00 3. "RTSINV,RTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 2. "CTSEN,CTS Function Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CTSINV,CTS Pin Inversion" "0,1"
|
|
bitfld.long 0x00 0. "DBGHALT,Debug Halt" "0,1"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TIMECMP0,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP0" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 0" "0: Comparator 0 is disabled when the counter..,1: Comparator 0 is disabled at the start of..,2: Comparator 0 is disabled on RX going going..,3: Comparator 0 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 0 is disabled,1: Comparator 0 and timer are started at TX end..,2: Comparator 0 and timer are started at TX..,3: Comparator 0 and timer are started at RX..,4: Comparator 0 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 0"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TIMECMP1,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP1" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 1" "0: Comparator 1 is disabled when the counter..,1: Comparator 1 is disabled at TX start TX Engine,2: Comparator 1 is disabled on RX going going..,3: Comparator 1 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 1 is disabled,1: Comparator 1 and timer are started at TX end..,2: Comparator 1 and timer are started at TX..,3: Comparator 1 and timer are started at RX..,4: Comparator 1 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 1"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TIMECMP2,Used to Generate Interrupts and Various Delays"
|
|
bitfld.long 0x00 24. "RESTARTEN,Restart Timer on TCMP2" "0,1"
|
|
bitfld.long 0x00 20.--22. "TSTOP,Source Used to Disable Comparator 2" "0: Comparator 2 is disabled when the counter..,1: Comparator 2 is disabled at TX start TX Engine,2: Comparator 2 is disabled on RX going going..,3: Comparator 2 is disabled on RX going Inactive,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TSTART,Timer Start Source" "0: Comparator 2 is disabled,1: Comparator 2 and timer are started at TX end..,2: Comparator 2 and timer are started at TX..,3: Comparator 2 and timer are started at RX..,4: Comparator 2 and timer are started at RX end..,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. "TCMPVAL,Timer Comparator 2"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 5. "RTSPEN,RTS Pin Enable" "0,1"
|
|
bitfld.long 0x00 4. "CTSPEN,CTS Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CLKPEN,CLK Pin Enable" "0,1"
|
|
bitfld.long 0x00 2. "CSPEN,CS Pin Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "TXPEN,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "RXPEN,RX Pin Enable" "0,1"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 24.--29. "CLKLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 16.--21. "CSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--13. "TXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 0.--5. "RXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ROUTELOC1,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. "RTSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 0.--5. "CTSLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
tree.end
|
|
tree "LEUART0"
|
|
base ad:0x4006A000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 14.--15. "TXDELAY,TX Delay Transmission" "0: Frames are transmitted immediately,1: Transmission of new frames are delayed by a..,2: Transmission of new frames are delayed by two..,3: Transmission of new frames are delayed by.."
|
|
bitfld.long 0x00 13. "TXDMAWU,TX DMA Wakeup" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "RXDMAWU,RX DMA Wakeup" "0,1"
|
|
bitfld.long 0x00 11. "BIT8DV,Bit 8 Default Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "MPAB,Multi-Processor Address-Bit" "0,1"
|
|
bitfld.long 0x00 9. "MPM,Multi-Processor Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "SFUBRX,Start-Frame UnBlock RX" "0,1"
|
|
bitfld.long 0x00 7. "LOOPBK,Loopback Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ERRSDMA,Clear RX DMA on Error" "0,1"
|
|
bitfld.long 0x00 5. "INV,Invert Input and Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "STOPBITS,Stop-Bit Mode" "0,1"
|
|
bitfld.long 0x00 2.--3. "PARITY,Parity-Bit Mode" "0: Parity bits are not used,?,2: Even parity are used,3: Odd parity is used"
|
|
newline
|
|
bitfld.long 0x00 1. "DATABITS,Data-Bit Mode" "0,1"
|
|
bitfld.long 0x00 0. "AUTOTRI,Automatic Transmitter Tristate" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. "CLEARRX,Clear RX" "0,1"
|
|
bitfld.long 0x00 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "RXBLOCKDIS,Receiver Block Disable" "0,1"
|
|
bitfld.long 0x00 4. "RXBLOCKEN,Receiver Block Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "TXDIS,Transmitter Disable" "0,1"
|
|
bitfld.long 0x00 2. "TXEN,Transmitter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "RXDIS,Receiver Disable" "0,1"
|
|
bitfld.long 0x00 0. "RXEN,Receiver Enable" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 6. "TXIDLE,TX Idle" "0,1"
|
|
bitfld.long 0x00 5. "RXDATAV,RX Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TXBL,TX Buffer Level" "0,1"
|
|
bitfld.long 0x00 3. "TXC,TX Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXBLOCK,Block Incoming Data" "0,1"
|
|
bitfld.long 0x00 1. "TXENS,Transmitter Enable Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "RXENS,Receiver Enable Status" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CLKDIV,Clock Control Register"
|
|
hexmask.long.word 0x00 3.--16. 1. "DIV,Fractional Clock Divider"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "STARTFRAME,Start Frame Register"
|
|
hexmask.long.word 0x00 0.--8. 1. "STARTFRAME,Start Frame"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SIGFRAME,Signal Frame Register"
|
|
hexmask.long.word 0x00 0.--8. 1. "SIGFRAME,Signal Frame"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "RXDATAX,Receive Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. "FERR,Receive Data Framing Error" "0,1"
|
|
bitfld.long 0x00 14. "PERR,Receive Data Parity Error" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATA,RX Data"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATA,RX Data"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RXDATAXP,Receive Buffer Data Extended Peek Register"
|
|
bitfld.long 0x00 15. "FERRP,Receive Data Framing Error Peek" "0,1"
|
|
bitfld.long 0x00 14. "PERRP,Receive Data Parity Error Peek" "0,1"
|
|
newline
|
|
hexmask.long.word 0x00 0.--8. 1. "RXDATAP,RX Data Peek"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TXDATAX,Transmit Buffer Data Extended Register"
|
|
bitfld.long 0x00 15. "RXENAT,Enable RX After Transmission" "0,1"
|
|
bitfld.long 0x00 14. "TXDISAT,Disable TX After Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "TXBREAK,Transmit Data as Break" "0,1"
|
|
hexmask.long.word 0x00 0.--8. 1. "TXDATA,TX Data"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXDATA,TX Data"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 10. "SIGF,Signal Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "STARTF,Start Frame Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MPAF,Multi-Processor Address Frame Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "FERR,Framing Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PERR,Parity Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "TXOF,TX Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXUF,RX Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXOF,RX Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXDATAV,RX Data Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "TXBL,TX Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,TX Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 10. "SIGF,Set SIGF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "STARTF,Set STARTF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MPAF,Set MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "FERR,Set FERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PERR,Set PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "TXOF,Set TXOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXUF,Set RXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXOF,Set RXOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,Set TXC Interrupt Flag" "0,1"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 10. "SIGF,Clear SIGF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "STARTF,Clear STARTF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MPAF,Clear MPAF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "FERR,Clear FERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PERR,Clear PERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "TXOF,Clear TXOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXUF,Clear RXUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "RXOF,Clear RXOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,Clear TXC Interrupt Flag" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. "SIGF,SIGF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "STARTF,STARTF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MPAF,MPAF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "FERR,FERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PERR,PERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "TXOF,TXOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXUF,RXUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "RXOF,RXOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "RXDATAV,RXDATAV Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "TXBL,TXBL Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXC,TXC Interrupt Enable" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PULSECTRL,Pulse Control Register"
|
|
bitfld.long 0x00 5. "PULSEFILT,Pulse Filter" "0,1"
|
|
bitfld.long 0x00 4. "PULSEEN,Pulse Generator/Extender Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "PULSEW,Pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. "REGFREEZE,Register Update Freeze" "0,1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 7. "PULSECTRL,PULSECTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 6. "TXDATA,TXDATA Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "TXDATAX,TXDATAX Register Busy" "0,1"
|
|
bitfld.long 0x00 4. "SIGFRAME,SIGFRAME Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "STARTFRAME,STARTFRAME Register Busy" "0,1"
|
|
bitfld.long 0x00 2. "CLKDIV,CLKDIV Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CMD,CMD Register Busy" "0,1"
|
|
bitfld.long 0x00 0. "CTRL,CTRL Register Busy" "0,1"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. "TXPEN,TX Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "RXPEN,RX Pin Enable" "0,1"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. "TXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,?..."
|
|
bitfld.long 0x00 0.--5. "RXLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "INPUT,LEUART Input Register"
|
|
bitfld.long 0x00 5. "RXPRS,PRS RX Enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "RXPRSSEL,RX PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
tree.end
|
|
tree "LETIMER0"
|
|
base ad:0x40066000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 12. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 9. "COMP0TOP,Compare Value 0 is Top Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "BUFTOP,Buffered Top" "0,1"
|
|
bitfld.long 0x00 7. "OPOL1,Output 1 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "OPOL0,Output 0 Polarity" "0,1"
|
|
bitfld.long 0x00 4.--5. "UFOA1,Underflow Output Action 1" "0: LETn_O1 is held at its idle value as defined..,1: LETn_O1 is toggled on CNT underflow,2: LETn_O1 is held active for one LFACLKLETIMER0..,3: LETn_O1 is set idle on CNT underflow and.."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "UFOA0,Underflow Output Action 0" "0: LETn_O0 is held at its idle value as defined..,1: LETn_O0 is toggled on CNT underflow,2: LETn_O0 is held active for one LFACLKLETIMER0..,3: LETn_O0 is set idle on CNT underflow and.."
|
|
bitfld.long 0x00 0.--1. "REPMODE,Repeat Mode" "0: When started the LETIMER counts down until it..,1: The counter counts REP0 times,2: The counter counts REP0 times,3: Both REP0 and REP1 are decremented when the.."
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 4. "CTO1,Clear Toggle Output 1" "0,1"
|
|
bitfld.long 0x00 3. "CTO0,Clear Toggle Output 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CLEAR,Clear LETIMER" "0,1"
|
|
bitfld.long 0x00 1. "STOP,Stop LETIMER" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,Start LETIMER" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 0. "RUNNING,LETIMER Running" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Counter Value"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "COMP0,Compare Value Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMP0,Compare Value 0"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "COMP1,Compare Value Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "COMP1,Compare Value 1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "REP0,Repeat Counter Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REP0,Repeat Counter 0"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "REP1,Repeat Counter Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "REP1,Repeat Counter 1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 4. "REP1,Repeat Counter 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "REP0,Repeat Counter 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UF,Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "COMP1,Compare Match 1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "COMP0,Compare Match 0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 4. "REP1,Set REP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "REP0,Set REP0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UF,Set UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "COMP1,Set COMP1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "COMP0,Set COMP0 Interrupt Flag" "0,1"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 4. "REP1,Clear REP1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "REP0,Clear REP0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UF,Clear UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "COMP1,Clear COMP1 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "COMP0,Clear COMP0 Interrupt Flag" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 4. "REP1,REP1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "REP0,REP0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "UF,UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "COMP1,COMP1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "COMP0,COMP0 Interrupt Enable" "0,1"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 1. "CMD,CMD Register Busy" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. "OUT1PEN,Output 1 Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "OUT0PEN,Output 0 Pin Enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. "OUT1LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
bitfld.long 0x00 0.--5. "OUT0LOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,?..."
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PRSSEL,PRS Input Select Register"
|
|
bitfld.long 0x00 26.--27. "PRSCLEARMODE,PRS Clear Mode" "0: PRS cannot clear the LETIMER,1: Rising edge of selected PRS input can clear..,2: Falling edge of selected PRS input can clear..,3: Both the rising or falling edge of the.."
|
|
bitfld.long 0x00 22.--23. "PRSSTOPMODE,PRS Stop Mode" "0: PRS cannot stop the LETIMER,1: Rising edge of selected PRS input can stop..,2: Falling edge of selected PRS input can stop..,3: Both the rising or falling edge of the.."
|
|
newline
|
|
bitfld.long 0x00 18.--19. "PRSSTARTMODE,PRS Start Mode" "0: PRS cannot start the LETIMER,1: Rising edge of selected PRS input can start..,2: Falling edge of selected PRS input can start..,3: Both the rising or falling edge of the.."
|
|
bitfld.long 0x00 12.--14. "PRSCLEARSEL,PRS Clear Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "PRSSTOPSEL,PRS Stop Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
bitfld.long 0x00 0.--2. "PRSSTARTSEL,PRS Start Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
tree.end
|
|
tree "CRYOTIMER"
|
|
base ad:0x4008F000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 5.--7. "PRESC,Prescaler Setting" "0: LF Oscillator frequency undivided,1: LF Oscillator frequency divided by 2,2: LF Oscillator frequency divided by 4,3: LF Oscillator frequency divided by 8,4: LF Oscillator frequency divided by 16,5: LF Oscillator frequency divided by 32,6: LF Oscillator frequency divided by 64,7: LF Oscillator frequency divided by 128"
|
|
bitfld.long 0x00 2.--3. "OSCSEL,Select Low Frequency Oscillator" "0: Output is driven low,1: Select Low Frequency RC Oscillator,2: Select Low Frequency Crystal Oscillator,3: Select Ultra Low Frequency RC Oscillator"
|
|
newline
|
|
bitfld.long 0x00 1. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 0. "EN,Enable CRYOTIMER" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PERIODSEL,Interrupt Duration"
|
|
bitfld.long 0x00 0.--5. "PERIODSEL,Interrupts/Wakeup Events Period Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CNT,Counter Value"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,Counter Value"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "EM4WUEN,Wake Up Enable"
|
|
bitfld.long 0x00 0. "EM4WU,EM4 Wake-up Enable" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 0. "PERIOD,Wakeup Event/Interrupt" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. "PERIOD,Set PERIOD Interrupt Flag" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. "PERIOD,Clear PERIOD Interrupt Flag" "0,1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. "PERIOD,PERIOD Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "PCNT0"
|
|
base ad:0x4006E000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "TOPBHFSEL,TOPB High Frequency Value Select" "0,1"
|
|
bitfld.long 0x00 26.--28. "TCCPRSSEL,TCC PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
newline
|
|
bitfld.long 0x00 25. "TCCPRSPOL,TCC PRS Polarity Select" "0,1"
|
|
bitfld.long 0x00 24. "PRSGATEEN,PRS Gate Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "TCCCOMP,Triggered Compare and Clear Compare Mode" "0: Compare match if PCNT_CNT is less than or..,1: Compare match if PCNT_CNT is greater than or..,2: Compare match if PCNT_CNT is less than or..,?..."
|
|
bitfld.long 0x00 19.--20. "TCCPRESC,Set the LFA Prescaler for Triggered Compare and Clear" "0: Compare and clear event each LFA cycle,1: Compare and clear performed on every other..,2: Compare and clear performed on every 4th LFA..,3: Compare and clear performed on every 8th LFA.."
|
|
newline
|
|
bitfld.long 0x00 16.--17. "TCCMODE,Sets the Mode for Triggered Compare and Clear" "0: Triggered compare and clear not enabled,1: Compare and clear performed on each..,2: Compare and clear performed on positive PRS..,?..."
|
|
bitfld.long 0x00 15. "EDGE,Edge Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "CNTDIR,Non-Quadrature Mode Counter Direction Control" "0,1"
|
|
bitfld.long 0x00 12.--13. "AUXCNTEV,Controls When the Auxiliary Counter Counts" "0: Never counts,1: Counts up on up-count events,2: Counts up on down-count events,3: Counts up on both up-count and down-count.."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CNTEV,Controls When the Counter Counts" "0: Counts up on up-count and down on down-count..,1: Only counts up on up-count events,2: Only counts down on down-count events,3: Never counts"
|
|
bitfld.long 0x00 9. "S1CDIR,Count Direction Determined By S1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "HYST,Enable Hysteresis" "0,1"
|
|
bitfld.long 0x00 7. "DEBUGHALT,Debug Mode Halt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "AUXCNTRSTEN,Enable AUXCNT Reset" "0,1"
|
|
bitfld.long 0x00 5. "CNTRSTEN,Enable CNT Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RSTEN,Enable PCNT Clock Domain Reset" "0,1"
|
|
bitfld.long 0x00 3. "FILT,Enable Digital Pulse Width Filter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "MODE,Mode Select" "0: The module is disabled,1: Single input LFACLK oversampling mode..,2: Externally clocked single input counter mode..,3: Externally clocked quadrature decoder mode..,4: LFACLK oversampling quadrature decoder 1X..,5: LFACLK oversampling quadrature decoder 2X..,6: LFACLK oversampling quadrature decoder 4X..,?..."
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 1. "LTOPBIM,Load TOPB Immediately" "0,1"
|
|
bitfld.long 0x00 0. "LCNTIM,Load CNT Immediately" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 0. "DIR,Current Counter Direction" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "CNT,Counter Value"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TOP,Top Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOP,Counter Top Value"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TOPB,Top Value Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "TOPB,Counter Top Buffer"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 5. "OQSTERR,Oversampling Quadrature State Error Interrupt" "0,1"
|
|
bitfld.long 0x00 4. "TCC,Triggered Compare Interrupt Read Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXOF,Auxiliary Overflow Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 2. "DIRCNG,Direction Change Detect Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "OF,Overflow Interrupt Read Flag" "0,1"
|
|
bitfld.long 0x00 0. "UF,Underflow Interrupt Read Flag" "0,1"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 5. "OQSTERR,Set OQSTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "TCC,Set TCC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXOF,Set AUXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "DIRCNG,Set DIRCNG Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "OF,Set OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "UF,Set UF Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 5. "OQSTERR,Clear OQSTERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 4. "TCC,Clear TCC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXOF,Clear AUXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 2. "DIRCNG,Clear DIRCNG Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "OF,Clear OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "UF,Clear UF Interrupt Flag" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. "OQSTERR,OQSTERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 4. "TCC,TCC Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AUXOF,AUXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 2. "DIRCNG,DIRCNG Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "OF,OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "UF,UF Interrupt Enable" "0,1"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 8.--13. "S1INLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
bitfld.long 0x00 0.--5. "S0INLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 0. "REGFREEZE,Register Update Freeze" "0,1"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 3. "OVSCFG,OVSCFG Register Busy" "0,1"
|
|
bitfld.long 0x00 2. "TOPB,TOPB Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CMD,CMD Register Busy" "0,1"
|
|
bitfld.long 0x00 0. "CTRL,CTRL Register Busy" "0,1"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "AUXCNT,Auxiliary Counter Value Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "AUXCNT,Auxiliary Counter Value"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "INPUT,PCNT Input Register"
|
|
bitfld.long 0x00 11. "S1PRSEN,S1IN PRS Enable" "0,1"
|
|
bitfld.long 0x00 6.--8. "S1PRSSEL,S1IN PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
newline
|
|
bitfld.long 0x00 5. "S0PRSEN,S0IN PRS Enable" "0,1"
|
|
bitfld.long 0x00 0.--2. "S0PRSSEL,S0IN PRS Channel Select" "0: PRS Channel 0 selected,1: PRS Channel 1 selected,2: PRS Channel 2 selected,3: PRS Channel 3 selected,4: PRS Channel 4 selected,5: PRS Channel 5 selected,6: PRS Channel 6 selected,7: PRS Channel 7 selected"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "OVSCFG,Oversampling Config Register"
|
|
bitfld.long 0x00 12. "FLUTTERRM,Flutter Remove" "0,1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FILTLEN,Configure Filter Length for Inputs S0IN and S1IN"
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40089000 ad:0x40089400)
|
|
tree "I2C$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 16.--18. "CLTO,Clock Low Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles,2: Timeout after 80 prescaled clock cycles,3: Timeout after 160 prescaled clock cycles,4: Timeout after 320 prescaled clock cycles,5: Timeout after 1024 prescaled clock cycles,?..."
|
|
bitfld.long 0x00 15. "GIBITO,Go Idle on Bus Idle Timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "BITO,Bus Idle Timeout" "0: Timeout disabled,1: Timeout after 40 prescaled clock cycles,2: Timeout after 80 prescaled clock cycles,3: Timeout after 160 prescaled clock cycles"
|
|
bitfld.long 0x00 8.--9. "CLHR,Clock Low High Ratio" "0: The ratio between low period and high period..,1: The ratio between low period and high period..,2: The ratio between low period and high period..,?..."
|
|
newline
|
|
bitfld.long 0x00 7. "TXBIL,TX Buffer Interrupt Level" "0,1"
|
|
bitfld.long 0x00 6. "GCAMEN,General Call Address Match Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ARBDIS,Arbitration Disable" "0,1"
|
|
bitfld.long 0x00 4. "AUTOSN,Automatic STOP on NACK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AUTOSE,Automatic STOP When Empty" "0,1"
|
|
bitfld.long 0x00 2. "AUTOACK,Automatic Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SLAVE,Addressable as Slave" "0,1"
|
|
bitfld.long 0x00 0. "EN,I2C Enable" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 7. "CLEARPC,Clear Pending Commands" "0,1"
|
|
bitfld.long 0x00 6. "CLEARTX,Clear TX" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "ABORT,Abort Transmission" "0,1"
|
|
bitfld.long 0x00 4. "CONT,Continue Transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "NACK,Send NACK" "0,1"
|
|
bitfld.long 0x00 2. "ACK,Send ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "STOP,Send Stop Condition" "0,1"
|
|
bitfld.long 0x00 0. "START,Send Start Condition" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATE,State Register"
|
|
bitfld.long 0x00 5.--7. "STATE,Transmission State" "0: No transmission is being performed,1: Waiting for idle,2: Start transmitted or received,3: Address transmitted or received,4: Address ack/nack transmitted or received,5: Data transmitted or received,6: Data ack/nack transmitted or received,?..."
|
|
bitfld.long 0x00 4. "BUSHOLD,Bus Held" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "NACKED,Nack Received" "0,1"
|
|
bitfld.long 0x00 2. "TRANSMITTER,Transmitter" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "MASTER,Master" "0,1"
|
|
bitfld.long 0x00 0. "BUSY,Bus Busy" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 9. "RXFULL,RX FIFO Full" "0,1"
|
|
bitfld.long 0x00 8. "RXDATAV,RX Data Valid" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "TXBL,TX Buffer Level" "0,1"
|
|
bitfld.long 0x00 6. "TXC,TX Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "PABORT,Pending Abort" "0,1"
|
|
bitfld.long 0x00 4. "PCONT,Pending Continue" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "PNACK,Pending NACK" "0,1"
|
|
bitfld.long 0x00 2. "PACK,Pending ACK" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "PSTOP,Pending STOP" "0,1"
|
|
bitfld.long 0x00 0. "PSTART,Pending START" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CLKDIV,Clock Division Register"
|
|
hexmask.long.word 0x00 0.--8. 1. "DIV,Clock Divider"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SADDR,Slave Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. "ADDR,Slave Address"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SADDRMASK,Slave Address Mask Register"
|
|
hexmask.long.byte 0x00 1.--7. 1. "MASK,Slave Address Mask"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "RXDATA,Receive Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATA,RX Data"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RXDOUBLE,Receive Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXDATA1,RX Data 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATA0,RX Data 0"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "RXDATAP,Receive Buffer Data Peek Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATAP,RX Data Peek"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "RXDOUBLEP,Receive Buffer Double Data Peek Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RXDATAP1,RX Data 1 Peek"
|
|
hexmask.long.byte 0x00 0.--7. 1. "RXDATAP0,RX Data 0 Peek"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TXDATA,Transmit Buffer Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXDATA,TX Data"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TXDOUBLE,Transmit Buffer Double Data Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. "TXDATA1,TX Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "TXDATA0,TX Data"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 18. "CLERR,Clock Low Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "RXFULL,Receive Buffer Full Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SSTOP,Slave STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CLTO,Clock Low Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "BITO,Bus Idle Timeout Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "RXUF,Receive Buffer Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TXOF,Transmit Buffer Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "BUSHOLD,Bus Held Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BUSERR,Bus Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "ARBLOST,Arbitration Lost Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MSTOP,Master STOP Condition Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "NACK,Not Acknowledge Received Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACK,Acknowledge Received Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "RXDATAV,Receive Data Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "TXBL,Transmit Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "TXC,Transfer Completed Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ADDR,Address Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "RSTART,Repeated START Condition Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,START Condition Interrupt Flag" "0,1"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 18. "CLERR,Set CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "RXFULL,Set RXFULL Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SSTOP,Set SSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CLTO,Set CLTO Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "BITO,Set BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "RXUF,Set RXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TXOF,Set TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "BUSHOLD,Set BUSHOLD Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BUSERR,Set BUSERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "ARBLOST,Set ARBLOST Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MSTOP,Set MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "NACK,Set NACK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACK,Set ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "TXC,Set TXC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ADDR,Set ADDR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "RSTART,Set RSTART Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,Set START Interrupt Flag" "0,1"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 18. "CLERR,Clear CLERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 17. "RXFULL,Clear RXFULL Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SSTOP,Clear SSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 15. "CLTO,Clear CLTO Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "BITO,Clear BITO Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 13. "RXUF,Clear RXUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TXOF,Clear TXOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 11. "BUSHOLD,Clear BUSHOLD Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BUSERR,Clear BUSERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "ARBLOST,Clear ARBLOST Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MSTOP,Clear MSTOP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "NACK,Clear NACK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACK,Clear ACK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "TXC,Clear TXC Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ADDR,Clear ADDR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "RSTART,Clear RSTART Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "START,Clear START Interrupt Flag" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 18. "CLERR,CLERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 17. "RXFULL,RXFULL Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "SSTOP,SSTOP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 15. "CLTO,CLTO Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "BITO,BITO Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 13. "RXUF,RXUF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "TXOF,TXOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 11. "BUSHOLD,BUSHOLD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "BUSERR,BUSERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "ARBLOST,ARBLOST Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "MSTOP,MSTOP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "NACK,NACK Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "ACK,ACK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "RXDATAV,RXDATAV Interrupt Enable" "0,1"
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|
newline
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bitfld.long 0x00 4. "TXBL,TXBL Interrupt Enable" "0,1"
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|
bitfld.long 0x00 3. "TXC,TXC Interrupt Enable" "0,1"
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|
newline
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|
bitfld.long 0x00 2. "ADDR,ADDR Interrupt Enable" "0,1"
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|
bitfld.long 0x00 1. "RSTART,RSTART Interrupt Enable" "0,1"
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|
newline
|
|
bitfld.long 0x00 0. "START,START Interrupt Enable" "0,1"
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|
group.long 0x44++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pin Enable Register"
|
|
bitfld.long 0x00 1. "SCLPEN,SCL Pin Enable" "0,1"
|
|
bitfld.long 0x00 0. "SDAPEN,SDA Pin Enable" "0,1"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
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|
bitfld.long 0x00 8.--13. "SCLLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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|
bitfld.long 0x00 0.--5. "SDALOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
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|
tree.end
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repeat.end
|
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tree.end
|
|
tree "ADC0"
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|
base ad:0x40082000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
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|
bitfld.long 0x00 30.--31. "CHCONREFWARMIDLE,Channel Connect and Reference Warm Sel When ADC is IDLE" "0: Keep scan reference warm and APORT switches..,1: Keep single reference warm and keep APORT..,2: Keep last used reference warm and keep APORT..,?..."
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|
bitfld.long 0x00 29. "CHCONMODE,Channel Connect" "0,1"
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|
newline
|
|
bitfld.long 0x00 28. "DBGHALT,Debug Mode Halt Enable" "0,1"
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|
bitfld.long 0x00 24.--27. "OVSRSEL,Oversample Rate Select" "0: 2 samples for each conversion result,1: 4 samples for each conversion result,2: 8 samples for each conversion result,3: 16 samples for each conversion result,4: 32 samples for each conversion result,5: 64 samples for each conversion result,6: 128 samples for each conversion result,7: 256 samples for each conversion result,8: 512 samples for each conversion result,9: 1024 samples for each conversion result,10: 2048 samples for each conversion result,11: 4096 samples for each conversion result,?..."
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|
newline
|
|
hexmask.long.byte 0x00 16.--22. 1. "TIMEBASE,1us Time Base"
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|
hexmask.long.byte 0x00 8.--14. 1. "PRESC,Prescalar Setting for ADC Sample and Conversion Clock"
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|
newline
|
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bitfld.long 0x00 7. "ADCCLKMODE,ADC Clock Mode" "0,1"
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|
bitfld.long 0x00 6. "ASYNCCLKEN,Selects ASYNC CLK Enable Mode When ADCCLKMODE=1" "0,1"
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|
newline
|
|
bitfld.long 0x00 4. "TAILGATE,Conversion Tailgating" "0,1"
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|
bitfld.long 0x00 3. "SCANDMAWU,SCANFIFO DMA Wakeup" "0,1"
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|
newline
|
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bitfld.long 0x00 2. "SINGLEDMAWU,SINGLEFIFO DMA Wakeup" "0,1"
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|
bitfld.long 0x00 0.--1. "WARMUPMODE,Warm-up Mode" "0: ADC is shut down after each conversion,1: ADC is kept in standby mode between conversions,2: ADC is kept in slow acquisition mode between..,3: ADC is kept on after conversions allowing for.."
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|
wgroup.long 0x08++0x03
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|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 3. "SCANSTOP,Scan Sequence Stop" "0,1"
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|
bitfld.long 0x00 2. "SCANSTART,Scan Sequence Start" "0,1"
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|
newline
|
|
bitfld.long 0x00 1. "SINGLESTOP,Single Channel Conversion Stop" "0,1"
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|
bitfld.long 0x00 0. "SINGLESTART,Single Channel Conversion Start" "0,1"
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|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 17. "SCANDV,Scan Data Valid" "0,1"
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|
bitfld.long 0x00 16. "SINGLEDV,Single Channel Data Valid" "0,1"
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|
newline
|
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bitfld.long 0x00 12. "WARM,ADC Warmed Up" "0,1"
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|
bitfld.long 0x00 10.--11. "PROGERR,Programming Error Status" "?,1: BUSCONF,2: NEGSELCONF,?..."
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|
newline
|
|
bitfld.long 0x00 9. "SCANREFWARM,Scan Reference Warmed Up" "0,1"
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|
bitfld.long 0x00 8. "SINGLEREFWARM,Single Channel Reference Warmed Up" "0,1"
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|
newline
|
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bitfld.long 0x00 2. "SCANPENDING,Scan Conversion Pending" "0,1"
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|
bitfld.long 0x00 1. "SCANACT,Scan Conversion Active" "0,1"
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|
newline
|
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bitfld.long 0x00 0. "SINGLEACT,Single Channel Conversion Active" "0,1"
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|
group.long 0x10++0x03
|
|
line.long 0x00 "SINGLECTRL,Single Channel Control Register"
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|
bitfld.long 0x00 31. "CMPEN,Compare Logic Enable for Single Channel" "0,1"
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|
bitfld.long 0x00 29. "PRSEN,Single Channel PRS Trigger Enable" "0,1"
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|
newline
|
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bitfld.long 0x00 24.--27. "AT,Single Channel Acquisition Time" "0: 1 conversion clock cycle acquisition time for..,1: 2 conversion clock cycles acquisition time..,2: 3 conversion clock cycles acquisition time..,3: 4 conversion clock cycles acquisition time..,4: 8 conversion clock cycles acquisition time..,5: 16 conversion clock cycles acquisition time..,6: 32 conversion clock cycles acquisition time..,7: 64 conversion clock cycles acquisition time..,8: 128 conversion clock cycles acquisition time..,9: 256 conversion clock cycles acquisition time..,?..."
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|
hexmask.long.byte 0x00 16.--23. 1. "NEGSEL,Single Channel Negative Input Selection"
|
|
newline
|
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hexmask.long.byte 0x00 8.--15. 1. "POSSEL,Single Channel Positive Input Selection"
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|
bitfld.long 0x00 5.--7. "REF,Single Channel Reference Selection" "0: VFS = 1.25V with internal VBGR reference,1: VFS = 2.5V with internal VBGR reference,2: VFS = AVDD with AVDD as reference source,3: VFS = 5V with internal VBGR reference,4: Single ended external reference,5: Differential external reference 2x,6: VFS = 2xAVDD with AVDD as the reference source,7: Use SINGLECTRLX to configure reference"
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|
newline
|
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bitfld.long 0x00 3.--4. "RES,Single Channel Resolution Select" "0: 12-bit resolution,1: 8-bit resolution,2: 6-bit resolution,3: Oversampling enabled"
|
|
bitfld.long 0x00 2. "ADJ,Single Channel Result Adjustment" "0,1"
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|
newline
|
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bitfld.long 0x00 1. "DIFF,Single Channel Differential Mode" "0,1"
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|
bitfld.long 0x00 0. "REP,Single Channel Repetitive Mode" "0,1"
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|
group.long 0x14++0x03
|
|
line.long 0x00 "SINGLECTRLX,Single Channel Control Register Continued"
|
|
bitfld.long 0x00 29.--31. "REPDELAY,REPDELAY Select for SINGLE REP Mode" "0: No delay,1: 4 conversion clock cycles,2: 8 conversion clock cycles,3: 16 conversion clock cycles,4: 32 conversion clock cycles,5: 64 conversion clock cycles,6: 128 conversion clock cycles,7: 256 conversion clock cycles"
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bitfld.long 0x00 27. "CONVSTARTDELAYEN,Enable Delaying Next Conversion Start" "0,1"
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|
newline
|
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bitfld.long 0x00 22.--26. "CONVSTARTDELAY,Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 17.--19. "PRSSEL,Single Channel PRS Trigger Select" "0: PRS ch 0 triggers single channel,1: PRS ch 1 triggers single channel,2: PRS ch 2 triggers single channel,3: PRS ch 3 triggers single channel,4: PRS ch 4 triggers single channel,5: PRS ch 5 triggers single channel,6: PRS ch 6 triggers single channel,7: PRS ch 7 triggers single channel"
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|
newline
|
|
bitfld.long 0x00 16. "PRSMODE,Single Channel PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 14. "FIFOOFACT,Single Channel FIFO Overflow Action" "0,1"
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|
newline
|
|
bitfld.long 0x00 12.--13. "DVL,Single Channel DV Level Select" "0,1,2,3"
|
|
bitfld.long 0x00 8.--11. "VINATT,Code for VIN Attenuation Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
|
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bitfld.long 0x00 4.--7. "VREFATT,Code for VREF Attenuation Factor When VREFSEL is 1 2 or 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 3. "VREFATTFIX,Enable Fixed Scaling on VREF" "0,1"
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|
newline
|
|
bitfld.long 0x00 0.--2. "VREFSEL,Single Channel Reference Selection" "0: Internal 0.83V Bandgap reference,1: Scaled AVDD,2: Scaled singled ended external Vref,3: Raw single ended external Vref,4: Special mode used to generate ENTROPY,5: Scaled differential external Vref from,6: Raw differential external Vref from,7: Internal Bandgap reference at low setting 0.78V"
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|
group.long 0x18++0x03
|
|
line.long 0x00 "SCANCTRL,Scan Control Register"
|
|
bitfld.long 0x00 31. "CMPEN,Compare Logic Enable for Scan" "0,1"
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|
bitfld.long 0x00 29. "PRSEN,Scan Sequence PRS Trigger Enable" "0,1"
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newline
|
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bitfld.long 0x00 24.--27. "AT,Scan Acquisition Time" "0: 1 conversion clock cycle acquisition time for..,1: 2 conversion clock cycles acquisition time..,2: 3 conversion clock cycles acquisition time..,3: 4 conversion clock cycles acquisition time..,4: 8 conversion clock cycles acquisition time..,5: 16 conversion clock cycles acquisition time..,6: 32 conversion clock cycles acquisition time..,7: 64 conversion clock cycles acquisition time..,8: 128 conversion clock cycles acquisition time..,9: 256 conversion clock cycles acquisition time..,?..."
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bitfld.long 0x00 5.--7. "REF,Scan Sequence Reference Selection" "0: VFS = 1.25V with internal VBGR reference,1: VFS = 2.5V with internal VBGR reference,2: VFS = AVDD with AVDD as reference source,3: VFS = 5V with internal VBGR reference,4: Single ended external reference,5: Differential external reference 2x,6: VFS=2xAVDD with AVDD as the reference source,7: Use SCANCTRLX to configure reference"
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newline
|
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bitfld.long 0x00 3.--4. "RES,Scan Sequence Resolution Select" "0: 12-bit resolution,1: 8-bit resolution,2: 6-bit resolution,3: Oversampling enabled"
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bitfld.long 0x00 2. "ADJ,Scan Sequence Result Adjustment" "0,1"
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newline
|
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bitfld.long 0x00 1. "DIFF,Scan Sequence Differential Mode" "0,1"
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|
bitfld.long 0x00 0. "REP,Scan Sequence Repetitive Mode" "0,1"
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group.long 0x1C++0x03
|
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line.long 0x00 "SCANCTRLX,Scan Control Register Continued"
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|
bitfld.long 0x00 29.--31. "REPDELAY,REPDELAY Select for SCAN REP Mode" "0: No delay,1: 4 conversion clock cycles,2: 8 conversion clock cycles,3: 16 conversion clock cycles,4: 32 conversion clock cycles,5: 64 conversion clock cycles,6: 128 conversion clock cycles,7: 256 conversion clock cycles"
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bitfld.long 0x00 27. "CONVSTARTDELAYEN,Enable Delaying Next Conversion Start" "0,1"
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|
newline
|
|
bitfld.long 0x00 22.--26. "CONVSTARTDELAY,Delay Next Conversion Start If CONVSTARTDELAYEN is Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 17.--19. "PRSSEL,Scan Sequence PRS Trigger Select" "0: PRS ch 0 triggers scan sequence,1: PRS ch 1 triggers scan sequence,2: PRS ch 2 triggers scan sequence,3: PRS ch 3 triggers scan sequence,4: PRS ch 4 triggers scan sequence,5: PRS ch 5 triggers scan sequence,6: PRS ch 6 triggers scan sequence,7: PRS ch 7 triggers scan sequence"
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newline
|
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bitfld.long 0x00 16. "PRSMODE,Scan PRS Trigger Mode" "0,1"
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|
bitfld.long 0x00 14. "FIFOOFACT,Scan FIFO Overflow Action" "0,1"
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newline
|
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bitfld.long 0x00 12.--13. "DVL,Scan DV Level Select" "0,1,2,3"
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|
bitfld.long 0x00 8.--11. "VINATT,Code for VIN Attenuation Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 4.--7. "VREFATT,Code for VREF Attenuation Factor When VREFSEL is 1 2 or 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 3. "VREFATTFIX,Enable Fixed Scaling on VREF" "0,1"
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newline
|
|
bitfld.long 0x00 0.--2. "VREFSEL,Scan Channel Reference Selection" "0: Internal 0.83V Bandgap reference,1: Scaled AVDD,2: Scaled singled ended external Vref,3: Raw single ended external Vref,?,5: Scaled differential external Vref from,6: Raw differential external Vref from,7: Internal Bandgap reference at low setting 0.78V"
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group.long 0x20++0x03
|
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line.long 0x00 "SCANMASK,Scan Sequence Input Mask Register"
|
|
hexmask.long 0x00 0.--31. 1. "SCANINPUTEN,Scan Sequence Input Mask"
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|
group.long 0x24++0x03
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line.long 0x00 "SCANINPUTSEL,Input Selection Register for Scan Mode"
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|
bitfld.long 0x00 24.--28. "INPUT24TO31SEL,Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK" "0: APORT0CH0TO7,1: APORT0CH8TO15,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,8: APORT2CH0TO7,9: APORT2CH8TO15,10: APORT2CH16TO23,11: APORT2CH24TO31,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31,16: APORT4CH0TO7,17: APORT4CH8TO15,18: APORT4CH16TO23,19: APORT4CH24TO31,?..."
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bitfld.long 0x00 16.--20. "INPUT16TO23SEL,Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK" "0: APORT0CH0TO7,1: APORT0CH8TO15,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,8: APORT2CH0TO7,9: APORT2CH8TO15,10: APORT2CH16TO23,11: APORT2CH24TO31,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31,16: APORT4CH0TO7,17: APORT4CH8TO15,18: APORT4CH16TO23,19: APORT4CH24TO31,?..."
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newline
|
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bitfld.long 0x00 8.--12. "INPUT8TO15SEL,Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK" "0: APORT0CH0TO7,1: APORT0CH8TO15,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,8: APORT2CH0TO7,9: APORT2CH8TO15,10: APORT2CH16TO23,11: APORT2CH24TO31,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31,16: APORT4CH0TO7,17: APORT4CH8TO15,18: APORT4CH16TO23,19: APORT4CH24TO31,?..."
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bitfld.long 0x00 0.--4. "INPUT0TO7SEL,Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK" "0: APORT0CH0TO7,1: APORT0CH8TO15,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,8: APORT2CH0TO7,9: APORT2CH8TO15,10: APORT2CH16TO23,11: APORT2CH24TO31,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31,16: APORT4CH0TO7,17: APORT4CH8TO15,18: APORT4CH16TO23,19: APORT4CH24TO31,?..."
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group.long 0x28++0x03
|
|
line.long 0x00 "SCANNEGSEL,Negative Input Select Register for Scan"
|
|
bitfld.long 0x00 14.--15. "INPUT15NEGSEL,Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode" "0: Selects ADCn_INPUT8 as negative channel input,1: Selects ADCn_INPUT10 as negative channel input,2: Selects ADCn_INPUT12 as negative channel input,3: Selects ADCn_INPUT14 as negative channel input"
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bitfld.long 0x00 12.--13. "INPUT13NEGSEL,Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode" "0: Selects ADCn_INPUT8 as negative channel input,1: Selects ADCn_INPUT10 as negative channel input,2: Selects ADCn_INPUT12 as negative channel input,3: Selects ADCn_INPUT14 as negative channel input"
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newline
|
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bitfld.long 0x00 10.--11. "INPUT11NEGSEL,Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode" "0: Selects ADCn_INPUT8 as negative channel input,1: Selects ADCn_INPUT10 as negative channel input,2: Selects ADCn_INPUT12 as negative channel input,3: Selects ADCn_INPUT14 as negative channel input"
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bitfld.long 0x00 8.--9. "INPUT9NEGSEL,Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode" "0: Selects ADCn_INPUT8 as negative channel input,1: Selects ADCn_INPUT10 as negative channel input,2: Selects ADCn_INPUT12 as negative channel input,3: Selects ADCn_INPUT14 as negative channel input"
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newline
|
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bitfld.long 0x00 6.--7. "INPUT6NEGSEL,Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode" "0: Selects ADCn_INPUT1 as negative channel input,1: Selects ADCn_INPUT3 as negative channel input,2: Selects ADCn_INPUT5 as negative channel input,3: Selects ADCn_INPUT7 as negative channel input"
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bitfld.long 0x00 4.--5. "INPUT4NEGSEL,Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode" "0: Selects ADCn_INPUT1 as negative channel input,1: Selects ADCn_INPUT3 as negative channel input,2: Selects ADCn_INPUT5 as negative channel input,3: Selects ADCn_INPUT7 as negative channel input"
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newline
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bitfld.long 0x00 2.--3. "INPUT2NEGSEL,Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode" "0: Selects ADCn_INPUT1 as negative channel input,1: Selects ADCn_INPUT3 as negative channel input,2: Selects ADCn_INPUT5 as negative channel input,3: Selects ADCn_INPUT7 as negative channel input"
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bitfld.long 0x00 0.--1. "INPUT0NEGSEL,Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode" "0: Selects ADCn_INPUT1 as negative channel input,1: Selects ADCn_INPUT3 as negative channel input,2: Selects ADCn_INPUT5 as negative channel input,3: Selects ADCn_INPUT7 as negative channel input"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CMPTHR,Compare Threshold Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "ADGT,Greater Than Compare Threshold"
|
|
hexmask.long.word 0x00 0.--15. 1. "ADLT,Less Than Compare Threshold"
|
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group.long 0x30++0x03
|
|
line.long 0x00 "BIASPROG,Bias Programming Register for Various Analog Blocks Used in ADC Operation"
|
|
bitfld.long 0x00 16. "GPBIASACC,Accuracy Setting for the System Bias During ADC Operation" "0,1"
|
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bitfld.long 0x00 12. "VFAULTCLR,Clear VREFOF Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 0.--3. "ADCBIASPROG,Bias Programming Value of Analog ADC Block" "0: Normal power (use for 1Msps operation),?,?,?,4: Scaling bias to 1/2,?,?,?,8: Scaling bias to 1/4,?,?,?,12: Scaling bias to 1/8,?,14: Scaling bias to 1/16,15: Scaling bias to 1/32"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CAL,Calibration Register"
|
|
bitfld.long 0x00 31. "CALEN,Calibration Mode is Enabled" "0,1"
|
|
hexmask.long.byte 0x00 24.--30. 1. "SCANGAIN,Scan Mode Gain Calibration Value"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "SCANOFFSETINV,Scan Mode Offset Calibration Value for Negative Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x00 16.--19. "SCANOFFSET,Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
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bitfld.long 0x00 15. "OFFSETINVMODE,Negative Single-ended Offset Calibration is Enabled" "0,1"
|
|
hexmask.long.byte 0x00 8.--14. 1. "SINGLEGAIN,Single Mode Gain Calibration Value"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "SINGLEOFFSETINV,Single Mode Offset Calibration Value for Negative Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. "SINGLEOFFSET,Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 29. "EM23ERR,EM23 Entry Error Flag" "0,1"
|
|
bitfld.long 0x00 28. "PRSTIMEDERR,PRS Timed Mode Error Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 27. "SCANPEND,Scan Trigger Pending Flag" "0,1"
|
|
bitfld.long 0x00 26. "SCANEXTPEND,External Scan Trigger Pending Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 25. "PROGERR,Programming Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 24. "VREFOV,VREF Over Voltage Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 17. "SCANCMP,Scan Result Compare Match Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "SINGLECMP,Single Result Compare Match Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SCANUF,Scan FIFO Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "SINGLEUF,Single FIFO Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SCANOF,Scan FIFO Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "SINGLEOF,Single FIFO Overflow Interrupt Flag" "0,1"
|
|
newline
|
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bitfld.long 0x00 1. "SCAN,Scan Conversion Complete Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 0. "SINGLE,Single Conversion Complete Interrupt Flag" "0,1"
|
|
wgroup.long 0x3C++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 29. "EM23ERR,Set EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. "PRSTIMEDERR,Set PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SCANPEND,Set SCANPEND Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 26. "SCANEXTPEND,Set SCANEXTPEND Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "PROGERR,Set PROGERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 24. "VREFOV,Set VREFOV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SCANCMP,Set SCANCMP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "SINGLECMP,Set SINGLECMP Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SCANUF,Set SCANUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "SINGLEUF,Set SINGLEUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SCANOF,Set SCANOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "SINGLEOF,Set SINGLEOF Interrupt Flag" "0,1"
|
|
wgroup.long 0x40++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 29. "EM23ERR,Clear EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. "PRSTIMEDERR,Clear PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SCANPEND,Clear SCANPEND Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 26. "SCANEXTPEND,Clear SCANEXTPEND Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "PROGERR,Clear PROGERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 24. "VREFOV,Clear VREFOV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SCANCMP,Clear SCANCMP Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "SINGLECMP,Clear SINGLECMP Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SCANUF,Clear SCANUF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 10. "SINGLEUF,Clear SINGLEUF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SCANOF,Clear SCANOF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 8. "SINGLEOF,Clear SINGLEOF Interrupt Flag" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 29. "EM23ERR,EM23ERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "PRSTIMEDERR,PRSTIMEDERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "SCANPEND,SCANPEND Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 26. "SCANEXTPEND,SCANEXTPEND Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "PROGERR,PROGERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 24. "VREFOV,VREFOV Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SCANCMP,SCANCMP Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "SINGLECMP,SINGLECMP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SCANUF,SCANUF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 10. "SINGLEUF,SINGLEUF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SCANOF,SCANOF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 8. "SINGLEOF,SINGLEOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SCAN,SCAN Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 0. "SINGLE,SINGLE Interrupt Enable" "0,1"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SINGLEDATA,Single Conversion Result Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Single Conversion Result Data"
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "SCANDATA,Scan Conversion Result Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Scan Conversion Result Data"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "SINGLEDATAP,Single Conversion Result Data Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATAP,Single Conversion Result Data Peek"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "SCANDATAP,Scan Sequence Result Data Peek Register"
|
|
hexmask.long 0x00 0.--31. 1. "DATAP,Scan Conversion Result Data Peek"
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "SCANDATAX,Scan Sequence Result Data + Data Source Register"
|
|
bitfld.long 0x00 16.--20. "SCANINPUTID,Scan Conversion Input ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATA,Scan Conversion Result Data"
|
|
rgroup.long 0x6C++0x03
|
|
line.long 0x00 "SCANDATAXP,Scan Sequence Result Data + Data Source Peek Register"
|
|
bitfld.long 0x00 16.--20. "SCANINPUTIDPEEK,Scan Conversion Data Source Peek" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 0.--15. 1. "DATAP,Scan Conversion Result Data Peek"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "APORTREQ,APORT Request Status Register"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1Y is Requested" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "APORT0YREQ,1 If the Bus Connected to APORT0Y is Requested" "0,1"
|
|
bitfld.long 0x00 0. "APORT0XREQ,1 If the Bus Connected to APORT0X is Requested" "0,1"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "APORTCONFLICT,APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "APORT0YCONFLICT,1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 0. "APORT0XCONFLICT,1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral" "0,1"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "SINGLEFIFOCOUNT,Single FIFO Count Register"
|
|
bitfld.long 0x00 0.--2. "SINGLEDC,Single Data Count" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x88++0x03
|
|
line.long 0x00 "SCANFIFOCOUNT,Scan FIFO Count Register"
|
|
bitfld.long 0x00 0.--2. "SCANDC,Scan Data Count" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "SINGLEFIFOCLEAR,Single FIFO Clear Register"
|
|
bitfld.long 0x00 0. "SINGLEFIFOCLEAR,Clear Single FIFO Content" "0,1"
|
|
wgroup.long 0x90++0x03
|
|
line.long 0x00 "SCANFIFOCLEAR,Scan FIFO Clear Register"
|
|
bitfld.long 0x00 0. "SCANFIFOCLEAR,Clear Scan FIFO Content" "0,1"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "APORTMASTERDIS,APORT Bus Master Disable Register"
|
|
bitfld.long 0x00 9. "APORT4YMASTERDIS,APORT4Y Master Disable" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XMASTERDIS,APORT4X Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YMASTERDIS,APORT3Y Master Disable" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XMASTERDIS,APORT3X Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YMASTERDIS,APORT2Y Master Disable" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XMASTERDIS,APORT2X Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YMASTERDIS,APORT1Y Master Disable" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XMASTERDIS,APORT1X Master Disable" "0,1"
|
|
tree.end
|
|
tree "ACMP (ACMP0)"
|
|
repeat 2. (list 0. 1.) (list ad:0x40080000 ad:0x40080400)
|
|
tree "ACMP$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "FULLBIAS,Full Bias Current" "0,1"
|
|
bitfld.long 0x00 24.--29. "BIASPROG,Bias Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 21. "IFALL,Falling Edge Interrupt Sense" "0,1"
|
|
bitfld.long 0x00 20. "IRISE,Rising Edge Interrupt Sense" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "INPUTRANGE,Input Range" "0: Setting when the input can be from 0 to ACMPVDD,1: Setting when the input will always be greater..,2: Setting when the input will always be less..,?..."
|
|
bitfld.long 0x00 15. "ACCURACY,ACMP Accuracy Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "PWRSEL,Power Select" "0: AVDD supply,1: DVDD supply,2: IOVDD/IOVDD0 supply,?,4: IOVDD1 supply (if part has two I/O voltages),?..."
|
|
bitfld.long 0x00 10. "APORTVMASTERDIS,APORT Bus Master Disable for Bus Selected By VASEL" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "APORTYMASTERDIS,APORT Bus Y Master Disable" "0,1"
|
|
bitfld.long 0x00 8. "APORTXMASTERDIS,APORT Bus X Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIOINV,Comparator GPIO Output Invert" "0,1"
|
|
bitfld.long 0x00 2. "INACTVAL,Inactive Value" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Analog Comparator Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INPUTSEL,Input Selection Register"
|
|
bitfld.long 0x00 28.--30. "CSRESSEL,Capacitive Sense Mode Internal Resistor Select" "0: Internal capacitive sense resistor value 0,1: Internal capacitive sense resistor value 1,2: Internal capacitive sense resistor value 2,3: Internal capacitive sense resistor value 3,4: Internal capacitive sense resistor value 4,5: Internal capacitive sense resistor value 5,6: Internal capacitive sense resistor value 6,7: Internal capacitive sense resistor value 7"
|
|
bitfld.long 0x00 26. "CSRESEN,Capacitive Sense Mode Internal Resistor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "VLPSEL,Low-Power Sampled Voltage Selection" "0,1"
|
|
bitfld.long 0x00 22. "VBSEL,VB Selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--21. "VASEL,VA Selection" "0: ACMPVDD,1: APORT2Y Channel 0,?,3: APORT2Y Channel 2,?,5: APORT2Y Channel 4,?,7: APORT2Y Channel 6,?,9: APORT2Y Channel 8,?,11: APORT2Y Channel 10,?,13: APORT2Y Channel 12,?,15: APORT2Y Channel 14,?,17: APORT2Y Channel 16,?,19: APORT2Y Channel 18,?,21: APORT2Y Channel 20,?,23: APORT2Y Channel 22,?,25: APORT2Y Channel 24,?,27: APORT2Y Channel 26,?,29: APORT2Y Channel 28,?,31: APORT2Y Channel 30,32: APORT1X Channel 0,33: APORT1Y Channel 1,34: APORT1X Channel 2,35: APORT1Y Channel 3,36: APORT1X Channel 4,37: APORT1Y Channel 5,38: APORT1X Channel 6,39: APORT1Y Channel 7,40: APORT1X Channel 8,41: APORT1Y Channel 9,42: APORT1X Channel 10,43: APORT1Y Channel 11,44: APORT1X Channel 12,45: APORT1Y Channel 13,46: APORT1X Channel 14,47: APORT1Y Channel 15,48: APORT1X Channel 16,49: APORT1Y Channel 17,50: APORT1X Channel 18,51: APORT1Y Channel 19,52: APORT1X Channel 20,53: APORT1Y Channel 21,54: APORT1X Channel 22,55: APORT1Y Channel 23,56: APORT1X Channel 24,57: APORT1Y Channel 25,58: APORT1X Channel 26,59: APORT1Y Channel 27,60: APORT1X Channel 28,61: APORT1Y Channel 29,62: APORT1X Channel 30,63: APORT1Y Channel 31"
|
|
hexmask.long.byte 0x00 8.--15. 1. "NEGSEL,Negative Input Select"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "POSSEL,Positive Input Select"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 3. "EXTIFACT,External Override Interface Active" "0,1"
|
|
bitfld.long 0x00 2. "APORTCONFLICT,APORT Conflict Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACMPOUT,Analog Comparator Output" "0,1"
|
|
bitfld.long 0x00 0. "ACMPACT,Analog Comparator Active" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 2. "APORTCONFLICT,APORT Conflict Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARMUP,Warm-up Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EDGE,Edge Triggered Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 2. "APORTCONFLICT,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARMUP,Set WARMUP Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EDGE,Set EDGE Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 2. "APORTCONFLICT,Clear APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARMUP,Clear WARMUP Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EDGE,Clear EDGE Interrupt Flag" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 2. "APORTCONFLICT,APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "WARMUP,WARMUP Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EDGE,EDGE Interrupt Enable" "0,1"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "APORTREQ,APORT Request Status Register"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "APORT0YREQ,1 If the Bus Connected to APORT0Y is Requested" "0,1"
|
|
bitfld.long 0x00 0. "APORT0XREQ,1 If the Bus Connected to APORT0X is Requested" "0,1"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "APORTCONFLICT,APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "APORT0YCONFLICT,1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 0. "APORT0XCONFLICT,1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "HYSTERESIS0,Hysteresis 0 Register"
|
|
bitfld.long 0x00 24.--29. "DIVVB,Divider for VB Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. "DIVVA,Divider for VA Voltage When ACMPOUT=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HYST,Hysteresis Select When ACMPOUT=0" "0: No hysteresis,1: 14 mV hysteresis,2: 25 mV hysteresis,3: 30 mV hysteresis,4: 35 mV hysteresis,5: 39 mV hysteresis,6: 42 mV hysteresis,7: 45 mV hysteresis,8: No hysteresis,9: -14 mV hysteresis,10: -25 mV hysteresis,11: -30 mV hysteresis,12: -35 mV hysteresis,13: -39 mV hysteresis,14: -42 mV hysteresis,15: -45 mV hysteresis"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "HYSTERESIS1,Hysteresis 1 Register"
|
|
bitfld.long 0x00 24.--29. "DIVVB,Divider for VB Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. "DIVVA,Divider for VA Voltage When ACMPOUT=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HYST,Hysteresis Select When ACMPOUT=1" "0: No hysteresis,1: 14 mV hysteresis,2: 25 mV hysteresis,3: 30 mV hysteresis,4: 35 mV hysteresis,5: 39 mV hysteresis,6: 42 mV hysteresis,7: 45 mV hysteresis,8: No hysteresis,9: -14 mV hysteresis,10: -25 mV hysteresis,11: -30 mV hysteresis,12: -35 mV hysteresis,13: -39 mV hysteresis,14: -42 mV hysteresis,15: -45 mV hysteresis"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "ROUTEPEN,I/O Routing Pine Enable Register"
|
|
bitfld.long 0x00 0. "OUTPEN,ACMP Output Pin Enable" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "ROUTELOC0,I/O Routing Location Register"
|
|
bitfld.long 0x00 0.--5. "OUTLOC,I/O Location" "0: Location 0,1: Location 1,2: Location 2,3: Location 3,4: Location 4,5: Location 5,6: Location 6,7: Location 7,?..."
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "EXTIFCTRL,External Override Interface Control"
|
|
bitfld.long 0x00 4.--7. "APORTSEL,APORT Selection for External Interface" "0: APORT0X used,1: APORT0Y used,2: APORT1X used,3: APORT1Y used,4: APORT1X/Y used,5: APORT2X used,6: APORT2Y used,7: APORT2Y/X used,8: APORT3X used,9: APORT3Y used,10: APORT3X/Y used,11: APORT4X used,12: APORT4Y used,13: APORT4Y/X used,?..."
|
|
bitfld.long 0x00 0. "EN,Enable External Interface" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "VDAC0"
|
|
base ad:0x40086000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "DACCLKMODE,Clock Mode" "0,1"
|
|
bitfld.long 0x00 28. "WARMUPMODE,Warm-up Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--25. "REFRESHPERIOD,Refresh Period" "0: All channels with enabled refresh are..,1: All channels with enabled refresh are..,2: All channels with enabled refresh are..,3: All channels with enabled refresh are.."
|
|
hexmask.long.byte 0x00 16.--22. 1. "PRESC,Prescaler Setting for DAC Clock"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "REFSEL,Reference Selection" "0: Internal low noise 1.25 V bandgap reference,1: Internal low noise 2.5 V bandgap reference,2: Internal 1.25 V bandgap reference,3: Internal 2.5 V bandgap reference,4: AVDD reference,?,6: External pin reference,?..."
|
|
bitfld.long 0x00 6. "CH0PRESCRST,Channel 0 Start Reset Prescaler" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "OUTENPRS,PRS Controlled Output Enable" "0,1"
|
|
bitfld.long 0x00 4. "SINEMODE,Sine Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "DIFF,Differential Mode" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 31. "OPA3OUTVALID,OPA3 Output Valid Status" "0,1"
|
|
bitfld.long 0x00 30. "OPA2OUTVALID,OPA2 Output Valid Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "OPA1OUTVALID,OPA1 Output Valid Status" "0,1"
|
|
bitfld.long 0x00 28. "OPA0OUTVALID,OPA0 Output Valid Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "OPA3WARM,OPA3 Warm Status" "0,1"
|
|
bitfld.long 0x00 26. "OPA2WARM,OPA2 Warm Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "OPA1WARM,OPA1 Warm Status" "0,1"
|
|
bitfld.long 0x00 24. "OPA0WARM,OPA0 Warm Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "OPA3ENS,OPA3 Enabled Status" "0,1"
|
|
bitfld.long 0x00 22. "OPA2ENS,OPA2 Enabled Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA1ENS,OPA1 Enabled Status" "0,1"
|
|
bitfld.long 0x00 20. "OPA0ENS,OPA0 Enabled Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA3APORTCONFLICT,OPA3 Bus Conflict Output" "0,1"
|
|
bitfld.long 0x00 18. "OPA2APORTCONFLICT,OPA2 Bus Conflict Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA1APORTCONFLICT,OPA1 Bus Conflict Output" "0,1"
|
|
bitfld.long 0x00 16. "OPA0APORTCONFLICT,OPA0 Bus Conflict Output" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CH1WARM,Channel 1 Warm" "0,1"
|
|
bitfld.long 0x00 4. "CH0WARM,Channel 0 Warm" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH1BL,Channel 1 Buffer Level" "0,1"
|
|
bitfld.long 0x00 2. "CH0BL,Channel 0 Buffer Level" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH1ENS,Channel 1 Enabled Status" "0,1"
|
|
bitfld.long 0x00 0. "CH0ENS,Channel 0 Enabled Status" "0,1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CH0CTRL,Channel 0 Control Register"
|
|
bitfld.long 0x00 12.--14. "PRSSEL,Channel 0 PRS Trigger Select" "0: PRS ch 0 triggers a conversion,1: PRS ch 1 triggers a conversion,2: PRS ch 2 triggers a conversion,3: PRS ch 3 triggers a conversion,4: PRS ch 4 triggers a conversion,5: PRS ch 5 triggers a conversion,6: PRS ch 6 triggers a conversion,7: PRS ch 7 triggers a conversion"
|
|
bitfld.long 0x00 8. "PRSASYNC,Channel 0 PRS Asynchronous Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "TRIGMODE,Channel 0 Trigger Mode" "0: Channel 0 is triggered by CH0DATA or COMBDATA,1: Channel 0 is triggered by PRS input,2: Channel 0 is triggered by Refresh timer,3: Channel 0 is triggered by CH0DATA/COMBDATA..,4: Channel 0 is triggered by CH0DATA/COMBDATA..,5: Channel 0 is triggered by LESENSE,?..."
|
|
bitfld.long 0x00 0. "CONVMODE,Conversion Mode" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CH1CTRL,Channel 1 Control Register"
|
|
bitfld.long 0x00 12.--14. "PRSSEL,Channel 1 PRS Trigger Select" "0: PRS ch 0 triggers a conversion,1: PRS ch 1 triggers a conversion,2: PRS ch 2 triggers a conversion,3: PRS ch 3 triggers a conversion,4: PRS ch 4 triggers a conversion,5: PRS ch 5 triggers a conversion,6: PRS ch 6 triggers a conversion,7: PRS ch 7 triggers a conversion"
|
|
bitfld.long 0x00 8. "PRSASYNC,Channel 1 PRS Asynchronous Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "TRIGMODE,Channel 1 Trigger Mode" "0: Channel 1 is triggered by CH1DATA or COMBDATA,1: Channel 1 is triggered by PRS input,2: Channel 1 is triggered by Refresh timer,3: Channel 1 is triggered by CH1DATA/COMBDATA..,4: Channel 1 is triggered by CH1DATA/COMBDATA..,5: Channel 1 is triggered by LESENSE,?..."
|
|
bitfld.long 0x00 0. "CONVMODE,Conversion Mode" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 23. "OPA3DIS,OPA3 Disable" "0,1"
|
|
bitfld.long 0x00 22. "OPA3EN,OPA3 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA2DIS,OPA2 Disable" "0,1"
|
|
bitfld.long 0x00 20. "OPA2EN,OPA2 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA1DIS,OPA1 Disable" "0,1"
|
|
bitfld.long 0x00 18. "OPA1EN,OPA1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA0DIS,OPA0 Disable" "0,1"
|
|
bitfld.long 0x00 16. "OPA0EN,OPA0 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CH1DIS,DAC Channel 1 Disable" "0,1"
|
|
bitfld.long 0x00 2. "CH1EN,DAC Channel 1 Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CH0DIS,DAC Channel 0 Disable" "0,1"
|
|
bitfld.long 0x00 0. "CH0EN,DAC Channel 0 Enable" "0,1"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 31. "OPA3OUTVALID,OPA3 Output Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 30. "OPA2OUTVALID,OPA3 Output Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "OPA1OUTVALID,OPA1 Output Valid Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. "OPA0OUTVALID,OPA0 Output Valid Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "OPA3PRSTIMEDERR,OPA3 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "OPA2PRSTIMEDERR,OPA2 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA1PRSTIMEDERR,OPA1 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "OPA0PRSTIMEDERR,OPA0 PRS Trigger Mode Error Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA3APORTCONFLICT,OPA3 Bus Conflict Output Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "OPA2APORTCONFLICT,OPA2 Bus Conflict Output Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA1APORTCONFLICT,OPA1 Bus Conflict Output Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "OPA0APORTCONFLICT,OPA0 Bus Conflict Output Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "EM23ERR,EM2/3 Entry Error Flag" "0,1"
|
|
bitfld.long 0x00 7. "CH1BL,Channel 1 Buffer Level Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CH0BL,Channel 0 Buffer Level Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH1UF,Channel 1 Data Underflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH0UF,Channel 0 Data Underflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH1OF,Channel 1 Data Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0OF,Channel 0 Data Overflow Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1CD,Channel 1 Conversion Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0CD,Channel 0 Conversion Done Interrupt Flag" "0,1"
|
|
wgroup.long 0x18++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 31. "OPA3OUTVALID,Set OPA3OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 30. "OPA2OUTVALID,Set OPA2OUTVALID Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "OPA1OUTVALID,Set OPA1OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. "OPA0OUTVALID,Set OPA0OUTVALID Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "OPA3PRSTIMEDERR,Set OPA3PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "OPA2PRSTIMEDERR,Set OPA2PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA1PRSTIMEDERR,Set OPA1PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "OPA0PRSTIMEDERR,Set OPA0PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA3APORTCONFLICT,Set OPA3APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "OPA2APORTCONFLICT,Set OPA2APORTCONFLICT Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA1APORTCONFLICT,Set OPA1APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "OPA0APORTCONFLICT,Set OPA0APORTCONFLICT Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "EM23ERR,Set EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH1UF,Set CH1UF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH0UF,Set CH0UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH1OF,Set CH1OF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0OF,Set CH0OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1CD,Set CH1CD Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0CD,Set CH0CD Interrupt Flag" "0,1"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 31. "OPA3OUTVALID,Clear OPA3OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 30. "OPA2OUTVALID,Clear OPA2OUTVALID Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "OPA1OUTVALID,Clear OPA1OUTVALID Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 28. "OPA0OUTVALID,Clear OPA0OUTVALID Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "OPA3PRSTIMEDERR,Clear OPA3PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 22. "OPA2PRSTIMEDERR,Clear OPA2PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA1PRSTIMEDERR,Clear OPA1PRSTIMEDERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 20. "OPA0PRSTIMEDERR,Clear OPA0PRSTIMEDERR Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA3APORTCONFLICT,Clear OPA3APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 18. "OPA2APORTCONFLICT,Clear OPA2APORTCONFLICT Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA1APORTCONFLICT,Clear OPA1APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 16. "OPA0APORTCONFLICT,Clear OPA0APORTCONFLICT Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "EM23ERR,Clear EM23ERR Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CH1UF,Clear CH1UF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH0UF,Clear CH0UF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CH1OF,Clear CH1OF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0OF,Clear CH0OF Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CH1CD,Clear CH1CD Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0CD,Clear CH0CD Interrupt Flag" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 31. "OPA3OUTVALID,OPA3OUTVALID Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 30. "OPA2OUTVALID,OPA2OUTVALID Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "OPA1OUTVALID,OPA1OUTVALID Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 28. "OPA0OUTVALID,OPA0OUTVALID Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "OPA3PRSTIMEDERR,OPA3PRSTIMEDERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 22. "OPA2PRSTIMEDERR,OPA2PRSTIMEDERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "OPA1PRSTIMEDERR,OPA1PRSTIMEDERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 20. "OPA0PRSTIMEDERR,OPA0PRSTIMEDERR Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "OPA3APORTCONFLICT,OPA3APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 18. "OPA2APORTCONFLICT,OPA2APORTCONFLICT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "OPA1APORTCONFLICT,OPA1APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 16. "OPA0APORTCONFLICT,OPA0APORTCONFLICT Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "EM23ERR,EM23ERR Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "CH1BL,CH1BL Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CH0BL,CH0BL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "CH1UF,CH1UF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CH0UF,CH0UF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "CH1OF,CH1OF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CH0OF,CH0OF Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "CH1CD,CH1CD Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CH0CD,CH0CD Interrupt Enable" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CH0DATA,Channel 0 Data Register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DATA,Channel 0 Data"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CH1DATA,Channel 1 Data Register"
|
|
hexmask.long.word 0x00 0.--11. 1. "DATA,Channel 1 Data"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "COMBDATA,Combined Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. "CH1DATA,Channel 1 Data"
|
|
hexmask.long.word 0x00 0.--11. 1. "CH0DATA,Channel 0 Data"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CAL,Calibration Register"
|
|
bitfld.long 0x00 16.--19. "GAINERRTRIMCH1,Gain Error Trim Value for CH1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--13. "GAINERRTRIM,Gain Error Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--2. "OFFSETTRIM,Input Buffer Offset Calibration Value" "0,1,2,3,4,5,6,7"
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|
rgroup.long 0xA0++0x03
|
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line.long 0x00 "OPA0_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
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|
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|
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bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
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|
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|
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bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
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|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
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|
newline
|
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bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
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|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0xA4++0x03
|
|
line.long 0x00 "OPA0_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
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|
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bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
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|
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|
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bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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|
group.long 0xA8++0x03
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line.long 0x00 "OPA0_CTRL,Operational Amplifier Control Register"
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bitfld.long 0x00 21. "APORTYMASTERDIS,APORT Bus Master Disable" "0,1"
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|
bitfld.long 0x00 20. "APORTXMASTERDIS,APORT Bus Master Disable" "0,1"
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newline
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bitfld.long 0x00 16. "PRSOUTMODE,OPAx PRS Output Select" "0,1"
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bitfld.long 0x00 10.--12. "PRSSEL,OPAx PRS Trigger Select" "0: PRS ch 0 triggers OPA,1: PRS ch 1 triggers OPA,2: PRS ch 2 triggers OPA,3: PRS ch 3 triggers OPA,4: PRS ch 4 triggers OPA,5: PRS ch 5 triggers OPA,6: PRS ch 6 triggers OPA,7: PRS ch 7 triggers OPA"
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bitfld.long 0x00 9. "PRSMODE,OPAx PRS Trigger Mode" "0,1"
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|
bitfld.long 0x00 8. "PRSEN,OPAx PRS Trigger Enable" "0,1"
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bitfld.long 0x00 4. "OUTSCALE,Scale OPAx Output Driving Strength" "0,1"
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|
bitfld.long 0x00 3. "HCMDIS,High Common Mode Disable" "0,1"
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newline
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bitfld.long 0x00 2. "INCBW,OPAx Unity Gain Bandwidth Scale" "0,1"
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bitfld.long 0x00 0.--1. "DRIVESTRENGTH,OPAx Operation Mode" "0: Lower accuracy with Low drive strength,1: Low accuracy with Low drive strength,2: High accuracy with High drive strength,3: Higher accuracy with High drive strength"
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group.long 0xAC++0x03
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line.long 0x00 "OPA0_TIMER,Operational Amplifier Timer Control Register"
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hexmask.long.word 0x00 16.--25. 1. "SETTLETIME,OPAx Output Settling Timeout Value"
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hexmask.long.byte 0x00 8.--14. 1. "WARMUPTIME,OPAx Warmup Time Count Value"
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newline
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bitfld.long 0x00 0.--5. "STARTUPDLY,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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group.long 0xB0++0x03
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line.long 0x00 "OPA0_MUX,Operational Amplifier Mux Configuration Register"
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bitfld.long 0x00 24.--26. "RESSEL,OPAx Resistor Ladder Select" "0: Gain of 1/3,1: Gain of 1,2: Gain of 1 2/3,3: Gain of 2 1/5,4: Gain of 3,5: Gain of 4 1/3,6: Gain of 7,7: Gain of 15"
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bitfld.long 0x00 20. "GAIN3X,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
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bitfld.long 0x00 16.--18. "RESINMUX,OPAx Resistor Ladder Input Mux" "0: Set for Unity Gain,1: Set for NEXTOUT(x-1) input,2: NEG pad connected,3: POS pad connected,4: Neg pad of OPA0 connected,5: OPA0 and OPA1 Resmux connected to form fully..,6: VSS connected,?..."
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hexmask.long.byte 0x00 8.--15. 1. "NEGSEL,OPAx Inverting Input Mux"
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newline
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hexmask.long.byte 0x00 0.--7. 1. "POSSEL,OPAx Non-inverting Input Mux"
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group.long 0xB4++0x03
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line.long 0x00 "OPA0_OUT,Operational Amplifier Output Configuration Register"
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hexmask.long.byte 0x00 16.--23. 1. "APORTOUTSEL,OPAx APORT Output"
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bitfld.long 0x00 4.--8. "ALTOUTPADEN,OPAx Output Enable Value" "?,1: Alternate Output 0,2: Alternate Output 1,?,4: Alternate Output 2,?,?,?,8: Alternate Output 3,?,?,?,?,?,?,?,16: Alternate Output 4,?..."
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bitfld.long 0x00 3. "SHORT,OPAx Main and Alternative Output Short" "0,1"
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bitfld.long 0x00 2. "APORTOUTEN,OPAx Aport Output Enable" "0,1"
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newline
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bitfld.long 0x00 1. "ALTOUTEN,OPAx Alternative Output Enable" "0,1"
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bitfld.long 0x00 0. "MAINOUTEN,OPAx Main Output Enable" "0,1"
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group.long 0xB8++0x03
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line.long 0x00 "OPA0_CAL,Operational Amplifier Calibration Register"
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bitfld.long 0x00 26.--30. "OFFSETN,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 20.--24. "OFFSETP,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
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|
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bitfld.long 0x00 17.--18. "GM3,Gm3 Trim Value" "0,1,2,3"
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|
bitfld.long 0x00 13.--15. "GM,Gm Trim Value" "0,1,2,3,4,5,6,7"
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|
newline
|
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bitfld.long 0x00 10.--11. "CM3,Compensation Cap Cm3 Trim Value" "0,1,2,3"
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|
bitfld.long 0x00 5.--8. "CM2,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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newline
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bitfld.long 0x00 0.--3. "CM1,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
rgroup.long 0xC0++0x03
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line.long 0x00 "OPA1_APORTREQ,Operational Amplifier APORT Request Status Register"
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bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
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bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
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|
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bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
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bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
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bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
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bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
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newline
|
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bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
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bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
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rgroup.long 0xC4++0x03
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line.long 0x00 "OPA1_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
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bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
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|
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bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
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bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
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|
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bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
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newline
|
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bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
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|
group.long 0xC8++0x03
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line.long 0x00 "OPA1_CTRL,Operational Amplifier Control Register"
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bitfld.long 0x00 21. "APORTYMASTERDIS,APORT Bus Master Disable" "0,1"
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|
bitfld.long 0x00 20. "APORTXMASTERDIS,APORT Bus Master Disable" "0,1"
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newline
|
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bitfld.long 0x00 16. "PRSOUTMODE,OPAx PRS Output Select" "0,1"
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bitfld.long 0x00 10.--12. "PRSSEL,OPAx PRS Trigger Select" "0: PRS ch 0 triggers OPA,1: PRS ch 1 triggers OPA,2: PRS ch 2 triggers OPA,3: PRS ch 3 triggers OPA,4: PRS ch 4 triggers OPA,5: PRS ch 5 triggers OPA,6: PRS ch 6 triggers OPA,7: PRS ch 7 triggers OPA"
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bitfld.long 0x00 9. "PRSMODE,OPAx PRS Trigger Mode" "0,1"
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bitfld.long 0x00 8. "PRSEN,OPAx PRS Trigger Enable" "0,1"
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newline
|
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bitfld.long 0x00 4. "OUTSCALE,Scale OPAx Output Driving Strength" "0,1"
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bitfld.long 0x00 3. "HCMDIS,High Common Mode Disable" "0,1"
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newline
|
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bitfld.long 0x00 2. "INCBW,OPAx Unity Gain Bandwidth Scale" "0,1"
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bitfld.long 0x00 0.--1. "DRIVESTRENGTH,OPAx Operation Mode" "0: Lower accuracy with Low drive strength,1: Low accuracy with Low drive strength,2: High accuracy with High drive strength,3: Higher accuracy with High drive strength"
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group.long 0xCC++0x03
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line.long 0x00 "OPA1_TIMER,Operational Amplifier Timer Control Register"
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hexmask.long.word 0x00 16.--25. 1. "SETTLETIME,OPAx Output Settling Timeout Value"
|
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hexmask.long.byte 0x00 8.--14. 1. "WARMUPTIME,OPAx Warmup Time Count Value"
|
|
newline
|
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bitfld.long 0x00 0.--5. "STARTUPDLY,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
group.long 0xD0++0x03
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line.long 0x00 "OPA1_MUX,Operational Amplifier Mux Configuration Register"
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bitfld.long 0x00 24.--26. "RESSEL,OPAx Resistor Ladder Select" "0: Gain of 1/3,1: Gain of 1,2: Gain of 1 2/3,3: Gain of 2 1/5,4: Gain of 3,5: Gain of 4 1/3,6: Gain of 7,7: Gain of 15"
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bitfld.long 0x00 20. "GAIN3X,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
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|
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|
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bitfld.long 0x00 16.--18. "RESINMUX,OPAx Resistor Ladder Input Mux" "0: Set for Unity Gain,1: Set for NEXTOUT(x-1) input,2: NEG pad connected,3: POS pad connected,4: Neg pad of OPA0 connected,5: OPA0 and OPA1 Resmux connected to form fully..,6: VSS connected,?..."
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hexmask.long.byte 0x00 8.--15. 1. "NEGSEL,OPAx Inverting Input Mux"
|
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newline
|
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hexmask.long.byte 0x00 0.--7. 1. "POSSEL,OPAx Non-inverting Input Mux"
|
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group.long 0xD4++0x03
|
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line.long 0x00 "OPA1_OUT,Operational Amplifier Output Configuration Register"
|
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hexmask.long.byte 0x00 16.--23. 1. "APORTOUTSEL,OPAx APORT Output"
|
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bitfld.long 0x00 4.--8. "ALTOUTPADEN,OPAx Output Enable Value" "?,1: Alternate Output 0,2: Alternate Output 1,?,4: Alternate Output 2,?,?,?,8: Alternate Output 3,?,?,?,?,?,?,?,16: Alternate Output 4,?..."
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newline
|
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bitfld.long 0x00 3. "SHORT,OPAx Main and Alternative Output Short" "0,1"
|
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bitfld.long 0x00 2. "APORTOUTEN,OPAx Aport Output Enable" "0,1"
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newline
|
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bitfld.long 0x00 1. "ALTOUTEN,OPAx Alternative Output Enable" "0,1"
|
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bitfld.long 0x00 0. "MAINOUTEN,OPAx Main Output Enable" "0,1"
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group.long 0xD8++0x03
|
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line.long 0x00 "OPA1_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. "OFFSETN,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "OFFSETP,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
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bitfld.long 0x00 17.--18. "GM3,Gm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 13.--15. "GM,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
newline
|
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bitfld.long 0x00 10.--11. "CM3,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. "CM2,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
newline
|
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bitfld.long 0x00 0.--3. "CM1,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0xE0++0x03
|
|
line.long 0x00 "OPA2_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
newline
|
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bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
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bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0xE4++0x03
|
|
line.long 0x00 "OPA2_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "OPA2_CTRL,Operational Amplifier Control Register"
|
|
bitfld.long 0x00 21. "APORTYMASTERDIS,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 20. "APORTXMASTERDIS,APORT Bus Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRSOUTMODE,OPAx PRS Output Select" "0,1"
|
|
bitfld.long 0x00 10.--12. "PRSSEL,OPAx PRS Trigger Select" "0: PRS ch 0 triggers OPA,1: PRS ch 1 triggers OPA,2: PRS ch 2 triggers OPA,3: PRS ch 3 triggers OPA,4: PRS ch 4 triggers OPA,5: PRS ch 5 triggers OPA,6: PRS ch 6 triggers OPA,7: PRS ch 7 triggers OPA"
|
|
newline
|
|
bitfld.long 0x00 9. "PRSMODE,OPAx PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 8. "PRSEN,OPAx PRS Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OUTSCALE,Scale OPAx Output Driving Strength" "0,1"
|
|
bitfld.long 0x00 3. "HCMDIS,High Common Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INCBW,OPAx Unity Gain Bandwidth Scale" "0,1"
|
|
bitfld.long 0x00 0.--1. "DRIVESTRENGTH,OPAx Operation Mode" "0: Lower accuracy with Low drive strength,1: Low accuracy with Low drive strength,2: High accuracy with High drive strength,3: Higher accuracy with High drive strength"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "OPA2_TIMER,Operational Amplifier Timer Control Register"
|
|
hexmask.long.word 0x00 16.--25. 1. "SETTLETIME,OPAx Output Settling Timeout Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. "WARMUPTIME,OPAx Warmup Time Count Value"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "STARTUPDLY,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "OPA2_MUX,Operational Amplifier Mux Configuration Register"
|
|
bitfld.long 0x00 24.--26. "RESSEL,OPAx Resistor Ladder Select" "0: Gain of 1/3,1: Gain of 1,2: Gain of 1 2/3,3: Gain of 2 1/5,4: Gain of 3,5: Gain of 4 1/3,6: Gain of 7,7: Gain of 15"
|
|
bitfld.long 0x00 20. "GAIN3X,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "RESINMUX,OPAx Resistor Ladder Input Mux" "0: Set for Unity Gain,1: Set for NEXTOUT(x-1) input,2: NEG pad connected,3: POS pad connected,4: Neg pad of OPA0 connected,5: OPA0 and OPA1 Resmux connected to form fully..,6: VSS connected,?..."
|
|
hexmask.long.byte 0x00 8.--15. 1. "NEGSEL,OPAx Inverting Input Mux"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "POSSEL,OPAx Non-inverting Input Mux"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "OPA2_OUT,Operational Amplifier Output Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "APORTOUTSEL,OPAx APORT Output"
|
|
bitfld.long 0x00 4.--8. "ALTOUTPADEN,OPAx Output Enable Value" "?,1: Alternate Output 0,2: Alternate Output 1,?,4: Alternate Output 2,?,?,?,8: Alternate Output 3,?,?,?,?,?,?,?,16: Alternate Output 4,?..."
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|
newline
|
|
bitfld.long 0x00 3. "SHORT,OPAx Main and Alternative Output Short" "0,1"
|
|
bitfld.long 0x00 2. "APORTOUTEN,OPAx Aport Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ALTOUTEN,OPAx Alternative Output Enable" "0,1"
|
|
bitfld.long 0x00 0. "MAINOUTEN,OPAx Main Output Enable" "0,1"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "OPA2_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. "OFFSETN,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "OFFSETP,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GM3,Gm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 13.--15. "GM,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CM3,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. "CM2,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CM1,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "OPA3_APORTREQ,Operational Amplifier APORT Request Status Register"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "OPA3_APORTCONFLICT,Operational Amplifier APORT Conflict Status Register"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "OPA3_CTRL,Operational Amplifier Control Register"
|
|
bitfld.long 0x00 21. "APORTYMASTERDIS,APORT Bus Master Disable" "0,1"
|
|
bitfld.long 0x00 20. "APORTXMASTERDIS,APORT Bus Master Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PRSOUTMODE,OPAx PRS Output Select" "0,1"
|
|
bitfld.long 0x00 10.--12. "PRSSEL,OPAx PRS Trigger Select" "0: PRS ch 0 triggers OPA,1: PRS ch 1 triggers OPA,2: PRS ch 2 triggers OPA,3: PRS ch 3 triggers OPA,4: PRS ch 4 triggers OPA,5: PRS ch 5 triggers OPA,6: PRS ch 6 triggers OPA,7: PRS ch 7 triggers OPA"
|
|
newline
|
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bitfld.long 0x00 9. "PRSMODE,OPAx PRS Trigger Mode" "0,1"
|
|
bitfld.long 0x00 8. "PRSEN,OPAx PRS Trigger Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OUTSCALE,Scale OPAx Output Driving Strength" "0,1"
|
|
bitfld.long 0x00 3. "HCMDIS,High Common Mode Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "INCBW,OPAx Unity Gain Bandwidth Scale" "0,1"
|
|
bitfld.long 0x00 0.--1. "DRIVESTRENGTH,OPAx Operation Mode" "0: Lower accuracy with Low drive strength,1: Low accuracy with Low drive strength,2: High accuracy with High drive strength,3: Higher accuracy with High drive strength"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "OPA3_TIMER,Operational Amplifier Timer Control Register"
|
|
hexmask.long.word 0x00 16.--25. 1. "SETTLETIME,OPAx Output Settling Timeout Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. "WARMUPTIME,OPAx Warmup Time Count Value"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "STARTUPDLY,OPAx Startup Delay Count Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "OPA3_MUX,Operational Amplifier Mux Configuration Register"
|
|
bitfld.long 0x00 24.--26. "RESSEL,OPAx Resistor Ladder Select" "0: Gain of 1/3,1: Gain of 1,2: Gain of 1 2/3,3: Gain of 2 1/5,4: Gain of 3,5: Gain of 4 1/3,6: Gain of 7,7: Gain of 15"
|
|
bitfld.long 0x00 20. "GAIN3X,OPAx Dedicated 3x Gain Resistor Ladder" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "RESINMUX,OPAx Resistor Ladder Input Mux" "0: Set for Unity Gain,1: Set for NEXTOUT(x-1) input,2: NEG pad connected,3: POS pad connected,4: Neg pad of OPA0 connected,5: OPA0 and OPA1 Resmux connected to form fully..,6: VSS connected,?..."
|
|
hexmask.long.byte 0x00 8.--15. 1. "NEGSEL,OPAx Inverting Input Mux"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "POSSEL,OPAx Non-inverting Input Mux"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "OPA3_OUT,Operational Amplifier Output Configuration Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. "APORTOUTSEL,OPAx APORT Output"
|
|
bitfld.long 0x00 4.--8. "ALTOUTPADEN,OPAx Output Enable Value" "?,1: Alternate Output 0,2: Alternate Output 1,?,4: Alternate Output 2,?,?,?,8: Alternate Output 3,?,?,?,?,?,?,?,16: Alternate Output 4,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "SHORT,OPAx Main and Alternative Output Short" "0,1"
|
|
bitfld.long 0x00 2. "APORTOUTEN,OPAx Aport Output Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ALTOUTEN,OPAx Alternative Output Enable" "0,1"
|
|
bitfld.long 0x00 0. "MAINOUTEN,OPAx Main Output Enable" "0,1"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "OPA3_CAL,Operational Amplifier Calibration Register"
|
|
bitfld.long 0x00 26.--30. "OFFSETN,OPAx Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 20.--24. "OFFSETP,OPAx Non-Inverting Input Offset Configuration Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GM3,Gm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 13.--15. "GM,Gm Trim Value" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "CM3,Compensation Cap Cm3 Trim Value" "0,1,2,3"
|
|
bitfld.long 0x00 5.--8. "CM2,Compensation Cap Cm2 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CM1,Compensation Cap Cm1 Trim Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "CSEN"
|
|
base ad:0x4008E000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control"
|
|
bitfld.long 0x00 28. "CPACCURACY,Charge Pump Accuracy" "0,1"
|
|
bitfld.long 0x00 27. "LOCALSENS,Local Sensing Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 26. "WARMUPMODE,Select Warmup Mode for CSEN" "0,1"
|
|
bitfld.long 0x00 25. "EMACMPEN,Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24. "MXUC,CSEN Mux Disconnect" "0,1"
|
|
bitfld.long 0x00 23. "AUTOGND,CSEN Automatic Ground Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 22. "CHOPEN,CSEN Chop Enable" "0,1"
|
|
bitfld.long 0x00 21. "CONVSEL,CSEN Converter Select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "DMAEN,CSEN DMA Enable Bit" "0,1"
|
|
bitfld.long 0x00 19. "DRSF,CSEN Disable Right-Shift" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "CMPEN,CSEN Digital Comparator Enable" "0,1"
|
|
bitfld.long 0x00 16.--17. "STM,Start Trigger Select" "0: PRS Triggering,1: Timer Triggering,2: Software Triggering,?..."
|
|
newline
|
|
bitfld.long 0x00 15. "MCEN,CSEN Multiple Channel Enable" "0,1"
|
|
bitfld.long 0x00 12.--14. "ACU,CSEN Accumulator Mode Select" "0: Accumulate 1 sample,1: Accumulate 2 sample,2: Accumulate 4 sample,3: Accumulate 8 sample,4: Accumulate 16 sample,5: Accumulate 32 sample,6: Accumulate 64 sample,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--9. "SARCR,SAR Conversion Resolution" "0: Conversions last 10 internal CSEN clocks and..,1: Conversions last 12 internal CSEN clocks and..,2: Conversions last 14 internal CSEN clocks and..,3: Conversions last 16 internal CSEN clocks and.."
|
|
bitfld.long 0x00 4.--5. "CM,CSEN Conversion Mode Select" "0: Single Channel Mode,1: Scan Mode,2: Continuous Single Channel,3: Continuous Scan Mode"
|
|
newline
|
|
bitfld.long 0x00 2. "CMPPOL,CSEN Digital Comparator Polarity Select" "0,1"
|
|
bitfld.long 0x00 1. "EN,CSEN Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TIMCTRL,Timing Control"
|
|
bitfld.long 0x00 16.--17. "WARMUPCNT,Warmup Period Counter" "0,1,2,3"
|
|
hexmask.long.byte 0x00 8.--15. 1. "PCTOP,Period Counter Top Value"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "PCPRESC,Period Counter Prescaler" "0: The period counter clock frequency is..,1: The period counter clock frequency is..,2: The period counter clock frequency is..,3: The period counter clock frequency is..,4: The period counter clock frequency is..,5: The period counter clock frequency is..,6: The period counter clock frequency is..,7: The period counter clock frequency is.."
|
|
wgroup.long 0x08++0x03
|
|
line.long 0x00 "CMD,Command"
|
|
bitfld.long 0x00 0. "START,Start Software-Triggered Conversions" "0,1"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STATUS,Status"
|
|
bitfld.long 0x00 0. "CSENBUSY,Busy Flag" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PRSSEL,PRS Select"
|
|
bitfld.long 0x00 0.--2. "PRSSEL,PRS Channel Select" "0: PRS Channel 0 selected as the start trigger,1: PRS Channel 1 selected as the start trigger,2: PRS Channel 2 selected as the start trigger,3: PRS Channel 3 selected as the start trigger,4: PRS Channel 4 selected as the start trigger,5: PRS Channel 5 selected as the start trigger,6: PRS Channel 6 selected as the start trigger,7: PRS Channel 7 selected as the start trigger"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DATA,Output Data"
|
|
hexmask.long 0x00 0.--31. 1. "DATA,Output Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SCANMASK0,Scan Channel Mask 0"
|
|
hexmask.long 0x00 0.--31. 1. "SCANINPUTEN,Scan Channel Mask"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SCANINPUTSEL0,Scan Input Selection 0"
|
|
bitfld.long 0x00 24.--27. "INPUT24TO31SEL,CSEN_INPUT24-31 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
bitfld.long 0x00 16.--19. "INPUT16TO23SEL,CSEN_INPUT16-23 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "INPUT8TO15SEL,CSEN_INPUT8-15 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
bitfld.long 0x00 0.--3. "INPUT0TO7SEL,CSEN_INPUT0-7 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SCANMASK1,Scan Channel Mask 1"
|
|
hexmask.long 0x00 0.--31. 1. "SCANINPUTEN,Scan Channel Mask"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SCANINPUTSEL1,Scan Input Selection 1"
|
|
bitfld.long 0x00 24.--27. "INPUT56TO63SEL,CSEN_INPUT56-63 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
bitfld.long 0x00 16.--19. "INPUT48TO55SEL,CSEN_INPUT48-55 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "INPUT40TO47SEL,CSEN_INPUT40-47 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
bitfld.long 0x00 0.--3. "INPUT32TO39SEL,CSEN_INPUT32-39 Select" "?,?,?,?,4: APORT1CH0TO7,5: APORT1CH8TO15,6: APORT1CH16TO23,7: APORT1CH24TO31,?,?,?,?,12: APORT3CH0TO7,13: APORT3CH8TO15,14: APORT3CH16TO23,15: APORT3CH24TO31"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "APORTREQ,APORT Request Status"
|
|
bitfld.long 0x00 9. "APORT4YREQ,1 If the Bus Connected to APORT4Y is Requested" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XREQ,1 If the Bus Connected to APORT4X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YREQ,1 If the Bus Connected to APORT3Y is Requested" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XREQ,1 If the Bus Connected to APORT3X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YREQ,1 If the Bus Connected to APORT2Y is Requested" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YREQ,1 If the Bus Connected to APORT1X is Requested" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XREQ,1 If the Bus Connected to APORT2X is Requested" "0,1"
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "APORTCONFLICT,APORT Request Conflict"
|
|
bitfld.long 0x00 9. "APORT4YCONFLICT,1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 8. "APORT4XCONFLICT,1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "APORT3YCONFLICT,1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 6. "APORT3XCONFLICT,1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APORT2YCONFLICT,1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 4. "APORT2XCONFLICT,1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "APORT1YCONFLICT,1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral" "0,1"
|
|
bitfld.long 0x00 2. "APORT1XCONFLICT,1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CMPTHR,Comparator Threshold"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPTHR,Comparator Threshold"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "EMA,Exponential Moving Average"
|
|
hexmask.long.tbyte 0x00 0.--21. 1. "EMA,Calculated Exponential Moving Average"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "EMACTRL,Exponential Moving Average Control"
|
|
bitfld.long 0x00 0.--2. "EMASAMPLE,EMA Sample Weight" "0: EMA weight (N) is 1,1: EMA weight (N) is 2,2: EMA weight (N) is 4,3: EMA weight (N) is 8,4: EMA weight (N) is 16,5: EMA weight (N) is 32,6: EMA weight (N) is 64,?..."
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "SINGLECTRL,Single Conversion Control"
|
|
hexmask.long.byte 0x00 4.--10. 1. "SINGLESEL,Single Channel Input Select"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMBASELINE,Delta Modulation Baseline"
|
|
hexmask.long.word 0x00 16.--31. 1. "BASELINEDN,Delta Modulator Integrator Initial Value"
|
|
hexmask.long.word 0x00 0.--15. 1. "BASELINEUP,Delta Modulator Integrator Initial Value"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DMCFG,Delta Modulation Configuration"
|
|
bitfld.long 0x00 28. "DMGRDIS,Delta Modulation Gain Step Reduction Disable" "0,1"
|
|
bitfld.long 0x00 20.--21. "CRMODE,Delta Modulator Conversion Resolution" "0: 10-bit delta modulator,1: 12-bit delta modulator,2: 14-bit delta modulator,3: 16-bit delta modulator"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "DMCR,Delta Modulator Conversion Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 8.--11. "DMR,Delta Modulator Gain Reduction Interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "DMG,Delta Modulator Gain Step"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ANACTRL,Analog Control"
|
|
bitfld.long 0x00 20.--22. "TRSTPROG,Reset Timing" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. "IDACIREFS,Current DAC and Reference Current Scale" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "IREFPROG,Reference Current Control" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "IF,Interrupt Flag"
|
|
bitfld.long 0x00 4. "APORTCONFLICT,APORT Conflict Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "DMAOF,DMA Overflow Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EOS,End of Scan Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CONV,Conversion Done Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMP,Digital Comparator Interrupt Flag" "0,1"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set"
|
|
bitfld.long 0x00 4. "APORTCONFLICT,Set APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "DMAOF,Set DMAOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EOS,Set EOS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CONV,Set CONV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMP,Set CMP Interrupt Flag" "0,1"
|
|
wgroup.long 0x5C++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear"
|
|
bitfld.long 0x00 4. "APORTCONFLICT,Clear APORTCONFLICT Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "DMAOF,Clear DMAOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EOS,Clear EOS Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CONV,Clear CONV Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMP,Clear CMP Interrupt Flag" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable"
|
|
bitfld.long 0x00 4. "APORTCONFLICT,APORTCONFLICT Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "DMAOF,DMAOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EOS,EOS Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "CONV,CONV Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMP,CMP Interrupt Enable" "0,1"
|
|
tree.end
|
|
sif !cpuis("EFM32TG11B1*")
|
|
tree "LCD"
|
|
base ad:0x40054000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 23. "DSC,Direct Segment Control" "0,1"
|
|
bitfld.long 0x00 1.--2. "UDCTRL,Update Data Control" "0: The data transfer is controlled by SW,1: The data transfer is done at the next event..,2: The data transfer is done continuously at..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "EN,LCD Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DISPCTRL,Display Control Register"
|
|
bitfld.long 0x00 28.--29. "MODE,Mode Setting" "0: No External Cap,1: Use step down control with VLCD less than VDD,2: Charge pump used with internal oscillator,?..."
|
|
bitfld.long 0x00 24.--25. "BIAS,Bias Configuration" "0: STATIC,1: 1/2 Bias,2: ONETHIRD,3: ONEFOURTH"
|
|
newline
|
|
bitfld.long 0x00 20.--22. "CHGRDST,Charge Redistribution Cycles" "0: Disable charge redistribution,1: Use 1 prescaled low frequency clock cycle for..,2: Use 2 prescaled low frequency clock cycles..,3: Use 3 prescaled low frequency clock cycles..,4: Use 4 prescaled low frequency clock cycles..,?..."
|
|
bitfld.long 0x00 8.--13. "CONTRAST,Contrast Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 4. "WAVE,Waveform Selection" "0,1"
|
|
bitfld.long 0x00 0.--2. "MUX,Mux Configuration" "0: STATIC,1: DUPLEX,2: TRIPLEX,3: QUADRUPLEX,?,5: SEXTAPLEX,?,7: OCTAPLEX"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SEGEN,Segment Enable Register"
|
|
hexmask.long 0x00 0.--31. 1. "SEGEN,Segment Enable"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BACTRL,Blink and Animation Control Register"
|
|
bitfld.long 0x00 28. "ALOC,Animation Location" "0,1"
|
|
bitfld.long 0x00 18.--23. "FCTOP,Frame Counter Top Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 16.--17. "FCPRESC,Frame Counter Prescaler" "0: CLKFC = CLKFRAME / 1,1: CLKFC = CLKFRAME / 2,2: CLKFC = CLKFRAME / 4,3: CLKFC = CLKFRAME / 8"
|
|
bitfld.long 0x00 8. "FCEN,Frame Counter Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "ALOGSEL,Animate Logic Function Select" "0,1"
|
|
bitfld.long 0x00 5.--6. "AREGBSC,Animate Register B Shift Control" "0: No Shift operation on Animation Register B,1: Animation Register B is shifted left,2: Animation Register B is shifted right,?..."
|
|
newline
|
|
bitfld.long 0x00 3.--4. "AREGASC,Animate Register a Shift Control" "0: No Shift operation on Animation Register A,1: Animation Register A is shifted left,2: Animation Register A is shifted right,?..."
|
|
bitfld.long 0x00 2. "AEN,Animation Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BLANK,Blank Display" "0,1"
|
|
bitfld.long 0x00 0. "BLINKEN,Blink Enable" "0,1"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 8. "BLINK,Blink State" "0,1"
|
|
bitfld.long 0x00 0.--3. "ASTATE,Current Animation State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "AREGA,Animation Register a"
|
|
hexmask.long.byte 0x00 0.--7. 1. "AREGA,Animation Register a Data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "AREGB,Animation Register B"
|
|
hexmask.long.byte 0x00 0.--7. 1. "AREGB,Animation Register B Data"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 0. "FC,Frame Counter Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. "FC,Frame Counter Interrupt Flag Set" "0,1"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. "FC,Frame Counter Interrupt Flag Clear" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. "FC,Frame Counter Interrupt Enable" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BIASCTRL,Analog BIAS Control"
|
|
bitfld.long 0x00 10.--12. "BUFBIAS,Buffer Bias Setting" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--7. "BUFDRV,Buffer Drive Strength" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "SPEED,SPEED Adjustment" "0,1,2,3,4,5,6,7"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SEGD0L,Segment Data Low Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD0L,COM0 Segment Data Low"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SEGD1L,Segment Data Low Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD1L,COM1 Segment Data Low"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SEGD2L,Segment Data Low Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD2L,COM2 Segment Data Low"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "SEGD3L,Segment Data Low Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD3L,COM3 Segment Data Low"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SEGD0H,Segment Data High Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD0H,COM0 Segment Data High"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "SEGD1H,Segment Data High Register 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD1H,COM1 Segment Data High"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SEGD2H,Segment Data High Register 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD2H,COM2 Segment Data High"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SEGD3H,Segment Data High Register 3"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD3H,COM3 Segment Data High"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "SEGD4L,Segment Data Low Register 4"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD4L,COM4 Segment Data"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SEGD5L,Segment Data Low Register 5"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD5L,COM5 Segment Data"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "SEGD6L,Segment Data Low Register 6"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD6L,COM6 Segment Data"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SEGD7L,Segment Data Low Register 7"
|
|
hexmask.long 0x00 0.--31. 1. "SEGD7L,COM7 Segment Data"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "SEGD4H,Segment Data High Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD4H,COM0 Segment Data High"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "SEGD5H,Segment Data High Register 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD5H,COM1 Segment Data High"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "SEGD6H,Segment Data High Register 6"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD6H,COM2 Segment Data High"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SEGD7H,Segment Data High Register 7"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SEGD7H,COM3 Segment Data High"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "FREEZE,Freeze Register"
|
|
bitfld.long 0x00 1. "LCDGATE,LCD Gate" "0,1"
|
|
bitfld.long 0x00 0. "REGFREEZE,Register Update Freeze" "0,1"
|
|
rgroup.long 0xC4++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 19. "SEGD7H,SEGD7H Register Busy" "0,1"
|
|
bitfld.long 0x00 18. "SEGD6H,SEGD6H Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "SEGD5H,SEGD5H Register Busy" "0,1"
|
|
bitfld.long 0x00 16. "SEGD4H,SEGD4H Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "SEGD7L,SEGD7L Register Busy" "0,1"
|
|
bitfld.long 0x00 14. "SEGD6L,SEGD6L Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "SEGD5L,SEGD5L Register Busy" "0,1"
|
|
bitfld.long 0x00 12. "SEGD4L,SEGD4L Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "SEGD3H,SEGD3H Register Busy" "0,1"
|
|
bitfld.long 0x00 10. "SEGD2H,SEGD2H Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "SEGD1H,SEGD1H Register Busy" "0,1"
|
|
bitfld.long 0x00 8. "SEGD0H,SEGD0H Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SEGD3L,SEGD3L Register Busy" "0,1"
|
|
bitfld.long 0x00 6. "SEGD2L,SEGD2L Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "SEGD1L,SEGD1L Register Busy" "0,1"
|
|
bitfld.long 0x00 4. "SEGD0L,SEGD0L Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "AREGB,AREGB Register Busy" "0,1"
|
|
bitfld.long 0x00 2. "AREGA,AREGA Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "BACTRL,BACTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 0. "CTRL,CTRL Register Busy" "0,1"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "FRAMERATE,Frame Rate"
|
|
hexmask.long.word 0x00 0.--8. 1. "FRDIV,Frame Rate Divider"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "SEGEN2,Segment Enable (32 to 39)"
|
|
bitfld.long 0x00 0.--3. "SEGEN2,Segment Enable (second Group)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
endif
|
|
tree "RTCC"
|
|
base ad:0x40062000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 17. "LYEARCORRDIS,Leap Year Correction Disabled" "0,1"
|
|
bitfld.long 0x00 16. "CNTMODE,Main Counter Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "OSCFDETEN,Oscillator Failure Detection Enable" "0,1"
|
|
bitfld.long 0x00 14. "BUMODETSEN,Backup Mode Timestamp Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "CNTTICK,Counter Prescaler Mode" "0,1"
|
|
bitfld.long 0x00 8.--11. "CNTPRESC,Counter Prescaler Value" "0: CLKCNT = LFECLKRTCC/1,1: CLKCNT = LFECLKRTCC/2,2: CLKCNT = LFECLKRTCC/4,3: CLKCNT = LFECLKRTCC/8,4: CLKCNT = LFECLKRTCC/16,5: CLKCNT = LFECLKRTCC/32,6: CLKCNT = LFECLKRTCC/64,7: CLKCNT = LFECLKRTCC/128,8: CLKCNT = LFECLKRTCC/256,9: CLKCNT = LFECLKRTCC/512,10: CLKCNT = LFECLKRTCC/1024,11: CLKCNT = LFECLKRTCC/2048,12: CLKCNT = LFECLKRTCC/4096,13: CLKCNT = LFECLKRTCC/8192,14: CLKCNT = LFECLKRTCC/16384,15: CLKCNT = LFECLKRTCC/32768"
|
|
newline
|
|
bitfld.long 0x00 5. "CCV1TOP,CCV1 Top Value Enable" "0,1"
|
|
bitfld.long 0x00 4. "PRECCV0TOP,Pre-counter CCV0 Top Value Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
bitfld.long 0x00 0. "ENABLE,RTCC Enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PRECNT,Pre-Counter Value Register"
|
|
hexmask.long.word 0x00 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CNT,Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CNT,Counter Value"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "COMBCNT,Combined Pre-Counter and Counter Value Register"
|
|
hexmask.long.tbyte 0x00 15.--31. 1. "CNTLSB,Counter Value"
|
|
hexmask.long.word 0x00 0.--14. 1. "PRECNT,Pre-Counter Value"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TIME,Time of Day Register"
|
|
bitfld.long 0x00 20.--21. "HOURT,Hours Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HOURU,Hours Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MINT,Minutes Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MINU,Minutes Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SECT,Seconds Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SECU,Seconds Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DATE,Date Register"
|
|
bitfld.long 0x00 24.--26. "DAYOW,Day of Week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--23. "YEART,Year Tens" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "YEARU,Year Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12. "MONTHT,Month Tens" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "MONTHU,Month Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--5. "DAYOMT,Day of Month Tens" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--3. "DAYOMU,Day of Month Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "IF,RTCC Interrupt Flags"
|
|
bitfld.long 0x00 10. "MONTHTICK,Month Tick" "0,1"
|
|
bitfld.long 0x00 9. "DAYOWOF,Day of Week Overflow" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DAYTICK,Day Tick" "0,1"
|
|
bitfld.long 0x00 7. "HOURTICK,Hour Tick" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "MINTICK,Minute Tick" "0,1"
|
|
bitfld.long 0x00 5. "CNTTICK,Main Counter Tick" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCFAIL,Oscillator Failure Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CC2,Channel 2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CC1,Channel 1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CC0,Channel 0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Overflow Interrupt Flag" "0,1"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 10. "MONTHTICK,Set MONTHTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "DAYOWOF,Set DAYOWOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DAYTICK,Set DAYTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "HOURTICK,Set HOURTICK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "MINTICK,Set MINTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CNTTICK,Set CNTTICK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCFAIL,Set OSCFAIL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CC2,Set CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CC1,Set CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CC0,Set CC0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Set OF Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 10. "MONTHTICK,Clear MONTHTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 9. "DAYOWOF,Clear DAYOWOF Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DAYTICK,Clear DAYTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 7. "HOURTICK,Clear HOURTICK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "MINTICK,Clear MINTICK Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 5. "CNTTICK,Clear CNTTICK Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCFAIL,Clear OSCFAIL Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "CC2,Clear CC2 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CC1,Clear CC1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "CC0,Clear CC0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,Clear OF Interrupt Flag" "0,1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 10. "MONTHTICK,MONTHTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 9. "DAYOWOF,DAYOWOF Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "DAYTICK,DAYTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 7. "HOURTICK,HOURTICK Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "MINTICK,MINTICK Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 5. "CNTTICK,CNTTICK Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "OSCFAIL,OSCFAIL Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "CC2,CC2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CC1,CC1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "CC0,CC0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "OF,OF Interrupt Enable" "0,1"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 0. "BUMODETS,Timestamp for Backup Mode Entry Stored" "0,1"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. "CLRSTATUS,Clear RTCC_STATUS Register" "0,1"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 5. "CMD,CMD Register Busy" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "POWERDOWN,Retention RAM Power-down Register"
|
|
bitfld.long 0x00 0. "RAM,Retention RAM Power-down" "0,1"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "LOCK,Configuration Lock Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "LOCKKEY,Configuration Lock Key"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "EM4WUEN,Wake Up Enable"
|
|
bitfld.long 0x00 0. "EM4WU,EM4 Wake-up Enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CC0_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. "DAYCC,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. "COMPMASK,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 11. "COMPBASE,Capture Compare Channel Comparison Base" "0,1"
|
|
bitfld.long 0x00 6.--8. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on..,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?..."
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CC0_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,Capture/Compare Value"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CC0_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. "HOURT,Hours Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HOURU,Hours Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MINT,Minutes Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MINU,Minutes Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SECT,Seconds Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SECU,Seconds Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CC0_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. "MONTHT,Month Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONTHU,Month Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DAYT,Day of Month/week Tens" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Day of Month/week Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CC1_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. "DAYCC,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. "COMPMASK,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 11. "COMPBASE,Capture Compare Channel Comparison Base" "0,1"
|
|
bitfld.long 0x00 6.--8. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on..,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?..."
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CC1_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,Capture/Compare Value"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CC1_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. "HOURT,Hours Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HOURU,Hours Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MINT,Minutes Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MINU,Minutes Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SECT,Seconds Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SECU,Seconds Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CC1_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. "MONTHT,Month Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONTHU,Month Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DAYT,Day of Month/week Tens" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Day of Month/week Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CC2_CTRL,CC Channel Control Register"
|
|
bitfld.long 0x00 17. "DAYCC,Day Capture/Compare Selection" "0,1"
|
|
bitfld.long 0x00 12.--16. "COMPMASK,Capture Compare Channel Comparison Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 11. "COMPBASE,Capture Compare Channel Comparison Base" "0,1"
|
|
bitfld.long 0x00 6.--8. "PRSSEL,Compare/Capture Channel PRS Input Channel Selection" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "ICEDGE,Input Capture Edge Select" "0: Rising edges detected,1: Falling edges detected,2: Both edges detected,3: No edge detection signal is left as it is"
|
|
bitfld.long 0x00 2.--3. "CMOA,Compare Match Output Action" "0: A single clock cycle pulse is generated on..,1: Toggle output on compare match,2: Clear output on compare match,3: Set output on compare match"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "MODE,CC Channel Mode" "0: Compare/Capture channel turned off,1: Input capture,2: Output compare,?..."
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CC2_CCV,Capture/Compare Value Register"
|
|
hexmask.long 0x00 0.--31. 1. "CCV,Capture/Compare Value"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CC2_TIME,Capture/Compare Time Register"
|
|
bitfld.long 0x00 20.--21. "HOURT,Hours Tens" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. "HOURU,Hours Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 12.--14. "MINT,Minutes Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. "MINU,Minutes Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--6. "SECT,Seconds Tens" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--3. "SECU,Seconds Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CC2_DATE,Capture/Compare Date Register"
|
|
bitfld.long 0x00 12. "MONTHT,Month Tens" "0,1"
|
|
bitfld.long 0x00 8.--11. "MONTHU,Month Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "DAYT,Day of Month/week Tens" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. "DAYU,Day of Month/week Units" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "RET0_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "RET1_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "RET2_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "RET3_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "RET4_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "RET5_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "RET6_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "RET7_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "RET8_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "RET9_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "RET10_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "RET11_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "RET12_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "RET13_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "RET14_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "RET15_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "RET16_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "RET17_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "RET18_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "RET19_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "RET20_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "RET21_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "RET22_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "RET23_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "RET24_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "RET25_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "RET26_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "RET27_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "RET28_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "RET29_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "RET30_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "RET31_REG,Retention Register"
|
|
hexmask.long 0x00 0.--31. 1. "REG,General Purpose Retention Register"
|
|
tree.end
|
|
tree "WDOG0"
|
|
base ad:0x40052000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. "WDOGRSTDIS,Watchdog Reset Disable" "0,1"
|
|
bitfld.long 0x00 30. "CLRSRC,Watchdog Clear Source" "0,1"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "WINSEL,Watchdog Illegal Window Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. "WARNSEL,Watchdog Timeout Period Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 12.--13. "CLKSEL,Watchdog Clock Select" "0: ULFRCO,1: LFRCO,2: LFXO,3: HFCORECLK"
|
|
bitfld.long 0x00 8.--11. "PERSEL,Watchdog Timeout Period Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6. "SWOSCBLOCK,Software Oscillator Disable Block" "0,1"
|
|
bitfld.long 0x00 5. "EM4BLOCK,Energy Mode 4 Block" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "LOCK,Configuration Lock" "0,1"
|
|
bitfld.long 0x00 3. "EM3RUN,Energy Mode 3 Run Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EM2RUN,Energy Mode 2 Run Enable" "0,1"
|
|
bitfld.long 0x00 1. "DEBUGRUN,Debug Mode Run Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "EN,Watchdog Timer Enable" "0,1"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
bitfld.long 0x00 0. "CLEAR,Watchdog Timer Clear" "0,1"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "SYNCBUSY,Synchronization Busy Register"
|
|
bitfld.long 0x00 3. "PCH1_PRSCTRL,PCH1_PRSCTRL Register Busy" "0,1"
|
|
bitfld.long 0x00 2. "PCH0_PRSCTRL,PCH0_PRSCTRL Register Busy" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "CMD,CMD Register Busy" "0,1"
|
|
bitfld.long 0x00 0. "CTRL,CTRL Register Busy" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PCH0_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. "PRSMISSRSTEN,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--2. "PRSSEL,PRS Channel PRS Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "PCH1_PRSCTRL,PRS Control Register"
|
|
bitfld.long 0x00 8. "PRSMISSRSTEN,PRS Missing Event Will Trigger a Watchdog Reset" "0,1"
|
|
bitfld.long 0x00 0.--2. "PRSSEL,PRS Channel PRS Select" "0: PRS Channel 0 selected as input,1: PRS Channel 1 selected as input,2: PRS Channel 2 selected as input,3: PRS Channel 3 selected as input,4: PRS Channel 4 selected as input,5: PRS Channel 5 selected as input,6: PRS Channel 6 selected as input,7: PRS Channel 7 selected as input"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IF,Watchdog Interrupt Flags"
|
|
bitfld.long 0x00 4. "PEM1,PRS Channel One Event Missing Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "PEM0,PRS Channel Zero Event Missing Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WIN,WDOG Window Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARN,WDOG Warning Timeout Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TOUT,WDOG Timeout Interrupt Flag" "0,1"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 4. "PEM1,Set PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "PEM0,Set PEM0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WIN,Set WIN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARN,Set WARN Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TOUT,Set TOUT Interrupt Flag" "0,1"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 4. "PEM1,Clear PEM1 Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 3. "PEM0,Clear PEM0 Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WIN,Clear WIN Interrupt Flag" "0,1"
|
|
bitfld.long 0x00 1. "WARN,Clear WARN Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TOUT,Clear TOUT Interrupt Flag" "0,1"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 4. "PEM1,PEM1 Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 3. "PEM0,PEM0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "WIN,WIN Interrupt Enable" "0,1"
|
|
bitfld.long 0x00 1. "WARN,WARN Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TOUT,TOUT Interrupt Enable" "0,1"
|
|
tree.end
|
|
tree "SMU"
|
|
base ad:0x40020000
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "IF,Interrupt Flag Register"
|
|
bitfld.long 0x00 0. "PPUPRIV,PPU Privilege Interrupt Flag" "0,1"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "IFS,Interrupt Flag Set Register"
|
|
bitfld.long 0x00 0. "PPUPRIV,Set PPUPRIV Interrupt Flag" "0,1"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IFC,Interrupt Flag Clear Register"
|
|
bitfld.long 0x00 0. "PPUPRIV,Clear PPUPRIV Interrupt Flag" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "IEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 0. "PPUPRIV,PPUPRIV Interrupt Enable" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "PPUCTRL,PPU Control Register"
|
|
bitfld.long 0x00 0. "ENABLE," "0,1"
|
|
sif !cpuis("EFM32TG11B1*")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PPUPATD0,PPU Privilege Access Type Descriptor 0"
|
|
bitfld.long 0x00 31. "USART2,Universal Synchronous/Asynchronous Receiver/Transmitter 2 access control bit" "0,1"
|
|
bitfld.long 0x00 30. "USART1,Universal Synchronous/Asynchronous Receiver/Transmitter 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "USART0,Universal Synchronous/Asynchronous Receiver/Transmitter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 28. "UART0,Universal Asynchronous Receiver/Transmitter 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TRNG0,True Random Number Generator 0 access control bit" "0,1"
|
|
bitfld.long 0x00 26. "TIMER1,Timer 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "TIMER0,Timer 0 access control bit" "0,1"
|
|
bitfld.long 0x00 24. "SMU,Security Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "RTCC,Real-Time Counter and Calendar access control bit" "0,1"
|
|
bitfld.long 0x00 22. "RMU,Reset Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PCNT0,Pulse Counter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 20. "LEUART0,Low Energy UART 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "LETIMER0,Low Energy Timer 0 access control bit" "0,1"
|
|
bitfld.long 0x00 18. "LESENSE,Low Energy Sensor Interface access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "LDMA,Linked Direct Memory Access Controller access control bit" "0,1"
|
|
bitfld.long 0x00 16. "LCD,Liquid Crystal Display Controller access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "MSC,Memory System Controller access control bit" "0,1"
|
|
bitfld.long 0x00 14. "I2C1,I2C 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "I2C0,I2C 0 access control bit" "0,1"
|
|
bitfld.long 0x00 12. "GPIO,General purpose Input/Output access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPCRC,General Purpose CRC access control bit" "0,1"
|
|
bitfld.long 0x00 10. "EMU,Energy Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "PRS,Peripheral Reflex System access control bit" "0,1"
|
|
bitfld.long 0x00 8. "VDAC0,Digital to Analog Converter 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "CSEN,Capacitive touch sense module access control bit" "0,1"
|
|
bitfld.long 0x00 6. "CRYPTO0,Advanced Encryption Standard Accelerator access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "CRYOTIMER,CryoTimer access control bit" "0,1"
|
|
bitfld.long 0x00 4. "CMU,Clock Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CAN0,CAN 0 access control bit" "0,1"
|
|
bitfld.long 0x00 2. "ADC0,Analog to Digital Converter 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACMP1,Analog Comparator 1 access control bit" "0,1"
|
|
bitfld.long 0x00 0. "ACMP0,Analog Comparator 0 access control bit" "0,1"
|
|
endif
|
|
sif cpuis("EFM32TG11B1*")
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PPUPATD0,PPU Privilege Access Type Descriptor 0"
|
|
bitfld.long 0x00 31. "USART2,Universal Synchronous/Asynchronous Receiver/Transmitter 2 access control bit" "0,1"
|
|
bitfld.long 0x00 30. "USART1,Universal Synchronous/Asynchronous Receiver/Transmitter 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "USART0,Universal Synchronous/Asynchronous Receiver/Transmitter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 28. "UART0,Universal Asynchronous Receiver/Transmitter 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "TRNG0,True Random Number Generator 0 access control bit" "0,1"
|
|
bitfld.long 0x00 26. "TIMER1,Timer 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "TIMER0,Timer 0 access control bit" "0,1"
|
|
bitfld.long 0x00 24. "SMU,Security Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "RTCC,Real-Time Counter and Calendar access control bit" "0,1"
|
|
bitfld.long 0x00 22. "RMU,Reset Management Unit access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "PCNT0,Pulse Counter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 20. "LEUART0,Low Energy UART 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "LETIMER0,Low Energy Timer 0 access control bit" "0,1"
|
|
bitfld.long 0x00 18. "LESENSE,Low Energy Sensor Interface access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "LDMA,Linked Direct Memory Access Controller access control bit" "0,1"
|
|
bitfld.long 0x00 15. "MSC,Memory System Controller access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "I2C1,I2C 1 access control bit" "0,1"
|
|
bitfld.long 0x00 13. "I2C0,I2C 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "GPIO,General purpose Input/Output access control bit" "0,1"
|
|
bitfld.long 0x00 11. "GPCRC,General Purpose CRC access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "EMU,Energy Management Unit access control bit" "0,1"
|
|
bitfld.long 0x00 9. "PRS,Peripheral Reflex System access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "VDAC0,Digital to Analog Converter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 7. "CSEN,Capacitive touch sense module access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "CRYPTO0,Advanced Encryption Standard Accelerator access control bit" "0,1"
|
|
bitfld.long 0x00 5. "CRYOTIMER,CryoTimer access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "CMU,Clock Management Unit access control bit" "0,1"
|
|
bitfld.long 0x00 3. "CAN0,CAN 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "ADC0,Analog to Digital Converter 0 access control bit" "0,1"
|
|
bitfld.long 0x00 1. "ACMP1,Analog Comparator 1 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACMP0,Analog Comparator 0 access control bit" "0,1"
|
|
endif
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "PPUPATD1,PPU Privilege Access Type Descriptor 1"
|
|
bitfld.long 0x00 3. "WTIMER1,Wide Timer 1 access control bit" "0,1"
|
|
bitfld.long 0x00 2. "WTIMER0,Wide Timer 0 access control bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "WDOG0,Watchdog access control bit" "0,1"
|
|
bitfld.long 0x00 0. "USART3,Universal Synchronous/Asynchronous Receiver/Transmitter 3 access control bit" "0,1"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "PPUFS,PPU Fault Status"
|
|
hexmask.long.byte 0x00 0.--6. 1. "PERIPHID,"
|
|
tree.end
|
|
tree "TRNG0"
|
|
base ad:0x4001D000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CONTROL,Main Control Register"
|
|
bitfld.long 0x00 13. "BYPAIS31,AIS31 Start-up Test Bypass" "0,1"
|
|
bitfld.long 0x00 12. "BYPNIST,NIST Start-up Test Bypass" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "FORCERUN,Oscillator Force Run" "0,1"
|
|
bitfld.long 0x00 10. "ALMIEN,Interrupt enable for AIS31 noise alarm" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "PREIEN,Interrupt enable for AIS31 preliminary noise alarm" "0,1"
|
|
bitfld.long 0x00 8. "SOFTRESET,Software Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "FULLIEN,Interrupt Enable for FIFO Full" "0,1"
|
|
bitfld.long 0x00 6. "APT4096IEN,Interrupt Enable for Adaptive Proportion Test Failure (4096-sample Window)" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "APT64IEN,Interrupt Enable for Adaptive Proportion Test Failure (64-sample Window)" "0,1"
|
|
bitfld.long 0x00 4. "REPCOUNTIEN,Interrupt Enable for Repetition Count Test Failure" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "CONDBYPASS,Conditioning Bypass" "0,1"
|
|
bitfld.long 0x00 2. "TESTEN,Test Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ENABLE,TRNG Module Enable" "0,1"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "FIFOLEVEL,FIFO Level Register"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,FIFO Level"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "FIFODEPTH,FIFO Depth Register"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,FIFO Depth"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "KEY0,Key Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Key 0"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "KEY1,Key Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Key 1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "KEY2,Key Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Key 2"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "KEY3,Key Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Key 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TESTDATA,Test Data Register"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Test data input to conditioning function or to the continuous tests"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
rbitfld.long 0x00 9. "ALMIF,AIS31 Noise Alarm interrupt status" "0,1"
|
|
bitfld.long 0x00 8. "PREIF,AIS31 Preliminary Noise Alarm interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 7. "FULLIF,FIFO Full Interrupt Status" "0,1"
|
|
rbitfld.long 0x00 6. "APT4096IF,Adaptive Proportion test failure (4096-sample window) interrupt status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 5. "APT64IF,Adaptive Proportion test failure (64-sample window) interrupt status" "0,1"
|
|
rbitfld.long 0x00 4. "REPCOUNTIF,Repetition Count Test Interrupt Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x00 0. "TESTDATABUSY,Test Data Busy" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "INITWAITVAL,Initial Wait Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. "VALUE,Wait counter value"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "FIFO,FIFO Data"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,FIFO Read Data"
|
|
tree.end
|
|
tree "MTB"
|
|
base ad:0xF0040000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "POSITION,MTB Trace Position Register"
|
|
hexmask.long 0x00 3.--31. 1. "POINTER,Trace packet location pointer"
|
|
bitfld.long 0x00 2. "WRAP,Trace wrap bit" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MASTER,MTB Trace Control Register"
|
|
bitfld.long 0x00 31. "EN,Main trace enable bit" "0,1"
|
|
bitfld.long 0x00 9. "HALTREQ,Halt request bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "TSTOPEN,Trace stop input enable" "0,1"
|
|
bitfld.long 0x00 5. "TSTARTEN,Trace start input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "MASK,This value determines the maximum size of the trace buffer in SRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FLOW,MTB Trace Flow Register"
|
|
hexmask.long 0x00 3.--31. 1. "WATERMARK,WATERMARK value"
|
|
bitfld.long 0x00 1. "AUTOHALT,AUTOHALT enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "AUTOSTOP,AUTOSTOP enable" "0,1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "BASE,MTB Trace Base Register"
|
|
hexmask.long 0x00 0.--31. 1. "BASE,The ram base address"
|
|
tree.end
|
|
autoindent.off
|
|
newline
|