woody/Gen4_R-Car_Trace32
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
main
Gen4_R-Car_Trace32/2_Trunk/perat91sam9r.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

9772 lines
627 KiB
Plaintext
Raw Permalink Blame History

; --------------------------------------------------------------------------------
; @Title: AT91SAM9R(64,L64) On-Chip Peripherals
; @Props: Released
; @Author: MPO
; @Changelog: 2008-05-09 MPO
; @Manufacturer: ATMEL - Atmel Corporation
; @Doc: doc6289.pdf (2015-01-08)
; @Core: ARM926EJ-S
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perat91sam9r.per 7592 2017-02-18 13:54:14Z askoncej $
config 16. 8.
width 0x0b
tree "ARM Core Registers"
AUTOINDENT.PUSH
AUTOINDENT.OFF
width 8.
tree "ID Registers"
group c15:0x0000--0x0000
line.long 0x0 "MIDR,Identity Code"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
group c15:0x0100--0x0100
line.long 0x0 "CTR,Cache Type"
bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
textline " "
bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
textline " "
bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
group c15:0x0200--0x0200
line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
tree.end
tree "MMU Control and Configuration"
width 8.
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
textline " "
bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
textline " "
group c15:0x0002--0x0002
line.long 0x0 "TTBR,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
textline " "
group c15:0x3--0x3
line.long 0x0 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
textline " "
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
textline " "
group c15:0x0005--0x0005
line.long 0x0 "DFSR,Data Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0105--0x0105
line.long 0x0 "IFSR,Instruction Fault Status Register"
bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0006--0x0006
line.long 0x0 "DFAR,Data Fault Address Register"
textline " "
group c15:0x000a--0x000a
line.long 0x0 "TLBR,TLB Lockdown Register"
bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. " P ,P bit" "0,1"
textline " "
group c15:0x000d--0x000d
line.long 0x0 "FCSEPID,FCSE Process ID"
group c15:0x010d--0x010d
line.long 0x0 "CONTEXT,Context ID"
tree.end
tree "Cache Control and Configuration"
group c15:0x0009--0x0009
line.long 0x0 "DCACHE,Data Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
group c15:0x0109--0x0109
line.long 0x0 "ICACHE,Instruction Cache Lockdown"
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
tree.end
tree "TCM Control and Configuration"
group c15:0x0019--0x0019
line.long 0x0 "DTCM,Data TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
group c15:0x0119--0x0119
line.long 0x0 "ITCM,Instruction TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
tree.end
tree "Test and Debug"
group c15:0x000f--0x000f
line.long 0x0 "DOVRR,Debug Override Register"
bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
textline " "
bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
group c15:0x001f--0x001f
line.long 0x0 "ADDRESS,Debug/Test Address"
;wgroup c15:0x402f--0x402f
; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
;wgroup c15:0x403f--0x403f
; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
;wgroup c15:0x404f--0x404f
; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
;wgroup c15:0x405f--0x405f
; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
;wgroup c15:0x407f--0x407f
; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
;wgroup c15:0x412f--0x412f
; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
;wgroup c15:0x413f--0x413f
; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
;wgroup c15:0x414f--0x414f
; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
;wgroup c15:0x415f--0x415f
; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
;wgroup c15:0x417f--0x417f
; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
group c15:0x101f--0x101f
line.long 0x0 "TRACE,Trace Control"
bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
group c15:0x700f--0x700f
line.long 0x0 "CACHE,Cache Debug Control"
bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
group c15:0x701f--0x701f
line.long 0x0 "MMU,MMU Debug Control"
bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
textline " "
bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
group c15:0x002f--0x002f
line.long 0x0 "REMAP,Memory Region Remap"
bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
textline " "
bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
tree.end
tree "ICEbreaker"
width 8.
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
textline " "
bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
tree.end
AUTOINDENT.POP
tree.end
tree "RSTC (Reset Controller)"
base ad:0xfffffd00
width 9.
wgroup.long 0x00++0x3
line.long 0x00 "RSTC_CR,Reset Controller Control Register"
hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
bitfld.long 0x00 3. " EXTRST ,External Reset" "No effect,Reset"
textline " "
bitfld.long 0x00 2. " PERRST ,Peripheral Reset" "No effect,Reset"
bitfld.long 0x00 0. " PROCRST ,Processor Reset" "No effect,Reset"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
rgroup.long 0x04++0x3
line.long 0x00 "RSTC_SR,Reset Controller Status Register"
bitfld.long 0x00 17. " SRCMP ,Software Reset Command in Progress" "Not performed/ready,Performed/busy"
bitfld.long 0x00 16. " NRSTL ,NRST Pin Level" "Low,High"
textline " "
bitfld.long 0x00 8.--10. " RSTTYP ,Reset Type" "General Reset,Wake Up Reset,Watchdog Reset,Software Reset,User Reset,?..."
bitfld.long 0x00 0. " URSTS ,User Reset Status" "No high-to-low edge,High-to-low transition"
else
hgroup.long 0x04++0x3
hide.long 0x00 "RSTC_SR,Reset Controller Status Register"
in
endif
group.long 0x08++0x3
line.long 0x00 "RSTC_MR,Reset Controller Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
textline " "
sif (cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512")
bitfld.long 0x00 16. " BODIEN , Brownout Detection Interrupt Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 8.--11. " ERSTL ,External Reset Length" "2-cycles,4-cycles,8-cycles,16-cycles,32-cycles,64-cycles,128-cycles,256-cycles,512-cycles,1024-cycles,2048-cycles,4096-cycles,8192-cycles,16384-cycles,32768-cycles,65536-cycles"
sif (cpu()!="AT91SAM9X35"&&cpu()!="AT91SAM9X25"&&cpu()!="AT91SAM9N12"&&cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
bitfld.long 0x00 4. " URSTIEN ,User Reset Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " URSTEN ,User Reset Enable" "Disabled,Enabled"
endif
width 0xb
tree.end
tree "RTT (Real-Time Timer)"
base ad:0xfffffd20
width 11.
group.long 0x00++0x7
line.long 0x00 "RTT_MR,Real-Time Timer Mode Register"
bitfld.long 0x00 18. " RTTRST ,Real-Time Timer Restart" "No effect,Restarted"
bitfld.long 0x00 17. " RTTINCIEN ,Real-Time Timer Increment Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16. " ALMIEN ,Alarm Interrupt Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. " RTPRES ,Real-Time Timer Prescaler Value"
line.long 0x4 "RTT_AR,Real-Time Timer Alarm Register"
rgroup.long 0x08++0x3
line.long 0x00 "RTT_VR,Real-Time Timer Value Register"
hgroup.long 0x0c++0x3
hide.long 0x00 "RTT_SR,Real-time Timer Status Register"
in
width 0xb
tree.end
tree "PIT (Periodic Interval Timer)"
base ad:0xfffffd30
width 10.
group.long 0x00++0x3
line.long 0x00 "PIT_MR,Periodic Interval Timer Mode Register"
bitfld.long 0x00 25. " PITIEN ,Periodic Interval Timer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 24. " PITEN ,Period Interval Timer Enabled" "Disabled,Enabled"
hexmask.long.tbyte 0x00 0.--19. 1. 1. " PIV ,Periodic Interval Value"
sif (cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9M11")
hgroup.long 0x04++0x3
hide.long 0x00 "PIT_SR,Periodic Interval Timer Status Register"
in
hgroup.long 0x8++0x3
hide.long 0x0 "PIT_PIVR,Periodic Interval Timer Value Register"
in
hgroup.long 0xC++0x3
hide.long 0x0 "PIT_PIIR,Periodic Interval Timer Image Register"
in
else
rgroup.long 0x04++0x3
line.long 0x00 "PIT_SR,Periodic Interval Timer Status Register"
bitfld.long 0x00 0. " PITS ,Periodic Interval Timer Status" "Not reached,Reached"
hgroup.long 0x8++0x3
hide.long 0x0 "PIT_PIVR,Periodic Interval Timer Value Register"
in
rgroup.long 0xC++0x3
line.long 0x0 "PIT_PIIR,Periodic Interval Timer Image Register"
hexmask.long.word 0x0 20.--31. 1. " PICNT ,Periodic Interval Counter"
hexmask.long.tbyte 0x0 0.--19. 1. " CPIV ,Current Periodic Interval Value"
endif
width 0xb
tree.end
tree "WDT (Watchdog Timer)"
base ad:0xfffffd40
width 8.
wgroup.long 0x00++0x3
line.long 0x00 "WDT_CR,Watchdog Timer Control Register"
hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
bitfld.long 0x00 0. " WDRSTT ,Watchdog Restart" "No effect,Restart"
group.long 0x04++0x3
line.long 0x00 "WDT_MR,Watchdog Timer Mode Register"
bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog Idle Halt" "Running,Stopped"
bitfld.long 0x00 28. " WDDBGHLT ,Watchdog Debug Halt" "Running,Stopped"
textline " "
hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog Delta Value"
bitfld.long 0x00 15. " WDDIS ,Watchdog Disable" "No,Yes"
textline " "
bitfld.long 0x00 14. " WDRPROC ,Watchdog Processor Reset" "All,Processor"
bitfld.long 0x00 13. " WDRSTEN ,Watchdog Reset Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " WDFIEN ,Watchdog Fault Interrupt Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog Counter Value"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25")
rgroup.long 0x08++0x03
line.long 0x00 "WDT_SR,Watchdog Timer Status Register"
bitfld.long 0x00 1. " WDERR ,Watchdog Error" "Not occurred,Occurred"
bitfld.long 0x00 0. " WDUNF ,Watchdog Underflow" "Not occurred,Occurred"
else
hgroup.long 0x08++0x03
hide.long 0x00 "WDT_SR,Status Register"
in
endif
;wgroup 0x0++0x0
width 0xb
tree.end
tree "SHDWC (Shutdown Controller)"
base ad:0xfffffd10
width 9.
wgroup.long 0x00++0x3
line.long 0x00 "SHDW_CR,Shutdown Control Register"
hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password"
bitfld.long 0x00 0. " SHDW ,Shut Down Command" "No effect,Shut down"
group.long 0x04++0x3
line.long 0x00 "SHDW_MR,Shutdown Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 17. " RTCWKEN , Real-time Clock Wake-up Enable" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*"))
bitfld.long 0x00 16. " RTTWKEN ,Real-time Timer Wake-up Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 4.--7. " CPTWK0 ,Counter on Wake-Up 0" "1 cycle,17 cycles,33 cycles,49 cycles,65 cycles,81 cycles,97 cycles,113 cycles,129 cycles,145 cycles,161 cycles,177 cycles,193 cycles,209 cycles,225 cycles,241 cycles"
bitfld.long 0x00 0.--1. " WKMODE0 ,Wake-Up Mode 0" "No wake-up,Low/high,High/low,Both"
hgroup.long 0x08++0x3
hide.long 0x00 "SHDW_SR,Shutdown Status Register"
in
width 0xb
tree.end
tree "RTC (Real-time Clock)"
base ad:0xfffffe00
width 12.
group.long 0x00++0x7
line.long 0x00 "RTC_CR,Control Register"
sif (cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
bitfld.long 0x00 16.--17. " CALEVSEL ,Calendar Event Selection" "Week change,Month change,Year change,Year change"
bitfld.long 0x00 8.--9. " TIMEVSEL ,Time Event Selection" "Minute change,Hour change,Every day at midnight,Every day at noon"
textline " "
elif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
bitfld.long 0x00 16.--17. " CALEVSEL ,Calendar Event Selection" "Week change,Month change,Year change,?..."
bitfld.long 0x00 8.--9. " TIMEVSEL ,Time Event Selection" "Minute change,Hour change,Every day at midnight,Every day at noon"
textline " "
else
bitfld.long 0x00 16.--17. " CEVSEL ,Calendar Event Selection" "Week change,Month change,Year change,Year change"
bitfld.long 0x00 8.--9. " TEVSEL ,Time Event Selection" "Minute change,Hour change,Every day at midnight,Every day at noon"
textline " "
endif
bitfld.long 0x00 1. " UPDCAL ,Update Request Calendar Register" "No effect,Stopped"
bitfld.long 0x00 0. " UPDTIM ,Update Request Time Register" "No effect,Stopped"
line.long 0x04 "RTC_MR,Hour Mode Register"
bitfld.long 0x04 0. " HRMOD ,12/24 Hour Mode" "24,12"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
if (((data.long(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)&&((data.long(ad:0xfffffe00+0x08)&0x300000)==0x100000))
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM"
textline " "
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif ((data.long(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM"
textline " "
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x04)&0x00000001)==0x00000000)&&((data.long(ad:0xfffffe00+0x08)&0x300000)==0x200000))
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
else
if ((data.long(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM"
textline " "
sif (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G46")
bitfld.long 0x00 16.--21. " HOUR ,Current Hour" "-,1,2,3,4,5,6,7,8,9,10,11,12,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
else
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
group.long 0x08++0x3
line.long 0x00 "RTC_TIMR,Time Register"
sif (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G46")
bitfld.long 0x00 16.--21. " HOUR ,Current Hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
else
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
endif
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
if (((data.long(ad:0xfffffe00+0x0c)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x0c)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x0c)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif ((data.long(ad:0xfffffe00+0x0c)&0x100000)==0x100000)
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,-"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,-"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
else
group.long 0x0c++0x3
line.long 0x00 "RTC_CALR,Calendar Register"
bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 21.--23. " DAY ,Current Day" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
textline " "
bitfld.long 0x00 20. " MONTH ,Current Month" "0,1"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 12.--15. " YEAR ,Current Year" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "0,1,2,3,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (cpu()=="AT91SAM9M11")
textline " "
bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..."
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
textline " "
bitfld.long 0x00 4.--5. " CENT ,Current Century" "0,1,2,3"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
textline " "
endif
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
if (((d.l(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)&&((d.l(ad:0xfffffe00+0x10)&0x300000)==0x100000))
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif ((d.l(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((d.l(ad:0xfffffe00+0x04)&0x00000001)==0x00000000)&&((d.l(ad:0xfffffe00+0x10)&0x300000)==0x200000))
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
else
if ((d.l(ad:0xfffffe00+0x04)&0x00000001)==0x00000001)
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
else
group.long 0x10++0x03
line.long 0x00 "RTC_TIMALR,Time Alarm Register"
bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-"
bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
endif
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
if (((data.long(ad:0xfffffe00+0x14)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)==0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x100000)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x10000||0x30000||0x50000||0x70000||0x80000||0x100000||0x120000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif (((data.long(ad:0xfffffe00+0x14)&0x30000000)!=0x30000000)&&((data.long(ad:0xfffffe00+0x14)&0x100000)==0x0)&&((data.long(ad:0xfffffe00+0x14)&0x1f0000)==(0x40000||0x60000||0x90000||0x110000)))
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
elif ((data.long(ad:0xfffffe00+0x14)&0x100000)==0x100000)
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,-"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
else
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,-"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "-,1"
bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,-,-,-,?..."
endif
else
group.long 0x14++0x03
line.long 0x00 "RTC_CALALR,Calendar Alarm Register"
bitfld.long 0x00 31. " DATEEN ,Date Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " DATE ,Date Alarm" "0,1,2,3"
bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
bitfld.long 0x00 23. " MTHEN ,Month Alarm Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " MONTH ,Month Alarm" "0,1"
bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
textline " "
endif
width 12.
rgroup.long 0x18++0x03
line.long 0x00 "RTC_SR,Status Register"
bitfld.long 0x00 4. " CALEV ,Calendar Event" "Not occurred,Occurred"
bitfld.long 0x00 3. " TIMEV ,Time Event" "Not occurred,Occurred"
bitfld.long 0x00 2. " SEC ,Second Event" "Not occurred,Occurred"
textline " "
bitfld.long 0x00 1. " ALARM ,Alarm Flag" "Not occurred,Occurred"
bitfld.long 0x00 0. " ACKUPD ,Acknowledge for Update" "No,Yes"
wgroup.long 0x1c++0x03
line.long 0x00 "RTC_SCCR,Status Clear Register"
sif (cpu()=="AT91SAM9261")
bitfld.long 0x00 4. " CALCLR ,Calendar Event Interrupt Clear" "No effect,Cleared"
bitfld.long 0x00 3. " TIMCLR ,Time Event Interrupt Clear" "No effect,Cleared"
bitfld.long 0x00 2. " SECCLR ,Second Event Interrupt Clear" "No effect,Cleared"
textline " "
bitfld.long 0x00 1. " ALRCLR ,Alarm Flag Interrupt Clear" "No effect,Cleared"
bitfld.long 0x00 0. " ACKCLR ,Acknowledge for Update Interrupt Clear" "No effect,Cleared"
else
bitfld.long 0x00 4. " CALCLR ,Calendar Event Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 3. " TIMCLR ,Time Event Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " SECCLR ,Second Event Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " ALRCLR ,Alarm Flag Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 0. " ACKCLR ,Acknowledge for Update Interrupt Clear" "No effect,Clear"
endif
group.long 0x28++0x03
line.long 0x00 "RTC_IMR,Interrupt Mask Register"
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CAL_Set/Clr ,Calendar Event Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TIM_Set/Clr ,Time Event Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SEC_Set/Clr ,Second Event Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ALR_Set/Clr ,Alarm Flag Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ACK_Set/Clr ,Acknowledge for Update Interrupt Mask" "Disabled,Enabled"
sif (cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9M11")
hgroup.long 0x2C++0x03
hide.long 0x00 "RTC_VER,Valid Entry Register"
in
else
rgroup.long 0x2C++0x03
line.long 0x00 "RTC_VER,Valid Entry Register"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G46")
bitfld.long 0x00 3. " NVCALALR ,Non-Valid Calendar Alarm" "Not detected,Detected"
bitfld.long 0x00 2. " NVTIMALR ,Non-Valid Time Alarm" "Not detected,Detected"
textline " "
bitfld.long 0x00 1. " NVCAL ,Non-Valid Calendar" "Not detected,Detected"
bitfld.long 0x00 0. " NVTIM ,Non-Valid Time" "Not detected,Detected"
else
bitfld.long 0x00 3. " NVCAL ,Non-Valid Calendar Alarm" "Not detected,Detected"
bitfld.long 0x00 2. " NVTAL ,Non-Valid Time Alarm" "Not detected,Detected"
textline " "
bitfld.long 0x00 1. " NVC ,Non-Valid Calendar" "Not detected,Detected"
bitfld.long 0x00 0. " NVT ,Non-Valid Time" "Not detected,Detected"
endif
endif
width 0xB
tree.end
tree "Bus Matrix"
base ad:0xffffee00
width 14.
group.long 0x00++0x17
line.long 0x0 "MATRIX_MCFG0,Bus Matrix Master Configuration Register 0"
bitfld.long 0x0 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
line.long 0x4 "MATRIX_MCFG1,Bus Matrix Master Configuration Register 1"
bitfld.long 0x4 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
line.long 0x8 "MATRIX_MCFG2,Bus Matrix Master Configuration Register 2"
bitfld.long 0x8 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
line.long 0xC "MATRIX_MCFG3,Bus Matrix Master Configuration Register 3"
bitfld.long 0xC 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
line.long 0x10 "MATRIX_MCFG4,Bus Matrix Master Configuration Register 4"
bitfld.long 0x10 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
line.long 0x14 "MATRIX_MCFG5,Bus Matrix Master Configuration Register 5"
bitfld.long 0x14 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..."
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
group.long 0x40++0x17
line.long 0x0 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0"
bitfld.long 0x0 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x0 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x0 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x0 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x4 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1"
bitfld.long 0x4 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x4 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x4 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x4 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x8 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2"
bitfld.long 0x8 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x8 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x8 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x8 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0xC "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3"
bitfld.long 0xC 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0xC 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0xC 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0xC 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x10 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4"
bitfld.long 0x10 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x10 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x10 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x10 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x14 "MATRIX_SCFG5,Bus Matrix Slave Configuration Register 5"
bitfld.long 0x14 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x14 18.--21. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
bitfld.long 0x14 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x14 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
else
group.long 0x40++0x13
line.long 0x0 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0"
bitfld.long 0x0 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x0 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x0 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x0 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x4 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1"
bitfld.long 0x4 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x4 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x4 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x4 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x8 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2"
bitfld.long 0x8 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x8 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x8 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x8 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0xC "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3"
bitfld.long 0xC 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0xC 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0xC 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0xC 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
line.long 0x10 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4"
bitfld.long 0x10 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..."
textline " "
bitfld.long 0x10 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x10 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..."
hexmask.long.byte 0x10 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number"
endif
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
group.long 0x80++0x3
line.long 0x00 "MATRIX_PRAS0,Bus Matrix Priority Register A for Slave 0 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x88++0x3
line.long 0x00 "MATRIX_PRAS1,Bus Matrix Priority Register A for Slave 1 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x90++0x3
line.long 0x00 "MATRIX_PRAS2,Bus Matrix Priority Register A for Slave 2 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x98++0x3
line.long 0x00 "MATRIX_PRAS3,Bus Matrix Priority Register A for Slave 3 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0xA0++0x3
line.long 0x00 "MATRIX_PRAS4,Bus Matrix Priority Register A for Slave 4 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0xA8++0x3
line.long 0x00 "MATRIX_PRAS5,Bus Matrix Priority Register A for Slave 5 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
else
group.long 0x80++0x3
line.long 0x00 "MATRIX_PRAS0,Bus Matrix Priority Register A for Slave 0 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x88++0x3
line.long 0x00 "MATRIX_PRAS1,Bus Matrix Priority Register A for Slave 1 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x90++0x3
line.long 0x00 "MATRIX_PRAS2,Bus Matrix Priority Register A for Slave 2 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0x98++0x3
line.long 0x00 "MATRIX_PRAS3,Bus Matrix Priority Register A for Slave 3 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
group.long 0xA0++0x3
line.long 0x00 "MATRIX_PRAS4,Bus Matrix Priority Register A for Slave 4 Register"
bitfld.long 0x00 20.--21. " M5PR ,Master 5 Priority" "0,1,2,3"
bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "0,1,2,3"
bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "0,1,2,3"
textline " "
bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "0,1,2,3"
bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "0,1,2,3"
endif
width 14.
group.long 0x100++0x3
line.long 0x00 "MATRIX_MRCR,Master Remap Control Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 5. " RCB5 ,Remap Command Bit for AHB Master 5" "Disabled,Enabled"
bitfld.long 0x00 4. " RCB4 ,Remap Command Bit for AHB Master 4" "Disabled,Enabled"
textline " "
bitfld.long 0x00 3. " RCB3 ,Remap Command Bit for AHB Master 3" "Disabled,Enabled"
bitfld.long 0x00 2. " RCB2 ,Remap Command Bit for AHB Master 2" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 1. " RCB1 ,Remap Command Bit for AHB Master 1" "Disabled,Enabled"
bitfld.long 0x00 0. " RCB0 ,Remap Command Bit for AHB Master 0" "Disabled,Enabled"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
group.long 0x114++0x3
line.long 0x00 "MATRIX_TCR,Bus Matrix TCM Configuration Register"
bitfld.long 0x00 4.--7. " DTCM_SIZE ,DTCM Enabled Memory Block Size" "0-KB,Reserved,Reserved,Reserved,Reserved,16-KB,32-KB,?..."
bitfld.long 0x00 0.--3. " ITCM_SIZE ,ITCM Enabled Memory Block Size" "0-KB,Reserved,Reserved,Reserved,Reserved,16-KB,32-KB,?..."
endif
group.long 0x120++3
line.long 0x0 "EBI1_CSA,EBI Chip Select Assignment Register"
bitfld.long 0x0 16. " VDDIOMSEL ,Memory voltage selection" "1.8V,3.3V"
bitfld.long 0x0 8. " EBI_DBPUC ,EBI1 Data Bus Pull-Up Configuration" "Pulled-up,Not pulled-up"
textline " "
bitfld.long 0x00 5. " EBI_CS5A ,EBI Chip Select 5 Assignment" "SMC,SMC/CFL2"
bitfld.long 0x0 4. " EBI_CS4A ,EBI Chip Select 4 Assignment" "SMC,SMC/CFL1"
textline " "
bitfld.long 0x0 3. " EBI_CS3A ,EBI1 Chip Select 3 Assignment" "SMC,SMC/SML"
bitfld.long 0x0 1. " EBI_CS1A ,EBI1 Chip Select 1 Assignment" "SMC,SDRAMC"
width 0xb
tree.end
tree "SMC (Static Memory Controller)"
base ad:0xffffec00
width 0xC
tree "CS0"
group.long 0x0++0xB
line.long 0x00 "SMC_SETUP0,SMC Setup Register 0"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE0,SMC Pulse Register 0"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE0,SMC Cycle Register 0"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x0+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x0+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x0+0xC)))&0x3000)==0x2000)))
group.long (0x0+0xc)++0x3
line.long 0x00 "SMC_MODE0,SMC Mode Register 0"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x0+0xc)))&0x1000000)==0x1000000)
group.long (0x0+0xc)++0x3
line.long 0x00 "SMC_MODE0,SMC Mode Register 0"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x0+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x0+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x0+0xC)))&0x3000)==0x2000)))
group.long (0x0+0xc)++0x3
line.long 0x00 "SMC_MODE0,SMC Mode Register 0"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x0+0xc)++0x3
line.long 0x00 "SMC_MODE0,SMC Mode Register 0"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
tree "CS1"
group.long 0x10++0xB
line.long 0x00 "SMC_SETUP1,SMC Setup Register 1"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE1,SMC Pulse Register 1"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE1,SMC Cycle Register 1"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x10+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x10+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x10+0xC)))&0x3000)==0x2000)))
group.long (0x10+0xc)++0x3
line.long 0x00 "SMC_MODE1,SMC Mode Register 1"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x10+0xc)))&0x1000000)==0x1000000)
group.long (0x10+0xc)++0x3
line.long 0x00 "SMC_MODE1,SMC Mode Register 1"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x10+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x10+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x10+0xC)))&0x3000)==0x2000)))
group.long (0x10+0xc)++0x3
line.long 0x00 "SMC_MODE1,SMC Mode Register 1"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x10+0xc)++0x3
line.long 0x00 "SMC_MODE1,SMC Mode Register 1"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
tree "CS2"
group.long 0x20++0xB
line.long 0x00 "SMC_SETUP2,SMC Setup Register 2"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE2,SMC Pulse Register 2"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE2,SMC Cycle Register 2"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x20+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x20+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x20+0xC)))&0x3000)==0x2000)))
group.long (0x20+0xc)++0x3
line.long 0x00 "SMC_MODE2,SMC Mode Register 2"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x20+0xc)))&0x1000000)==0x1000000)
group.long (0x20+0xc)++0x3
line.long 0x00 "SMC_MODE2,SMC Mode Register 2"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x20+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x20+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x20+0xC)))&0x3000)==0x2000)))
group.long (0x20+0xc)++0x3
line.long 0x00 "SMC_MODE2,SMC Mode Register 2"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x20+0xc)++0x3
line.long 0x00 "SMC_MODE2,SMC Mode Register 2"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
tree "CS3"
group.long 0x30++0xB
line.long 0x00 "SMC_SETUP3,SMC Setup Register 3"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE3,SMC Pulse Register 3"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE3,SMC Cycle Register 3"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x30+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x30+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x30+0xC)))&0x3000)==0x2000)))
group.long (0x30+0xc)++0x3
line.long 0x00 "SMC_MODE3,SMC Mode Register 3"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x30+0xc)))&0x1000000)==0x1000000)
group.long (0x30+0xc)++0x3
line.long 0x00 "SMC_MODE3,SMC Mode Register 3"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x30+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x30+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x30+0xC)))&0x3000)==0x2000)))
group.long (0x30+0xc)++0x3
line.long 0x00 "SMC_MODE3,SMC Mode Register 3"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x30+0xc)++0x3
line.long 0x00 "SMC_MODE3,SMC Mode Register 3"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
tree "CS4"
group.long 0x40++0xB
line.long 0x00 "SMC_SETUP4,SMC Setup Register 4"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE4,SMC Pulse Register 4"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE4,SMC Cycle Register 4"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x40+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x40+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x40+0xC)))&0x3000)==0x2000)))
group.long (0x40+0xc)++0x3
line.long 0x00 "SMC_MODE4,SMC Mode Register 4"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x40+0xc)))&0x1000000)==0x1000000)
group.long (0x40+0xc)++0x3
line.long 0x00 "SMC_MODE4,SMC Mode Register 4"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x40+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x40+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x40+0xC)))&0x3000)==0x2000)))
group.long (0x40+0xc)++0x3
line.long 0x00 "SMC_MODE4,SMC Mode Register 4"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x40+0xc)++0x3
line.long 0x00 "SMC_MODE4,SMC Mode Register 4"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
tree "CS5"
group.long 0x50++0xB
line.long 0x00 "SMC_SETUP5,SMC Setup Register 5"
hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access"
hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length"
hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access"
textline " "
hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length"
line.long 0x4 "SMC_PULSE5,SMC Pulse Register 5"
hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access"
hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length"
hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access"
textline " "
hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length"
line.long 0x8 "SMC_CYCLE5,SMC Cycle Register 5"
hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length"
hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length"
if ((((d.l(ad:(0xffffec00+0x50+0xc)))&0x1000000)==0x1000000)&&((((d.l(ad:(0xffffec00+0x50+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x50+0xC)))&0x3000)==0x2000)))
group.long (0x50+0xc)++0x3
line.long 0x00 "SMC_MODE5,SMC Mode Register 5"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
textline " "
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif (((d.l(ad:(0xffffec00+0x50+0xc)))&0x1000000)==0x1000000)
group.long (0x50+0xc)++0x3
line.long 0x00 "SMC_MODE5,SMC Mode Register 5"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--29. " PS ,Page Size" "4-byte,8-byte,16-byte,32-byte"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
textline " "
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
elif ((((d.l(ad:(0xffffec00+0x50+0xc)))&0x1000000)==0x0000000)&&((((d.l(ad:(0xffffec00+0x50+0xC)))&0x3000)==0x1000)||(((d.l(ad:(0xffffec00+0x50+0xC)))&0x3000)==0x2000)))
group.long (0x50+0xc)++0x3
line.long 0x00 "SMC_MODE5,SMC Mode Register 5"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 8. " BAT ,Byte Access Type" "Select,Write"
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
textline " "
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
else
group.long (0x50+0xc)++0x3
line.long 0x00 "SMC_MODE5,SMC Mode Register 5"
bitfld.long 0x00 24. " PMEN ,Page Mode Enable" "Disabled,Enabled"
bitfld.long 0x00 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled"
bitfld.long 0x00 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x00 12.--13. " DBW ,Data Bus Width" "8-bit,16-bit,32-bit,?..."
bitfld.long 0x00 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,Reserved,Frozen,Ready"
bitfld.long 0x00 1. " WRITE_MODE ,Write Mode" "NCS,NWE"
textline " "
bitfld.long 0x00 0. " READ_MODE ,Read Mode" "NCS,NRD"
endif
tree.end
width 0xb
tree.end
tree "SDRAMC (SDRAM Controller)"
base ad:0xffffea00
width 12.
group.long 0x00++0xB
line.long 0x00 "SDRAMC_MR,SDRAMC Mode Register"
bitfld.long 0x00 0.--2. " MODE ,SDRAMC Command Mode" "Normal,NOP,All banks precharge,Load mode register,Auto-refresh,Extended load mode register,Deep power-down,?..."
line.long 0x4 "SDRAMC_TR,SDRAMC Refresh Timer Register"
hexmask.long.word 0x4 0.--11. 1. " COUNT ,SDRAMC Refresh Timer Count"
line.long 0x8 "SDRAMC_CR,SDRAMC Configuration Register"
bitfld.long 0x8 28.--31. " TXSR ,Exit Self Refresh to Active Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x8 24.--27. " TRAS ,Active to Precharge Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x8 20.--23. " TRCD ,Row to Column Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x8 16.--19. " TRP ,Row Precharge Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x8 12.--15. " TRC ,Row Cycle Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
bitfld.long 0x8 8.--11. " TWR ,Write Recovery Delay" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
textline " "
bitfld.long 0x8 7. " DBW ,Data Bus Width" "32,16"
bitfld.long 0x8 5.--6. " CAS ,CAS Latency" "Reserved,1,2,3"
textline " "
bitfld.long 0x8 4. " NB ,Number of Banks" "2 banks,4 banks"
bitfld.long 0x8 2.--3. " NR ,Number of Row Bits" "11 bits,12 bits,13 bits,?..."
textline " "
bitfld.long 0x8 0.--1. " NC ,Column Bits Number" "8 bits,9 bits,10 bits,11 bits"
group.long 0x10++0x3
line.long 0x00 "SDRAMC_LPR,SDRAMC Low Power Register"
bitfld.long 0x00 12.--13. " TIMEOUT ,Time to define when low-power mode is enabled" "Immediately,64 cycles,128 cycles,?..."
bitfld.long 0x00 10.--11. " DS ,Drive Strength" "0,1,2,3"
textline " "
bitfld.long 0x00 8.--9. " TCSR ,Temperature Compensated Self-Refresh" "0,1,2,3"
bitfld.long 0x00 4.--6. " PASR ,Partial Array Self-refresh" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 0.--1. " LPCB ,Low-power Configuration" "No low power,Self-refresh,Power-down,Deep power-down"
group.long 0x1c++0x3
line.long 0x0 "SDRAMC_IMR,SDRAMC Interrupt Mask Register"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " RES_set/clr ,Refresh Error Status" "Disabled,Enabled"
rgroup.long 0x20++0x3
line.long 0x0 "SDRAMC_ISR,SDRAMC Interrupt Status Register"
bitfld.long 0x00 0. " Res ,Refresh Error Status" "No error,Error"
group.long 0x24++0x3
line.long 0x0 "SDRAMC_MDR,SDRAMC Memory Device Register"
bitfld.long 0x0 0.--1. " MD ,Memory Device Type" "SDRAM,Low-power,?..."
width 0xb
tree.end
tree "ECC (Error Corrected Code)"
base ad:0xffffe800
width 0x9
wgroup.long 0x00++3
line.long 0x00 "ECC_CR,ECC Control Register"
bitfld.long 0x00 0. " RST ,RESET Parity" "No effect,Reset"
group.long 0x04++3
line.long 0x00 "ECC_MR,ECC Mode Register"
bitfld.long 0x00 0.--1. " PAGESIZE ,Page Size" "528 words,1056 words,2112 words,4224 words"
rgroup.long 0x08++0xb
line.long 0x00 "ECC_SR,ECC Status Register"
bitfld.long 0x00 2. " MULERR ,Multiple Error" "No error,Error"
bitfld.long 0x00 1. " ECCERR ,ECC Error" "No error,Error"
textline " "
bitfld.long 0x00 0. " RECERR ,Recoverable Error" "No error,Error"
line.long 0x04 "ECC_PR,ECC Parity Register"
hexmask.long.byte 0x04 0.--3. 1. " BITADDR ,Corrupted bit offset where an error occurred"
hexmask.long.word 0x04 4.--15. 1. " WORDADDR ,Word address where an error occurred"
line.long 0x08 "ECC_NPR,ECC NParity Register"
hexmask.long.word 0x08 0.--15. 1. " NPARITY ,NPARITY Value"
width 0xb
tree.end
tree "GPBR (General Purpose Backup Registers)"
base ad:0xfffffd60
width 0x7
group.long 0x00--0x13
line.long 0x00 "GPBR0,General Purpose Backup Registers 0"
line.long 0x04 "GPBR1,General Purpose Backup Registers 1"
line.long 0x08 "GPBR2,General Purpose Backup Registers 2"
line.long 0x0c "GPBR3,General Purpose Backup Registers 3"
tree.end
tree "SCKR (Slow Clock Configuration Register)"
base ad:0xfffffd50
width 0x10
group.long 0x00++0x3
line.long 0x00 "SDRAMC_MR,SDRAMC Mode Register"
bitfld.long 0x00 3. " OSCSEL , Slow clock selector" "Disabled,Enabled"
bitfld.long 0x00 2. " OSC32BYP , 32768Hz oscillator bypass" "Not bypassed,Bypassed"
textline " "
bitfld.long 0x00 1. " OSC32EN , 32768 Hz oscillator" "Disabled,Enabled"
bitfld.long 0x00 0. " RCEN , Internal RC" "Internal RC,32768 Hz"
tree.end
tree "PMC (Power Management Controller)"
base ad:0xfffffc00
width 11.
group.long 0x08++03
line.long 0x0 "PMC_SCSR,PMC System Clock Status Register"
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " PCK1_Clear/Set ,Programmable Clock 1 Output Status" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " PCK0_Clear/Set ,Programmable Clock 0 Output Status" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x0 "PMC_SCSR,PMC System Clock Disable Register "
bitfld.long 0x0 0. " PCK ,Processor Clock Disable" "No effect,Disabled"
rgroup.long 0x08++0x3
line.long 0x0 "PMC_SCSR,PMC System Clock Status Register"
bitfld.long 0x0 0. " PCK ,Processor Clock Status" "Disabled,Enabled"
group.long 0x18++0x3
line.long 0x0 "PMC_PCSR,PMC Peripheral Clock Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " PID31_Clear/Set ,Peripheral Clock 31 Status" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " PID30_Clear/Set ,Peripheral Clock 30 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " PID29_Clear/Set ,Peripheral Clock 29 Status" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " PID28_Clear/Set ,Peripheral Clock 28 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " PID27_Clear/Set ,Peripheral Clock 27 Status" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " PID26_Clear/Set ,Peripheral Clock 26 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " PID25_Clear/Set ,Peripheral Clock 25 Status" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " PID24_Clear/Set ,Peripheral Clock 24 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " PID23_Clear/Set ,Peripheral Clock 23 Status" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " PID22_Clear/Set ,Peripheral Clock 22 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " PID21_Clear/Set ,Peripheral Clock 21 Status" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " PID20_Clear/Set ,Peripheral Clock 20 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " PID19_Clear/Set ,Peripheral Clock 19 Status" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " PID18_Clear/Set ,Peripheral Clock 18 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " PID17_Clear/Set ,Peripheral Clock 17 Status" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " PID16_Clear/Set ,Peripheral Clock 16 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " PID15_Clear/Set ,Peripheral Clock 15 Status" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " PID14_Clear/Set ,Peripheral Clock 14 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " PID13_Clear/Set ,Peripheral Clock 13 Status" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " PID12_Clear/Set ,Peripheral Clock 12 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " PID11_Clear/Set ,Peripheral Clock 11 Status" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " PID10_Clear/Set ,Peripheral Clock 10 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " PID9_Clear/Set ,Peripheral Clock 9 Status" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " PID8_Clear/Set ,Peripheral Clock 8 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " PID7_Clear/Set ,Peripheral Clock 7 Status" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " PID6_Clear/Set ,Peripheral Clock 6 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " PID5_Clear/Set ,Peripheral Clock 5 Status" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " PID4_Clear/Set ,Peripheral Clock 4 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " PID3_Clear/Set ,Peripheral Clock 3 Status" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " PID2_Clear/Set ,Peripheral Clock 2 Status" "Disabled,Enabled"
group.long 0x1c++0x07
line.long 0x00 "CKGR_UCKR,PMC UTMI Clock Configuration Register"
bitfld.long 0x00 28.--31. " BIASCOUNT , UTMI BIAS Start-up Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24. " BIASEN , UTMI BIAS Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 20.--23. " PLLCOUNT , UTMI PLL Start-up Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16. " UPLLEN , UTMI PLL Enable" "Disabled,Enabled"
line.long 0x04 "CKGR_MOR,Main Oscillator Register"
hexmask.long.byte 0x04 8.--15. 1. " OSCOUNT ,Main Oscillator Start-up Time"
bitfld.long 0x04 1. " OSCBYPASS ,Oscillator Bypass" "No effect,Bypassed"
bitfld.long 0x04 0. " MOSCEN ,Main Oscillator Enable" "Disabled,Enabled"
rgroup.long 0x24++0x03
line.long 0x00 "CKGR_MCFR,Main Clock Frequency Register"
bitfld.long 0x00 16. " MAINRDY ,Main Clock Ready" "MAINF not valid,MAINF available"
hexmask.long.word 0x00 0.--15. 1. " MAINF ,Main Clock Frequency"
group.long 0x28++0x03
line.long 0x00 "CKGR_PLLR,PLL Register"
hexmask.long.word 0x00 16.--26. 1. " MUL ,PLL Multiplier"
bitfld.long 0x00 14.--15. " OUT ,PLL Clock Frequency Range" "80-200 MHz,Reserved,190-240 MHz,?..."
textline " "
hexmask.long.byte 0x00 8.--13. 1. " PLLCOUNT ,PLL Counter"
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Divider"
group.long 0x30++0x03
line.long 0x00 "PMC_MCKR,Master Clock Register"
bitfld.long 0x00 8.--9. " MDIV , Master Clock Division" "Clock,Clock/2,Clock/4,?..."
bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL Clock"
group.long 0x40++0x07
line.long 0x00 "PMC_PCK0,Programmable Clock 0 Register"
bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL Clock"
line.long 0x04 "PMC_PCK1,Programmable Clock 1 Register"
bitfld.long 0x04 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..."
bitfld.long 0x04 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL Clock"
rgroup.long 0x6c++0x03
line.long 0x00 "PMC_IMR,Interrupt Mask Register"
bitfld.long 0x00 9. " PCKRDY1 ,Programmable Clock Ready 1 Interrupt Mask" "Enabled,Disabled"
bitfld.long 0x00 8. " PCKRDY0 ,Programmable Clock Ready 0 Interrupt Mask" "Enabled,Disabled"
bitfld.long 0x00 6. " LOCKU , UTMI PLL Lock Interrupt Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 3. " MCKRDY ,Master Clock Ready Interrupt Mask" "Enabled,Disabled"
bitfld.long 0x00 1. " LOCK ,PLL Lock Interrupt Mask" "Enabled,Disabled"
bitfld.long 0x00 0. " MOSCS ,Main Oscillator Status Interrupt Mask" "Enabled,Disabled"
textline " "
width 16.
group.long 0x6c++0x03
line.long 0x00 "PMC_IMR_Set/Clr,Interrupt Enable/Mask Register"
setclrfld.long 0x00 9. -0x8 9. -0x4 9. " PCKRDY1 ,Programmable Clock Ready 1 Interrupt Mask" "Enabled,Disabled"
setclrfld.long 0x00 8. -0x8 8. -0x4 8. " PCKRDY0 ,Programmable Clock Ready 0 Interrupt Mask" "Enabled,Disabled"
textline " "
setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LOCKU ,UTMI PLL Lock Interrupt Enable" "Enabled,Disabled"
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " MCKRDY ,Master Clock Ready Interrupt Mask" "Enabled,Disabled"
textline " "
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOCK ,PLL Lock Interrupt Mask" "Enabled,Disabled"
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " MOSCS ,Main Oscillator Status Interrupt Mask" "Enabled,Disabled"
tree.end
tree "AIC (Advanced Interrupt Controller)"
base ad:0xfffff000
width 11.
tree "Source Mode Registers"
group.long 0x00++0x7f
line.long 0x0 "AIC_SMR0,AIC Source Mode Register 0"
bitfld.long 0x0 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
sif (cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G46")
bitfld.long 0x0 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
endif
line.long 0x4 "AIC_SMR1,AIC Source Mode Register 1"
bitfld.long 0x4 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x4 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x8 "AIC_SMR2,AIC Source Mode Register 2"
bitfld.long 0x8 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x8 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0xC "AIC_SMR3,AIC Source Mode Register 3"
bitfld.long 0xC 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0xC 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x10 "AIC_SMR4,AIC Source Mode Register 4"
bitfld.long 0x10 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x10 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x14 "AIC_SMR5,AIC Source Mode Register 5"
bitfld.long 0x14 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x14 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x18 "AIC_SMR6,AIC Source Mode Register 6"
bitfld.long 0x18 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x18 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x1C "AIC_SMR7,AIC Source Mode Register 7"
bitfld.long 0x1C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x1C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x20 "AIC_SMR8,AIC Source Mode Register 8"
bitfld.long 0x20 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x20 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x24 "AIC_SMR9,AIC Source Mode Register 9"
bitfld.long 0x24 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x24 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x28 "AIC_SMR10,AIC Source Mode Register 10"
bitfld.long 0x28 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x28 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x2C "AIC_SMR11,AIC Source Mode Register 11"
bitfld.long 0x2C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x2C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x30 "AIC_SMR12,AIC Source Mode Register 12"
bitfld.long 0x30 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x30 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x34 "AIC_SMR13,AIC Source Mode Register 13"
bitfld.long 0x34 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x34 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x38 "AIC_SMR14,AIC Source Mode Register 14"
bitfld.long 0x38 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x38 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x3C "AIC_SMR15,AIC Source Mode Register 15"
bitfld.long 0x3C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x3C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x40 "AIC_SMR16,AIC Source Mode Register 16"
bitfld.long 0x40 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x40 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x44 "AIC_SMR17,AIC Source Mode Register 17"
bitfld.long 0x44 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x44 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x48 "AIC_SMR18,AIC Source Mode Register 18"
bitfld.long 0x48 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x48 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x4C "AIC_SMR19,AIC Source Mode Register 19"
bitfld.long 0x4C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x4C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x50 "AIC_SMR20,AIC Source Mode Register 20"
bitfld.long 0x50 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x50 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x54 "AIC_SMR21,AIC Source Mode Register 21"
bitfld.long 0x54 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x54 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x58 "AIC_SMR22,AIC Source Mode Register 22"
bitfld.long 0x58 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x58 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x5C "AIC_SMR23,AIC Source Mode Register 23"
bitfld.long 0x5C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x5C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x60 "AIC_SMR24,AIC Source Mode Register 24"
bitfld.long 0x60 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x60 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x64 "AIC_SMR25,AIC Source Mode Register 25"
bitfld.long 0x64 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x64 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x68 "AIC_SMR26,AIC Source Mode Register 26"
bitfld.long 0x68 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x68 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x6C "AIC_SMR27,AIC Source Mode Register 27"
bitfld.long 0x6C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x6C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x70 "AIC_SMR28,AIC Source Mode Register 28"
bitfld.long 0x70 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x70 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x74 "AIC_SMR29,AIC Source Mode Register 29"
bitfld.long 0x74 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x74 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x78 "AIC_SMR30,AIC Source Mode Register 30"
bitfld.long 0x78 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x78 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
line.long 0x7C "AIC_SMR31,AIC Source Mode Register 31"
bitfld.long 0x7C 5.--6. " SRCTYPE ,Interrupt Source Type (Internal/External)" "High/low,Positive/negative,High/high,Positive/positive"
bitfld.long 0x7C 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest"
tree.end
tree "Source Vector Registers"
group.long 0x80++0x7f
textline ""
line.long 0x0 "AIC_SVR0 ,AIC Source Vector Register 0 "
textline ""
line.long 0x4 "AIC_SVR1 ,AIC Source Vector Register 1 "
textline ""
line.long 0x8 "AIC_SVR2 ,AIC Source Vector Register 2 "
textline ""
line.long 0xC "AIC_SVR3 ,AIC Source Vector Register 3 "
textline ""
line.long 0x10 "AIC_SVR4 ,AIC Source Vector Register 4 "
textline ""
line.long 0x14 "AIC_SVR5 ,AIC Source Vector Register 5 "
textline ""
line.long 0x18 "AIC_SVR6 ,AIC Source Vector Register 6 "
textline ""
line.long 0x1C "AIC_SVR7 ,AIC Source Vector Register 7 "
textline ""
line.long 0x20 "AIC_SVR8 ,AIC Source Vector Register 8 "
textline ""
line.long 0x24 "AIC_SVR9 ,AIC Source Vector Register 9 "
textline ""
line.long 0x28 "AIC_SVR10,AIC Source Vector Register 10"
textline ""
line.long 0x2C "AIC_SVR11,AIC Source Vector Register 11"
textline ""
line.long 0x30 "AIC_SVR12,AIC Source Vector Register 12"
textline ""
line.long 0x34 "AIC_SVR13,AIC Source Vector Register 13"
textline ""
line.long 0x38 "AIC_SVR14,AIC Source Vector Register 14"
textline ""
line.long 0x3C "AIC_SVR15,AIC Source Vector Register 15"
textline ""
line.long 0x40 "AIC_SVR16,AIC Source Vector Register 16"
textline ""
line.long 0x44 "AIC_SVR17,AIC Source Vector Register 17"
textline ""
line.long 0x48 "AIC_SVR18,AIC Source Vector Register 18"
textline ""
line.long 0x4C "AIC_SVR19,AIC Source Vector Register 19"
textline ""
line.long 0x50 "AIC_SVR20,AIC Source Vector Register 20"
textline ""
line.long 0x54 "AIC_SVR21,AIC Source Vector Register 21"
textline ""
line.long 0x58 "AIC_SVR22,AIC Source Vector Register 22"
textline ""
line.long 0x5C "AIC_SVR23,AIC Source Vector Register 23"
textline ""
line.long 0x60 "AIC_SVR24,AIC Source Vector Register 24"
textline ""
line.long 0x64 "AIC_SVR25,AIC Source Vector Register 25"
textline ""
line.long 0x68 "AIC_SVR26,AIC Source Vector Register 26"
textline ""
line.long 0x6C "AIC_SVR27,AIC Source Vector Register 27"
textline ""
line.long 0x70 "AIC_SVR28,AIC Source Vector Register 28"
textline ""
line.long 0x74 "AIC_SVR29,AIC Source Vector Register 29"
textline ""
line.long 0x78 "AIC_SVR30,AIC Source Vector Register 30"
textline ""
line.long 0x7C "AIC_SVR31,AIC Source Vector Register 31"
tree.end
textline " "
rgroup.long 0x100++0xB
line.long 0x00 "AIC_IVR,AIC Interrupt Vector Register"
line.long 0x04 "AIC_FVR,AIC FIQ Vector Register"
line.long 0x08 "AIC_ISR,AIC Interrupt Status Register"
bitfld.long 0x08 0.--4. " IRQID ,Current Interrupt Identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x10C++0x07
line.long 0x0 "AIC_IPR,AIC Interrupt Pending Register"
setclrfld.long 0x0 31. 0x20 31. 0x1C 31. " PID31_set/clr ,Interrupt 31 Pending" "Not pending,Pending"
setclrfld.long 0x0 30. 0x20 30. 0x1C 30. " PID30_set/clr ,Interrupt 30 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 29. 0x20 29. 0x1C 29. " PID29_set/clr ,Interrupt 29 Pending" "Not pending,Pending"
setclrfld.long 0x0 28. 0x20 28. 0x1C 28. " PID28_set/clr ,Interrupt 28 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 27. 0x20 27. 0x1C 27. " PID27_set/clr ,Interrupt 27 Pending" "Not pending,Pending"
setclrfld.long 0x0 26. 0x20 26. 0x1C 26. " PID26_set/clr ,Interrupt 26 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 25. 0x20 25. 0x1C 25. " PID25_set/clr ,Interrupt 25 Pending" "Not pending,Pending"
setclrfld.long 0x0 24. 0x20 24. 0x1C 24. " PID24_set/clr ,Interrupt 24 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 23. 0x20 23. 0x1C 23. " PID23_set/clr ,Interrupt 23 Pending" "Not pending,Pending"
setclrfld.long 0x0 22. 0x20 22. 0x1C 22. " PID22_set/clr ,Interrupt 22 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 21. 0x20 21. 0x1C 21. " PID21_set/clr ,Interrupt 21 Pending" "Not pending,Pending"
setclrfld.long 0x0 20. 0x20 20. 0x1C 20. " PID20_set/clr ,Interrupt 20 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 19. 0x20 19. 0x1C 19. " PID19_set/clr ,Interrupt 19 Pending" "Not pending,Pending"
setclrfld.long 0x0 18. 0x20 18. 0x1C 18. " PID18_set/clr ,Interrupt 18 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 17. 0x20 17. 0x1C 17. " PID17_set/clr ,Interrupt 17 Pending" "Not pending,Pending"
setclrfld.long 0x0 16. 0x20 16. 0x1C 16. " PID16_set/clr ,Interrupt 16 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 15. 0x20 15. 0x1C 15. " PID15_set/clr ,Interrupt 15 Pending" "Not pending,Pending"
setclrfld.long 0x0 14. 0x20 14. 0x1C 14. " PID14_set/clr ,Interrupt 14 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 13. 0x20 13. 0x1C 13. " PID13_set/clr ,Interrupt 13 Pending" "Not pending,Pending"
setclrfld.long 0x0 12. 0x20 12. 0x1C 12. " PID12_set/clr ,Interrupt 12 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 11. 0x20 11. 0x1C 11. " PID11_set/clr ,Interrupt 11 Pending" "Not pending,Pending"
setclrfld.long 0x0 10. 0x20 10. 0x1C 10. " PID10_set/clr ,Interrupt 10 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 9. 0x20 9. 0x1C 9. " PID9_set/clr ,Interrupt 9 Pending" "Not pending,Pending"
setclrfld.long 0x0 8. 0x20 8. 0x1C 8. " PID8_set/clr ,Interrupt 8 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 7. 0x20 7. 0x1C 7. " PID7_set/clr ,Interrupt 7 Pending" "Not pending,Pending"
setclrfld.long 0x0 6. 0x20 6. 0x1C 6. " PID6_set/clr ,Interrupt 6 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 5. 0x20 5. 0x1C 5. " PID5_set/clr ,Interrupt 5 Pending" "Not pending,Pending"
setclrfld.long 0x0 4. 0x20 4. 0x1C 4. " PID4_set/clr ,Interrupt 4 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 3. 0x20 3. 0x1C 3. " PID3_set/clr ,Interrupt 3 Pending" "Not pending,Pending"
setclrfld.long 0x0 2. 0x20 2. 0x1C 2. " PID2_set/clr ,Interrupt 2 Pending" "Not pending,Pending"
textline " "
setclrfld.long 0x0 1. 0x20 1. 0x1C 1. " SYS_set/clr ,SYS Interrupt Pending" "Not pending,Pending"
setclrfld.long 0x0 0. 0x20 0. 0x1C 0. " FIQ_set/clr ,FIQ Interrupt Pending" "Not pending,Pending"
line.long 0x4 "AIC_IMR,AIC Interrupt Mask Register"
setclrfld.long 0x4 31. 0x14 31. 0x18 31. " PID31_set/clr ,Interrupt 31 Mask" "Disabled,Enabled"
setclrfld.long 0x4 30. 0x14 30. 0x18 30. " PID30_set/clr ,Interrupt 30 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 29. 0x14 29. 0x18 29. " PID29_set/clr ,Interrupt 29 Mask" "Disabled,Enabled"
setclrfld.long 0x4 28. 0x14 28. 0x18 28. " PID28_set/clr ,Interrupt 28 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 27. 0x14 27. 0x18 27. " PID27_set/clr ,Interrupt 27 Mask" "Disabled,Enabled"
setclrfld.long 0x4 26. 0x14 26. 0x18 26. " PID26_set/clr ,Interrupt 26 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 25. 0x14 25. 0x18 25. " PID25_set/clr ,Interrupt 25 Mask" "Disabled,Enabled"
setclrfld.long 0x4 24. 0x14 24. 0x18 24. " PID24_set/clr ,Interrupt 24 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 23. 0x14 23. 0x18 23. " PID23_set/clr ,Interrupt 23 Mask" "Disabled,Enabled"
setclrfld.long 0x4 22. 0x14 22. 0x18 22. " PID22_set/clr ,Interrupt 22 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 21. 0x14 21. 0x18 21. " PID21_set/clr ,Interrupt 21 Mask" "Disabled,Enabled"
setclrfld.long 0x4 20. 0x14 20. 0x18 20. " PID20_set/clr ,Interrupt 20 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 19. 0x14 19. 0x18 19. " PID19_set/clr ,Interrupt 19 Mask" "Disabled,Enabled"
setclrfld.long 0x4 18. 0x14 18. 0x18 18. " PID18_set/clr ,Interrupt 18 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 17. 0x14 17. 0x18 17. " PID17_set/clr ,Interrupt 17 Mask" "Disabled,Enabled"
setclrfld.long 0x4 16. 0x14 16. 0x18 16. " PID16_set/clr ,Interrupt 16 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 15. 0x14 15. 0x18 15. " PID15_set/clr ,Interrupt 15 Mask" "Disabled,Enabled"
setclrfld.long 0x4 14. 0x14 14. 0x18 14. " PID14_set/clr ,Interrupt 14 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 13. 0x14 13. 0x18 13. " PID13_set/clr ,Interrupt 13 Mask" "Disabled,Enabled"
setclrfld.long 0x4 12. 0x14 12. 0x18 12. " PID12_set/clr ,Interrupt 12 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 11. 0x14 11. 0x18 11. " PID11_set/clr ,Interrupt 11 Mask" "Disabled,Enabled"
setclrfld.long 0x4 10. 0x14 10. 0x18 10. " PID10_set/clr ,Interrupt 10 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 9. 0x14 9. 0x18 9. " PID9_set/clr ,Interrupt 9 Mask" "Disabled,Enabled"
setclrfld.long 0x4 8. 0x14 8. 0x18 8. " PID8_set/clr ,Interrupt 8 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 7. 0x14 7. 0x18 7. " PID7_set/clr ,Interrupt 7 Mask" "Disabled,Enabled"
setclrfld.long 0x4 6. 0x14 6. 0x18 6. " PID6_set/clr ,Interrupt 6 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 5. 0x14 5. 0x18 5. " PID5_set/clr ,Interrupt 5 Mask" "Disabled,Enabled"
setclrfld.long 0x4 4. 0x14 4. 0x18 4. " PID4_set/clr ,Interrupt 4 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 3. 0x14 3. 0x18 3. " PID3_set/clr ,Interrupt 3 Mask" "Disabled,Enabled"
setclrfld.long 0x4 2. 0x14 2. 0x18 2. " PID2_set/clr ,Interrupt 2 Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x4 1. 0x14 1. 0x18 1. " SYS_set/clr ,SYS Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x4 0. 0x14 0. 0x18 0. " FIQ_set/clr ,FIQ Interrupt Mask" "Disabled,Enabled"
rgroup.long 0x114++0x3
line.long 0x0 "AIC_CISR,AIC Core Interrupt Status Register"
bitfld.long 0x0 1. " NIRQ ,NIRQ Status" "Deactivated,Activated"
bitfld.long 0x0 0. " NFIQ ,NFIQ Status" "Deactivated,Activated"
wgroup.long 0x130++0x3
line.long 0x0 "AIC_EOICR,AIC End of Interrupt Command Register"
group.long 0x134++0x07
line.long 0x00 "AIC_SPU,AIC Spurious Interrupt Vector Register"
line.long 0x04 "AIC_DEBUG,AIC Debug Control Register"
bitfld.long 0x04 1. " GMSK ,General Mask" "Not masked,Masked"
bitfld.long 0x04 0. " PROT ,Protection Mode" "Disabled,Enabled"
group.long 0x148++0x3
line.long 0x0 "AIC_FFSR,Fast Forcing Status Register"
setclrfld.long 0x0 31. -0x08 31. -0x4 31. " PID31_set/clr ,Interrupt 31 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x08 30. -0x4 30. " PID30_set/clr ,Interrupt 30 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x08 29. -0x4 29. " PID29_set/clr ,Interrupt 29 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x08 28. -0x4 28. " PID28_set/clr ,Interrupt 28 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x08 27. -0x4 27. " PID27_set/clr ,Interrupt 27 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x08 26. -0x4 26. " PID26_set/clr ,Interrupt 26 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x08 25. -0x4 25. " PID25_set/clr ,Interrupt 25 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x08 24. -0x4 24. " PID24_set/clr ,Interrupt 24 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x08 23. -0x4 23. " PID23_set/clr ,Interrupt 23 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x08 22. -0x4 22. " PID22_set/clr ,Interrupt 22 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x08 21. -0x4 21. " PID21_set/clr ,Interrupt 21 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x08 20. -0x4 20. " PID20_set/clr ,Interrupt 20 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x08 19. -0x4 19. " PID19_set/clr ,Interrupt 19 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x08 18. -0x4 18. " PID18_set/clr ,Interrupt 18 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x08 17. -0x4 17. " PID17_set/clr ,Interrupt 17 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x08 16. -0x4 16. " PID16_set/clr ,Interrupt 16 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x08 15. -0x4 15. " PID15_set/clr ,Interrupt 15 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x08 14. -0x4 14. " PID14_set/clr ,Interrupt 14 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x08 13. -0x4 13. " PID13_set/clr ,Interrupt 13 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x08 12. -0x4 12. " PID12_set/clr ,Interrupt 12 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x08 11. -0x4 11. " PID11_set/clr ,Interrupt 11 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x08 10. -0x4 10. " PID10_set/clr ,Interrupt 10 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x08 9. -0x4 9. " PID9_set/clr ,Interrupt 9 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x08 8. -0x4 8. " PID8_set/clr ,Interrupt 8 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x08 7. -0x4 7. " PID7_set/clr ,Interrupt 7 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " PID6_set/clr ,Interrupt 6 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " PID5_set/clr ,Interrupt 5 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " PID4_set/clr ,Interrupt 4 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x08 3. -0x4 3. " PID3_set/clr ,Interrupt 3 Fast Forcing Status" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x08 2. -0x4 2. " PID2_set/clr ,Interrupt 2 Fast Forcing Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " SYS_set/clr ,SYS Interrupt Fast Forcing Status" "Disabled,Enabled"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G35")
group.long 0x1e4++0x3
line.long 0x00 "AIC_WPMR,AIC Write Protect Mode Register"
hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY"
bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled"
hgroup.long 0x1e8++0x3
hide.long 0x00 "AIC_WPSR,AIC Write Protect Status Register"
in
endif
width 0xb
tree.end
tree.open "DBGU (Debug Unit)"
tree "DBGU"
base ad:0xfffff200
width 11.
wgroup.long 0x00++0x03
line.long 0x00 "DBGU_CR,Debug Unit Control Register"
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No,Yes"
textline " "
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable"
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No,Yes"
textline " "
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable"
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
textline " "
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
group.long 0x04++0x03
line.long 0x00 "DBGU_MR,Debug Unit Mode Register"
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic echo,Local loopback,Remote loopback"
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity"
group.long 0x10++0x3
line.long 0x0 "DBGU_IMR,Debug Unit Interrupt Mask Register"
setclrfld.long 0x0 31. -0x08 31. -0x4 31. " COMMRX_set/clr ,Mask COMMRX Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x08 30. -0x4 30. " COMMTX_set/clr ,Mask COMMTX Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9X35"&&cpu()!="AT91SAM9X25"&&cpu()!="AT91SAM9N12")
setclrfld.long 0x0 12. -0x08 12. -0x4 12. " RXBUFF_set/clr ,Mask RXBUFF Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 11. -0x08 11. -0x4 11. " TXBUFE_set/clr ,Mask TXBUFE Interrupt" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 9. -0x08 9. -0x4 9. " TXEMPTY_set/clr ,Mask TXEMPTY Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 7. -0x08 7. -0x4 7. " PARE_set/clr ,Mask Parity Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " FRAME_set/clr ,Mask Framing Error Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " OVRE_set/clr ,Mask Overrun Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9X35"&&cpu()!="AT91SAM9X25"&&cpu()!="AT91SAM9N12")
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " ENDTX_set/clr ,Mask End of Transmit Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 3. -0x08 3. -0x4 3. " ENDRX_set/clr ,Mask End of Receive Transfer Interrupt" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " TXRDY_set/clr ,Disable TXRDY Interrupt" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " RXRDY_set/clr ,Mask RXRDY Interrupt" "Disabled,Enabled"
sif (cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9M11")
hgroup.long 0x14++0x03
hide.long 0x0 "DBGU_SR,Debug Unit Status Register"
in
else
rgroup.long 0x14--0x17
line.long 0x0 "DBGU_SR,Debug Unit Status Register"
bitfld.long 0x0 31. " COMMRX ,Debug Communication Channel Read Status" "Inactive,Active"
bitfld.long 0x0 30. " COMMTX ,Debug Communication Channel Write Status" "Inactive,Active"
textline " "
sif (cpu()!="AT91SAM9X35"&&cpu()!="AT91SAM9X25")
bitfld.long 0x0 12. " RXBUFF ,Receive Buffer Full" "Inactive,Active"
bitfld.long 0x0 11. " TXBUFE ,Transmission Buffer Empty" "Inactive,Active"
textline " "
endif
bitfld.long 0x0 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty"
bitfld.long 0x0 7. " PARE ,Parity Error" "No error,Error"
textline " "
bitfld.long 0x0 6. " FRAME ,Framing Error" "No error,Error"
bitfld.long 0x0 5. " OVRE ,Overrun Error" "No error,Error"
textline " "
sif (cpu()!="AT91SAM9X35"&&cpu()!="AT91SAM9X25")
bitfld.long 0x0 4. " ENDTX ,End of Transmitter Transfer" "Inactive,Active"
bitfld.long 0x0 3. " ENDRX ,End of Receiver Transfer" "Inactive,Active"
textline " "
endif
bitfld.long 0x0 1. " TXRDY ,Transmitter Ready" "Not ready,Ready"
bitfld.long 0x0 0. " RXRDY ,Receiver Ready" "Not ready,Ready"
endif
hgroup.long 0x18--0x1B
hide.long 0x0 "DBGU_RHR,Debug Unit Receiver Holding Register"
in
wgroup.long 0x1c++0x03
line.long 0x00 "DBGU_THR,Debug Unit Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted"
group.long 0x20++0x03
line.long 0x00 "DBGU_BRGR,Debug Unit Baud Rate Generator Register"
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divisor"
rgroup.long 0x40++0x07
line.long 0x00 "DBGU_CIDR,Debug Unit Chip ID Register"
bitfld.long 0x00 31. " EXT ,Extension Flag" "Not extended,Extended"
bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "ROM,ROMless/on-chip Flash,Embedded Flash,ROM and Embedded,SRAM em ROM,?..."
textline " "
hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Architecture Identifier"
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9M11"||cpuis("AT91SAM9G*")||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9M46")
bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1K bytes,2K bytes,6K bytes,112K bytes,4K bytes,80K bytes,160K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,96K bytes,512K bytes"
else
bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1K bytes,2K bytes,Reserved,112K bytes,4K bytes,80K bytes,160K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,96K bytes,512K bytes"
endif
textline " "
bitfld.long 0x00 12.--15. " NVPSIZ2 ,Second Nonvolatile Program Memory Size" "None,8K bytes,16K bytes,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,512K bytes,Reserved,1024K bytes,Reserved,2048K bytes,?..."
bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile Program Memory Size" "None,8K bytes,16K bytes,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,512K bytes,Reserved,1024K bytes,Reserved,2048K bytes,?..."
textline " "
sif (cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9N12")
bitfld.long 0x00 5.--7. " EPROC ,Embedded Processor" "Reserved,ARM946ES,ARM7TDMI,Cortex-M3,ARM920T,ARM926EJS,Cortex-A5,?..."
else
bitfld.long 0x00 5.--7. " EPROC ,Embedded Processor" "Reserved,ARM946ES,ARM7TDMI,Reserved,ARM920T,ARM926EJS,?..."
endif
hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Version of the Device"
line.long 0x4 "DBGU_EXID,Debug Unit Chip ID Extension Register"
group.long 0x48++0x03
line.long 0x00 "DBGU_FNR,Debug Unit Force NTRST Register"
bitfld.long 0x00 0. " FNTRST ,Force NTRST" "Power-on reset,Held low"
width 0xb
tree.end
tree "PDC_DBGU"
base ad:0xfffff200
width 13.
group.long 0x100++0x1f
line.long 0x00 "DBGU_RPR,Debug_Unit Receive Pointer Register"
line.long 0x04 "DBGU_RCR,Debug_Unit Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "DBGU_TPR,Debug_Unit Transmit Pointer Register"
line.long 0x0c "DBGU_TCR,Debug_Unit Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "DBGU_RNPR,Debug_Unit Receive Next Pointer Register"
line.long 0x14 "DBGU_RNCR,Debug_Unit Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "DBGU_TNPR,Debug_Unit Transmit Next Pointer Register"
line.long 0x1c "DBGU_TNCR,Debug_Unit Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "DBGU_PTCR,Debug_Unit PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "DBGU_PTSR,Debug_Unit PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree.open "PIO (Parallel Input/Output Controller)"
tree "PIOA"
base ad:0xfffff400
width 11.
group.long 0x8++0x3
line.long 0x0 "PIOA_PSR,PIOA Controller PIO Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,PIO Status 31" "Inactive,Active"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,PIO Status 30" "Inactive,Active"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,PIO Status 29" "Inactive,Active"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,PIO Status 28" "Inactive,Active"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,PIO Status 27" "Inactive,Active"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,PIO Status 26" "Inactive,Active"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,PIO Status 25" "Inactive,Active"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,PIO Status 24" "Inactive,Active"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,PIO Status 23" "Inactive,Active"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,PIO Status 22" "Inactive,Active"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,PIO Status 21" "Inactive,Active"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,PIO Status 20" "Inactive,Active"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,PIO Status 19" "Inactive,Active"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,PIO Status 18" "Inactive,Active"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,PIO Status 17" "Inactive,Active"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,PIO Status 16" "Inactive,Active"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,PIO Status 15" "Inactive,Active"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,PIO Status 14" "Inactive,Active"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,PIO Status 13" "Inactive,Active"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,PIO Status 12" "Inactive,Active"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,PIO Status 11" "Inactive,Active"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,PIO Status 10" "Inactive,Active"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,PIO Status 9" "Inactive,Active"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,PIO Status 8" "Inactive,Active"
endif
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,PIO Status 7" "Inactive,Active"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,PIO Status 6" "Inactive,Active"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,PIO Status 5" "Inactive,Active"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,PIO Status 4" "Inactive,Active"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,PIO Status 3" "Inactive,Active"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,PIO Status 2" "Inactive,Active"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,PIO Status 1" "Inactive,Active"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,PIO Status 0" "Inactive,Active"
group.long 0x18++0x3
line.long 0x0 "PIOA_OSR,PIOA Controller Output Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Status 31" "Input,Output"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Status 30" "Input,Output"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Status 29" "Input,Output"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Status 28" "Input,Output"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Status 27" "Input,Output"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Status 26" "Input,Output"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Status 25" "Input,Output"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Status 24" "Input,Output"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Status 23" "Input,Output"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Status 22" "Input,Output"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
group.long 0x28++0x3
line.long 0x0 "PIOA_IFSR,PIOA Controller Input Filter Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Filter Status 31" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Filter Status 30" "Disabled,Enabled"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Filter Status 29" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Filter Status 28" "Disabled,Enabled"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Filter Status 27" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Filter Status 26" "Disabled,Enabled"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Filter Status 25" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Filter Status 24" "Disabled,Enabled"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Filter Status 23" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Filter Status 22" "Disabled,Enabled"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
group.long 0x38++0x3
line.long 0x0 "PIOA_ODSR,PIOA Controller Output Data Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Data Status 31" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Data Status 30" "Low,High"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Data Status 29" "Low,High"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Data Status 28" "Low,High"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Data Status 27" "Low,High"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Data Status 26" "Low,High"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Data Status 25" "Low,High"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Data Status 24" "Low,High"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Data Status 23" "Low,High"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Data Status 22" "Low,High"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
rgroup.long 0x3C++0x3
line.long 0x0 "PIOA_PDSR,PIOA Controller Pin Data Status Register"
bitfld.long 0x0 31. " P31 ,Output Data Status 31" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
bitfld.long 0x0 30. " P30 ,Output Data Status 30" "Low,High"
bitfld.long 0x0 29. " P29 ,Output Data Status 29" "Low,High"
textline " "
endif
bitfld.long 0x0 28. " P28 ,Output Data Status 28" "Low,High"
bitfld.long 0x0 27. " P27 ,Output Data Status 27" "Low,High"
textline " "
bitfld.long 0x0 26. " P26 ,Output Data Status 26" "Low,High"
bitfld.long 0x0 25. " P25 ,Output Data Status 25" "Low,High"
textline " "
bitfld.long 0x0 24. " P24 ,Output Data Status 24" "Low,High"
bitfld.long 0x0 23. " P23 ,Output Data Status 23" "Low,High"
textline " "
bitfld.long 0x0 22. " P22 ,Output Data Status 22" "Low,High"
bitfld.long 0x0 21. " P21 ,Output Data Status 21" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
bitfld.long 0x0 20. " P20 ,Output Data Status 20" "Low,High"
textline " "
endif
bitfld.long 0x0 19. " P19 ,Output Data Status 19" "Low,High"
bitfld.long 0x0 18. " P18 ,Output Data Status 18" "Low,High"
textline " "
bitfld.long 0x0 17. " P17 ,Output Data Status 17" "Low,High"
bitfld.long 0x0 16. " P16 ,Output Data Status 16" "Low,High"
textline " "
bitfld.long 0x0 15. " P15 ,Output Data Status 15" "Low,High"
bitfld.long 0x0 14. " P14 ,Output Data Status 14" "Low,High"
textline " "
bitfld.long 0x0 13. " P13 ,Output Data Status 13" "Low,High"
bitfld.long 0x0 12. " P12 ,Output Data Status 12" "Low,High"
textline " "
bitfld.long 0x0 11. " P11 ,Output Data Status 11" "Low,High"
bitfld.long 0x0 10. " P10 ,Output Data Status 10" "Low,High"
textline " "
sif (cpu()=="AT91SAM9RL64")
bitfld.long 0x0 9. " P9 ,Output Data Status 9" "Low,High"
bitfld.long 0x0 8. " P8 ,Output Data Status 8" "Low,High"
textline " "
endif
bitfld.long 0x0 7. " P7 ,Output Data Status 7" "Low,High"
bitfld.long 0x0 6. " P6 ,Output Data Status 6" "Low,High"
textline " "
bitfld.long 0x0 5. " P5 ,Output Data Status 5" "Low,High"
bitfld.long 0x0 4. " P4 ,Output Data Status 4" "Low,High"
textline " "
bitfld.long 0x0 3. " P3 ,Output Data Status 3" "Low,High"
bitfld.long 0x0 2. " P2 ,Output Data Status 2" "Low,High"
textline " "
bitfld.long 0x0 1. " P1 ,Output Data Status 1" "Low,High"
bitfld.long 0x0 0. " P0 ,Output Data Status 0" "Low,High"
group.long 0x48++0x3
line.long 0x0 "PIOA_IMR,PIOA Controller Interrupt Mask Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Change Interrupt Mask 31" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Change Interrupt Mask 30" "Disabled,Enabled"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Change Interrupt Mask 29" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Change Interrupt Mask 28" "Disabled,Enabled"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Change Interrupt Mask 27" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Change Interrupt Mask 26" "Disabled,Enabled"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Change Interrupt Mask 25" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Change Interrupt Mask 24" "Disabled,Enabled"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Change Interrupt Mask 23" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Change Interrupt Mask 22" "Disabled,Enabled"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
hgroup.long 0x4C++0x3
hide.long 0x0 "PIOA_ISR,PIOA Controller Interrupt Status Register"
in
group.long 0x58++0x3
line.long 0x0 "PIOA_MDSR,PIOA Multi-driver Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Multi Drive Status 31" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Multi Drive Status 30" "Disabled,Enabled"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Multi Drive Status 29" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Multi Drive Status 28" "Disabled,Enabled"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Multi Drive Status 27" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Multi Drive Status 26" "Disabled,Enabled"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Multi Drive Status 25" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Multi Drive Status 24" "Disabled,Enabled"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Multi Drive Status 23" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Multi Drive Status 22" "Disabled,Enabled"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
group.long 0x68++0x3
line.long 0x0 "PIOA_PUSR,PIOA Pull Up Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Pull Up Status 31" "Enabled,Disabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Pull Up Status 30" "Enabled,Disabled"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Pull Up Status 29" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Pull Up Status 28" "Enabled,Disabled"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Pull Up Status 27" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Pull Up Status 26" "Enabled,Disabled"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Pull Up Status 25" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Pull Up Status 24" "Enabled,Disabled"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Pull Up Status 23" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Pull Up Status 22" "Enabled,Disabled"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Pull Up Status 21" "Enabled,Disabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Pull Up Status 20" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Pull Up Status 19" "Enabled,Disabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Pull Up Status 18" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Pull Up Status 17" "Enabled,Disabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Pull Up Status 16" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Pull Up Status 15" "Enabled,Disabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Pull Up Status 14" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Pull Up Status 13" "Enabled,Disabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Pull Up Status 12" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Pull Up Status 11" "Enabled,Disabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Pull Up Status 10" "Enabled,Disabled"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Pull Up Status 9" "Enabled,Disabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Pull Up Status 8" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Pull Up Status 7" "Enabled,Disabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Pull Up Status 6" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Pull Up Status 5" "Enabled,Disabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Pull Up Status 4" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Pull Up Status 3" "Enabled,Disabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Pull Up Status 2" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Pull Up Status 1" "Enabled,Disabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Pull Up Status 0" "Enabled,Disabled"
group.long 0x78++0x3
line.long 0x0 "PIOA_ABSR,PIOA Peripheral A B Status Register"
setclrfld.long 0x0 31. -0x4 31. -0x8 31. " P31_Clear/Set ,Peripheral A B Status 31" "A,B"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x4 30. -0x8 30. " P30_Clear/Set ,Peripheral A B Status 30" "A,B"
setclrfld.long 0x0 29. -0x4 29. -0x8 29. " P29_Clear/Set ,Peripheral A B Status 29" "A,B"
textline " "
endif
setclrfld.long 0x0 28. -0x4 28. -0x8 28. " P28_Clear/Set ,Peripheral A B Status 28" "A,B"
setclrfld.long 0x0 27. -0x4 27. -0x8 27. " P27_Clear/Set ,Peripheral A B Status 27" "A,B"
textline " "
setclrfld.long 0x0 26. -0x4 26. -0x8 26. " P26_Clear/Set ,Peripheral A B Status 26" "A,B"
setclrfld.long 0x0 25. -0x4 25. -0x8 25. " P25_Clear/Set ,Peripheral A B Status 25" "A,B"
textline " "
setclrfld.long 0x0 24. -0x4 24. -0x8 24. " P24_Clear/Set ,Peripheral A B Status 24" "A,B"
setclrfld.long 0x0 23. -0x4 23. -0x8 23. " P23_Clear/Set ,Peripheral A B Status 23" "A,B"
textline " "
setclrfld.long 0x0 22. -0x4 22. -0x8 22. " P22_Clear/Set ,Peripheral A B Status 22" "A,B"
setclrfld.long 0x0 21. -0x4 21. -0x8 21. " P21_Clear/Set ,Peripheral A B Status 21" "A,B"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x4 20. -0x8 20. " P20_Clear/Set ,Peripheral A B Status 20" "A,B"
textline " "
endif
setclrfld.long 0x0 19. -0x4 19. -0x8 19. " P19_Clear/Set ,Peripheral A B Status 19" "A,B"
setclrfld.long 0x0 18. -0x4 18. -0x8 18. " P18_Clear/Set ,Peripheral A B Status 18" "A,B"
textline " "
setclrfld.long 0x0 17. -0x4 17. -0x8 17. " P17_Clear/Set ,Peripheral A B Status 17" "A,B"
setclrfld.long 0x0 16. -0x4 16. -0x8 16. " P16_Clear/Set ,Peripheral A B Status 16" "A,B"
textline " "
setclrfld.long 0x0 15. -0x4 15. -0x8 15. " P15_Clear/Set ,Peripheral A B Status 15" "A,B"
setclrfld.long 0x0 14. -0x4 14. -0x8 14. " P14_Clear/Set ,Peripheral A B Status 14" "A,B"
textline " "
setclrfld.long 0x0 13. -0x4 13. -0x8 13. " P13_Clear/Set ,Peripheral A B Status 13" "A,B"
setclrfld.long 0x0 12. -0x4 12. -0x8 12. " P12_Clear/Set ,Peripheral A B Status 12" "A,B"
textline " "
setclrfld.long 0x0 11. -0x4 11. -0x8 11. " P11_Clear/Set ,Peripheral A B Status 11" "A,B"
setclrfld.long 0x0 10. -0x4 10. -0x8 10. " P10_Clear/Set ,Peripheral A B Status 10" "A,B"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x4 9. -0x8 9. " P9_Clear/Set ,Peripheral A B Status 9" "A,B"
setclrfld.long 0x0 8. -0x4 8. -0x8 8. " P8_Clear/Set ,Peripheral A B Status 8" "A,B"
textline " "
endif
setclrfld.long 0x0 7. -0x4 7. -0x8 7. " P7_Clear/Set ,Peripheral A B Status 7" "A,B"
setclrfld.long 0x0 6. -0x4 6. -0x8 6. " P6_Clear/Set ,Peripheral A B Status 6" "A,B"
textline " "
setclrfld.long 0x0 5. -0x4 5. -0x8 5. " P5_Clear/Set ,Peripheral A B Status 5" "A,B"
setclrfld.long 0x0 4. -0x4 4. -0x8 4. " P4_Clear/Set ,Peripheral A B Status 4" "A,B"
textline " "
setclrfld.long 0x0 3. -0x4 3. -0x8 3. " P3_Clear/Set ,Peripheral A B Status 3" "A,B"
setclrfld.long 0x0 2. -0x4 2. -0x8 2. " P2_Clear/Set ,Peripheral A B Status 2" "A,B"
textline " "
setclrfld.long 0x0 1. -0x4 1. -0x8 1. " P1_Clear/Set ,Peripheral A B Status 1" "A,B"
setclrfld.long 0x0 0. -0x4 0. -0x8 0. " P0_Clear/Set ,Peripheral A B Status 0" "A,B"
group.long 0xA8++0x3
line.long 0x0 "PIOA_OWSR,PIOA Output Write Status Register"
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Write Status 31" "Not affected,Affected"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Write Status 30" "Not affected,Affected"
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Write Status 29" "Not affected,Affected"
textline " "
endif
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Write Status 28" "Not affected,Affected"
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Write Status 27" "Not affected,Affected"
textline " "
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Write Status 26" "Not affected,Affected"
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Write Status 25" "Not affected,Affected"
textline " "
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Write Status 24" "Not affected,Affected"
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Write Status 23" "Not affected,Affected"
textline " "
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Write Status 22" "Not affected,Affected"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Write Status 21" "Not affected,Affected"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Write Status 20" "Not affected,Affected"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Write Status 19" "Not affected,Affected"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Write Status 18" "Not affected,Affected"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Write Status 17" "Not affected,Affected"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Write Status 16" "Not affected,Affected"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Write Status 15" "Not affected,Affected"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Write Status 14" "Not affected,Affected"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Write Status 13" "Not affected,Affected"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Write Status 12" "Not affected,Affected"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Write Status 11" "Not affected,Affected"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Write Status 10" "Not affected,Affected"
textline " "
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Write Status 9" "Not affected,Affected"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Write Status 8" "Not affected,Affected"
textline " "
endif
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Write Status 7" "Not affected,Affected"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Write Status 6" "Not affected,Affected"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Write Status 5" "Not affected,Affected"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Write Status 4" "Not affected,Affected"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Write Status 3" "Not affected,Affected"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Write Status 2" "Not affected,Affected"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Write Status 1" "Not affected,Affected"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Write Status 0" "Not affected,Affected"
width 0xb
tree.end
tree "PIOB"
base ad:0xfffff600
width 11.
group.long 0x8++0x3
line.long 0x0 "PIOB_PSR,PIOB Controller PIO Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,PIO Status 31" "Inactive,Active"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,PIO Status 30" "Inactive,Active"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,PIO Status 29" "Inactive,Active"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,PIO Status 28" "Inactive,Active"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,PIO Status 27" "Inactive,Active"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,PIO Status 26" "Inactive,Active"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,PIO Status 25" "Inactive,Active"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,PIO Status 24" "Inactive,Active"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,PIO Status 23" "Inactive,Active"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,PIO Status 22" "Inactive,Active"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,PIO Status 21" "Inactive,Active"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,PIO Status 20" "Inactive,Active"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,PIO Status 19" "Inactive,Active"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,PIO Status 18" "Inactive,Active"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,PIO Status 17" "Inactive,Active"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,PIO Status 16" "Inactive,Active"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,PIO Status 15" "Inactive,Active"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,PIO Status 14" "Inactive,Active"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,PIO Status 13" "Inactive,Active"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,PIO Status 12" "Inactive,Active"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,PIO Status 11" "Inactive,Active"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,PIO Status 10" "Inactive,Active"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,PIO Status 9" "Inactive,Active"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,PIO Status 8" "Inactive,Active"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,PIO Status 7" "Inactive,Active"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,PIO Status 6" "Inactive,Active"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,PIO Status 5" "Inactive,Active"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,PIO Status 4" "Inactive,Active"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,PIO Status 3" "Inactive,Active"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,PIO Status 2" "Inactive,Active"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,PIO Status 1" "Inactive,Active"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,PIO Status 0" "Inactive,Active"
group.long 0x18++0x3
line.long 0x0 "PIOB_OSR,PIOB Controller Output Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Status 31" "Input,Output"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Status 30" "Input,Output"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Status 29" "Input,Output"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Status 28" "Input,Output"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Status 27" "Input,Output"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Status 26" "Input,Output"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Status 25" "Input,Output"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Status 24" "Input,Output"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Status 23" "Input,Output"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Status 22" "Input,Output"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
group.long 0x28++0x3
line.long 0x0 "PIOB_IFSR,PIOB Controller Input Filter Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Filter Status 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Filter Status 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Filter Status 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Filter Status 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Filter Status 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Filter Status 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Filter Status 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Filter Status 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Filter Status 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Filter Status 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
group.long 0x38++0x3
line.long 0x0 "PIOB_ODSR,PIOB Controller Output Data Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Data Status 31" "Low,High"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Data Status 30" "Low,High"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Data Status 29" "Low,High"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Data Status 28" "Low,High"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Data Status 27" "Low,High"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Data Status 26" "Low,High"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Data Status 25" "Low,High"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Data Status 24" "Low,High"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Data Status 23" "Low,High"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Data Status 22" "Low,High"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
rgroup.long 0x3C++0x3
line.long 0x0 "PIOB_PDSR,PIOB Controller Pin Data Status Register"
sif (cpu()=="AT91SAM9RL64")
bitfld.long 0x0 31. " P31 ,Output Data Status 31" "Low,High"
bitfld.long 0x0 30. " P30 ,Output Data Status 30" "Low,High"
textline " "
bitfld.long 0x0 29. " P29 ,Output Data Status 29" "Low,High"
bitfld.long 0x0 28. " P28 ,Output Data Status 28" "Low,High"
textline " "
bitfld.long 0x0 27. " P27 ,Output Data Status 27" "Low,High"
bitfld.long 0x0 26. " P26 ,Output Data Status 26" "Low,High"
textline " "
bitfld.long 0x0 25. " P25 ,Output Data Status 25" "Low,High"
bitfld.long 0x0 24. " P24 ,Output Data Status 24" "Low,High"
textline " "
bitfld.long 0x0 23. " P23 ,Output Data Status 23" "Low,High"
bitfld.long 0x0 22. " P22 ,Output Data Status 22" "Low,High"
textline " "
bitfld.long 0x0 21. " P21 ,Output Data Status 21" "Low,High"
bitfld.long 0x0 20. " P20 ,Output Data Status 20" "Low,High"
textline " "
bitfld.long 0x0 19. " P19 ,Output Data Status 19" "Low,High"
bitfld.long 0x0 18. " P18 ,Output Data Status 18" "Low,High"
textline " "
bitfld.long 0x0 17. " P17 ,Output Data Status 17" "Low,High"
bitfld.long 0x0 16. " P16 ,Output Data Status 16" "Low,High"
textline " "
endif
bitfld.long 0x0 15. " P15 ,Output Data Status 15" "Low,High"
bitfld.long 0x0 14. " P14 ,Output Data Status 14" "Low,High"
textline " "
bitfld.long 0x0 13. " P13 ,Output Data Status 13" "Low,High"
bitfld.long 0x0 12. " P12 ,Output Data Status 12" "Low,High"
textline " "
bitfld.long 0x0 11. " P11 ,Output Data Status 11" "Low,High"
bitfld.long 0x0 10. " P10 ,Output Data Status 10" "Low,High"
textline " "
bitfld.long 0x0 9. " P9 ,Output Data Status 9" "Low,High"
bitfld.long 0x0 8. " P8 ,Output Data Status 8" "Low,High"
textline " "
bitfld.long 0x0 7. " P7 ,Output Data Status 7" "Low,High"
bitfld.long 0x0 6. " P6 ,Output Data Status 6" "Low,High"
textline " "
bitfld.long 0x0 5. " P5 ,Output Data Status 5" "Low,High"
bitfld.long 0x0 4. " P4 ,Output Data Status 4" "Low,High"
textline " "
bitfld.long 0x0 3. " P3 ,Output Data Status 3" "Low,High"
bitfld.long 0x0 2. " P2 ,Output Data Status 2" "Low,High"
textline " "
bitfld.long 0x0 1. " P1 ,Output Data Status 1" "Low,High"
bitfld.long 0x0 0. " P0 ,Output Data Status 0" "Low,High"
group.long 0x48++0x3
line.long 0x0 "PIOB_IMR,PIOB Controller Interrupt Mask Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Change Interrupt Mask 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Change Interrupt Mask 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Change Interrupt Mask 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Change Interrupt Mask 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Change Interrupt Mask 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Change Interrupt Mask 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Change Interrupt Mask 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Change Interrupt Mask 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Change Interrupt Mask 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Change Interrupt Mask 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
hgroup.long 0x4C++0x3
hide.long 0x0 "PIOB_ISR,PIOB Controller Interrupt Status Register"
in
group.long 0x58++0x3
line.long 0x0 "PIOB_MDSR,PIOB Multi-driver Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Multi Drive Status 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Multi Drive Status 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Multi Drive Status 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Multi Drive Status 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Multi Drive Status 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Multi Drive Status 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Multi Drive Status 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Multi Drive Status 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Multi Drive Status 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Multi Drive Status 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
group.long 0x68++0x3
line.long 0x0 "PIOB_PUSR,PIOB Pull Up Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Pull Up Status 31" "Enabled,Disabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Pull Up Status 30" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Pull Up Status 29" "Enabled,Disabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Pull Up Status 28" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Pull Up Status 27" "Enabled,Disabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Pull Up Status 26" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Pull Up Status 25" "Enabled,Disabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Pull Up Status 24" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Pull Up Status 23" "Enabled,Disabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Pull Up Status 22" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Pull Up Status 21" "Enabled,Disabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Pull Up Status 20" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Pull Up Status 19" "Enabled,Disabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Pull Up Status 18" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Pull Up Status 17" "Enabled,Disabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Pull Up Status 16" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Pull Up Status 15" "Enabled,Disabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Pull Up Status 14" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Pull Up Status 13" "Enabled,Disabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Pull Up Status 12" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Pull Up Status 11" "Enabled,Disabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Pull Up Status 10" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Pull Up Status 9" "Enabled,Disabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Pull Up Status 8" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Pull Up Status 7" "Enabled,Disabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Pull Up Status 6" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Pull Up Status 5" "Enabled,Disabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Pull Up Status 4" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Pull Up Status 3" "Enabled,Disabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Pull Up Status 2" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Pull Up Status 1" "Enabled,Disabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Pull Up Status 0" "Enabled,Disabled"
group.long 0x78++0x3
line.long 0x0 "PIOB_ABSR,PIOB Peripheral A B Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x4 31. -0x8 31. " P31_Clear/Set ,Peripheral A B Status 31" "A,B"
setclrfld.long 0x0 30. -0x4 30. -0x8 30. " P30_Clear/Set ,Peripheral A B Status 30" "A,B"
textline " "
setclrfld.long 0x0 29. -0x4 29. -0x8 29. " P29_Clear/Set ,Peripheral A B Status 29" "A,B"
setclrfld.long 0x0 28. -0x4 28. -0x8 28. " P28_Clear/Set ,Peripheral A B Status 28" "A,B"
textline " "
setclrfld.long 0x0 27. -0x4 27. -0x8 27. " P27_Clear/Set ,Peripheral A B Status 27" "A,B"
setclrfld.long 0x0 26. -0x4 26. -0x8 26. " P26_Clear/Set ,Peripheral A B Status 26" "A,B"
textline " "
setclrfld.long 0x0 25. -0x4 25. -0x8 25. " P25_Clear/Set ,Peripheral A B Status 25" "A,B"
setclrfld.long 0x0 24. -0x4 24. -0x8 24. " P24_Clear/Set ,Peripheral A B Status 24" "A,B"
textline " "
setclrfld.long 0x0 23. -0x4 23. -0x8 23. " P23_Clear/Set ,Peripheral A B Status 23" "A,B"
setclrfld.long 0x0 22. -0x4 22. -0x8 22. " P22_Clear/Set ,Peripheral A B Status 22" "A,B"
textline " "
setclrfld.long 0x0 21. -0x4 21. -0x8 21. " P21_Clear/Set ,Peripheral A B Status 21" "A,B"
setclrfld.long 0x0 20. -0x4 20. -0x8 20. " P20_Clear/Set ,Peripheral A B Status 20" "A,B"
textline " "
setclrfld.long 0x0 19. -0x4 19. -0x8 19. " P19_Clear/Set ,Peripheral A B Status 19" "A,B"
setclrfld.long 0x0 18. -0x4 18. -0x8 18. " P18_Clear/Set ,Peripheral A B Status 18" "A,B"
textline " "
setclrfld.long 0x0 17. -0x4 17. -0x8 17. " P17_Clear/Set ,Peripheral A B Status 17" "A,B"
setclrfld.long 0x0 16. -0x4 16. -0x8 16. " P16_Clear/Set ,Peripheral A B Status 16" "A,B"
textline " "
endif
setclrfld.long 0x0 15. -0x4 15. -0x8 15. " P15_Clear/Set ,Peripheral A B Status 15" "A,B"
setclrfld.long 0x0 14. -0x4 14. -0x8 14. " P14_Clear/Set ,Peripheral A B Status 14" "A,B"
textline " "
setclrfld.long 0x0 13. -0x4 13. -0x8 13. " P13_Clear/Set ,Peripheral A B Status 13" "A,B"
setclrfld.long 0x0 12. -0x4 12. -0x8 12. " P12_Clear/Set ,Peripheral A B Status 12" "A,B"
textline " "
setclrfld.long 0x0 11. -0x4 11. -0x8 11. " P11_Clear/Set ,Peripheral A B Status 11" "A,B"
setclrfld.long 0x0 10. -0x4 10. -0x8 10. " P10_Clear/Set ,Peripheral A B Status 10" "A,B"
textline " "
setclrfld.long 0x0 9. -0x4 9. -0x8 9. " P9_Clear/Set ,Peripheral A B Status 9" "A,B"
setclrfld.long 0x0 8. -0x4 8. -0x8 8. " P8_Clear/Set ,Peripheral A B Status 8" "A,B"
textline " "
setclrfld.long 0x0 7. -0x4 7. -0x8 7. " P7_Clear/Set ,Peripheral A B Status 7" "A,B"
setclrfld.long 0x0 6. -0x4 6. -0x8 6. " P6_Clear/Set ,Peripheral A B Status 6" "A,B"
textline " "
setclrfld.long 0x0 5. -0x4 5. -0x8 5. " P5_Clear/Set ,Peripheral A B Status 5" "A,B"
setclrfld.long 0x0 4. -0x4 4. -0x8 4. " P4_Clear/Set ,Peripheral A B Status 4" "A,B"
textline " "
setclrfld.long 0x0 3. -0x4 3. -0x8 3. " P3_Clear/Set ,Peripheral A B Status 3" "A,B"
setclrfld.long 0x0 2. -0x4 2. -0x8 2. " P2_Clear/Set ,Peripheral A B Status 2" "A,B"
textline " "
setclrfld.long 0x0 1. -0x4 1. -0x8 1. " P1_Clear/Set ,Peripheral A B Status 1" "A,B"
setclrfld.long 0x0 0. -0x4 0. -0x8 0. " P0_Clear/Set ,Peripheral A B Status 0" "A,B"
group.long 0xA8++0x3
line.long 0x0 "PIOB_OWSR,PIOB Output Write Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Write Status 31" "Not affected,Affected"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Write Status 30" "Not affected,Affected"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Write Status 29" "Not affected,Affected"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Write Status 28" "Not affected,Affected"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Write Status 27" "Not affected,Affected"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Write Status 26" "Not affected,Affected"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Write Status 25" "Not affected,Affected"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Write Status 24" "Not affected,Affected"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Write Status 23" "Not affected,Affected"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Write Status 22" "Not affected,Affected"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Write Status 21" "Not affected,Affected"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Write Status 20" "Not affected,Affected"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Write Status 19" "Not affected,Affected"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Write Status 18" "Not affected,Affected"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Write Status 17" "Not affected,Affected"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Write Status 16" "Not affected,Affected"
textline " "
endif
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Write Status 15" "Not affected,Affected"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Write Status 14" "Not affected,Affected"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Write Status 13" "Not affected,Affected"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Write Status 12" "Not affected,Affected"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Write Status 11" "Not affected,Affected"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Write Status 10" "Not affected,Affected"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Write Status 9" "Not affected,Affected"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Write Status 8" "Not affected,Affected"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Write Status 7" "Not affected,Affected"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Write Status 6" "Not affected,Affected"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Write Status 5" "Not affected,Affected"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Write Status 4" "Not affected,Affected"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Write Status 3" "Not affected,Affected"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Write Status 2" "Not affected,Affected"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Write Status 1" "Not affected,Affected"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Write Status 0" "Not affected,Affected"
width 0xb
tree.end
tree "PIOC"
base ad:0xfffff800
width 11.
group.long 0x8++0x3
line.long 0x0 "PIOC_PSR,PIOC Controller PIO Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,PIO Status 31" "Inactive,Active"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,PIO Status 30" "Inactive,Active"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,PIO Status 29" "Inactive,Active"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,PIO Status 28" "Inactive,Active"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,PIO Status 27" "Inactive,Active"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,PIO Status 26" "Inactive,Active"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,PIO Status 25" "Inactive,Active"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,PIO Status 24" "Inactive,Active"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,PIO Status 23" "Inactive,Active"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,PIO Status 22" "Inactive,Active"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,PIO Status 21" "Inactive,Active"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,PIO Status 20" "Inactive,Active"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,PIO Status 19" "Inactive,Active"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,PIO Status 18" "Inactive,Active"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,PIO Status 17" "Inactive,Active"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,PIO Status 16" "Inactive,Active"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,PIO Status 15" "Inactive,Active"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,PIO Status 14" "Inactive,Active"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,PIO Status 13" "Inactive,Active"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,PIO Status 12" "Inactive,Active"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,PIO Status 11" "Inactive,Active"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,PIO Status 10" "Inactive,Active"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,PIO Status 9" "Inactive,Active"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,PIO Status 8" "Inactive,Active"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,PIO Status 7" "Inactive,Active"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,PIO Status 6" "Inactive,Active"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,PIO Status 5" "Inactive,Active"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,PIO Status 4" "Inactive,Active"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,PIO Status 3" "Inactive,Active"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,PIO Status 2" "Inactive,Active"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,PIO Status 1" "Inactive,Active"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,PIO Status 0" "Inactive,Active"
group.long 0x18++0x3
line.long 0x0 "PIOC_OSR,PIOC Controller Output Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Status 31" "Input,Output"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Status 30" "Input,Output"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Status 29" "Input,Output"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Status 28" "Input,Output"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Status 27" "Input,Output"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Status 26" "Input,Output"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Status 25" "Input,Output"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Status 24" "Input,Output"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Status 23" "Input,Output"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Status 22" "Input,Output"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
group.long 0x28++0x3
line.long 0x0 "PIOC_IFSR,PIOC Controller Input Filter Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Filter Status 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Filter Status 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Filter Status 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Filter Status 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Filter Status 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Filter Status 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Filter Status 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Filter Status 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Filter Status 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Filter Status 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
group.long 0x38++0x3
line.long 0x0 "PIOC_ODSR,PIOC Controller Output Data Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Data Status 31" "Low,High"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Data Status 30" "Low,High"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Data Status 29" "Low,High"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Data Status 28" "Low,High"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Data Status 27" "Low,High"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Data Status 26" "Low,High"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Data Status 25" "Low,High"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Data Status 24" "Low,High"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Data Status 23" "Low,High"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Data Status 22" "Low,High"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
rgroup.long 0x3C++0x3
line.long 0x0 "PIOC_PDSR,PIOC Controller Pin Data Status Register"
sif (cpu()=="AT91SAM9RL64")
bitfld.long 0x0 31. " P31 ,Output Data Status 31" "Low,High"
bitfld.long 0x0 30. " P30 ,Output Data Status 30" "Low,High"
textline " "
bitfld.long 0x0 29. " P29 ,Output Data Status 29" "Low,High"
bitfld.long 0x0 28. " P28 ,Output Data Status 28" "Low,High"
textline " "
bitfld.long 0x0 27. " P27 ,Output Data Status 27" "Low,High"
bitfld.long 0x0 26. " P26 ,Output Data Status 26" "Low,High"
textline " "
bitfld.long 0x0 25. " P25 ,Output Data Status 25" "Low,High"
bitfld.long 0x0 24. " P24 ,Output Data Status 24" "Low,High"
textline " "
bitfld.long 0x0 23. " P23 ,Output Data Status 23" "Low,High"
bitfld.long 0x0 22. " P22 ,Output Data Status 22" "Low,High"
textline " "
bitfld.long 0x0 21. " P21 ,Output Data Status 21" "Low,High"
bitfld.long 0x0 20. " P20 ,Output Data Status 20" "Low,High"
textline " "
bitfld.long 0x0 19. " P19 ,Output Data Status 19" "Low,High"
bitfld.long 0x0 18. " P18 ,Output Data Status 18" "Low,High"
textline " "
bitfld.long 0x0 17. " P17 ,Output Data Status 17" "Low,High"
bitfld.long 0x0 16. " P16 ,Output Data Status 16" "Low,High"
textline " "
bitfld.long 0x0 15. " P15 ,Output Data Status 15" "Low,High"
bitfld.long 0x0 14. " P14 ,Output Data Status 14" "Low,High"
textline " "
bitfld.long 0x0 13. " P13 ,Output Data Status 13" "Low,High"
bitfld.long 0x0 12. " P12 ,Output Data Status 12" "Low,High"
textline " "
bitfld.long 0x0 11. " P11 ,Output Data Status 11" "Low,High"
bitfld.long 0x0 10. " P10 ,Output Data Status 10" "Low,High"
textline " "
bitfld.long 0x0 9. " P9 ,Output Data Status 9" "Low,High"
bitfld.long 0x0 8. " P8 ,Output Data Status 8" "Low,High"
textline " "
bitfld.long 0x0 7. " P7 ,Output Data Status 7" "Low,High"
bitfld.long 0x0 6. " P6 ,Output Data Status 6" "Low,High"
textline " "
bitfld.long 0x0 5. " P5 ,Output Data Status 5" "Low,High"
bitfld.long 0x0 4. " P4 ,Output Data Status 4" "Low,High"
textline " "
bitfld.long 0x0 3. " P3 ,Output Data Status 3" "Low,High"
bitfld.long 0x0 2. " P2 ,Output Data Status 2" "Low,High"
textline " "
endif
bitfld.long 0x0 1. " P1 ,Output Data Status 1" "Low,High"
bitfld.long 0x0 0. " P0 ,Output Data Status 0" "Low,High"
group.long 0x48++0x3
line.long 0x0 "PIOC_IMR,PIOC Controller Interrupt Mask Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Input Change Interrupt Mask 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Input Change Interrupt Mask 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Input Change Interrupt Mask 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Input Change Interrupt Mask 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Input Change Interrupt Mask 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Input Change Interrupt Mask 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Input Change Interrupt Mask 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Input Change Interrupt Mask 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Input Change Interrupt Mask 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Input Change Interrupt Mask 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
hgroup.long 0x4C++0x3
hide.long 0x0 "PIOC_ISR,PIOC Controller Interrupt Status Register"
in
group.long 0x58++0x3
line.long 0x0 "PIOC_MDSR,PIOC Multi-driver Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Multi Drive Status 31" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Multi Drive Status 30" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Multi Drive Status 29" "Disabled,Enabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Multi Drive Status 28" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Multi Drive Status 27" "Disabled,Enabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Multi Drive Status 26" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Multi Drive Status 25" "Disabled,Enabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Multi Drive Status 24" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Multi Drive Status 23" "Disabled,Enabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Multi Drive Status 22" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
group.long 0x68++0x3
line.long 0x0 "PIOC_PUSR,PIOC Pull Up Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Pull Up Status 31" "Enabled,Disabled"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Pull Up Status 30" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Pull Up Status 29" "Enabled,Disabled"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Pull Up Status 28" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Pull Up Status 27" "Enabled,Disabled"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Pull Up Status 26" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Pull Up Status 25" "Enabled,Disabled"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Pull Up Status 24" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Pull Up Status 23" "Enabled,Disabled"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Pull Up Status 22" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Pull Up Status 21" "Enabled,Disabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Pull Up Status 20" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Pull Up Status 19" "Enabled,Disabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Pull Up Status 18" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Pull Up Status 17" "Enabled,Disabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Pull Up Status 16" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Pull Up Status 15" "Enabled,Disabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Pull Up Status 14" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Pull Up Status 13" "Enabled,Disabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Pull Up Status 12" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Pull Up Status 11" "Enabled,Disabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Pull Up Status 10" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Pull Up Status 9" "Enabled,Disabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Pull Up Status 8" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Pull Up Status 7" "Enabled,Disabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Pull Up Status 6" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Pull Up Status 5" "Enabled,Disabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Pull Up Status 4" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Pull Up Status 3" "Enabled,Disabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Pull Up Status 2" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Pull Up Status 1" "Enabled,Disabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Pull Up Status 0" "Enabled,Disabled"
group.long 0x78++0x3
line.long 0x0 "PIOC_ABSR,PIOC Peripheral A B Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x4 31. -0x8 31. " P31_Clear/Set ,Peripheral A B Status 31" "A,B"
setclrfld.long 0x0 30. -0x4 30. -0x8 30. " P30_Clear/Set ,Peripheral A B Status 30" "A,B"
textline " "
setclrfld.long 0x0 29. -0x4 29. -0x8 29. " P29_Clear/Set ,Peripheral A B Status 29" "A,B"
setclrfld.long 0x0 28. -0x4 28. -0x8 28. " P28_Clear/Set ,Peripheral A B Status 28" "A,B"
textline " "
setclrfld.long 0x0 27. -0x4 27. -0x8 27. " P27_Clear/Set ,Peripheral A B Status 27" "A,B"
setclrfld.long 0x0 26. -0x4 26. -0x8 26. " P26_Clear/Set ,Peripheral A B Status 26" "A,B"
textline " "
setclrfld.long 0x0 25. -0x4 25. -0x8 25. " P25_Clear/Set ,Peripheral A B Status 25" "A,B"
setclrfld.long 0x0 24. -0x4 24. -0x8 24. " P24_Clear/Set ,Peripheral A B Status 24" "A,B"
textline " "
setclrfld.long 0x0 23. -0x4 23. -0x8 23. " P23_Clear/Set ,Peripheral A B Status 23" "A,B"
setclrfld.long 0x0 22. -0x4 22. -0x8 22. " P22_Clear/Set ,Peripheral A B Status 22" "A,B"
textline " "
setclrfld.long 0x0 21. -0x4 21. -0x8 21. " P21_Clear/Set ,Peripheral A B Status 21" "A,B"
setclrfld.long 0x0 20. -0x4 20. -0x8 20. " P20_Clear/Set ,Peripheral A B Status 20" "A,B"
textline " "
setclrfld.long 0x0 19. -0x4 19. -0x8 19. " P19_Clear/Set ,Peripheral A B Status 19" "A,B"
setclrfld.long 0x0 18. -0x4 18. -0x8 18. " P18_Clear/Set ,Peripheral A B Status 18" "A,B"
textline " "
setclrfld.long 0x0 17. -0x4 17. -0x8 17. " P17_Clear/Set ,Peripheral A B Status 17" "A,B"
setclrfld.long 0x0 16. -0x4 16. -0x8 16. " P16_Clear/Set ,Peripheral A B Status 16" "A,B"
textline " "
setclrfld.long 0x0 15. -0x4 15. -0x8 15. " P15_Clear/Set ,Peripheral A B Status 15" "A,B"
setclrfld.long 0x0 14. -0x4 14. -0x8 14. " P14_Clear/Set ,Peripheral A B Status 14" "A,B"
textline " "
setclrfld.long 0x0 13. -0x4 13. -0x8 13. " P13_Clear/Set ,Peripheral A B Status 13" "A,B"
setclrfld.long 0x0 12. -0x4 12. -0x8 12. " P12_Clear/Set ,Peripheral A B Status 12" "A,B"
textline " "
setclrfld.long 0x0 11. -0x4 11. -0x8 11. " P11_Clear/Set ,Peripheral A B Status 11" "A,B"
setclrfld.long 0x0 10. -0x4 10. -0x8 10. " P10_Clear/Set ,Peripheral A B Status 10" "A,B"
textline " "
setclrfld.long 0x0 9. -0x4 9. -0x8 9. " P9_Clear/Set ,Peripheral A B Status 9" "A,B"
setclrfld.long 0x0 8. -0x4 8. -0x8 8. " P8_Clear/Set ,Peripheral A B Status 8" "A,B"
textline " "
setclrfld.long 0x0 7. -0x4 7. -0x8 7. " P7_Clear/Set ,Peripheral A B Status 7" "A,B"
setclrfld.long 0x0 6. -0x4 6. -0x8 6. " P6_Clear/Set ,Peripheral A B Status 6" "A,B"
textline " "
setclrfld.long 0x0 5. -0x4 5. -0x8 5. " P5_Clear/Set ,Peripheral A B Status 5" "A,B"
setclrfld.long 0x0 4. -0x4 4. -0x8 4. " P4_Clear/Set ,Peripheral A B Status 4" "A,B"
textline " "
setclrfld.long 0x0 3. -0x4 3. -0x8 3. " P3_Clear/Set ,Peripheral A B Status 3" "A,B"
setclrfld.long 0x0 2. -0x4 2. -0x8 2. " P2_Clear/Set ,Peripheral A B Status 2" "A,B"
textline " "
endif
setclrfld.long 0x0 1. -0x4 1. -0x8 1. " P1_Clear/Set ,Peripheral A B Status 1" "A,B"
setclrfld.long 0x0 0. -0x4 0. -0x8 0. " P0_Clear/Set ,Peripheral A B Status 0" "A,B"
group.long 0xA8++0x3
line.long 0x0 "PIOC_OWSR,PIOC Output Write Status Register"
sif (cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 31. -0x8 31. -0x4 31. " P31_Clear/Set ,Output Write Status 31" "Not affected,Affected"
setclrfld.long 0x0 30. -0x8 30. -0x4 30. " P30_Clear/Set ,Output Write Status 30" "Not affected,Affected"
textline " "
setclrfld.long 0x0 29. -0x8 29. -0x4 29. " P29_Clear/Set ,Output Write Status 29" "Not affected,Affected"
setclrfld.long 0x0 28. -0x8 28. -0x4 28. " P28_Clear/Set ,Output Write Status 28" "Not affected,Affected"
textline " "
setclrfld.long 0x0 27. -0x8 27. -0x4 27. " P27_Clear/Set ,Output Write Status 27" "Not affected,Affected"
setclrfld.long 0x0 26. -0x8 26. -0x4 26. " P26_Clear/Set ,Output Write Status 26" "Not affected,Affected"
textline " "
setclrfld.long 0x0 25. -0x8 25. -0x4 25. " P25_Clear/Set ,Output Write Status 25" "Not affected,Affected"
setclrfld.long 0x0 24. -0x8 24. -0x4 24. " P24_Clear/Set ,Output Write Status 24" "Not affected,Affected"
textline " "
setclrfld.long 0x0 23. -0x8 23. -0x4 23. " P23_Clear/Set ,Output Write Status 23" "Not affected,Affected"
setclrfld.long 0x0 22. -0x8 22. -0x4 22. " P22_Clear/Set ,Output Write Status 22" "Not affected,Affected"
textline " "
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Write Status 21" "Not affected,Affected"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Write Status 20" "Not affected,Affected"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Write Status 19" "Not affected,Affected"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Write Status 18" "Not affected,Affected"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Write Status 17" "Not affected,Affected"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Write Status 16" "Not affected,Affected"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Write Status 15" "Not affected,Affected"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Write Status 14" "Not affected,Affected"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Write Status 13" "Not affected,Affected"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Write Status 12" "Not affected,Affected"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Write Status 11" "Not affected,Affected"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Write Status 10" "Not affected,Affected"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Write Status 9" "Not affected,Affected"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Write Status 8" "Not affected,Affected"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Write Status 7" "Not affected,Affected"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Write Status 6" "Not affected,Affected"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Write Status 5" "Not affected,Affected"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Write Status 4" "Not affected,Affected"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Write Status 3" "Not affected,Affected"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Write Status 2" "Not affected,Affected"
textline " "
endif
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Write Status 1" "Not affected,Affected"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Write Status 0" "Not affected,Affected"
width 0xb
tree.end
tree "PIOD"
base ad:0xfffffa00
width 11.
group.long 0x8++0x3
line.long 0x0 "PIOD_PSR,PIOD Controller PIO Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,PIO Status 21" "Inactive,Active"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,PIO Status 20" "Inactive,Active"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,PIO Status 19" "Inactive,Active"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,PIO Status 18" "Inactive,Active"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,PIO Status 17" "Inactive,Active"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,PIO Status 16" "Inactive,Active"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,PIO Status 15" "Inactive,Active"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,PIO Status 14" "Inactive,Active"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,PIO Status 13" "Inactive,Active"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,PIO Status 12" "Inactive,Active"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,PIO Status 11" "Inactive,Active"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,PIO Status 10" "Inactive,Active"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,PIO Status 9" "Inactive,Active"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,PIO Status 8" "Inactive,Active"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,PIO Status 7" "Inactive,Active"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,PIO Status 6" "Inactive,Active"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,PIO Status 5" "Inactive,Active"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,PIO Status 4" "Inactive,Active"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,PIO Status 3" "Inactive,Active"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,PIO Status 2" "Inactive,Active"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,PIO Status 1" "Inactive,Active"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,PIO Status 0" "Inactive,Active"
endif
group.long 0x18++0x3
line.long 0x0 "PIOD_OSR,PIOD Controller Output Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Status 21" "Input,Output"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Status 20" "Input,Output"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Status 19" "Input,Output"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Status 18" "Input,Output"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Status 17" "Input,Output"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Status 16" "Input,Output"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Status 15" "Input,Output"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Status 14" "Input,Output"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Status 13" "Input,Output"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Status 12" "Input,Output"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Status 11" "Input,Output"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Status 10" "Input,Output"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Status 9" "Input,Output"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Status 8" "Input,Output"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Status 7" "Input,Output"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Status 6" "Input,Output"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Status 5" "Input,Output"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Status 4" "Input,Output"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Status 3" "Input,Output"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Status 2" "Input,Output"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Status 1" "Input,Output"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Status 0" "Input,Output"
endif
group.long 0x28++0x3
line.long 0x0 "PIOD_IFSR,PIOD Controller Input Filter Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Filter Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Filter Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Filter Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Filter Status 18" "Disabled,Enabled"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Filter Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Filter Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Filter Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Filter Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Filter Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Filter Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Filter Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Filter Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Filter Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Filter Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Filter Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Filter Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Filter Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Filter Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Filter Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Filter Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Filter Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Filter Status 0" "Disabled,Enabled"
endif
group.long 0x38++0x3
line.long 0x0 "PIOD_ODSR,PIOD Controller Output Data Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Data Status 21" "Low,High"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Data Status 20" "Low,High"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Data Status 19" "Low,High"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Data Status 18" "Low,High"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Data Status 17" "Low,High"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Data Status 16" "Low,High"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Data Status 15" "Low,High"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Data Status 14" "Low,High"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Data Status 13" "Low,High"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Data Status 12" "Low,High"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Data Status 11" "Low,High"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Data Status 10" "Low,High"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Data Status 9" "Low,High"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Data Status 8" "Low,High"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Data Status 7" "Low,High"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Data Status 6" "Low,High"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Data Status 5" "Low,High"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Data Status 4" "Low,High"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Data Status 3" "Low,High"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Data Status 2" "Low,High"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Data Status 1" "Low,High"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Data Status 0" "Low,High"
endif
rgroup.long 0x3C++0x3
line.long 0x0 "PIOD_PDSR,PIOD Controller Pin Data Status Register"
bitfld.long 0x0 21. " P21 ,Output Data Status 21" "Low,High"
bitfld.long 0x0 20. " P20 ,Output Data Status 20" "Low,High"
textline " "
bitfld.long 0x0 19. " P19 ,Output Data Status 19" "Low,High"
bitfld.long 0x0 18. " P18 ,Output Data Status 18" "Low,High"
sif (cpu()=="AT91SAM9RL64")
textline " "
bitfld.long 0x0 17. " P17 ,Output Data Status 17" "Low,High"
bitfld.long 0x0 16. " P16 ,Output Data Status 16" "Low,High"
textline " "
bitfld.long 0x0 15. " P15 ,Output Data Status 15" "Low,High"
bitfld.long 0x0 14. " P14 ,Output Data Status 14" "Low,High"
textline " "
bitfld.long 0x0 13. " P13 ,Output Data Status 13" "Low,High"
bitfld.long 0x0 12. " P12 ,Output Data Status 12" "Low,High"
textline " "
bitfld.long 0x0 11. " P11 ,Output Data Status 11" "Low,High"
bitfld.long 0x0 10. " P10 ,Output Data Status 10" "Low,High"
textline " "
bitfld.long 0x0 9. " P9 ,Output Data Status 9" "Low,High"
bitfld.long 0x0 8. " P8 ,Output Data Status 8" "Low,High"
textline " "
bitfld.long 0x0 7. " P7 ,Output Data Status 7" "Low,High"
bitfld.long 0x0 6. " P6 ,Output Data Status 6" "Low,High"
textline " "
bitfld.long 0x0 5. " P5 ,Output Data Status 5" "Low,High"
bitfld.long 0x0 4. " P4 ,Output Data Status 4" "Low,High"
textline " "
bitfld.long 0x0 3. " P3 ,Output Data Status 3" "Low,High"
bitfld.long 0x0 2. " P2 ,Output Data Status 2" "Low,High"
textline " "
bitfld.long 0x0 1. " P1 ,Output Data Status 1" "Low,High"
bitfld.long 0x0 0. " P0 ,Output Data Status 0" "Low,High"
endif
group.long 0x48++0x3
line.long 0x0 "PIOD_IMR,PIOD Controller Interrupt Mask Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Input Change Interrupt Mask 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Input Change Interrupt Mask 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Input Change Interrupt Mask 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Input Change Interrupt Mask 18" "Disabled,Enabled"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Input Change Interrupt Mask 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Input Change Interrupt Mask 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Input Change Interrupt Mask 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Input Change Interrupt Mask 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Input Change Interrupt Mask 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Input Change Interrupt Mask 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Input Change Interrupt Mask 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Input Change Interrupt Mask 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Input Change Interrupt Mask 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Input Change Interrupt Mask 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Input Change Interrupt Mask 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Input Change Interrupt Mask 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Input Change Interrupt Mask 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Input Change Interrupt Mask 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Input Change Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Input Change Interrupt Mask 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Input Change Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Input Change Interrupt Mask 0" "Disabled,Enabled"
endif
hgroup.long 0x4C++0x3
hide.long 0x0 "PIOD_ISR,PIOD Controller Interrupt Status Register"
in
group.long 0x58++0x3
line.long 0x0 "PIOD_MDSR,PIOD Multi-driver Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Multi Drive Status 21" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Multi Drive Status 20" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Multi Drive Status 19" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Multi Drive Status 18" "Disabled,Enabled"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Multi Drive Status 17" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Multi Drive Status 16" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Multi Drive Status 15" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Multi Drive Status 14" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Multi Drive Status 13" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Multi Drive Status 12" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Multi Drive Status 11" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Multi Drive Status 10" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Multi Drive Status 9" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Multi Drive Status 8" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Multi Drive Status 7" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Multi Drive Status 6" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Multi Drive Status 5" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Multi Drive Status 4" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Multi Drive Status 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Multi Drive Status 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Multi Drive Status 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Multi Drive Status 0" "Disabled,Enabled"
endif
group.long 0x68++0x3
line.long 0x0 "PIOD_PUSR,PIOD Pull Up Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Pull Up Status 21" "Enabled,Disabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Pull Up Status 20" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Pull Up Status 19" "Enabled,Disabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Pull Up Status 18" "Enabled,Disabled"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Pull Up Status 17" "Enabled,Disabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Pull Up Status 16" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Pull Up Status 15" "Enabled,Disabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Pull Up Status 14" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Pull Up Status 13" "Enabled,Disabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Pull Up Status 12" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Pull Up Status 11" "Enabled,Disabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Pull Up Status 10" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Pull Up Status 9" "Enabled,Disabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Pull Up Status 8" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Pull Up Status 7" "Enabled,Disabled"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Pull Up Status 6" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Pull Up Status 5" "Enabled,Disabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Pull Up Status 4" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Pull Up Status 3" "Enabled,Disabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Pull Up Status 2" "Enabled,Disabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Pull Up Status 1" "Enabled,Disabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Pull Up Status 0" "Enabled,Disabled"
endif
group.long 0x78++0x3
line.long 0x0 "PIOD_ABSR,PIOD Peripheral A B Status Register"
setclrfld.long 0x0 21. -0x4 21. -0x8 21. " P21_Clear/Set ,Peripheral A B Status 21" "A,B"
setclrfld.long 0x0 20. -0x4 20. -0x8 20. " P20_Clear/Set ,Peripheral A B Status 20" "A,B"
textline " "
setclrfld.long 0x0 19. -0x4 19. -0x8 19. " P19_Clear/Set ,Peripheral A B Status 19" "A,B"
setclrfld.long 0x0 18. -0x4 18. -0x8 18. " P18_Clear/Set ,Peripheral A B Status 18" "A,B"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x4 17. -0x8 17. " P17_Clear/Set ,Peripheral A B Status 17" "A,B"
setclrfld.long 0x0 16. -0x4 16. -0x8 16. " P16_Clear/Set ,Peripheral A B Status 16" "A,B"
textline " "
setclrfld.long 0x0 15. -0x4 15. -0x8 15. " P15_Clear/Set ,Peripheral A B Status 15" "A,B"
setclrfld.long 0x0 14. -0x4 14. -0x8 14. " P14_Clear/Set ,Peripheral A B Status 14" "A,B"
textline " "
setclrfld.long 0x0 13. -0x4 13. -0x8 13. " P13_Clear/Set ,Peripheral A B Status 13" "A,B"
setclrfld.long 0x0 12. -0x4 12. -0x8 12. " P12_Clear/Set ,Peripheral A B Status 12" "A,B"
textline " "
setclrfld.long 0x0 11. -0x4 11. -0x8 11. " P11_Clear/Set ,Peripheral A B Status 11" "A,B"
setclrfld.long 0x0 10. -0x4 10. -0x8 10. " P10_Clear/Set ,Peripheral A B Status 10" "A,B"
textline " "
setclrfld.long 0x0 9. -0x4 9. -0x8 9. " P9_Clear/Set ,Peripheral A B Status 9" "A,B"
setclrfld.long 0x0 8. -0x4 8. -0x8 8. " P8_Clear/Set ,Peripheral A B Status 8" "A,B"
textline " "
setclrfld.long 0x0 7. -0x4 7. -0x8 7. " P7_Clear/Set ,Peripheral A B Status 7" "A,B"
setclrfld.long 0x0 6. -0x4 6. -0x8 6. " P6_Clear/Set ,Peripheral A B Status 6" "A,B"
textline " "
setclrfld.long 0x0 5. -0x4 5. -0x8 5. " P5_Clear/Set ,Peripheral A B Status 5" "A,B"
setclrfld.long 0x0 4. -0x4 4. -0x8 4. " P4_Clear/Set ,Peripheral A B Status 4" "A,B"
textline " "
setclrfld.long 0x0 3. -0x4 3. -0x8 3. " P3_Clear/Set ,Peripheral A B Status 3" "A,B"
setclrfld.long 0x0 2. -0x4 2. -0x8 2. " P2_Clear/Set ,Peripheral A B Status 2" "A,B"
textline " "
setclrfld.long 0x0 1. -0x4 1. -0x8 1. " P1_Clear/Set ,Peripheral A B Status 1" "A,B"
setclrfld.long 0x0 0. -0x4 0. -0x8 0. " P0_Clear/Set ,Peripheral A B Status 0" "A,B"
endif
group.long 0xA8++0x3
line.long 0x0 "PIOD_OWSR,PIOD Output Write Status Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " P21_Clear/Set ,Output Write Status 21" "Not affected,Affected"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " P20_Clear/Set ,Output Write Status 20" "Not affected,Affected"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " P19_Clear/Set ,Output Write Status 19" "Not affected,Affected"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " P18_Clear/Set ,Output Write Status 18" "Not affected,Affected"
sif (cpu()=="AT91SAM9RL64")
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " P17_Clear/Set ,Output Write Status 17" "Not affected,Affected"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " P16_Clear/Set ,Output Write Status 16" "Not affected,Affected"
textline " "
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " P15_Clear/Set ,Output Write Status 15" "Not affected,Affected"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " P14_Clear/Set ,Output Write Status 14" "Not affected,Affected"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " P13_Clear/Set ,Output Write Status 13" "Not affected,Affected"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " P12_Clear/Set ,Output Write Status 12" "Not affected,Affected"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " P11_Clear/Set ,Output Write Status 11" "Not affected,Affected"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " P10_Clear/Set ,Output Write Status 10" "Not affected,Affected"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " P9_Clear/Set ,Output Write Status 9" "Not affected,Affected"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " P8_Clear/Set ,Output Write Status 8" "Not affected,Affected"
textline " "
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " P7_Clear/Set ,Output Write Status 7" "Not affected,Affected"
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " P6_Clear/Set ,Output Write Status 6" "Not affected,Affected"
textline " "
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " P5_Clear/Set ,Output Write Status 5" "Not affected,Affected"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " P4_Clear/Set ,Output Write Status 4" "Not affected,Affected"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " P3_Clear/Set ,Output Write Status 3" "Not affected,Affected"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " P2_Clear/Set ,Output Write Status 2" "Not affected,Affected"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " P1_Clear/Set ,Output Write Status 1" "Not affected,Affected"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " P0_Clear/Set ,Output Write Status 0" "Not affected,Affected"
endif
width 0xb
tree.end
tree.end
tree.open "SPI (Serial Peripheral Interface)"
tree "SPI"
base ad:0xfffcc000
width 11.
wgroup.long 0x00++0x03
line.long 0x00 "SPI0_CR,SPI0 Control Register"
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Last"
textline " "
bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset"
textline " "
bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enable"
if ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x00)&&(((d.l(ad:0xfffc8000+0x4))&0x1)==0x1)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x0))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
textline " "
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x00)&&(((d.l(ad:0xfffc8000+0x4))&0x1)==0x1))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x00)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x0))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
endif
textline " "
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif (((data.long(ad:0xfffc8000+0x04))&0x04)==0x00)
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x04)&&(((d.l(ad:0xfffc8000+0x4))&0x1)==0x1)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x0))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
textline " "
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x04)&&(((d.l(ad:0xfffc8000+0x4))&0x1)==0x1))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 7. " LLB ,Local Loopback Enable" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
elif ((((data.long(ad:0xfffc8000+0x04))&0x04)==0x04)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x0))
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
else
group.long 0x04++0x03
line.long 0x00 "SPI0_MR,SPI0 Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects"
textline " "
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11"||cpu()=="AT91SAM9N12"||cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
bitfld.long 0x00 5. " WDRBT ,Wait Data Read Before Transfer" "No effect,Waiting"
textline " "
endif
bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled"
textline " "
bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder"
textline " "
bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable"
textline " "
bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master"
endif
sif (cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35")
if ((d.l(ad:(ad:0xfffc8000+0x4))&0x1)==0x1)
rgroup.long 0x08++0x03
line.long 0x00 "SPI0_RDR,SPI0 Receive Data Register"
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
else
rgroup.long 0x08++0x03
line.long 0x00 "SPI0_RDR,SPI0 Receive Data Register"
hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data"
endif
else
hgroup.long 0x08++0x03
hide.long 0x00 "SPI0_RDR,SPI0 Receive Data Register"
in
endif
if ((((data.long(ad:0xfffc8000+0x4))&0x04)==0x00)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x2))
wgroup.long 0x0c++0x03
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Last"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden"
textline " "
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
elif ((((data.long(ad:0xfffc8000+0x4))&0x04)==0x04)&&(((d.l(ad:0xfffc8000+0x4))&0x2)==0x2))
wgroup.long 0x0c++0x03
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,Last"
textline " "
bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15"
textline " "
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
else
wgroup.long 0x0c++0x03
line.long 0x00 "SPI0_TDR,SPI0 Transmit Data Register"
hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data"
endif
hgroup.long 0x10++0x03
hide.long 0x00 "SPI0_SR,SPI0 Status Register"
in
group.long 0x14++0xB
line.long 0x8 "SPI0_IMR,SPI0 Interrupt Mask Register"
sif (cpu()=="AT91SAM9G46")
setclrfld.long 0x8 10. 0x0 10. 0x4 10. " UNDES_set/clr ,Underrun Error Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x8 9. 0x0 9. 0x4 9. " TXEMPTY_set/clr ,Transmission Registers Empty Mask" "Disabled,Enabled"
setclrfld.long 0x8 8. 0x0 8. 0x4 8. " NSSR_set/clr ,NSS Rising Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9M11"&&cpu()!="AT91SAM9G45"&&cpu()!="AT91SAM9M10"&&cpu()!="AT91SAM9N12"&&cpu()!="AT91SAM9X25"&&cpu()!="AT91SAM9X35")
setclrfld.long 0x8 7. 0x0 7. 0x4 7. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " OVRES_set/clr ,Overrun Error Status Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " MODF_set/clr ,Mode Fault Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " TDRE_set/clr ,SPI0 Transmit Data Register Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " RDRF_set/clr ,Receive Data Register Full Interrupt Mask" "Disabled,Enabled"
group.long 0x30++0x0F
line.long 0x0 "SPI_CSR0,SPI Chip Select Register 0"
hexmask.long.byte 0x0 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
hexmask.long.byte 0x0 16.--23. 1. " DLYBS ,Delay Before SPCK"
hexmask.long.byte 0x0 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
textline " "
bitfld.long 0x0 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x0 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
textline " "
sif (cpu()=="AT91SAM9N12")
bitfld.long 0x0 2. " CSNAAT , Chip Select Not Active After Transfer" "Not active,Active"
textline " "
endif
bitfld.long 0x0 1. " NCPHA ,Clock Phase (leading/following edge)" "Changed/captured,Captured/changed"
textline " "
bitfld.long 0x0 0. " CPOL ,Clock Polarity" "Low,High"
line.long 0x4 "SPI_CSR1,SPI Chip Select Register 1"
hexmask.long.byte 0x4 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
hexmask.long.byte 0x4 16.--23. 1. " DLYBS ,Delay Before SPCK"
hexmask.long.byte 0x4 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
textline " "
bitfld.long 0x4 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x4 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
textline " "
sif (cpu()=="AT91SAM9N12")
bitfld.long 0x4 2. " CSNAAT , Chip Select Not Active After Transfer" "Not active,Active"
textline " "
endif
bitfld.long 0x4 1. " NCPHA ,Clock Phase (leading/following edge)" "Changed/captured,Captured/changed"
textline " "
bitfld.long 0x4 0. " CPOL ,Clock Polarity" "Low,High"
line.long 0x8 "SPI_CSR2,SPI Chip Select Register 2"
hexmask.long.byte 0x8 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
hexmask.long.byte 0x8 16.--23. 1. " DLYBS ,Delay Before SPCK"
hexmask.long.byte 0x8 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
textline " "
bitfld.long 0x8 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x8 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
textline " "
sif (cpu()=="AT91SAM9N12")
bitfld.long 0x8 2. " CSNAAT , Chip Select Not Active After Transfer" "Not active,Active"
textline " "
endif
bitfld.long 0x8 1. " NCPHA ,Clock Phase (leading/following edge)" "Changed/captured,Captured/changed"
textline " "
bitfld.long 0x8 0. " CPOL ,Clock Polarity" "Low,High"
line.long 0xC "SPI_CSR3,SPI Chip Select Register 3"
hexmask.long.byte 0xC 24.--31. 1. " DLYBCT ,Consecutive Transfers Delay"
hexmask.long.byte 0xC 16.--23. 1. " DLYBS ,Delay Before SPCK"
hexmask.long.byte 0xC 8.--15. 1. " SCBR ,Serial Clock Baud Rate"
textline " "
bitfld.long 0xC 4.--7. " BITS ,Bits Per Transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0xC 3. " CSAAT ,Chip Select Active After Transfer" "Risen,Not risen"
textline " "
sif (cpu()=="AT91SAM9N12")
bitfld.long 0xC 2. " CSNAAT , Chip Select Not Active After Transfer" "Not active,Active"
textline " "
endif
bitfld.long 0xC 1. " NCPHA ,Clock Phase (leading/following edge)" "Changed/captured,Captured/changed"
textline " "
bitfld.long 0xC 0. " CPOL ,Clock Polarity" "Low,High"
sif (cpu()=="AT91SAM9X25"||cpu()=="AT91SAM9X35"||cpu()=="AT91SAM9N12")
group.long 0xE4++0x3
line.long 0x00 "SPI_WPMR, SPI Write Protection Mode Register"
hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY , Write Protection Key Password"
bitfld.long 0x00 0. " WPEN , Write Protection Enable" "Disabled,Enabled"
hgroup.long 0xE8++0x3
hide.long 0x00 "SPI_WPSR, SPI Write Protection Status Register"
in
endif
width 0xb
tree.end
tree "PDC_SPI"
base ad:0xfffcc000
width 13.
group.long 0x100++0x1f
line.long 0x00 "SPI_RPR,Serial Peripheral Interface 0 Receive Pointer Register"
line.long 0x04 "SPI_RCR,Serial Peripheral Interface 0 Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "SPI_TPR,Serial Peripheral Interface 0 Transmit Pointer Register"
line.long 0x0c "SPI_TCR,Serial Peripheral Interface 0 Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "SPI_RNPR,Serial Peripheral Interface 0 Receive Next Pointer Register"
line.long 0x14 "SPI_RNCR,Serial Peripheral Interface 0 Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "SPI_TNPR,Serial Peripheral Interface 0 Transmit Next Pointer Register"
line.long 0x1c "SPI_TNCR,Serial Peripheral Interface 0 Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "SPI_PTCR,Serial Peripheral Interface 0 PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "SPI_PTSR,Serial Peripheral Interface 0 PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree.open "TWI (Two-wire Interface)"
tree "TWI0"
base ad:0xfffa8000
width 10.
wgroup.long 0x00++0x03
line.long 0x00 "TWI_CR,TWI Control Register"
bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 5. " SVDIS ,TWI Slave Mode Disabled" "No effect,Disabled"
bitfld.long 0x00 4. " SVEN ,TWI Slave Mode Enabled" "No effect,Enabled"
textline " "
endif
bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disabled" "No effect,Disabled"
bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enabled" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " STOP ,Send a STOP Condition" "No effect,Sent"
bitfld.long 0x00 0. " START ,Send a START Condition" "No effect,Sent"
group.long 0x04++0x03
line.long 0x00 "TWI_MMR,TWI Master Mode Register"
hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address"
bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read"
textline " "
bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,One-byte,Two-byte,Three-byte"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
group.long 0x08++0x3
line.long 0x00 "TWI_SMR,Slave Mode Register"
hexmask.long.byte 0x00 16.--22. 1. " SADR ,Slave Address"
endif
if (((d.l(ad:(0xfffa8000+0x4)))&0x300)==0x300)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address"
elif (((d.l(ad:(0xfffa8000+0x4)))&0x300)==0x200)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.word 0x00 0.--15. 1. " IADR ,Internal Address"
elif (((d.l(ad:(0xfffa8000+0x4)))&0x300)==0x100)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.byte 0x00 0.--7. 1. " IADR ,Internal Address"
else
hgroup.long 0x0c++0x3
hide.long 0x00 "TWI_IADR,TWI Internal Address Register"
in
endif
group.long 0x10++0x3
line.long 0x0 "TWI_CWGR,TWI Clock Waveform Generator Register"
bitfld.long 0x0 16.--18. " CKDIV ,Clock Divider" "1,2,4,8,16,32,64,128"
hexmask.long.byte 0x0 8.--15. 1. " CHDIV ,Clock High Divider"
textline " "
hexmask.long.byte 0x0 0.--7. 1. " CLDIV ,Clock Low Divider"
hgroup.long 0x20++0x03
hide.long 0x00 "TWI_SR,TWI Status Register"
in
group.long 0x2c++0x3
line.long 0x0 "TWI_IMR,TWI Interrupt Mask Register"
sif (cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " TXBUFE_Clear/Set , TX Buffer Empty" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " RXBUFF_Clear/Set , RX Buffer Full" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " ENDTX_Clear/Set , End of TX buffer" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " ENDRX_Clear/Set , End of RX buffer" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " EOSACC_Clear/Set ,End Of Slave Access Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " SCL_WS_Clear/Set ,Clock Wait State Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " ABRLST_Clear/Set ,Arbitration Lost Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " NACK_Clear/Set ,Not Acknowledge" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9261")
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " UNRE_Clear/Set ,Underrun Error" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9261"||cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " OVRE_Clear/Set ,Overrun Error" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " GACC_Clear/Set ,General Call Access Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " SVACC_Clear/Set ,Slave Access Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " TXRDY_Clear/Set ,Transmit Holding Register Ready" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " RXRDY_Clear/Set ,Receive Holding Register Ready" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " TXCOMP_Clear/Set ,Transmission Completed" "Disabled,Enabled"
hgroup.long 0x30++0x3
hide.long 0x0 "TWI_RHR,TWI Receive Holding Register"
in
group.long 0x34++0x03
line.long 0x00 "TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data"
width 0xb
tree.end
tree "TWI1"
base ad:0xfffac000
width 10.
wgroup.long 0x00++0x03
line.long 0x00 "TWI_CR,TWI Control Register"
bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 5. " SVDIS ,TWI Slave Mode Disabled" "No effect,Disabled"
bitfld.long 0x00 4. " SVEN ,TWI Slave Mode Enabled" "No effect,Enabled"
textline " "
endif
bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disabled" "No effect,Disabled"
bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enabled" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " STOP ,Send a STOP Condition" "No effect,Sent"
bitfld.long 0x00 0. " START ,Send a START Condition" "No effect,Sent"
group.long 0x04++0x03
line.long 0x00 "TWI_MMR,TWI Master Mode Register"
hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address"
bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read"
textline " "
bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,One-byte,Two-byte,Three-byte"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
group.long 0x08++0x3
line.long 0x00 "TWI_SMR,Slave Mode Register"
hexmask.long.byte 0x00 16.--22. 1. " SADR ,Slave Address"
endif
if (((d.l(ad:(0xfffac000+0x4)))&0x300)==0x300)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address"
elif (((d.l(ad:(0xfffac000+0x4)))&0x300)==0x200)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.word 0x00 0.--15. 1. " IADR ,Internal Address"
elif (((d.l(ad:(0xfffac000+0x4)))&0x300)==0x100)
group.long 0x0c++0x3
line.long 0x00 "TWI_IADR,TWI Internal Address Register"
hexmask.long.byte 0x00 0.--7. 1. " IADR ,Internal Address"
else
hgroup.long 0x0c++0x3
hide.long 0x00 "TWI_IADR,TWI Internal Address Register"
in
endif
group.long 0x10++0x3
line.long 0x0 "TWI_CWGR,TWI Clock Waveform Generator Register"
bitfld.long 0x0 16.--18. " CKDIV ,Clock Divider" "1,2,4,8,16,32,64,128"
hexmask.long.byte 0x0 8.--15. 1. " CHDIV ,Clock High Divider"
textline " "
hexmask.long.byte 0x0 0.--7. 1. " CLDIV ,Clock Low Divider"
hgroup.long 0x20++0x03
hide.long 0x00 "TWI_SR,TWI Status Register"
in
group.long 0x2c++0x3
line.long 0x0 "TWI_IMR,TWI Interrupt Mask Register"
sif (cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 15. -0x8 15. -0x4 15. " TXBUFE_Clear/Set , TX Buffer Empty" "Disabled,Enabled"
setclrfld.long 0x0 14. -0x8 14. -0x4 14. " RXBUFF_Clear/Set , RX Buffer Full" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " ENDTX_Clear/Set , End of TX buffer" "Disabled,Enabled"
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " ENDRX_Clear/Set , End of RX buffer" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " EOSACC_Clear/Set ,End Of Slave Access Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " SCL_WS_Clear/Set ,Clock Wait State Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " ABRLST_Clear/Set ,Arbitration Lost Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " NACK_Clear/Set ,Not Acknowledge" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9261")
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " UNRE_Clear/Set ,Underrun Error" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9261"||cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " OVRE_Clear/Set ,Overrun Error" "Disabled,Enabled"
textline " "
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " GACC_Clear/Set ,General Call Access Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " SVACC_Clear/Set ,Slave Access Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " TXRDY_Clear/Set ,Transmit Holding Register Ready" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " RXRDY_Clear/Set ,Receive Holding Register Ready" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " TXCOMP_Clear/Set ,Transmission Completed" "Disabled,Enabled"
hgroup.long 0x30++0x3
hide.long 0x0 "TWI_RHR,TWI Receive Holding Register"
in
group.long 0x34++0x03
line.long 0x00 "TWI_THR,TWI Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data"
width 0xb
tree.end
tree.end
tree.open "USART (Universal Synchronous/Asynchronous Receiver/Transmitter)"
tree "USART0"
base ad:0xfffb0000
width 0xa
wgroup.long 0x00++0x03
line.long 0x00 "US0_CR,USART0 Control Register"
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1"
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512")
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,DTR=1"
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0"
textline " "
endif
bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted"
bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset"
textline " "
bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset"
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
textline " "
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
textline " "
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
textline " "
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:(0xfffb0000+0x4)))&0x100)==0x100)
group.long 0x04++0x03
line.long 0x00 "US0_MR,USART0 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,Reserved,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
else
group.long 0x04++0x03
line.long 0x00 "US0_MR,USART0 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,1.5 bits,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
endif
sif (cpu()=="AT91SAM9261")
wgroup.long 0x08++0x3
line.long 0x00 "US0_IER,USART0 Interrupt Enable Register"
bitfld.long 0x00 20. " MANE ,Manchester Error Interrupt Enable" "No effect,Enabled"
endif
group.long 0x10++0x3
line.long 0x0 "US0_IMR,USART0 Interrupt Mask Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " MANE_set/clr ,Manchester Error Interrupt Enable" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " TIMEOUT_set/clr ,Time-out Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
hgroup.long 0x14++0x3
hide.long 0x0 "US0_CSR,USART0 Channel Status Register"
in
hgroup.long 0x18++0x3
hide.long 0x4 "US0_RHR,USART0 Receive Holding Register"
in
wgroup.long 0x1c++0x03
line.long 0x00 "US0_THR,USART0 Transmit Holding Register"
bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
group.long 0x20++0xb
line.long 0x00 "US0_BRGR,USART0 Baud Rate Generator Register"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
endif
textline " "
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US0_RTOR,USART0 Receiver Time-out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value"
line.long 0x08 "US0_TTGR,USART0 Transmitter Timeguard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
group.long 0x40++0x03
line.long 0x00 "US0_FIDI,USART0 FI DI RATIO Register"
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
hgroup.long 0x44++0x03
hide.long 0x00 "US0_NER,USART0 Number of Errors Register"
in
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
group.long 0x50++0x03
line.long 0x00 "US_MAN,USART Manchester Configuration Register"
bitfld.long 0x00 30. " DRIFT , Drift compensation" "Not recover,Recover"
bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0to1,1to0"
textline " "
bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
textline " "
bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0=0-to-1,1=0-to-1"
bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
textline " "
bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
endif
if (((data.long(ad:(0xfffb0000+0x04)))&0xf)==0x8)
group.long 0x4c++0x03
line.long 0x00 "US0_IF,USART0 IrDA Filter Register"
hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
else
hgroup.long 0x4c++0x03
hide.long 0x00 "US0_IF,USART0 IrDA Filter Register"
base vm:0x0
wgroup 0x0++0x0
endif
base ad:0xfffb0000
width 0xb
tree.end
tree "PDC_USART0"
width 13.
group.long 0x100++0x1f
line.long 0x00 "USART0_RPR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Receive Pointer Register"
line.long 0x04 "USART0_RCR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "USART0_TPR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Transmit Pointer Register"
line.long 0x0c "USART0_TCR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "USART0_RNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Receive Next Pointer Register"
line.long 0x14 "USART0_RNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "USART0_TNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Transmit Next Pointer Register"
line.long 0x1c "USART0_TNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "USART0_PTCR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "USART0_PTSR,Universal Synchronous/Asynchronous Receiver/Transmitter 0 PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree "USART1"
base ad:0xfffb4000
width 0xa
wgroup.long 0x00++0x03
line.long 0x00 "US1_CR,USART1 Control Register"
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1"
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512")
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,DTR=1"
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0"
textline " "
endif
bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted"
bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset"
textline " "
bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset"
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
textline " "
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
textline " "
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
textline " "
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:(0xfffb4000+0x4)))&0x100)==0x100)
group.long 0x04++0x03
line.long 0x00 "US1_MR,USART1 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,Reserved,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
else
group.long 0x04++0x03
line.long 0x00 "US1_MR,USART1 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,1.5 bits,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
endif
sif (cpu()=="AT91SAM9261")
wgroup.long 0x08++0x3
line.long 0x00 "US1_IER,USART1 Interrupt Enable Register"
bitfld.long 0x00 20. " MANE ,Manchester Error Interrupt Enable" "No effect,Enabled"
endif
group.long 0x10++0x3
line.long 0x0 "US1_IMR,USART1 Interrupt Mask Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " MANE_set/clr ,Manchester Error Interrupt Enable" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " TIMEOUT_set/clr ,Time-out Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
hgroup.long 0x14++0x3
hide.long 0x0 "US1_CSR,USART1 Channel Status Register"
in
hgroup.long 0x18++0x3
hide.long 0x4 "US1_RHR,USART1 Receive Holding Register"
in
wgroup.long 0x1c++0x03
line.long 0x00 "US1_THR,USART1 Transmit Holding Register"
bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
group.long 0x20++0xb
line.long 0x00 "US1_BRGR,USART1 Baud Rate Generator Register"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
endif
textline " "
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US1_RTOR,USART1 Receiver Time-out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value"
line.long 0x08 "US1_TTGR,USART1 Transmitter Timeguard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
group.long 0x40++0x03
line.long 0x00 "US1_FIDI,USART1 FI DI RATIO Register"
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
hgroup.long 0x44++0x03
hide.long 0x00 "US1_NER,USART1 Number of Errors Register"
in
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
group.long 0x50++0x03
line.long 0x00 "US_MAN,USART Manchester Configuration Register"
bitfld.long 0x00 30. " DRIFT , Drift compensation" "Not recover,Recover"
bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0to1,1to0"
textline " "
bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
textline " "
bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0=0-to-1,1=0-to-1"
bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
textline " "
bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
endif
if (((data.long(ad:(0xfffb4000+0x04)))&0xf)==0x8)
group.long 0x4c++0x03
line.long 0x00 "US1_IF,USART1 IrDA Filter Register"
hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
else
hgroup.long 0x4c++0x03
hide.long 0x00 "US1_IF,USART1 IrDA Filter Register"
base vm:0x0
wgroup 0x0++0x0
endif
base ad:0xfffb4000
width 0xb
tree.end
tree "PDC_USART1"
width 13.
group.long 0x100++0x1f
line.long 0x00 "USART1_RPR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Receive Pointer Register"
line.long 0x04 "USART1_RCR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "USART1_TPR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Transmit Pointer Register"
line.long 0x0c "USART1_TCR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "USART1_RNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Receive Next Pointer Register"
line.long 0x14 "USART1_RNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "USART1_TNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Transmit Next Pointer Register"
line.long 0x1c "USART1_TNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "USART1_PTCR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "USART1_PTSR,Universal Synchronous/Asynchronous Receiver/Transmitter 1 PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree "USART2"
base ad:0xfffb8000
width 0xa
wgroup.long 0x00++0x03
line.long 0x00 "US2_CR,USART2 Control Register"
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1"
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512")
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,DTR=1"
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0"
textline " "
endif
bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted"
bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset"
textline " "
bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset"
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
textline " "
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
textline " "
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
textline " "
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:(0xfffb8000+0x4)))&0x100)==0x100)
group.long 0x04++0x03
line.long 0x00 "US2_MR,USART2 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,Reserved,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
else
group.long 0x04++0x03
line.long 0x00 "US2_MR,USART2 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,1.5 bits,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
endif
sif (cpu()=="AT91SAM9261")
wgroup.long 0x08++0x3
line.long 0x00 "US2_IER,USART2 Interrupt Enable Register"
bitfld.long 0x00 20. " MANE ,Manchester Error Interrupt Enable" "No effect,Enabled"
endif
group.long 0x10++0x3
line.long 0x0 "US2_IMR,USART2 Interrupt Mask Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " MANE_set/clr ,Manchester Error Interrupt Enable" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " TIMEOUT_set/clr ,Time-out Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
hgroup.long 0x14++0x3
hide.long 0x0 "US2_CSR,USART2 Channel Status Register"
in
hgroup.long 0x18++0x3
hide.long 0x4 "US2_RHR,USART2 Receive Holding Register"
in
wgroup.long 0x1c++0x03
line.long 0x00 "US2_THR,USART2 Transmit Holding Register"
bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
group.long 0x20++0xb
line.long 0x00 "US2_BRGR,USART2 Baud Rate Generator Register"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
endif
textline " "
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US2_RTOR,USART2 Receiver Time-out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value"
line.long 0x08 "US2_TTGR,USART2 Transmitter Timeguard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
group.long 0x40++0x03
line.long 0x00 "US2_FIDI,USART2 FI DI RATIO Register"
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
hgroup.long 0x44++0x03
hide.long 0x00 "US2_NER,USART2 Number of Errors Register"
in
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
group.long 0x50++0x03
line.long 0x00 "US_MAN,USART Manchester Configuration Register"
bitfld.long 0x00 30. " DRIFT , Drift compensation" "Not recover,Recover"
bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0to1,1to0"
textline " "
bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
textline " "
bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0=0-to-1,1=0-to-1"
bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
textline " "
bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
endif
if (((data.long(ad:(0xfffb8000+0x04)))&0xf)==0x8)
group.long 0x4c++0x03
line.long 0x00 "US2_IF,USART2 IrDA Filter Register"
hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
else
hgroup.long 0x4c++0x03
hide.long 0x00 "US2_IF,USART2 IrDA Filter Register"
base vm:0x0
wgroup 0x0++0x0
endif
base ad:0xfffb8000
width 0xb
tree.end
tree "PDC_USART2"
width 13.
group.long 0x100++0x1f
line.long 0x00 "USART2_RPR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Receive Pointer Register"
line.long 0x04 "USART2_RCR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "USART2_TPR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Transmit Pointer Register"
line.long 0x0c "USART2_TCR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "USART2_RNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Receive Next Pointer Register"
line.long 0x14 "USART2_RNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "USART2_TNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Transmit Next Pointer Register"
line.long 0x1c "USART2_TNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "USART2_PTCR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "USART2_PTSR,Universal Synchronous/Asynchronous Receiver/Transmitter 2 PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree "USART3"
base ad:0xfffbc000
width 0xa
wgroup.long 0x00++0x03
line.long 0x00 "US0_CR,USART0 Control Register"
bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1"
bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512")
bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "No effect,DTR=1"
bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0"
textline " "
endif
bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted"
bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset"
textline " "
bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset"
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent"
textline " "
bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started"
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped"
textline " "
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started"
bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset"
textline " "
bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled"
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled"
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
if (((d.l(ad:(0xfffbc000+0x4)))&0x100)==0x100)
group.long 0x04++0x03
line.long 0x00 "US0_MR,USART0 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,Reserved,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
else
group.long 0x04++0x03
line.long 0x00 "US0_MR,USART0 Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit"
bitfld.long 0x00 30. " MODSYNC , Manchester Synchronization Mode" "0 to 1,1 to 0"
textline " "
bitfld.long 0x00 29. " MAN , Manchester Encoder/Decoder Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered"
bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7"
textline " "
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 22. " VAR_SYNC , Variable Synchronization of Command/Data Sync Start Frame Delimiter" "User defined,US_THR"
endif
textline " "
bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled"
bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK"
textline " "
bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x"
bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK"
textline " "
bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "CHRL,9-bit"
bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB,MSB"
textline " "
bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback"
bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1 bit,1.5 bits,2 bits,?..."
textline " "
bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop"
bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous"
textline " "
bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits"
bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/DIV,Reserved,SCK"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
else
bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,ISO7816 T = 0,Reserved,ISO7816 T = 1,Reserved,IrDA,?..."
endif
endif
sif (cpu()=="AT91SAM9261")
wgroup.long 0x08++0x3
line.long 0x00 "US0_IER,USART0 Interrupt Enable Register"
bitfld.long 0x00 20. " MANE ,Manchester Error Interrupt Enable" "No effect,Enabled"
endif
group.long 0x10++0x3
line.long 0x0 "US0_IMR,USART0 Interrupt Mask Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " MANE_set/clr ,Manchester Error Interrupt Enable" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " DSRIC_set/clr ,Data Set Ready Input Change Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " RIIC_set/clr ,Ring Indicator Input Change Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 13. -0x8 13. -0x4 13. " NACK_set/clr ,Non Acknowledge Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 12. -0x8 12. -0x4 12. " RXBUFF_set/clr ,Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " TXBUFE_set/clr ,Buffer Empty Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " ITERATION_set/clr ,Iteration Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " TIMEOUT_set/clr ,Time-out Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 7. -0x8 7. -0x4 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 6. -0x8 6. -0x4 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " RXBRK_set/clr ,Receiver Break Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Disabled,Enabled"
hgroup.long 0x14++0x3
hide.long 0x0 "US0_CSR,USART0 Channel Status Register"
in
hgroup.long 0x18++0x3
hide.long 0x4 "US0_RHR,USART0 Receive Holding Register"
in
wgroup.long 0x1c++0x03
line.long 0x00 "US0_THR,USART0 Transmit Holding Register"
bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command"
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted"
group.long 0x20++0xb
line.long 0x00 "US0_BRGR,USART0 Baud Rate Generator Register"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8"
endif
textline " "
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
line.long 0x04 "US0_RTOR,USART0 Receiver Time-out Register"
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value"
line.long 0x08 "US0_TTGR,USART0 Transmitter Timeguard Register"
hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value"
group.long 0x40++0x03
line.long 0x00 "US0_FIDI,USART0 FI DI RATIO Register"
hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value"
hgroup.long 0x44++0x03
hide.long 0x00 "US0_NER,USART0 Number of Errors Register"
in
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9G10")
group.long 0x50++0x03
line.long 0x00 "US_MAN,USART Manchester Configuration Register"
bitfld.long 0x00 30. " DRIFT , Drift compensation" "Not recover,Recover"
bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0to1,1to0"
textline " "
bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
textline " "
bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0=0-to-1,1=0-to-1"
bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO"
textline " "
bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 x bit period,2 x bit period,3 x bit period,4 x bit period,5 x bit period,6 x bit period,7 x bit period,8 x bit period,9 x bit period,10 x bit period,11 x bit period,12 x bit period,13 x bit period,14 x bit period,15 x bit period"
endif
if (((data.long(ad:(0xfffbc000+0x04)))&0xf)==0x8)
group.long 0x4c++0x03
line.long 0x00 "US0_IF,USART0 IrDA Filter Register"
hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter"
else
hgroup.long 0x4c++0x03
hide.long 0x00 "US0_IF,USART0 IrDA Filter Register"
base vm:0x0
wgroup 0x0++0x0
endif
base ad:0xfffbc000
width 0xb
tree.end
tree "PDC_USART3"
width 13.
group.long 0x100++0x1f
line.long 0x00 "USART3_RPR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Receive Pointer Register"
line.long 0x04 "USART3_RCR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "USART3_TPR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Transmit Pointer Register"
line.long 0x0c "USART3_TCR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "USART3_RNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Receive Next Pointer Register"
line.long 0x14 "USART3_RNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "USART3_TNPR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Transmit Next Pointer Register"
line.long 0x1c "USART3_TNCR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "USART3_PTCR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "USART3_PTSR,Universal Synchronous/Asynchronous Receiver/Transmitter 3 PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree.open "SSC (Synchronous Serial Controller)"
tree "SSC0"
base ad:0xfffc0000
width 11.
wgroup.long 0x00++0x03
line.long 0x00 "SSC0_CR,SSC0 Control Register"
bitfld.long 0x00 15. " SWRST ,Software Reset" "No effect,Reset"
bitfld.long 0x00 9. " TXDIS ,Transmit Disable" "No effect,Disable"
textline " "
bitfld.long 0x00 8. " TXEN ,Transmit Enable" "No effect,Enable"
bitfld.long 0x00 1. " RXDIS ,Receive Disable" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " RXEN ,Receive Enable" "No effect,Enable"
group.long 0x04++0x03
line.long 0x00 "SSC0_CMR,SSC0 Clock Mode Register"
hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock Divider"
group.long 0x10++0xf
line.long 0x00 "SSC0_RCMR,SSC0 Receive Clock Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive Period Divider Selection"
hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive Start Delay"
textline " "
bitfld.long 0x00 12. " STOP ,Receive Stop Selection" "After completion,After starting"
bitfld.long 0x00 8.--11. " START ,Receive Start Selection" "Continuous,Transmit start,Low level on RF,High level on RF,Falling edge on RF,Rising edge on RF,Any level change on RF,Any edge on RF,Compare 0,?..."
textline " "
bitfld.long 0x00 6.--7. " CKG ,Receive Clock Gating Selection" "None,RF low,RF high,?..."
bitfld.long 0x00 5. " CKI ,Receive Clock Inversion" "Falling/rising,Rising/falling"
textline " "
bitfld.long 0x00 2.--4. " CKO ,Receive Clock Output Mode Selection" "None,Continuous,Transfers,?..."
bitfld.long 0x00 0.--1. " CKS ,Receive Clock Selection" "Divided Clock,TK Clock signal,RK Pin,?..."
line.long 0x04 "SSC0_RFMR,SSC0 Receive Frame Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9M11")
bitfld.long 0x04 28.--31. " FSLEN_EXT , FSLEN Field Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
endif
bitfld.long 0x04 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
bitfld.long 0x04 20.--22. " FSOS ,Receive Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..."
textline " "
bitfld.long 0x04 16.--19. " FSLEN ,Receive Frame Sync Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
textline " "
bitfld.long 0x04 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
bitfld.long 0x04 5. " LOOP ,Loop Mode" "Normal,Loop"
textline " "
bitfld.long 0x04 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
line.long 0x08 "SSC0_TCMR,SSC0 Transmit Clock Mode Register"
hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit Period Divider Selection"
hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit Start Delay"
textline " "
bitfld.long 0x08 8.--11. " START ,Transmit Start Selection" "Continuous,Receive start,Low level on TF,High level on TF,Falling edge on TF,Rising edge on TF,Any level change on TF,Any edge on TF,?..."
bitfld.long 0x08 6.--7. " CKG ,Transmit Clock Gating Selection" "None,TF low,TF high,?..."
textline " "
bitfld.long 0x08 5. " CKI ,Transmit Clock Inversion" "Falling/rising,Rising/falling"
bitfld.long 0x08 2.--4. " CKO ,Transmit Clock Output Mode Selection" "None,Continuous,Transfers,?..."
textline " "
bitfld.long 0x08 0.--1. " CKS ,Transmit Clock Selection" "Divided Clock,RK Clock signal,TK Pin,?..."
line.long 0x0c "SSC0_TFMR,SSC0 Transmit Frame Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9M11")
bitfld.long 0x0c 28.--31. " FSLEN_EXT , FSLEN Field Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
endif
bitfld.long 0x0c 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
bitfld.long 0x0c 23. " FSDEN ,Frame Sync Data Enable" "TD default,SSC_TSHR shifted out"
textline " "
bitfld.long 0x0c 20.--22. " FSOS ,Transmit Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..."
bitfld.long 0x0c 16.--19. " FSLEN ,Transmit Frame Sync Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x0c 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
bitfld.long 0x0c 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
textline " "
bitfld.long 0x0c 5. " DATDEF ,Data Default Value" "Low,High"
bitfld.long 0x0c 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
sif (cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")||cpu()=="AT91SAM9M11"
hgroup.long 0x20++0x03
hide.long 0x00 "SSC0_RHR,SSC0 Receive Holding Register"
in
else
rgroup.long 0x20++0x03
line.long 0x00 "SSC0_RHR,SSC0 Receive Holding Register"
endif
wgroup.long 0x24++0x03
line.long 0x00 "SSC0_THR,SSC0 Transmit Holding Register"
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")||cpu()=="AT91SAM9M11"
hgroup.long 0x30++0x03
hide.long 0x00 "SSC0_RSHR,SSC0 Receive Synchronization Holding Register"
in
else
rgroup.long 0x30++0x03
line.long 0x00 "SSC0_RSHR,SSC0 Receive Synchronization Holding Register"
hexmask.long.word 0x00 0.--15. 1. " RSDAT ,Receive Synchronization Data"
endif
group.long 0x34++0xB
line.long 0x00 "SSC0_TSHR,SSC0 Transmit Synchronization Holding Register"
hexmask.long.word 0x00 0.--15. 1. " TSDAT ,Transmit Synchronization Data"
line.long 0x4 "SSC0_RC0R,SSC0 Receive Compare 0 Register"
hexmask.long.word 0x4 0.--15. 1. " CP0 ,Receive Compare Data 0"
line.long 0x8 "SSC0_RC1R,SSC0 Receive Compare 1 Register"
hexmask.long.word 0x8 0.--15. 1. " CP1 ,Receive Compare Data 1"
hgroup.long 0x40++0x03
hide.long 0x00 "SSC0_SR,SSC0 Status Register"
in
group.long 0x4c++0x3
line.long 0x0 "SSC0_IMR,SSC0 Interrupt Mask Register"
setclrfld.long 0x0 11. -0x08 11. -0x4 11. " RXSYN_set/clr ,Rx Sync Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x08 10. -0x4 10. " TXSYN_set/clr ,Tx Sync Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x08 9. -0x4 9. " CP1_set/clr ,Compare 1 Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x08 8. -0x4 8. " CP0_set/clr ,Compare 0 Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
setclrfld.long 0x0 7. -0x08 7. -0x4 7. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " ENDRX_set/clr ,End of Reception Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " OVRUN_set/clr ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " RXRDY_set/clr ,Receive Ready Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
setclrfld.long 0x0 3. -0x08 3. -0x4 3. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x08 2. -0x4 2. " ENDTX_set/clr ,End of Transmission Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " TXEMPTY_set/clr ,Transmit Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " TXRDY_set/clr ,Transmit Ready Interrupt Mask" "Disabled,Enabled"
sif (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
group.long 0xe4++0x3
line.long 0x00 "SSC_WPMR,SSC Write Protect Mode Register"
hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY"
bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled"
hgroup.long 0xe8++0x3
hide.long 0x00 "SSC_WPSR,SSC Write Protect Status Register"
in
endif
width 0xb
tree.end
tree "PDC_SSC0"
width 13.
group.long 0x100++0x1f
line.long 0x00 "SSC0_RPR,Synchronous Serial Controller Receive Pointer Register"
line.long 0x04 "SSC0_RCR,Synchronous Serial Controller Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "SSC0_TPR,Synchronous Serial Controller Transmit Pointer Register"
line.long 0x0c "SSC0_TCR,Synchronous Serial Controller Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "SSC0_RNPR,Synchronous Serial Controller Receive Next Pointer Register"
line.long 0x14 "SSC0_RNCR,Synchronous Serial Controller Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "SSC0_TNPR,Synchronous Serial Controller Transmit Next Pointer Register"
line.long 0x1c "SSC0_TNCR,Synchronous Serial Controller Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "SSC0_PTCR,Synchronous Serial Controller PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "SSC0_PTSR,Synchronous Serial Controller PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree "SSC1"
base ad:0xfffc4000
width 11.
wgroup.long 0x00++0x03
line.long 0x00 "SSC1_CR,SSC1 Control Register"
bitfld.long 0x00 15. " SWRST ,Software Reset" "No effect,Reset"
bitfld.long 0x00 9. " TXDIS ,Transmit Disable" "No effect,Disable"
textline " "
bitfld.long 0x00 8. " TXEN ,Transmit Enable" "No effect,Enable"
bitfld.long 0x00 1. " RXDIS ,Receive Disable" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " RXEN ,Receive Enable" "No effect,Enable"
group.long 0x04++0x03
line.long 0x00 "SSC1_CMR,SSC1 Clock Mode Register"
hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock Divider"
group.long 0x10++0xf
line.long 0x00 "SSC1_RCMR,SSC1 Receive Clock Mode Register"
hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive Period Divider Selection"
hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive Start Delay"
textline " "
bitfld.long 0x00 12. " STOP ,Receive Stop Selection" "After completion,After starting"
bitfld.long 0x00 8.--11. " START ,Receive Start Selection" "Continuous,Transmit start,Low level on RF,High level on RF,Falling edge on RF,Rising edge on RF,Any level change on RF,Any edge on RF,Compare 0,?..."
textline " "
bitfld.long 0x00 6.--7. " CKG ,Receive Clock Gating Selection" "None,RF low,RF high,?..."
bitfld.long 0x00 5. " CKI ,Receive Clock Inversion" "Falling/rising,Rising/falling"
textline " "
bitfld.long 0x00 2.--4. " CKO ,Receive Clock Output Mode Selection" "None,Continuous,Transfers,?..."
bitfld.long 0x00 0.--1. " CKS ,Receive Clock Selection" "Divided Clock,TK Clock signal,RK Pin,?..."
line.long 0x04 "SSC1_RFMR,SSC1 Receive Frame Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9M11")
bitfld.long 0x04 28.--31. " FSLEN_EXT , FSLEN Field Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
endif
bitfld.long 0x04 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
bitfld.long 0x04 20.--22. " FSOS ,Receive Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..."
textline " "
bitfld.long 0x04 16.--19. " FSLEN ,Receive Frame Sync Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
textline " "
bitfld.long 0x04 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
bitfld.long 0x04 5. " LOOP ,Loop Mode" "Normal,Loop"
textline " "
bitfld.long 0x04 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
line.long 0x08 "SSC1_TCMR,SSC1 Transmit Clock Mode Register"
hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit Period Divider Selection"
hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit Start Delay"
textline " "
bitfld.long 0x08 8.--11. " START ,Transmit Start Selection" "Continuous,Receive start,Low level on TF,High level on TF,Falling edge on TF,Rising edge on TF,Any level change on TF,Any edge on TF,?..."
bitfld.long 0x08 6.--7. " CKG ,Transmit Clock Gating Selection" "None,TF low,TF high,?..."
textline " "
bitfld.long 0x08 5. " CKI ,Transmit Clock Inversion" "Falling/rising,Rising/falling"
bitfld.long 0x08 2.--4. " CKO ,Transmit Clock Output Mode Selection" "None,Continuous,Transfers,?..."
textline " "
bitfld.long 0x08 0.--1. " CKS ,Transmit Clock Selection" "Divided Clock,RK Clock signal,TK Pin,?..."
line.long 0x0c "SSC1_TFMR,SSC1 Transmit Frame Mode Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15"||cpu()=="AT91SAM9M11")
bitfld.long 0x0c 28.--31. " FSLEN_EXT , FSLEN Field Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
endif
bitfld.long 0x0c 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative"
bitfld.long 0x0c 23. " FSDEN ,Frame Sync Data Enable" "TD default,SSC_TSHR shifted out"
textline " "
bitfld.long 0x0c 20.--22. " FSOS ,Transmit Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..."
bitfld.long 0x0c 16.--19. " FSLEN ,Transmit Frame Sync Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x0c 8.--11. " DATNB ,Data Number per Frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words"
bitfld.long 0x0c 7. " MSBF ,Most Significant Bit First" "LSB,MSB"
textline " "
bitfld.long 0x0c 5. " DATDEF ,Data Default Value" "Low,High"
bitfld.long 0x0c 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits"
sif (cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")||cpu()=="AT91SAM9M11"
hgroup.long 0x20++0x03
hide.long 0x00 "SSC1_RHR,SSC1 Receive Holding Register"
in
else
rgroup.long 0x20++0x03
line.long 0x00 "SSC1_RHR,SSC1 Receive Holding Register"
endif
wgroup.long 0x24++0x03
line.long 0x00 "SSC1_THR,SSC1 Transmit Holding Register"
sif (cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")||cpu()=="AT91SAM9M11"
hgroup.long 0x30++0x03
hide.long 0x00 "SSC1_RSHR,SSC1 Receive Synchronization Holding Register"
in
else
rgroup.long 0x30++0x03
line.long 0x00 "SSC1_RSHR,SSC1 Receive Synchronization Holding Register"
hexmask.long.word 0x00 0.--15. 1. " RSDAT ,Receive Synchronization Data"
endif
group.long 0x34++0xB
line.long 0x00 "SSC1_TSHR,SSC1 Transmit Synchronization Holding Register"
hexmask.long.word 0x00 0.--15. 1. " TSDAT ,Transmit Synchronization Data"
line.long 0x4 "SSC1_RC0R,SSC1 Receive Compare 0 Register"
hexmask.long.word 0x4 0.--15. 1. " CP0 ,Receive Compare Data 0"
line.long 0x8 "SSC1_RC1R,SSC1 Receive Compare 1 Register"
hexmask.long.word 0x8 0.--15. 1. " CP1 ,Receive Compare Data 1"
hgroup.long 0x40++0x03
hide.long 0x00 "SSC1_SR,SSC1 Status Register"
in
group.long 0x4c++0x3
line.long 0x0 "SSC1_IMR,SSC1 Interrupt Mask Register"
setclrfld.long 0x0 11. -0x08 11. -0x4 11. " RXSYN_set/clr ,Rx Sync Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x08 10. -0x4 10. " TXSYN_set/clr ,Tx Sync Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x08 9. -0x4 9. " CP1_set/clr ,Compare 1 Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x08 8. -0x4 8. " CP0_set/clr ,Compare 0 Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
setclrfld.long 0x0 7. -0x08 7. -0x4 7. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " ENDRX_set/clr ,End of Reception Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " OVRUN_set/clr ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " RXRDY_set/clr ,Receive Ready Interrupt Mask" "Disabled,Enabled"
textline " "
sif (cpu()!="AT91SAM9G35"&&cpu()!="AT91SAM9G25"&&cpu()!="AT91SAM9G15")
setclrfld.long 0x0 3. -0x08 3. -0x4 3. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x08 2. -0x4 2. " ENDTX_set/clr ,End of Transmission Interrupt Mask" "Disabled,Enabled"
textline " "
endif
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " TXEMPTY_set/clr ,Transmit Empty Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " TXRDY_set/clr ,Transmit Ready Interrupt Mask" "Disabled,Enabled"
sif (cpu()=="AT91SAM9G35"||cpu()=="AT91SAM9G25"||cpu()=="AT91SAM9G15")
group.long 0xe4++0x3
line.long 0x00 "SSC_WPMR,SSC Write Protect Mode Register"
hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY"
bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled"
hgroup.long 0xe8++0x3
hide.long 0x00 "SSC_WPSR,SSC Write Protect Status Register"
in
endif
width 0xb
tree.end
tree "PDC_SSC1"
width 13.
group.long 0x100++0x1f
line.long 0x00 "SSC1_RPR,Synchronous Serial Controller Receive Pointer Register"
line.long 0x04 "SSC1_RCR,Synchronous Serial Controller Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "SSC1_TPR,Synchronous Serial Controller Transmit Pointer Register"
line.long 0x0c "SSC1_TCR,Synchronous Serial Controller Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "SSC1_RNPR,Synchronous Serial Controller Receive Next Pointer Register"
line.long 0x14 "SSC1_RNCR,Synchronous Serial Controller Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "SSC1_TNPR,Synchronous Serial Controller Transmit Next Pointer Register"
line.long 0x1c "SSC1_TNCR,Synchronous Serial Controller Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "SSC1_PTCR,Synchronous Serial Controller PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "SSC1_PTSR,Synchronous Serial Controller PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree.open "TC (Timer/Counter)"
tree "TC Channel 0"
base ad:0xfffa0000
width 9.
wgroup.long 0x00++0x03
line.long 0x00 "TC0_CCR,TC0 Channel Control Register"
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Trigger"
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enable"
if (data.long(ad:0xfffa0000+0x04)&0x8000)==0x0000
group.long 0x04++0x03
line.long 0x00 "TC0_CMR,TC0 Channel Mode Register (Capture Mode)"
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Each"
textline " "
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "No,Yes"
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
textline " "
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
textline " "
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
else
group.long 0x04++0x03
line.long 0x00 "TC0_CMR,TC0 Channel Mode Register (Waveform Mode)"
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UPDOWN without automatic,UP with automatic,UPDOWN with automatic"
textline " "
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
textline " "
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Each"
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "No,Yes"
textline " "
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
textline " "
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
endif
rgroup.long 0x10++0x03
line.long 0x00 "TC0_CV,TC0 Counter Value Register"
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
if (data.long(ad:0xfffa0000+0x04)&0x8000)==0x0000
rgroup.long 0x14++0x07
line.long 0x00 "TC0_RA,TC0 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC0_RB,TC0 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
else
group.long 0x14++0x07
line.long 0x00 "TC0_RA,TC0 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC0_RB,TC0 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
endif
group.long 0x1c++0x03
line.long 0x00 "TC0_RC,TC0 Register C"
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
hgroup.long 0x20++0x03
hide.long 0x00 "TC0_SR,TC0 Status Register"
in
group.long 0x24++0xB
sif (cpu()=="AT91SAM9M11")
line.long 0x00 "TC0_IMR,TC0 Interrupt Mask Register"
else
line.long 0x8 "TC0_IMR,TC0 Interrupt Mask Register"
endif
setclrfld.long 0x8 7. 0x0 7. 0x4 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
width 0xb
tree.end
tree "TC Channel 1"
base ad:0xfffa0040
width 9.
wgroup.long 0x00++0x03
line.long 0x00 "TC1_CCR,TC1 Channel Control Register"
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Trigger"
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enable"
if (data.long(ad:0xfffa0040+0x04)&0x8000)==0x0000
group.long 0x04++0x03
line.long 0x00 "TC1_CMR,TC1 Channel Mode Register (Capture Mode)"
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Each"
textline " "
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "No,Yes"
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
textline " "
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
textline " "
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
else
group.long 0x04++0x03
line.long 0x00 "TC1_CMR,TC1 Channel Mode Register (Waveform Mode)"
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UPDOWN without automatic,UP with automatic,UPDOWN with automatic"
textline " "
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
textline " "
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Each"
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "No,Yes"
textline " "
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
textline " "
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
endif
rgroup.long 0x10++0x03
line.long 0x00 "TC1_CV,TC1 Counter Value Register"
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
if (data.long(ad:0xfffa0040+0x04)&0x8000)==0x0000
rgroup.long 0x14++0x07
line.long 0x00 "TC1_RA,TC1 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC1_RB,TC1 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
else
group.long 0x14++0x07
line.long 0x00 "TC1_RA,TC1 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC1_RB,TC1 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
endif
group.long 0x1c++0x03
line.long 0x00 "TC1_RC,TC1 Register C"
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
hgroup.long 0x20++0x03
hide.long 0x00 "TC1_SR,TC1 Status Register"
in
group.long 0x24++0xB
sif (cpu()=="AT91SAM9M11")
line.long 0x00 "TC1_IMR,TC1 Interrupt Mask Register"
else
line.long 0x8 "TC1_IMR,TC1 Interrupt Mask Register"
endif
setclrfld.long 0x8 7. 0x0 7. 0x4 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
width 0xb
tree.end
tree "TC Channel 2"
base ad:0xfffa0080
width 9.
wgroup.long 0x00++0x03
line.long 0x00 "TC2_CCR,TC2 Channel Control Register"
bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Trigger"
bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disable"
textline " "
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enable"
if (data.long(ad:0xfffa0080+0x04)&0x8000)==0x0000
group.long 0x04++0x03
line.long 0x00 "TC2_CMR,TC2 Channel Mode Register (Capture Mode)"
bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising edge,Falling edge,Each edge"
bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising edge,Falling edge,Each edge"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA"
bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Each"
textline " "
bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "No,Yes"
bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped"
textline " "
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
textline " "
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
else
group.long 0x04++0x03
line.long 0x00 "TC2_CMR,TC2 Channel Mode Register (Waveform Mode)"
bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform"
bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Cleared,Toggled"
bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Cleared,Toggled"
textline " "
bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggled"
bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP without automatic,UPDOWN without automatic,UP with automatic,UPDOWN with automatic"
textline " "
bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2"
textline " "
bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Each"
bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "No,Yes"
textline " "
bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped"
bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed"
textline " "
bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising edge,Falling edge"
bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2"
endif
rgroup.long 0x10++0x03
line.long 0x00 "TC2_CV,TC2 Counter Value Register"
hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value"
if (data.long(ad:0xfffa0080+0x04)&0x8000)==0x0000
rgroup.long 0x14++0x07
line.long 0x00 "TC2_RA,TC2 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC2_RB,TC2 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
else
group.long 0x14++0x07
line.long 0x00 "TC2_RA,TC2 Register A"
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A"
line.long 0x04 "TC2_RB,TC2 Register B"
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B"
endif
group.long 0x1c++0x03
line.long 0x00 "TC2_RC,TC2 Register C"
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C"
hgroup.long 0x20++0x03
hide.long 0x00 "TC2_SR,TC2 Status Register"
in
group.long 0x24++0xB
sif (cpu()=="AT91SAM9M11")
line.long 0x00 "TC2_IMR,TC2 Interrupt Mask Register"
else
line.long 0x8 "TC2_IMR,TC2 Interrupt Mask Register"
endif
setclrfld.long 0x8 7. 0x0 7. 0x4 7. " ETRGS_set/clr ,External Trigger" "Disabled,Enabled"
setclrfld.long 0x8 6. 0x0 6. 0x4 6. " LDRBS_set/clr ,RB Loading" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 5. 0x0 5. 0x4 5. " LDRAS_set/clr ,RA Loading" "Disabled,Enabled"
setclrfld.long 0x8 4. 0x0 4. 0x4 4. " CPCS_set/clr ,RC Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 3. 0x0 3. 0x4 3. " CPBS_set/clr ,RB Compare" "Disabled,Enabled"
setclrfld.long 0x8 2. 0x0 2. 0x4 2. " CPAS_set/clr ,RA Compare" "Disabled,Enabled"
textline " "
setclrfld.long 0x8 1. 0x0 1. 0x4 1. " LOVRS_set/clr ,Load Overrun" "Disabled,Enabled"
setclrfld.long 0x8 0. 0x0 0. 0x4 0. " COVFS_set/clr ,Counter Overflow" "Disabled,Enabled"
width 0xb
tree.end
tree "Block Registers"
base ad:0xfffa0000
width 8.
wgroup.long 0xc0++0x3
line.long 0x00 "TC_BCR,TC Block Control Register"
bitfld.long 0x00 0. " SYNC ,Synchro Command" "No effect,Assert"
group.long 0xc4++0x3
line.long 0x00 "TC_BMR,TC Block Mode Register"
bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1"
bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2"
bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2"
width 0xb
tree.end
tree.end
tree "DMAC (DMA Controller)"
base ad:0xffffe600
width 0x13
group.long 0x00++0x7
line.long 0x00 "DMAC_GCFG,DMAC Global Configuration Register"
bitfld.long 0x00 4. " ARB_CFG ,Arbiter configuration" "Fixed,Round robin"
bitfld.long 0x00 0. " IF0_BIGEND ,Endian configuration" "Little endian,Big endian"
line.long 0x04 "DMAC_EN,DMAC Enable Register"
bitfld.long 0x04 0. " ENABLE ,DMA Controller Enable" "Disabled,Enabled"
group.long 0x20++0x3
line.long 0x00 "DMAC_EBCIMR, DMAC Error Buffer Transfer and Chained Buffer Transfer Mask Register"
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " ERR1_Clear/Set ,Access Error Interrupt Enable Register" "Disabled,Enabled"
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " ERR0_Clear/Set ,Access Error Interrupt Enable Register" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CBTC1_Clear/Set , Chained Buffer Transfer Completed " "Disabled,Enabled"
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CBTC0_Clear/Set , Chained Buffer Transfer Completed " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " BTC1_Clear/Set ,Buffer Transfer Completed" "Disabled,Enabled"
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " BTC0_Clear/Set ,Buffer Transfer Completed" "Disabled,Enabled"
rgroup.long 0x24++0x3
line.long 0x00 "DMAC_EBCISR, DMAC Error Buffer Transfer and Chained Buffer Transfer Status Register"
bitfld.long 0x00 16. " ERR1 , Access Error Interrupt Enable Register" "Disabled,Enabled"
bitfld.long 0x00 17. " ERR0 , Access Error Interrupt Enable Register" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " CBTC1 ,Chained Buffer Transfer Completed " "Disabled,Enabled"
bitfld.long 0x00 8. " CBTC0 ,Chained Buffer Transfer Completed " "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " BTC1 ,Buffer Transfer Completed" "Disabled,Enabled"
bitfld.long 0x00 0. " BTC0 ,Buffer Transfer Completed" "Disabled,Enabled"
wgroup.long 0x28++0x7
line.long 0x00 "DMAC_CHER, DMAC Channel Handler Enable Register"
bitfld.long 0x00 25. " KEEP1 ,Resume the current channel from an automatic stall state" "Disabled,Enabled"
bitfld.long 0x00 24. " KEEP0 ,Resume the current channel from an automatic stall state" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " SUSP1 ,Freezes the relevant channel and its current context" "Disabled,Enabled"
bitfld.long 0x00 8. " SUSP0 ,Freeze the relevant channel and its current context" "Disabled,Enabled"
textline " "
bitfld.long 0x00 1. " ENA1 , Enable the relevant channel" "Disabled,Enabled"
bitfld.long 0x00 0. " ENA0 , Enable the relevant channel" "Disabled,Enabled"
line.long 0x04 "DMAC_CHDR, DMAC Channel Handler Disable Register"
bitfld.long 0x04 9. " RES1 ,Resume the channel transfer restoring its context" "Enabled,Disabled"
bitfld.long 0x04 8. " RES0 ,Resume the channel transfer restoring its context" "Enabled,Disabled"
textline " "
bitfld.long 0x04 1. " DIS1 ,Disable the relevant DMAC Channel" "Enabled,Disabled"
bitfld.long 0x04 0. " DIS0 ,Disable the relevant DMAC Channel" "Enabled,Disabled"
rgroup.long 0x02c++0x3
line.long 0x00 "DMAC_CHSR, DMAC Channel Handler Status Register"
bitfld.long 0x00 25. " STAL1 , Relevant channel enabled" "Disabled,Enabled"
bitfld.long 0x00 24. " STAL0 ,Relevant channel enabled" "Disabled,Enabled"
textline " "
bitfld.long 0x00 17. " EMPT1 ,Relevant channel is empty" "Not Empty,Empty"
bitfld.long 0x00 16. " EMPT0 ,Relevant channel is empty" "Not Empty,Empty"
textline " "
bitfld.long 0x00 9. " SUSP1 , Channel transfer is suspended" "Not suspended,Suspended"
bitfld.long 0x00 8. " SUSP0 , Channel transfer is suspended" "Not suspended,Suspended"
textline " "
bitfld.long 0x00 1. " ENA1 , Relevant channel enabled" "Disabled,Enabled"
bitfld.long 0x00 0. " ENA0 , Relevant channel enabled" "Disabled,Enabled"
group.long 0x03c--0x05b
line.long 0x00 "DMAC_SADDR0,DMAC Channel 0 Source Address Register"
hexmask.long 0x00 0.--31. 1. " SADDRx , Channel 0 source address"
line.long 0x04 "DMAC_DADDR0, DMAC Channel 0 Destination Address Register"
hexmask.long 0x04 0.--31. 1. " DADDRx , Channel 0 destination address"
line.long 0x08 "DMAC_DSCR0,DMAC Channel 0 Descriptor Address Register"
hexmask.long 0x08 2.--31. 4. " DSCR0 , Buffer Transfer descriptor address"
bitfld.long 0x08 0.--1. " DSCR0_IF , Buffer Transfer descriptor fetched" "Fetched,?..."
line.long 0x0c "DMAC_CTRLA0,DMAC Channel 0 Control A Register"
bitfld.long 0x0c 31. " DONE , Buffer Transfer descriptor fetched" "Performed,Done"
bitfld.long 0x0c 28.--29. " DST_WIDTH , Buffer Transfer descriptor fetched" "BYTE,HALF-WORD,WORD,WORD"
textline " "
bitfld.long 0x0c 24.--25. " SRC_WIDTH , Buffer Transfer descriptor fetched" "BYTE,HALF-WORD,WORD,WORD"
hexmask.long.word 0x0c 0.--15. 1. " BTSIZE ,Buffer Transfer Size"
line.long 0x10 "DMAC_CTRLB0,DMAC Channel 0 Control B Register"
bitfld.long 0x10 31. " AUTO , Automatic multiple buffer transfer enabled" "Disabled,Enabled"
bitfld.long 0x10 28.--29. " DST_INCR , Addressing mode" "INCREMENTING,DECREMENTING,FIXED,?..."
textline " "
bitfld.long 0x10 24.--25. " SRC_INCR , Addressing mode" "INCREMENTING,DECREMENTING,FIXED,?..."
bitfld.long 0x10 20. " DST_DSCR , Destination descriptor" "Address updated,Disabled"
textline " "
bitfld.long 0x10 16. " SRC_DSCR , Source descriptor" "Address updated,Disabled"
bitfld.long 0x10 12. " DST_PIP , Picture-in-Picture destination" "Disabled,Enabled"
textline " "
bitfld.long 0x10 8. " SRC_PIP , Picture-in-Picture source " "Disabled,Enabled"
textline " "
bitfld.long 0x10 4.--5. " DIF , Destination Interface Selection Field" "Transfer done,?..."
bitfld.long 0x10 0.--1. " SIF , Source Interface Selection Field" "Transfer done,?..."
line.long 0x14 "DMAC_CFG0,DMAC Channel 0 Configuration Register"
bitfld.long 0x14 16. " SOD , Stop On Done " "Disabled,Enabled"
bitfld.long 0x14 12. " DST_REP , Destination mode" "2 buffers,Reloaded"
textline " "
bitfld.long 0x14 8. " SRC_REP , Source mode" "2 buffers,Reloaded"
line.long 0x18 "DMAC_SPIP0,DMAC Channel 0 Source Picture in Picture Configuration Register"
hexmask.long.word 0x18 16.--25. 1. " SPIP_BOUNDARY , Number of source transfers to perform"
hexmask.long.word 0x18 0.--15. 1. " SPIP_HOLE ,Value to add to the address when the programmable boundary has been reached"
line.long 0x1c "DMAC_DPIP0,DMAC Channel 0 Destination Picture in Picture Configuration Register"
hexmask.long.word 0x1c 16.--25. 1. " DPIP_BOUNDARY , Number of source transfers to perform"
hexmask.long.word 0x1c 0.--15. 1. " DPIP_HOLE ,Value to add to the address when the programmable boundary has been reached"
group.long 0x64--0x83
line.long 0x00 "DMAC_SADDR1,DMAC Channel 1 Source Address Register"
hexmask.long 0x00 0.--31. 1. " SADDRx , Channel 1 source address"
line.long 0x04 "DMAC_DADDR1, DMAC Channel 1 Destination Address Register"
hexmask.long 0x04 0.--31. 1. " DADDRx , Channel 1 destination address"
line.long 0x08 "DMAC_DSCR1,DMAC Channel 1 Descriptor Address Register"
hexmask.long 0x08 2.--31. 4. " DSCR1 , Buffer Transfer descriptor address"
bitfld.long 0x08 0.--1. " DSCR1_IF , Buffer Transfer descriptor fetched" "Fetched,?..."
line.long 0x0c "DMAC_CTRLA1,DMAC Channel 1 Control A Register"
bitfld.long 0x0c 31. " DONE , Buffer Transfer descriptor fetched" "Performed,Done"
bitfld.long 0x0c 28.--29. " DST_WIDTH , Buffer Transfer descriptor fetched" "BYTE,HALF-WORD,WORD,WORD"
textline " "
bitfld.long 0x0c 24.--25. " SRC_WIDTH , Buffer Transfer descriptor fetched" "BYTE,HALF-WORD,WORD,WORD"
hexmask.long.word 0x0c 0.--15. 1. " BTSIZE ,Buffer Transfer Size"
line.long 0x10 "DMAC_CTRLB1,DMAC Channel 1 Control B Register"
bitfld.long 0x10 31. " AUTO , Automatic multiple buffer transfer enabled" "Disabled,Enabled"
bitfld.long 0x10 28.--29. " DST_INCR , Addressing mode" "INCREMENTING,DECREMENTING,FIXED,?..."
textline " "
bitfld.long 0x10 24.--25. " SRC_INCR , Addressing mode" "INCREMENTING,DECREMENTING,FIXED,?..."
bitfld.long 0x10 20. " DST_DSCR , Destination descriptor" "Address updated,Disabled"
textline " "
bitfld.long 0x10 16. " SRC_DSCR , Source descriptor" "Address updated,Disabled"
bitfld.long 0x10 12. " DST_PIP , Picture-in-Picture destination" "Disabled,Enabled"
textline " "
bitfld.long 0x10 8. " SRC_PIP , Picture-in-Picture source " "Disabled,Enabled"
textline " "
bitfld.long 0x10 4.--5. " DIF , Destination Interface Selection Field" "Transfer done,?..."
bitfld.long 0x10 0.--1. " SIF , Source Interface Selection Field" "Transfer done,?..."
line.long 0x14 "DMAC_CFG1,DMAC Channel 1 Configuration Register"
bitfld.long 0x14 16. " SOD , Stop On Done " "Disabled,Enabled"
bitfld.long 0x14 12. " DST_REP , Destination mode" "2 buffers,Reloaded"
textline " "
bitfld.long 0x14 8. " SRC_REP , Source mode" "2 buffers,Reloaded"
line.long 0x18 "DMAC_SPIP1,DMAC Channel 1 Source Picture in Picture Configuration Register"
hexmask.long.word 0x18 16.--25. 1. " SPIP_BOUNDARY , Number of source transfers to perform"
hexmask.long.word 0x18 0.--15. 1. " SPIP_HOLE , Value to add to the address when the programmable boundary has been reached"
line.long 0x1c "DMAC_DPIP1,DMAC Channel 1 Destination Picture in Picture Configuration Register"
hexmask.long.word 0x1c 16.--25. 1. " DPIP_BOUNDARY , Number of source transfers to perform"
hexmask.long.word 0x1c 0.--15. 1. " DPIP_HOLE , Value to add to the address when the programmable boundary has been reached"
tree.end
tree.open "MCI (MultiMedia Card Interface)"
tree "MCI Registers"
base ad:0xfffa4000
width 0xb
wgroup.long 0x00++0x03
line.long 0x00 "MCI_CR,MCI Control Register"
bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset"
bitfld.long 0x00 3. " PWSDIS ,Power Save Mode Disable" "No effect,Disabled"
textline " "
bitfld.long 0x00 2. " PWSEN ,Power Save Mode Enable" "No effect,Enabled"
bitfld.long 0x00 1. " MCIDIS ,Multi-Media Interface Disable" "No effect,Disabled"
textline " "
bitfld.long 0x00 0. " MCIEN ,Multi-Media Interface Enable" "No effect,Enabled"
sif (cpu()=="AT91SAM9261")
group.long 0x04++3
line.long 0x00 "MCI_MR,MCI Mode Register"
hexmask.long.word 0x00 16.--29. 1. " BLKLEN ,Data Block Length"
bitfld.long 0x00 15. " PDCMODE ,PDC-oriented Mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 14. " PDCPADV ,PDC Padding Value" "0x00,0xFF"
bitfld.long 0x00 8.--10. " PWSDIV ,Power Saving Divider" "Clock/2,Clock/3,Clock/5,Clock/9,Clock/17,Clock/33,Clock/65,Clock/129"
textline " "
hexmask.long.byte 0x00 0.--7. 1. 1. " CLKDIV ,Clock Divider"
else
group.long 0x04++3
line.long 0x00 "MCI_MR,MCI Mode Register"
hexmask.long.word 0x00 16.--31. 1. " BLKLEN ,Data Block Length"
bitfld.long 0x00 15. " PDCMODE ,PDC-oriented Mode" "Disabled,Enabled"
textline " "
bitfld.long 0x00 14. " PDCPADV ,PDC Padding Value" "0x00,0xFF"
bitfld.long 0x00 13. " PDCFBYTE ,PDC Force Byte Transfer" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " WRPROOF ,Write Proof Enable" "Disabled,Enabled"
bitfld.long 0x00 11. " RDPROOF ,Read Proof Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8.--10. " PWSDIV ,Power Saving Divider" "Clock/2,Clock/3,Clock/5,Clock/9,Clock/17,Clock/33,Clock/65,Clock/129"
hexmask.long.byte 0x00 0.--7. 1. 1. " CLKDIV ,Clock Divider"
endif
group.long 0x08++0xb
line.long 0x0 "MCI_DTOR,MCI Data Timeout Register"
bitfld.long 0x0 4.--6. " DTOMUL ,Data Timeout Multiplier" "1,16,128,256,1024,4096,65536,1048576"
bitfld.long 0x0 0.--3. " DTOCYC ,Data Timeout Cycle Number" "0 x Multiplier,1 x Multiplier,2 x Multiplier,3 x Multiplier,4 x Multiplier,5 x Multiplier,6 x Multiplier,7 x Multiplier,8 x Multiplier,9 x Multiplier,10 x Multiplier,11 x Multiplier,12 x Multiplier,13 x Multiplier,14 x Multiplier,15 x Multiplier"
line.long 0x04 "MCI_SDCR,MCI SDCard Register"
bitfld.long 0x04 7. " SDCBUS ,SDCard Bus Width" "1-bit,4-bit"
sif (cpu()=="AT91SAM9261"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpuis("AT91CAP9*"))
textline " "
bitfld.long 0x04 0.--1. " SDCSEL ,SDCard Slot" "A,?..."
else
textline " "
bitfld.long 0x04 0.--1. " SDCSEL ,SDCard Slot" "A,B,?..."
endif
line.long 0x08 "MCI_ARGR,MCI Argument Register"
sif (cpu()=="AT91SAM9261")
wgroup.long 0x14++0x03
line.long 0x00 "MCI_CMDR,MCI Command Register"
bitfld.long 0x00 19.--20. " TRTYP ,Transfer Type" "Single Block,Multiple Block,Stream,?..."
bitfld.long 0x00 18. " TRDIR ,Transfer Direction" "Write,Read"
textline " "
bitfld.long 0x00 16.--17. " TRCMD ,Transfer Command" "No transferred,Started,Stopped,?..."
bitfld.long 0x00 12. " MAXLAT ,Max Latency for Command to Response" "5-cycle,64-cycle"
textline " "
bitfld.long 0x00 11. " OPDCMD ,Open Drain Command" "Push pull,Open drain"
bitfld.long 0x00 8.--10. " SPCMD ,Special Command" "Not special,Initialization,Synchronized,Reserved,Interrupt command,Interrupt response,?..."
textline " "
bitfld.long 0x00 6.--7. " RSPTYP ,Response Type" "No response,48-bit,136-bit,?..."
hexmask.long.byte 0x00 0.--5. 1. " CMDNB ,Command Number"
else
wgroup.long 0x14++0x03
line.long 0x00 "MCI_CMDR,MCI Command Register"
bitfld.long 0x00 24.--25. " IOSPCMD ,SDIO Special Command" "No SDIO Special,SDIO Suspend,SDIO Resume,?..."
bitfld.long 0x00 19.--21. " TRTYP ,Transfer Type" "Single Block,Multiple Block,Stream,Reserved,SDIO Byte,SDIO Block,?..."
textline " "
bitfld.long 0x00 18. " TRDIR ,Transfer Direction" "Write,Read"
bitfld.long 0x00 16.--17. " TRCMD ,Transfer Command" "No transferred,Started,Stopped,?..."
textline " "
bitfld.long 0x00 12. " MAXLAT ,Max Latency for Command to Response" "5-cycle,64-cycle"
bitfld.long 0x00 11. " OPDCMD ,Open Drain Command" "Push pull,Open drain"
textline " "
bitfld.long 0x00 8.--10. " SPCMD ,Special Command" "Not special,Initialization,Synchronized,Reserved,Interrupt command,Interrupt response,?..."
bitfld.long 0x00 6.--7. " RSPTYP ,Response Type" "No response,48-bit,136-bit,?..."
textline " "
hexmask.long.byte 0x00 0.--5. 1. " CMDNB ,Command Number"
endif
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9XE128"||cpu()=="AT91SAM9XE256"||cpu()=="AT91SAM9XE512"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*"))
group.long 0x18++0x3
line.long 0x0 "MCI_BLKR,Block Register"
hexmask.long.word 0x00 16.--31. 1. " BLKLEN ,Data Block Length"
hexmask.long.word 0x00 0.--15. 1. " BCNT ,MMC/SDIO Block Count - SDIO Byte Count"
endif
rgroup.long 0x20++0xF
line.long 0x00 "MCI_RSPR0,MCI Response Register 0"
line.long 0x04 "MCI_RSPR1,MCI Response Register 1"
line.long 0x08 "MCI_RSPR2,MCI Response Register 2"
line.long 0x0c "MCI_RSPR3,MCI Response Register 3"
hgroup.long 0x30++0x3
hide.long 0x0 "MCI_RDR,MCI Receive Data Register"
in
wgroup.long 0x34++0x03
line.long 0x00 "MCI_TDR,MCI Transmit Data Register"
hgroup.long 0x40++0x03
hide.long 0x00 "MCI_SR,MCI Status Register"
in
group.long 0x4c++0x3
line.long 0x0 "MCI_IMR,MCI Interrupt Mask Register"
setclrfld.long 0x0 31. -0x08 31. -0x4 31. " UNRE_set/clr ,UnderRun Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 30. -0x08 30. -0x4 30. " OVRE_set/clr ,Overrun Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 22. -0x08 22. -0x4 22. " DTOE_set/clr ,Data Time-out Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 21. -0x08 21. -0x4 21. " DCRCE_set/clr ,Data CRC Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 20. -0x08 20. -0x4 20. " RTOE_set/clr ,Response Time-out Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 19. -0x08 19. -0x4 19. " RENDE_set/clr ,Response End Bit Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 18. -0x08 18. -0x4 18. " RCRCE_set/clr ,Response CRC Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 17. -0x08 17. -0x4 17. " RDIRE_set/clr ,Response Direction Error Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 16. -0x08 16. -0x4 16. " RINDE_set/clr ,Response Index Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 15. -0x08 15. -0x4 15. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 14. -0x08 14. -0x4 14. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
sif (cpu()=="AT91SAM9260"||cpu()=="AT91SAM9263"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64")
setclrfld.long 0x0 9. -0x08 9. -0x4 9. " SDIOIRQB_set/clr ,SDIOIRQB Interrupt Mask" "Disabled,Enabled"
endif
textline " "
setclrfld.long 0x0 8. -0x08 8. -0x4 8. " SDIOIRQA_set/clr ,SDIOIRQA Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 7. -0x08 7. -0x4 7. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " NOTBUSY_set/clr ,Data Not Busy Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " DTIP_set/clr ,Data Transfer In Progress Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x08 3. -0x4 3. " BLKE_set/clr ,Data Block Ended Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x08 2. -0x4 2. " TXRDY_set/clr ,Transmit Ready Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " RXRDY_set/clr ,Receiver Ready Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " CMDRDY_set/clr ,Command Ready Interrupt Mask" "Disabled,Enabled"
width 0xb
tree.end
tree "PDC_MCI"
width 13.
group.long 0x100++0x1f
line.long 0x00 "MCI_RPR,MultiMedia Card Interface Receive Pointer Register"
line.long 0x04 "MCI_RCR,MultiMedia Card Interface Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "MCI_TPR,MultiMedia Card Interface Transmit Pointer Register"
line.long 0x0c "MCI_TCR,MultiMedia Card Interface Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "MCI_RNPR,MultiMedia Card Interface Receive Next Pointer Register"
line.long 0x14 "MCI_RNCR,MultiMedia Card Interface Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "MCI_TNPR,MultiMedia Card Interface Transmit Next Pointer Register"
line.long 0x1c "MCI_TNCR,MultiMedia Card Interface Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "MCI_PTCR,MultiMedia Card Interface PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "MCI_PTSR,MultiMedia Card Interface PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree "LCDC (LCD Controller)"
base ad:0x00500000
width 14.
group.long 0x00++0x7
sif (cpuis("AT91CAP9*")||cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
line.long 0x00 "DMABADDR1,DMA Base Address Register 1"
hexmask.long 0x00 2.--31. 0x4 " BADDR-U ,Base Address for the upper panel in dual scan mode/complete frame in single scan mode"
else
line.long 0x00 "DMABADDR1,DMA Base Address Register 1"
endif
line.long 0x04 "DMABADDR2,DMA Base Address Register 2"
rgroup.long 0x08++0xf
line.long 0x00 "DMAFRMPT1,DMA Frame Pointer Register 1"
hexmask.long.tbyte 0x00 0.--22. 1. " FRMPT-U ,Current value of frame pointer for the upper panel in dual scan mode/complete frame in single scan mode"
line.long 0x04 "DMAFRMPT2,DMA Frame Pointer Register 2"
hexmask.long.tbyte 0x04 0.--22. 1. " FRMPT-L ,Current value of frame pointer for the Lower panel in dual scan mode"
line.long 0x8 "DMAFRMADD1,DMA Frame Address Register 1"
line.long 0xC "DMAFRMADD2,DMA Frame Address Register 2"
group.long 0x18++0x7
line.long 0x00 "DMAFRMCFG,DMA Frame Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " BRSTLN ,Burst Length"
hexmask.long.tbyte 0x00 0.--22. 1. " FRMSIZE ,Frame Size"
line.long 0x4 "DMACON,DMA Control Register"
sif (cpu()=="AT91SAM9263"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M11")
bitfld.long 0x4 4. " DMA2DEN ,DMA 2D Adressing Enable" "Disabled,Enabled"
bitfld.long 0x4 3. " DMAUPDT ,DMA Configuration Update" "No effect,Updated"
textline " "
endif
bitfld.long 0x4 2. " DMABUSY ,DMA Busy" "Idle,Busy"
bitfld.long 0x4 1. " DMARST ,DMA Reset" "No effect,Reset"
textline " "
bitfld.long 0x4 0. " DMAEN ,DMA Enable" "Disabled,Enabled"
sif (cpu()=="AT91SAM9263"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
group.long 0x20++0x03
line.long 0x0 "DMA2DCFG,DMA 2D Adressing Register"
hexmask.long.byte 0x00 24.--28. 1. " PIXELOFF ,DAM2D Addressing Pixel Offset"
hexmask.long.word 0x00 0.--15. 1. " ADDRINC ,DMA 2D Addressing Address increment"
endif
group.long 0x800++0x03
line.long 0x00 "LCDCON1,LCD Control Register 1"
hexmask.long.word 0x00 21.--31. 1. " LINECNT ,Line Counter"
hexmask.long.word 0x00 12.--20. 1. " CLKVAL ,Clock Divider"
textline " "
bitfld.long 0x00 0. " BYPASS ,Bypass lcd_pclk Divider" "Not bypassed,Bypassed"
if ((d.l(ad:0x00500000+0x804)&0x3)==0x2)
group.long 0x804++0x3
line.long 0x00 "LCDCON2,LCD Control Register 2"
bitfld.long 0x00 30.--31. " MEMOR ,Memory Ordering Format" "Big endian,Reserved,Little endian,WinCE"
bitfld.long 0x00 15. " CLKMOD ,lcd_pclk mode" "During display,Always"
textline " "
bitfld.long 0x00 12. " INVDVAL ,lcd_dval polarity" "Normal,Inverted"
bitfld.long 0x00 11. " INVCLK ,lcd_pclk polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 10. " INVLINE ,lcd_hsync polarity" "Normal,Inverted"
bitfld.long 0x00 9. " INVFRAME ,lcd_vsync polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 8. " INVVD ,LCDD polarity" "Normal,Inverted"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9263"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
bitfld.long 0x00 5.--7. " PIXELSIZE ,Bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp/packed,24 bpp/unpacked,?..."
else
bitfld.long 0x00 5.--7. " PIXELSIZE ,Bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp/packed,?..."
endif
textline " "
bitfld.long 0x00 2. " SCANMOD ,Scan Mode" "Single,Dual"
textline " "
bitfld.long 0x00 0.--1. " DISTYPE ,Display Type" "STN mono,STN color,TFT,?..."
elif (((d.l(ad:0x00500000+0x804)&0x3)==(0x0||0x1))&&((d.l(ad:0x00500000+0x804)&0x4)==(0x4)))
group.long 0x804++0x3
line.long 0x00 "LCDCON2,LCD Control Register 2"
bitfld.long 0x00 30.--31. " MEMOR ,Memory Ordering Format" "Big endian,Reserved,Little endian,WinCE"
bitfld.long 0x00 15. " CLKMOD ,lcd_pclk mode" "During display,Always"
textline " "
bitfld.long 0x00 12. " INVDVAL ,lcd_dval polarity" "Normal,Inverted"
bitfld.long 0x00 11. " INVCLK ,lcd_pclk polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 10. " INVLINE ,lcd_hsync polarity" "Normal,Inverted"
bitfld.long 0x00 9. " INVFRAME ,lcd_vsync polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 8. " INVVD ,LCDD polarity" "Normal,Inverted"
bitfld.long 0x00 5.--7. " PIXELSIZE ,Bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,?..."
textline " "
bitfld.long 0x00 3.--4. " IFWIDTH ,Interface Width" "Reserved,8-bit,16-bit,?..."
bitfld.long 0x00 2. " SCANMOD ,Scan Mode" "Single,Dual"
textline " "
bitfld.long 0x00 0.--1. " DISTYPE ,Display Type" "STN mono,STN color,TFT,?..."
elif (((d.l(ad:0x00500000+0x804)&0x3)==(0x0||0x1))&&((d.l(ad:0x00500000+0x804)&0x4)==(0x0)))
group.long 0x804++0x3
line.long 0x00 "LCDCON2,LCD Control Register 2"
bitfld.long 0x00 30.--31. " MEMOR ,Memory Ordering Format" "Big endian,Reserved,Little endian,WinCE"
bitfld.long 0x00 15. " CLKMOD ,lcd_pclk mode" "During display,Always"
textline " "
bitfld.long 0x00 12. " INVDVAL ,lcd_dval polarity" "Normal,Inverted"
bitfld.long 0x00 11. " INVCLK ,lcd_pclk polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 10. " INVLINE ,lcd_hsync polarity" "Normal,Inverted"
bitfld.long 0x00 9. " INVFRAME ,lcd_vsync polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 8. " INVVD ,LCDD polarity" "Normal,Inverted"
bitfld.long 0x00 5.--7. " PIXELSIZE ,Bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,?..."
textline " "
bitfld.long 0x00 3.--4. " IFWIDTH ,Interface Width" "4-bit,8-bit,?..."
bitfld.long 0x00 2. " SCANMOD ,Scan Mode" "Single,Dual"
textline " "
bitfld.long 0x00 0.--1. " DISTYPE ,Display Type" "STN mono,STN color,TFT,?..."
else
group.long 0x804++0x3
line.long 0x00 "LCDCON2,LCD Control Register 2"
bitfld.long 0x00 30.--31. " MEMOR ,Memory Ordering Format" "Big endian,Reserved,Little endian,WinCE"
bitfld.long 0x00 15. " CLKMOD ,lcd_pclk mode" "During display,Always"
textline " "
bitfld.long 0x00 12. " INVDVAL ,lcd_dval polarity" "Normal,Inverted"
bitfld.long 0x00 11. " INVCLK ,lcd_pclk polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 10. " INVLINE ,lcd_hsync polarity" "Normal,Inverted"
bitfld.long 0x00 9. " INVFRAME ,lcd_vsync polarity" "Normal,Inverted"
textline " "
bitfld.long 0x00 8. " INVVD ,LCDD polarity" "Normal,Inverted"
bitfld.long 0x00 5.--7. " PIXELSIZE ,Bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,?..."
textline " "
bitfld.long 0x00 2. " SCANMOD ,Scan Mode" "Single,Dual"
textline " "
bitfld.long 0x00 0.--1. " DISTYPE ,Display Type" "STN mono,STN color,TFT,?..."
endif
group.long 0x808++0xf
line.long 0x0 "LCDTIM1,LCD Timing Configuration Register 1"
bitfld.long 0x0 24.--27. " VHDLY ,Vertical to horizontal delay" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
hexmask.long.byte 0x0 16.--21. 1. 1. " VPW ,Vertical Synchronization pulse width"
textline " "
hexmask.long.byte 0x0 8.--15. 1. " VBP ,Vertical Back Porch"
hexmask.long.byte 0x0 0.--7. 1. " VFP ,Vertical Front Porch"
line.long 0x4 "LCDTIM2,LCD Timing Configuration Register 2"
hexmask.long.word 0x4 21.--31. 1. 1. " HFP ,Horizontal Front Porch"
hexmask.long.byte 0x4 8.--13. 1. 1. " HPW ,Horizontal synchronization pulse width"
textline " "
hexmask.long.byte 0x4 0.--7. 1. 1. " HBP ,Horizontal Back Porch"
line.long 0x8 "LCDFRMCFG,LCD Frame Configuration Register"
sif (cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpu()=="AT91SAM9263"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
hexmask.long.word 0x8 21.--31. 1. " LINESIZE ,Horizontal size of LCD module"
textline " "
else
hexmask.long.word 0x8 21.--31. 1. " HOZVAL ,Horizontal size of LCD module"
textline " "
endif
hexmask.long.word 0x8 0.--10. 1. " LINEVAL ,Vertical size of LCD module"
line.long 0xC "LCDFIFO,LCD FIFO Register"
hexmask.long.word 0xC 0.--15. 1. " FIFOTH ,FIFO Threshold"
sif (cpu()=="AT91SAM9261"||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
group.long 0x818++0x3
line.long 0x0 "LCDMVAL,LCD_MODE Toggle Rate Value Register"
bitfld.long 0x0 31. " MMODE ,LCD_MODE toggle rate select" "Each frame,MVAL"
hexmask.long.byte 0x0 0.--7. 1. 1. " MVAL ,LCD_MODE toggle rate value"
endif
group.long 0x81c--0x847
line.long 0x00 "DP1_2,Dithering Pattern DP1_2 Register"
hexmask.long.byte 0x00 0.--7. 1. " DP1_2 ,Pattern value for 1/2 duty cycle"
line.long 0x04 "DP4_7,Dithering Pattern DP4_7 Register"
hexmask.long 0x04 0.--27. 1. " DP4_7 ,Pattern value for 4/7 duty cycle"
line.long 0x8 "DP3_5,Dithering Pattern DP3_5 Register"
hexmask.long.tbyte 0x8 0.--19. 1. " DP3_5 ,Pattern value for 3/5 duty cycle"
line.long 0xc "DP2_3,Dithering Pattern DP2_3 Register"
hexmask.long.word 0xc 0.--11. 1. " DP2_3 ,Pattern value for 2/3 duty cycle"
line.long 0x10 "DP5_7,Dithering Pattern DP5_7 Register"
hexmask.long 0x10 0.--27. 1. " DP5_7 ,Pattern value for 5/7 duty cycle"
line.long 0x14 "DP3_4,Dithering Pattern DP3_4 Register"
hexmask.long.word 0x14 0.--15. 1. " DP3_4 ,Pattern value for 3/4 duty cycle"
line.long 0x18 "DP4_5,Dithering Pattern DP4_5 Register"
hexmask.long.tbyte 0x18 0.--19. 1. " DP4_5 ,Pattern value for 4/5 duty cycle"
line.long 0x1c "DP6_7,Dithering Pattern DP6_7 Register"
hexmask.long 0x1c 0.--27. 1. " DP6_7 ,Pattern value for 6/7 duty cycle"
line.long 0x20 "PWRCON,Power Control Register"
bitfld.long 0x20 31. " LCD_BUSY ,LCD Busy" "Idle,Busy"
hexmask.long.byte 0x20 1.--7. 1. " GUARD_TIME ,Guard Time"
textline " "
bitfld.long 0x20 0. " LCD_PWR ,LCD module power control" "Low,High"
line.long 0x24 "CONTRAST_CTR,Contrast Control Register"
bitfld.long 0x24 3. " ENA ,PWM Enable" "Disabled,Enabled"
bitfld.long 0x24 2. " POL ,Output polarity" "Low,High"
textline " "
bitfld.long 0x24 0.--1. " PS ,Prescaler" "fLCDC_CLOCK,fLCDC_CLOCK/2,fLCDC_CLOCK/4,fLCDC_CLOCK/8"
line.long 0x28 "CONTRAST_VAL,Contrast Value Register"
hexmask.long.byte 0x28 0.--7. 1. " CVAL ,PWM compare value"
group.long 0x850++0x3
line.long 0x0 "LCD_IMR,LCD Interrupt Mask Register"
setclrfld.long 0x0 6. -0x08 6. -0x4 6. " MERIM_set/clr ,DMA Memory error Interrupt mask" "Disabled,Enabled"
setclrfld.long 0x0 5. -0x08 5. -0x4 5. " OWRIM_set/clr ,FIFO overwrite Interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 4. -0x08 4. -0x4 4. " UFLWIM_set/clr ,FIFO underflow Interrupt mask" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x08 2. -0x4 2. " EOFIM_set/clr ,DMA End of frame Interrupt mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x08 1. -0x4 1. " LSTLNIM_set/clr ,Last line Interrupt mask" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x08 0. -0x4 0. " LNIM_set/clr ,Line Interrupt mask" "Disabled,Enabled"
rgroup.long 0x854++0x3
line.long 0x0 "LCD_ISR,LCD Interrupt Status Register"
bitfld.long 0x0 6. " MERIS ,DMA Memory error Interrupt status" "Not active,Active"
bitfld.long 0x0 5. " OWRIS ,FIFO overwrite Interrupt status" "Not active,Active"
textline " "
bitfld.long 0x0 4. " UFLWIS ,FIFO underflow Interrupt status" "Not active,Active"
bitfld.long 0x0 2. " EOFIS ,DMA End of frame Interrupt status" "Not active,Active"
textline " "
bitfld.long 0x0 1. " LSTLNIS ,Last line Interrupt status" "Not active,Active"
bitfld.long 0x0 0. " LNIS ,Line Interrupt status" "Not active,Active"
wgroup.long 0x858++0x3
line.long 0x00 "LCD_ICR,LCD Interrupt Clear Register"
bitfld.long 0x00 6. " MERIC ,DMA Memory error Interrupt clear" "No effect,Clear"
bitfld.long 0x00 5. " OWRIC ,FIFO overwrite Interrupt clear" "No effect,Clear"
textline " "
bitfld.long 0x00 4. " UFLWIC ,FIFO underflow Interrupt clear" "No effect,Clear"
bitfld.long 0x00 2. " EOFIC ,DMA End of frame Interrupt clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " LSTLNIC ,Last line Interrupt clear" "No effect,Clear"
bitfld.long 0x00 0. " LNIC ,Line Interrupt clear" "No effect,Clear"
sif (cpu()=="AT91SAM9263"||cpu()=="AT91SAM9R64"||cpu()=="AT91SAM9RL64"||cpuis("AT91CAP9*")||cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
wgroup.long 0x860++03
line.long 0x00 "LCD_ITR,LCD Interrupt Test Register"
bitfld.long 0x00 6. " MERIT ,DMA Memory error interrupt test" "No effect,Set"
bitfld.long 0x00 5. " OWRIT ,FIFO overwrite interrupt test" "No effect,Set"
textline " "
bitfld.long 0x00 4. " UFLWIT ,FIFO underflow interrupt test" "No effect,Set"
bitfld.long 0x00 2. " EOFIT ,DMA End of frame interrupt test" "No effect,Set"
textline " "
bitfld.long 0x00 1. " LSTLNIT ,Last line interrupt test" "No effect,Set"
bitfld.long 0x00 0. " LNIT ,Line interrupt test" "No effect,Set"
sif (cpu()=="AT91SAM9M11")
wgroup.long 0x864++3
line.long 0x00 "LCD_IRR,LCD Interrupt Raw Status Register"
bitfld.long 0x00 6. " MERIR ,DMA Memory error interrupt test" "No effect,Interrupt"
bitfld.long 0x00 5. " OWRIR ,FIFO overwrite interrupt test" "No effect,Interrupt"
textline " "
bitfld.long 0x00 4. " UFLWIR ,FIFO underflow interrupt test" "No effect,Interrupt"
bitfld.long 0x00 2. " EOFIR ,DMA End of frame interrupt test" "No effect,Interrupt"
textline " "
bitfld.long 0x00 1. " LSTLNIR ,Last line interrupt test" "No effect,Interrupt"
bitfld.long 0x00 0. " LNIR ,Line interrupt test" "No effect,Interrupt"
else
rgroup.long 0x864++3
line.long 0x00 "LCD_IRR,LCD Interrupt Raw Status Register"
bitfld.long 0x00 6. " MERIR ,DMA Memory error interrupt test" "No effect,Interrupt"
bitfld.long 0x00 5. " OWRIR ,FIFO overwrite interrupt test" "No effect,Interrupt"
textline " "
bitfld.long 0x00 4. " UFLWIR ,FIFO underflow interrupt test" "No effect,Interrupt"
bitfld.long 0x00 2. " EOFIR ,DMA End of frame interrupt test" "No effect,Interrupt"
textline " "
bitfld.long 0x00 1. " LSTLNIR ,Last line interrupt test" "No effect,Interrupt"
bitfld.long 0x00 0. " LNIR ,Line interrupt test" "No effect,Interrupt"
endif
endif
sif (cpu()=="AT91SAM9G45"||cpu()=="AT91SAM9M10"||cpu()=="AT91SAM9G46"||cpu()=="AT91SAM9M11")
group.long 0xe4++0x3
line.long 0x00 "LCD_WPMR,TSADCC Write Protection Mode Register"
hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Key"
bitfld.long 0x00 0. " WPEN ,Write protection" "Disabled,Enabled"
hgroup.long 0xe8++0x3
hide.long 0x00 "LCD_WPSR,LCD Write Protect Status Register"
in
endif
tree "Palette Entry Registers"
tree "0-63"
group.long 0xc00++0xff
line.long 0x0 "LUT_ENTRY_0 ,Palette Entry 0 "
line.long 0x4 "LUT_ENTRY_1 ,Palette Entry 1 "
line.long 0x8 "LUT_ENTRY_2 ,Palette Entry 2 "
line.long 0xC "LUT_ENTRY_3 ,Palette Entry 3 "
line.long 0x10 "LUT_ENTRY_4 ,Palette Entry 4 "
line.long 0x14 "LUT_ENTRY_5 ,Palette Entry 5 "
line.long 0x18 "LUT_ENTRY_6 ,Palette Entry 6 "
line.long 0x1C "LUT_ENTRY_7 ,Palette Entry 7 "
line.long 0x20 "LUT_ENTRY_8 ,Palette Entry 8 "
line.long 0x24 "LUT_ENTRY_9 ,Palette Entry 9 "
line.long 0x28 "LUT_ENTRY_10 ,Palette Entry 10 "
line.long 0x2C "LUT_ENTRY_11 ,Palette Entry 11 "
line.long 0x30 "LUT_ENTRY_12 ,Palette Entry 12 "
line.long 0x34 "LUT_ENTRY_13 ,Palette Entry 13 "
line.long 0x38 "LUT_ENTRY_14 ,Palette Entry 14 "
line.long 0x3C "LUT_ENTRY_15 ,Palette Entry 15 "
line.long 0x40 "LUT_ENTRY_16 ,Palette Entry 16 "
line.long 0x44 "LUT_ENTRY_17 ,Palette Entry 17 "
line.long 0x48 "LUT_ENTRY_18 ,Palette Entry 18 "
line.long 0x4C "LUT_ENTRY_19 ,Palette Entry 19 "
line.long 0x50 "LUT_ENTRY_20 ,Palette Entry 20 "
line.long 0x54 "LUT_ENTRY_21 ,Palette Entry 21 "
line.long 0x58 "LUT_ENTRY_22 ,Palette Entry 22 "
line.long 0x5C "LUT_ENTRY_23 ,Palette Entry 23 "
line.long 0x60 "LUT_ENTRY_24 ,Palette Entry 24 "
line.long 0x64 "LUT_ENTRY_25 ,Palette Entry 25 "
line.long 0x68 "LUT_ENTRY_26 ,Palette Entry 26 "
line.long 0x6C "LUT_ENTRY_27 ,Palette Entry 27 "
line.long 0x70 "LUT_ENTRY_28 ,Palette Entry 28 "
line.long 0x74 "LUT_ENTRY_29 ,Palette Entry 29 "
line.long 0x78 "LUT_ENTRY_30 ,Palette Entry 30 "
line.long 0x7C "LUT_ENTRY_31 ,Palette Entry 31 "
line.long 0x80 "LUT_ENTRY_32 ,Palette Entry 32 "
line.long 0x84 "LUT_ENTRY_33 ,Palette Entry 33 "
line.long 0x88 "LUT_ENTRY_34 ,Palette Entry 34 "
line.long 0x8C "LUT_ENTRY_35 ,Palette Entry 35 "
line.long 0x90 "LUT_ENTRY_36 ,Palette Entry 36 "
line.long 0x94 "LUT_ENTRY_37 ,Palette Entry 37 "
line.long 0x98 "LUT_ENTRY_38 ,Palette Entry 38 "
line.long 0x9C "LUT_ENTRY_39 ,Palette Entry 39 "
line.long 0xA0 "LUT_ENTRY_40 ,Palette Entry 40 "
line.long 0xA4 "LUT_ENTRY_41 ,Palette Entry 41 "
line.long 0xA8 "LUT_ENTRY_42 ,Palette Entry 42 "
line.long 0xAC "LUT_ENTRY_43 ,Palette Entry 43 "
line.long 0xB0 "LUT_ENTRY_44 ,Palette Entry 44 "
line.long 0xB4 "LUT_ENTRY_45 ,Palette Entry 45 "
line.long 0xB8 "LUT_ENTRY_46 ,Palette Entry 46 "
line.long 0xBC "LUT_ENTRY_47 ,Palette Entry 47 "
line.long 0xC0 "LUT_ENTRY_48 ,Palette Entry 48 "
line.long 0xC4 "LUT_ENTRY_49 ,Palette Entry 49 "
line.long 0xC8 "LUT_ENTRY_50 ,Palette Entry 50 "
line.long 0xCC "LUT_ENTRY_51 ,Palette Entry 51 "
line.long 0xD0 "LUT_ENTRY_52 ,Palette Entry 52 "
line.long 0xD4 "LUT_ENTRY_53 ,Palette Entry 53 "
line.long 0xD8 "LUT_ENTRY_54 ,Palette Entry 54 "
line.long 0xDC "LUT_ENTRY_55 ,Palette Entry 55 "
line.long 0xE0 "LUT_ENTRY_56 ,Palette Entry 56 "
line.long 0xE4 "LUT_ENTRY_57 ,Palette Entry 57 "
line.long 0xE8 "LUT_ENTRY_58 ,Palette Entry 58 "
line.long 0xEC "LUT_ENTRY_59 ,Palette Entry 59 "
line.long 0xF0 "LUT_ENTRY_60 ,Palette Entry 60 "
line.long 0xF4 "LUT_ENTRY_61 ,Palette Entry 61 "
line.long 0xF8 "LUT_ENTRY_62 ,Palette Entry 62 "
line.long 0xFC "LUT_ENTRY_63 ,Palette Entry 63 "
tree.end
tree "64-127"
group.long 0xd00++0xff
line.long 0x0 "LUT_ENTRY_64 ,Palette Entry 64 "
line.long 0x4 "LUT_ENTRY_65 ,Palette Entry 65 "
line.long 0x8 "LUT_ENTRY_66 ,Palette Entry 66 "
line.long 0xC "LUT_ENTRY_67 ,Palette Entry 67 "
line.long 0x10 "LUT_ENTRY_68 ,Palette Entry 68 "
line.long 0x14 "LUT_ENTRY_69 ,Palette Entry 69 "
line.long 0x18 "LUT_ENTRY_70 ,Palette Entry 70 "
line.long 0x1C "LUT_ENTRY_71 ,Palette Entry 71 "
line.long 0x20 "LUT_ENTRY_72 ,Palette Entry 72 "
line.long 0x24 "LUT_ENTRY_73 ,Palette Entry 73 "
line.long 0x28 "LUT_ENTRY_74 ,Palette Entry 74 "
line.long 0x2C "LUT_ENTRY_75 ,Palette Entry 75 "
line.long 0x30 "LUT_ENTRY_76 ,Palette Entry 76 "
line.long 0x34 "LUT_ENTRY_77 ,Palette Entry 77 "
line.long 0x38 "LUT_ENTRY_78 ,Palette Entry 78 "
line.long 0x3C "LUT_ENTRY_79 ,Palette Entry 79 "
line.long 0x40 "LUT_ENTRY_80 ,Palette Entry 80 "
line.long 0x44 "LUT_ENTRY_81 ,Palette Entry 81 "
line.long 0x48 "LUT_ENTRY_82 ,Palette Entry 82 "
line.long 0x4C "LUT_ENTRY_83 ,Palette Entry 83 "
line.long 0x50 "LUT_ENTRY_84 ,Palette Entry 84 "
line.long 0x54 "LUT_ENTRY_85 ,Palette Entry 85 "
line.long 0x58 "LUT_ENTRY_86 ,Palette Entry 86 "
line.long 0x5C "LUT_ENTRY_87 ,Palette Entry 87 "
line.long 0x60 "LUT_ENTRY_88 ,Palette Entry 88 "
line.long 0x64 "LUT_ENTRY_89 ,Palette Entry 89 "
line.long 0x68 "LUT_ENTRY_90 ,Palette Entry 90 "
line.long 0x6C "LUT_ENTRY_91 ,Palette Entry 91 "
line.long 0x70 "LUT_ENTRY_92 ,Palette Entry 92 "
line.long 0x74 "LUT_ENTRY_93 ,Palette Entry 93 "
line.long 0x78 "LUT_ENTRY_94 ,Palette Entry 94 "
line.long 0x7C "LUT_ENTRY_95 ,Palette Entry 95 "
line.long 0x80 "LUT_ENTRY_96 ,Palette Entry 96 "
line.long 0x84 "LUT_ENTRY_97 ,Palette Entry 97 "
line.long 0x88 "LUT_ENTRY_98 ,Palette Entry 98 "
line.long 0x8C "LUT_ENTRY_99 ,Palette Entry 99 "
line.long 0x90 "LUT_ENTRY_100,Palette Entry 100"
line.long 0x94 "LUT_ENTRY_101,Palette Entry 101"
line.long 0x98 "LUT_ENTRY_102,Palette Entry 102"
line.long 0x9C "LUT_ENTRY_103,Palette Entry 103"
line.long 0xA0 "LUT_ENTRY_104,Palette Entry 104"
line.long 0xA4 "LUT_ENTRY_105,Palette Entry 105"
line.long 0xA8 "LUT_ENTRY_106,Palette Entry 106"
line.long 0xAC "LUT_ENTRY_107,Palette Entry 107"
line.long 0xB0 "LUT_ENTRY_108,Palette Entry 108"
line.long 0xB4 "LUT_ENTRY_109,Palette Entry 109"
line.long 0xB8 "LUT_ENTRY_110,Palette Entry 110"
line.long 0xBC "LUT_ENTRY_111,Palette Entry 111"
line.long 0xC0 "LUT_ENTRY_112,Palette Entry 112"
line.long 0xC4 "LUT_ENTRY_113,Palette Entry 113"
line.long 0xC8 "LUT_ENTRY_114,Palette Entry 114"
line.long 0xCC "LUT_ENTRY_115,Palette Entry 115"
line.long 0xD0 "LUT_ENTRY_116,Palette Entry 116"
line.long 0xD4 "LUT_ENTRY_117,Palette Entry 117"
line.long 0xD8 "LUT_ENTRY_118,Palette Entry 118"
line.long 0xDC "LUT_ENTRY_119,Palette Entry 119"
line.long 0xE0 "LUT_ENTRY_120,Palette Entry 120"
line.long 0xE4 "LUT_ENTRY_121,Palette Entry 121"
line.long 0xE8 "LUT_ENTRY_122,Palette Entry 122"
line.long 0xEC "LUT_ENTRY_123,Palette Entry 123"
line.long 0xF0 "LUT_ENTRY_124,Palette Entry 124"
line.long 0xF4 "LUT_ENTRY_125,Palette Entry 125"
line.long 0xF8 "LUT_ENTRY_126,Palette Entry 126"
line.long 0xFC "LUT_ENTRY_127,Palette Entry 127"
tree.end
tree "128-191"
group.long 0xe00++0xff
line.long 0x0 "LUT_ENTRY_128,Palette Entry 128"
line.long 0x4 "LUT_ENTRY_129,Palette Entry 129"
line.long 0x8 "LUT_ENTRY_130,Palette Entry 130"
line.long 0xC "LUT_ENTRY_131,Palette Entry 131"
line.long 0x10 "LUT_ENTRY_132,Palette Entry 132"
line.long 0x14 "LUT_ENTRY_133,Palette Entry 133"
line.long 0x18 "LUT_ENTRY_134,Palette Entry 134"
line.long 0x1C "LUT_ENTRY_135,Palette Entry 135"
line.long 0x20 "LUT_ENTRY_136,Palette Entry 136"
line.long 0x24 "LUT_ENTRY_137,Palette Entry 137"
line.long 0x28 "LUT_ENTRY_138,Palette Entry 138"
line.long 0x2C "LUT_ENTRY_139,Palette Entry 139"
line.long 0x30 "LUT_ENTRY_140,Palette Entry 140"
line.long 0x34 "LUT_ENTRY_141,Palette Entry 141"
line.long 0x38 "LUT_ENTRY_142,Palette Entry 142"
line.long 0x3C "LUT_ENTRY_143,Palette Entry 143"
line.long 0x40 "LUT_ENTRY_144,Palette Entry 144"
line.long 0x44 "LUT_ENTRY_145,Palette Entry 145"
line.long 0x48 "LUT_ENTRY_146,Palette Entry 146"
line.long 0x4C "LUT_ENTRY_147,Palette Entry 147"
line.long 0x50 "LUT_ENTRY_148,Palette Entry 148"
line.long 0x54 "LUT_ENTRY_149,Palette Entry 149"
line.long 0x58 "LUT_ENTRY_150,Palette Entry 150"
line.long 0x5C "LUT_ENTRY_151,Palette Entry 151"
line.long 0x60 "LUT_ENTRY_152,Palette Entry 152"
line.long 0x64 "LUT_ENTRY_153,Palette Entry 153"
line.long 0x68 "LUT_ENTRY_154,Palette Entry 154"
line.long 0x6C "LUT_ENTRY_155,Palette Entry 155"
line.long 0x70 "LUT_ENTRY_156,Palette Entry 156"
line.long 0x74 "LUT_ENTRY_157,Palette Entry 157"
line.long 0x78 "LUT_ENTRY_158,Palette Entry 158"
line.long 0x7C "LUT_ENTRY_159,Palette Entry 159"
line.long 0x80 "LUT_ENTRY_160,Palette Entry 160"
line.long 0x84 "LUT_ENTRY_161,Palette Entry 161"
line.long 0x88 "LUT_ENTRY_162,Palette Entry 162"
line.long 0x8C "LUT_ENTRY_163,Palette Entry 163"
line.long 0x90 "LUT_ENTRY_164,Palette Entry 164"
line.long 0x94 "LUT_ENTRY_165,Palette Entry 165"
line.long 0x98 "LUT_ENTRY_166,Palette Entry 166"
line.long 0x9C "LUT_ENTRY_167,Palette Entry 167"
line.long 0xA0 "LUT_ENTRY_168,Palette Entry 168"
line.long 0xA4 "LUT_ENTRY_169,Palette Entry 169"
line.long 0xA8 "LUT_ENTRY_170,Palette Entry 170"
line.long 0xAC "LUT_ENTRY_171,Palette Entry 171"
line.long 0xB0 "LUT_ENTRY_172,Palette Entry 172"
line.long 0xB4 "LUT_ENTRY_173,Palette Entry 173"
line.long 0xB8 "LUT_ENTRY_174,Palette Entry 174"
line.long 0xBC "LUT_ENTRY_175,Palette Entry 175"
line.long 0xC0 "LUT_ENTRY_176,Palette Entry 176"
line.long 0xC4 "LUT_ENTRY_177,Palette Entry 177"
line.long 0xC8 "LUT_ENTRY_178,Palette Entry 178"
line.long 0xCC "LUT_ENTRY_179,Palette Entry 179"
line.long 0xD0 "LUT_ENTRY_180,Palette Entry 180"
line.long 0xD4 "LUT_ENTRY_181,Palette Entry 181"
line.long 0xD8 "LUT_ENTRY_182,Palette Entry 182"
line.long 0xDC "LUT_ENTRY_183,Palette Entry 183"
line.long 0xE0 "LUT_ENTRY_184,Palette Entry 184"
line.long 0xE4 "LUT_ENTRY_185,Palette Entry 185"
line.long 0xE8 "LUT_ENTRY_186,Palette Entry 186"
line.long 0xEC "LUT_ENTRY_187,Palette Entry 187"
line.long 0xF0 "LUT_ENTRY_188,Palette Entry 188"
line.long 0xF4 "LUT_ENTRY_189,Palette Entry 189"
line.long 0xF8 "LUT_ENTRY_190,Palette Entry 190"
line.long 0xFC "LUT_ENTRY_191,Palette Entry 191"
tree.end
tree "192-255"
group.long 0xf00++0xff
line.long 0x0 "LUT_ENTRY_192,Palette Entry 192"
line.long 0x4 "LUT_ENTRY_193,Palette Entry 193"
line.long 0x8 "LUT_ENTRY_194,Palette Entry 194"
line.long 0xC "LUT_ENTRY_195,Palette Entry 195"
line.long 0x10 "LUT_ENTRY_196,Palette Entry 196"
line.long 0x14 "LUT_ENTRY_197,Palette Entry 197"
line.long 0x18 "LUT_ENTRY_198,Palette Entry 198"
line.long 0x1C "LUT_ENTRY_199,Palette Entry 199"
line.long 0x20 "LUT_ENTRY_200,Palette Entry 200"
line.long 0x24 "LUT_ENTRY_201,Palette Entry 201"
line.long 0x28 "LUT_ENTRY_202,Palette Entry 202"
line.long 0x2C "LUT_ENTRY_203,Palette Entry 203"
line.long 0x30 "LUT_ENTRY_204,Palette Entry 204"
line.long 0x34 "LUT_ENTRY_205,Palette Entry 205"
line.long 0x38 "LUT_ENTRY_206,Palette Entry 206"
line.long 0x3C "LUT_ENTRY_207,Palette Entry 207"
line.long 0x40 "LUT_ENTRY_208,Palette Entry 208"
line.long 0x44 "LUT_ENTRY_209,Palette Entry 209"
line.long 0x48 "LUT_ENTRY_210,Palette Entry 210"
line.long 0x4C "LUT_ENTRY_211,Palette Entry 211"
line.long 0x50 "LUT_ENTRY_212,Palette Entry 212"
line.long 0x54 "LUT_ENTRY_213,Palette Entry 213"
line.long 0x58 "LUT_ENTRY_214,Palette Entry 214"
line.long 0x5C "LUT_ENTRY_215,Palette Entry 215"
line.long 0x60 "LUT_ENTRY_216,Palette Entry 216"
line.long 0x64 "LUT_ENTRY_217,Palette Entry 217"
line.long 0x68 "LUT_ENTRY_218,Palette Entry 218"
line.long 0x6C "LUT_ENTRY_219,Palette Entry 219"
line.long 0x70 "LUT_ENTRY_220,Palette Entry 220"
line.long 0x74 "LUT_ENTRY_221,Palette Entry 221"
line.long 0x78 "LUT_ENTRY_222,Palette Entry 222"
line.long 0x7C "LUT_ENTRY_223,Palette Entry 223"
line.long 0x80 "LUT_ENTRY_224,Palette Entry 224"
line.long 0x84 "LUT_ENTRY_225,Palette Entry 225"
line.long 0x88 "LUT_ENTRY_226,Palette Entry 226"
line.long 0x8C "LUT_ENTRY_227,Palette Entry 227"
line.long 0x90 "LUT_ENTRY_228,Palette Entry 228"
line.long 0x94 "LUT_ENTRY_229,Palette Entry 229"
line.long 0x98 "LUT_ENTRY_230,Palette Entry 230"
line.long 0x9C "LUT_ENTRY_231,Palette Entry 231"
line.long 0xA0 "LUT_ENTRY_232,Palette Entry 232"
line.long 0xA4 "LUT_ENTRY_233,Palette Entry 233"
line.long 0xA8 "LUT_ENTRY_234,Palette Entry 234"
line.long 0xAC "LUT_ENTRY_235,Palette Entry 235"
line.long 0xB0 "LUT_ENTRY_236,Palette Entry 236"
line.long 0xB4 "LUT_ENTRY_237,Palette Entry 237"
line.long 0xB8 "LUT_ENTRY_238,Palette Entry 238"
line.long 0xBC "LUT_ENTRY_239,Palette Entry 239"
line.long 0xC0 "LUT_ENTRY_240,Palette Entry 240"
line.long 0xC4 "LUT_ENTRY_241,Palette Entry 241"
line.long 0xC8 "LUT_ENTRY_242,Palette Entry 242"
line.long 0xCC "LUT_ENTRY_243,Palette Entry 243"
line.long 0xD0 "LUT_ENTRY_244,Palette Entry 244"
line.long 0xD4 "LUT_ENTRY_245,Palette Entry 245"
line.long 0xD8 "LUT_ENTRY_246,Palette Entry 246"
line.long 0xDC "LUT_ENTRY_247,Palette Entry 247"
line.long 0xE0 "LUT_ENTRY_248,Palette Entry 248"
line.long 0xE4 "LUT_ENTRY_249,Palette Entry 249"
line.long 0xE8 "LUT_ENTRY_250,Palette Entry 250"
line.long 0xEC "LUT_ENTRY_251,Palette Entry 251"
line.long 0xF0 "LUT_ENTRY_252,Palette Entry 252"
line.long 0xF4 "LUT_ENTRY_253,Palette Entry 253"
line.long 0xF8 "LUT_ENTRY_254,Palette Entry 254"
line.long 0xFC "LUT_ENTRY_255,Palette Entry 255"
tree.end
tree.end
width 0xb
tree.end
tree.open "AC97C (AC'97 Controller)"
tree "AC97C"
base ad:0xfffd8000
width 0xd
group.long 0x8++3
line.long 0x00 "AC97C_MR,Mode Register"
bitfld.long 0x00 2. " VRA ,Variable Rate" "Inactive,Active"
bitfld.long 0x00 1. " WRST ,Warm Reset" "No reset,Reset"
textline " "
bitfld.long 0x00 0. " ENA ,AC97 Controller Global Enable" "No effect,Enabled"
group.long 0x10++7
line.long 0x00 "AC97C_ICA,Input Channel Assignment Register"
bitfld.long 0x00 27.--29. " CHID12 ,Channel ID for the input slot 12" "None,Channel A,Channel B,?..."
bitfld.long 0x00 24.--26. " CHID11 ,Channel ID for the input slot 11" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x00 21.--23. " CHID10 ,Channel ID for the input slot 10" "None,Channel A,Channel B,?..."
bitfld.long 0x00 18.--20. " CHID9 ,Channel ID for the input slot 9" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x00 15.--17. " CHID8 ,Channel ID for the input slot 8" "None,Channel A,Channel B,?..."
bitfld.long 0x00 12.--14. " CHID7 ,Channel ID for the input slot 7" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x00 9.--11. " CHID6 ,Channel ID for the input slot 6" "None,Channel A,Channel B,?..."
bitfld.long 0x00 6.--8. " CHID5 ,Channel ID for the input slot 5" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x00 3.--5. " CHID4 ,Channel ID for the input slot 4" "None,Channel A,Channel B,?..."
bitfld.long 0x00 0.--2. " CHID3 ,Channel ID for the input slot 3" "None,Channel A,Channel B,?..."
line.long 0x04 "AC97C_OCA,Output Channel Assignment Register"
bitfld.long 0x04 27.--29. " CHID12 ,Channel ID for the output slot 12" "None,Channel A,Channel B,?..."
bitfld.long 0x04 24.--26. " CHID11 ,Channel ID for the output slot 11" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x04 21.--23. " CHID10 ,Channel ID for the output slot 10" "None,Channel A,Channel B,?..."
bitfld.long 0x04 18.--20. " CHID9 ,Channel ID for the output slot 9" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x04 15.--17. " CHID8 ,Channel ID for the output slot 8" "None,Channel A,Channel B,?..."
bitfld.long 0x04 12.--14. " CHID7 ,Channel ID for the output slot 7" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x04 9.--11. " CHID6 ,Channel ID for the output slot 6" "None,Channel A,Channel B,?..."
bitfld.long 0x04 6.--8. " CHID5 ,Channel ID for the output slot 5" "None,Channel A,Channel B,?..."
textline " "
bitfld.long 0x04 3.--5. " CHID4 ,Channel ID for the output slot 4" "None,Channel A,Channel B,?..."
bitfld.long 0x04 0.--2. " CHID3 ,Channel ID for the output slot 3" "None,Channel A,Channel B,?..."
rgroup.long 0x20++3
line.long 0x00 "AC97C_CARHR,Channel A Receive Holding Register"
hexmask.long.tbyte 0x00 0.--19. 1. " RDATA ,Receive Data"
wgroup.long 0x24++3
line.long 0x00 "AC97C_CATHR,Channel A Transmit Holding Register"
hexmask.long.tbyte 0x00 0.--19. 1. " TDATA ,Data to Transmit"
rgroup.long 0x28++3
line.long 0x00 "AC97C_CASR,Channel A Status Register"
bitfld.long 0x00 15. " RXBUFF ,Receive Buffer Full for Channel A" "Not empty,Empty"
bitfld.long 0x00 14. " ENDRX ,End of Reception for Channel A" "No end,End"
textline " "
bitfld.long 0x00 11. " TXBUFE ,Transmit Buffer Empty for Channel A" "Not full,Full"
bitfld.long 0x00 10. " ENDTX ,End of Transmission for Channel A" "No end,End"
textline " "
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
group.long 0x2c++3
line.long 0x00 "AC97C_CAMR,Channel A Mode Register"
bitfld.long 0x00 22. " PDCEN ,Peripheral Data Controller Channel Enable" "Disabled,Enabled"
bitfld.long 0x00 21. " CEN ,Channel A Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 18. " CEM ,Channel A Endian Mode" "Little,Big"
bitfld.long 0x00 16.--17. " SIZE ,Channel A Data Size" "20 bits,18 bits,16 bits,10 bits"
textline " "
bitfld.long 0x00 15. " RXBUFF ,Receive Buffer Full for channel x Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 14. " ENDRX ,End of Reception for channel x Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 11. " TXBUFE ,Transmit Buffer Empty for channel x Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 10. " ENDTX ,End of Transmission for channel x Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
rgroup.long 0x30++3
line.long 0x00 "AC97C_CBRHR,Channel B Receive Holding Register"
hexmask.long.tbyte 0x00 0.--19. 1. " RDATA ,Receive Data"
wgroup.long 0x34++3
line.long 0x00 "AC97C_CBTHR,Channel B Transmit Holding Register"
hexmask.long.tbyte 0x00 0.--19. 1. " TDATA ,Data to Transmit"
rgroup.long 0x38++3
line.long 0x00 "AC97C_CBSR,Channel B Status Register"
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
group.long 0x3c++3
line.long 0x00 "AC97C_CBMR,Channel B Mode Register"
bitfld.long 0x00 21. " CEN ,Channel A Enable" "Disabled,Enabled"
bitfld.long 0x00 18. " CEM ,Channel A Endian Mode" "Little,Big"
textline " "
bitfld.long 0x00 16.--17. " SIZE ,Channel A Data Size" "20 bits,18 bits,16 bits,10 bits"
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
textline " "
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
textline " "
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
rgroup.long 0x40++3
line.long 0x00 "AC97C_CORHR,Codec Receive Holding Register"
hexmask.long.word 0x00 0.--15. 1. " SDATA ,Status Data"
wgroup.long 0x44++3
line.long 0x00 "AC97C_COTHR,Codec Transmit Holding Register"
bitfld.long 0x00 23. " READ ,Read/Write command" "Write,Read"
hexmask.long.byte 0x00 16.--22. 1. " CADDR ,CODEC control register index"
textline " "
hexmask.long.word 0x00 0.--15. 1. " CDATA ,Command Data"
rgroup.long 0x48++3
line.long 0x00 "AC97C_COSR,Codec Status Register"
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
group.long 0x4c++3
line.long 0x00 "AC97C_COMR,Codec Mode Register"
bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun"
bitfld.long 0x00 4. " RXRDY ,Channel Receive Ready" "Not ready,Ready"
textline " "
bitfld.long 0x00 2. " UNRUN ,Transmit Underrun" "No underrun,Underrun"
bitfld.long 0x00 1. " TXEMPTY ,Channel Transmit Empty" "Not empty,Empty"
textline " "
bitfld.long 0x00 0. " TXRDY ,Channel Transmit Ready" "Not ready,Ready"
rgroup.long 0x50++3
line.long 0x00 "AC97C_SR,Status Register"
bitfld.long 0x00 4. " CBEVT ,Channel B Event" "No event,Event"
bitfld.long 0x00 3. " CAEVT ,Channel A Event" "No event,Event"
textline " "
bitfld.long 0x00 2. " COEVT ,CODEC Channel Event" "No event,Event"
bitfld.long 0x00 1. " WKUP ,Wake Up detection" "Not detected,Detected"
textline " "
bitfld.long 0x00 0. " SOF ,Start Of Frame" "Not detected,Detected"
textline " "
width 0xf
group.long 0x5c++3
line.long 0x00 "AC97C_IMR,Interrupt Enable\Mask Register"
setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CBEVT_Set/Clr ,Channel B Event" "Disabled,Enabled"
setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CAEVT_Set/Clr ,Channel A Event" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 2. -0x8 2. -0x4 2. " COEVT_Set/Clr ,CODEC Channel Event" "Disabled,Enabled"
setclrfld.long 0x00 1. -0x8 1. -0x4 1. " WKUP_Set/Clr ,Wake Up detection" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x8 0. -0x4 0. " SOF_Set/Clr ,Start Of Frame" "Disabled,Enabled"
width 0xb
tree.end
tree "PDC_AC97C"
width 13.
group.long 0x100++0x1f
line.long 0x00 "AC97C_RPR,AC97 Controller Receive Pointer Register"
line.long 0x04 "AC97C_RCR,AC97 Controller Receive Counter Register"
hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value"
line.long 0x08 "AC97C_TPR,AC97 Controller Transmit Pointer Register"
line.long 0x0c "AC97C_TCR,AC97 Controller Transmit Counter Register"
hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value"
line.long 0x10 "AC97C_RNPR,AC97 Controller Receive Next Pointer Register"
line.long 0x14 "AC97C_RNCR,AC97 Controller Receive Next Counter Register"
hexmask.long.word 0x14 0.--15. 1. " RXNCTR ,Receive Next Counter Value"
line.long 0x18 "AC97C_TNPR,AC97 Controller Transmit Next Pointer Register"
line.long 0x1c "AC97C_TNCR,AC97 Controller Transmit Next Counter Register"
hexmask.long.word 0x1C 0.--15. 1. " TXNCTR ,Transmit Counter Next Value"
wgroup.long 0x120++0x03
line.long 0x00 "AC97C_PTCR,AC97 Controller PDC Transfer Control Register"
bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled"
textline " "
bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled"
rgroup.long 0x124++0x03
line.long 0x00 "AC97C_PTSR,AC97 Controller PDC Transfer Status Register"
bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled"
bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled"
width 0xb
tree.end
tree.end
tree "UDPHS (USB High Speed Device Port)"
base ad:0xfffd4000
width 15.
group.long 0x00++0x03
line.long 0x00 "UDPHS_CTRL,UDPHS Control Register"
bitfld.long 0x00 11. " PULLD_DIS , Pull-Down Disable" "Enabled,Disabled"
bitfld.long 0x00 10. " REWAKEUP , Send Remote Wake Up" "Disabled,Enabled"
textline " "
bitfld.long 0x00 9. " DETACH , Detach Command" "Attached,Detached"
bitfld.long 0x00 8. " EN_UDPHS , UDPHS Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 7. " FADDR_EN , Function Address Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. " DEV_ADDR , UDPHS Address"
rgroup.long 0x04++0x03
line.long 0x00 "UDPHS_FNUM,UDPHS Frame Number Register"
bitfld.long 0x00 31. " FNUM_ERR , Frame Number CRC Error " "No error,Error"
hexmask.long.word 0x00 3.--13. 1. " FRAME_NUMBER , Frame Number as defined in the Packet Field Formats"
textline " "
bitfld.long 0x00 0.--2. " MICRO_FRAME_NUM , Microframe Number" "0,1,2,3,4,5,6,7"
group.long 0x10++0x03
line.long 0x00 "UDPHS_IEN,UDPHS Interrupt Enable Register"
bitfld.long 0x00 30. " DMA_INT_6 , DMA Channel 6 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 29. " DMA_INT_5 , DMA Channel 5 Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 28. " DMA_INT_4 , DMA Channel 4 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. " DMA_INT_3 , DMA Channel 3 Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 26. " DMA_INT_2 , DMA Channel 2 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. " DMA_INT_1 , DMA Channel 1 Interrupt Enable" "Disabled,Enabled"
textline " "
sif (cpuis("AT91CAP9*"))
bitfld.long 0x00 15. " EPT_7 , Endpoint 7 Interrupt Enable" "Disabled,Enabled"
textline " "
endif
bitfld.long 0x00 14. " EPT_6 , Endpoint 6 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 13. " EPT_5 , Endpoint 5 Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 12. " EPT_4 , Endpoint 4 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. " EPT_3 , Endpoint 3 Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 10. " EPT_2 , Endpoint 2 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. " EPT_1 , Endpoint 1 Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 8. " EPT_0 , Endpoint 0 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. " UPSTR_RES , Upstream Resume Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 6. " ENDOFRSM , End Of Resume Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. " WAKE_UP , Wake Up CPU Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 4. " ENDRESET , End Of Reset Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. " INT_SOF , SOF Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x00 2. " MICRO_SOF , Micro-SOF Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. " DET_SUSPD , Suspend Interrupt Enable" "Disabled,Enabled"
rgroup.long 0x14++0x03
line.long 0x00 "UDPHS_INTSTA,UDPHS Interrupt Status Register"
bitfld.long 0x00 30. " DMA_INT_6 , DMA Channel 6 Interrupt " "No Interrupt,Interrupt"
bitfld.long 0x00 29. " DMA_INT_5 , DMA Channel 5 Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 28. " DMA_INT_4 , DMA Channel 4 Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 27. " DMA_INT_3 , DMA Channel 3 Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 26. " DMA_INT_2 , DMA Channel 2 Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 25. " DMA_INT_1 , DMA Channel 1 Interrupt" "No Interrupt,Interrupt"
textline " "
sif (cpuis("AT91CAP9*"))
bitfld.long 0x00 15. " EPT_7 , Endpoint 7 Interrupt Enable" "No Interrupt,Interrupt"
textline " "
endif
bitfld.long 0x00 14. " EPT_6 , Endpoint 6 Interrupt " "No Interrupt,Interrupt"
bitfld.long 0x00 13. " EPT_5 , Endpoint 5 Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 12. " EPT_4 , Endpoint 4 Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 11. " EPT_3 , Endpoint 3 Interrupt " "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 10. " EPT_2 , Endpoint 2 Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 9. " EPT_1 , Endpoint 1 Interrupt " "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 8. " EPT_0 , Endpoint 0 Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 7. " UPSTR_RES , Upstream Resume Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 6. " ENDOFRSM , End Of Resume Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 5. " WAKE_UP , Wake Up CPU Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 4. " ENDRESET , End Of Reset Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 3. " INT_SOF , Start Of Frame Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 2. " MICRO_SOF , Micro Start Of Frame Interrupt" "No Interrupt,Interrupt"
bitfld.long 0x00 1. " DET_SUSPD , Suspend Interrupt" "No Interrupt,Interrupt"
textline " "
bitfld.long 0x00 0. " SPEED , Speed Status" "Full,High"
wgroup.long 0x18++0x07
line.long 0x00 "UDPHS_CLRINT,UDPHS Clear Interrupt Register"
bitfld.long 0x00 7. " UPSTR_RES , Upstream Resume Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 6. " ENDOFRSM , End Of Resume Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 5. " WAKE_UP , Wake Up CPU Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 4. " ENDRESET , End Of Reset Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 3. " INT_SOF , Start Of Frame Interrupt Clear" "No effect,Clear"
bitfld.long 0x00 2. " MICRO_SOF , Micro Start Of Frame Interrupt Clear" "No effect,Clear"
textline " "
bitfld.long 0x00 1. " DET_SUSPD , Suspend Interrupt Clear" "No effect,Clear"
line.long 0x04 "UDPHS_EPTRST,UDPHS Endpoints Reset Register"
sif (cpuis("AT91CAP9*"))
bitfld.long 0x04 7. " EPT_7 , Endpoint 7 Reset" "No effect,Reset"
textline " "
endif
bitfld.long 0x04 6. " EPT_6 , Endpoint 6 Reset" "No effect,Reset"
bitfld.long 0x04 5. " EPT_5 , Endpoint 5 Reset" "No effect,Reset"
textline " "
bitfld.long 0x04 4. " EPT_4 , Endpoint 4 Reset" "No effect,Reset"
bitfld.long 0x04 3. " EPT_3 , Endpoint 3 Reset" "No effect,Reset"
textline " "
bitfld.long 0x04 2. " EPT_2 , Endpoint 2 Reset" "No effect,Reset"
bitfld.long 0x04 1. " EPT_1 , Endpoint 1 Reset" "No effect,Reset"
textline " "
bitfld.long 0x04 0. " EPT_0 , Endpoint 0 Reset" "No effect,Reset"
group.long 0xe0++0x03
line.long 0x00 "UDPHS_TST,UDPHS Test Register"
bitfld.long 0x00 5. " OPMODE2 , OpMode2" "No effect,OpMode"
bitfld.long 0x00 4. " TST_PKT , Test Packet Mode" "No effect,Test"
textline " "
bitfld.long 0x00 3. " TST_K , Test K Mode" "No effect,Test"
bitfld.long 0x00 2. " TST_J , Test J Mode" "No effect,Test"
textline " "
bitfld.long 0x00 0.--1. " SPEED_CFG , Speed Configuration" "Normal Mode,Reserved,High Speed,Full Speed"
sif (cpuis("AT91CAP9*"))
rgroup.long 0xf0++0xb
line.long 0x00 "UDPHS_IPNAME1,UDPHS Name1 Register"
line.long 0x04 "UDPHS_IPNAME2,UDPHS Name2 Register"
width 18.
line.long 0x08 "UDPHS_IPFEATURES,UDPHS Features Register"
bitfld.long 0x08 31. " ISO_EPT_15 ,Endpoint15 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 30. " ISO_EPT_14 ,Endpoint14 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 29. " ISO_EPT_13 ,Endpoint13 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 28. " ISO_EPT_12 ,Endpoint12 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 27. " ISO_EPT_11 ,Endpoint11 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 26. " ISO_EPT_10 ,Endpoint10 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 25. " ISO_EPT_9 ,Endpoint9 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 24. " ISO_EPT_8 ,Endpoint8 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 23. " ISO_EPT_7 ,Endpoint7 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 22. " ISO_EPT_6 ,Endpoint6 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 21. " ISO_EPT_5 ,Endpoint5 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 20. " ISO_EPT_4 ,Endpoint4 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 19. " ISO_EPT_3 ,Endpoint3 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 18. " ISO_EPT_2 ,Endpoint2 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
textline " "
bitfld.long 0x08 17. " ISO_EPT_1 ,Endpoint1 High Bandwidth Isochronous Capability" "Not implemented,Implemented"
bitfld.long 0x08 16. " DATAB16_8 ,UTMI DataBus16_8" "8-bit,16-bit"
textline " "
bitfld.long 0x08 15. " BW_DPRAM ,DPRAM Byte Write Capability" "Not implemented,Implemented"
bitfld.long 0x08 12.--14. " FIFO_MAX_SIZE ,DPRAM Size" "128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,16384 bytes"
textline " "
bitfld.long 0x08 8.--11. " DMA_FIFO_DEPTH ,DMA FIFO Depth in Words" "16 words,1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words"
bitfld.long 0x08 7. " DMA_B_SIZ ,DMA Buffer Size" "16 bits,24 bits"
textline " "
bitfld.long 0x08 4.--6. " DMA_CHANNEL_NBR ,Number of DMA Channels" "Reserved,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--3. " EPT_NBR_MAX ,Max Number of Endpoints" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
width 19.
tree "Endpoint 0"
if ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x0))
group.long 0x100++0x03
line.long 0x00 "UDPHS_EPTCFG0,UDPHS Endpoint Configuration Register 0"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x10))
group.long 0x100++0x03
line.long 0x00 "UDPHS_EPTCFG0,UDPHS Endpoint Configuration Register 0"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x100++0x03
line.long 0x00 "UDPHS_EPTCFG0,UDPHS Endpoint Configuration Register 0"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x20)
group.long 0x10C++0x03
line.long 0x00 "UDPHS_EPTCTL0,UDPHS Endpoint Set/Clr Register 0"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x10)
group.long 0x10C++0x03
line.long 0x00 "UDPHS_EPTCTL0,UDPHS Endpoint Set/Clr Register 0"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x10C++0x03
line.long 0x00 "UDPHS_EPTCTL0,UDPHS Endpoint Set/Clr Register 0"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x114++0x7
line.long 0x00 "UDPHS_EPTSETSTA0,UDPHS Endpoint Set Status Register 0"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA0,UDPHS Endpoint Clear Status Register 0"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x100)))&0x8)==0x8))
rgroup.long 0x11C++0x3
line.long 0x00 "UDPHS_EPTSTA0,UDPHS Endpoint Status Register 0"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x100)))&0x8)==0x0))
rgroup.long 0x11C++0x3
line.long 0x00 "UDPHS_EPTSTA0,UDPHS Endpoint Status Register 0"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==0x0))
rgroup.long 0x11C++0x3
line.long 0x00 "UDPHS_EPTSTA0,UDPHS Endpoint Status Register 0"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x100)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x100)))&0x8)==0x8))
rgroup.long 0x11C++0x3
line.long 0x00 "UDPHS_EPTSTA0,UDPHS Endpoint Status Register 0"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x11C++0x3
line.long 0x00 "UDPHS_EPTSTA0,UDPHS Endpoint Status Register 0"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 1"
if ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x0))
group.long 0x120++0x03
line.long 0x00 "UDPHS_EPTCFG1,UDPHS Endpoint Configuration Register 1"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x10))
group.long 0x120++0x03
line.long 0x00 "UDPHS_EPTCFG1,UDPHS Endpoint Configuration Register 1"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x120++0x03
line.long 0x00 "UDPHS_EPTCFG1,UDPHS Endpoint Configuration Register 1"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x20)
group.long 0x12C++0x03
line.long 0x00 "UDPHS_EPTCTL1,UDPHS Endpoint Set/Clr Register 1"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x10)
group.long 0x12C++0x03
line.long 0x00 "UDPHS_EPTCTL1,UDPHS Endpoint Set/Clr Register 1"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x12C++0x03
line.long 0x00 "UDPHS_EPTCTL1,UDPHS Endpoint Set/Clr Register 1"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x134++0x7
line.long 0x00 "UDPHS_EPTSETSTA1,UDPHS Endpoint Set Status Register 1"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA1,UDPHS Endpoint Clear Status Register 1"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x120)))&0x8)==0x8))
rgroup.long 0x13C++0x3
line.long 0x00 "UDPHS_EPTSTA1,UDPHS Endpoint Status Register 1"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x120)))&0x8)==0x0))
rgroup.long 0x13C++0x3
line.long 0x00 "UDPHS_EPTSTA1,UDPHS Endpoint Status Register 1"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==0x0))
rgroup.long 0x13C++0x3
line.long 0x00 "UDPHS_EPTSTA1,UDPHS Endpoint Status Register 1"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x120)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x120)))&0x8)==0x8))
rgroup.long 0x13C++0x3
line.long 0x00 "UDPHS_EPTSTA1,UDPHS Endpoint Status Register 1"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x13C++0x3
line.long 0x00 "UDPHS_EPTSTA1,UDPHS Endpoint Status Register 1"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 2"
if ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x0))
group.long 0x140++0x03
line.long 0x00 "UDPHS_EPTCFG2,UDPHS Endpoint Configuration Register 2"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x10))
group.long 0x140++0x03
line.long 0x00 "UDPHS_EPTCFG2,UDPHS Endpoint Configuration Register 2"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x140++0x03
line.long 0x00 "UDPHS_EPTCFG2,UDPHS Endpoint Configuration Register 2"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x20)
group.long 0x14C++0x03
line.long 0x00 "UDPHS_EPTCTL2,UDPHS Endpoint Set/Clr Register 2"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x10)
group.long 0x14C++0x03
line.long 0x00 "UDPHS_EPTCTL2,UDPHS Endpoint Set/Clr Register 2"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x14C++0x03
line.long 0x00 "UDPHS_EPTCTL2,UDPHS Endpoint Set/Clr Register 2"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x154++0x7
line.long 0x00 "UDPHS_EPTSETSTA2,UDPHS Endpoint Set Status Register 2"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA2,UDPHS Endpoint Clear Status Register 2"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x140)))&0x8)==0x8))
rgroup.long 0x15C++0x3
line.long 0x00 "UDPHS_EPTSTA2,UDPHS Endpoint Status Register 2"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x140)))&0x8)==0x0))
rgroup.long 0x15C++0x3
line.long 0x00 "UDPHS_EPTSTA2,UDPHS Endpoint Status Register 2"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==0x0))
rgroup.long 0x15C++0x3
line.long 0x00 "UDPHS_EPTSTA2,UDPHS Endpoint Status Register 2"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x140)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x140)))&0x8)==0x8))
rgroup.long 0x15C++0x3
line.long 0x00 "UDPHS_EPTSTA2,UDPHS Endpoint Status Register 2"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x15C++0x3
line.long 0x00 "UDPHS_EPTSTA2,UDPHS Endpoint Status Register 2"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 3"
if ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x0))
group.long 0x160++0x03
line.long 0x00 "UDPHS_EPTCFG3,UDPHS Endpoint Configuration Register 3"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x10))
group.long 0x160++0x03
line.long 0x00 "UDPHS_EPTCFG3,UDPHS Endpoint Configuration Register 3"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x160++0x03
line.long 0x00 "UDPHS_EPTCFG3,UDPHS Endpoint Configuration Register 3"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x20)
group.long 0x16C++0x03
line.long 0x00 "UDPHS_EPTCTL3,UDPHS Endpoint Set/Clr Register 3"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x10)
group.long 0x16C++0x03
line.long 0x00 "UDPHS_EPTCTL3,UDPHS Endpoint Set/Clr Register 3"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x16C++0x03
line.long 0x00 "UDPHS_EPTCTL3,UDPHS Endpoint Set/Clr Register 3"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x174++0x7
line.long 0x00 "UDPHS_EPTSETSTA3,UDPHS Endpoint Set Status Register 3"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA3,UDPHS Endpoint Clear Status Register 3"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x160)))&0x8)==0x8))
rgroup.long 0x17C++0x3
line.long 0x00 "UDPHS_EPTSTA3,UDPHS Endpoint Status Register 3"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x160)))&0x8)==0x0))
rgroup.long 0x17C++0x3
line.long 0x00 "UDPHS_EPTSTA3,UDPHS Endpoint Status Register 3"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==0x0))
rgroup.long 0x17C++0x3
line.long 0x00 "UDPHS_EPTSTA3,UDPHS Endpoint Status Register 3"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x160)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x160)))&0x8)==0x8))
rgroup.long 0x17C++0x3
line.long 0x00 "UDPHS_EPTSTA3,UDPHS Endpoint Status Register 3"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x17C++0x3
line.long 0x00 "UDPHS_EPTSTA3,UDPHS Endpoint Status Register 3"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 4"
if ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x0))
group.long 0x180++0x03
line.long 0x00 "UDPHS_EPTCFG4,UDPHS Endpoint Configuration Register 4"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x10))
group.long 0x180++0x03
line.long 0x00 "UDPHS_EPTCFG4,UDPHS Endpoint Configuration Register 4"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x180++0x03
line.long 0x00 "UDPHS_EPTCFG4,UDPHS Endpoint Configuration Register 4"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x20)
group.long 0x18C++0x03
line.long 0x00 "UDPHS_EPTCTL4,UDPHS Endpoint Set/Clr Register 4"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x10)
group.long 0x18C++0x03
line.long 0x00 "UDPHS_EPTCTL4,UDPHS Endpoint Set/Clr Register 4"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x18C++0x03
line.long 0x00 "UDPHS_EPTCTL4,UDPHS Endpoint Set/Clr Register 4"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x194++0x7
line.long 0x00 "UDPHS_EPTSETSTA4,UDPHS Endpoint Set Status Register 4"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA4,UDPHS Endpoint Clear Status Register 4"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x180)))&0x8)==0x8))
rgroup.long 0x19C++0x3
line.long 0x00 "UDPHS_EPTSTA4,UDPHS Endpoint Status Register 4"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x180)))&0x8)==0x0))
rgroup.long 0x19C++0x3
line.long 0x00 "UDPHS_EPTSTA4,UDPHS Endpoint Status Register 4"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==0x0))
rgroup.long 0x19C++0x3
line.long 0x00 "UDPHS_EPTSTA4,UDPHS Endpoint Status Register 4"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x180)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x180)))&0x8)==0x8))
rgroup.long 0x19C++0x3
line.long 0x00 "UDPHS_EPTSTA4,UDPHS Endpoint Status Register 4"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x19C++0x3
line.long 0x00 "UDPHS_EPTSTA4,UDPHS Endpoint Status Register 4"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 5"
if ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x0))
group.long 0x1A0++0x03
line.long 0x00 "UDPHS_EPTCFG5,UDPHS Endpoint Configuration Register 5"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x10))
group.long 0x1A0++0x03
line.long 0x00 "UDPHS_EPTCFG5,UDPHS Endpoint Configuration Register 5"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x1A0++0x03
line.long 0x00 "UDPHS_EPTCFG5,UDPHS Endpoint Configuration Register 5"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x20)
group.long 0x1AC++0x03
line.long 0x00 "UDPHS_EPTCTL5,UDPHS Endpoint Set/Clr Register 5"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x10)
group.long 0x1AC++0x03
line.long 0x00 "UDPHS_EPTCTL5,UDPHS Endpoint Set/Clr Register 5"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x1AC++0x03
line.long 0x00 "UDPHS_EPTCTL5,UDPHS Endpoint Set/Clr Register 5"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x1B4++0x7
line.long 0x00 "UDPHS_EPTSETSTA5,UDPHS Endpoint Set Status Register 5"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA5,UDPHS Endpoint Clear Status Register 5"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x1A0)))&0x8)==0x8))
rgroup.long 0x1BC++0x3
line.long 0x00 "UDPHS_EPTSTA5,UDPHS Endpoint Status Register 5"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x1A0)))&0x8)==0x0))
rgroup.long 0x1BC++0x3
line.long 0x00 "UDPHS_EPTSTA5,UDPHS Endpoint Status Register 5"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==0x0))
rgroup.long 0x1BC++0x3
line.long 0x00 "UDPHS_EPTSTA5,UDPHS Endpoint Status Register 5"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1A0)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x1A0)))&0x8)==0x8))
rgroup.long 0x1BC++0x3
line.long 0x00 "UDPHS_EPTSTA5,UDPHS Endpoint Status Register 5"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x1BC++0x3
line.long 0x00 "UDPHS_EPTSTA5,UDPHS Endpoint Status Register 5"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
tree "Endpoint 6"
if ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x0))
group.long 0x1C0++0x03
line.long 0x00 "UDPHS_EPTCFG6,UDPHS Endpoint Configuration Register 6"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "No effect,?..."
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
elif ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x10))
group.long 0x1C0++0x03
line.long 0x00 "UDPHS_EPTCFG6,UDPHS Endpoint Configuration Register 6"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes"
else
group.long 0x1C0++0x03
line.long 0x00 "UDPHS_EPTCFG6,UDPHS Endpoint Configuration Register 6"
bitfld.long 0x00 31. " EPT_MAPD , Endpoint Mapped" "User,Hardware"
bitfld.long 0x00 8.--9. " NB_TRANS , Number Of Transaction per Microframe" "No effect,Software,?..."
textline " "
bitfld.long 0x00 6.--7. " BK_NUMBER , Number of Banks" "No bank,One bank,Double bank,Triple bank"
bitfld.long 0x00 4.--5. " EPT_TYPE , Endpoint Type " "Control,Isochronous,Bulk,Interrupt"
textline " "
bitfld.long 0x00 3. " EPT_DIR , Endpoint Direction" "OUT,IN"
bitfld.long 0x00 0.--2. " EPT_SIZE , Endpoint Size" "8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,?..."
endif
if (((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x20)
group.long 0x1CC++0x03
line.long 0x00 "UDPHS_EPTCTL6,UDPHS Endpoint Set/Clr Register 6"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
sif (cpu()=="AT91SAM9G45")
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_DIS_set/clr , NYET Disable" "No,Yes"
textline " "
else
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " NYET_set/clr , NYET Disable" "Enabled,Disabled"
textline " "
endif
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
elif (((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x10)
group.long 0x1CC++0x03
line.long 0x00 "UDPHS_EPTCTL6,UDPHS Endpoint Set/Clr Register 6"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " MDATA_RX_set/clr ,MDATA Interrupt " "Disabled,Enabled"
textline " "
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " DATAX_RX_set/clr ,DATAX_RX, DATAx Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
else
group.long 0x1CC++0x03
line.long 0x00 "UDPHS_EPTCTL6,UDPHS Endpoint Set/Clr Register 6"
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " SHRT_PCKT_set/clr ,Short Packet Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " BUSY_BANK_set/clr ,Busy Bank Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " NAK_OUT_set/clr , NAKOUT Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " NAK_IN/ERR_FLUSH_set/clr , NAKIN/bank flush error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " STALL_SNT/ERR_CRISO/ERR_NBTRA_set/clr , Stall Sent/ISO CRC Error/Number of Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RX_SETUP/ERR_FL_ISO_set/clr ,Received SETUP/Error Flow Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TX_PK_RDY/ERR_TRANS_set/clr ,TX Packet Ready/Transaction Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TX_COMPLT_set/clr ,Transmitted IN Data Complete Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " RX_BK_RDY_set/clr ,Received OUT Data Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " ERR_OVFLW_set/clr ,Overflow Error Interrupt" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " INTDIS_DMA_set/clr ,Interrupts DMA" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " AUTO_VALID_set/clr ,Packet Auto-Valid" "Disabled,Enabled"
textline " "
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EPT_ENABL_set/clr ,Endpoint" "Disabled,Enabled"
endif
wgroup.long 0x1D4++0x7
line.long 0x00 "UDPHS_EPTSETSTA6,UDPHS Endpoint Set Status Register 6"
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready Set" "No effect,Packet Ready"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank Set (for IN Endpoint)" "No effect,KILL Bank"
textline " "
bitfld.long 0x00 5. " FRCESTALL ,Stall Handshake Request Set" "No effect,Request a STALL"
line.long 0x04 "UDPHS_EPTCLRSTA6,UDPHS Endpoint Clear Status Register 6"
bitfld.long 0x04 15. " NAK_OUT , NAKOUT Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 14. " NAK_IN/ERR_FLUSH , NAKIN/Bank Flush Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 13. " STALL_SNT/ERR_NBTRA , Stall Sent/Number of Transaction Error Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 12. " RX_SETUP/ERR_FL_ISO , Received SETUP/Error Flow Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 10. " TX_COMPLT , Transmitted IN Data Complete Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 9. " RX_BK_RDY , Received OUT Data Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 6. " TOGGLESQ , Data Toggle Clear" "No effect,Cleared"
textline " "
bitfld.long 0x04 5. " FRCESTALL , Stall Handshake Request Clear" "No effect,Cleared"
if ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x1C0)))&0x8)==0x8))
rgroup.long 0x1DC++0x3
line.long 0x00 "UDPHS_EPTSTA6,UDPHS Endpoint Status Register 6"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " ERR_FLUSH ,Bank Flush Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_NBTRA , Number of Transaction Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY ,TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x10)&&(((d.l(ad:(0xfffd4000+0x1C0)))&0x8)==0x0))
rgroup.long 0x1DC++0x3
line.long 0x00 "UDPHS_EPTSTA6,UDPHS Endpoint Status Register 6"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN ,NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " ERR_CRISO , CRC ISO Error" "Not detected,Detected"
bitfld.long 0x00 12. " ERR_FL_ISO , Error Flow" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " ERR_TRANS ,Transaction Error" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,Data 2,MData"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==0x0))
rgroup.long 0x1DC++0x3
line.long 0x00 "UDPHS_EPTSTA6,UDPHS Endpoint Status Register 6"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CONTROL_DIR ,Control Direction" "Write,Read,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
bitfld.long 0x00 12. " RX_SETUP , Received SETUP" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RDY , Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
elif ((((d.l(ad:(0xfffd4000+0x1C0)))&0x30)==(0x20||0x30))&&(((d.l(ad:(0xfffd4000+0x1C0)))&0x8)==0x8))
rgroup.long 0x1DC++0x3
line.long 0x00 "UDPHS_EPTSTA6,UDPHS Endpoint Status Register 6"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN " "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent " "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " KILL_BANK , KILL Bank" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "0,1,2,3"
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
else
rgroup.long 0x1DC++0x3
line.long 0x00 "UDPHS_EPTSTA6,UDPHS Endpoint Status Register 6"
bitfld.long 0x00 31. " SHRT_PCKT , Short Packet" "Not detected,Detected"
hexmask.long.word 0x00 20.--30. 1. " BYTE_COUNT , UDPHS Byte Count"
textline " "
bitfld.long 0x00 18.--19. " BUSY_BANK_STA , Busy Bank Number" "All free,1 busy,2 busy,3 busy"
bitfld.long 0x00 16.--17. " CURRENT_BANK , Current Bank" "Bank 0,Bank 1,Bank 2,?..."
textline " "
bitfld.long 0x00 15. " NAK_OUT , NAK OUT" "Not detected,Detected"
bitfld.long 0x00 14. " NAK_IN , NAK IN" "Not detected,Detected"
textline " "
bitfld.long 0x00 13. " STALL_SNT , Stall Sent" "Not detected,Detected"
textline " "
bitfld.long 0x00 11. " TX_PK_RDY , TX Packet Ready" "Not detected,Detected"
bitfld.long 0x00 10. " TX_COMPLT , Transmitted IN Data Complete" "Not detected,Detected"
textline " "
bitfld.long 0x00 9. " RX_BK_RD ,Received OUT Data" "Not detected,Detected"
bitfld.long 0x00 8. " ERR_OVFLW , Overflow Error" "Not detected,Detected"
textline " "
bitfld.long 0x00 6.--7. " TOGGLESQ_STA , Toggle Sequencing" "Data 0,Data 1,?..."
bitfld.long 0x00 5. " FRCESTALL , Stall Handshake Request" "No effect,Request"
endif
tree.end
width 19.
tree "DMA channel 1"
group.long 0x310++0xb
line.long 0x00 "UDPHS_DMANXTDSC1, UDPHS DMA Channel Address Register 1"
line.long 0x04 "UDPHS_DMAADDRESS1, UDPHS DMA Next Descriptor Address Register 1"
line.long 0x08 "UDPHS_DMACONTROL1, UDPHS DMA Channel Control Register 1"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x310+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS1,UDPHS DMA Channel Status Register 1"
in
tree.end
tree "DMA channel 2"
group.long 0x320++0xb
line.long 0x00 "UDPHS_DMANXTDSC2, UDPHS DMA Channel Address Register 2"
line.long 0x04 "UDPHS_DMAADDRESS2, UDPHS DMA Next Descriptor Address Register 2"
line.long 0x08 "UDPHS_DMACONTROL2, UDPHS DMA Channel Control Register 2"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x320+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS2,UDPHS DMA Channel Status Register 2"
in
tree.end
tree "DMA channel 3"
group.long 0x330++0xb
line.long 0x00 "UDPHS_DMANXTDSC3, UDPHS DMA Channel Address Register 3"
line.long 0x04 "UDPHS_DMAADDRESS3, UDPHS DMA Next Descriptor Address Register 3"
line.long 0x08 "UDPHS_DMACONTROL3, UDPHS DMA Channel Control Register 3"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x330+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS3,UDPHS DMA Channel Status Register 3"
in
tree.end
tree "DMA channel 4"
group.long 0x340++0xb
line.long 0x00 "UDPHS_DMANXTDSC4, UDPHS DMA Channel Address Register 4"
line.long 0x04 "UDPHS_DMAADDRESS4, UDPHS DMA Next Descriptor Address Register 4"
line.long 0x08 "UDPHS_DMACONTROL4, UDPHS DMA Channel Control Register 4"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x340+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS4,UDPHS DMA Channel Status Register 4"
in
tree.end
tree "DMA channel 5"
group.long 0x350++0xb
line.long 0x00 "UDPHS_DMANXTDSC5, UDPHS DMA Channel Address Register 5"
line.long 0x04 "UDPHS_DMAADDRESS5, UDPHS DMA Next Descriptor Address Register 5"
line.long 0x08 "UDPHS_DMACONTROL5, UDPHS DMA Channel Control Register 5"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x350+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS5,UDPHS DMA Channel Status Register 5"
in
tree.end
sif (cpuis("AT91CAP9*"))
tree "DMA channel 6"
group.long 0x360++0xb
line.long 0x00 "UDPHS_DMANXTDSC6, UDPHS DMA Channel Address Register 6"
line.long 0x04 "UDPHS_DMAADDRESS6, UDPHS DMA Next Descriptor Address Register 6"
line.long 0x08 "UDPHS_DMACONTROL6, UDPHS DMA Channel Control Register 6"
hexmask.long.word 0x08 16.--31. 1. " BUFF_LENGTH , Buffer Byte Length"
bitfld.long 0x08 7. " BURST_LCK , Burst Lock Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 6. " DESC_LD_IT , Descriptor Loaded Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 5. " END_BUFFIT , End of Buffer Interrupt Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x08 4. " END_TR_IT , End of Transfer Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x08 3. " END_B_EN , End of Buffer Enable (Control)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 2. " END_TR_EN , End of Transfer Enable (Control)" "Disabled,Enabled"
bitfld.long 0x08 1. " LDNXT_DSC , Load Next Channel Transfer Descriptor Enable (Command)" "Disabled,Enabled"
textline " "
bitfld.long 0x08 0. " CHANN_ENB , Channel Enable Command" "Disabled,Enabled"
hgroup.long (0x360+0xc)++0x3
hide.long 0x00 "UDPHS_DMASTATUS6,UDPHS DMA Channel Status Register 6"
in
tree.end
endif
tree.end
tree "PWM (Pulse Width Modulation)"
base ad:0xfffc8000
width 0x9
group.long 0x00++0x3
line.long 0x00 "PWM_MR,PWM Mode Register"
bitfld.long 0x00 24.--27. " PREB ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..."
hexmask.long.byte 0x00 16.--23. 1. " DIVB ,CLKB Divide Factor"
textline " "
bitfld.long 0x00 8.--11. " PREA ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..."
hexmask.long.byte 0x00 0.--7. 1. " DIVA ,CLKA Divide Factor"
group.long 0xc++3
line.long 0x0 "PWM_SR,PWM Status Register"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " CHID3_set/clr ,PWM Output for Channel 3 Enable" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " CHID2_set/clr ,PWM Output for Channel 2 Enable" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " CHID1_set/clr ,PWM Output for Channel 1 Enable" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " CHID0_set/clr ,PWM Output for Channel 0 Enable" "Disabled,Enabled"
group.long 0x18++3
line.long 0x0 "PWM_IMR,PWM Interrupt Mask Register"
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " CHID3_set/clr ,Enable Interrupt for PWM Channel 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " CHID2_set/clr ,Enable Interrupt for PWM Channel 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " CHID1_set/clr ,Enable Interrupt for PWM Channel 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " CHID0_set/clr ,Enable Interrupt for PWM Channel 0" "Disabled,Enabled"
hgroup.long 0x1C++0x03
hide.long 0x00 "PWM_ISR,PWM Interrupt Status Register"
in
wgroup 0x0++0x0
width 0xb
tree "Channel 0 Registers"
group.long (0x200+(0*0x20))++0x0b
line.long 0x00 "PWM_CMR0,PWM Channel 0 Mode Register"
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
textline " "
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
line.long 0x04 "PWM_CDTY0,PWM Channel 0 Duty Cycle Register"
line.long 0x08 "PWM_CPRD0,PWM Channel 0 Period Register"
rgroup.long (0x20C+(0*0x20))++0x03
line.long 0x00 "PWM_CCNT0,PWM Channel 0 Counter Register"
wgroup.long (0x210+(0*0x20))++0x03
line.long 0x00 "PWM_CUPD0,PWM Channel 0 Update Register"
tree.end
width 0xb
width 0xb
tree "Channel 1 Registers"
group.long (0x200+(1*0x20))++0x0b
line.long 0x00 "PWM_CMR1,PWM Channel 1 Mode Register"
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
textline " "
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
line.long 0x04 "PWM_CDTY1,PWM Channel 1 Duty Cycle Register"
line.long 0x08 "PWM_CPRD1,PWM Channel 1 Period Register"
rgroup.long (0x20C+(1*0x20))++0x03
line.long 0x00 "PWM_CCNT1,PWM Channel 1 Counter Register"
wgroup.long (0x210+(1*0x20))++0x03
line.long 0x00 "PWM_CUPD1,PWM Channel 1 Update Register"
tree.end
width 0xb
width 0xb
tree "Channel 2 Registers"
group.long (0x200+(2*0x20))++0x0b
line.long 0x00 "PWM_CMR2,PWM Channel 2 Mode Register"
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
textline " "
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
line.long 0x04 "PWM_CDTY2,PWM Channel 2 Duty Cycle Register"
line.long 0x08 "PWM_CPRD2,PWM Channel 2 Period Register"
rgroup.long (0x20C+(2*0x20))++0x03
line.long 0x00 "PWM_CCNT2,PWM Channel 2 Counter Register"
wgroup.long (0x210+(2*0x20))++0x03
line.long 0x00 "PWM_CUPD2,PWM Channel 2 Update Register"
tree.end
width 0xb
width 0xb
tree "Channel 3 Registers"
group.long (0x200+(3*0x20))++0x0b
line.long 0x00 "PWM_CMR3,PWM Channel 3 Mode Register"
bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period"
bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low,High"
bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center"
textline " "
bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-Scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..."
line.long 0x04 "PWM_CDTY3,PWM Channel 3 Duty Cycle Register"
line.long 0x08 "PWM_CPRD3,PWM Channel 3 Period Register"
rgroup.long (0x20C+(3*0x20))++0x03
line.long 0x00 "PWM_CCNT3,PWM Channel 3 Counter Register"
wgroup.long (0x210+(3*0x20))++0x03
line.long 0x00 "PWM_CUPD3,PWM Channel 3 Update Register"
tree.end
width 0xb
width 0xb
tree.end
tree "ADC (Touch Screen ADC Controller)"
base ad:0xfffd0000
width 0x13
wgroup.long 0x00++0x03
line.long 0x00 "TSADCC_CR,TSADCC Control Register"
bitfld.long 0x00 1. " START ,Conversion Start" "No effect,Started"
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
group.long 0x04++0x03
line.long 0x00 "TSADCC_MR,TSADCC Mode Register"
bitfld.long 0x00 28.--31. " PENDBC ,Pen Detect debouncing period" "1/clock,2/clock,4/clock,8/clock,16/clock,32/clock,64/clock,128/clock,256/clock,512/clock,1024/clock,2048/clock,4096/clock,8192/clock,16384/clock,32768/clock"
bitfld.long 0x00 24.--27. " SHTIM ,Sample and Hold Time" "1/clock,2/clock,3/clock,4/clock,5/clock,6/clock,7/clock,8/clock,9/clock,10/clock,11/clock,12/clock,13/clock,14/clock,15/clock,16/clock"
hexmask.long.byte 0x00 16.--22. 1. " STARTUP ,Start Up Time"
textline " "
bitfld.long 0x00 8.--13. " PRESCAL ,Prescaler Rate Selection" "MCK/2,MCK/4,MCK/6,MCK/8,MCK/10,MCK/12,MCK/14,MCK/16,MCK/18,MCK/20,MCK/22,MCK/24,MCK/26,MCK/28,MCK/30,MCK/32,MCK/34,MCK/36,MCK/38,MCK/40,MCK/42,MCK/44,MCK/46,MCK/48,MCK/50,MCK/52,MCK/54,MCK/56,MCK/58,MCK/60,MCK/62,MCK/64,MCK/66,MCK/68,MCK/70,MCK/72,MCK/74,MCK/76,MCK/78,MCK/80,MCK/82,MCK/84,MCK/86,MCK/88,MCK/90,MCK/92,MCK/94,MCK/96,MCK/98,MCK/100,MCK/102,MCK/104,MCK/106,MCK/108,MCK/110,MCK/112,MCK/114,MCK/116,MCK/118,MCK/120,MCK/122,MCK/124,MCK/126,MCK/128"
bitfld.long 0x00 6. " PENDET , Pen Detect Selection" "Disabled,Enabled"
bitfld.long 0x00 5. " SLEEP ,Sleep Mode" "Normal,Sleep"
textline " "
bitfld.long 0x00 4. " LOWRES ,Resolution" "10-bit,8-bit"
bitfld.long 0x00 0.--1. " TSAMOD , Touch Screen ADC Mode" "ADC,Touch Screen,?..."
group.long 0x08++0x03
line.long 0x00 "TSADCC_TRGR,TSADCC Trigger Register"
hexmask.long 0x00 16.--31. 1. " TRGPER , Trigger Period"
bitfld.long 0x00 0.--2. " TRGMOD , Trigger Mode " "No trigger,Rising Edge,Falling Edge,Any Edge,Pen Detect,Periodic,Continuous,?..."
group.long 0x0c++0x03
line.long 0x00 "TSADCC_TSR,TSADCC Touch Screen Register"
hexmask.long.byte 0x00 24.--27. 1. " TSSHTIM , Sample & Hold Time for Touch Screen Channels""1/clock,2/clock,3/clock,4/clock,5/clock,6/clock,7/clock,8/clock,9/clock,10/clock,11/clock,12/clock,13/clock,14/clock,15/clock,16/clock"
group.long 0x18++0x03
line.long 0x0 "TSADCC_CHSR,TSADCC Channel Status Register"
setclrfld.long 0x0 5. -0x8 5. -0x4 5. " CH5_Clear/Set ,Channel 5 Status" "Disabled,Enabled"
setclrfld.long 0x0 4. -0x8 4. -0x4 4. " CH4_Clear/Set ,Channel 4 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " CH3_Clear/Set ,Channel 3 Status" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " CH2_Clear/Set ,Channel 2 Status" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " CH1_Clear/Set ,Channel 1 Status" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " CH0_Clear/Set ,Channel 0 Status" "Disabled,Enabled"
hgroup.long 0x1c++0x3
hide.long 0x00 "TSADCC_SR, TSADCC Status Register"
in
rgroup.long 0x30++0x17
line.long 0x0 "TSADCC_CDR0,TSADCC Channel 0 Data Register"
hexmask.long.word 0x0 0.--9. 1. " DATA ,Channel Data"
line.long 0x4 "TSADCC_CDR1,TSADCC Channel 1 Data Register"
hexmask.long.word 0x4 0.--9. 1. " DATA ,Channel Data"
line.long 0x8 "TSADCC_CDR2,TSADCC Channel 2 Data Register"
hexmask.long.word 0x8 0.--9. 1. " DATA ,Channel Data"
line.long 0xC "TSADCC_CDR3,TSADCC Channel 3 Data Register"
hexmask.long.word 0xC 0.--9. 1. " DATA ,Channel Data"
line.long 0x10 "TSADCC_CDR4,TSADCC Channel 4 Data Register"
hexmask.long.word 0x10 0.--9. 1. " DATA ,Channel Data"
line.long 0x14 "TSADCC_CDR5,TSADCC Channel 5 Data Register"
hexmask.long.word 0x14 0.--9. 1. " DATA ,Channel Data"
rgroup.long 0x20++0x3
line.long 0x00 "TSADCC_LCDR,TSADCC Last Converted Data Register"
hexmask.long.word 0x00 0.--9. 1. " LDATA ,Last Data Converted"
group.long 0x2c++0x03
line.long 0x0 "TSADCC_IMR,TSADCC Interrupt Mask Register"
setclrfld.long 0x0 21. -0x8 21. -0x4 21. " NOCNT , No Contact" "Disabled,Enabled"
setclrfld.long 0x0 20. -0x8 20. -0x4 20. " PENCNT , Pen Contact" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 19. -0x8 19. -0x4 19. " RXBUFF ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 18. -0x8 18. -0x4 18. " ENDRX ,Receive Buffer End Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 17. -0x8 17. -0x4 17. " GOVRE ,General Overrun Error Interrupt Mask" "Disabled,Enabled"
setclrfld.long 0x0 16. -0x8 16. -0x4 16. " DRDY ,Data Ready Interrupt Mask" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 11. -0x8 11. -0x4 11. " OVRE3 ,Overrun Error Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 10. -0x8 10. -0x4 10. " OVRE2 ,Overrun Error Interrupt Mask 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 9. -0x8 9. -0x4 9. " OVRE1 ,Overrun Error Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 8. -0x8 8. -0x4 8. " OVRE0 ,Overrun Error Interrupt Mask 0" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 3. -0x8 3. -0x4 3. " EOC3 ,Conversion End Interrupt Mask 3" "Disabled,Enabled"
setclrfld.long 0x0 2. -0x8 2. -0x4 2. " EOC2 ,Conversion End Interrupt Mask 2" "Disabled,Enabled"
textline " "
setclrfld.long 0x0 1. -0x8 1. -0x4 1. " EOC1 ,Conversion End Interrupt Mask 1" "Disabled,Enabled"
setclrfld.long 0x0 0. -0x8 0. -0x4 0. " EOC0 ,Conversion End Interrupt Mask 0" "Disabled,Enabled"
width 0xb
tree.end
textline " "
Reference in New Issue View Git Blame Copy Permalink