14481 lines
1.1 MiB
14481 lines
1.1 MiB
; --------------------------------------------------------------------------------
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; @Title: Apollo 2 On-Chip Peripherals
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; @Props: Released
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; @Author: STR, KWI, KRZ, JDU
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; @Changelog: 2017-12-13 STR
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; 2020-07-24 KWI
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; 2022-02-15 KRZ
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; 2023-02-23 JDU
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; @Manufacturer: AMBIQ - Ambiq Micro, Inc.
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; @Doc: Apollo2_MCU_Data_Sheet_rev0p93_with_Flash_Ctrl.pdf (Rev. 0.93, 2017-08),
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; SVD generated (SVD2PER 1.8.6), based on: apollo2.svd (Ver. 1.0)
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; @Core: Cortex-M4F
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; @Chip: AMAPH1KK, AMA2B1KK
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perapollo2.per 15798 2023-02-24 10:19:05Z kwisniewski $
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
sif cpuis("AMAPH1KK")
|
|
tree "PWRCTRL (PWR Controller Register Bank)"
|
|
base ad:0x40021000
|
|
width 16.
|
|
if (((per.l(ad:0x40021000+0x08))&0x7FF)==0x000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SUPPLYSRC,Memory and Core Voltage Supply Source Select Register"
|
|
bitfld.long 0x00 1. " COREBUCKEN ,Enable the Core Buck as the supply for the low-voltage power domain" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MEMBUCKEN ,Enable the Memory Buck as the supply for the Flash and SRAM power domain" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SUPPLYSRC,Memory and Core Voltage Supply Source Select Register"
|
|
bitfld.long 0x00 2. " SWITCH_LDO_IN_SLEEP ,Switch the CORE DOMAIN from BUCK mode to LDO in DEEP SLEEP" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COREBUCKEN ,Enable the Core Buck as the supply for the low-voltage power domain" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MEMBUCKEN ,Enable the Memory Buck as the supply for the Flash and SRAM power domain" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "POWERSTATUS,Power Status Register for MCU supplies and peripherals"
|
|
bitfld.long 0x00 1. " COREBUCKON ,Core low-voltage domain supply" "LDO,BUCK"
|
|
bitfld.long 0x00 0. " MEMBUCKON ,Memory power domain supply" "LDO,BUCK"
|
|
group.long 0x08++0x13
|
|
line.long 0x00 "DEVICEEN,DEVICE ENABLES for SHELBY"
|
|
bitfld.long 0x00 10. " PDM ,Enable PDM Digital Block" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ADC ,Enable ADC Digital Block" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " UART1 ,Enable UART 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " UART0 ,Enable UART 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IO_MASTER5 ,Enable IO MASTER 5 (I2C5 Master)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO_MASTER4 ,Enable IO MASTER 4 (I2C4 Master)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IO_MASTER3 ,Enable IO MASTER 3 (I2C3 Master)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IO_MASTER2 ,Enable IO MASTER 2 (I2C2 Master)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IO_MASTER1 ,Enable IO MASTER 1 (I2C1 Master)" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IO_MASTER0 ,Enable IO MASTER 0 (I2C0 Master)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IO_SLAVE ,Enable IO SLAVE (I2C Slave)" "Disabled,Enabled"
|
|
line.long 0x04 "SRAMPWDINSLEEP,Powerdown an SRAM Banks in Deep Sleep mode"
|
|
bitfld.long 0x04 31. " CACHE_PWD_SLP ,Enable CACHE BANKS to power down in deep sleep" "Disabled,Enabled"
|
|
hexmask.long.word 0x04 0.--10. 1. " SRAMSLEEPPOWERDOWN ,SRAM banks to power down in deep sleep mode"
|
|
line.long 0x08 "MEMEN,Disables individual banks of the MEMORY array"
|
|
bitfld.long 0x08 31. " CACHEB2 ,Enable CACHE BANK 2" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " CACHEB0 ,Enable CACHE BANK 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " FLASH1 ,Enable FLASH 1" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " FLASH0 ,Enable FLASH 0" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x08 0.--10. 1. " SRAMEN ,Enable power for selected SRAM banks"
|
|
line.long 0x0C "PWRONSTATUS,POWER ON Status"
|
|
bitfld.long 0x0C 21. " PD_CACHEB2 ,Power is supplied to CACHE BANK 2" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 19. " PD_CACHEB0 ,Power is supplied to CACHE BANK 0" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 18. " PD_GRP7_SRAM ,Power is supplied to SRAM domain PD_GRP7" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 17. " PD_GRP6_SRAM ,Power is supplied to SRAM domain PD_GRP6" "Not supplied,Supplied"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " PD_GRP5_SRAM ,Power is supplied to SRAM domain PD_GRP5" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 15. " PD_GRP4_SRAM ,Power is supplied to SRAM domain PD_GRP4" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 14. " PD_GRP3_SRAM ,Power is supplied to SRAM domain PD_GRP3" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 13. " PD_GRP2_SRAM ,Power is supplied to SRAM domain PD_GRP2" "Not supplied,Supplied"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " PD_GRP1_SRAM ,Power is supplied to SRAM domain PD_GRP1" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 11. " PD_GRP0_SRAM3 ,Power is supplied to SRAM domain PD_SRAM0_3" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 10. " PD_GRP0_SRAM2 ,Power is supplied to SRAM domain PD_SRAM0_2" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 9. " PD_GRP0_SRAM1 ,Power is supplied to SRAM domain SRAM0_1" "Not supplied,Supplied"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " PD_GRP0_SRAM0 ,Power is supplied to SRAM domain SRAM0_0" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 7. " PDADC ,Power is supplied to domain PD_ADC" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 6. " PD_FLAM1 ,Power is supplied to domain PD_FLAM1" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 5. " PD_FLAM0 ,Power is supplied to domain PD_FLAM0" "Not supplied,Supplied"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " PD_PDM ,Power is supplied to domain PD_PDM" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 3. " PDC ,Power is supplied to power domain C, which supplies IOM3-5" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 2. " PDB ,Power is supplied to power domain B, which supplies IOM0-2" "Not supplied,Supplied"
|
|
bitfld.long 0x0C 1. " PDA ,Power is supplied to power domain A, which supplies IOS and UART0,1" "Not supplied,Supplied"
|
|
line.long 0x10 "SRAMCTRL,SRAM Control register"
|
|
bitfld.long 0x10 2. " SRAM_MASTER_CLKGATE ,Enable top-level clock gating in the SRAM block" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " SRAM_CLKGATE ,Enable individual per-RAM clock gating in the SRAM block" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " SRAM_LIGHT_SLEEP ,Enable LS (light sleep) of cache RAMs" "Disabled,Enabled"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "ADCSTATUS,Power Status Register for ADC Block"
|
|
bitfld.long 0x00 5. " ADC_REFBUF_PWD ,ADC REFBUF is powered down" "No,Yes"
|
|
bitfld.long 0x00 4. " ADC_REFKEEP_PWD ,ADC REFKEEP is powered down" "No,Yes"
|
|
bitfld.long 0x00 3. " ADC_VBAT_PWD ,ADC VBAT resistor divider is powered down" "No,Yes"
|
|
bitfld.long 0x00 2. " ADC_VPTAT_PWD ,ADC temperature sensor input buffer is powered down" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ADC_BGT_PWD ,ADC Band Gap is powered down" "No,Yes"
|
|
bitfld.long 0x00 0. " ADC_PWD ,ADC is powered down" "No,Yes"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MISCOPT,Power Optimization Control Bits"
|
|
bitfld.long 0x00 2. " DIS_LDOLPMODE_TIMERS ,Enable the MEM LDO to be in LPMODE during deep sleep even when the ctimers or stimers are running" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DIS_LDOLPMODE_HFRC ,Enable the Core LDO to be in LPMODE during deep sleep even when HFRC is enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADC_EN_MASK ,Control Bit to mask the ADC_EN in the adc_pwr_down equation" "Not masked,Masked"
|
|
width 0xB
|
|
tree.end
|
|
tree "ITM (Instrumentation Trace Macrocell)"
|
|
base ad:0xE0000000
|
|
width 9.
|
|
tree "Stimulus Port registers 0-31"
|
|
wgroup.long 0x00++0x7F "WRITES"
|
|
line.long 0x0 "STIM0,Stimulus Port Register 0"
|
|
line.long 0x4 "STIM1,Stimulus Port Register 1"
|
|
line.long 0x8 "STIM2,Stimulus Port Register 2"
|
|
line.long 0xC "STIM3,Stimulus Port Register 3"
|
|
line.long 0x10 "STIM4,Stimulus Port Register 4"
|
|
line.long 0x14 "STIM5,Stimulus Port Register 5"
|
|
line.long 0x18 "STIM6,Stimulus Port Register 6"
|
|
line.long 0x1C "STIM7,Stimulus Port Register 7"
|
|
line.long 0x20 "STIM8,Stimulus Port Register 8"
|
|
line.long 0x24 "STIM9,Stimulus Port Register 9"
|
|
line.long 0x28 "STIM10,Stimulus Port Register 10"
|
|
line.long 0x2C "STIM11,Stimulus Port Register 11"
|
|
line.long 0x30 "STIM12,Stimulus Port Register 12"
|
|
line.long 0x34 "STIM13,Stimulus Port Register 13"
|
|
line.long 0x38 "STIM14,Stimulus Port Register 14"
|
|
line.long 0x3C "STIM15,Stimulus Port Register 15"
|
|
line.long 0x40 "STIM16,Stimulus Port Register 16"
|
|
line.long 0x44 "STIM17,Stimulus Port Register 17"
|
|
line.long 0x48 "STIM18,Stimulus Port Register 18"
|
|
line.long 0x4C "STIM19,Stimulus Port Register 19"
|
|
line.long 0x50 "STIM20,Stimulus Port Register 20"
|
|
line.long 0x54 "STIM21,Stimulus Port Register 21"
|
|
line.long 0x58 "STIM22,Stimulus Port Register 22"
|
|
line.long 0x5C "STIM23,Stimulus Port Register 23"
|
|
line.long 0x60 "STIM24,Stimulus Port Register 24"
|
|
line.long 0x64 "STIM25,Stimulus Port Register 25"
|
|
line.long 0x68 "STIM26,Stimulus Port Register 26"
|
|
line.long 0x6C "STIM27,Stimulus Port Register 27"
|
|
line.long 0x70 "STIM28,Stimulus Port Register 28"
|
|
line.long 0x74 "STIM29,Stimulus Port Register 29"
|
|
line.long 0x78 "STIM30,Stimulus Port Register 30"
|
|
line.long 0x7C "STIM31,Stimulus Port Register 31"
|
|
rgroup.long 0x00++0x7F "READS"
|
|
line.long 0x0 "STIM0,Stimulus Port Register 0"
|
|
bitfld.long 0x0 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x4 "STIM1,Stimulus Port Register 1"
|
|
bitfld.long 0x4 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x8 "STIM2,Stimulus Port Register 2"
|
|
bitfld.long 0x8 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0xC "STIM3,Stimulus Port Register 3"
|
|
bitfld.long 0xC 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x10 "STIM4,Stimulus Port Register 4"
|
|
bitfld.long 0x10 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x14 "STIM5,Stimulus Port Register 5"
|
|
bitfld.long 0x14 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x18 "STIM6,Stimulus Port Register 6"
|
|
bitfld.long 0x18 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x1C "STIM7,Stimulus Port Register 7"
|
|
bitfld.long 0x1C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x20 "STIM8,Stimulus Port Register 8"
|
|
bitfld.long 0x20 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x24 "STIM9,Stimulus Port Register 9"
|
|
bitfld.long 0x24 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x28 "STIM10,Stimulus Port Register 10"
|
|
bitfld.long 0x28 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x2C "STIM11,Stimulus Port Register 11"
|
|
bitfld.long 0x2C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x30 "STIM12,Stimulus Port Register 12"
|
|
bitfld.long 0x30 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x34 "STIM13,Stimulus Port Register 13"
|
|
bitfld.long 0x34 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x38 "STIM14,Stimulus Port Register 14"
|
|
bitfld.long 0x38 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x3C "STIM15,Stimulus Port Register 15"
|
|
bitfld.long 0x3C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x40 "STIM16,Stimulus Port Register 16"
|
|
bitfld.long 0x40 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x44 "STIM17,Stimulus Port Register 17"
|
|
bitfld.long 0x44 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x48 "STIM18,Stimulus Port Register 18"
|
|
bitfld.long 0x48 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x4C "STIM19,Stimulus Port Register 19"
|
|
bitfld.long 0x4C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x50 "STIM20,Stimulus Port Register 20"
|
|
bitfld.long 0x50 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x54 "STIM21,Stimulus Port Register 21"
|
|
bitfld.long 0x54 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x58 "STIM22,Stimulus Port Register 22"
|
|
bitfld.long 0x58 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x5C "STIM23,Stimulus Port Register 23"
|
|
bitfld.long 0x5C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x60 "STIM24,Stimulus Port Register 24"
|
|
bitfld.long 0x60 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x64 "STIM25,Stimulus Port Register 25"
|
|
bitfld.long 0x64 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x68 "STIM26,Stimulus Port Register 26"
|
|
bitfld.long 0x68 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x6C "STIM27,Stimulus Port Register 27"
|
|
bitfld.long 0x6C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x70 "STIM28,Stimulus Port Register 28"
|
|
bitfld.long 0x70 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x74 "STIM29,Stimulus Port Register 29"
|
|
bitfld.long 0x74 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x78 "STIM30,Stimulus Port Register 30"
|
|
bitfld.long 0x78 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
line.long 0x7C "STIM31,Stimulus Port Register 31"
|
|
bitfld.long 0x7C 0. " FIFOREADY ,Indicates whether the stimulus port FIFO can accept data" "Disabled,Enabled"
|
|
tree.end
|
|
textline " "
|
|
group.long 0xe00++0x03
|
|
line.long 0x00 "TER,ITM Trace Enable Register"
|
|
bitfld.long 0x00 31. " STIMENA[31] ,Enables Stimulus port 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [30] ,Enables Stimulus port 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " [29] ,Enables Stimulus port 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [28] ,Enables Stimulus port 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Enables Stimulus port 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [26] ,Enables Stimulus port 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " [25] ,Enables Stimulus port 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [24] ,Enables Stimulus port 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Enables Stimulus port 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [22] ,Enables Stimulus port 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [21] ,Enables Stimulus port 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [20] ,Enables Stimulus port 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Enables Stimulus port 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [18] ,Enables Stimulus port 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [17] ,Enables Stimulus port 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [16] ,Enables Stimulus port 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Enables Stimulus port 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [14] ,Enables Stimulus port 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [13] ,Enables Stimulus port 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [12] ,Enables Stimulus port 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Enables Stimulus port 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [10] ,Enables Stimulus port 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [9] ,Enables Stimulus port 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [8] ,Enables Stimulus port 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Enables Stimulus port 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Enables Stimulus port 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Enables Stimulus port 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Enables Stimulus port 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Enables Stimulus port 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Enables Stimulus port 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Enables Stimulus port 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Enables Stimulus port 0" "Disabled,Enabled"
|
|
group.long 0xe40++0x03
|
|
line.long 0x00 "TPR,Trace Privilege Register"
|
|
bitfld.long 0x00 3. " PRIVMASK[3] ,Bit mask to enable unprivileged access to ITM stimulus ports [31:24]" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Bit mask to enable unprivileged access to ITM stimulus ports [23:16]" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Bit mask to enable unprivileged access to ITM stimulus ports [15:8]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Bit mask to enable unprivileged access to ITM stimulus ports [7:0]" "Disabled,Enabled"
|
|
group.long 0xe80++0x03
|
|
line.long 0x00 "TCR,Trace Control Register"
|
|
bitfld.long 0x00 23. " BUSY ,Indicates whether the ITM is currently processing events" "Not busy,Busy"
|
|
hexmask.long.byte 0x00 16.--22. 1. " ATB_ID ,ATB ID for CoreSight system."
|
|
bitfld.long 0x00 10.--11. " TS_FREQ ,Global timestamp frequency" "Disabled,128 cycles,8192 cycles,After every packet"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " TS_PRESCALE ,Timestamp Prescaler" "Disabled,4,16,64"
|
|
bitfld.long 0x00 4. " SWV_ENABLE ,Enable SWV behavior count on TPIUEMIT and TPIUBAUD" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DWT_ENABLE ,Enables the DWT stimulus" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNC_ENABLE ,Enables sync packets for TPIU" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " TS_ENABLE ,Enables differential timestamps" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ITM_ENABLE ,Enable ITM" "Disabled,Enabled"
|
|
group.long 0xFB0++0x03
|
|
line.long 0x00 "LOCKAREG,Lock Access Register"
|
|
rgroup.long 0xFB4++0x03
|
|
line.long 0x00 "LOCKSREG,Lock Status Register"
|
|
bitfld.long 0x00 2. " BYTEACC ,8-bit lock access implemented" "Not implemented,"
|
|
bitfld.long 0x00 1. " ACCESS ,Access possible" "No,"
|
|
bitfld.long 0x00 0. " PRESENT ,Indicates that a lock mechanism exists for this component" ",Present"
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "MCUCTRL (MCU Miscellaneous Control Logic)"
|
|
base ad:0x40020000
|
|
width 16.
|
|
rgroup.long 0x00++0x13
|
|
line.long 0x00 "CHIP_INFO,Chip Information Register"
|
|
line.long 0x04 "CHIPID0,Unique Chip ID 0"
|
|
line.long 0x08 "CHIPID1,Unique Chip ID 1"
|
|
line.long 0x0C "CHIPREV,Chip Revision"
|
|
bitfld.long 0x0C 4.--7. " REVMAJ ,Major Revision ID" ",A,B,?..."
|
|
bitfld.long 0x0C 0.--3. " REVMIN ,Minor Revision ID" ",REV0,?..."
|
|
line.long 0x10 "VENDORID,Unique Vendor ID"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DEBUGGER,Debugger Access Control"
|
|
bitfld.long 0x00 0. " LOCKOUT ,Lockout of debugger (SWD)" "Not locked,Locked"
|
|
group.long 0x60++0x0B
|
|
line.long 0x00 "BUCK,Analog Buck Control"
|
|
bitfld.long 0x00 7. " MEMBUCKRST ,Reset control override for Mem Buck" "No reset,Reset"
|
|
bitfld.long 0x00 6. " COREBUCKRST ,Reset control override for Core Buck" "No reset,Reset"
|
|
bitfld.long 0x00 4. " MEMBUCKPWD ,Memory buck power down override" "Not overridden,Overridden"
|
|
bitfld.long 0x00 3. " SLEEPBUCKANA ,HFRC clkgen bit 0 override" "Not overridden,Overridden"
|
|
textline " "
|
|
bitfld.long 0x00 2. " COREBUCKPWD ,Core buck power down override" "Not overridden,Overridden"
|
|
bitfld.long 0x00 0. " BUCKSWE ,Buck Register Software Override Enable" "Disabled,Enabled"
|
|
line.long 0x04 "BUCK2,Buck Control Reg2"
|
|
bitfld.long 0x04 9. " HYSTBUCKCORE ,Enable/disable hysteresis on core buck converters internal comparators" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " HYSTBUCKMEM ,Enable/disable hysteresis on memory buck converters internal comparators" "Disabled,Enabled"
|
|
line.long 0x08 "BUCK3,Buck control reg 3"
|
|
bitfld.long 0x08 17. " MEMBUCKBURSTEN ,MEM Buck burst enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " COREBUCKBURSTEN ,Core Buck burst enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2.--5. " COREBUCKZXTRIM ,Core buck zero crossing trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "LDOREG2,LDO Control Register 2"
|
|
bitfld.long 0x00 22. " CORELDOVDDLEN ,Core LDO output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RAMLDOLPMODE ,RAM LDO LP Mode" "Normal,Low power"
|
|
bitfld.long 0x00 20. " PWDRAMLDO ,RAM LDO Power Down" "Powered up,Powered down"
|
|
bitfld.long 0x00 19. " PWDANALDO ,Analog LDO Power Down" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PWDMEMLDO ,MEM LDO Power Down" "Powered up,Powered down"
|
|
bitfld.long 0x00 17. " PWDCORELDO ,CORE LDO Power Down" "Powered up,Powered down"
|
|
bitfld.long 0x00 16. " SLEEPANALDO ,Analog LDO Sleep" "No sleep,Sleep"
|
|
bitfld.long 0x00 15. " SLEEPMEMLDO ,FLASH LDO Sleep" "No sleep,Sleep"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SLEEPCORELDO ,CORE LDO Sleep" "No sleep,Sleep"
|
|
bitfld.long 0x00 0. " LDO2SWE ,LDO2 Software Override Enable" "Disabled,Enabled"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "BODPORCTRL,BOD and PDR control Register"
|
|
bitfld.long 0x00 3. " BODEXTREFSEL ,BOD External Reference Select" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " PDREXTREFSEL ,PDR External Reference Select" "Not selected,Selected"
|
|
bitfld.long 0x00 1. " PWDBOD ,BOD Power Down" "Powered up,Powered down"
|
|
bitfld.long 0x00 0. " PWDPDR ,PDR Power Down" "Powered up,Powered down"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ADCCAL,ADC Calibration Control"
|
|
bitfld.long 0x00 1. " ADCCALIBRATED ,Status for ADC Calibration" "Not calibrated,Calibrated"
|
|
bitfld.long 0x00 0. " CALONPWRUP ,Run ADC Calibration on initial power up sequence" "Disabled,Enabled"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "ADCREFCOMP,ADC Reference Keeper and Comparator Control"
|
|
bitfld.long 0x00 16. " ADCRFCMPEN ,ADC Reference comparator power down" "Powered up,Powered down"
|
|
rbitfld.long 0x00 0. " ADC_REFCOMP_OUT ,Output of the ADC reference comparator" "0,1"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "XTALGENCTRL,XTAL Oscillator General Control"
|
|
bitfld.long 0x00 0.--1. " ACWARMUP ,Auto-calibration delay control" "1 s,2 s,4 s,8 s"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "BOOTLOADERLOW,Determines whether the bootloader code is visible at address 0x00000000"
|
|
bitfld.long 0x00 0. " VALUE ,Bootloader code visible at address 0x00000000" "No,Yes"
|
|
rgroup.long 0x1A4++0x03
|
|
line.long 0x00 "SHADOWVALID,Register to indicate whether the shadow registers have been successfully loaded from the Flash Information Space"
|
|
bitfld.long 0x00 1. " BL_DSLEEP ,Bootloader sleep or deep sleep if no image loaded" "No,Yes"
|
|
bitfld.long 0x00 0. " VALID ,Shadow registers data from the Flash Information Space valid" "Invalid,Valid"
|
|
rgroup.long 0x1C0++0x0B
|
|
line.long 0x00 "ICODEFAULTADDR,ICODE bus address which was present when a bus fault occurred"
|
|
line.long 0x04 "DCODEFAULTADDR,DCODE bus address which was present when a bus fault occurred"
|
|
line.long 0x08 "SYSFAULTADDR,System bus address which was present when a bus fault occurred"
|
|
group.long 0x1CC++0x07
|
|
line.long 0x00 "FAULTSTATUS,Reflects the status of the bus decoders' fault detection"
|
|
bitfld.long 0x00 2. " SYS ,SYS Bus Decoder Fault Detected bit" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " DCODE ,DCODE Bus Decoder Fault Detected bit" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " ICODE ,The ICODE Bus Decoder Fault Detected bit" "Not detected,Detected"
|
|
line.long 0x04 "FAULTCAPTUREEN,Enable the fault capture registers"
|
|
bitfld.long 0x04 0. " ENABLE ,Fault Capture Enable field" "Disabled,Enabled"
|
|
rgroup.long 0x200++0x07
|
|
line.long 0x00 "DBGR1,Read-only debug register 1"
|
|
line.long 0x04 "DBGR2,Read-only debug register 2"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "PMUENABLE,Control bit to enable/disable the PMU"
|
|
bitfld.long 0x00 0. " ENABLE ,PMU Enable" "Disabled,Enabled"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "TPIUCTRL,TPIU Control Register. Determines the clock enable and frequency for the M4's TPIU interface"
|
|
bitfld.long 0x00 8.--10. " CLKSEL ,Frequency of the ARM M4 TPIU port" "LOW_PWR,HFRC/2,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
bitfld.long 0x00 0. " ENABLE ,TPIU Enable field" "Disabled,Enabled"
|
|
width 0xB
|
|
tree.end
|
|
tree "CACHECTRL (Flash Cache Controller)"
|
|
base ad:0x40018000
|
|
width 11.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "CACHECFG,Flash Cache Control Register"
|
|
bitfld.long 0x00 24. " ENABLE_MONITOR ,Enable Cache Monitoring Stats" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " DATA_CLKGATE ,Enable clock gating of entire data array" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " CACHE_LS ,Enable LS (light sleep) of cache RAMs" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CACHE_CLKGATE ,Enable clock gating of cache RAMs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DCACHE_ENABLE ,Enable Flash Instruction Caching" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ICACHE_ENABLE ,Enable Flash Instruction Caching" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " CONFIG ,Cache configuration" ",,,,,2 way/128-bit/512 entries,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENABLE_NC1 ,Enable Non-cacheable region 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ENABLE_NC0 ,Enable Non-cacheable region 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LRU ,Cache replacement policy" "Least replaced,Least used"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the flash cache controller" "Disabled,Enabled"
|
|
line.long 0x04 "FLASHCFG,Flash Control Register"
|
|
bitfld.long 0x04 0.--2. " RD_WAIT ,Sets read waitstates (HCLK cycles)" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "CACHECTRL,Cache Control"
|
|
setclrfld.long 0x08 8. 0x08 10. 0x08 9. " FLASH1_SLM_set/clr ,Flash 1 Sleep Mode" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 6. 0x08 5. " FLASH0_SLM_set/clr ,Flash 0 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " CACHE_READY ,Cache Ready Status" "Not ready,Ready"
|
|
bitfld.long 0x08 1. " RESET_STAT ,Reset the cache monitor statistics" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x08 0. " INVALIDATE ,Invalidate the flash cache contents" "No effect,Invalidate"
|
|
line.long 0x10 "NCR0START,Flash Cache Noncachable Region 0 Start Address."
|
|
hexmask.long.word 0x10 4.--19. 0x10 " ADDR ,Start address for non-cacheable region 0"
|
|
line.long 0x14 "NCR0END,Flash Cache Noncachable Region 0 End"
|
|
hexmask.long.word 0x14 4.--19. 0x10 " ADDR ,End address for non-cacheable region 0"
|
|
line.long 0x18 "NCR1START,Flash Cache Noncachable Region 1 Start"
|
|
hexmask.long.word 0x18 4.--19. 0x10 " ADDR ,Start address for non-cacheable region 1"
|
|
line.long 0x1C "NCR1END,Flash Cache Noncachable Region 1 End"
|
|
hexmask.long.word 0x1C 4.--19. 0x10 " ADDR ,End address for non-cacheable region 1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CACHEMODE,Flash Cache Mode Register"
|
|
bitfld.long 0x00 5. " THROTTLE6 ,Disallow Simultaneous Data RAM reads (from 2 line hits on each bus)" "No,Yes"
|
|
bitfld.long 0x00 4. " THROTTLE5 ,Disallow Data RAM reads (from line hits) during lookup read ops" "No,Yes"
|
|
bitfld.long 0x00 3. " THROTTLE4 ,Disallow Data RAM reads (from line hits) on tag RAM fill cycles" "No,Yes"
|
|
bitfld.long 0x00 2. " THROTTLE3 ,Disallow cache data RAM writes on data RAM read cycles" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " THROTTLE2 ,Disallow cache data RAM writes on tag RAM read cycles" "No,Yes"
|
|
bitfld.long 0x00 0. " THROTTLE1 ,Disallow cache data RAM writes on tag RAM fill cycles" "No,Yes"
|
|
rgroup.long 0x40++0x1F
|
|
line.long 0x00 "DMON0,Data Cache Total Accesses"
|
|
line.long 0x04 "DMON1,Data Cache Tag Lookups"
|
|
line.long 0x08 "DMON2,Data Cache Hits"
|
|
line.long 0x0C "DMON3,Data Cache Line Hits"
|
|
line.long 0x10 "IMON0,Instruction Cache Total Accesses"
|
|
line.long 0x14 "IMON1,Instruction Cache Tag Lookups"
|
|
line.long 0x18 "IMON2,Instruction Cache Hits"
|
|
line.long 0x1C "IMON3,Instruction Cache Line Hits"
|
|
width 0xB
|
|
tree.end
|
|
tree "FLASHCTRL (Flash Memory Controller)"
|
|
base ad:0x40014000
|
|
width 13.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS,Flash Controller Status Register"
|
|
bitfld.long 0x00 3. " INFOCMDEN ,Information Space Command Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WRITERDY ,Write Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 1. " ADDRERROR ,Write Address Error" "No error,Error"
|
|
bitfld.long 0x00 0. " BUSY ,Control Busy" "Idle,Busy"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "WRADDR,Flash Controller Write Address Register"
|
|
bitfld.long 0x00 19. " INST ,Address - instance" "0,1"
|
|
hexmask.long.tbyte 0x00 0.--18. " ADDR ,Address"
|
|
wgroup.long 0x08++0x0B
|
|
line.long 0x00 "WRDATA,Flash Controller Write Data Register"
|
|
line.long 0x04 "DATACMD,Flash Controller Write Data Register"
|
|
bitfld.long 0x04 2. " PROGRAM ,Programming operation" "Terminate,Initiate"
|
|
bitfld.long 0x04 1. " MASSERASE ,Erase data of the entire Flash Data space of the given instance" "No effect,Erase"
|
|
bitfld.long 0x04 0. " PAGEERASE ,Erase data of the Flash Data word line" "No effect,Erase"
|
|
line.long 0x08 "INFOCMD,Flash Controller Information Space Command Register"
|
|
bitfld.long 0x08 2. " PROGRAM ,Programming operation" "Terminate,Initiate"
|
|
bitfld.long 0x08 1. " MASSERASE ,Erase info and data of the entire Flash Data space of the given instance" "No effect,Erase"
|
|
bitfld.long 0x08 0. " PAGEERASE ,Erase info and data of the Flash Data word line" "No effect,Erase"
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "ACCESS,Key Register for the Flash Controller Registers"
|
|
line.long 0x04 "INFO1ACCESS,Key Register for the Flash Controller Registers"
|
|
hexmask.long.tbyte 0x04 8.--31. 1. " KEY ,Key to unlock programming of INFO1 space"
|
|
rbitfld.long 0x04 7. " TESTMODE_STATUS ,Test mode status" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--5. " TESTMODE ,Flash test mode" "Disabled,,,,,,,,,,Erase Reference Cell,,,,,,,,,,,,,,,,,INFO1 enabled,?..."
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "EVENTREGEN,Flash Controller Event Registers: Enable"
|
|
bitfld.long 0x00 2. " TIMEOUT ,Operation timeout notification enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ERASECOMP ,Erase operation complete notification enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WRITECOMP ,Write operation complete notification enable" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "VENTREGSTAT,Flash Controller Event Registers: Status"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " TIMEOUT ,Operation timeout notification" "No timeout,Timeout"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ERASECOMP ,Erase operation complete notification" "Not completed,Completed"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " WRITECOMP ,Write operation complete notification" "Not completed,Completed"
|
|
width 0xB
|
|
tree.end
|
|
tree "I2C Master (I2C/SPI Master)"
|
|
tree "I2C0 Master"
|
|
base ad:0x50004000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C1 Master"
|
|
base ad:0x50005000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C2 Master"
|
|
base ad:0x50006000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C3 Master"
|
|
base ad:0x50007000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C4 Master"
|
|
base ad:0x50008000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree "I2C5 Master"
|
|
base ad:0x50009000
|
|
width 11.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "FIFO,FIFO Access Port Register"
|
|
in
|
|
rgroup.long 0x100++0x07
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 16.--23. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
else
|
|
hexmask.long.byte 0x00 16.--22. 1. " FIFOREM ,Number of bytes remaining in the FIFO"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFOSIZ ,Number of bytes currently in the FIFO"
|
|
endif
|
|
line.long 0x04 "TLNGTH,Transfer Length Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " TLNGTH ,Remaining transfer length"
|
|
group.long 0x108++0x0F
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
hexmask.long.byte 0x00 8.--14. 1. " FIFOWTHR ,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. " FIFORTHR ,FIFO read threshold"
|
|
else
|
|
bitfld.long 0x00 8.--13. " FIFOWTHR ,FIFO write threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " FIFORTHR ,FIFO read threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
line.long 0x04 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TOTPER ,Clock total count minus 1"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LOWPER ,Clock low count minus 1"
|
|
bitfld.long 0x04 12. " DIVEN ,Enable clock division by TOTPER" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " DIV3 ,Enable divide by 3" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--10. " FSEL ,Input clock frequency" "Minimal power,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,HFRC/64"
|
|
else
|
|
bitfld.long 0x04 8.--10. " FSEL ,Input clock frequency" "HFRC/64,HFRC/1,HFRC/2,HFRC/4,HFRC/8,HFRC/16,HFRC/32,?..."
|
|
endif
|
|
line.long 0x08 "CMD,Command Register"
|
|
line.long 0x0C "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x0C 0.--4. " CMDRPT ,Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. " IDLEST ,I/O state machine" "Busy,Idle"
|
|
bitfld.long 0x00 1. " CMDACT ,I/O command" "Inactive,Active"
|
|
bitfld.long 0x00 0. " ERR ,Error interrupt" "No error,Error"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration Register"
|
|
bitfld.long 0x00 31. " IFCEN ,Enable the IO Master" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 14. " RDFCPOL ,Read flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 13. " WTFCPOL ,Write flow control signal polarity" "High,Low"
|
|
bitfld.long 0x00 12. " WTFCIRQ ,Write mode flow control signal" "MISO,IRQ"
|
|
bitfld.long 0x00 10. " MOSIINV ,This bit invewrts MOSI when flow control is enabled" "NORMAL,INVERT"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RDFC ,Enable read mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WTFC ,Enable write mode flow control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " STARTRD ,Preread timing" "0 cycles,1 cycle,2 cycles,3 cycles"
|
|
bitfld.long 0x00 3. " FULLDUP ,Full duplex mode" "Half duplex,Full duplex"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2. " SPHA ,Select SPI phase" "Leading,Trailing"
|
|
bitfld.long 0x00 1. " SPOL ,Select SPI polarity" "0,1"
|
|
bitfld.long 0x00 0. " IFCSEL ,Select I/O interface" "I2C,SPI"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts Enable Register"
|
|
bitfld.long 0x00 10. " ARB ,Arbitration loss interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " STOP ,STOP command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " START ,START command interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICMD ,Illegal command interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IACC ,Illegal FIFO access interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WTLEN ,Write length mismatch interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NAK ,I2C NAK interrupt" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 3. " FOVFL ,Write FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Read FIFO underflow interrupt" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 3. " FOVFL ,Read FIFO overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,Write FIFO underflow interrupt" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " THR ,FIFO threshold interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CMDCMP ,Command complete interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts Status Register"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " ARB ,Arbitration loss interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " STOP ,STOP command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " START ,START command interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " ICMD ,Illegal command interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " IACC ,Illegal FIFO access interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WTLEN ,Write length mismatch interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " NAK ,I2C NAK interrupt" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Write FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Read FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
else
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FOVFL ,Read FIFO overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,Write FIFO underflow interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " THR ,FIFO threshold interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CMDCMP ,Command complete interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "I2C Slave (I2C/SPI Slave)"
|
|
base ad:0x50000000
|
|
width 15.
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointer"
|
|
hexmask.long.byte 0x00 8.--15. 1. " FIFOSIZ ,The number of bytes currently in the hardware FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOPTR ,Current FIFO pointer"
|
|
line.long 0x04 "FIFOCFG,FIFO Configuration"
|
|
bitfld.long 0x04 24.--29. " ROBASE ,Defines the read-only area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 8.--13. " FIFOMAX ,Maximum FIFO address in 8 byte segments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--4. " FIFOBASE ,Base address of the I/O FIFO in 8 byte segments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "FIFOTHR,FIFO Threshold Configuration"
|
|
hexmask.long.byte 0x08 0.--7. 1. " FIFOTHR ,FIFO size interrupt threshold"
|
|
line.long 0x0C "FUPD,FIFO Update Status"
|
|
rbitfld.long 0x0C 1. " IOREAD ,IO read is active" "Inactive,Active"
|
|
bitfld.long 0x0C 0. " FIFOUPD ,FIFO update is underway" "No update,Update"
|
|
line.long 0x10 "FIFOCTR,Overall FIFO Counter"
|
|
hexmask.long.word 0x10 0.--9. 1. " FIFOCTR ,Virtual FIFO byte count"
|
|
wgroup.long 0x114++0x03
|
|
line.long 0x00 "FIFOINC,Overall FIFO Counter Increment"
|
|
hexmask.long.word 0x00 0.--9. 1. " FIFOINC ,Increment the Overall FIFO Counter by this value on a write"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CFG,I/O Slave Configuration"
|
|
bitfld.long 0x00 31. " IFCEN ,IOSLAVE interface enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 8.--19. 1. " I2CADDR ,7-bit or 10-bit I2C device address"
|
|
bitfld.long 0x00 4. " STARTRD ,Cycle to initiate an I/O RAM read" "Late,Early"
|
|
bitfld.long 0x00 2. " LSB ,Transfer bit ordering" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPOL ,SPI polarity" "Polarity 0,Polarity 1"
|
|
bitfld.long 0x00 0. " IFCSEL ,I/O interface" "I2C,SPI"
|
|
rgroup.long 0x11C++0x03
|
|
line.long 0x00 "PRENC,I/O Slave Interrupt Priority Encode"
|
|
bitfld.long 0x00 0.--4. " PRENC ,Priority encode of the REGACC interrupts" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Highest"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "IOINTCTL,I/O Interrupt Control"
|
|
bitfld.long 0x00 31. " IOINTSET[7] ,Set the IOINT interrupt 7" "No effect,Set"
|
|
bitfld.long 0x00 29. " [6] ,Set the IOINT interrupt 6" "No effect,Set"
|
|
bitfld.long 0x00 28. " [5] ,Set the IOINT interrupt 5" "No effect,Set"
|
|
bitfld.long 0x00 27. " [4] ,Set the IOINT interrupt 4" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [3] ,Set the IOINT interrupt 3" "No effect,Set"
|
|
bitfld.long 0x00 25. " [2] ,Set the IOINT interrupt 2" "No effect,Set"
|
|
bitfld.long 0x00 24. " [1] ,Set the IOINT interrupt 1" "No effect,Set"
|
|
bitfld.long 0x00 23. " [0] ,Set the IOINT interrupt 0" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IOINTCLR ,Clears all of the IOINT interrupts" "No effect,Clear"
|
|
textline " "
|
|
rbitfld.long 0x00 15. " IOINT[7] ,IOINT interrupt 7 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 14. " [6] ,IOINT interrupt 6 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 13. " [5] ,Read the IOINT interrupt 5 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 12. " [4] ,Read the IOINT interrupt 4 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x00 11. " [3] ,Read the IOINT interrupt 3 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 10. " [2] ,Read the IOINT interrupt 2 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 9. " [1] ,Read the IOINT interrupt 1 status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 8. " [0] ,Read the IOINT interrupt 0 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " IOINTEN[7] ,IOINT interrupt 7 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 6. " [6] ,IOINT interrupt 6 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " [5] ,Read the IOINT interrupt 5 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " [4] ,Read the IOINT interrupt 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " [3] ,Read the IOINT interrupt 3 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " [2] ,Read the IOINT interrupt 2 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 1. " [1] ,Read the IOINT interrupt 1 enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " [0] ,Read the IOINT interrupt 0 enable" "Disabled,Enabled"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "GENADD,General Address Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GADATA ,The data supplied on the last General Address reference"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Slave Interrupts: Enable"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 9. " XCMPWR ,Transfer complete interrupt - write to register space" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " XCMPWF ,Transfer complete interrupt - write to FIFO space" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " XCMPRR ,Transfer complete interrupt - read from register space" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " XCMPRF ,Transfer complete interrupt - read from FIFO space" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " IOINTW ,I2C Interrupt Write interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GENAD ,I2C General Address interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FRDERR ,FIFO Read Error interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FUNDFL ,FIFO Underflow interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FOVFL ,FIFO Overflow interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FSIZE ,FIFO Size interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Slave Interrupts: Status"
|
|
sif (cpu()=="AMAPH1KK")
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " XCMPWR ,Transfer complete interrupt - write to register space" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " XCMPWF ,Transfer complete interrupt - write to FIFO space" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " XCMPRR ,Transfer complete interrupt - read from register space" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " XCMPRF ,Transfer complete interrupt - read from FIFO space" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " IOINTW ,I2C Interrupt Write interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " GENAD ,I2C General Address interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FRDERR ,FIFO Read Error interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FUNDFL ,FIFO Underflow interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " FOVFL ,FIFO Overflow interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " FSIZE ,FIFO Size interrupt" "No interrupt,Interrupt"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "REGACCINTEN,Register Access Interrupts: Enable"
|
|
bitfld.long 0x00 31. " REGACC[31] ,Register access interrupt 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [30] ,Register access interrupt 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " [29] ,Register access interrupt 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [28] ,Register access interrupt 28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Register access interrupt 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [26] ,Register access interrupt 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " [25] ,Register access interrupt 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [24] ,Register access interrupt 24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Register access interrupt 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [22] ,Register access interrupt 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [21] ,Register access interrupt 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [20] ,Register access interrupt 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Register access interrupt 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [18] ,Register access interrupt 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [17] ,Register access interrupt 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [16] ,Register access interrupt 16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Register access interrupt 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [14] ,Register access interrupt 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [13] ,Register access interrupt 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [12] ,Register access interrupt 12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Register access interrupt 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [10] ,Register access interrupt 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [9] ,Register access interrupt 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [8] ,Register access interrupt 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Register access interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Register access interrupt 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Register access interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Register access interrupt 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Register access interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Register access interrupt 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Register access interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Register access interrupt 0" "Disabled,Enabled"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "REGACCINTSTAT,Register Access Interrupts: Status"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " REGACC[31] ,Register access interrupt 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " [30] ,Register access interrupt 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " [29] ,Register access interrupt 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " [28] ,Register access interrupt 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " [27] ,Register access interrupt 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " [26] ,Register access interrupt 26" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " [25] ,Register access interrupt 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " [24] ,Register access interrupt 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " [23] ,Register access interrupt 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " [22] ,Register access interrupt 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " [21] ,Register access interrupt 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " [20] ,Register access interrupt 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " [19] ,Register access interrupt 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " [18] ,Register access interrupt 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " [17] ,Register access interrupt 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " [16] ,Register access interrupt 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " [15] ,Register access interrupt 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " [14] ,Register access interrupt 14" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " [13] ,Register access interrupt 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " [12] ,Register access interrupt 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " [11] ,Register access interrupt 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " [10] ,Register access interrupt 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " [9] ,Register access interrupt 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " [8] ,Register access interrupt 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " [7] ,Register access interrupt 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " [6] ,Register access interrupt 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " [5] ,Register access interrupt 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " [4] ,Register access interrupt 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " [3] ,Register access interrupt 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " [2] ,Register access interrupt 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " [1] ,Register access interrupt 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " [0] ,Register access interrupt 0" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
tree "Host Registers"
|
|
base ad:((per.l((ad:0x50000000+0x04))&0x1F)*8)
|
|
width 11.
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "HOST_IER,Host Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " FUNDFLEN ,FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RDERREN ,FIFO read access locked interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " SWINT5EN ,Software interrupt 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " SWINT5EN ,Software interrupt 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SWINT5EN ,Software interrupt 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " SWINT5EN ,Software interrupt 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " SWINT5EN ,Software interrupt 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SWINT5EN ,Software interrupt 0 enable" "Disabled,Enabled"
|
|
group.byte 0x79++0x00
|
|
line.byte 0x00 "HOST_ISR,Host Interrupt Status Register"
|
|
setclrfld.byte 0x00 7. 0x02 7. 0x01 7. " FUNDFLSTAT ,FIFO underflow interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 6. 0x02 6. 0x01 6. " RDERRSTAT ,FIFO read access locked interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 5. 0x02 5. 0x01 5. " SWINT5STAT ,Software interrupt 5 status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 4. 0x02 4. 0x01 4. " SWINT5STAT ,Software interrupt 4 status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.byte 0x00 3. 0x02 3. 0x01 3. " SWINT5STAT ,Software interrupt 3 status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 2. 0x02 2. 0x01 2. " SWINT5STAT ,Software interrupt 2 status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 1. 0x02 1. 0x01 1. " SWINT5STAT ,Software interrupt 1 status" "No interrupt,Interrupt"
|
|
setclrfld.byte 0x00 0. 0x02 0. 0x01 0. " SWINT5STAT ,Software interrupt 0 status" "No interrupt,Interrupt"
|
|
rgroup.byte 0x7C++0x01
|
|
line.byte 0x00 "FIFOCTRLO,FIFOCTR Low Byte"
|
|
line.byte 0x01 "FIFOCTRUP,FIFOCTR Upper Byte"
|
|
bitfld.byte 0x01 0.--1. " FIFOCTRUP ,Upper two bits of FIFOCTR" "0,1,2,3"
|
|
hgroup.byte 0x7F++0x00
|
|
hide.byte 0x00 "FIFO,FIFO Read Data"
|
|
in
|
|
tree.end
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "PDM (PDM Audio)"
|
|
base ad:0x50011000
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "PCFG,PDM Configuration Register"
|
|
bitfld.long 0x00 31. " LRSWAP ,Left/right channel swap" "NOSWAP,EN"
|
|
bitfld.long 0x00 27.--30. " PGARIGHT ,Right channel PGA gain" "0 db,+1.5 db,+3.0 db,+4.5 db,+6.0 db,+7.5 db,+9.0 db,+10.5 db,-12.0 db,-10.5 db,-9.0 db,-7.5 db,-6.0 db,-4.5 db,-3.0 db,-1.5 db"
|
|
bitfld.long 0x00 23.--26. " PGALEFT ,Left channel PGA gain" "0 db,+1.5 db,+3.0 db,+4.5 db,+6.0 db,+7.5 db,+9.0 db,+10.5 db,-12.0 db,-10.5 db,-9.0 db,-7.5 db,-6.0 db,-4.5 db,-3.0 db,-1.5 db"
|
|
bitfld.long 0x00 17.--18. " MCLKDIV ,PDM_CLK frequency divisor" "/1,/2,/3,/4"
|
|
textline " "
|
|
hexmask.long.byte 0x00 10.--16. 1. " SINCRATE ,SINC decimation rate"
|
|
bitfld.long 0x00 9. " ADCHPD ,High pass filter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--8. " HPCUTOFF ,High pass filter coefficients" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--4. " CYCLES ,Number of clocks during gain-setting changes" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SOFTMUTE ,Soft Mute enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PDMCORE ,Data Streaming enable" "Disabled,Enabled"
|
|
line.long 0x04 "VCFG,Voice Configuration Register"
|
|
bitfld.long 0x04 31. " IOCLKEN ,Enable the IO clock" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RSTB ,Reset the IP core" "Reset,Normal"
|
|
bitfld.long 0x04 27.--29. " PDMCLKSEL ,PDM input clock" "Disabled,12 MHz,6 MHz,3 MHz,1.5 MHz,750 KHz,375 KHz,187.5 KHz"
|
|
bitfld.long 0x04 26. " PDMCLK ,Enable the serial clock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " I2SMODE ,I2S interface enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " BCLKINV ,I2S BCLK input inversion" "Inverted,Not inverted"
|
|
bitfld.long 0x04 17. " DMICKDEL ,PDM clock sampling delay" "No delay,1 cycle"
|
|
bitfld.long 0x04 16. " SELAP ,Select PDM input clock source" "Internal,I2S"
|
|
textline " "
|
|
bitfld.long 0x04 8. " PCMPACK ,PCM data packing enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--4. " CHSET ,Set PCM channels" "Disabled,Left,Right,Stereo"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "FR,Voice Status Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " FIFOCNT ,Valid 32-bit entries currently in the FIFO"
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "FRD,FIFO Read"
|
|
in
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "FLUSH,FIFO Flush"
|
|
bitfld.long 0x00 0. " FIFOFLUSH ,FIFO FLUSH" "No effect,Flush"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FTHR,FIFO Threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIFOTHR ,FIFO interrupt threshold"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 " PDAT,PCM Data"
|
|
in
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 " PVAL,PCM Data Available"
|
|
in
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,IO Master Interrupts: Enable"
|
|
bitfld.long 0x00 2. " UNDFL ,FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " OVF ,FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " THR ,FIFO threshold interrupt enable" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,IO Master Interrupts: Status"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " UNDFL ,FIFO underflow interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OVF ,FIFO overflow interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " THR ,FIFO threshold interrupt status" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "GPIO (General Purpose IO)"
|
|
base ad:0x40010000
|
|
width 12.
|
|
if (((per.l(ad:0x40010000+0x60))&0xFFFFFFFF)==0x00000073)
|
|
group.long 0x00++0x33
|
|
line.long 0x00 "PADREGA,Pad Configuration Register A"
|
|
bitfld.long 0x00 27.--29. " PAD3FNCSEL ,Pad 3 function select" "UA0RTS,SLnCE,M1nCE4,GPIO3,MxnCELB,M2nCE0,TRIG1,I2S_WCLK"
|
|
bitfld.long 0x00 26. " PAD3STRNG ,Pad 3 drive strength" "Low,High"
|
|
bitfld.long 0x00 25. " PAD3INPEN ,Pad 3 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PAD3PULL ,Pad 3 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " PAD2FNCSEL ,Pad 2 function select" "SLWIR3,SLMOSI,UART0RX,GPIO2,MxMOSILB,M2MOSI,MxWIR3LB,M2WIR3"
|
|
bitfld.long 0x00 18. " PAD2STRNG ,Pad 2 drive strength" "Low,High"
|
|
bitfld.long 0x00 17. " PAD2INPEN ,Pad 2 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PAD2PULL ,Pad 2 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PAD1RSEL ,Pad 1 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x00 11.--13. " PAD1FNCSEL ,Pad 1 function select" "SLSDA,SLMISO,UART0TX,GPIO1,MxMISOLB,M2MISO,MxSDALB,M2SDA"
|
|
bitfld.long 0x00 10. " PAD1STRNG ,Pad 1 drive strength" "Low,High"
|
|
bitfld.long 0x00 9. " PAD1INPEN ,Pad 1 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PAD1PULL ,Pad 1 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " PAD0RSEL ,Pad 0 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x00 3.--5. " PAD0FNCSEL ,Pad 0 function select" "SLSCL,SLSCK,CLKOUT,GPIO0,MxSCKLB,M2SCK,MxSCLLB,M2SCL"
|
|
bitfld.long 0x00 2. " PAD0STRNG ,Pad 0 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PAD0INPEN ,Pad 0 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PAD0PULL ,Pad 0 pullup enable" "Disabled,Enabled"
|
|
line.long 0x04 "PADREGB,Pad Configuration Register B"
|
|
bitfld.long 0x04 27.--29. " PAD7FNCSEL ,Pad 7 function select" "M0WIR3,M0MOSI,CLKOUT,GPIO7,TRIG0,UART0TX,SLWIR3LB,M1nCE1"
|
|
bitfld.long 0x04 26. " PAD7STRNG ,Pad 7 drive strentgh" "Low,High"
|
|
bitfld.long 0x04 25. " PAD7INPEN ,Pad 7 input enable" "Disabled,Enabled"
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bitfld.long 0x04 24. " PAD7PULL ,Pad 7 pullup enable" "Disabled,Enabled"
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|
textline " "
|
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bitfld.long 0x04 22.--23. " PAD6RSEL ,Pad 6 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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bitfld.long 0x04 19.--21. " PAD6FNCSEL ,Pad 6 function select" "M0SDA,M0MISO,UA0CTS,GPIO6,SLMISOLB,M1nCE0,SLSDALB,I2S_DAT"
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|
bitfld.long 0x04 18. " PAD6STRNG ,Pad 6 drive strength" "Low,High"
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bitfld.long 0x04 17. " PAD6INPEN ,Pad 6 input enable" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x04 16. " PAD6PULL ,Pad 6 pullup enable" "Disabled,Enabled"
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bitfld.long 0x04 14.--15. " PAD5RSEL ,Pad 5 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x04 11.--13. " PAD5FNCSEL ,Pad 5 function select" "M0SCL,M0SCK,UA0RTS,GPIO5,M0SCKLB,EXTHFA,M0SCLLB,M1nCE2"
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|
bitfld.long 0x04 10. " PAD5STRNG ,Pad 5 drive strength" "Low,High"
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|
textline " "
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bitfld.long 0x04 9. " PAD5INPEN ,Pad 5 input enable" "Disabled,Enabled"
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|
bitfld.long 0x04 8. " PAD5PULL ,Pad 5 pullup enable" "Disabled,Enabled"
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bitfld.long 0x04 7. " PAD4PWRDN ,Pad 4 VSS power switch enable" "Disabled,Enabled"
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|
bitfld.long 0x04 3.--5. " PAD4FNCSEL ,Pad 4 function select" "UA0CTS,SLINT,M0nCE5,GPIO4,SLINTGP,M2nCE5,CLKOUT,32khz_XT"
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|
textline " "
|
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bitfld.long 0x04 2. " PAD4STRNG ,Pad 4 drive strength" "Low,High"
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bitfld.long 0x04 1. " PAD4INPEN ,Pad 4 input enable" "Disabled,Enabled"
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bitfld.long 0x04 0. " PAD4PULL ,Pad 4 pullup enable" "Disabled,Enabled"
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line.long 0x08 "PADREGC,Pad Configuration Register C"
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bitfld.long 0x08 27.--29. " PAD11FNCSEL ,Pad 11 function select" "ADCSE2,M0nCE0,CLKOUT,GPIO11,M2nCE7,UA1CTS,UART0RX,PDM_DATA"
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|
bitfld.long 0x08 26. " PAD11STRNG ,Pad 11 drive strentgh" "Low,High"
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bitfld.long 0x08 25. " PAD11INPEN ,Pad 11 input enable" "Disabled,Enabled"
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bitfld.long 0x08 24. " PAD11PULL ,Pad 11 pullup enable" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x08 19.--21. " PAD10FNCSEL ,Pad 10 function select" "M1WIR3,M1MOSI,M0nCE6,GPIO10,M2nCE6,UA1RTS,M4nCE4,SLWIR3LB"
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bitfld.long 0x08 18. " PAD10STRNG ,Pad 10 drive strength" "Low,High"
|
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bitfld.long 0x08 17. " PAD10INPEN ,Pad 10 input enable" "Disabled,Enabled"
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bitfld.long 0x08 16. " PAD10PULL ,Pad 10 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x08 14.--15. " PAD9RSEL ,Pad 9 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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bitfld.long 0x08 11.--13. " PAD9FNCSEL ,Pad 9 function select" "M1SDA,M1MISO,M0nCE5,GPIO9,M4nCE5,SLMISOLB,UART1RX,SLSDALB"
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bitfld.long 0x08 10. " PAD9STRNG ,Pad 9 drive strength" "Low,High"
|
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bitfld.long 0x08 9. " PAD9INPEN ,Pad 9 input enable" "Disabled,Enabled"
|
|
textline " "
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bitfld.long 0x08 8. " PAD9PULL ,Pad 9 pullup enable" "Disabled,Enabled"
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bitfld.long 0x08 6.--7. " PAD8RSEL ,Pad 8 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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bitfld.long 0x08 3.--5. " PAD8FNCSEL ,Pad 8 function select" "M1SCL,M1SCK,M0nCE4,GPIO8,M2nCE4,M1SCKLB,UART1TX,M1SCLLB"
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bitfld.long 0x08 2. " PAD8STRNG ,Pad 8 drive strength" "Low,High"
|
|
textline " "
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bitfld.long 0x08 1. " PAD8INPEN ,Pad 8 input enable" "Disabled,Enabled"
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bitfld.long 0x08 0. " PAD8PULL ,Pad 8 pullup enable" "Disabled,Enabled"
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line.long 0x0C "PADREGD,Pad Configuration Register D"
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bitfld.long 0x0C 27.--29. " PAD15FNCSEL ,Pad 15 function select" "ADCD1N,M1nCE3,UART1RX,GPIO15,M2nCE2,EXTXT,SWDIO,SWO"
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bitfld.long 0x0C 26. " PAD15STRNG ,Pad 15 drive strentgh" "Low,High"
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bitfld.long 0x0C 25. " PAD15INPEN ,Pad 15 input enable" "Disabled,Enabled"
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bitfld.long 0x0C 24. " PAD15PULL ,Pad 15 pullup enable" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x0C 19.--21. " PAD14FNCSEL ,Pad 14 function select" "ADCD1P,M1nCE2,UART1TX,GPIO14,M2nCE1,EXTHFS,SWDCK,32khz_XT"
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bitfld.long 0x0C 18. " PAD14STRNG ,Pad 14 drive strength" "Low,High"
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bitfld.long 0x0C 17. " PAD14INPEN ,Pad 14 input enable" "Disabled,Enabled"
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bitfld.long 0x0C 16. " PAD14PULL ,Pad 14 pullup enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x0C 11.--13. " PAD13FNCSEL ,Pad 13 function select" "ADCD0PSE8,M1nCE1,TCTB0,GPIO13,M2nCE3,EXTHFB,UA0RTS,UART1RX"
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bitfld.long 0x0C 10. " PAD13STRNG ,Pad 13 drive strength" "Low,High"
|
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bitfld.long 0x0C 9. " PAD13INPEN ,Pad 13 input enable" "Disabled,Enabled"
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bitfld.long 0x0C 8. " PAD13PULL ,Pad 13 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3.--5. " PAD12FNCSEL ,Pad 12 function select" "ADCD0NSE9,M1nCE0,TCTA0,GPIO12,CLKOUT,PDM_CLK,UA0CTS,UART1TX"
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bitfld.long 0x0C 2. " PAD12STRNG ,Pad 12 drive strength" "Low,High"
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bitfld.long 0x0C 1. " PAD12INPEN ,Pad 12 input enable" "Disabled,Enabled"
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bitfld.long 0x0C 0. " PAD12PULL ,Pad 12 pullup enable" "Disabled,Enabled"
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line.long 0x10 "PADREGE,Pad Configuration Register E"
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bitfld.long 0x10 27.--29. " PAD19FNCSEL ,Pad 19 function select" "CMPRF0,M0nCE3,TCTB1,GPIO19,TCTA1,ANATEST1,UART1RX,I2S_BCLK"
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bitfld.long 0x10 26. " PAD19STRNG ,Pad 19 drive strentgh" "Low,High"
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bitfld.long 0x10 25. " PAD19INPEN ,Pad 19 input enable" "Disabled,Enabled"
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bitfld.long 0x10 24. " PAD19PULL ,Pad 19 pullup enable" "Disabled,Enabled"
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|
textline " "
|
|
bitfld.long 0x10 19.--21. " PAD18FNCSEL ,Pad 18 function select" "CMPIN1,M0nCE2,TCTA1,GPIO18,M4nCE1,ANATEST2,UART1TX,32khz_XT"
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bitfld.long 0x10 18. " PAD18STRNG ,Pad 18 drive strength" "Low,High"
|
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bitfld.long 0x10 17. " PAD18INPEN ,Pad 18 input enable" "Disabled,Enabled"
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bitfld.long 0x10 16. " PAD18PULL ,Pad 18 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " PAD17FNCSEL ,Pad 17 function select" "CMPRF1,M0nCE1,TRIG1,GPIO17,M4nCE3,EXTLF,UART0RX,UA1CTS"
|
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bitfld.long 0x10 10. " PAD17STRNG ,Pad 17 drive strength" "Low,High"
|
|
bitfld.long 0x10 9. " PAD17INPEN ,Pad 17 input enable" "Disabled,Enabled"
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|
bitfld.long 0x10 8. " PAD17PULL ,Pad 17 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " PAD16FNCSEL ,Pad 16 function select" "ADCSE0,M0nCE4,TRIG0,GPIO16,M2nCE3,CMPIN0,UART0TX,UA1RTS"
|
|
bitfld.long 0x10 2. " PAD16STRNG ,Pad 16 drive strength" "Low,High"
|
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bitfld.long 0x10 1. " PAD16INPEN ,Pad 16 input enable" "Disabled,Enabled"
|
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bitfld.long 0x10 0. " PAD16PULL ,Pad 16 pullup enable" "Disabled,Enabled"
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line.long 0x14 "PADREGF,Pad Configuration Register F"
|
|
bitfld.long 0x14 27.--29. " PAD23FNCSEL ,Pad 23 function select" "UART0RX,M0nCE0,TCTB3,GPIO23,PDM_DATA,CMPOUT,TCTB1,UNDEF7"
|
|
bitfld.long 0x14 26. " PAD23STRNG ,Pad 23 drive strentgh" "Low,High"
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bitfld.long 0x14 25. " PAD23INPEN ,Pad 23 input enable" "Disabled,Enabled"
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bitfld.long 0x14 24. " PAD23PULL ,Pad 23 pullup enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x14 23. " PAD22PWRUP ,Pad 22 upper power switch enable" "Disabled,Enabled"
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bitfld.long 0x14 19.--21. " PAD22FNCSEL ,Pad 22 function select" "UART0TX,M1nCE7,TCTA3,GPIO22,PDM_CLK,UNDEF5,TCTB1,SWO"
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bitfld.long 0x14 18. " PAD22STRNG ,Pad 22 drive strength" "Low,High"
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bitfld.long 0x14 17. " PAD22INPEN ,Pad 22 input enable" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x14 16. " PAD22PULL ,Pad 22 pullup enable" "Disabled,Enabled"
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bitfld.long 0x14 11.--13. " PAD21FNCSEL ,Pad 21 function select" "SWDIO,M1nCE6,TCTB2,GPIO21,UART0RX,UART1RX,UNDEF6,UNDEF7"
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bitfld.long 0x14 10. " PAD21STRNG ,Pad 21 drive strength" "Low,High"
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bitfld.long 0x14 9. " PAD21INPEN ,Pad 21 input enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x14 8. " PAD21PULL ,Pad 21 pullup enable" "Disabled,Enabled"
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bitfld.long 0x14 3.--5. " PAD20FNCSEL ,Pad 20 function select" "SWDCK,M1nCE5,TCTA2,GPIO20,UART0TX,UART1TX,UNDEF6,UNDEF7"
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bitfld.long 0x14 2. " PAD20STRNG ,Pad 20 drive strength" "Low,High"
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bitfld.long 0x14 1. " PAD20INPEN ,Pad 20 input enable" "Disabled,Enabled"
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textline " "
|
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bitfld.long 0x14 0. " PAD20PULL ,Pad 20 pulldown enable" "Disabled,Enabled"
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line.long 0x18 "PADREGG,Pad Configuration Register G"
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bitfld.long 0x18 30.--31. " PAD27RSEL ,Pad 27 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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bitfld.long 0x18 27.--29. " PAD27FNCSEL ,Pad 27 function select" "EXTHF,M1nCE4,TCTA1,GPIO27,M2SCL,M2SCK,M2SCKLB,M2SCLLB"
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bitfld.long 0x18 26. " PAD27STRNG ,Pad 27 drive strentgh" "Low,High"
|
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bitfld.long 0x18 25. " PAD27INPEN ,Pad 27 input enable" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x18 24. " PAD27PULL ,Pad 27 pullup enable" "Disabled,Enabled"
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bitfld.long 0x18 19.--21. " PAD26FNCSEL ,Pad 26 function select" "EXTLF,M0nCE3,TCTB0,GPIO26,M2nCE0,TCTA1,M5nCE1,M3nCE0"
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bitfld.long 0x18 18. " PAD26STRNG ,Pad 26 drive strength" "Low,High"
|
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bitfld.long 0x18 17. " PAD26INPEN ,Pad 26 input enable" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x18 16. " PAD26PULL ,Pad 26 pullup enable" "Disabled,Enabled"
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bitfld.long 0x18 14.--15. " PAD25RSEL ,Pad 25 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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bitfld.long 0x18 11.--13. " PAD25FNCSEL ,Pad 25 function select" "EXTXT,M0nCE2,TCTA0,GPIO25,M2SDA,M2MISO,SLMISOLB,SLSDALB"
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bitfld.long 0x18 10. " PAD25STRNG ,Pad 25 drive strength" "Low,High"
|
|
textline " "
|
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bitfld.long 0x18 9. " PAD25INPEN ,Pad 25 input enable" "Disabled,Enabled"
|
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bitfld.long 0x18 8. " PAD25PULL ,Pad 25 pullup enable" "Disabled,Enabled"
|
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bitfld.long 0x18 3.--5. " PAD24FNCSEL ,Pad 24 function select" "M2nCE1,M0nCE1,CLKOUT,GPIO24,M5nCE0,TCTA1,I2S_BCLK,SWO"
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bitfld.long 0x18 2. " PAD24STRNG ,Pad 24 drive strength" "Low,High"
|
|
textline " "
|
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bitfld.long 0x18 1. " PAD24INPEN ,Pad 24 input enable" "Disabled,Enabled"
|
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bitfld.long 0x18 0. " PAD24PULL ,Pad 24 pullup enable" "Disabled,Enabled"
|
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line.long 0x1C "PADREGH,Pad Configuration Register H"
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bitfld.long 0x1C 27.--29. " PAD31FNCSEL ,Pad 31 function select" "ADCSE3,M0nCE4,TCTA3,GPIO31,UART0RX,TCTB1,UNDEF6,UNDEF7"
|
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bitfld.long 0x1C 26. " PAD31STRNG ,Pad 31 drive strentgh" "Low,High"
|
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bitfld.long 0x1C 25. " PAD31INPEN ,Pad 31 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 24. " PAD31PULL ,Pad 31 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 19.--21. " PAD30FNCSEL ,Pad 30 function select" "UNDEF0,M1nCE7,TCTB2,GPIO30,UART0TX,UA1RTS,UNDEF6,I2S_DAT"
|
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bitfld.long 0x1C 18. " PAD30STRNG ,Pad 30 drive strength" "Low,High"
|
|
bitfld.long 0x1C 17. " PAD30INPEN ,Pad 30 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 16. " PAD30PULL ,Pad 30 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 11.--13. " PAD29FNCSEL ,Pad 29 function select" "ADCSE1,M1nCE6,TCTA2,GPIO29,UA0CTS,UA1CTS,M4nCE0,PDM_DATA"
|
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bitfld.long 0x1C 10. " PAD29STRNG ,Pad 29 drive strength" "Low,High"
|
|
bitfld.long 0x1C 9. " PAD29INPEN ,Pad 29 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " PAD29PULL ,Pad 29 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 3.--5. " PAD28FNCSEL ,Pad 28 function select" "I2S_WCLK,M1nCE5,TCTB1,GPIO28,M2WIR3,M2MOSI,M5nCE3,SLWIR3LB"
|
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bitfld.long 0x1C 2. " PAD28STRNG ,Pad 28 drive strength" "Low,High"
|
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bitfld.long 0x1C 1. " PAD28INPEN ,Pad 28 input enable" "Disabled,Enabled"
|
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bitfld.long 0x1C 0. " PAD28PULL ,Pad 28 pullup enable" "Disabled,Enabled"
|
|
line.long 0x20 "PADREGI,Pad Configuration Register I"
|
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bitfld.long 0x20 27.--29. " PAD35FNCSEL ,Pad 35 function select" "ADCSE7,M1nCE0,UART1TX,GPIO35,M4nCE6,TCTA1,UA0RTS,M3nCE2"
|
|
bitfld.long 0x20 26. " PAD35STRNG ,Pad 35 drive strentgh" "Low,High"
|
|
bitfld.long 0x20 25. " PAD35INPEN ,Pad 35 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " PAD35PULL ,Pad 35 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 19.--21. " PAD34FNCSEL ,Pad 34 function select" "ADCSE6,M0nCE7,M2nCE3,GPIO34,CMPRF2,M3nCE1,M4nCE0,M5nCE2"
|
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bitfld.long 0x20 18. " PAD34STRNG ,Pad 34 drive strength" "Low,High"
|
|
bitfld.long 0x20 17. " PAD34INPEN ,Pad 34 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " PAD34PULL ,Pad 34 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 11.--13. " PAD33FNCSEL ,Pad 33 function select" "ADCSE5,M0nCE6,32khz_XT,GPIO33,UNDEF4,M3nCE7,TCTB1,SWO"
|
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bitfld.long 0x20 10. " PAD33STRNG ,Pad 33 drive strength" "Low,High"
|
|
bitfld.long 0x20 9. " PAD33INPEN ,Pad 33 input enable" "Disabled,Enabled"
|
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bitfld.long 0x20 8. " PAD33PULL ,Pad 33 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3.--5. " PAD32FNCSEL ,Pad 32 function select" "ADCSE4,M0nCE5,TCTB3,GPIO32,UNDEF4,TCTB1,UNDEF6,UNDEF7"
|
|
bitfld.long 0x20 2. " PAD32STRNG ,Pad 32 drive strength" "Low,High"
|
|
bitfld.long 0x20 1. " PAD32INPEN ,Pad 32 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " PAD32PULL ,Pad 32 pullup enable" "Disabled,Enabled"
|
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line.long 0x24 "PADREGJ,Pad Configuration Register J"
|
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bitfld.long 0x24 30.--31. " PAD39RSEL ,Pad 39 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x24 27.--29. " PAD39FNCSEL ,Pad 39 function select" "UART0TX,UART1TX,CLKOUT,GPIO39,M4SCL,M4SCK,M4SCKLB,M4SCLLB"
|
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bitfld.long 0x24 26. " PAD39STRNG ,Pad 39 drive strentgh" "Low,High"
|
|
bitfld.long 0x24 25. " PAD39INPEN ,Pad 39 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 24. " PAD39PULL ,Pad 39 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 19.--21. " PAD38FNCSEL ,Pad 38 function select" "TRIG3,M1nCE3,UA0CTS,GPIO38,M3WIR3,M3MOSI,M4nCE7,SLWIR3LB"
|
|
bitfld.long 0x24 18. " PAD38STRNG ,Pad 38 drive strength" "Low,High"
|
|
bitfld.long 0x24 17. " PAD38INPEN ,Pad 38 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 16. " PAD38PULL ,Pad 38 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 11.--13. " PAD37FNCSEL ,Pad 37 function select" "TRIG2,M1nCE2,UA0RTS,GPIO37,M3nCE4,M4nCE1,PDM_CLK,TCTA1"
|
|
bitfld.long 0x24 10. " PAD37STRNG ,Pad 37 drive strength" "Low,High"
|
|
bitfld.long 0x24 9. " PAD37INPEN ,Pad 37 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 8. " PAD37PULL ,Pad 37 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 3.--5. " PAD36FNCSEL ,Pad 36 function select" "TRIG1,M1nCE1,UART1RX,GPIO36,32khz_XT,M2nCE0,UA0CTS,M3nCE3"
|
|
bitfld.long 0x24 2. " PAD36STRNG ,Pad 36 drive strength" "Low,High"
|
|
bitfld.long 0x24 1. " PAD36INPEN ,Pad 36 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 0. " PAD36PULL ,Pad 36 pullup enable" "Disabled,Enabled"
|
|
line.long 0x28 "PADREGK,Pad Configuration Register K"
|
|
bitfld.long 0x28 30.--31. " PAD43RSEL ,Pad 43 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x28 27.--29. " PAD43FNCSEL ,Pad 43 function select" "M2nCE4,M0nCE1,TCTB0,GPIO43,M3SDA,M3MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x28 26. " PAD43STRNG ,Pad 43 drive strentgh" "Low,High"
|
|
bitfld.long 0x28 25. " PAD43INPEN ,Pad 43 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 24. " PAD43PULL ,Pad 43 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 22.--23. " PAD42RSEL ,Pad 42 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x28 19.--21. " PAD42FNCSEL ,Pad 42 function select" "M2nCE2,M0nCE0,TCTA0,GPIO42,M3SCL,M3SCK,M3SCKLB,M3SCLLB"
|
|
bitfld.long 0x28 18. " PAD42STRNG ,Pad 42 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x28 17. " PAD42INPEN ,Pad 42 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " PAD42PULL ,Pad 42 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 15. " PAD41PWRUP ,Pad 41 upper power switch enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 11.--13. " PAD41FNCSEL ,Pad 41 function select" "M2nCE1,CLKOUT,SWO,GPIO41,M3nCE5,M5nCE7,M4nCE2,UA0RTS"
|
|
textline " "
|
|
bitfld.long 0x28 10. " PAD41STRNG ,Pad 41 drive strength" "Low,High"
|
|
bitfld.long 0x28 9. " PAD41INPEN ,Pad 41 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " PAD41PULL ,Pad 41 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 6.--7. " PAD40RSEL ,Pad 40 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
textline " "
|
|
bitfld.long 0x28 3.--5. " PAD40FNCSEL ,Pad 40 function select" "UART0RX,UART1RX,TRIG0,GPIO40,M4SDA,M4MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x28 2. " PAD40STRNG ,Pad 40 drive strength" "Low,High"
|
|
bitfld.long 0x28 1. " PAD40INPEN ,Pad 40 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " PAD40PULL ,Pad 40 pullup enable" "Disabled,Enabled"
|
|
line.long 0x2C "PADREGL,Pad Configuration Register L"
|
|
bitfld.long 0x2C 27.--29. " PAD47FNCSEL ,Pad 47 function select" "M2nCE5,M0nCE5,TCTB2,GPIO47,M5WIR3,M5MOSI,M4nCE5,SLWIR3LB"
|
|
bitfld.long 0x2C 26. " PAD47STRNG ,Pad 47 drive strentgh" "Low,High"
|
|
bitfld.long 0x2C 25. " PAD47INPEN ,Pad 47 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 24. " PAD47PULL ,Pad 47 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 19.--21. " PAD46FNCSEL ,Pad 46 function select" "32khz_XT,M0nCE4,TCTA2,GPIO46,TCTA1,M5nCE4,M4nCE4,SWO"
|
|
bitfld.long 0x2C 18. " PAD46STRNG ,Pad 46 drive strength" "Low,High"
|
|
bitfld.long 0x2C 17. " PAD46INPEN ,Pad 46 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 16. " PAD46PULL ,Pad 46 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 11.--13. " PAD45FNCSEL ,Pad 45 function select" "UA1CTS,M0nCE3,TCTB1,GPIO45,M4nCE3,M3nCE6,M5nCE5,TCTA1"
|
|
bitfld.long 0x2C 10. " PAD45STRNG ,Pad 45 drive strength" "Low,High"
|
|
bitfld.long 0x2C 9. " PAD45INPEN ,Pad 45 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 8. " PAD45PULL ,Pad 45 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3.--5. " PAD44FNCSEL ,Pad 44 function select" "UA1RTS,M0nCE2,TCTA1,GPIO44,M4WIR3,M4MOSI,M5nCE6,SLWIR3LB"
|
|
bitfld.long 0x2C 2. " PAD44STRNG ,Pad 44 drive strength" "Low,High"
|
|
bitfld.long 0x2C 1. " PAD44INPEN ,Pad 44 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " PAD44PULL ,Pad 44 pullup enable" "Disabled,Enabled"
|
|
line.long 0x30 "PADREGM,Pad Configuration Register M"
|
|
bitfld.long 0x30 14.--15. " PAD49RSEL ,Pad 49 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x30 11.--13. " PAD49FNCSEL ,Pad 49 function select" "M2nCE7,M0nCE7,TCTB3,GPIO49,M5SDA,M5MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x30 10. " PAD49STRNG ,Pad 49 drive strength" "Low,High"
|
|
bitfld.long 0x30 9. " PAD49INPEN ,Pad 49 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 8. " PAD49PULL ,Pad 49 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6.--7. " PAD48RSEL ,Pad 48 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x30 3.--5. " PAD48FNCSEL ,Pad 48 function select" "M2nCE6,M0nCE6,TCTA3,GPIO48,M5SCL,M5SCK,M5SCKLB,M5SCLLB"
|
|
bitfld.long 0x30 2. " PAD48STRNG ,Pad 48 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x30 1. " PAD48INPEN ,Pad 48 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " PAD48PULL ,Pad 48 pullup enable" "Disabled,Enabled"
|
|
group.long 0x40++0x1B
|
|
line.long 0x00 "CFGA,GPIO Configuration Register A"
|
|
bitfld.long 0x00 31. " GPIO7INTD ,GPIO7 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 29.--30. " GPIO7OUTCFG ,GPIO7 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 28. " GPIO7INCFG ,GPIO7 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 27. " GPIO6INTD ,GPIO6 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " GPIO6OUTCFG ,GPIO6 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 24. " GPIO6INCFG ,GPIO6 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 23. " GPIO5INTD ,GPIO5 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 21.--22. " GPIO5OUTCFG ,GPIO5 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 20. " GPIO5INCFG ,GPIO5 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 19. " GPIO4INTD ,GPIO4 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 17.--18. " GPIO4OUTCFG ,GPIO4 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 16. " GPIO4INCFG ,GPIO4 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO3INTD ,GPIO3 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 13.--14. " GPIO3OUTCFG ,GPIO3 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 12. " GPIO3INCFG ,GPIO3 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 11. " GPIO2INTD ,GPIO2 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " GPIO2OUTCFG ,GPIO2 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 8. " GPIO2INCFG ,GPIO2 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 7. " GPIO1INTD ,GPIO1 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 5.--6. " GPIO1OUTCFG ,GPIO1 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPIO1INCFG ,GPIO1 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 3. " GPIO0INTD ,GPIO0 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 1.--2. " GPIO0OUTCFG ,GPIO0 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 0. " GPIO0INCFG ,GPIO0 input enable" "Read data,Always 0"
|
|
line.long 0x04 "CFGB,GPIO Configuration Register B"
|
|
bitfld.long 0x04 31. " GPIO15INTD ,GPIO15 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 29.--30. " GPIO15OUTCFG ,GPIO15 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 28. " GPIO15INCFG ,GPIO15 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 27. " GPIO14INTD ,GPIO14 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " GPIO14OUTCFG ,GPIO14 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 24. " GPIO14INCFG ,GPIO14 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 23. " GPIO13INTD ,GPIO13 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 21.--22. " GPIO13OUTCFG ,GPIO13 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x04 20. " GPIO13INCFG ,GPIO13 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 19. " GPIO12INTD ,GPIO12 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 17.--18. " GPIO12OUTCFG ,GPIO12 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 16. " GPIO12INCFG ,GPIO12 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPIO11INTD ,GPIO11 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 13.--14. " GPIO11OUTCFG ,GPIO11 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 12. " GPIO11INCFG ,GPIO11 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 11. " GPIO10INTD ,GPIO10 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x04 9.--10. " GPIO10OUTCFG ,GPIO10 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 8. " GPIO10INCFG ,GPIO10 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 7. " GPIO9INTD ,GPIO9 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 5.--6. " GPIO9OUTCFG ,GPIO9 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPIO9INCFG ,GPIO9 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 3. " GPIO8INTD ,GPIO8 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 1.--2. " GPIO8OUTCFG ,GPIO8 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 0. " GPIO8INCFG ,GPIO8 input enable" "Read data,Always 0"
|
|
line.long 0x08 "CFGC,GPIO Configuration Register C"
|
|
bitfld.long 0x08 31. " GPIO23INTD ,GPIO23 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 29.--30. " GPIO23OUTCFG ,GPIO23 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 28. " GPIO23INCFG ,GPIO23 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 27. " GPIO22INTD ,GPIO22 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x08 25.--26. " GPIO22OUTCFG ,GPIO22 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 24. " GPIO22INCFG ,GPIO22 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 23. " GPIO21INTD ,GPIO21 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 21.--22. " GPIO21OUTCFG ,GPIO21 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x08 20. " GPIO21INCFG ,GPIO21 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 19. " GPIO20INTD ,GPIO20 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 17.--18. " GPIO20OUTCFG ,GPIO20 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 16. " GPIO20INCFG ,GPIO20 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x08 15. " GPIO19INTD ,GPIO19 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 13.--14. " GPIO19OUTCFG ,GPIO19 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 12. " GPIO19INCFG ,GPIO19 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 11. " GPIO18INTD ,GPIO18 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x08 9.--10. " GPIO18OUTCFG ,GPIO18 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 8. " GPIO18INCFG ,GPIO18 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 7. " GPIO17INTD ,GPIO17 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 5.--6. " GPIO17OUTCFG ,GPIO17 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x08 4. " GPIO17INCFG ,GPIO17 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 3. " GPIO16INTD ,GPIO16 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 1.--2. " GPIO16OUTCFG ,GPIO16 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 0. " GPIO16INCFG ,GPIO16 input enable" "Read data,Always 0"
|
|
line.long 0x0C "CFGD,GPIO Configuration Register D"
|
|
bitfld.long 0x0C 31. " GPIO31INTD ,GPIO31 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 29.--30. " GPIO31OUTCFG ,GPIO31 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 28. " GPIO31INCFG ,GPIO31 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 27. " GPIO30INTD ,GPIO30 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x0C 25.--26. " GPIO30OUTCFG ,GPIO30 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 24. " GPIO30INCFG ,GPIO30 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 23. " GPIO29INTD ,GPIO29 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 21.--22. " GPIO29OUTCFG ,GPIO29 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x0C 20. " GPIO29INCFG ,GPIO29 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 19. " GPIO28INTD ,GPIO28 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 17.--18. " GPIO28OUTCFG ,GPIO28 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 16. " GPIO28INCFG ,GPIO28 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " GPIO27INTD ,GPIO27 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 13.--14. " GPIO27OUTCFG ,GPIO27 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 12. " GPIO27INCFG ,GPIO27 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 11. " GPIO26INTD ,GPIO26 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x0C 9.--10. " GPIO26OUTCFG ,GPIO26 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 8. " GPIO26INCFG ,GPIO26 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 7. " GPIO25INTD ,GPIO25 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 5.--6. " GPIO25OUTCFG ,GPIO25 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " GPIO25INCFG ,GPIO25 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 3. " GPIO24INTD ,GPIO24 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 1.--2. " GPIO24OUTCFG ,GPIO24 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 0. " GPIO24INCFG ,GPIO24 input enable" "Read data,Always 0"
|
|
line.long 0x10 "CFGE,GPIO Configuration Register E"
|
|
bitfld.long 0x10 31. " GPIO39INTD ,GPIO39 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 29.--30. " GPIO39OUTCFG ,GPIO39 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 28. " GPIO39INCFG ,GPIO39 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 27. " GPIO38INTD ,GPIO38 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x10 25.--26. " GPIO38OUTCFG ,GPIO38 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 24. " GPIO38INCFG ,GPIO38 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 23. " GPIO37INTD ,GPIO37 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 21.--22. " GPIO37OUTCFG ,GPIO37 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x10 20. " GPIO37INCFG ,GPIO37 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 19. " GPIO36INTD ,GPIO36 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 17.--18. " GPIO36OUTCFG ,GPIO36 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 16. " GPIO36INCFG ,GPIO36 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x10 15. " GPIO35INTD ,GPIO35 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 13.--14. " GPIO35OUTCFG ,GPIO35 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 12. " GPIO35INCFG ,GPIO35 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 11. " GPIO34INTD ,GPIO34 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x10 9.--10. " GPIO34OUTCFG ,GPIO34 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 8. " GPIO34INCFG ,GPIO34 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 7. " GPIO33INTD ,GPIO33 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 5.--6. " GPIO33OUTCFG ,GPIO33 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPIO33INCFG ,GPIO33 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 3. " GPIO32INTD ,GPIO32 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 1.--2. " GPIO32OUTCFG ,GPIO32 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 0. " GPIO32INCFG ,GPIO32 input enable" "Read data,Always 0"
|
|
line.long 0x14 "CFGF,GPIO Configuration Register F"
|
|
bitfld.long 0x14 31. " GPIO47INTD ,GPIO47 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 29.--30. " GPIO47OUTCFG ,GPIO47 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 28. " GPIO47INCFG ,GPIO47 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 27. " GPIO46INTD ,GPIO46 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x14 25.--26. " GPIO46OUTCFG ,GPIO46 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 24. " GPIO46INCFG ,GPIO46 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 23. " GPIO45INTD ,GPIO45 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 21.--22. " GPIO45OUTCFG ,GPIO45 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x14 20. " GPIO45INCFG ,GPIO45 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 19. " GPIO44INTD ,GPIO44 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 17.--18. " GPIO44OUTCFG ,GPIO44 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 16. " GPIO44INCFG ,GPIO44 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x14 15. " GPIO43INTD ,GPIO43 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 13.--14. " GPIO43OUTCFG ,GPIO43 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 12. " GPIO43INCFG ,GPIO43 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 11. " GPIO42INTD ,GPIO42 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x14 9.--10. " GPIO42OUTCFG ,GPIO42 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 8. " GPIO42INCFG ,GPIO42 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 7. " GPIO41INTD ,GPIO41 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 5.--6. " GPIO41OUTCFG ,GPIO41 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x14 4. " GPIO41INCFG ,GPIO41 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 3. " GPIO40INTD ,GPIO40 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 1.--2. " GPIO40OUTCFG ,GPIO40 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 0. " GPIO40INCFG ,GPIO40 input enable" "Read data,Always 0"
|
|
line.long 0x18 "CFGG,GPIO Configuration Register G"
|
|
bitfld.long 0x18 7. " GPIO49INTD ,GPIO49 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x18 5.--6. " GPIO49OUTCFG ,GPIO49 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x18 4. " GPIO49INCFG ,GPIO49 input enable" "Read data,Always 0"
|
|
bitfld.long 0x18 3. " GPIO48INTD ,GPIO48 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x18 1.--2. " GPIO48OUTCFG ,GPIO48 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x18 0. " GPIO48INCFG ,GPIO48 input enable" "Read data,Always 0"
|
|
else
|
|
rgroup.long 0x00++0x33
|
|
line.long 0x00 "PADREGA,Pad Configuration Register A"
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|
bitfld.long 0x00 27.--29. " PAD3FNCSEL ,Pad 3 function select" "UA0RTS,SLnCE,M1nCE4,GPIO3,MxnCELB,M2nCE0,TRIG1,I2S_WCLK"
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|
bitfld.long 0x00 26. " PAD3STRNG ,Pad 3 drive strength" "Low,High"
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|
bitfld.long 0x00 25. " PAD3INPEN ,Pad 3 input enable" "Disabled,Enabled"
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|
bitfld.long 0x00 24. " PAD3PULL ,Pad 3 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " PAD2FNCSEL ,Pad 2 function select" "SLWIR3,SLMOSI,UART0RX,GPIO2,MxMOSILB,M2MOSI,MxWIR3LB,M2WIR3"
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|
bitfld.long 0x00 18. " PAD2STRNG ,Pad 2 drive strength" "Low,High"
|
|
bitfld.long 0x00 17. " PAD2INPEN ,Pad 2 input enable" "Disabled,Enabled"
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|
bitfld.long 0x00 16. " PAD2PULL ,Pad 2 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " PAD1RSEL ,Pad 1 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x00 11.--13. " PAD1FNCSEL ,Pad 1 function select" "SLSDA,SLMISO,UART0TX,GPIO1,MxMISOLB,M2MISO,MxSDALB,M2SDA"
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|
bitfld.long 0x00 10. " PAD1STRNG ,Pad 1 drive strength" "Low,High"
|
|
bitfld.long 0x00 9. " PAD1INPEN ,Pad 1 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PAD1PULL ,Pad 1 pullup enable" "Disabled,Enabled"
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|
bitfld.long 0x00 6.--7. " PAD0RSEL ,Pad 0 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x00 3.--5. " PAD0FNCSEL ,Pad 0 function select" "SLSCL,SLSCK,CLKOUT,GPIO0,MxSCKLB,M2SCK,MxSCLLB,M2SCL"
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|
bitfld.long 0x00 2. " PAD0STRNG ,Pad 0 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PAD0INPEN ,Pad 0 input enable" "Disabled,Enabled"
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|
bitfld.long 0x00 0. " PAD0PULL ,Pad 0 pullup enable" "Disabled,Enabled"
|
|
line.long 0x04 "PADREGB,Pad Configuration Register B"
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|
bitfld.long 0x04 27.--29. " PAD7FNCSEL ,Pad 7 function select" "M0WIR3,M0MOSI,CLKOUT,GPIO7,TRIG0,UART0TX,SLWIR3LB,M1nCE1"
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|
bitfld.long 0x04 26. " PAD7STRNG ,Pad 7 drive strentgh" "Low,High"
|
|
bitfld.long 0x04 25. " PAD7INPEN ,Pad 7 input enable" "Disabled,Enabled"
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|
bitfld.long 0x04 24. " PAD7PULL ,Pad 7 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " PAD6RSEL ,Pad 6 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x04 19.--21. " PAD6FNCSEL ,Pad 6 function select" "M0SDA,M0MISO,UA0CTS,GPIO6,SLMISOLB,M1nCE0,SLSDALB,I2S_DAT"
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|
bitfld.long 0x04 18. " PAD6STRNG ,Pad 6 drive strength" "Low,High"
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|
bitfld.long 0x04 17. " PAD6INPEN ,Pad 6 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " PAD6PULL ,Pad 6 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14.--15. " PAD5RSEL ,Pad 5 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x04 11.--13. " PAD5FNCSEL ,Pad 5 function select" "M0SCL,M0SCK,UA0RTS,GPIO5,M0SCKLB,EXTHFA,M0SCLLB,M1nCE2"
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|
bitfld.long 0x04 10. " PAD5STRNG ,Pad 5 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PAD5INPEN ,Pad 5 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PAD5PULL ,Pad 5 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PAD4PWRDN ,Pad 4 VSS power switch enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--5. " PAD4FNCSEL ,Pad 4 function select" "UA0CTS,SLINT,M0nCE5,GPIO4,SLINTGP,M2nCE5,CLKOUT,32khz_XT"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PAD4STRNG ,Pad 4 drive strength" "Low,High"
|
|
bitfld.long 0x04 1. " PAD4INPEN ,Pad 4 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PAD4PULL ,Pad 4 pullup enable" "Disabled,Enabled"
|
|
line.long 0x08 "PADREGC,Pad Configuration Register C"
|
|
bitfld.long 0x08 27.--29. " PAD11FNCSEL ,Pad 11 function select" "ADCSE2,M0nCE0,CLKOUT,GPIO11,M2nCE7,UA1CTS,UART0RX,PDM_DATA"
|
|
bitfld.long 0x08 26. " PAD11STRNG ,Pad 11 drive strentgh" "Low,High"
|
|
bitfld.long 0x08 25. " PAD11INPEN ,Pad 11 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " PAD11PULL ,Pad 11 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19.--21. " PAD10FNCSEL ,Pad 10 function select" "M1WIR3,M1MOSI,M0nCE6,GPIO10,M2nCE6,UA1RTS,M4nCE4,SLWIR3LB"
|
|
bitfld.long 0x08 18. " PAD10STRNG ,Pad 10 drive strength" "Low,High"
|
|
bitfld.long 0x08 17. " PAD10INPEN ,Pad 10 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PAD10PULL ,Pad 10 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 14.--15. " PAD9RSEL ,Pad 9 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x08 11.--13. " PAD9FNCSEL ,Pad 9 function select" "M1SDA,M1MISO,M0nCE5,GPIO9,M4nCE5,SLMISOLB,UART1RX,SLSDALB"
|
|
bitfld.long 0x08 10. " PAD9STRNG ,Pad 9 drive strength" "Low,High"
|
|
bitfld.long 0x08 9. " PAD9INPEN ,Pad 9 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " PAD9PULL ,Pad 9 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6.--7. " PAD8RSEL ,Pad 8 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x08 3.--5. " PAD8FNCSEL ,Pad 8 function select" "M1SCL,M1SCK,M0nCE4,GPIO8,M2nCE4,M1SCKLB,UART1TX,M1SCLLB"
|
|
bitfld.long 0x08 2. " PAD8STRNG ,Pad 8 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PAD8INPEN ,Pad 8 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PAD8PULL ,Pad 8 pullup enable" "Disabled,Enabled"
|
|
line.long 0x0C "PADREGD,Pad Configuration Register D"
|
|
bitfld.long 0x0C 27.--29. " PAD15FNCSEL ,Pad 15 function select" "ADCD1N,M1nCE3,UART1RX,GPIO15,M2nCE2,EXTXT,SWDIO,SWO"
|
|
bitfld.long 0x0C 26. " PAD15STRNG ,Pad 15 drive strentgh" "Low,High"
|
|
bitfld.long 0x0C 25. " PAD15INPEN ,Pad 15 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " PAD15PULL ,Pad 15 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19.--21. " PAD14FNCSEL ,Pad 14 function select" "ADCD1P,M1nCE2,UART1TX,GPIO14,M2nCE1,EXTHFS,SWDCK,32khz_XT"
|
|
bitfld.long 0x0C 18. " PAD14STRNG ,Pad 14 drive strength" "Low,High"
|
|
bitfld.long 0x0C 17. " PAD14INPEN ,Pad 14 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " PAD14PULL ,Pad 14 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11.--13. " PAD13FNCSEL ,Pad 13 function select" "ADCD0PSE8,M1nCE1,TCTB0,GPIO13,M2nCE3,EXTHFB,UA0RTS,UART1RX"
|
|
bitfld.long 0x0C 10. " PAD13STRNG ,Pad 13 drive strength" "Low,High"
|
|
bitfld.long 0x0C 9. " PAD13INPEN ,Pad 13 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " PAD13PULL ,Pad 13 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3.--5. " PAD12FNCSEL ,Pad 12 function select" "ADCD0NSE9,M1nCE0,TCTA0,GPIO12,CLKOUT,PDM_CLK,UA0CTS,UART1TX"
|
|
bitfld.long 0x0C 2. " PAD12STRNG ,Pad 12 drive strength" "Low,High"
|
|
bitfld.long 0x0C 1. " PAD12INPEN ,Pad 12 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " PAD12PULL ,Pad 12 pullup enable" "Disabled,Enabled"
|
|
line.long 0x10 "PADREGE,Pad Configuration Register E"
|
|
bitfld.long 0x10 27.--29. " PAD19FNCSEL ,Pad 19 function select" "CMPRF0,M0nCE3,TCTB1,GPIO19,TCTA1,ANATEST1,UART1RX,I2S_BCLK"
|
|
bitfld.long 0x10 26. " PAD19STRNG ,Pad 19 drive strentgh" "Low,High"
|
|
bitfld.long 0x10 25. " PAD19INPEN ,Pad 19 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " PAD19PULL ,Pad 19 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19.--21. " PAD18FNCSEL ,Pad 18 function select" "CMPIN1,M0nCE2,TCTA1,GPIO18,M4nCE1,ANATEST2,UART1TX,32khz_XT"
|
|
bitfld.long 0x10 18. " PAD18STRNG ,Pad 18 drive strength" "Low,High"
|
|
bitfld.long 0x10 17. " PAD18INPEN ,Pad 18 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " PAD18PULL ,Pad 18 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " PAD17FNCSEL ,Pad 17 function select" "CMPRF1,M0nCE1,TRIG1,GPIO17,M4nCE3,EXTLF,UART0RX,UA1CTS"
|
|
bitfld.long 0x10 10. " PAD17STRNG ,Pad 17 drive strength" "Low,High"
|
|
bitfld.long 0x10 9. " PAD17INPEN ,Pad 17 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " PAD17PULL ,Pad 17 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " PAD16FNCSEL ,Pad 16 function select" "ADCSE0,M0nCE4,TRIG0,GPIO16,M2nCE3,CMPIN0,UART0TX,UA1RTS"
|
|
bitfld.long 0x10 2. " PAD16STRNG ,Pad 16 drive strength" "Low,High"
|
|
bitfld.long 0x10 1. " PAD16INPEN ,Pad 16 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " PAD16PULL ,Pad 16 pullup enable" "Disabled,Enabled"
|
|
line.long 0x14 "PADREGF,Pad Configuration Register F"
|
|
bitfld.long 0x14 27.--29. " PAD23FNCSEL ,Pad 23 function select" "UART0RX,M0nCE0,TCTB3,GPIO23,PDM_DATA,CMPOUT,TCTB1,UNDEF7"
|
|
bitfld.long 0x14 26. " PAD23STRNG ,Pad 23 drive strentgh" "Low,High"
|
|
bitfld.long 0x14 25. " PAD23INPEN ,Pad 23 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " PAD23PULL ,Pad 23 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 23. " PAD22PWRUP ,Pad 22 upper power switch enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 19.--21. " PAD22FNCSEL ,Pad 22 function select" "UART0TX,M1nCE7,TCTA3,GPIO22,PDM_CLK,UNDEF5,TCTB1,SWO"
|
|
bitfld.long 0x14 18. " PAD22STRNG ,Pad 22 drive strength" "Low,High"
|
|
bitfld.long 0x14 17. " PAD22INPEN ,Pad 22 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 16. " PAD22PULL ,Pad 22 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 11.--13. " PAD21FNCSEL ,Pad 21 function select" "SWDIO,M1nCE6,TCTB2,GPIO21,UART0RX,UART1RX,UNDEF6,UNDEF7"
|
|
bitfld.long 0x14 10. " PAD21STRNG ,Pad 21 drive strength" "Low,High"
|
|
bitfld.long 0x14 9. " PAD21INPEN ,Pad 21 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 8. " PAD21PULL ,Pad 21 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 3.--5. " PAD20FNCSEL ,Pad 20 function select" "SWDCK,M1nCE5,TCTA2,GPIO20,UART0TX,UART1TX,UNDEF6,UNDEF7"
|
|
bitfld.long 0x14 2. " PAD20STRNG ,Pad 20 drive strength" "Low,High"
|
|
bitfld.long 0x14 1. " PAD20INPEN ,Pad 20 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 0. " PAD20PULL ,Pad 20 pulldown enable" "Disabled,Enabled"
|
|
line.long 0x18 "PADREGG,Pad Configuration Register G"
|
|
bitfld.long 0x18 30.--31. " PAD27RSEL ,Pad 27 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x18 27.--29. " PAD27FNCSEL ,Pad 27 function select" "EXTHF,M1nCE4,TCTA1,GPIO27,M2SCL,M2SCK,M2SCKLB,M2SCLLB"
|
|
bitfld.long 0x18 26. " PAD27STRNG ,Pad 27 drive strentgh" "Low,High"
|
|
bitfld.long 0x18 25. " PAD27INPEN ,Pad 27 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 24. " PAD27PULL ,Pad 27 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 19.--21. " PAD26FNCSEL ,Pad 26 function select" "EXTLF,M0nCE3,TCTB0,GPIO26,M2nCE0,TCTA1,M5nCE1,M3nCE0"
|
|
bitfld.long 0x18 18. " PAD26STRNG ,Pad 26 drive strength" "Low,High"
|
|
bitfld.long 0x18 17. " PAD26INPEN ,Pad 26 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 16. " PAD26PULL ,Pad 26 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14.--15. " PAD25RSEL ,Pad 25 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x18 11.--13. " PAD25FNCSEL ,Pad 25 function select" "EXTXT,M0nCE2,TCTA0,GPIO25,M2SDA,M2MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x18 10. " PAD25STRNG ,Pad 25 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 9. " PAD25INPEN ,Pad 25 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PAD25PULL ,Pad 25 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3.--5. " PAD24FNCSEL ,Pad 24 function select" "M2nCE1,M0nCE1,CLKOUT,GPIO24,M5nCE0,TCTA1,I2S_BCLK,SWO"
|
|
bitfld.long 0x18 2. " PAD24STRNG ,Pad 24 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x18 1. " PAD24INPEN ,Pad 24 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " PAD24PULL ,Pad 24 pullup enable" "Disabled,Enabled"
|
|
line.long 0x1C "PADREGH,Pad Configuration Register H"
|
|
bitfld.long 0x1C 27.--29. " PAD31FNCSEL ,Pad 31 function select" "ADCSE3,M0nCE4,TCTA3,GPIO31,UART0RX,TCTB1,UNDEF6,UNDEF7"
|
|
bitfld.long 0x1C 26. " PAD31STRNG ,Pad 31 drive strentgh" "Low,High"
|
|
bitfld.long 0x1C 25. " PAD31INPEN ,Pad 31 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 24. " PAD31PULL ,Pad 31 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 19.--21. " PAD30FNCSEL ,Pad 30 function select" "UNDEF0,M1nCE7,TCTB2,GPIO30,UART0TX,UA1RTS,UNDEF6,I2S_DAT"
|
|
bitfld.long 0x1C 18. " PAD30STRNG ,Pad 30 drive strength" "Low,High"
|
|
bitfld.long 0x1C 17. " PAD30INPEN ,Pad 30 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 16. " PAD30PULL ,Pad 30 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 11.--13. " PAD29FNCSEL ,Pad 29 function select" "ADCSE1,M1nCE6,TCTA2,GPIO29,UA0CTS,UA1CTS,M4nCE0,PDM_DATA"
|
|
bitfld.long 0x1C 10. " PAD29STRNG ,Pad 29 drive strength" "Low,High"
|
|
bitfld.long 0x1C 9. " PAD29INPEN ,Pad 29 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " PAD29PULL ,Pad 29 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 3.--5. " PAD28FNCSEL ,Pad 28 function select" "I2S_WCLK,M1nCE5,TCTB1,GPIO28,M2WIR3,M2MOSI,M5nCE3,SLWIR3LB"
|
|
bitfld.long 0x1C 2. " PAD28STRNG ,Pad 28 drive strength" "Low,High"
|
|
bitfld.long 0x1C 1. " PAD28INPEN ,Pad 28 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " PAD28PULL ,Pad 28 pullup enable" "Disabled,Enabled"
|
|
line.long 0x20 "PADREGI,Pad Configuration Register I"
|
|
bitfld.long 0x20 27.--29. " PAD35FNCSEL ,Pad 35 function select" "ADCSE7,M1nCE0,UART1TX,GPIO35,M4nCE6,TCTA1,UA0RTS,M3nCE2"
|
|
bitfld.long 0x20 26. " PAD35STRNG ,Pad 35 drive strentgh" "Low,High"
|
|
bitfld.long 0x20 25. " PAD35INPEN ,Pad 35 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " PAD35PULL ,Pad 35 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 19.--21. " PAD34FNCSEL ,Pad 34 function select" "ADCSE6,M0nCE7,M2nCE3,GPIO34,CMPRF2,M3nCE1,M4nCE0,M5nCE2"
|
|
bitfld.long 0x20 18. " PAD34STRNG ,Pad 34 drive strength" "Low,High"
|
|
bitfld.long 0x20 17. " PAD34INPEN ,Pad 34 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " PAD34PULL ,Pad 34 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 11.--13. " PAD33FNCSEL ,Pad 33 function select" "ADCSE5,M0nCE6,32khz_XT,GPIO33,UNDEF4,M3nCE7,TCTB1,SWO"
|
|
bitfld.long 0x20 10. " PAD33STRNG ,Pad 33 drive strength" "Low,High"
|
|
bitfld.long 0x20 9. " PAD33INPEN ,Pad 33 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " PAD33PULL ,Pad 33 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 3.--5. " PAD32FNCSEL ,Pad 32 function select" "ADCSE4,M0nCE5,TCTB3,GPIO32,UNDEF4,TCTB1,UNDEF6,UNDEF7"
|
|
bitfld.long 0x20 2. " PAD32STRNG ,Pad 32 drive strength" "Low,High"
|
|
bitfld.long 0x20 1. " PAD32INPEN ,Pad 32 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " PAD32PULL ,Pad 32 pullup enable" "Disabled,Enabled"
|
|
line.long 0x24 "PADREGJ,Pad Configuration Register J"
|
|
bitfld.long 0x24 30.--31. " PAD39RSEL ,Pad 39 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x24 27.--29. " PAD39FNCSEL ,Pad 39 function select" "UART0TX,UART1TX,CLKOUT,GPIO39,M4SCL,M4SCK,M4SCKLB,M4SCLLB"
|
|
bitfld.long 0x24 26. " PAD39STRNG ,Pad 39 drive strentgh" "Low,High"
|
|
bitfld.long 0x24 25. " PAD39INPEN ,Pad 39 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 24. " PAD39PULL ,Pad 39 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 19.--21. " PAD38FNCSEL ,Pad 38 function select" "TRIG3,M1nCE3,UA0CTS,GPIO38,M3WIR3,M3MOSI,M4nCE7,SLWIR3LB"
|
|
bitfld.long 0x24 18. " PAD38STRNG ,Pad 38 drive strength" "Low,High"
|
|
bitfld.long 0x24 17. " PAD38INPEN ,Pad 38 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 16. " PAD38PULL ,Pad 38 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 11.--13. " PAD37FNCSEL ,Pad 37 function select" "TRIG2,M1nCE2,UA0RTS,GPIO37,M3nCE4,M4nCE1,PDM_CLK,TCTA1"
|
|
bitfld.long 0x24 10. " PAD37STRNG ,Pad 37 drive strength" "Low,High"
|
|
bitfld.long 0x24 9. " PAD37INPEN ,Pad 37 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 8. " PAD37PULL ,Pad 37 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 3.--5. " PAD36FNCSEL ,Pad 36 function select" "TRIG1,M1nCE1,UART1RX,GPIO36,32khz_XT,M2nCE0,UA0CTS,M3nCE3"
|
|
bitfld.long 0x24 2. " PAD36STRNG ,Pad 36 drive strength" "Low,High"
|
|
bitfld.long 0x24 1. " PAD36INPEN ,Pad 36 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 0. " PAD36PULL ,Pad 36 pullup enable" "Disabled,Enabled"
|
|
line.long 0x28 "PADREGK,Pad Configuration Register K"
|
|
bitfld.long 0x28 30.--31. " PAD43RSEL ,Pad 43 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x28 27.--29. " PAD43FNCSEL ,Pad 43 function select" "M2nCE4,M0nCE1,TCTB0,GPIO43,M3SDA,M3MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x28 26. " PAD43STRNG ,Pad 43 drive strentgh" "Low,High"
|
|
bitfld.long 0x28 25. " PAD43INPEN ,Pad 43 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x28 24. " PAD43PULL ,Pad 43 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 22.--23. " PAD42RSEL ,Pad 42 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
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|
bitfld.long 0x28 19.--21. " PAD42FNCSEL ,Pad 42 function select" "M2nCE2,M0nCE0,TCTA0,GPIO42,M3SCL,M3SCK,M3SCKLB,M3SCLLB"
|
|
bitfld.long 0x28 18. " PAD42STRNG ,Pad 42 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x28 17. " PAD42INPEN ,Pad 42 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " PAD42PULL ,Pad 42 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 15. " PAD41PWRUP ,Pad 41 upper power switch enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 11.--13. " PAD41FNCSEL ,Pad 41 function select" "M2nCE1,CLKOUT,SWO,GPIO41,M3nCE5,M5nCE7,M4nCE2,UA0RTS"
|
|
textline " "
|
|
bitfld.long 0x28 10. " PAD41STRNG ,Pad 41 drive strength" "Low,High"
|
|
bitfld.long 0x28 9. " PAD41INPEN ,Pad 41 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " PAD41PULL ,Pad 41 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 6.--7. " PAD40RSEL ,Pad 40 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
textline " "
|
|
bitfld.long 0x28 3.--5. " PAD40FNCSEL ,Pad 40 function select" "UART0RX,UART1RX,TRIG0,GPIO40,M4SDA,M4MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x28 2. " PAD40STRNG ,Pad 40 drive strength" "Low,High"
|
|
bitfld.long 0x28 1. " PAD40INPEN ,Pad 40 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " PAD40PULL ,Pad 40 pullup enable" "Disabled,Enabled"
|
|
line.long 0x2C "PADREGL,Pad Configuration Register L"
|
|
bitfld.long 0x2C 27.--29. " PAD47FNCSEL ,Pad 47 function select" "M2nCE5,M0nCE5,TCTB2,GPIO47,M5WIR3,M5MOSI,M4nCE5,SLWIR3LB"
|
|
bitfld.long 0x2C 26. " PAD47STRNG ,Pad 47 drive strentgh" "Low,High"
|
|
bitfld.long 0x2C 25. " PAD47INPEN ,Pad 47 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 24. " PAD47PULL ,Pad 47 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 19.--21. " PAD46FNCSEL ,Pad 46 function select" "32khz_XT,M0nCE4,TCTA2,GPIO46,TCTA1,M5nCE4,M4nCE4,SWO"
|
|
bitfld.long 0x2C 18. " PAD46STRNG ,Pad 46 drive strength" "Low,High"
|
|
bitfld.long 0x2C 17. " PAD46INPEN ,Pad 46 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 16. " PAD46PULL ,Pad 46 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 11.--13. " PAD45FNCSEL ,Pad 45 function select" "UA1CTS,M0nCE3,TCTB1,GPIO45,M4nCE3,M3nCE6,M5nCE5,TCTA1"
|
|
bitfld.long 0x2C 10. " PAD45STRNG ,Pad 45 drive strength" "Low,High"
|
|
bitfld.long 0x2C 9. " PAD45INPEN ,Pad 45 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 8. " PAD45PULL ,Pad 45 pullup enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 3.--5. " PAD44FNCSEL ,Pad 44 function select" "UA1RTS,M0nCE2,TCTA1,GPIO44,M4WIR3,M4MOSI,M5nCE6,SLWIR3LB"
|
|
bitfld.long 0x2C 2. " PAD44STRNG ,Pad 44 drive strength" "Low,High"
|
|
bitfld.long 0x2C 1. " PAD44INPEN ,Pad 44 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " PAD44PULL ,Pad 44 pullup enable" "Disabled,Enabled"
|
|
line.long 0x30 "PADREGM,Pad Configuration Register M"
|
|
bitfld.long 0x30 14.--15. " PAD49RSEL ,Pad 49 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x30 11.--13. " PAD49FNCSEL ,Pad 49 function select" "M2nCE7,M0nCE7,TCTB3,GPIO49,M5SDA,M5MISO,SLMISOLB,SLSDALB"
|
|
bitfld.long 0x30 10. " PAD49STRNG ,Pad 49 drive strength" "Low,High"
|
|
bitfld.long 0x30 9. " PAD49INPEN ,Pad 49 input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x30 8. " PAD49PULL ,Pad 49 pullup enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 6.--7. " PAD48RSEL ,Pad 48 pullup resistor selection" "1.5 KOhms,6 KOhms,12 KOhms,24 KOhms"
|
|
bitfld.long 0x30 3.--5. " PAD48FNCSEL ,Pad 48 function select" "M2nCE6,M0nCE6,TCTA3,GPIO48,M5SCL,M5SCK,M5SCKLB,M5SCLLB"
|
|
bitfld.long 0x30 2. " PAD48STRNG ,Pad 48 drive strength" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x30 1. " PAD48INPEN ,Pad 48 input enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " PAD48PULL ,Pad 48 pullup enable" "Disabled,Enabled"
|
|
rgroup.long 0x40++0x1B
|
|
line.long 0x00 "CFGA,GPIO Configuration Register A"
|
|
bitfld.long 0x00 31. " GPIO7INTD ,GPIO7 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 29.--30. " GPIO7OUTCFG ,GPIO7 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 28. " GPIO7INCFG ,GPIO7 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 27. " GPIO6INTD ,GPIO6 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x00 25.--26. " GPIO6OUTCFG ,GPIO6 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 24. " GPIO6INCFG ,GPIO6 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 23. " GPIO5INTD ,GPIO5 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 21.--22. " GPIO5OUTCFG ,GPIO5 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 20. " GPIO5INCFG ,GPIO5 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 19. " GPIO4INTD ,GPIO4 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 17.--18. " GPIO4OUTCFG ,GPIO4 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 16. " GPIO4INCFG ,GPIO4 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO3INTD ,GPIO3 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 13.--14. " GPIO3OUTCFG ,GPIO3 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 12. " GPIO3INCFG ,GPIO3 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 11. " GPIO2INTD ,GPIO2 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " GPIO2OUTCFG ,GPIO2 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 8. " GPIO2INCFG ,GPIO2 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 7. " GPIO1INTD ,GPIO1 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 5.--6. " GPIO1OUTCFG ,GPIO1 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPIO1INCFG ,GPIO1 input enable" "Read data,Always 0"
|
|
bitfld.long 0x00 3. " GPIO0INTD ,GPIO0 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x00 1.--2. " GPIO0OUTCFG ,GPIO0 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x00 0. " GPIO0INCFG ,GPIO0 input enable" "Read data,Always 0"
|
|
line.long 0x04 "CFGB,GPIO Configuration Register B"
|
|
bitfld.long 0x04 31. " GPIO15INTD ,GPIO15 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 29.--30. " GPIO15OUTCFG ,GPIO15 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 28. " GPIO15INCFG ,GPIO15 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 27. " GPIO14INTD ,GPIO14 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x04 25.--26. " GPIO14OUTCFG ,GPIO14 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 24. " GPIO14INCFG ,GPIO14 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 23. " GPIO13INTD ,GPIO13 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 21.--22. " GPIO13OUTCFG ,GPIO13 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x04 20. " GPIO13INCFG ,GPIO13 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 19. " GPIO12INTD ,GPIO12 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 17.--18. " GPIO12OUTCFG ,GPIO12 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 16. " GPIO12INCFG ,GPIO12 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPIO11INTD ,GPIO11 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 13.--14. " GPIO11OUTCFG ,GPIO11 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 12. " GPIO11INCFG ,GPIO11 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 11. " GPIO10INTD ,GPIO10 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x04 9.--10. " GPIO10OUTCFG ,GPIO10 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 8. " GPIO10INCFG ,GPIO10 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 7. " GPIO9INTD ,GPIO9 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 5.--6. " GPIO9OUTCFG ,GPIO9 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPIO9INCFG ,GPIO9 input enable" "Read data,Always 0"
|
|
bitfld.long 0x04 3. " GPIO8INTD ,GPIO8 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x04 1.--2. " GPIO8OUTCFG ,GPIO8 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x04 0. " GPIO8INCFG ,GPIO8 input enable" "Read data,Always 0"
|
|
line.long 0x08 "CFGC,GPIO Configuration Register C"
|
|
bitfld.long 0x08 31. " GPIO23INTD ,GPIO23 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 29.--30. " GPIO23OUTCFG ,GPIO23 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 28. " GPIO23INCFG ,GPIO23 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 27. " GPIO22INTD ,GPIO22 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x08 25.--26. " GPIO22OUTCFG ,GPIO22 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 24. " GPIO22INCFG ,GPIO22 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 23. " GPIO21INTD ,GPIO21 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 21.--22. " GPIO21OUTCFG ,GPIO21 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x08 20. " GPIO21INCFG ,GPIO21 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 19. " GPIO20INTD ,GPIO20 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 17.--18. " GPIO20OUTCFG ,GPIO20 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 16. " GPIO20INCFG ,GPIO20 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x08 15. " GPIO19INTD ,GPIO19 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 13.--14. " GPIO19OUTCFG ,GPIO19 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 12. " GPIO19INCFG ,GPIO19 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 11. " GPIO18INTD ,GPIO18 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x08 9.--10. " GPIO18OUTCFG ,GPIO18 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 8. " GPIO18INCFG ,GPIO18 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 7. " GPIO17INTD ,GPIO17 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 5.--6. " GPIO17OUTCFG ,GPIO17 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x08 4. " GPIO17INCFG ,GPIO17 input enable" "Read data,Always 0"
|
|
bitfld.long 0x08 3. " GPIO16INTD ,GPIO16 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x08 1.--2. " GPIO16OUTCFG ,GPIO16 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x08 0. " GPIO16INCFG ,GPIO16 input enable" "Read data,Always 0"
|
|
line.long 0x0C "CFGD,GPIO Configuration Register D"
|
|
bitfld.long 0x0C 31. " GPIO31INTD ,GPIO31 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 29.--30. " GPIO31OUTCFG ,GPIO31 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 28. " GPIO31INCFG ,GPIO31 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 27. " GPIO30INTD ,GPIO30 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x0C 25.--26. " GPIO30OUTCFG ,GPIO30 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 24. " GPIO30INCFG ,GPIO30 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 23. " GPIO29INTD ,GPIO29 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 21.--22. " GPIO29OUTCFG ,GPIO29 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x0C 20. " GPIO29INCFG ,GPIO29 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 19. " GPIO28INTD ,GPIO28 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 17.--18. " GPIO28OUTCFG ,GPIO28 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 16. " GPIO28INCFG ,GPIO28 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " GPIO27INTD ,GPIO27 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 13.--14. " GPIO27OUTCFG ,GPIO27 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 12. " GPIO27INCFG ,GPIO27 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 11. " GPIO26INTD ,GPIO26 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x0C 9.--10. " GPIO26OUTCFG ,GPIO26 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 8. " GPIO26INCFG ,GPIO26 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 7. " GPIO25INTD ,GPIO25 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 5.--6. " GPIO25OUTCFG ,GPIO25 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " GPIO25INCFG ,GPIO25 input enable" "Read data,Always 0"
|
|
bitfld.long 0x0C 3. " GPIO24INTD ,GPIO24 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x0C 1.--2. " GPIO24OUTCFG ,GPIO24 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x0C 0. " GPIO24INCFG ,GPIO24 input enable" "Read data,Always 0"
|
|
line.long 0x10 "CFGE,GPIO Configuration Register E"
|
|
bitfld.long 0x10 31. " GPIO39INTD ,GPIO39 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 29.--30. " GPIO39OUTCFG ,GPIO39 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 28. " GPIO39INCFG ,GPIO39 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 27. " GPIO38INTD ,GPIO38 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x10 25.--26. " GPIO38OUTCFG ,GPIO38 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 24. " GPIO38INCFG ,GPIO38 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 23. " GPIO37INTD ,GPIO37 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 21.--22. " GPIO37OUTCFG ,GPIO37 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x10 20. " GPIO37INCFG ,GPIO37 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 19. " GPIO36INTD ,GPIO36 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 17.--18. " GPIO36OUTCFG ,GPIO36 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 16. " GPIO36INCFG ,GPIO36 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x10 15. " GPIO35INTD ,GPIO35 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 13.--14. " GPIO35OUTCFG ,GPIO35 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 12. " GPIO35INCFG ,GPIO35 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 11. " GPIO34INTD ,GPIO34 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x10 9.--10. " GPIO34OUTCFG ,GPIO34 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 8. " GPIO34INCFG ,GPIO34 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 7. " GPIO33INTD ,GPIO33 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 5.--6. " GPIO33OUTCFG ,GPIO33 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x10 4. " GPIO33INCFG ,GPIO33 input enable" "Read data,Always 0"
|
|
bitfld.long 0x10 3. " GPIO32INTD ,GPIO32 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x10 1.--2. " GPIO32OUTCFG ,GPIO32 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x10 0. " GPIO32INCFG ,GPIO32 input enable" "Read data,Always 0"
|
|
line.long 0x14 "CFGF,GPIO Configuration Register F"
|
|
bitfld.long 0x14 31. " GPIO47INTD ,GPIO47 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 29.--30. " GPIO47OUTCFG ,GPIO47 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 28. " GPIO47INCFG ,GPIO47 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 27. " GPIO46INTD ,GPIO46 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x14 25.--26. " GPIO46OUTCFG ,GPIO46 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 24. " GPIO46INCFG ,GPIO46 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 23. " GPIO45INTD ,GPIO45 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 21.--22. " GPIO45OUTCFG ,GPIO45 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x14 20. " GPIO45INCFG ,GPIO45 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 19. " GPIO44INTD ,GPIO44 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 17.--18. " GPIO44OUTCFG ,GPIO44 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 16. " GPIO44INCFG ,GPIO44 input enable" "Read data,Always 0"
|
|
textline " "
|
|
bitfld.long 0x14 15. " GPIO43INTD ,GPIO43 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 13.--14. " GPIO43OUTCFG ,GPIO43 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 12. " GPIO43INCFG ,GPIO43 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 11. " GPIO42INTD ,GPIO42 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x14 9.--10. " GPIO42OUTCFG ,GPIO42 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 8. " GPIO42INCFG ,GPIO42 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 7. " GPIO41INTD ,GPIO41 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 5.--6. " GPIO41OUTCFG ,GPIO41 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x14 4. " GPIO41INCFG ,GPIO41 input enable" "Read data,Always 0"
|
|
bitfld.long 0x14 3. " GPIO40INTD ,GPIO40 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x14 1.--2. " GPIO40OUTCFG ,GPIO40 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x14 0. " GPIO40INCFG ,GPIO40 input enable" "Read data,Always 0"
|
|
line.long 0x18 "CFGG,GPIO Configuration Register G"
|
|
bitfld.long 0x18 7. " GPIO49INTD ,GPIO49 interrupt direction" "Low to high,High to low"
|
|
bitfld.long 0x18 5.--6. " GPIO49OUTCFG ,GPIO49 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x18 4. " GPIO49INCFG ,GPIO49 input enable" "Read data,Always 0"
|
|
bitfld.long 0x18 3. " GPIO48INTD ,GPIO48 interrupt direction" "Low to high,High to low"
|
|
textline " "
|
|
bitfld.long 0x18 1.--2. " GPIO48OUTCFG ,GPIO48 output configuration" "Disabled,Push-pull,Open drain,Tri-state"
|
|
bitfld.long 0x18 0. " GPIO48INCFG ,GPIO48 input enable" "Read data,Always 0"
|
|
endif
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PADKEY,Key Register for all pad configuration registers"
|
|
rgroup.long 0x80++0x07
|
|
line.long 0x00 "RDA,GPIO Input Register A"
|
|
bitfld.long 0x00 31. " RD[31] ,GPIO31 read data" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,GPIO30 read data" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,GPIO29 read data" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,GPIO28 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,GPIO27 read data" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,GPIO26 read data" "Low,High"
|
|
bitfld.long 0x00 25. " [25] ,GPIO25 read data" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,GPIO24 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,GPIO23 read data" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,GPIO22 read data" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,GPIO21 read data" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,GPIO20 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,GPIO19 read data" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,GPIO18 read data" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,GPIO17 read data" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,GPIO16 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,GPIO15 read data" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,GPIO14 read data" "Low,High"
|
|
bitfld.long 0x00 13. " [13] ,GPIO13 read data" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,GPIO12 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,GPIO11 read data" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,GPIO10 read data" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,GPIO9 read data" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,GPIO8 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,GPIO7 read data" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,GPIO6 read data" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,GPIO5 read data" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,GPIO4 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,GPIO3 read data" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,GPIO2 read data" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,GPIO1 read data" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,GPIO0 read data" "Low,High"
|
|
line.long 0x04 "RDB,GPIO Input Register B"
|
|
bitfld.long 0x04 17. " RD[49] ,GPIO49 read data" "Low,High"
|
|
bitfld.long 0x04 16. " [48] ,GPIO48 read data" "Low,High"
|
|
bitfld.long 0x04 15. " [47] ,GPIO47 read data" "Low,High"
|
|
bitfld.long 0x04 14. " [46] ,GPIO46 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [45] ,GPIO45 read data" "Low,High"
|
|
bitfld.long 0x04 12. " [44] ,GPIO44 read data" "Low,High"
|
|
bitfld.long 0x04 11. " [43] ,GPIO43 read data" "Low,High"
|
|
bitfld.long 0x04 10. " [42] ,GPIO42 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 9. " [41] ,GPIO41 read data" "Low,High"
|
|
bitfld.long 0x04 8. " [40] ,GPIO40 read data" "Low,High"
|
|
bitfld.long 0x04 7. " [39] ,GPIO39 read data" "Low,High"
|
|
bitfld.long 0x04 6. " [38] ,GPIO38 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 5. " [37] ,GPIO37 read data" "Low,High"
|
|
bitfld.long 0x04 4. " [36] ,GPIO36 read data" "Low,High"
|
|
bitfld.long 0x04 3. " [35] ,GPIO35 read data" "Low,High"
|
|
bitfld.long 0x04 2. " [34] ,GPIO34 read data" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [33] ,GPIO33 read data" "Low,High"
|
|
bitfld.long 0x04 0. " [32] ,GPIO32 read data" "Low,High"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "WTA,GPIO Output Register A"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x10 31. " WT[31] ,GPIO31 write data" "Low,High"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x10 30. " [30] ,GPIO30 write data" "Low,High"
|
|
setclrfld.long 0x00 29. 0x08 29. 0x10 29. " [29] ,GPIO29 write data" "Low,High"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x10 28. " [28] ,GPIO28 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x10 27. " [27] ,GPIO27 write data" "Low,High"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x10 26. " [26] ,GPIO26 write data" "Low,High"
|
|
setclrfld.long 0x00 25. 0x08 25. 0x10 25. " [25] ,GPIO25 write data" "Low,High"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x10 24. " [24] ,GPIO24 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x10 23. " [23] ,GPIO23 write data" "Low,High"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x10 22. " [22] ,GPIO22 write data" "Low,High"
|
|
setclrfld.long 0x00 21. 0x08 21. 0x10 21. " [21] ,GPIO21 write data" "Low,High"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x10 20. " [20] ,GPIO20 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x10 19. " [19] ,GPIO19 write data" "Low,High"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x10 18. " [18] ,GPIO18 write data" "Low,High"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x10 17. " [17] ,GPIO17 write data" "Low,High"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x10 16. " [16] ,GPIO16 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x10 15. " [15] ,GPIO15 write data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x10 14. " [14] ,GPIO14 write data" "Low,High"
|
|
setclrfld.long 0x00 13. 0x08 13. 0x10 13. " [13] ,GPIO13 write data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x10 12. " [12] ,GPIO12 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x10 11. " [11] ,GPIO11 write data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x10 10. " [10] ,GPIO10 write data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x10 9. " [9] ,GPIO9 write data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x10 8. " [8] ,GPIO8 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x10 7. " [7] ,GPIO7 write data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x10 6. " [6] ,GPIO6 write data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x10 5. " [5] ,GPIO5 write data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x10 4. " [4] ,GPIO4 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x10 3. " [3] ,GPIO3 write data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x10 2. " [2] ,GPIO2 write data" "Low,High"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x10 1. " [1] ,GPIO1 write data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x10 0. " [0] ,GPIO0 write data" "Low,High"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "WTB,GPIO Output Register B"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x10 17. " WT[49] ,GPIO49 write data" "Low,High"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x10 16. " [48] ,GPIO48 write data" "Low,High"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x10 15. " [47] ,GPIO47 write data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x10 14. " [46] ,GPIO46 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x10 13. " [45] ,GPIO45 write data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x10 12. " [44] ,GPIO44 write data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x08 11. 0x10 11. " [43] ,GPIO43 write data" "Low,High"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x10 10. " [42] ,GPIO42 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x10 9. " [41] ,GPIO41 write data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x10 8. " [40] ,GPIO40 write data" "Low,High"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x10 7. " [39] ,GPIO39 write data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x10 6. " [38] ,GPIO38 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x10 5. " [37] ,GPIO37 write data" "Low,High"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x10 4. " [36] ,GPIO36 write data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x10 3. " [35] ,GPIO35 write data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x10 2. " [34] ,GPIO34 write data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x10 1. " [33] ,GPIO33 write data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x10 0. " [32] ,GPIO32 write data" "Low,High"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ENA,GPIO Enable Register A"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x14 31. " EN[31] ,GPIO31 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x14 30. " [30] ,GPIO30 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x08 29. 0x14 29. " [29] ,GPIO29 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x14 28. " [28] ,GPIO28 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x14 27. " [27] ,GPIO27 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x14 26. " [26] ,GPIO26 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x08 25. 0x14 25. " [25] ,GPIO25 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x14 24. " [24] ,GPIO24 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x14 23. " [23] ,GPIO23 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x14 22. " [22] ,GPIO22 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x08 21. 0x14 21. " [21] ,GPIO21 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x14 20. " [20] ,GPIO20 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x14 19. " [19] ,GPIO19 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x14 18. " [18] ,GPIO18 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x14 17. " [17] ,GPIO17 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x14 16. " [16] ,GPIO16 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x14 15. " [15] ,GPIO15 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x14 14. " [14] ,GPIO14 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. 0x08 13. 0x14 13. " [13] ,GPIO13 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x14 12. " [12] ,GPIO12 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x14 11. " [11] ,GPIO11 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x14 10. " [10] ,GPIO10 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x14 9. " [9] ,GPIO9 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x14 8. " [8] ,GPIO8 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x14 7. " [7] ,GPIO7 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x14 6. " [6] ,GPIO6 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x14 5. " [5] ,GPIO5 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x14 4. " [4] ,GPIO4 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x14 3. " [3] ,GPIO3 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x14 2. " [2] ,GPIO2 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x14 1. " [1] ,GPIO1 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x14 0. " [0] ,GPIO0 output enable" "Disabled,Enabled"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "ENB,GPIO Enable Register B"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x14 17. " EN[49] ,GPIO49 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x14 16. " [48] ,GPIO48 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x14 15. " [47] ,GPIO47 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x14 14. " [46] ,GPIO46 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x14 13. " [45] ,GPIO45 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x14 12. " [44] ,GPIO44 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x08 11. 0x14 11. " [43] ,GPIO43 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x14 10. " [42] ,GPIO42 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x14 9. " [41] ,GPIO41 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x14 8. " [40] ,GPIO40 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x14 7. " [39] ,GPIO39 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x14 6. " [38] ,GPIO38 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x14 5. " [37] ,GPIO37 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x14 4. " [36] ,GPIO36 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x14 3. " [35] ,GPIO35 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x14 2. " [34] ,GPIO34 output enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x14 1. " [33] ,GPIO33 output enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x14 0. " [32] ,GPIO32 output enable" "Disabled,Enabled"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "STMRCAP,STIMER Capture Control"
|
|
bitfld.long 0x00 30. " STPOL3 ,STIMER Capture 3 Polarity" "Low to high,High to low"
|
|
bitfld.long 0x00 24.--29. " STSEL3 ,STIMER Capture 3 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 22. " STPOL2 ,STIMER Capture 2 Polarity" "Low to high,High to low"
|
|
bitfld.long 0x00 16.--21. " STSEL2 ,STIMER Capture 2 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 14. " STPOL1 ,STIMER Capture 1 Polarity" "Low to high,High to low"
|
|
bitfld.long 0x00 8.--13. " STSEL1 ,STIMER Capture 1 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6. " STPOL0 ,STIMER Capture 0 Polarity" "Low to high,High to low"
|
|
bitfld.long 0x00 0.--5. " STSEL0 ,STIMER Capture 0 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "IOM0IRQ,IOM0 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM0IRQ ,IOMSTR0 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "IOM1IRQ,IOM1 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM1IRQ ,IOMSTR1 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "IOM2IRQ,IOM2 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM2IRQ ,IOMSTR2 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "IOM3IRQ,IOM3 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM3IRQ ,IOMSTR3 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "IOM4IRQ,IOM4 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM4IRQ ,IOMSTR4 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "IOM5IRQ,IOM5 Flow Control IRQ Select"
|
|
bitfld.long 0x00 0.--5. " IOM5IRQ ,IOMSTR5 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "LOOPBACK,IOM to IOS Loopback Control"
|
|
bitfld.long 0x00 0.--2. " LOOPBACK ,IOM to IOS loopback control" "IOM0,IOM1,IOM2,IOM3,IOM4,IOM5,Disabled,?..."
|
|
hgroup.long 0xDC++0x03
|
|
hide.long 0x00 "GPIOOBS,GPIO Observation Mode Sample register"
|
|
in
|
|
group.long 0xE0++0x33
|
|
line.long 0x00 "ALTPADCFGA,Alternate Pad Configuration Register 0 (Pads 0-3)"
|
|
bitfld.long 0x00 28. " PAD3_SR ,Pad 3 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PAD3_DS1 ,Pad 3 high order drive strength selection" "0,1"
|
|
bitfld.long 0x00 20. " PAD2_SR ,Pad 2 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PAD2_DS1 ,Pad 2 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PAD1_SR ,Pad 1 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PAD1_DS1 ,Pad 1 high order drive strength selection" "0,1"
|
|
bitfld.long 0x00 4. " PAD0_SR ,Pad 0 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PAD0_DS1 ,Pad 0 high order drive strength selection" "0,1"
|
|
line.long 0x04 "ALTPADCFGB,Alternate Pad Configuration Register 1 (Pads 4-7)"
|
|
bitfld.long 0x04 28. " PAD7_SR ,Pad 7 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PAD7_DS1 ,Pad 7 high order drive strength selection" "0,1"
|
|
bitfld.long 0x04 20. " PAD6_SR ,Pad 6 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PAD6_DS1 ,Pad 6 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PAD5_SR ,Pad 5 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PAD5_DS1 ,Pad 5 high order drive strength selection" "0,1"
|
|
bitfld.long 0x04 4. " PAD4_SR ,Pad 4 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PAD4_DS1 ,Pad 4 high order drive strength selection" "0,1"
|
|
line.long 0x08 "ALTPADCFGC,Alternate Pad Configuration Register 2 (Pads 8-11)"
|
|
bitfld.long 0x08 28. " PAD11_SR ,Pad 11 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " PAD11_DS1 ,Pad 11 high order drive strength selection" "0,1"
|
|
bitfld.long 0x08 20. " PAD10_SR ,Pad 10 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PAD10_DS1 ,Pad 10 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PAD9_SR ,Pad 9 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " PAD9_DS1 ,Pad 9 high order drive strength selection" "0,1"
|
|
bitfld.long 0x08 4. " PAD8_SR ,Pad 8 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PAD8_DS1 ,Pad 8 high order drive strength selection" "0,1"
|
|
line.long 0x0C "ALTPADCFGD,Alternate Pad Configuration Register 3 (Pads 12-15)"
|
|
bitfld.long 0x0C 28. " PAD15_SR ,Pad 15 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " PAD15_DS1 ,Pad 15 high order drive strength selection" "0,1"
|
|
bitfld.long 0x0C 20. " PAD14_SR ,Pad 14 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " PAD14_DS1 ,Pad 14 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " PAD13_SR ,Pad 13 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " PAD13_DS1 ,Pad 13 high order drive strength selection" "0,1"
|
|
bitfld.long 0x0C 4. " PAD12_SR ,Pad 12 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " PAD12_DS1 ,Pad 12 high order drive strength selection" "0,1"
|
|
line.long 0x10 "ALTPADCFGE,Alternate Pad Configuration Register 4 (Pads 16-19)"
|
|
bitfld.long 0x10 28. " PAD19_SR ,Pad 19 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " PAD19_DS1 ,Pad 19 high order drive strength selection" "0,1"
|
|
bitfld.long 0x10 20. " PAD18_SR ,Pad 18 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " PAD18_DS1 ,Pad 18 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PAD17_SR ,Pad 17 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " PAD17_DS1 ,Pad 17 high order drive strength selection" "0,1"
|
|
bitfld.long 0x10 4. " PAD16_SR ,Pad 16 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " PAD16_DS1 ,Pad 16 high order drive strength selection" "0,1"
|
|
line.long 0x14 "ALTPADCFGF,Alternate Pad Configuration Register 5 (Pads 20-23)"
|
|
bitfld.long 0x14 28. " PAD23_SR ,Pad 23 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x14 24. " PAD23_DS1 ,Pad 23 high order drive strength selection" "0,1"
|
|
bitfld.long 0x14 20. " PAD22_SR ,Pad 22 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " PAD22_DS1 ,Pad 22 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PAD21_SR ,Pad 21 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PAD21_DS1 ,Pad 21 high order drive strength selection" "0,1"
|
|
bitfld.long 0x14 4. " PAD20_SR ,Pad 20 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " PAD20_DS1 ,Pad 20 high order drive strength selection" "0,1"
|
|
line.long 0x18 "ALTPADCFGG,Alternate Pad Configuration Register 6 (Pads 24-27)"
|
|
bitfld.long 0x18 28. " PAD27_SR ,Pad 27 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " PAD27_DS1 ,Pad 27 high order drive strength selection" "0,1"
|
|
bitfld.long 0x18 20. " PAD26_SR ,Pad 26 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x18 16. " PAD26_DS1 ,Pad 26 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PAD25_SR ,Pad 25 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PAD25_DS1 ,Pad 25 high order drive strength selection" "0,1"
|
|
bitfld.long 0x18 4. " PAD24_SR ,Pad 24 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " PAD24_DS1 ,Pad 24 high order drive strength selection" "0,1"
|
|
line.long 0x1C "ALTPADCFGH,Alternate Pad Configuration Register 7 (Pads 28-31)"
|
|
bitfld.long 0x1C 28. " PAD31_SR ,Pad 31 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x1C 24. " PAD31_DS1 ,Pad 31 high order drive strength selection" "0,1"
|
|
bitfld.long 0x1C 20. " PAD30_SR ,Pad 30 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x1C 16. " PAD30_DS1 ,Pad 30 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x1C 12. " PAD29_SR ,Pad 29 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x1C 8. " PAD29_DS1 ,Pad 29 high order drive strength selection" "0,1"
|
|
bitfld.long 0x1C 4. " PAD28_SR ,Pad 28 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " PAD28_DS1 ,Pad 28 high order drive strength selection" "0,1"
|
|
line.long 0x20 "ALTPADCFGI,Alternate Pad Configuration Register 8 (Pads 32-35)"
|
|
bitfld.long 0x20 28. " PAD35_SR ,Pad 35 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x20 24. " PAD35_DS1 ,Pad 35 high order drive strength selection" "0,1"
|
|
bitfld.long 0x20 20. " PAD34_SR ,Pad 34 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " PAD34_DS1 ,Pad 34 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x20 12. " PAD33_SR ,Pad 33 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x20 8. " PAD33_DS1 ,Pad 33 high order drive strength selection" "0,1"
|
|
bitfld.long 0x20 4. " PAD32_SR ,Pad 32 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x20 0. " PAD32_DS1 ,Pad 32 high order drive strength selection" "0,1"
|
|
line.long 0x24 "ALTPADCFGJ,Alternate Pad Configuration Register 9 (Pads 36-39)"
|
|
bitfld.long 0x24 28. " PAD39_SR ,Pad 39 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x24 24. " PAD39_DS1 ,Pad 39 high order drive strength selection" "0,1"
|
|
bitfld.long 0x24 20. " PAD38_SR ,Pad 38 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x24 16. " PAD38_DS1 ,Pad 38 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x24 12. " PAD37_SR ,Pad 37 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x24 8. " PAD37_DS1 ,Pad 37 high order drive strength selection" "0,1"
|
|
bitfld.long 0x24 4. " PAD36_SR ,Pad 36 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x24 0. " PAD36_DS1 ,Pad 36 high order drive strength selection" "0,1"
|
|
line.long 0x28 "ALTPADCFGK,Alternate Pad Configuration Register 10 (Pads 40-43)"
|
|
bitfld.long 0x28 28. " PAD43_SR ,Pad 43 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x28 24. " PAD43_DS1 ,Pad 43 high order drive strength selection" "0,1"
|
|
bitfld.long 0x28 20. " PAD42_SR ,Pad 42 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x28 16. " PAD42_DS1 ,Pad 42 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x28 12. " PAD41_SR ,Pad 41 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x28 8. " PAD41_DS1 ,Pad 41 high order drive strength selection" "0,1"
|
|
bitfld.long 0x28 4. " PAD40_SR ,Pad 40 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x28 0. " PAD40_DS1 ,Pad 40 high order drive strength selection" "0,1"
|
|
line.long 0x2C "ALTPADCFGL,Alternate Pad Configuration Register 11 (Pads 44-47)"
|
|
bitfld.long 0x2C 28. " PAD47_SR ,Pad 47 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x2C 24. " PAD47_DS1 ,Pad 47 high order drive strength selection" "0,1"
|
|
bitfld.long 0x2C 20. " PAD46_SR ,Pad 46 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x2C 16. " PAD46_DS1 ,Pad 46 high order drive strength selection" "0,1"
|
|
textline " "
|
|
bitfld.long 0x2C 12. " PAD45_SR ,Pad 45 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x2C 8. " PAD45_DS1 ,Pad 45 high order drive strength selection" "0,1"
|
|
bitfld.long 0x2C 4. " PAD44_SR ,Pad 44 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " PAD44_DS1 ,Pad 44 high order drive strength selection" "0,1"
|
|
line.long 0x30 "ALTPADCFGM,Alternate Pad Configuration Register 12 (Pads 48-49)"
|
|
bitfld.long 0x30 12. " PAD49_SR ,Pad 49 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x30 8. " PAD49_DS1 ,Pad 49 high order drive strength selection" "0,1"
|
|
bitfld.long 0x30 4. " PAD48_SR ,Pad 48 slew rate selection" "Disabled,Enabled"
|
|
bitfld.long 0x30 0. " PAD48_DS1 ,Pad 48 high order drive strength selection" "0,1"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INT0EN,GPIO Interrupt Registers 31-0: Enable"
|
|
bitfld.long 0x00 31. " GPIO31 ,GPIO31 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " GPIO30 ,GPIO30 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " GPIO29 ,GPIO29 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " GPIO28 ,GPIO28 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPIO27 ,GPIO27 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " GPIO26 ,GPIO26 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " GPIO25 ,GPIO25 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " GPIO24 ,GPIO24 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPIO23 ,GPIO23 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " GPIO22 ,GPIO22 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " GPIO21 ,GPIO21 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " GPIO20 ,GPIO20 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPIO19 ,GPIO19 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " GPIO18 ,GPIO18interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " GPIO17 ,GPIO17 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " GPIO16 ,GPIO16 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPIO15 ,GPIO15 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " GPIO14 ,GPIO14 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " GPIO13 ,GPIO13 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " GPIO12 ,GPIO12 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPIO11 ,GPIO11 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " GPIO10 ,GPIO10 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " GPIO9 ,GPIO9 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GPIO8 ,GPIO8 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPIO7 ,GPIO7 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GPIO6 ,GPIO6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GPIO5 ,GPIO5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GPIO4 ,GPIO4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPIO3 ,GPIO3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GPIO2 ,GPIO2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GPIO1 ,GPIO1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GPIO0 ,GPIO0 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INT0STAT,GPIO Interrupt Registers 31-0: Status"
|
|
setclrfld.long 0x00 31. 0x08 31. 0x04 31. " GPIO31 ,GPIO31 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x08 30. 0x04 30. " GPIO30 ,GPIO30 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 29. 0x08 29. 0x04 29. " GPIO29 ,GPIO29 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x08 28. 0x04 28. " GPIO28 ,GPIO28 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x08 27. 0x04 27. " GPIO27 ,GPIO27 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x08 26. 0x04 26. " GPIO26 ,GPIO26 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 25. 0x08 25. 0x04 25. " GPIO25 ,GPIO25 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x08 24. 0x04 24. " GPIO24 ,GPIO24 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x08 23. 0x04 23. " GPIO23 ,GPIO23 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x08 22. 0x04 22. " GPIO22 ,GPIO22 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 21. 0x08 21. 0x04 21. " GPIO21 ,GPIO21 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x08 20. 0x04 20. " GPIO20 ,GPIO20 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x08 19. 0x04 19. " GPIO19 ,GPIO19 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x08 18. 0x04 18. " GPIO18 ,GPIO18interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " GPIO17 ,GPIO17 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " GPIO16 ,GPIO16 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " GPIO15 ,GPIO15 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " GPIO14 ,GPIO14 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " GPIO13 ,GPIO13 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " GPIO12 ,GPIO12 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " GPIO11 ,GPIO11 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " GPIO10 ,GPIO10 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " GPIO9 ,GPIO9 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " GPIO8 ,GPIO8 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " GPIO7 ,GPIO7 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " GPIO6 ,GPIO6 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " GPIO5 ,GPIO5 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " GPIO4 ,GPIO4 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " GPIO3 ,GPIO3 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " GPIO2 ,GPIO2 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " GPIO1 ,GPIO1 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " GPIO0 ,GPIO0 interrupt status" "No interrupt,Interrupt"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "INT1EN,GPIO Interrupt Registers 49-32: Enable"
|
|
bitfld.long 0x00 17. " GPIO49 ,GPIO49 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " GPIO48 ,GPIO48 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " GPIO47 ,GPIO47 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " GPIO46 ,GPIO46 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPIO45 ,GPIO45 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " GPIO44 ,GPIO44 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " GPIO43 ,GPIO43 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " GPIO42 ,GPIO42 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " GPIO41 ,GPIO41 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GPIO40 ,GPIO40 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " GPIO39 ,GPIO39 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GPIO38 ,GPIO38 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GPIO37 ,GPIO37 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GPIO36 ,GPIO36 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " GPIO35 ,GPIO35 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GPIO34 ,GPIO34 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPIO33 ,GPIO33 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GPIO32 ,GPIO32 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "INT1STAT,GPIO Interrupt Registers 49-32: Status"
|
|
setclrfld.long 0x00 17. 0x08 17. 0x04 17. " GPIO49 ,GPIO49 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x08 16. 0x04 16. " GPIO48 ,GPIO48 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " GPIO47 ,GPIO47 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " GPIO46 ,GPIO46 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " GPIO45 ,GPIO45 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " GPIO44 ,GPIO44 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " GPIO43 ,GPIO43 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " GPIO42 ,GPIO42 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " GPIO41 ,GPIO41 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " GPIO40 ,GPIO40 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " GPIO39 ,GPIO39 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " GPIO38 ,GPIO38 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " GPIO37 ,GPIO37 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " GPIO36 ,GPIO36 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " GPIO35 ,GPIO35 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " GPIO34 ,GPIO34 interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " GPIO33 ,GPIO33 interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " GPIO32 ,GPIO32 interrupt status" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "CLKGEN (Clock Generator)"
|
|
base ad:0x40004000
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "CALXT,XT Oscillator Control"
|
|
hexmask.long.word 0x00 0.--10. 1. " CALXT ,XT Oscillator calibration value"
|
|
line.long 0x04 "CALRC,RC Oscillator Control"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " CALRC ,LFRC Oscillator calibration value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "ACALCTR,Autocalibration Counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " ACALCTR ,Autocalibration Counter result"
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "OCTRL,Oscillator Control"
|
|
bitfld.long 0x00 8.--10. " ACAL ,Autocalibration control" "Disabled,,1024 s,512 s,,,XT,External"
|
|
bitfld.long 0x00 7. " OSEL ,RTC oscillator" "XT,LFRC"
|
|
bitfld.long 0x00 6. " FOS ,Oscillator switch on failure function" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " STOPRC ,Stop the LFRC Oscillator to the RTC" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STOPXT ,Stop the XT Oscillator to the RTC" "No,Yes"
|
|
line.long 0x04 "CLKOUT,CLKOUT Frequency Select"
|
|
bitfld.long 0x04 7. " CKEN ,Enable the CLKOUT signal" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0.--5. " CKSEL ,CLKOUT signal select" "LFRC,XT/2,XT/4,XT/8,XT/16,XT/32,,,,,,,,,,,RTC 1Hz,,,,,,XT/2^21,XT,CG 100Hz,HFRC,HFRC/4,HFRC/8,HFRC/16,HFRC/64,HFRC/128,HFRC/256,HFRC/512,,FLASH_CLK,LFRC/2,LFRC/32,LFRC/512,LFRC/32768,XT/256,XT/8192,XT/2^16,ULFRC/16,ULFRC/128,ULFRC 1Hz,ULFRC/4096,ULFRC/2^20,,,LFRC/2^20,,,,XTNE,XTNE/16,LFRCNE/32,,LFRCNE,?..."
|
|
else
|
|
bitfld.long 0x04 0.--5. " CKSEL ,CLKOUT signal select" "LFRC,XT/2,XT/4,XT/8,XT/16,XT/32,,,,,,,,,,,1 Hz,,,,,,XT/2^21,XT,100 Hz,HFRC,HFRC/2,HFRC/4,HFRC/8,HFRC/32,HFRC/64,HFRC/128,HFRC/256,,Flash clock,LFRC/2,LFRC/32,LFRC/512,LFRC/32768,XT/256,XT/8192,XT/2^16,ULFRC/16,ULFRC/128,ULFRC/1024,ULFRC/4096,ULFRC/2^20,HFRC/2^16,HFRC/2^24,LFRC/2^20,HFRCNE,HFRCNE/8,,XTNE,XTNE/16,LFRCNE/32,,LFRCNE,?..."
|
|
endif
|
|
sif (cpu()!="AMAPH1KK")
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "CLKKEY,Key Register for Clock Control Register"
|
|
line.long 0x04 "CCTRL,HFRC Clock Control"
|
|
bitfld.long 0x04 3. " MEMSEL ,Flash Clock divisor" "HFRC/25,HFRC/45"
|
|
bitfld.long 0x04 0.--2. " CORESEL ,Core Clock divisor" "HFRC,HFRC/2,HFRC/3,HFRC/4,HFRC/5,HFRC/6,HFRC/7,HFRC/8"
|
|
endif
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "STATUS,Clock Generator Status"
|
|
bitfld.long 0x00 1. " OSCF ,XT Oscillator is enabled but not oscillating" "No,Yes"
|
|
bitfld.long 0x00 0. " OMODE ,Current RTC oscillator" "XT,LFRC"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "HFADJ,HFRC Adjustment"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 21.--23. " HFADJ_GAIN ,Gain control for HFRC adjustment" "1,1/2,1/4,1/8,1/16,1/32,?..."
|
|
bitfld.long 0x00 20. " HFWARMUP ,XT warmup period for HFRC adjustment" "1 s,2 s"
|
|
hexmask.long.word 0x00 8.--19. 1. " HFXTADJ ,Target HFRC adjustment value"
|
|
else
|
|
bitfld.long 0x00 19. " HFWARMUP ,XT warmup period for HFRC adjustment" "1 s,2 s"
|
|
hexmask.long.word 0x00 8.--18. 1. " HFXTADJ ,Target HFRC adjustment value"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " HFADJCK ,Repeat period for HFRC adjustment" "4 s,16 s,32 s,64 s,128 s,256 s,512 s,1024 s"
|
|
bitfld.long 0x00 0. " HFADJEN ,HFRC adjustment control" "Disabled,Enabled"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "HFVAL,HFADJ readback"
|
|
hexmask.long.word 0x00 0.--10. 1. " HFTUNERB ,Current HFTUNE value"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CLOCKEN,Clock Enable Status"
|
|
sif (cpu()=="AMAPH1KK")
|
|
group.long 0x2C++0x1B
|
|
line.long 0x00 "CLOCKEN2,Clock Enable Status"
|
|
line.long 0x04 "CLOCKEN3,Clock Enable Status"
|
|
line.long 0x08 "UARTEN,UART Enable"
|
|
bitfld.long 0x08 8.--9. " UART1EN ,UART1 system clock control" "Disabled,Enabled,Reduced frequency,Low power"
|
|
bitfld.long 0x08 0.--1. " UART0EN ,UART0 system clock control" "Disabled,Enabled,Reduced frequency,Low power"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "UARTEN,UART Enable"
|
|
bitfld.long 0x00 0. " UARTEN ,UART system clock control" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTEN,CLKGEN Interrupt Register: Enable"
|
|
bitfld.long 0x00 3. " ALM ,RTC Alarm interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " OF ,XT Oscillator Fail interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ACC ,Autocalibration Complete interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACF ,Autocalibration Fail interrupt" "Disabled,Enabled"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTSTAT,CLKGEN Interrupt Register: Status"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " ALM ,RTC Alarm interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " OF ,XT Oscillator Fail interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ACC ,Autocalibration Complete interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ACF ,Autocalibration Fail interrupt" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base ad:0x40004000
|
|
width 9.
|
|
if (((per.l(ad:0x40004000+0x50))&0x21)==0x00)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CTRLOW,RTC Counters Lower"
|
|
bitfld.long 0x00 24.--29. " CTRHR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " CTRMIN ,Minutes Counter"
|
|
hexmask.long.byte 0x00 8.--14. 1. " CTRSEC ,Seconds Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CTR100 ,100ths of a second Counter"
|
|
elif (((per.l(ad:0x40004000+0x50))&0x21)==0x01)
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CTRLOW,RTC Counters Lower"
|
|
bitfld.long 0x00 24.--29. " CTRHR ,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " CTRMIN ,Minutes Counter"
|
|
hexmask.long.byte 0x00 8.--14. 1. " CTRSEC ,Seconds Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CTR100 ,100ths of a second Counter"
|
|
elif (((per.l(ad:0x40004000+0x50))&0x21)==0x20)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CTRLOW,RTC Counters Lower"
|
|
bitfld.long 0x00 29. " AM/PM ,Hours Counter (AM/PM)" "AM,PM"
|
|
bitfld.long 0x00 24.--28. " CTRHR ,Hours Counter (Hour)" ",1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " CTRMIN ,Minutes Counter"
|
|
hexmask.long.byte 0x00 8.--14. 1. " CTRSEC ,Seconds Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CTR100 ,100ths of a second Counter"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CTRLOW,RTC Counters Lower"
|
|
bitfld.long 0x00 29. " AM/PM ,Hours Counter (AM/PM)" "AM,PM"
|
|
bitfld.long 0x00 24.--28. " CTRHR ,Hours Counter (Hour)" ",1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " CTRMIN ,Minutes Counter"
|
|
hexmask.long.byte 0x00 8.--14. 1. " CTRSEC ,Seconds Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CTR100 ,100ths of a second Counter"
|
|
endif
|
|
hgroup.long 0x44++0x03
|
|
hide.long 0x00 "CTRUP,RTC Counters Upper"
|
|
in
|
|
if (((per.l(ad:0x40004000+0x50))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ALMLOW,RTC Alarms Lower"
|
|
bitfld.long 0x00 24.--29. " ALMHR ,Hours Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " ALMMIN ,Minutes Alarm"
|
|
hexmask.long.byte 0x00 8.--14. 1. " ALMSEC ,Seconds Alarm"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ALM100 ,100ths of a second Alarm"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "ALMLOW,RTC Alarms Lower"
|
|
bitfld.long 0x00 29. " AM/PM ,Hours Alarm (AM/PM)" "AM,PM"
|
|
bitfld.long 0x00 24.--28. " ALMHR ,Hours Alarm" ",1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
hexmask.long.byte 0x00 16.--22. 1. " ALMMIN ,Minutes Alarm"
|
|
hexmask.long.byte 0x00 8.--14. 1. " ALMSEC ,Seconds Alarm"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ALM100 ,100ths of a second Alarm"
|
|
endif
|
|
group.long 0x4C++0x07
|
|
line.long 0x00 "ALMUP,RTC Alarms Upper"
|
|
bitfld.long 0x00 16.--18. " ALMWKDY ,Weekdays Alarm" "0,1,2,3,4,5,6,"
|
|
bitfld.long 0x00 8.--12. " ALMMO ,Months Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,?..."
|
|
bitfld.long 0x00 0.--5. " ALMDATE ,Date Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
line.long 0x04 "RTCCTL,RTC Control Register"
|
|
bitfld.long 0x04 5. " HR1224 ,Hours Counter mode" "24 h,12 h"
|
|
bitfld.long 0x04 4. " RSTOP ,RTC input clock control" "Running,Stopped"
|
|
bitfld.long 0x04 1.--3. " RPT ,Alarm repeat interval" "Disabled,Year,Month,Week,Day,Hour,Minute,Second"
|
|
bitfld.long 0x04 0. " WRTC ,Counter write control" "Writes disabled,Writes enabled"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTEN,CLKGEN Interrupt Register: Enable"
|
|
bitfld.long 0x00 3. " ALM ,RTC Alarm interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " OF ,XT Oscillator Fail interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ACC ,Autocalibration Complete interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACF ,Autocalibration Fail interrupt" "Disabled,Enabled"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTSTAT,CLKGEN Interrupt Register: Status"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " ALM ,RTC Alarm interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " OF ,XT Oscillator Fail interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " ACC ,Autocalibration Complete interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " ACF ,Autocalibration Fail interrupt" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "CTIMER (Counter/Timer)"
|
|
base ad:0x40008000
|
|
width 9.
|
|
if (((per.l(ad:0x40008000+0x0C+0x0))&0x80000000)==0x00000000)
|
|
rgroup.long (0x00+0x0)++0x03
|
|
line.long 0x00 "TMR0,Counter/Timer Register 0"
|
|
hexmask.long.word 0x00 16.--31. 1. " CTTMRB0 ,Counter/Timer B0"
|
|
hexmask.long.word 0x00 0.--15. 1. " CTTMRA0 ,Counter/Timer A0"
|
|
else
|
|
rgroup.long (0x00+0x0)++0x03
|
|
line.long 0x00 "TMR0,Counter/Timer Register 0"
|
|
endif
|
|
group.long (0x04+0x0)++0x07
|
|
line.long 0x00 "CMPRA0,Counter/Timer A0 Compare Registers"
|
|
hexmask.long.word 0x00 16.--31. 1. " CMPR1A0 ,Counter/Timer A0 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMPR0A0 ,Counter/Timer A0 Compare Register 0"
|
|
line.long 0x04 "CMPRB0,Counter/Timer B0 Compare Registers"
|
|
hexmask.long.word 0x04 16.--31. 1. " CMPR1B0 ,Counter/Timer B0 Compare Register 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR0B0 ,Counter/Timer B0 Compare Register 0"
|
|
if (((per.l(ad:0x40008000+0x0C+0x0))&0x80000000)==0x00000000)
|
|
group.long (0x0C+0x0)++0x03
|
|
line.long 0x00 "CTRL0,Counter/Timer Control 0"
|
|
bitfld.long 0x00 31. " CTLINK0 ,Counter/Timer A0/B0 Link" "16 bit,32 bit"
|
|
textline " "
|
|
bitfld.long 0x00 29. " TMRB0PE ,Counter/Timer B0 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TMRB0POL ,Counter/Timer B0 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 27. " TMRB0CLR ,Counter/Timer B0 Clear" "Run,Clear"
|
|
bitfld.long 0x00 26. " TMRB0IE1 ,Counter/Timer B0 Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TMRB0IE0 ,Counter/Timer B0 Interrupt 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--24. " TMRB0FN ,Counter/Timer B0 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 17.--21. " TMRB0CLK ,Counter/Timer B0 Clock Select" "TMRPINB,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKB,?..."
|
|
bitfld.long 0x00 16. " TMRB0EN ,Counter/Timer B0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA0PE ,Counter/Timer A0 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA0POL ,Counter/Timer A0 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA0CLR ,Counter/Timer A0 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA0IE0 ,Counter/Timer A0 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA0IE0 ,Counter/Timer A0 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA0FN ,Counter/Timer A0 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA0CLK ,Counter/Timer A0 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA0EN ,Counter/Timer A0 Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x0C+0x0)++0x03
|
|
line.long 0x00 "CTRL0,Counter/Timer Control 0"
|
|
bitfld.long 0x00 31. " CTLINK0 ,Counter/Timer A0/B0 Link" "16 bit,32"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA0PE ,Counter/Timer A0 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA0POL ,Counter/Timer A0 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA0CLR ,Counter/Timer A0 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA0IE0 ,Counter/Timer A0 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA0IE0 ,Counter/Timer A0 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA0FN ,Counter/Timer A0 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA0CLK ,Counter/Timer A0 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA0EN ,Counter/Timer A0 Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x40008000+0x0C+0x10))&0x80000000)==0x00000000)
|
|
rgroup.long (0x00+0x10)++0x03
|
|
line.long 0x00 "TMR1,Counter/Timer Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " CTTMRB1 ,Counter/Timer B1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CTTMRA1 ,Counter/Timer A1"
|
|
else
|
|
rgroup.long (0x00+0x10)++0x03
|
|
line.long 0x00 "TMR1,Counter/Timer Register 1"
|
|
endif
|
|
group.long (0x04+0x10)++0x07
|
|
line.long 0x00 "CMPRA1,Counter/Timer A1 Compare Registers"
|
|
hexmask.long.word 0x00 16.--31. 1. " CMPR1A1 ,Counter/Timer A1 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMPR0A1 ,Counter/Timer A1 Compare Register 0"
|
|
line.long 0x04 "CMPRB1,Counter/Timer B1 Compare Registers"
|
|
hexmask.long.word 0x04 16.--31. 1. " CMPR1B1 ,Counter/Timer B1 Compare Register 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR0B1 ,Counter/Timer B1 Compare Register 0"
|
|
if (((per.l(ad:0x40008000+0x0C+0x10))&0x80000000)==0x00000000)
|
|
group.long (0x0C+0x10)++0x03
|
|
line.long 0x00 "CTRL1,Counter/Timer Control 1"
|
|
bitfld.long 0x00 31. " CTLINK1 ,Counter/Timer A1/B1 Link" "16 bit,32 bit"
|
|
textline " "
|
|
bitfld.long 0x00 29. " TMRB1PE ,Counter/Timer B1 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TMRB1POL ,Counter/Timer B1 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 27. " TMRB1CLR ,Counter/Timer B1 Clear" "Run,Clear"
|
|
bitfld.long 0x00 26. " TMRB1IE1 ,Counter/Timer B1 Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TMRB1IE0 ,Counter/Timer B1 Interrupt 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--24. " TMRB1FN ,Counter/Timer B1 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 17.--21. " TMRB1CLK ,Counter/Timer B1 Clock Select" "TMRPINB,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKB,?..."
|
|
bitfld.long 0x00 16. " TMRB1EN ,Counter/Timer B1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA1PE ,Counter/Timer A1 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA1POL ,Counter/Timer A1 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA1CLR ,Counter/Timer A1 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA1IE0 ,Counter/Timer A1 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA1IE0 ,Counter/Timer A1 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA1FN ,Counter/Timer A1 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA1CLK ,Counter/Timer A1 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA1EN ,Counter/Timer A1 Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x0C+0x10)++0x03
|
|
line.long 0x00 "CTRL1,Counter/Timer Control 1"
|
|
bitfld.long 0x00 31. " CTLINK1 ,Counter/Timer A1/B1 Link" "16 bit,32"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA1PE ,Counter/Timer A1 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA1POL ,Counter/Timer A1 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA1CLR ,Counter/Timer A1 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA1IE0 ,Counter/Timer A1 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA1IE0 ,Counter/Timer A1 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA1FN ,Counter/Timer A1 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA1CLK ,Counter/Timer A1 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA1EN ,Counter/Timer A1 Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x40008000+0x0C+0x20))&0x80000000)==0x00000000)
|
|
rgroup.long (0x00+0x20)++0x03
|
|
line.long 0x00 "TMR2,Counter/Timer Register 2"
|
|
hexmask.long.word 0x00 16.--31. 1. " CTTMRB2 ,Counter/Timer B2"
|
|
hexmask.long.word 0x00 0.--15. 1. " CTTMRA2 ,Counter/Timer A2"
|
|
else
|
|
rgroup.long (0x00+0x20)++0x03
|
|
line.long 0x00 "TMR2,Counter/Timer Register 2"
|
|
endif
|
|
group.long (0x04+0x20)++0x07
|
|
line.long 0x00 "CMPRA2,Counter/Timer A2 Compare Registers"
|
|
hexmask.long.word 0x00 16.--31. 1. " CMPR1A2 ,Counter/Timer A2 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMPR0A2 ,Counter/Timer A2 Compare Register 0"
|
|
line.long 0x04 "CMPRB2,Counter/Timer B2 Compare Registers"
|
|
hexmask.long.word 0x04 16.--31. 1. " CMPR1B2 ,Counter/Timer B2 Compare Register 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR0B2 ,Counter/Timer B2 Compare Register 0"
|
|
if (((per.l(ad:0x40008000+0x0C+0x20))&0x80000000)==0x00000000)
|
|
group.long (0x0C+0x20)++0x03
|
|
line.long 0x00 "CTRL2,Counter/Timer Control 2"
|
|
bitfld.long 0x00 31. " CTLINK2 ,Counter/Timer A2/B2 Link" "16 bit,32 bit"
|
|
textline " "
|
|
bitfld.long 0x00 29. " TMRB2PE ,Counter/Timer B2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TMRB2POL ,Counter/Timer B2 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 27. " TMRB2CLR ,Counter/Timer B2 Clear" "Run,Clear"
|
|
bitfld.long 0x00 26. " TMRB2IE1 ,Counter/Timer B2 Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TMRB2IE0 ,Counter/Timer B2 Interrupt 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--24. " TMRB2FN ,Counter/Timer B2 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 17.--21. " TMRB2CLK ,Counter/Timer B2 Clock Select" "TMRPINB,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKB,?..."
|
|
bitfld.long 0x00 16. " TMRB2EN ,Counter/Timer B2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA2PE ,Counter/Timer A2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA2POL ,Counter/Timer A2 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA2CLR ,Counter/Timer A2 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA2IE0 ,Counter/Timer A2 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA2IE0 ,Counter/Timer A2 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA2FN ,Counter/Timer A2 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA2CLK ,Counter/Timer A2 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA2EN ,Counter/Timer A2 Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x0C+0x20)++0x03
|
|
line.long 0x00 "CTRL2,Counter/Timer Control 2"
|
|
bitfld.long 0x00 31. " CTLINK2 ,Counter/Timer A2/B2 Link" "16 bit,32"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA2PE ,Counter/Timer A2 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA2POL ,Counter/Timer A2 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA2CLR ,Counter/Timer A2 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA2IE0 ,Counter/Timer A2 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA2IE0 ,Counter/Timer A2 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA2FN ,Counter/Timer A2 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA2CLK ,Counter/Timer A2 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA2EN ,Counter/Timer A2 Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x40008000+0x0C+0x30))&0x80000000)==0x00000000)
|
|
rgroup.long (0x00+0x30)++0x03
|
|
line.long 0x00 "TMR3,Counter/Timer Register 3"
|
|
hexmask.long.word 0x00 16.--31. 1. " CTTMRB3 ,Counter/Timer B3"
|
|
hexmask.long.word 0x00 0.--15. 1. " CTTMRA3 ,Counter/Timer A3"
|
|
else
|
|
rgroup.long (0x00+0x30)++0x03
|
|
line.long 0x00 "TMR3,Counter/Timer Register 3"
|
|
endif
|
|
group.long (0x04+0x30)++0x07
|
|
line.long 0x00 "CMPRA3,Counter/Timer A3 Compare Registers"
|
|
hexmask.long.word 0x00 16.--31. 1. " CMPR1A3 ,Counter/Timer A3 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMPR0A3 ,Counter/Timer A3 Compare Register 0"
|
|
line.long 0x04 "CMPRB3,Counter/Timer B3 Compare Registers"
|
|
hexmask.long.word 0x04 16.--31. 1. " CMPR1B3 ,Counter/Timer B3 Compare Register 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " CMPR0B3 ,Counter/Timer B3 Compare Register 0"
|
|
if (((per.l(ad:0x40008000+0x0C+0x30))&0x80000000)==0x00000000)
|
|
group.long (0x0C+0x30)++0x03
|
|
line.long 0x00 "CTRL3,Counter/Timer Control 3"
|
|
bitfld.long 0x00 31. " CTLINK3 ,Counter/Timer A3/B3 Link" "16 bit,32 bit"
|
|
textline " "
|
|
bitfld.long 0x00 29. " TMRB3PE ,Counter/Timer B3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " TMRB3POL ,Counter/Timer B3 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 27. " TMRB3CLR ,Counter/Timer B3 Clear" "Run,Clear"
|
|
bitfld.long 0x00 26. " TMRB3IE1 ,Counter/Timer B3 Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TMRB3IE0 ,Counter/Timer B3 Interrupt 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--24. " TMRB3FN ,Counter/Timer B3 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 17.--21. " TMRB3CLK ,Counter/Timer B3 Clock Select" "TMRPINB,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKB,?..."
|
|
bitfld.long 0x00 16. " TMRB3EN ,Counter/Timer B3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA3PE ,Counter/Timer A3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA3POL ,Counter/Timer A3 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA3CLR ,Counter/Timer A3 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA3IE0 ,Counter/Timer A3 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA3IE0 ,Counter/Timer A3 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA3FN ,Counter/Timer A3 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA3CLK ,Counter/Timer A3 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA3EN ,Counter/Timer A3 Enable" "Disabled,Enabled"
|
|
else
|
|
group.long (0x0C+0x30)++0x03
|
|
line.long 0x00 "CTRL3,Counter/Timer Control 3"
|
|
bitfld.long 0x00 31. " CTLINK3 ,Counter/Timer A3/B3 Link" "16 bit,32"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TMRA3PE ,Counter/Timer A3 Output Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TMRA3POL ,Counter/Timer A3 Output Polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 11. " TMRA3CLR ,Counter/Timer A3 Clear" "Run,Clear"
|
|
bitfld.long 0x00 10. " TMRA3IE0 ,Counter/Timer A3 Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TMRA3IE0 ,Counter/Timer A3 Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6.--8. " TMRA3FN ,Counter/Timer A3 Function Select" "Single count,Repeated count,Pulse once,Pulse continously,Continuous run,?..."
|
|
bitfld.long 0x00 1.--5. " TMRA3CLK ,Counter/Timer A3 Clock Select" "TMRPINA,HFRC,HFRC/8,HFRC/128,HFRC/512,HFRC/2048,XT,XT/2,XT/16,XT/256,LFRC/2,LFRC/32,LFRC/1024,LFRC/16K,RTC 100Hz,HCLK,BUCKA,?..."
|
|
bitfld.long 0x00 0. " TMRA3EN ,Counter/Timer A3 Enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CTMRB0C1INT ,Counter/Timer B0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " CTMRB0C0INT ,Counter/Timer B0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CTMRB1C1INT ,Counter/Timer B1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " CTMRB1C0INT ,Counter/Timer B1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x00000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x80000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x08 13. 0x04 13. " CTMRB2C1INT ,Counter/Timer B2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " CTMRB2C0INT ,Counter/Timer B2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
elif (((per.l(ad:0x40008000+0x0C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x1C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x2C))&0x80000000)==0x80000000)&&(((per.l(ad:0x40008000+0x3C))&0x80000000)==0x00000000)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 15. 0x08 15. 0x04 15. " CTMRB3C1INT ,Counter/Timer B3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " CTMRB3C0INT ,Counter/Timer B3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
else
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "C0INTEN,Counter/Timer Interrupts: Enable"
|
|
bitfld.long 0x00 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "C0INTSTAT,Counter/Timer Interrupts: Status"
|
|
setclrfld.long 0x00 14. 0x08 14. 0x04 14. " CTMRA3C1INT ,Counter/Timer A3 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CTMRA2C1INT ,Counter/Timer A2 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CTMRA1C1INT ,Counter/Timer A1 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " CTMRA0C1INT ,Counter/Timer A0 interrupt on COMPR1" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " CTMRA3C0INT ,Counter/Timer A3 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " CTMRA2C0INT ,Counter/Timer A2 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " CTMRA1C0INT ,Counter/Timer A1 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CTMRA0C0INT ,Counter/Timer A0 interrupt on COMPR0" "No interrupt,Interrupt"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "STIMER (System Timer)"
|
|
base ad:0x40008000
|
|
width 17.
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "STCFG,Configuration Register"
|
|
bitfld.long 0x00 31. " FREEZE ,Freeze the clock input to the COUNTER register" "Not frozen,Frozen"
|
|
bitfld.long 0x00 30. " CLEAR ,Clear the System Timer register" "Running,Cleared"
|
|
bitfld.long 0x00 15. " COMPARE_H_EN ,Enable compare for the SCMPR H register" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " COMPARE_G_EN ,Enable compare for the SCMPR G register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " COMPARE_F_EN ,Enable compare for the SCMPR F register" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " COMPARE_E_EN ,Enable compare for the SCMPR E register" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " COMPARE_D_EN ,Enable compare for the SCMPR D register" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " COMPARE_C_EN ,Enable compare for the SCMPR C register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " COMPARE_B_EN ,Enable compare for the SCMPR B register" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " COMPARE_A_EN ,Enable compare for the SCMPR A register" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " CLKSEL ,Selects an appropriate clock source and divider to use for the System Timer clock" "Disabled,HFRC/16,HFRC/256,XTAL,XTAL/2,XTAL/32,LFRC,CTIMER0A,CTIMER0B,?..."
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "STTMR,System Timer Count Register (Real Time Counter)"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "CAPTURE_CONTROL,Capture Control Register"
|
|
bitfld.long 0x00 3. " CAPTURE_D ,Enable capture for the capture register D" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CAPTURE_C ,Enable capture for the capture register C" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CAPTURE_B ,Enable capture for the capture register B" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CAPTURE_A ,Enable capture for the capture register A" "Disabled,Enabled"
|
|
group.long 0x110++0x1F
|
|
line.long 0x00 "SCMPR0,Compare Register A"
|
|
line.long 0x04 "SCMPR1,Compare Register B"
|
|
line.long 0x08 "SCMPR2,Compare Register C"
|
|
line.long 0x0C "SCMPR3,Compare Register D"
|
|
line.long 0x10 "SCMPR4,Compare Register E"
|
|
line.long 0x14 "SCMPR5,Compare Register F"
|
|
line.long 0x18 "SCMPR6,Compare Register G"
|
|
line.long 0x1C "SCMPR7,Compare Register H"
|
|
group.long 0x1E0++0x1B
|
|
line.long 0x00 "SCAPT0,Capture Register A"
|
|
line.long 0x04 "SCAPT1,Capture Register B"
|
|
line.long 0x08 "SCAPT2,Capture Register C"
|
|
line.long 0x0C "SCAPT3,Capture Register D"
|
|
line.long 0x10 "SNVR0,System Timer NVRAM_A Register"
|
|
line.long 0x14 "SNVR1,System Timer NVRAM_B Register"
|
|
line.long 0x18 "SNVR2,System Timer NVRAM_C Register"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "STMINTEN,STIMER Interrupt registers: Enable"
|
|
bitfld.long 0x00 12. " CAPTURED ,CAPTURE register D value grab interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " CAPTUREC ,CAPTURE register C value grab interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " CAPTUREB ,CAPTURE register B value grab interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " CAPTUREA ,CAPTURE register A value grab interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OVERFLOW ,COUNTER overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " COMPAREH ,COUNTER >= COMPARE register H interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " COMPAREG ,COUNTER >= COMPARE register G interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " COMPAREF ,COUNTER >= COMPARE register F interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " COMPAREE ,COUNTER >= COMPARE register E interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " COMPARED ,COUNTER >= COMPARE register D interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " COMPAREC ,COUNTER >= COMPARE register C interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " COMPAREB ,COUNTER >= COMPARE register B interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " COMPAREA ,COUNTER >= COMPARE register A interrupt enable" "Disabled,Enabled"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "STMINTSTAT,STIMER Interrupt registers: Status"
|
|
setclrfld.long 0x00 12. 0x08 12. 0x04 12. " CAPTURED ,CAPTURE register D value grab interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 11. 0x08 11. 0x04 11. " CAPTUREC ,CAPTURE register C value grab interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x08 10. 0x04 10. " CAPTUREB ,CAPTURE register B value grab interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 9. 0x08 9. 0x04 9. " CAPTUREA ,CAPTURE register A value grab interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x08 8. 0x04 8. " OVERFLOW ,COUNTER overflowed interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " COMPAREH ,COUNTER >= COMPARE register H interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " COMPAREG ,COUNTER >= COMPARE register G interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " COMPAREF ,COUNTER >= COMPARE register F interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " COMPAREE ,COUNTER >= COMPARE register E interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " COMPARED ,COUNTER >= COMPARE register D interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " COMPAREC ,COUNTER >= COMPARE register C interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " COMPAREB ,COUNTER >= COMPARE register B interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " COMPAREA ,COUNTER >= COMPARE register A interrupt status" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x40024000
|
|
width 9.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 24.--26. " CLKSEL ,Frequency for the WDT" "Off,128 Hz,16 Hz,1 Hz,1/16th Hz,?..."
|
|
textline " "
|
|
endif
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTVAL ,Compare value to generate a watchdog interrupt"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RESVAL ,Compare value to generate a watchdog reset"
|
|
bitfld.long 0x00 2. " RESEN ,Enable the WDT reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " INTEN ,Enable the WDT interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WDTEN ,Enable the WDT" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x07
|
|
line.long 0x00 "RSTRT,Restart the watchdog timer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RSTRT ,Restart the watchdog timer (write 0xB2)"
|
|
line.long 0x04 "LOCK,Locks the WDT"
|
|
hexmask.long.byte 0x04 0.--7. 1. " LOCK ,Lock the watchdog timer (write 0x3A)"
|
|
sif (cpu()=="AMAPH1KK")
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "COUNT,Current Counter Value for WDT"
|
|
hexmask.long.byte 0x00 0.--7. 1. " COUNT ,Read-Only current value of the WDT counter"
|
|
endif
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,WDT Interrupt register: Enable"
|
|
bitfld.long 0x00 0. " WDT ,Watchdog Timer Interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,WDT Interrupt register: Status"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " WDT ,Watchdog Timer Interrupt" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "RSTGEN (MCU Reset Generator)"
|
|
base ad:0x40000000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 1. " WDREN ,Watchdog Timer Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BODHREN ,Brown out high (2.1v) reset enable" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x07
|
|
line.long 0x00 "SWPOI,Software POI Reset"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SWPOIKEY ,0x1B generates a software POI reset"
|
|
line.long 0x04 "SWPOR,Software POR Reset"
|
|
hexmask.long.byte 0x04 0.--7. 1. " SWPORKEY ,0xD4 generates a software POR reset"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status Register"
|
|
bitfld.long 0x00 6. " WDRSTAT ,Reset was initiated by a Watchdog Timer Reset" "No reset,Reset"
|
|
bitfld.long 0x00 5. " DBGRSTAT ,Reset was a initiated by Debugger Reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " POIRSTAT ,Reset was a initiated by Software POI Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " SWRSTAT ,Reset was a initiated by SW POR or AIRCR Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BORSTAT ,Reset was initiated by a Brown-Out Reset" "No reset,Reset"
|
|
bitfld.long 0x00 1. " PORSTAT ,Reset was initiated by a Power-On Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " EXRSTAT ,Reset was initiated by an External Reset" "No reset,Reset"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "CLRSTAT,Clear the status register"
|
|
bitfld.long 0x00 0. " CLRSTAT ,Clear all bits in the STAT register" "No effect,Clear"
|
|
sif (cpu()=="AMAPH1KK")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TPIU_RST,TPIU reset"
|
|
bitfld.long 0x00 0. " TPIURST ,Static reset for the TPIU" "No reset,Reset"
|
|
endif
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Reset Interrupt register: Enable"
|
|
bitfld.long 0x00 0. " BODH ,Enables an interrupt that triggers when VCC is below BODH level" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Reset Interrupt register: Status"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " BODH ,Interrupt that triggers when VCC is below BODH level" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "UART (Serial UART)"
|
|
tree "UART0"
|
|
base ad:0x4001C000
|
|
width 6.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "DR,UART Data Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RSR,UART Status Register"
|
|
bitfld.long 0x00 3. " OESTAT ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " BESTAT ,Break error" "No error,Error"
|
|
bitfld.long 0x00 1. " PESTAT ,Parity error" "No error,Error"
|
|
bitfld.long 0x00 0. " FESTAT ,Framing error" "No error,Error"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FR,Flag Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8. " TXBUSY ,Transmit BUSY indicator" "Idle,Busy"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 8. " RI ,The ring indicator" "No,Yes"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO empty indicator" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " BUSY ,Busy" "Idle,Busy"
|
|
bitfld.long 0x00 2. " DCD ,Data carrier detect" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " DSR ,Data set ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTS ,Clear to send" "No,Yes"
|
|
group.long 0x20++0x1B
|
|
line.long 0x00 "ILPR,IrDA Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ILPDVSR ,IrDA counter divisor"
|
|
line.long 0x04 "IBRD,Integer Baud Rate Divisor"
|
|
hexmask.long.word 0x04 0.--15. 1. " DIVINT ,Baud integer divisor"
|
|
line.long 0x08 "FBRD,Fractional Baud Rate Divisor"
|
|
bitfld.long 0x08 0.--5. " DIVFRAC ,Baud fractional divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "LCRH,Line Control High"
|
|
bitfld.long 0x0C 7. " SPS ,Stick parity select" "No,Yes"
|
|
bitfld.long 0x0C 5.--6. " WLEN ,These bits hold the write length" "0,1,2,3"
|
|
bitfld.long 0x0C 4. " FEN ,FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " STP2 ,Two stop bits select" "1-bit,2-bits"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EPS ,Even parity select" "Odd,Even"
|
|
bitfld.long 0x0C 1. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " BRK ,Break set" "Not set,Set"
|
|
line.long 0x10 "CR,Control Register"
|
|
bitfld.long 0x10 15. " CTSEN ,Enable CTS hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " RTSEN ,Enable RTS hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x10 13. " OUT2 ,Modem Out2" "0,1"
|
|
bitfld.long 0x10 12. " OUT1 ,Modem Out1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 11. " RTS ,Enable request to send" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " DTR ,Enable data transmit ready" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " RXE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " TXE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " LBE ,Loopback enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 4.--6. " CLKSEL ,UART clock select" "No clock,24 MHz,12 MHz,6 MHz,3 MHz,?..."
|
|
bitfld.long 0x10 3. " CLKEN ,UART clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SIRLP ,SIR low power select" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SIREN ,SIR ENDEC enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " UARTEN ,UART enable" "Disabled,Enabled"
|
|
line.long 0x14 "IFLS,FIFO Interrupt Level Select"
|
|
bitfld.long 0x14 3.--5. " RXIFLSEL ,These bits hold the receive FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. " TXIFLSEL ,These bits hold the transmit FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "IER,Interrupt Enable"
|
|
bitfld.long 0x18 10. " OEIM ,Overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " BEIM ,Break error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PEIM ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " FEIM ,Framing error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 6. " RTIM ,Receive timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " TXIM ,Transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " RXIM ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " DSRMIM ,Modem DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " DCDMIM ,Modem DCD interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " CTSMIM ,Modem CTS interrupt enable" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMIM ,Modem TXCMP interrupt enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x18 0. " RIMIM ,Modem RI interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x3C++0x07
|
|
line.long 0x00 "IES,Interrupt Status"
|
|
bitfld.long 0x00 10. " OERIS ,Overflow interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " BERIS ,Break error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing error interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive timeout interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " DSRMRIS ,Modem DSR interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCDMRIS ,Modem DCD interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " CTSMRIS ,Modem CTS interrupt status" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMRIS ,Modem TXCMP interrupt status" "No interrupt,Interrupt"
|
|
else
|
|
bitfld.long 0x00 0. " RIMRIS ,Modem RI interrupt status" "No interrupt,Interrupt"
|
|
endif
|
|
line.long 0x04 "MIS,Masked Interrupt Status"
|
|
bitfld.long 0x04 10. " OEMIS ,Overflow interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " BEMIS ,Break error interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity error interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing error interrupt status masked" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive timeout interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " DSRMMIS ,Modem DSR interrupt status masked" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " DCDMMIS ,Modem DCD interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " CTSMMIS ,Modem CTS interrupt status masked" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMMIS ,Modem TXCMP interrupt status masked" "No interrupt,Interrupt"
|
|
else
|
|
bitfld.long 0x04 0. " RIMMIS ,Modem RI interrupt status masked" "No interrupt,Interrupt"
|
|
endif
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "IEC,Interrupt Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overflow interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " BEIC ,Break error interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity error interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing error interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive timeout interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " DSRMIC ,Modem DSR interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCDMIC ,Modem DCD interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CTSMIC ,Modem CTS interrupt clear" "No effect,Clear"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMIC ,Modem TXCMP interrupt clear" "No effect,Clear"
|
|
else
|
|
bitfld.long 0x00 0. " RIMIC ,Modem RI interrupt clear" "No effect,Clear"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x4001D000
|
|
width 6.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "DR,UART Data Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RSR,UART Status Register"
|
|
bitfld.long 0x00 3. " OESTAT ,Overrun error" "No error,Error"
|
|
bitfld.long 0x00 2. " BESTAT ,Break error" "No error,Error"
|
|
bitfld.long 0x00 1. " PESTAT ,Parity error" "No error,Error"
|
|
bitfld.long 0x00 0. " FESTAT ,Framing error" "No error,Error"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FR,Flag Register"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8. " TXBUSY ,Transmit BUSY indicator" "Idle,Busy"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
else
|
|
bitfld.long 0x00 8. " RI ,The ring indicator" "No,Yes"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
endif
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO empty indicator" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " BUSY ,Busy" "Idle,Busy"
|
|
bitfld.long 0x00 2. " DCD ,Data carrier detect" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " DSR ,Data set ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CTS ,Clear to send" "No,Yes"
|
|
group.long 0x20++0x1B
|
|
line.long 0x00 "ILPR,IrDA Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ILPDVSR ,IrDA counter divisor"
|
|
line.long 0x04 "IBRD,Integer Baud Rate Divisor"
|
|
hexmask.long.word 0x04 0.--15. 1. " DIVINT ,Baud integer divisor"
|
|
line.long 0x08 "FBRD,Fractional Baud Rate Divisor"
|
|
bitfld.long 0x08 0.--5. " DIVFRAC ,Baud fractional divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "LCRH,Line Control High"
|
|
bitfld.long 0x0C 7. " SPS ,Stick parity select" "No,Yes"
|
|
bitfld.long 0x0C 5.--6. " WLEN ,These bits hold the write length" "0,1,2,3"
|
|
bitfld.long 0x0C 4. " FEN ,FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " STP2 ,Two stop bits select" "1-bit,2-bits"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " EPS ,Even parity select" "Odd,Even"
|
|
bitfld.long 0x0C 1. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " BRK ,Break set" "Not set,Set"
|
|
line.long 0x10 "CR,Control Register"
|
|
bitfld.long 0x10 15. " CTSEN ,Enable CTS hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " RTSEN ,Enable RTS hardware flow control" "Disabled,Enabled"
|
|
bitfld.long 0x10 13. " OUT2 ,Modem Out2" "0,1"
|
|
bitfld.long 0x10 12. " OUT1 ,Modem Out1" "0,1"
|
|
textline " "
|
|
bitfld.long 0x10 11. " RTS ,Enable request to send" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " DTR ,Enable data transmit ready" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " RXE ,Receive enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " TXE ,Transmit enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " LBE ,Loopback enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 4.--6. " CLKSEL ,UART clock select" "No clock,24 MHz,12 MHz,6 MHz,3 MHz,?..."
|
|
bitfld.long 0x10 3. " CLKEN ,UART clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SIRLP ,SIR low power select" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SIREN ,SIR ENDEC enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " UARTEN ,UART enable" "Disabled,Enabled"
|
|
line.long 0x14 "IFLS,FIFO Interrupt Level Select"
|
|
bitfld.long 0x14 3.--5. " RXIFLSEL ,These bits hold the receive FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. " TXIFLSEL ,These bits hold the transmit FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "IER,Interrupt Enable"
|
|
bitfld.long 0x18 10. " OEIM ,Overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " BEIM ,Break error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " PEIM ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " FEIM ,Framing error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 6. " RTIM ,Receive timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " TXIM ,Transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " RXIM ,Receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " DSRMIM ,Modem DSR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 2. " DCDMIM ,Modem DCD interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " CTSMIM ,Modem CTS interrupt enable" "Disabled,Enabled"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMIM ,Modem TXCMP interrupt enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x18 0. " RIMIM ,Modem RI interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x3C++0x07
|
|
line.long 0x00 "IES,Interrupt Status"
|
|
bitfld.long 0x00 10. " OERIS ,Overflow interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " BERIS ,Break error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing error interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive timeout interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " DSRMRIS ,Modem DSR interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCDMRIS ,Modem DCD interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " CTSMRIS ,Modem CTS interrupt status" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMRIS ,Modem TXCMP interrupt status" "No interrupt,Interrupt"
|
|
else
|
|
bitfld.long 0x00 0. " RIMRIS ,Modem RI interrupt status" "No interrupt,Interrupt"
|
|
endif
|
|
line.long 0x04 "MIS,Masked Interrupt Status"
|
|
bitfld.long 0x04 10. " OEMIS ,Overflow interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " BEMIS ,Break error interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity error interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing error interrupt status masked" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive timeout interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " DSRMMIS ,Modem DSR interrupt status masked" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 2. " DCDMMIS ,Modem DCD interrupt status masked" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " CTSMMIS ,Modem CTS interrupt status masked" "No interrupt,Interrupt"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMMIS ,Modem TXCMP interrupt status masked" "No interrupt,Interrupt"
|
|
else
|
|
bitfld.long 0x04 0. " RIMMIS ,Modem RI interrupt status masked" "No interrupt,Interrupt"
|
|
endif
|
|
wgroup.long 0x44++0x03
|
|
line.long 0x00 "IEC,Interrupt Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overflow interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " BEIC ,Break error interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity error interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing error interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive timeout interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " DSRMIC ,Modem DSR interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DCDMIC ,Modem DCD interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CTSMIC ,Modem CTS interrupt clear" "No effect,Clear"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 0. " TXCMPMIC ,Modem TXCMP interrupt clear" "No effect,Clear"
|
|
else
|
|
bitfld.long 0x00 0. " RIMIC ,Modem RI interrupt clear" "No effect,Clear"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0x50010000
|
|
width 9.
|
|
if (((per.long(ad:0x50010000))&0x01)==0x01)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
rbitfld.long 0x00 24.--25. " CLKSEL ,Source and frequency for the ADC clock" "Off,HFRC,HFRC/2,?..."
|
|
rbitfld.long 0x00 19. " TRIGPOL ,ADC trigger polarity for external off chip triggers" "Rising edge,Falling edge"
|
|
rbitfld.long 0x00 16.--18. " TRIGSEL ,ADC trigger source" "External 0,External 1,External 2,External 3,VCOMP,,,Software"
|
|
rbitfld.long 0x00 8.--9. " REFSEL ,ADC reference voltage" "Internal 2.0V,Internal 1.5V,Off Chip 2.0V,Off Chip 1.5V"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " CKMODE ,Clock mode register" "Disable,Low latency"
|
|
rbitfld.long 0x00 3. " LPMODE ,Select power mode to enter between active scans" "Mode 0,Mode 1"
|
|
rbitfld.long 0x00 2. " RPTEN ,Enable Repeating Scan Mode" "Single,Repeating"
|
|
bitfld.long 0x00 0. " ADCEN ,Enable the ADC module" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 24.--25. " CLKSEL ,Source and frequency for the ADC clock" "Off,HFRC,HFRC/2,?..."
|
|
bitfld.long 0x00 19. " TRIGPOL ,ADC trigger polarity for external off chip triggers" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 16.--18. " TRIGSEL ,ADC trigger source" "External 0,External 1,External 2,External 3,VCOMP,,,Software"
|
|
bitfld.long 0x00 8.--9. " REFSEL ,ADC reference voltage" "Internal 2.0V,Internal 1.5V,Off Chip 2.0V,Off Chip 1.5V"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CKMODE ,Clock mode register" "Disable,Low latency"
|
|
bitfld.long 0x00 3. " LPMODE ,Select power mode to enter between active scans" "Mode 0,Mode 1"
|
|
bitfld.long 0x00 2. " RPTEN ,Enable Repeating Scan Mode" "Single,Repeating"
|
|
bitfld.long 0x00 0. " ADCEN ,Enable the ADC module" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,ADC Power Status"
|
|
bitfld.long 0x00 0. " PWDSTAT ,Indicates the power-status of the ADC" "Powered on,Powered down"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SWT,Software trigger"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SWT ,Writing 0x37 to this register generates a software trigger"
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "SL0CFG,Slot 0 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL0 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE0 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL0 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN0 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN0 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0xC++0x03
|
|
line.long 0x00 "SL0CFG,Slot 0 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL0 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE0 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL0 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN0 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN0 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SL1CFG,Slot 1 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL1 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE1 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL1 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN1 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN1 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SL1CFG,Slot 1 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL1 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE1 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL1 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN1 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN1 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SL2CFG,Slot 2 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL2 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE2 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL2 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN2 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN2 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SL2CFG,Slot 2 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL2 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE2 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL2 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN2 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN2 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SL3CFG,Slot 3 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL3 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE3 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL3 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN3 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN3 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SL3CFG,Slot 3 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL3 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE3 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL3 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN3 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN3 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SL4CFG,Slot 4 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL4 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE4 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL4 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN4 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN4 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SL4CFG,Slot 4 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL4 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE4 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL4 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN4 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN4 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SL5CFG,Slot 5 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL5 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE5 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL5 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN5 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN5 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "SL5CFG,Slot 5 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL5 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE5 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL5 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN5 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN5 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SL6CFG,Slot 6 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL6 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE6 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL6 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN6 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN6 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "SL6CFG,Slot 6 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL6 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE6 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL6 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN6 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN6 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
if (((per.long(ad:0x50010000))&0x01)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SL7CFG,Slot 7 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL7 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE7 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL7 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN7 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN7 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "SL7CFG,Slot 7 Configuration Register"
|
|
bitfld.long 0x00 24.--26. " ADSEL7 ,Number of measurements to average in the accumulate divide module for this slot" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 16.--17. " PRMODE7 ,Set the Precision Mode For Slot" "14-bit,12-bit,10-bit,8-bit"
|
|
bitfld.long 0x00 8.--11. " CHSEL7 ,Select one of the 14 channel inputs for this slot" "Single ended/pad16,Single ended/pad29,Single ended/pad11,Single ended/pad31,Single ended/pad32,Single ended/pad33,Single ended/pad34,Single ended/pad35,Single ended/pad13,Single ended/pad12,Differential/pad12(N)/pad13(P),Differential/pad15(N)/pad14(P),Temperature sensor,Internal voltage/3,Input VSS,?..."
|
|
bitfld.long 0x00 1. " WCEN7 ,Enable the window compare function for slot 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SLEN7 ,Enable slot 0 for ADC conversions" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x2C++0x07
|
|
line.long 0x00 "WULIM,Window Comparator Upper Limits Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " ULIM ,Upper limit for the window comparator"
|
|
line.long 0x04 "WLLIM,Window Comparator Lower Limits Register"
|
|
hexmask.long.tbyte 0x04 0.--19. 1. " LLIM ,Lower limit for the window comparator"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "FIFO,FIFO Data and Valid Count Register"
|
|
bitfld.long 0x00 28.--30. " SLOTNUM ,Slot number associated with this FIFO data" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 20.--27. 1. " COUNT ,Number of valid entries in the ADC FIFO"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " DATA ,Oldest data in the FIFO"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,ADC Interrupt registers: Enable"
|
|
bitfld.long 0x00 5. " WCINC ,Window comparator voltage incursion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " WCEXC ,Window comparator voltage excursion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " FIFOOVR2 ,FIFO 100 percent full interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FIFOOVR1 ,FIFO 75 percent full interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SCNCMP ,ADC scan complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CNVCMP ,ADC conversion complete interrupt enable" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,ADC Interrupt registers: Status"
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " WCINC ,Window comparator voltage incursion interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " WCEXC ,Window comparator voltage excursion interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " FIFOOVR2 ,FIFO 100 percent full interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " FIFOOVR1 ,FIFO 75 percent full interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " SCNCMP ,ADC scan complete interrupt status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " CNVCMP ,ADC conversion complete interrupt status" "No interrupt,Interrupt"
|
|
width 0xB
|
|
tree.end
|
|
tree "VCOMP (Voltage Comparator Module)"
|
|
base ad:0x4000C000
|
|
width 9.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 16.--19. " LVLSEL ,Select negative input to the comparator" "0.58V,0.77V,0.97V,1.16V,1.35V,1.55V,1.74V,1.93V,2.13V,2.32V,2.51V,2.71V,2.90V,3.09V,3.29V,3.48V"
|
|
sif (cpu()=="AMAPH1KK")
|
|
bitfld.long 0x00 8.--9. " NSEL ,Select negative input to the comparator" "VREFEXT1,VREFEXT2,VREFEXT3,DAC"
|
|
else
|
|
bitfld.long 0x00 8.--9. " NSEL ,Select negative input to the comparator" "CMPRF0,CMPRF1,CMPRF2,DAC"
|
|
endif
|
|
bitfld.long 0x00 0.--1. " PSEL ,Select positive input to the comparator" "VDDADJ,VTEMP,VEXT1,VEXT2"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status Register"
|
|
bitfld.long 0x00 1. " PWDSTAT ,Power down state of the voltage comparator" "Powered up,Powered down"
|
|
bitfld.long 0x00 0. " CMPOUT ,Positive input of the comparator is greater than the negative input" "Negative,Positive"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PWDKEY,Key Register for Powering Down the Voltage Comparator Register"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Voltage Comparator Interrupts Enable Register"
|
|
bitfld.long 0x00 1. " OUTHI ,Vcompout high interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " OUTLOW ,Vcompout low interrupt" "Disabled,Enabled"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Voltage Comparator Interrupts Status Register"
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " OUTHI ,Vcompout high interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " OUTLOW ,Vcompout low interrupt" "No interrupt,Interrupt"
|
|
width 0x0B
|
|
tree.end
|
|
elif cpuis("AMA2B1KK")
|
|
autoindent.on center tree
|
|
tree "ADC (Analog Digital Converter Control)"
|
|
base ad:0x50010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,The ADC Configuration Register contains the software control for selecting the clock frequency used for the SAR conversions the trigger polarity the trigger select the reference voltage select the low power mode the operating mode (single scan per.."
|
|
bitfld.long 0x00 24.--25. "CLKSEL,Select the source and frequency for the ADC clock" "0: Off mode,1: HFRC Core Clock Frequency,2: HFRC Core Clock / 2,?..."
|
|
bitfld.long 0x00 19. "TRIGPOL,This bit selects the ADC trigger polarity for external off chip triggers" "0: Trigger on rising edge,1: Trigger on falling edge"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "TRIGSEL,Select the ADC trigger source" "0: Off chip External Trigger0 (ADC_ET0),1: Off chip External Trigger1 (ADC_ET1),2: Off chip External Trigger2 (ADC_ET2),3: Off chip External Trigger3 (ADC_ET3),4: Voltage Comparator Output,?,?,7: Software Trigger"
|
|
bitfld.long 0x00 8.--9. "REFSEL,Select the ADC reference voltage" "0: Internal 2.0V Bandgap Reference Voltage,1: Internal 1.5V Bandgap Reference Voltage,2: Off Chip 2.0V Reference,3: Off Chip 1.5V Reference"
|
|
newline
|
|
bitfld.long 0x00 4. "CKMODE,Clock mode register" "0: Disable the clock between scans for LPMODE0,1: Low Latency Clock Mode"
|
|
bitfld.long 0x00 3. "LPMODE,Select power mode to enter between active scans" "0: Low Power Mode 0,1: Low Power Mode 1"
|
|
newline
|
|
bitfld.long 0x00 2. "RPTEN,This bit enables Repeating Scan Mode" "0: In Single Scan Mode the ADC will complete a..,1: In Repeating Scan Mode the ADC will complete.."
|
|
bitfld.long 0x00 0. "ADCEN,This bit enables the ADC module" "0: Disable the ADC module,1: Enable the ADC module"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STAT,This register indicates the basic power status for the ADC"
|
|
bitfld.long 0x00 0. "PWDSTAT,Indicates the power-status of the ADC" "0: Powered on,1: ADC Low Power Mode 1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SWT,This register enables initiating an ADC scan through software"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWT,Writing 0x37 to this register generates a software trigger"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SL0CFG,Slot 0 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL0,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE0,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL0,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN0,This bit enables the window compare function for slot 0" "?,1: Enable the window compare for slot 0"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN0,This bit enables slot 0 for ADC conversions" "?,1: Enable slot 0 for ADC conversions"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "SL1CFG,Slot 1 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL1,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE1,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL1,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN1,This bit enables the window compare function for slot 1" "?,1: Enable the window compare for slot 1"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN1,This bit enables slot 1 for ADC conversions" "?,1: Enable slot 1 for ADC conversions"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SL2CFG,Slot 2 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL2,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE2,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL2,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN2,This bit enables the window compare function for slot 2" "?,1: Enable the window compare for slot 2"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN2,This bit enables slot 2 for ADC conversions" "?,1: Enable slot 2 for ADC conversions"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SL3CFG,Slot 3 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL3,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE3,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL3,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN3,This bit enables the window compare function for slot 3" "?,1: Enable the window compare for slot 3"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN3,This bit enables slot 3 for ADC conversions" "?,1: Enable slot 3 for ADC conversions"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "SL4CFG,Slot 4 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL4,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE4,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL4,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN4,This bit enables the window compare function for slot 4" "?,1: Enable the window compare for slot 4"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN4,This bit enables slot 4 for ADC conversions" "?,1: Enable slot 4 for ADC conversions"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SL5CFG,Slot 5 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL5,Select number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE5,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL5,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN5,This bit enables the window compare function for slot 5" "?,1: Enable the window compare for slot 5"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN5,This bit enables slot 5 for ADC conversions" "?,1: Enable slot 5 for ADC conversions"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SL6CFG,Slot 6 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL6,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE6,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL6,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN6,This bit enables the window compare function for slot 6" "?,1: Enable the window compare for slot 6"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN6,This bit enables slot 6 for ADC conversions" "?,1: Enable slot 6 for ADC conversions"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SL7CFG,Slot 7 Configuration Register"
|
|
bitfld.long 0x00 24.--26. "ADSEL7,Select the number of measurements to average in the accumulate divide module for this slot" "0: Average in 1 measurement in the accumulate..,1: Average in 2 measurements in the accumulate..,2: Average in 4 measurements in the accumulate..,3: Average in 8 measurements in the accumulate..,4: Average in 16 measurements in the accumulate..,5: Average in 32 measurements in the accumulate..,6: Average in 64 measurements in the accumulate..,7: Average in 128 measurements in the accumulate.."
|
|
bitfld.long 0x00 16.--17. "PRMODE7,Set the Precision Mode For Slot" "0: 14-bit precision mode,1: 12-bit precision mode,2: 10-bit precision mode,3: 8-bit precision mode"
|
|
newline
|
|
bitfld.long 0x00 8.--11. "CHSEL7,Select one of the 14 channel inputs for this slot" "0: single ended external GPIO connection to pad16,1: single ended external GPIO connection to pad29,2: single ended external GPIO connection to pad11,3: single ended external GPIO connection to pad31,4: single ended external GPIO connection to pad32,5: single ended external GPIO connection to pad33,6: single ended external GPIO connection to pad34,7: single ended external GPIO connection to pad35,8: single ended external GPIO connection to pad13,9: single ended external GPIO connection to pad12,10: differential external GPIO connections to..,11: differential external GPIO connections to..,12: internal temperature sensor,13: internal voltage divide-by-3 connection,14: Input VSS,?..."
|
|
bitfld.long 0x00 1. "WCEN7,This bit enables the window compare function for slot 7" "?,1: Enable the window compare for slot 7"
|
|
newline
|
|
bitfld.long 0x00 0. "SLEN7,This bit enables slot 7 for ADC conversions" "?,1: Enable slot 7 for ADC conversions"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WULIM,Window Comparator Upper Limits Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "ULIM,Sets the upper limit for the wondow comparator"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "WLLIM,Window Comparator Lower Limits Register"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "LLIM,Sets the lower limit for the wondow comparator"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "FIFO,The ADC FIFO Register contains the slot number and fifo data for the oldest conversion data in the FIFO"
|
|
bitfld.long 0x00 31. "RSVD,RESERVED" "0,1"
|
|
bitfld.long 0x00 28.--30. "SLOTNUM,Slot number associated with this FIFO data" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 20.--27. 1. "COUNT,Number of valid entries in the ADC FIFO"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. "DATA,Oldest data in the FIFO"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 5. "WCINC,Window comparator voltage incursion interrupt" "?,1: Window comparitor voltage incursion interrupt"
|
|
bitfld.long 0x00 4. "WCEXC,Window comparator voltage excursion interrupt" "?,1: Window comparitor voltage excursion interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "FIFOOVR2,FIFO 100 percent full interrupt" "?,1: FIFO 100 percent full interrupt"
|
|
bitfld.long 0x00 2. "FIFOOVR1,FIFO 75 percent full interrupt" "?,1: FIFO 75 percent full interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "SCNCMP,ADC scan complete interrupt" "?,1: ADC scan complete interrupt"
|
|
bitfld.long 0x00 0. "CNVCMP,ADC conversion complete interrupt" "?,1: ADC conversion complete interrupt"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 5. "WCINC,Window comparator voltage incursion interrupt" "?,1: Window comparitor voltage incursion interrupt"
|
|
bitfld.long 0x00 4. "WCEXC,Window comparator voltage excursion interrupt" "?,1: Window comparitor voltage excursion interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "FIFOOVR2,FIFO 100 percent full interrupt" "?,1: FIFO 100 percent full interrupt"
|
|
bitfld.long 0x00 2. "FIFOOVR1,FIFO 75 percent full interrupt" "?,1: FIFO 75 percent full interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "SCNCMP,ADC scan complete interrupt" "?,1: ADC scan complete interrupt"
|
|
bitfld.long 0x00 0. "CNVCMP,ADC conversion complete interrupt" "?,1: ADC conversion complete interrupt"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 5. "WCINC,Window comparator voltage incursion interrupt" "?,1: Window comparitor voltage incursion interrupt"
|
|
bitfld.long 0x00 4. "WCEXC,Window comparator voltage excursion interrupt" "?,1: Window comparitor voltage excursion interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "FIFOOVR2,FIFO 100 percent full interrupt" "?,1: FIFO 100 percent full interrupt"
|
|
bitfld.long 0x00 2. "FIFOOVR1,FIFO 75 percent full interrupt" "?,1: FIFO 75 percent full interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "SCNCMP,ADC scan complete interrupt" "?,1: ADC scan complete interrupt"
|
|
bitfld.long 0x00 0. "CNVCMP,ADC conversion complete interrupt" "?,1: ADC conversion complete interrupt"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 5. "WCINC,Window comparator voltage incursion interrupt" "?,1: Window comparitor voltage incursion interrupt"
|
|
bitfld.long 0x00 4. "WCEXC,Window comparator voltage excursion interrupt" "?,1: Window comparitor voltage excursion interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. "FIFOOVR2,FIFO 100 percent full interrupt" "?,1: FIFO 100 percent full interrupt"
|
|
bitfld.long 0x00 2. "FIFOOVR1,FIFO 75 percent full interrupt" "?,1: FIFO 75 percent full interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "SCNCMP,ADC scan complete interrupt" "?,1: ADC scan complete interrupt"
|
|
bitfld.long 0x00 0. "CNVCMP,ADC conversion complete interrupt" "?,1: ADC conversion complete interrupt"
|
|
tree.end
|
|
tree "CACHECTRL (Flash Cache Controller)"
|
|
base ad:0x40018000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CACHECFG,Flash Cache Control Register"
|
|
bitfld.long 0x00 24. "ENABLE_MONITOR,Enable Cache Monitoring Stats" "0,1"
|
|
bitfld.long 0x00 20. "DATA_CLKGATE,Enable clock gating of entire cache data array subsystem" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "SMDLY,Unused" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. "DLY,Unused" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 11. "CACHE_LS,Enable LS (light sleep) of cache RAMs" "0,1"
|
|
bitfld.long 0x00 10. "CACHE_CLKGATE,Enable clock gating of individual cache RAMs" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "DCACHE_ENABLE,Enable Flash Data Caching" "0,1"
|
|
bitfld.long 0x00 8. "ICACHE_ENABLE,Enable Flash Instruction Caching" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "SERIAL,Bitfield should always be programmed to 0" "0,1"
|
|
bitfld.long 0x00 4.--6. "CONFIG,Sets the cache configuration" "?,?,?,?,?,5: Two-way set associative 128-bit linesize 512..,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "ENABLE_NC1,Enable Non-cacheable region 1" "0,1"
|
|
bitfld.long 0x00 2. "ENABLE_NC0,Enable Non-cacheable region 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "LRU,Sets the cache replacement policy" "0: LRR (least recently replaced),1: LRU (least recently used)"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the main flash cache controller logic and enables power to the cache RAMs" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "FLASHCFG,Flash Control Register"
|
|
bitfld.long 0x00 0.--2. "RD_WAIT,Sets read waitstates for flash accesses (in clock cycles)" "0,1,2,3,4,5,6,7"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,Cache Control"
|
|
bitfld.long 0x00 10. "FLASH1_SLM_ENABLE,Enable Flash Sleep Mode" "0,1"
|
|
bitfld.long 0x00 9. "FLASH1_SLM_DISABLE,Disable Flash Sleep Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "FLASH1_SLM_STATUS,Flash Sleep Mode Status" "0,1"
|
|
bitfld.long 0x00 6. "FLASH0_SLM_ENABLE,Enable Flash Sleep Mode" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "FLASH0_SLM_DISABLE,Disable Flash Sleep Mode" "0,1"
|
|
bitfld.long 0x00 4. "FLASH0_SLM_STATUS,Flash Sleep Mode Status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "CACHE_READY,Cache Ready Status" "0,1"
|
|
bitfld.long 0x00 1. "RESET_STAT,Writing a 1 to this bitfield will reset the cache monitor statistics (DMON0-3 IMON0-3)" "?,1: Clear Cache Stats"
|
|
newline
|
|
bitfld.long 0x00 0. "INVALIDATE,Writing a 1 to this bitfield invalidates the flash cache contents" "?,1: Initiate a programming operation to flash info"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "NCR0START,Flash Cache Noncachable Region 0 Start Address"
|
|
hexmask.long.word 0x00 4.--19. 1. "ADDR,Start address for non-cacheable region 0"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "NCR0END,Flash Cache Noncachable Region 0 End"
|
|
hexmask.long.word 0x00 4.--19. 1. "ADDR,End address for non-cacheable region 0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "NCR1START,Flash Cache Noncachable Region 1 Start"
|
|
hexmask.long.word 0x00 4.--19. 1. "ADDR,Start address for non-cacheable region 1"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "NCR1END,Flash Cache Noncachable Region 1 End"
|
|
hexmask.long.word 0x00 4.--19. 1. "ADDR,End address for non-cacheable region 1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CACHEMODE,Flash Cache Mode Register"
|
|
bitfld.long 0x00 5. "THROTTLE6,Disallow Simultaneous Data RAM reads (from 2 line hits on each bus)" "0,1"
|
|
bitfld.long 0x00 4. "THROTTLE5,Disallow Data RAM reads (from line hits) during lookup read ops" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "THROTTLE4,Disallow Data RAM reads (from line hits) on tag RAM fill cycles" "0,1"
|
|
bitfld.long 0x00 2. "THROTTLE3,Disallow cache data RAM writes on data RAM read cycles" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "THROTTLE2,Disallow cache data RAM writes on tag RAM read cycles" "0,1"
|
|
bitfld.long 0x00 0. "THROTTLE1,Disallow cache data RAM writes on tag RAM fill cycles" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DMON0,Data Cache Total Accesses"
|
|
hexmask.long 0x00 0.--31. 1. "DACCESS_COUNT,Total accesses to data cache"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DMON1,Data Cache Tag Lookups"
|
|
hexmask.long 0x00 0.--31. 1. "DLOOKUP_COUNT,Total tag lookups from data cache"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DMON2,Data Cache Hits"
|
|
hexmask.long 0x00 0.--31. 1. "DHIT_COUNT,Cache hits from lookup operations"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DMON3,Data Cache Line Hits"
|
|
hexmask.long 0x00 0.--31. 1. "DLINE_COUNT,Cache hits from line cache"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "IMON0,Instruction Cache Total Accesses"
|
|
hexmask.long 0x00 0.--31. 1. "IACCESS_COUNT,Total accesses to Instruction cache"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "IMON1,Instruction Cache Tag Lookups"
|
|
hexmask.long 0x00 0.--31. 1. "ILOOKUP_COUNT,Total tag lookups from Instruction cache"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "IMON2,Instruction Cache Hits"
|
|
hexmask.long 0x00 0.--31. 1. "IHIT_COUNT,Cache hits from lookup operations"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "IMON3,Instruction Cache Line Hits"
|
|
hexmask.long 0x00 0.--31. 1. "ILINE_COUNT,Cache hits from line cache"
|
|
tree.end
|
|
tree "CLKGEN (Clock Generator)"
|
|
base ad:0x40004000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CALXT,XT Oscillator Control"
|
|
hexmask.long.word 0x00 0.--10. 1. "CALXT,XT Oscillator calibration value"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CALRC,RC Oscillator Control"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "CALRC,LFRC Oscillator calibration value"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACALCTR,Autocalibration Counter"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "ACALCTR,Autocalibration Counter result"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "OCTRL,Oscillator Control"
|
|
bitfld.long 0x00 8.--10. "ACAL,Autocalibration control" "0: Disable Autocalibration,?,2: Autocalibrate every 1024 seconds,3: Autocalibrate every 512 seconds,?,?,6: Frequency measurement using XT,7: Frequency measurement using external clock"
|
|
bitfld.long 0x00 7. "OSEL,Selects the RTC oscillator (1 => LFRC 0 => XT)" "0: RTC uses the XT,1: RTC uses the LFRC"
|
|
newline
|
|
bitfld.long 0x00 6. "FOS,Oscillator switch on failure function" "0: Disable the oscillator switch on failure..,1: Enable the oscillator switch on failure.."
|
|
bitfld.long 0x00 1. "STOPRC,Stop the LFRC Oscillator to the RTC" "0: Enable the LFRC Oscillator to drive the RTC,1: Stop the LFRC Oscillator when driving the RTC"
|
|
newline
|
|
bitfld.long 0x00 0. "STOPXT,Stop the XT Oscillator to the RTC" "0: Enable the XT Oscillator to drive the RTC,1: Stop the XT Oscillator when driving the RTC"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CLKOUT,CLKOUT Frequency Select"
|
|
bitfld.long 0x00 7. "CKEN,Enable the CLKOUT signal" "0: Disable CLKOUT,1: Enable CLKOUT"
|
|
bitfld.long 0x00 0.--5. "CKSEL,CLKOUT signal select" "0: LFRC,1: XT_DIV2,2: XT_DIV4,3: XT_DIV8,4: XT_DIV16,5: XT_DIV32,?,?,?,?,?,?,?,?,?,?,16: 1 Hz as selected in RTC,?,?,?,?,?,22: XT / 2^21,23: XT,24: 100 Hz as selected in CLKGEN,25: HFRC,26: HFRC_DIV4,27: HFRC_DIV8,28: HFRC_DIV16,29: HFRC_DIV64,30: HFRC_DIV128,31: HFRC_DIV256,32: HFRC_DIV512,?,34: Flash Clock,35: LFRC_DIV2,36: LFRC_DIV32,37: LFRC_DIV512,38: LFRC / 32768,39: XT_DIV256,40: XT / 8192,41: XT_DIV64K,42: Uncal LFRC / 16,43: Uncal LFRC / 128,44: Uncal LFRC / 1024,45: Uncal LFRC / 4096,46: Uncal LFRC / 2^20,47: HFRC_DIV64K,48: HFRC_DIV16M,49: LFRC / 2^20,50: HFRC (not autoenabled),51: HFRC / 8 (not autoenabled),?,53: XT (not autoenabled),54: XT / 16 (not autoenabled),55: LFRC / 32 (not autoenabled),?,57: LFRC (not autoenabled) - Default for..,?..."
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CLKKEY,Lock state of the CCTRL configuration register"
|
|
hexmask.long 0x00 0.--31. 1. "CLKKEY,Key register value"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CCTRL,HFRC Clock Control"
|
|
bitfld.long 0x00 0. "CORESEL,Core Clock divisor" "0: Core Clock is HFRC,1: Core Clock is HFRC / 2"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "STATUS,Clock Generator Status"
|
|
bitfld.long 0x00 1. "OSCF,XT Oscillator is enabled but not oscillating" "0,1"
|
|
bitfld.long 0x00 0. "OMODE,Current RTC oscillator (1 => LFRC 0 => XT)" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "HFADJ,HFRC Adjustment"
|
|
bitfld.long 0x00 21.--23. "HFADJ_GAIN,Gain control for HFRC adjustment" "0: HF Adjust with Gain of 1,1: HF Adjust with Gain of 0.5,2: HF Adjust with Gain of 0.25,3: HF Adjust with Gain of 0.125,4: HF Adjust with Gain of 0.0625,5: HF Adjust with Gain of 0.03125,?..."
|
|
bitfld.long 0x00 20. "HFWARMUP,XT warmup period for HFRC adjustment" "0: Autoadjust XT warmup period = 1-2 seconds,1: Autoadjust XT warmup period = 2-4 seconds"
|
|
newline
|
|
hexmask.long.word 0x00 8.--19. 1. "HFXTADJ,Target HFRC adjustment value"
|
|
bitfld.long 0x00 1.--3. "HFADJCK,Repeat period for HFRC adjustment" "0: Autoadjust repeat period = 4 seconds,1: Autoadjust repeat period = 16 seconds,2: Autoadjust repeat period = 32 seconds,3: Autoadjust repeat period = 64 seconds,4: Autoadjust repeat period = 128 seconds,5: Autoadjust repeat period = 256 seconds,6: Autoadjust repeat period = 512 seconds,7: Autoadjust repeat period = 1024 seconds"
|
|
newline
|
|
bitfld.long 0x00 0. "HFADJEN,HFRC adjustment control" "0: Disable the HFRC adjustment,1: Enable the HFRC adjustment"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CLOCKEN,Clock Enable Status"
|
|
hexmask.long 0x00 0.--31. 1. "CLOCKEN,Clock enable status"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CLOCKEN2,Clock Enable Status"
|
|
hexmask.long 0x00 0.--31. 1. "CLOCKEN2,Clock enable status 2"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CLOCKEN3,Clock Enable Status"
|
|
hexmask.long 0x00 0.--31. 1. "CLOCKEN3,Clock enable status 3"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "UARTEN,UART Enable"
|
|
bitfld.long 0x00 8.--9. "UART1EN,UART1 system clock control" "0: Disable the UART1 system clock,1: Enable the UART1 system clock,2: Run UART_Hclk at the same frequency as..,3: Enable UART_hclk to reduce to UART_hfclk at.."
|
|
bitfld.long 0x00 0.--1. "UART0EN,UART0 system clock control" "0: Disable the UART0 system clock,1: Enable the UART0 system clock,2: Run UART_Hclk at the same frequency as..,3: Enable UART_hclk to reduce to UART_hfclk at.."
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
tree.end
|
|
tree "CTIMER (Counter/Timer)"
|
|
base ad:0x40008000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TMR0,This register holds the running time or event count either for each 16 bit half or for the whole 32 bit count when the pair is linked"
|
|
hexmask.long.word 0x00 16.--31. 1. "CTTMRB0,Counter/Timer B0"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTTMRA0,Counter/Timer A0"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CMPRA0,Compare limits for timer half A"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1A0,Counter/Timer A0 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0A0,Counter/Timer A0 Compare Register 0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CMPRB0,Compare limits for timer half B"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1B0,Counter/Timer B0 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0B0,Counter/Timer B0 Compare Register 0"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CTRL0,Control bit fields for both halves of timer 0"
|
|
bitfld.long 0x00 31. "CTLINK0,Counter/Timer A0/B0 Link bit" "0: Use A0/B0 timers as two independent 16-bit..,1: Link A0/B0 timers into a single 32-bit timer"
|
|
bitfld.long 0x00 29. "TMRB0PE,Counter/Timer B0 Output Enable bit" "0: Counter/Timer B holds the TMRPINB signal at..,1: Enable counter/timer B0 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 28. "TMRB0POL,Counter/Timer B0 output polarity" "0: The polarity of the TMRPINB0 pin is the same..,1: The polarity of the TMRPINB0 pin is the.."
|
|
bitfld.long 0x00 27. "TMRB0CLR,Counter/Timer B0 Clear bit" "0: Allow counter/timer B0 to run,1: Holds counter/timer B0 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 26. "TMRB0IE1,Counter/Timer B0 Interrupt Enable bit for COMPR1" "0: Disable counter/timer B0 from generating an..,1: Enable counter/timer B0 to generate an.."
|
|
bitfld.long 0x00 25. "TMRB0IE0,Counter/Timer B0 Interrupt Enable bit for COMPR0" "0: Disable counter/timer B0 from generating an..,1: Enable counter/timer B0 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 22.--24. "TMRB0FN,Counter/Timer B0 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 17.--21. "TMRB0CLK,Counter/Timer B0 Clock Select" "0: Clock source is TMRPINB,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 16. "TMRB0EN,Counter/Timer B0 Enable bit" "0: Counter/Timer B0 Disable,1: Counter/Timer B0 Enable"
|
|
bitfld.long 0x00 13. "TMRA0PE,Counter/Timer A0 Output Enable bit" "0: Counter/Timer A holds the TMRPINA signal at..,1: Enable counter/timer A0 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 12. "TMRA0POL,Counter/Timer A0 output polarity" "0: The polarity of the TMRPINA0 pin is the same..,1: The polarity of the TMRPINA0 pin is the.."
|
|
bitfld.long 0x00 11. "TMRA0CLR,Counter/Timer A0 Clear bit" "0: Allow counter/timer A0 to run,1: Holds counter/timer A0 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 10. "TMRA0IE1,Counter/Timer A0 Interrupt Enable bit based on COMPR1" "0: Disable counter/timer A0 from generating an..,1: Enable counter/timer A0 to generate an.."
|
|
bitfld.long 0x00 9. "TMRA0IE0,Counter/Timer A0 Interrupt Enable bit based on COMPR0" "0: Disable counter/timer A0 from generating an..,1: Enable counter/timer A0 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 6.--8. "TMRA0FN,Counter/Timer A0 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 1.--5. "TMRA0CLK,Counter/Timer A0 Clock Select" "0: Clock source is TMRPINA,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK / 4,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TMRA0EN,Counter/Timer A0 Enable bit" "0: Counter/Timer A0 Disable,1: Counter/Timer A0 Enable"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TMR1,This register holds the running time or event count either for each 16 bit half or for the whole 32 bit count when the pair is linked"
|
|
hexmask.long.word 0x00 16.--31. 1. "CTTMRB1,Counter/Timer B1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTTMRA1,Counter/Timer A1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CMPRA1,This register holds the compare limits for timer half A"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1A1,Counter/Timer A1 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0A1,Counter/Timer A1 Compare Register 0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CMPRB1,This register holds the compare limits for timer half B"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1B1,Counter/Timer B1 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0B1,Counter/Timer B1 Compare Register 0"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CTRL1,Control bit fields for both halves of timer 0"
|
|
bitfld.long 0x00 31. "CTLINK1,Counter/Timer A1/B1 Link bit" "0: Use A1/B1 timers as two independent 16-bit..,1: Link A1/B1 timers into a single 32-bit timer"
|
|
bitfld.long 0x00 29. "TMRB1PE,Counter/Timer B1 Output Enable bit" "0: Counter/Timer B holds the TMRPINB signal at..,1: Enable counter/timer B1 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 28. "TMRB1POL,Counter/Timer B1 output polarity" "0: The polarity of the TMRPINB1 pin is the same..,1: The polarity of the TMRPINB1 pin is the.."
|
|
bitfld.long 0x00 27. "TMRB1CLR,Counter/Timer B1 Clear bit" "0: Allow counter/timer B1 to run,1: Holds counter/timer B1 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 26. "TMRB1IE1,Counter/Timer B1 Interrupt Enable bit for COMPR1" "0: Disable counter/timer B1 from generating an..,1: Enable counter/timer B1 to generate an.."
|
|
bitfld.long 0x00 25. "TMRB1IE0,Counter/Timer B1 Interrupt Enable bit for COMPR0" "0: Disable counter/timer B1 from generating an..,1: Enable counter/timer B1 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 22.--24. "TMRB1FN,Counter/Timer B1 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 17.--21. "TMRB1CLK,Counter/Timer B1 Clock Select" "0: Clock source is TMRPINB,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 16. "TMRB1EN,Counter/Timer B1 Enable bit" "0: Counter/Timer B1 Disable,1: Counter/Timer B1 Enable"
|
|
bitfld.long 0x00 13. "TMRA1PE,Counter/Timer A1 Output Enable bit" "0: Counter/Timer A holds the TMRPINA signal at..,1: Enable counter/timer A1 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 12. "TMRA1POL,Counter/Timer A1 output polarity" "0: The polarity of the TMRPINA1 pin is the same..,1: The polarity of the TMRPINA1 pin is the.."
|
|
bitfld.long 0x00 11. "TMRA1CLR,Counter/Timer A1 Clear bit" "0: Allow counter/timer A1 to run,1: Holds counter/timer A1 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 10. "TMRA1IE1,Counter/Timer A1 Interrupt Enable bit based on COMPR1" "0: Disable counter/timer A1 from generating an..,1: Enable counter/timer A1 to generate an.."
|
|
bitfld.long 0x00 9. "TMRA1IE0,Counter/Timer A1 Interrupt Enable bit based on COMPR0" "0: Disable counter/timer A1 from generating an..,1: Enable counter/timer A1 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 6.--8. "TMRA1FN,Counter/Timer A1 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 1.--5. "TMRA1CLK,Counter/Timer A1 Clock Select" "0: Clock source is TMRPINA,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TMRA1EN,Counter/Timer A1 Enable bit" "0: Counter/Timer A1 Disable,1: Counter/Timer A1 Enable"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TMR2,Counter/Timer Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "CTTMRB2,Counter/Timer B2"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTTMRA2,Counter/Timer A2"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CMPRA2,This register holds the compare limits for timer half A"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1A2,Counter/Timer A2 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0A2,Counter/Timer A2 Compare Register 0"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CMPRB2,This register holds the compare limits for timer half B"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1B2,Counter/Timer B2 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0B2,Counter/Timer B2 Compare Register 0"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CTRL2,This register holds the control bit fields for both halves of timer 2"
|
|
bitfld.long 0x00 31. "CTLINK2,Counter/Timer A2/B2 Link bit" "0: Use A2/B2 timers as two independent 16-bit..,1: Link A2/B2 timers into a single 32-bit timer"
|
|
bitfld.long 0x00 29. "TMRB2PE,Counter/Timer B2 Output Enable bit" "0: Counter/Timer B holds the TMRPINB signal at..,1: Enable counter/timer B2 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 28. "TMRB2POL,Counter/Timer B2 output polarity" "0: The polarity of the TMRPINB2 pin is the same..,1: The polarity of the TMRPINB2 pin is the.."
|
|
bitfld.long 0x00 27. "TMRB2CLR,Counter/Timer B2 Clear bit" "0: Allow counter/timer B2 to run,1: Holds counter/timer B2 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 26. "TMRB2IE1,Counter/Timer B2 Interrupt Enable bit for COMPR1" "0: Disable counter/timer B2 from generating an..,1: Enable counter/timer B2 to generate an.."
|
|
bitfld.long 0x00 25. "TMRB2IE0,Counter/Timer B2 Interrupt Enable bit for COMPR0" "0: Disable counter/timer B2 from generating an..,1: Enable counter/timer B2 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 22.--24. "TMRB2FN,Counter/Timer B2 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 17.--21. "TMRB2CLK,Counter/Timer B2 Clock Select" "0: Clock source is TMRPINB,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 16. "TMRB2EN,Counter/Timer B2 Enable bit" "0: Counter/Timer B2 Disable,1: Counter/Timer B2 Enable"
|
|
bitfld.long 0x00 13. "TMRA2PE,Counter/Timer A2 Output Enable bit" "0: Counter/Timer A holds the TMRPINA signal at..,1: Enable counter/timer A2 to generate a signal.."
|
|
newline
|
|
bitfld.long 0x00 12. "TMRA2POL,Counter/Timer A2 output polarity" "0: The polarity of the TMRPINA2 pin is the same..,1: The polarity of the TMRPINA2 pin is the.."
|
|
bitfld.long 0x00 11. "TMRA2CLR,Counter/Timer A2 Clear bit" "0: Allow counter/timer A2 to run,1: Holds counter/timer A2 at 0x0000"
|
|
newline
|
|
bitfld.long 0x00 10. "TMRA2IE1,Counter/Timer A2 Interrupt Enable bit based on COMPR1" "0: Disable counter/timer A2 from generating an..,1: Enable counter/timer A2 to generate an.."
|
|
bitfld.long 0x00 9. "TMRA2IE0,Counter/Timer A2 Interrupt Enable bit based on COMPR0" "0: Disable counter/timer A2 from generating an..,1: Enable counter/timer A2 to generate an.."
|
|
newline
|
|
bitfld.long 0x00 6.--8. "TMRA2FN,Counter/Timer A2 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
|
|
bitfld.long 0x00 1.--5. "TMRA2CLK,Counter/Timer A2 Clock Select" "0: Clock source is TMRPINA,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
|
|
newline
|
|
bitfld.long 0x00 0. "TMRA2EN,Counter/Timer A2 Enable bit" "0: Counter/Timer A2 Disable,1: Counter/Timer A2 Enable"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TMR3,Counter/Timer Register"
|
|
hexmask.long.word 0x00 16.--31. 1. "CTTMRB3,Counter/Timer B3"
|
|
hexmask.long.word 0x00 0.--15. 1. "CTTMRA3,Counter/Timer A3"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CMPRA3,This register holds the compare limits for timer half A"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1A3,Counter/Timer A3 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0A3,Counter/Timer A3 Compare Register 0"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CMPRB3,This register holds the compare limits for timer half B"
|
|
hexmask.long.word 0x00 16.--31. 1. "CMPR1B3,Counter/Timer B3 Compare Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "CMPR0B3,Counter/Timer B3 Compare Register 0"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CTRL3,This register holds the control bit fields for both halves of timer 3"
|
|
bitfld.long 0x00 31. "CTLINK3,Counter/Timer A3/B3 Link bit" "0: Use A3/B3 timers as two independent 16-bit..,1: Link A3/B3 timers into a single 32-bit timer"
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bitfld.long 0x00 29. "TMRB3PE,Counter/Timer B3 Output Enable bit" "0: Counter/Timer B holds the TMRPINB signal at..,1: Enable counter/timer B3 to generate a signal.."
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bitfld.long 0x00 28. "TMRB3POL,Counter/Timer B3 output polarity" "0: The polarity of the TMRPINB3 pin is the same..,1: The polarity of the TMRPINB3 pin is the.."
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bitfld.long 0x00 27. "TMRB3CLR,Counter/Timer B3 Clear bit" "0: Allow counter/timer B3 to run,1: Holds counter/timer B3 at 0x0000"
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bitfld.long 0x00 26. "TMRB3IE1,Counter/Timer B3 Interrupt Enable bit for COMPR1" "0: Disable counter/timer B3 from generating an..,1: Enable counter/timer B3 to generate an.."
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bitfld.long 0x00 25. "TMRB3IE0,Counter/Timer B3 Interrupt Enable bit for COMPR0" "0: Disable counter/timer B3 from generating an..,1: Enable counter/timer B3 to generate an.."
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bitfld.long 0x00 22.--24. "TMRB3FN,Counter/Timer B3 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
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bitfld.long 0x00 17.--21. "TMRB3CLK,Counter/Timer B3 Clock Select" "0: Clock source is TMRPINB,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
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bitfld.long 0x00 16. "TMRB3EN,Counter/Timer B3 Enable bit" "0: Counter/Timer B3 Disable,1: Counter/Timer B3 Enable"
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bitfld.long 0x00 15. "ADCEN,Special Timer A3 enable for ADC function" "0,1"
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bitfld.long 0x00 13. "TMRA3PE,Counter/Timer A3 Output Enable bit" "0: Counter/Timer A holds the TMRPINA signal at..,1: Enable counter/timer A3 to generate a signal.."
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bitfld.long 0x00 12. "TMRA3POL,Counter/Timer A3 output polarity" "0: The polarity of the TMRPINA3 pin is the same..,1: The polarity of the TMRPINA3 pin is the.."
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bitfld.long 0x00 11. "TMRA3CLR,Counter/Timer A3 Clear bit" "0: Allow counter/timer A3 to run,1: Holds counter/timer A3 at 0x0000"
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bitfld.long 0x00 10. "TMRA3IE1,Counter/Timer A3 Interrupt Enable bit based on COMPR1" "0: Disable counter/timer A3 from generating an..,1: Enable counter/timer A3 to generate an.."
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bitfld.long 0x00 9. "TMRA3IE0,Counter/Timer A3 Interrupt Enable bit based on COMPR0" "0: Disable counter/timer A3 from generating an..,1: Enable counter/timer A3 to generate an.."
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bitfld.long 0x00 6.--8. "TMRA3FN,Counter/Timer A3 Function Select" "0: Single count (output toggles and sticks),1: Repeated count (periodic 1-clock-cycle-wide..,2: Pulse once (aka one-shot),3: Pulse continously,4: Continuous run (aka Free Run),?..."
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bitfld.long 0x00 1.--5. "TMRA3CLK,Counter/Timer A3 Clock Select" "0: Clock source is TMRPINA,1: Clock source is HFRC / 4,2: Clock source is HFRC / 16,3: Clock source is HFRC / 256,4: Clock source is HFRC / 1024,5: Clock source is HFRC / 4096,6: Clock source is the XT (uncalibrated),7: Clock source is XT / 2,8: Clock source is XT / 16,9: Clock source is XT / 256,10: Clock source is LFRC / 2,11: Clock source is LFRC / 32,12: Clock source is LFRC / 1024,13: Clock source is LFRC,14: Clock source is 100 Hz from the current RTC..,15: Clock source is HCLK,16: Clock source is buck converter stream from..,?..."
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bitfld.long 0x00 0. "TMRA3EN,Counter/Timer A3 Enable bit" "0: Counter/Timer A3 Disable,1: Counter/Timer A3 Enable"
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group.long 0x100++0x03
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line.long 0x00 "STCFG,The STIMER Configuration Register contains the software control for selecting the clock divider and source feeding the system timer"
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bitfld.long 0x00 31. "FREEZE,Set this bit to one to freeze the clock input to the COUNTER register" "0: Let the COUNTER register run on its input clock,1: Stop the COUNTER register for loading"
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bitfld.long 0x00 30. "CLEAR,Set this bit to one to clear the System Timer register" "0: Let the COUNTER register run on its input clock,1: Stop the COUNTER register for loading"
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bitfld.long 0x00 15. "COMPARE_H_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare H disabled,1: Compare H enabled"
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bitfld.long 0x00 14. "COMPARE_G_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare G disabled,1: Compare G enabled"
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bitfld.long 0x00 13. "COMPARE_F_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare F disabled,1: Compare F enabled"
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bitfld.long 0x00 12. "COMPARE_E_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare E disabled,1: Compare E enabled"
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bitfld.long 0x00 11. "COMPARE_D_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare D disabled,1: Compare D enabled"
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bitfld.long 0x00 10. "COMPARE_C_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare C disabled,1: Compare C enabled"
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bitfld.long 0x00 9. "COMPARE_B_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare B disabled,1: Compare B enabled"
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bitfld.long 0x00 8. "COMPARE_A_EN,Selects whether compare is enabled for the corresponding SCMPR register" "0: Compare A disabled,1: Compare A enabled"
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bitfld.long 0x00 0.--3. "CLKSEL,Selects an appropriate clock source and divider to use for the System Timer clock" "0: No clock enabled,1: 3MHz from the HFRC clock divider,2: 187.5KHz from the HFRC clock divider,3: 32768Hz from the crystal oscillator,4: 16384Hz from the crystal oscillator,5: 1024Hz from the crystal oscillator,6: Approximately 1KHz from the LFRC oscillator..,7: Use CTIMER 0 section A as a prescaler for the..,8: Use CTIMER 0 section B (or A and B linked..,?..."
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group.long 0x104++0x03
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line.long 0x00 "STTMR,The COUNTER Register contains the running count of time as maintained by incrementing for every rising clock edge of the clock source selected in the configuration register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Value of the 32-bit counter as it ticks over"
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group.long 0x108++0x03
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line.long 0x00 "CAPTURE_CONTROL,The STIMER Capture Control Register controls each of the 4 capture registers"
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bitfld.long 0x00 3. "CAPTURE_D,Selects whether capture is enabled for the specified capture register" "0: Capture function disabled,1: Capture function enabled"
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bitfld.long 0x00 2. "CAPTURE_C,Selects whether capture is enabled for the specified capture register" "0: Capture function disabled,1: Capture function enabled"
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bitfld.long 0x00 1. "CAPTURE_B,Selects whether capture is enabled for the specified capture register" "0: Capture function disabled,1: Capture function enabled"
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bitfld.long 0x00 0. "CAPTURE_A,Selects whether capture is enabled for the specified capture register" "0: Capture function disabled,1: Capture function enabled"
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group.long 0x110++0x03
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line.long 0x00 "SCMPR0,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_A_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x114++0x03
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line.long 0x00 "SCMPR1,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_B_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x118++0x03
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line.long 0x00 "SCMPR2,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_C_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x11C++0x03
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line.long 0x00 "SCMPR3,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_D_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x120++0x03
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line.long 0x00 "SCMPR4,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_E_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x124++0x03
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line.long 0x00 "SCMPR5,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_F_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x128++0x03
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line.long 0x00 "SCMPR6,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_G_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x12C++0x03
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line.long 0x00 "SCMPR7,The VALUE in this bit field is used to compare against the VALUE in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Compare this value to the value in the COUNTER register according to the match criterion as selected in the COMPARE_H_EN bit in the REG_CTIMER_STCGF register"
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group.long 0x1E0++0x03
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line.long 0x00 "SCAPT0,The STIMER capture Register A grabs the VALUE in the COUNTER register whenever capture condition (event) A is asserted"
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hexmask.long 0x00 0.--31. 1. "VALUE,Whenever the event is detected the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set"
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group.long 0x1E4++0x03
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line.long 0x00 "SCAPT1,The STIMER capture Register B grabs the VALUE in the COUNTER register whenever capture condition (event) B is asserted"
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hexmask.long 0x00 0.--31. 1. "VALUE,Whenever the event is detected the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set"
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group.long 0x1E8++0x03
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line.long 0x00 "SCAPT2,The STIMER capture Register C grabs the VALUE in the COUNTER register whenever capture condition (event) C is asserted"
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hexmask.long 0x00 0.--31. 1. "VALUE,Whenever the event is detected the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set"
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group.long 0x1EC++0x03
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line.long 0x00 "SCAPT3,The STIMER capture Register D grabs the VALUE in the COUNTER register whenever capture condition (event) D is asserted"
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hexmask.long 0x00 0.--31. 1. "VALUE,Whenever the event is detected the value in the COUNTER is copied into this register and the corresponding interrupt status bit is set"
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group.long 0x1F0++0x03
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line.long 0x00 "SNVR0,The NVRAM_A Register contains a portion of the stored epoch offset associated with the time in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Value of the 32-bit counter as it ticks over"
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group.long 0x1F4++0x03
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line.long 0x00 "SNVR1,The NVRAM_B Register contains a portion of the stored epoch offset associated with the time in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Value of the 32-bit counter as it ticks over"
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group.long 0x1F8++0x03
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line.long 0x00 "SNVR2,The NVRAM_C Register contains a portion of the stored epoch offset associated with the time in the COUNTER register"
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hexmask.long 0x00 0.--31. 1. "VALUE,Value of the 32-bit counter as it ticks over"
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group.long 0x200++0x03
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line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
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bitfld.long 0x00 15. "CTMRB3C1INT,Counter/Timer B3 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 14. "CTMRA3C1INT,Counter/Timer A3 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 13. "CTMRB2C1INT,Counter/Timer B2 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 12. "CTMRA2C1INT,Counter/Timer A2 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 11. "CTMRB1C1INT,Counter/Timer B1 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 10. "CTMRA1C1INT,Counter/Timer A1 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 9. "CTMRB0C1INT,Counter/Timer B0 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 8. "CTMRA0C1INT,Counter/Timer A0 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 7. "CTMRB3C0INT,Counter/Timer B3 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 6. "CTMRA3C0INT,Counter/Timer A3 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 5. "CTMRB2C0INT,Counter/Timer B2 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 4. "CTMRA2C0INT,Counter/Timer A2 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 3. "CTMRB1C0INT,Counter/Timer B1 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 2. "CTMRA1C0INT,Counter/Timer A1 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 1. "CTMRB0C0INT,Counter/Timer B0 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 0. "CTMRA0C0INT,Counter/Timer A0 interrupt based on COMPR0" "0,1"
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group.long 0x204++0x03
|
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line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
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bitfld.long 0x00 15. "CTMRB3C1INT,Counter/Timer B3 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 14. "CTMRA3C1INT,Counter/Timer A3 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 13. "CTMRB2C1INT,Counter/Timer B2 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 12. "CTMRA2C1INT,Counter/Timer A2 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 11. "CTMRB1C1INT,Counter/Timer B1 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 10. "CTMRA1C1INT,Counter/Timer A1 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 9. "CTMRB0C1INT,Counter/Timer B0 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 8. "CTMRA0C1INT,Counter/Timer A0 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 7. "CTMRB3C0INT,Counter/Timer B3 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 6. "CTMRA3C0INT,Counter/Timer A3 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 5. "CTMRB2C0INT,Counter/Timer B2 interrupt based on COMPR0" "0,1"
|
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bitfld.long 0x00 4. "CTMRA2C0INT,Counter/Timer A2 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 3. "CTMRB1C0INT,Counter/Timer B1 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 2. "CTMRA1C0INT,Counter/Timer A1 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 1. "CTMRB0C0INT,Counter/Timer B0 interrupt based on COMPR0" "0,1"
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bitfld.long 0x00 0. "CTMRA0C0INT,Counter/Timer A0 interrupt based on COMPR0" "0,1"
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group.long 0x208++0x03
|
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line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
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bitfld.long 0x00 15. "CTMRB3C1INT,Counter/Timer B3 interrupt based on COMPR1" "0,1"
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bitfld.long 0x00 14. "CTMRA3C1INT,Counter/Timer A3 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 13. "CTMRB2C1INT,Counter/Timer B2 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 12. "CTMRA2C1INT,Counter/Timer A2 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 11. "CTMRB1C1INT,Counter/Timer B1 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 10. "CTMRA1C1INT,Counter/Timer A1 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 9. "CTMRB0C1INT,Counter/Timer B0 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 8. "CTMRA0C1INT,Counter/Timer A0 interrupt based on COMPR1" "0,1"
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|
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bitfld.long 0x00 7. "CTMRB3C0INT,Counter/Timer B3 interrupt based on COMPR0" "0,1"
|
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bitfld.long 0x00 6. "CTMRA3C0INT,Counter/Timer A3 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 5. "CTMRB2C0INT,Counter/Timer B2 interrupt based on COMPR0" "0,1"
|
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bitfld.long 0x00 4. "CTMRA2C0INT,Counter/Timer A2 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 3. "CTMRB1C0INT,Counter/Timer B1 interrupt based on COMPR0" "0,1"
|
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bitfld.long 0x00 2. "CTMRA1C0INT,Counter/Timer A1 interrupt based on COMPR0" "0,1"
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|
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bitfld.long 0x00 1. "CTMRB0C0INT,Counter/Timer B0 interrupt based on COMPR0" "0,1"
|
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bitfld.long 0x00 0. "CTMRA0C0INT,Counter/Timer A0 interrupt based on COMPR0" "0,1"
|
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group.long 0x20C++0x03
|
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line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 15. "CTMRB3C1INT,Counter/Timer B3 interrupt based on COMPR1" "0,1"
|
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bitfld.long 0x00 14. "CTMRA3C1INT,Counter/Timer A3 interrupt based on COMPR1" "0,1"
|
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|
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bitfld.long 0x00 13. "CTMRB2C1INT,Counter/Timer B2 interrupt based on COMPR1" "0,1"
|
|
bitfld.long 0x00 12. "CTMRA2C1INT,Counter/Timer A2 interrupt based on COMPR1" "0,1"
|
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|
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bitfld.long 0x00 11. "CTMRB1C1INT,Counter/Timer B1 interrupt based on COMPR1" "0,1"
|
|
bitfld.long 0x00 10. "CTMRA1C1INT,Counter/Timer A1 interrupt based on COMPR1" "0,1"
|
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|
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bitfld.long 0x00 9. "CTMRB0C1INT,Counter/Timer B0 interrupt based on COMPR1" "0,1"
|
|
bitfld.long 0x00 8. "CTMRA0C1INT,Counter/Timer A0 interrupt based on COMPR1" "0,1"
|
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|
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bitfld.long 0x00 7. "CTMRB3C0INT,Counter/Timer B3 interrupt based on COMPR0" "0,1"
|
|
bitfld.long 0x00 6. "CTMRA3C0INT,Counter/Timer A3 interrupt based on COMPR0" "0,1"
|
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|
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bitfld.long 0x00 5. "CTMRB2C0INT,Counter/Timer B2 interrupt based on COMPR0" "0,1"
|
|
bitfld.long 0x00 4. "CTMRA2C0INT,Counter/Timer A2 interrupt based on COMPR0" "0,1"
|
|
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|
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bitfld.long 0x00 3. "CTMRB1C0INT,Counter/Timer B1 interrupt based on COMPR0" "0,1"
|
|
bitfld.long 0x00 2. "CTMRA1C0INT,Counter/Timer A1 interrupt based on COMPR0" "0,1"
|
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|
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bitfld.long 0x00 1. "CTMRB0C0INT,Counter/Timer B0 interrupt based on COMPR0" "0,1"
|
|
bitfld.long 0x00 0. "CTMRA0C0INT,Counter/Timer A0 interrupt based on COMPR0" "0,1"
|
|
group.long 0x300++0x03
|
|
line.long 0x00 "STMINTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 12. "CAPTURED,CAPTURE register D has grabbed the value in the counter" "?,1: Capture D interrupt status bit was set"
|
|
bitfld.long 0x00 11. "CAPTUREC,CAPTURE register C has grabbed the value in the counter" "?,1: CAPTURE C interrupt status bit was set"
|
|
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|
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bitfld.long 0x00 10. "CAPTUREB,CAPTURE register B has grabbed the value in the counter" "?,1: CAPTURE B interrupt status bit was set"
|
|
bitfld.long 0x00 9. "CAPTUREA,CAPTURE register A has grabbed the value in the counter" "?,1: CAPTURE A interrupt status bit was set"
|
|
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|
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bitfld.long 0x00 8. "OVERFLOW,COUNTER over flowed from 0xFFFFFFFF back to 0x00000000" "?,1: Overflow interrupt status bit was set"
|
|
bitfld.long 0x00 7. "COMPAREH,COUNTER is greater than or equal to COMPARE register H" "?,1: COUNTER greater than or equal to COMPARE.."
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newline
|
|
bitfld.long 0x00 6. "COMPAREG,COUNTER is greater than or equal to COMPARE register G" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 5. "COMPAREF,COUNTER is greater than or equal to COMPARE register F" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 4. "COMPAREE,COUNTER is greater than or equal to COMPARE register E" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 3. "COMPARED,COUNTER is greater than or equal to COMPARE register D" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 2. "COMPAREC,COUNTER is greater than or equal to COMPARE register C" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 1. "COMPAREB,COUNTER is greater than or equal to COMPARE register B" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPAREA,COUNTER is greater than or equal to COMPARE register A" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "STMINTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 12. "CAPTURED,CAPTURE register D has grabbed the value in the counter" "?,1: Capture D interrupt status bit was set"
|
|
bitfld.long 0x00 11. "CAPTUREC,CAPTURE register C has grabbed the value in the counter" "?,1: CAPTURE C interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 10. "CAPTUREB,CAPTURE register B has grabbed the value in the counter" "?,1: CAPTURE B interrupt status bit was set"
|
|
bitfld.long 0x00 9. "CAPTUREA,CAPTURE register A has grabbed the value in the counter" "?,1: CAPTURE A interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 8. "OVERFLOW,COUNTER over flowed from 0xFFFFFFFF back to 0x00000000" "?,1: Overflow interrupt status bit was set"
|
|
bitfld.long 0x00 7. "COMPAREH,COUNTER is greater than or equal to COMPARE register H" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 6. "COMPAREG,COUNTER is greater than or equal to COMPARE register G" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 5. "COMPAREF,COUNTER is greater than or equal to COMPARE register F" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 4. "COMPAREE,COUNTER is greater than or equal to COMPARE register E" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 3. "COMPARED,COUNTER is greater than or equal to COMPARE register D" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 2. "COMPAREC,COUNTER is greater than or equal to COMPARE register C" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 1. "COMPAREB,COUNTER is greater than or equal to COMPARE register B" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPAREA,COUNTER is greater than or equal to COMPARE register A" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
group.long 0x308++0x03
|
|
line.long 0x00 "STMINTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 12. "CAPTURED,CAPTURE register D has grabbed the value in the counter" "?,1: Capture D interrupt status bit was set"
|
|
bitfld.long 0x00 11. "CAPTUREC,CAPTURE register C has grabbed the value in the counter" "?,1: CAPTURE C interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 10. "CAPTUREB,CAPTURE register B has grabbed the value in the counter" "?,1: CAPTURE B interrupt status bit was set"
|
|
bitfld.long 0x00 9. "CAPTUREA,CAPTURE register A has grabbed the value in the counter" "?,1: CAPTURE A interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 8. "OVERFLOW,COUNTER over flowed from 0xFFFFFFFF back to 0x00000000" "?,1: Overflow interrupt status bit was set"
|
|
bitfld.long 0x00 7. "COMPAREH,COUNTER is greater than or equal to COMPARE register H" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 6. "COMPAREG,COUNTER is greater than or equal to COMPARE register G" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 5. "COMPAREF,COUNTER is greater than or equal to COMPARE register F" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 4. "COMPAREE,COUNTER is greater than or equal to COMPARE register E" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 3. "COMPARED,COUNTER is greater than or equal to COMPARE register D" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 2. "COMPAREC,COUNTER is greater than or equal to COMPARE register C" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 1. "COMPAREB,COUNTER is greater than or equal to COMPARE register B" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPAREA,COUNTER is greater than or equal to COMPARE register A" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
group.long 0x30C++0x03
|
|
line.long 0x00 "STMINTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 12. "CAPTURED,CAPTURE register D has grabbed the value in the counter" "?,1: Capture D interrupt status bit was set"
|
|
bitfld.long 0x00 11. "CAPTUREC,CAPTURE register C has grabbed the value in the counter" "?,1: CAPTURE C interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 10. "CAPTUREB,CAPTURE register B has grabbed the value in the counter" "?,1: CAPTURE B interrupt status bit was set"
|
|
bitfld.long 0x00 9. "CAPTUREA,CAPTURE register A has grabbed the value in the counter" "?,1: CAPTURE A interrupt status bit was set"
|
|
newline
|
|
bitfld.long 0x00 8. "OVERFLOW,COUNTER over flowed from 0xFFFFFFFF back to 0x00000000" "?,1: Overflow interrupt status bit was set"
|
|
bitfld.long 0x00 7. "COMPAREH,COUNTER is greater than or equal to COMPARE register H" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 6. "COMPAREG,COUNTER is greater than or equal to COMPARE register G" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 5. "COMPAREF,COUNTER is greater than or equal to COMPARE register F" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 4. "COMPAREE,COUNTER is greater than or equal to COMPARE register E" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 3. "COMPARED,COUNTER is greater than or equal to COMPARE register D" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 2. "COMPAREC,COUNTER is greater than or equal to COMPARE register C" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
bitfld.long 0x00 1. "COMPAREB,COUNTER is greater than or equal to COMPARE register B" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
newline
|
|
bitfld.long 0x00 0. "COMPAREA,COUNTER is greater than or equal to COMPARE register A" "?,1: COUNTER greater than or equal to COMPARE.."
|
|
tree.end
|
|
tree "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
|
|
base ad:0x40010000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PADREGA,This register controls the pad configuration controls for PAD3 through PAD0"
|
|
bitfld.long 0x00 27.--29. "PAD3FNCSEL,Pad 3 function select" "0: Configure as the UART0 RTS output,1: Configure as the IOSLAVE SPI nCE signal,2: Configure as the SPI channel 4 nCE signal..,3: Configure as GPIO3,4: Configure as the IOSLAVE SPI nCE loopback..,5: Configure as the SPI channel 0 nCE signal..,6: Configure as the ADC Trigger 1 signal,7: Configure as the I2S Word Clock input"
|
|
bitfld.long 0x00 26. "PAD3STRNG,Pad 3 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 25. "PAD3INPEN,Pad 3 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD3PULL,Pad 3 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--21. "PAD2FNCSEL,Pad 2 function select" "0: Configure as the IOSLAVE SPI 3-wire MOSI/MISO..,1: Configure as the IOSLAVE SPI MOSI signal,2: Configure as the UART0 RX input,3: Configure as GPIO2,4: Configure as the IOSLAVE SPI MOSI loopback..,5: Configure as the IOMSTR2 SPI MOSI output signal,6: Configure as the IOSLAVE SPI 3-wire MOSI/MISO..,7: Configure as the IOMSTR2 SPI 3-wire MOSI/MISO.."
|
|
bitfld.long 0x00 18. "PAD2STRNG,Pad 2 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 17. "PAD2INPEN,Pad 2 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD2PULL,Pad 2 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PAD1RSEL,Pad 1 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
bitfld.long 0x00 11.--13. "PAD1FNCSEL,Pad 1 function select" "0: Configure as the IOSLAVE I2C SDA signal,1: Configure as the IOSLAVE SPI MISO signal,2: Configure as the UART0 TX output signal,3: Configure as GPIO1,4: Configure as the IOSLAVE SPI MISO loopback..,5: Configure as the IOMSTR2 SPI MISO input signal,6: Configure as the IOSLAVE I2C SDA loopback..,7: Configure as the IOMSTR2 I2C Serial data I/O.."
|
|
newline
|
|
bitfld.long 0x00 10. "PAD1STRNG,Pad 1 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 9. "PAD1INPEN,Pad 1 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PAD1PULL,Pad 1 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 6.--7. "PAD0RSEL,Pad 0 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PAD0FNCSEL,Pad 0 function select" "0: Configure as the IOSLAVE I2C SCL signal,1: Configure as the IOSLAVE SPI SCK signal,2: Configure as the CLKOUT signal,3: Configure as GPIO0,4: Configure as the IOSLAVE SPI SCK loopback..,5: Configure as the IOMSTR2 SPI SCK output,6: Configure as the IOSLAVE I2C SCL loopback..,7: Configure as the IOMSTR2 I2C SCL clock I/O.."
|
|
bitfld.long 0x00 2. "PAD0STRNG,Pad 0 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD0INPEN,Pad 0 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD0PULL,Pad 0 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "PADREGB,This register controls the pad configuration controls for PAD7 through PAD4"
|
|
bitfld.long 0x00 27.--29. "PAD7FNCSEL,Pad 7 function select" "0: Configure as the IOMSTR0 SPI 3-wire MOSI/MISO..,1: Configure as the IOMSTR0 SPI MOSI signal,2: Configure as the CLKOUT signal,3: Configure as GPIO7,4: Configure as the ADC Trigger 0 signal,5: Configure as the UART0 TX output signal,6: Configure as the IOMSTR0 SPI 3-wire MOSI/MISO..,7: Configure as the SPI channel 1 nCE signal.."
|
|
bitfld.long 0x00 26. "PAD7STRNG,Pad 7 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 25. "PAD7INPEN,Pad 7 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD7PULL,Pad 7 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "PAD6RSEL,Pad 6 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
bitfld.long 0x00 19.--21. "PAD6FNCSEL,Pad 6 function select" "0: Configure as the IOMSTR0 I2C SDA signal,1: Configure as the IOMSTR0 SPI MISO signal,2: Configure as the UART0 CTS input signal,3: Configure as GPIO6,4: Configure as the IOMSTR0 SPI MISO loopback..,5: Configure as the SPI channel 0 nCE signal..,6: Configure as the IOMSTR0 I2C SDA loopback..,7: Configure as the I2S Data output signal"
|
|
newline
|
|
bitfld.long 0x00 18. "PAD6STRNG,Pad 6 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 17. "PAD6INPEN,Pad 6 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "PAD6PULL,Pad 6 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 14.--15. "PAD5RSEL,Pad 5 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
newline
|
|
bitfld.long 0x00 11.--13. "PAD5FNCSEL,Pad 5 function select" "0: Configure as the IOMSTR0 I2C SCL signal,1: Configure as the IOMSTR0 SPI SCK signal,2: Configure as the UART0 RTS signal output,3: Configure as GPIO5,4: Configure as the IOMSTR0 SPI SCK loopback..,5: Configure as the External HFA input clock,6: Configure as the IOMSTR0 I2C SCL loopback..,7: Configure as the SPI Channel 2 nCE signal.."
|
|
bitfld.long 0x00 10. "PAD5STRNG,Pad 5 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 9. "PAD5INPEN,Pad 5 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 8. "PAD5PULL,Pad 5 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 7. "PAD4PWRDN,Pad 4 VSS power switch enable" "0: Power switch disabled,1: Power switch enabled (switch to GND)"
|
|
bitfld.long 0x00 3.--5. "PAD4FNCSEL,Pad 4 function select" "0: Configure as the UART0 CTS input signal,1: Configure as the IOSLAVE interrupt out signal,2: Configure as the SPI channel 5 nCE signal..,3: Configure as GPIO4,4: Configure as the IOSLAVE interrupt loopback..,5: Configure as the SPI channel 5 nCE signal..,6: Configure as the CLKOUT signal,7: Configure as the 32kHz crystal output signal"
|
|
newline
|
|
bitfld.long 0x00 2. "PAD4STRNG,Pad 4 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 1. "PAD4INPEN,Pad 4 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PAD4PULL,Pad 4 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PADREGC,This register controls the pad configuration controls for PAD11 through PAD8"
|
|
bitfld.long 0x00 27.--29. "PAD11FNCSEL,Pad 11 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 0 nCE signal..,2: Configure as the CLKOUT signal,3: Configure as GPIO11,4: Configure as the SPI channel 7 nCE signal..,5: Configure as the UART1 CTS input signal,6: Configure as the UART0 RX input signal,7: Configure as the PDM Data input signal"
|
|
bitfld.long 0x00 26. "PAD11STRNG,Pad 11 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 25. "PAD11INPEN,Pad 11 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD11PULL,Pad 11 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--21. "PAD10FNCSEL,Pad 10 function select" "0: Configure as the IOMSTR1 SPI 3-wire MOSI/MISO..,1: Configure as the IOMSTR1 SPI MOSI signal,2: Configure as the SPI channel 6 nCE signal..,3: Configure as GPIO10,4: Configure as the SPI channel 6 nCE signal..,5: Configure as the UART1 RTS output signal,6: Configure as the SPI channel 4 nCE signal..,7: Configure as the IOMSTR1 SPI 3-wire MOSI/MISO.."
|
|
bitfld.long 0x00 18. "PAD10STRNG,Pad 10 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 17. "PAD10INPEN,Pad 10 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD10PULL,Pad 10 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "PAD9RSEL,Pad 9 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
bitfld.long 0x00 11.--13. "PAD9FNCSEL,Pad 9 function select" "0: Configure as the IOMSTR1 I2C SDA signal,1: Configure as the IOMSTR1 SPI MISO signal,2: Configure as the SPI channel 5 nCE signal..,3: Configure as GPIO9,4: Configure as the SPI channel 5 nCE signal..,5: Configure as the IOMSTR1 SPI MISO loopback..,6: Configure as UART1 RX input signal,7: Configure as the IOMSTR1 I2C SDA loopback.."
|
|
newline
|
|
bitfld.long 0x00 10. "PAD9STRNG,Pad 9 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 9. "PAD9INPEN,Pad 9 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PAD9PULL,Pad 9 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 6.--7. "PAD8RSEL,Pad 8 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PAD8FNCSEL,Pad 8 function select" "0: Configure as the IOMSTR1 I2C SCL signal,1: Configure as the IOMSTR1 SPI SCK signal,2: Configure as the SPI channel 4 nCE signal..,3: Configure as GPIO8,4: Configure as the SPI channel 4 nCE signal..,5: Configure as the IOMSTR1 SPI SCK loopback..,6: Configure as the UART1 TX output signal,7: Configure as the IOMSTR1 I2C SCL loopback.."
|
|
bitfld.long 0x00 2. "PAD8STRNG,Pad 8 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD8INPEN,Pad 8 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD8PULL,Pad 8 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PADREGD,This register controls the pad configuration controls for PAD15 through PAD12"
|
|
bitfld.long 0x00 27.--29. "PAD15FNCSEL,Pad 15 function select" "0: Configure as the analog ADC differential pair..,1: Configure as the SPI channel 3 nCE signal..,2: Configure as the UART1 RX signal,3: Configure as GPIO15,4: Configure as the SPI Channel 2 nCE signal..,5: Configure as the external XTAL oscillator input,6: Configure as an alternate port for the SWDIO..,7: Configure as an SWO (Serial Wire Trace output)"
|
|
bitfld.long 0x00 26. "PAD15STRNG,Pad 15 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 25. "PAD15INPEN,Pad 15 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD15PULL,Pad 15 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--21. "PAD14FNCSEL,Pad 14 function select" "0: Configure as the analog ADC differential pair..,1: Configure as the SPI channel 2 nCE signal..,2: Configure as the UART1 TX output signal,3: Configure as GPIO14,4: Configure as the SPI channel 1 nCE signal..,5: Configure as the External HFRC oscillator..,6: Configure as the alternate input for the..,7: Configure as the 32kHz crystal output signal"
|
|
bitfld.long 0x00 18. "PAD14STRNG,Pad 14 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 17. "PAD14INPEN,Pad 14 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD14PULL,Pad 14 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 11.--13. "PAD13FNCSEL,Pad 13 function select" "0: Configure as the ADC Differential pair 0 P or..,1: Configure as the SPI channel 1 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO13,4: Configure as the SPI channel 3 nCE signal..,5: Configure as the external HFRC oscillator input,6: Configure as the UART0 RTS signal output,7: Configure as the UART1 RX input signal"
|
|
bitfld.long 0x00 10. "PAD13STRNG,Pad 13 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 9. "PAD13INPEN,Pad 13 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 8. "PAD13PULL,Pad 13 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PAD12FNCSEL,Pad 12 function select" "0: Configure as the ADC Differential pair 0 N or..,1: Configure as the SPI channel 0 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO12,4: Configure as CLKOUT signal,5: Configure as the PDM CLK output signal,6: Configure as the UART0 CTS input signal,7: Configure as the UART1 TX output signal"
|
|
bitfld.long 0x00 2. "PAD12STRNG,Pad 12 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD12INPEN,Pad 12 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD12PULL,Pad 12 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
group.long 0x10++0x03
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|
line.long 0x00 "PADREGE,This register controls the pad configuration controls for PAD19 through PAD16"
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|
bitfld.long 0x00 27.--29. "PAD19FNCSEL,Pad 19 function select" "0: Configure as the analog comparator reference..,1: Configure as the SPI channel 3 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO19,4: Configure as the input/output signal from..,5: Configure as the ANATEST1 I/O signal,6: Configure as the UART1 RX input signal,7: Configure as the I2S Byte clock input signal"
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|
bitfld.long 0x00 26. "PAD19STRNG,Pad 19 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 25. "PAD19INPEN,Pad 19 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 24. "PAD19PULL,Pad 19 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
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bitfld.long 0x00 19.--21. "PAD18FNCSEL,Pad 18 function select" "0: Configure as the analog comparator input 1..,1: Configure as the SPI channel 2 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO18,4: Configure as the SPI nCE channel 1 from IOMSTR4,5: Configure as ANATEST2 I/O signal,6: Configure as UART1 TX output signal,7: Configure as the 32kHz output clock from the.."
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bitfld.long 0x00 18. "PAD18STRNG,Pad 18 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
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|
bitfld.long 0x00 17. "PAD18INPEN,Pad 18 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 16. "PAD18PULL,Pad 18 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
|
bitfld.long 0x00 11.--13. "PAD17FNCSEL,Pad 17 function select" "0: Configure as the analog comparator reference..,1: Configure as the SPI channel 1 nCE signal..,2: Configure as the ADC Trigger 1 signal,3: Configure as GPIO17,4: Configure as the SPI channel 3 nCE signal..,5: Configure as external LFRC oscillator input,6: Configure as UART0 RX input signal,7: Configure as UART1 CTS input signal"
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bitfld.long 0x00 10. "PAD17STRNG,Pad 17 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
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bitfld.long 0x00 9. "PAD17INPEN,Pad 17 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 8. "PAD17PULL,Pad 17 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
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bitfld.long 0x00 3.--5. "PAD16FNCSEL,Pad 16 function select" "0: Configure as the analog ADC single ended port..,1: Configure as the SPI channel 4 nCE signal..,2: Configure as the ADC Trigger 0 signal,3: Configure as GPIO16,4: Configure as SPI channel 3 nCE for IOMSTR2,5: Configure as comparator input 0 signal,6: Configure as UART0 TX output signal,7: Configure as UART1 RTS output signal"
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|
bitfld.long 0x00 2. "PAD16STRNG,Pad 16 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 1. "PAD16INPEN,Pad 16 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 0. "PAD16PULL,Pad 16 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
group.long 0x14++0x03
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|
line.long 0x00 "PADREGF,This register controls the pad configuration controls for PAD23 through PAD20"
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|
bitfld.long 0x00 27.--29. "PAD23FNCSEL,Pad 23 function select" "0: Configure as the UART0 RX signal,1: Configure as the SPI channel 0 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO23,4: Configure as PDM Data input to the PDM module,5: Configure as voltage comparitor output,6: Configure as the input/output signal from..,7: Undefined/should not be used"
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|
bitfld.long 0x00 26. "PAD23STRNG,Pad 23 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 25. "PAD23INPEN,Pad 23 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD23PULL,Pad 23 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
|
bitfld.long 0x00 23. "PAD22PWRUP,Pad 22 upper power switch enable" "0: Power switch disabled,1: Power switch enabled"
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|
bitfld.long 0x00 19.--21. "PAD22FNCSEL,Pad 22 function select" "0: Configure as the UART0 TX signal,1: Configure as the SPI channel 7 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO22,4: Configure as the PDM CLK output,5: Undefined/should not be used,6: Configure as the input/output signal from..,7: Configure as the serial trace data output.."
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|
newline
|
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bitfld.long 0x00 18. "PAD22STRNG,Pad 22 drive strength" "0: Low drive strength,1: High drive strength"
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|
bitfld.long 0x00 17. "PAD22INPEN,Pad 22 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
newline
|
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bitfld.long 0x00 16. "PAD22PULL,Pad 22 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
bitfld.long 0x00 11.--13. "PAD21FNCSEL,Pad 21 function select" "0: Configure as the serial wire debug data signal,1: Configure as the SPI channel 6 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO21,4: Configure as UART0 RX input signal,5: Configure as UART1 RX input signal,6: Undefined/should not be used,7: Undefined/should not be used"
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|
newline
|
|
bitfld.long 0x00 10. "PAD21STRNG,Pad 21 drive strength" "0: Low drive strength,1: High drive strength"
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|
bitfld.long 0x00 9. "PAD21INPEN,Pad 21 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
newline
|
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bitfld.long 0x00 8. "PAD21PULL,Pad 21 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
bitfld.long 0x00 3.--5. "PAD20FNCSEL,Pad 20 function select" "0: Configure as the serial wire debug clock signal,1: Configure as the SPI channel 5 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO20,4: Configure as UART0 TX output signal,5: Configure as UART1 TX output signal,6: Undefined/should not be used,7: Undefined/should not be used"
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|
newline
|
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bitfld.long 0x00 2. "PAD20STRNG,Pad 20 drive strength" "0: Low drive strength,1: High drive strength"
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|
bitfld.long 0x00 1. "PAD20INPEN,Pad 20 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
newline
|
|
bitfld.long 0x00 0. "PAD20PULL,Pad 20 pulldown enable" "0: Pulldown disabled,1: Pulldown enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PADREGG,This register controls the pad configuration controls for PAD27 through PAD24"
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|
bitfld.long 0x00 30.--31. "PAD27RSEL,Pad 27 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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bitfld.long 0x00 27.--29. "PAD27FNCSEL,Pad 27 function select" "0: Configure as the external HFRC oscillator input,1: Configure as the SPI channel 4 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO27,4: Configure as I2C clock I/O signal from IOMSTR2,5: Configure as SPI clock output signal from..,6: Configure as IOMSTR2 SPI SCK loopback signal..,7: Configure as IOMSTR2 I2C SCL loopback signal.."
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|
newline
|
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bitfld.long 0x00 26. "PAD27STRNG,Pad 27 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 25. "PAD27INPEN,Pad 27 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
newline
|
|
bitfld.long 0x00 24. "PAD27PULL,Pad 27 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
bitfld.long 0x00 19.--21. "PAD26FNCSEL,Pad 26 function select" "0: Configure as the external LFRC oscillator input,1: Configure as the SPI channel 3 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO26,4: Configure as the SPI channel 0 nCE signal..,5: Configure as the input/output signal from..,6: Configure as the SPI channel 1 nCE signal..,7: Configure as the SPI channel 0 nCE signal.."
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|
newline
|
|
bitfld.long 0x00 18. "PAD26STRNG,Pad 26 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 17. "PAD26INPEN,Pad 26 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "PAD26PULL,Pad 26 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 14.--15. "PAD25RSEL,Pad 25 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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|
newline
|
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bitfld.long 0x00 11.--13. "PAD25FNCSEL,Pad 25 function select" "0: Configure as the external XTAL oscillator input,1: Configure as the SPI channel 2 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO25,4: Configure as the IOMSTR2 I2C Serial data I/O..,5: Configure as the IOMSTR2 SPI MISO input signal,6: Configure as the IOMSTR0 SPI MISO loopback..,7: Configure as the IOMSTR0 I2C SDA loopback.."
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|
bitfld.long 0x00 10. "PAD25STRNG,Pad 25 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 9. "PAD25INPEN,Pad 25 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 8. "PAD25PULL,Pad 25 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
|
bitfld.long 0x00 3.--5. "PAD24FNCSEL,Pad 24 function select" "0: Configure as the SPI channel 1 nCE signal..,1: Configure as the SPI channel 1 nCE signal..,2: Configure as the CLKOUT signal,3: Configure as GPIO24,4: Configure as the SPI channel 0 nCE signal..,5: Configure as the input/output signal from..,6: Configure as the I2S Byte clock input signal,7: Configure as the serial trace data output.."
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|
bitfld.long 0x00 2. "PAD24STRNG,Pad 24 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
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bitfld.long 0x00 1. "PAD24INPEN,Pad 24 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD24PULL,Pad 24 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
group.long 0x1C++0x03
|
|
line.long 0x00 "PADREGH,This register controls the pad configuration controls for PAD31 through PAD28"
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|
bitfld.long 0x00 27.--29. "PAD31FNCSEL,Pad 31 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 4 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO31,4: Configure as the UART0 RX input signal,5: Configure as the input/output signal from..,6: Undefined/should not be used,7: Undefined/should not be used"
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|
bitfld.long 0x00 26. "PAD31STRNG,Pad 31 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
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bitfld.long 0x00 25. "PAD31INPEN,Pad 31 input enable" "0: Pad input disabled,1: Pad input enabled"
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|
bitfld.long 0x00 24. "PAD31PULL,Pad 31 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
|
bitfld.long 0x00 19.--21. "PAD30FNCSEL,Pad 30 function select" "0: Undefined/should not be used,1: Configure as the SPI channel 7 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO30,4: Configure as UART0 TX output signal,5: Configure as UART1 RTS output signal,6: Undefined/should not be used,7: Configure as the I2S Data output signal"
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|
bitfld.long 0x00 18. "PAD30STRNG,Pad 30 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 17. "PAD30INPEN,Pad 30 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD30PULL,Pad 30 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
|
bitfld.long 0x00 11.--13. "PAD29FNCSEL,Pad 29 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 6 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO29,4: Configure as the UART0 CTS signal,5: Configure as the UART1 CTS signal,6: Configure as the SPI channel 0 nCE signal..,7: Configure as PDM DATA input"
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|
bitfld.long 0x00 10. "PAD29STRNG,Pad 29 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 9. "PAD29INPEN,Pad 29 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 8. "PAD29PULL,Pad 29 pullup enable" "0: Pullup disabled,1: Pullup enabled"
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|
newline
|
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bitfld.long 0x00 3.--5. "PAD28FNCSEL,Pad 28 function select" "0: Configure as the I2S Word Clock input,1: Configure as the SPI channel 5 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO28,4: Configure as the IOMSTR2 SPI 3-wire MOSI/MISO..,5: Configure as the IOMSTR2 SPI MOSI output signal,6: Configure as the SPI channel 3 nCE signal..,7: Configure as the IOMSTR2 SPI 3-wire MOSI/MISO.."
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bitfld.long 0x00 2. "PAD28STRNG,Pad 28 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD28INPEN,Pad 28 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD28PULL,Pad 28 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "PADREGI,This register controls the pad configuration controls for PAD35 through PAD32"
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|
bitfld.long 0x00 27.--29. "PAD35FNCSEL,Pad 35 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 0 nCE signal..,2: Configure as the UART1 TX signal,3: Configure as GPIO35,4: Configure as the SPI channel 6 nCE signal..,5: Configure as the input/output signal from..,6: Configure as the UART0 RTS output,7: Configure as the SPI channel 2 nCE signal.."
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|
bitfld.long 0x00 26. "PAD35STRNG,Pad 35 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 25. "PAD35INPEN,Pad 35 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD35PULL,Pad 35 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--21. "PAD34FNCSEL,Pad 34 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 7 nCE signal..,2: Configure as the SPI channel 3 nCE signal..,3: Configure as GPIO34,4: Configure as the analog comparator reference..,5: Configure as the SPI channel 1 nCE signal..,6: Configure as the SPI channel 0 nCE signal..,7: Configure as the SPI channel 2 nCE signal.."
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|
bitfld.long 0x00 18. "PAD34STRNG,Pad 34 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 17. "PAD34INPEN,Pad 34 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD34PULL,Pad 34 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 11.--13. "PAD33FNCSEL,Pad 33 function select" "0: Configure as the analog ADC single ended port..,1: Configure as the SPI channel 6 nCE signal..,2: Configure as the 32kHz crystal output signal,3: Configure as GPIO33,4: Undefined/should not be used,5: Configure as the SPI channel 7 nCE signal..,6: Configure as the input/output signal from..,7: Configure as the serial trace data output.."
|
|
bitfld.long 0x00 10. "PAD33STRNG,Pad 33 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
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bitfld.long 0x00 9. "PAD33INPEN,Pad 33 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 8. "PAD33PULL,Pad 33 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
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bitfld.long 0x00 3.--5. "PAD32FNCSEL,Pad 32 function select" "0: Configure as the analog input for ADC single..,1: Configure as the SPI channel 5 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO32,4: Undefined/should not be used,5: Configure as the input/output signal from..,6: Undefined/should not be used,7: Undefined/should not be used"
|
|
bitfld.long 0x00 2. "PAD32STRNG,Pad 32 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
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bitfld.long 0x00 1. "PAD32INPEN,Pad 32 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD32PULL,Pad 32 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "PADREGJ,This register controls the pad configuration controls for PAD39 through PAD36"
|
|
bitfld.long 0x00 30.--31. "PAD39RSEL,Pad 39 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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|
bitfld.long 0x00 27.--29. "PAD39FNCSEL,Pad 39 function select" "0: Configure as the UART0 TX Signal,1: Configure as the UART1 TX signal,2: Configure as the CLKOUT signal,3: Configure as GPIO39,4: Configure as the IOMSTR4 I2C SCL signal,5: Configure as the IOMSTR4 SPI SCK signal,6: Configure as the IOMSTR4 SPI SCK loopback..,7: Configure as the IOMSTR4 I2C SCL loopback.."
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|
newline
|
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bitfld.long 0x00 26. "PAD39STRNG,Pad 39 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 25. "PAD39INPEN,Pad 39 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 24. "PAD39PULL,Pad 39 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 19.--21. "PAD38FNCSEL,Pad 38 function select" "0: Configure as the ADC Trigger 3 signal,1: Configure as the SPI channel 3 nCE signal..,2: Configure as the UART0 CTS signal,3: Configure as GPIO38,4: Configure as the IOSLAVE SPI 3-wire MOSI/MISO..,5: Configure as the IOMSTR3 SPI MOSI output signal,6: Configure as the SPI channel 7 nCE signal..,7: Configure as the IOMSTR3 SPI 3-wire MOSI/MISO.."
|
|
newline
|
|
bitfld.long 0x00 18. "PAD38STRNG,Pad 38 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 17. "PAD38INPEN,Pad 38 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "PAD38PULL,Pad 38 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 11.--13. "PAD37FNCSEL,Pad 37 function select" "0: Configure as the ADC Trigger 2 signal,1: Configure as the SPI channel 2 nCE signal..,2: Configure as the UART0 RTS signal,3: Configure as GPIO37,4: Configure as the SPI channel 4 nCE signal..,5: Configure as the SPI channel 1 nCE signal..,6: Configure as the PDM CLK output signal,7: Configure as the input/output signal from.."
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|
newline
|
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bitfld.long 0x00 10. "PAD37STRNG,Pad 37 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 9. "PAD37INPEN,Pad 37 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PAD37PULL,Pad 37 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 3.--5. "PAD36FNCSEL,Pad 36 function select" "0: Configure as the ADC Trigger 1 signal,1: Configure as the SPI channel 1 nCE signal..,2: Configure as the UART1 RX signal,3: Configure as GPIO36,4: Configure as the 32kHz output clock from the..,5: Configure as the SPI channel 0 nCE signal..,6: Configure as the UART0 CTS signal,7: Configure as the SPI channel 3 nCE signal.."
|
|
newline
|
|
bitfld.long 0x00 2. "PAD36STRNG,Pad 36 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 1. "PAD36INPEN,Pad 36 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "PAD36PULL,Pad 36 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PADREGK,This register controls the pad configuration controls for PAD43 through PAD40"
|
|
bitfld.long 0x00 30.--31. "PAD43RSEL,Pad 43 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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|
bitfld.long 0x00 27.--29. "PAD43FNCSEL,Pad 43 function select" "0: Configure as the SPI channel 4 nCE signal..,1: Configure as the SPI channel 1 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO43,4: Configure as the IOMSTR3 I2C SDA signal,5: Configure as the IOMSTR3 SPI MISO signal,6: Configure as the IOMSTR3 SPI MISO loopback..,7: Configure as the IOMSTR3 I2C SDA loopback.."
|
|
newline
|
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bitfld.long 0x00 26. "PAD43STRNG,Pad 43 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 25. "PAD43INPEN,Pad 43 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 24. "PAD43PULL,Pad 43 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 22.--23. "PAD42RSEL,Pad 42 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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|
newline
|
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bitfld.long 0x00 19.--21. "PAD42FNCSEL,Pad 42 function select" "0: Configure as the SPI channel 2 nCE signal..,1: Configure as the SPI channel 0 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO42,4: Configure as the IOMSTR3 I2C SCL clock I/O..,5: Configure as the IOMSTR3 SPI SCK output,6: Configure as the IOMSTR3 SPI clock loopback..,7: Configure as the IOMSTR3 I2C clock loopback.."
|
|
bitfld.long 0x00 18. "PAD42STRNG,Pad 42 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 17. "PAD42INPEN,Pad 42 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD42PULL,Pad 42 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
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bitfld.long 0x00 15. "PAD41PWRUP,Pad 41 upper power switch enable" "0: Power switch disabled,1: Power switch enabled (VDD switch)"
|
|
bitfld.long 0x00 11.--13. "PAD41FNCSEL,Pad 41 function select" "0: Configure as the SPI channel 1 nCE signal..,1: Configure as the CLKOUT signal,2: Configure as the serial wire debug SWO signal,3: Configure as GPIO41,4: Configure as the SPI channel 5 nCE signal..,5: Configure as the SPI channel 7 nCE signal..,6: Configure as the SPI channel 2 nCE signal..,7: Configure as the UART0 RTS output"
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|
newline
|
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bitfld.long 0x00 10. "PAD41STRNG,Pad 41 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 9. "PAD41INPEN,Pad 41 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PAD41PULL,Pad 41 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 6.--7. "PAD40RSEL,Pad 40 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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|
newline
|
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bitfld.long 0x00 3.--5. "PAD40FNCSEL,Pad 40 function select" "0: Configure as the UART0 RX input signal,1: Configure as the UART1 RX input signal,2: Configure as the ADC Trigger 0 signal,3: Configure as GPIO40,4: Configure as the IOMSTR4 I2C serial data I/O..,5: Configure as the IOMSTR4 SPI MISO input signal,6: Configure as the IOMSTR4 SPI MISO loopback..,7: Configure as the IOMSTR4 I2C SDA loopback.."
|
|
bitfld.long 0x00 2. "PAD40STRNG,Pad 40 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD40INPEN,Pad 40 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD40PULL,Pad 40 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "PADREGL,This register controls the pad configuration controls for PAD47 through PAD44"
|
|
bitfld.long 0x00 27.--29. "PAD47FNCSEL,Pad 47 function select" "0: Configure as the SPI channel 5 nCE signal..,1: Configure as the SPI channel 5 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO47,4: Configure as the IOMSTR5 SPI 3-wire MOSI/MISO..,5: Configure as the IOMSTR5 SPI MOSI output signal,6: Configure as the SPI channel 5 nCE signal..,7: Configure as the IOMSTR5 SPI 3-wire MOSI/MISO.."
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|
bitfld.long 0x00 26. "PAD47STRNG,Pad 47 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
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bitfld.long 0x00 25. "PAD47INPEN,Pad 47 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 24. "PAD47PULL,Pad 47 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 19.--21. "PAD46FNCSEL,Pad 46 function select" "0: Configure as the 32kHz output clock from the..,1: Configure as the SPI channel 4 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO46,4: Configure as the input/output signal from..,5: Configure as the SPI channel 4 nCE signal..,6: Configure as the SPI channel 4 nCE signal..,7: Configure as the serial wire debug SWO signal"
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|
bitfld.long 0x00 18. "PAD46STRNG,Pad 46 drive strength" "0: Low drive strength,1: High drive strength"
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|
newline
|
|
bitfld.long 0x00 17. "PAD46INPEN,Pad 46 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 16. "PAD46PULL,Pad 46 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 11.--13. "PAD45FNCSEL,Pad 45 function select" "0: Configure as the UART1 CTS input signal,1: Configure as the SPI channel 3 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO45,4: Configure as the SPI channel 3 nCE signal..,5: Configure as the SPI channel 6 nCE signal..,6: Configure as the SPI channel 5 nCE signal..,7: Configure as the input/output signal from.."
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|
bitfld.long 0x00 10. "PAD45STRNG,Pad 45 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 9. "PAD45INPEN,Pad 45 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 8. "PAD45PULL,Pad 45 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PAD44FNCSEL,Pad 44 function select" "0: Configure as the UART1 RTS output signal,1: Configure as the SPI channel 2 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO44,4: Configure as the IOMSTR4 SPI 3-wire MOSI/MISO..,5: Configure as the IOMSTR4 SPI MOSI signal,6: Configure as the SPI channel 6 nCE signal..,7: Configure as the IOMSTR4 SPI 3-wire MOSI/MISO.."
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|
bitfld.long 0x00 2. "PAD44STRNG,Pad 44 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD44INPEN,Pad 44 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD44PULL,Pad 44 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "PADREGM,This register controls the pad configuration controls for PAD49 through PAD48"
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|
bitfld.long 0x00 14.--15. "PAD49RSEL,Pad 49 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
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bitfld.long 0x00 11.--13. "PAD49FNCSEL,Pad 49 function select" "0: Configure as the SPI channel 7 nCE signal..,1: Configure as the SPI channel 7 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO49,4: Configure as the IOMSTR5 I2C serial data I/O..,5: Configure as the IOMSTR5 SPI MISO input signal,6: Configure as the IOMSTR5 SPI MISO loopback..,7: Configure as the IOMSTR5 I2C SDA loopback.."
|
|
newline
|
|
bitfld.long 0x00 10. "PAD49STRNG,Pad 49 drive strength" "0: Low drive strength,1: High drive strength"
|
|
bitfld.long 0x00 9. "PAD49INPEN,Pad 49 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "PAD49PULL,Pad 49 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
bitfld.long 0x00 6.--7. "PAD48RSEL,Pad 48 pullup resistor selection" "0: Pullup is ~1.5 KOhms,1: Pullup is ~6 KOhms,2: Pullup is ~12 KOhms,3: Pullup is ~24 KOhms"
|
|
newline
|
|
bitfld.long 0x00 3.--5. "PAD48FNCSEL,Pad 48 function select" "0: Configure as the SPI channel 6 nCE signal..,1: Configure as the SPI channel 6 nCE signal..,2: Configure as the input/output signal from..,3: Configure as GPIO48,4: Configure as the IOMSTR5 I2C SCL clock I/O..,5: Configure as the IOMSTR5 SPI SCK output,6: Configure as the IOMSTR5 SPI clock loopback..,7: Configure as the IOMSTR5 I2C clock loopback.."
|
|
bitfld.long 0x00 2. "PAD48STRNG,Pad 48 drive strength" "0: Low drive strength,1: High drive strength"
|
|
newline
|
|
bitfld.long 0x00 1. "PAD48INPEN,Pad 48 input enable" "0: Pad input disabled,1: Pad input enabled"
|
|
bitfld.long 0x00 0. "PAD48PULL,Pad 48 pullup enable" "0: Pullup disabled,1: Pullup enabled"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CFGA,GPIO configuration controls for GPIO[7:0]"
|
|
bitfld.long 0x00 31. "GPIO7INTD,GPIO7 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO7OUTCFG,GPIO7 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 28. "GPIO7INCFG,GPIO7 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO6INTD,GPIO6 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "GPIO6OUTCFG,GPIO6 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO6INCFG,GPIO6 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
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|
newline
|
|
bitfld.long 0x00 23. "GPIO5INTD,GPIO5 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO5OUTCFG,GPIO5 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 20. "GPIO5INCFG,GPIO5 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO4INTD,GPIO4 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GPIO4OUTCFG,GPIO4 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO4INCFG,GPIO4 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
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|
newline
|
|
bitfld.long 0x00 15. "GPIO3INTD,GPIO3 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO3OUTCFG,GPIO3 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
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|
newline
|
|
bitfld.long 0x00 12. "GPIO3INCFG,GPIO3 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO2INTD,GPIO2 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "GPIO2OUTCFG,GPIO2 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO2INCFG,GPIO2 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
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|
newline
|
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bitfld.long 0x00 7. "GPIO1INTD,GPIO1 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO1OUTCFG,GPIO1 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 4. "GPIO1INCFG,GPIO1 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO0INTD,GPIO0 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 1.--2. "GPIO0OUTCFG,GPIO0 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO0INCFG,GPIO0 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CFGB,GPIO configuration controls for GPIO[15:8]"
|
|
bitfld.long 0x00 31. "GPIO15INTD,GPIO15 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO15OUTCFG,GPIO15 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
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|
newline
|
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bitfld.long 0x00 28. "GPIO15INCFG,GPIO15 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO14INTD,GPIO14 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "GPIO14OUTCFG,GPIO14 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO14INCFG,GPIO14 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 23. "GPIO13INTD,GPIO13 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO13OUTCFG,GPIO13 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 20. "GPIO13INCFG,GPIO13 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO12INTD,GPIO12 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GPIO12OUTCFG,GPIO12 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO12INCFG,GPIO12 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO11INTD,GPIO11 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO11OUTCFG,GPIO11 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 12. "GPIO11INCFG,GPIO11 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO10INTD,GPIO10 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "GPIO10OUTCFG,GPIO10 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO10INCFG,GPIO10 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 7. "GPIO9INTD,GPIO9 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO9OUTCFG,GPIO9 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 4. "GPIO9INCFG,GPIO9 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO8INTD,GPIO8 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 1.--2. "GPIO8OUTCFG,GPIO8 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO8INCFG,GPIO8 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CFGC,GPIO configuration controls for GPIO[23:16]"
|
|
bitfld.long 0x00 31. "GPIO23INTD,GPIO23 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO23OUTCFG,GPIO23 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 28. "GPIO23INCFG,GPIO23 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO22INTD,GPIO22 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "GPIO22OUTCFG,GPIO22 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO22INCFG,GPIO22 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 23. "GPIO21INTD,GPIO21 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO21OUTCFG,GPIO21 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 20. "GPIO21INCFG,GPIO21 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO20INTD,GPIO20 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 17.--18. "GPIO20OUTCFG,GPIO20 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO20INCFG,GPIO20 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO19INTD,GPIO19 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO19OUTCFG,GPIO19 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 12. "GPIO19INCFG,GPIO19 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO18INTD,GPIO18 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 9.--10. "GPIO18OUTCFG,GPIO18 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO18INCFG,GPIO18 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 7. "GPIO17INTD,GPIO17 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO17OUTCFG,GPIO17 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 4. "GPIO17INCFG,GPIO17 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO16INTD,GPIO16 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 1.--2. "GPIO16OUTCFG,GPIO16 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO16INCFG,GPIO16 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CFGD,GPIO configuration controls for GPIO[31:24]"
|
|
bitfld.long 0x00 31. "GPIO31INTD,GPIO31 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO31OUTCFG,GPIO31 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 28. "GPIO31INCFG,GPIO31 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO30INTD,GPIO30 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "GPIO30OUTCFG,GPIO30 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO30INCFG,GPIO30 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO29INTD,GPIO29 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO29OUTCFG,GPIO29 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 20. "GPIO29INCFG,GPIO29 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO28INTD,GPIO28 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 17.--18. "GPIO28OUTCFG,GPIO28 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO28INCFG,GPIO28 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 15. "GPIO27INTD,GPIO27 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO27OUTCFG,GPIO27 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 12. "GPIO27INCFG,GPIO27 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO26INTD,GPIO26 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "GPIO26OUTCFG,GPIO26 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO26INCFG,GPIO26 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
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bitfld.long 0x00 7. "GPIO25INTD,GPIO25 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO25OUTCFG,GPIO25 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
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bitfld.long 0x00 4. "GPIO25INCFG,GPIO25 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO24INTD,GPIO24 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 1.--2. "GPIO24OUTCFG,GPIO24 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO24INCFG,GPIO24 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CFGE,GPIO configuration controls for GPIO[39:32]"
|
|
bitfld.long 0x00 31. "GPIO39INTD,GPIO39 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO39OUTCFG,GPIO39 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 28. "GPIO39INCFG,GPIO39 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO38INTD,GPIO38 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 25.--26. "GPIO38OUTCFG,GPIO38 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO38INCFG,GPIO38 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO37INTD,GPIO37 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO37OUTCFG,GPIO37 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 20. "GPIO37INCFG,GPIO37 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO36INTD,GPIO36 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GPIO36OUTCFG,GPIO36 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO36INCFG,GPIO36 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO35INTD,GPIO35 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO35OUTCFG,GPIO35 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 12. "GPIO35INCFG,GPIO35 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO34INTD,GPIO34 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "GPIO34OUTCFG,GPIO34 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO34INCFG,GPIO34 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO33INTD,GPIO33 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO33OUTCFG,GPIO33 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 4. "GPIO33INCFG,GPIO33 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO32INTD,GPIO32 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "GPIO32OUTCFG,GPIO32 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO32INCFG,GPIO32 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CFGF,GPIO configuration controls for GPIO[47:40]"
|
|
bitfld.long 0x00 31. "GPIO47INTD,GPIO47 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 29.--30. "GPIO47OUTCFG,GPIO47 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 28. "GPIO47INCFG,GPIO47 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 27. "GPIO46INTD,GPIO46 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
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bitfld.long 0x00 25.--26. "GPIO46OUTCFG,GPIO46 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 24. "GPIO46INCFG,GPIO46 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO45INTD,GPIO45 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 21.--22. "GPIO45OUTCFG,GPIO45 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 20. "GPIO45INCFG,GPIO45 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 19. "GPIO44INTD,GPIO44 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "GPIO44OUTCFG,GPIO44 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 16. "GPIO44INCFG,GPIO44 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO43INTD,GPIO43 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 13.--14. "GPIO43OUTCFG,GPIO43 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 12. "GPIO43INCFG,GPIO43 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 11. "GPIO42INTD,GPIO42 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 9.--10. "GPIO42OUTCFG,GPIO42 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 8. "GPIO42INCFG,GPIO42 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO41INTD,GPIO41 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO41OUTCFG,GPIO41 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 4. "GPIO41INCFG,GPIO41 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO40INTD,GPIO40 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "GPIO40OUTCFG,GPIO40 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO40INCFG,GPIO40 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CFGG,GPIO configuration controls for GPIO[49:48]"
|
|
bitfld.long 0x00 7. "GPIO49INTD,GPIO49 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
bitfld.long 0x00 5.--6. "GPIO49OUTCFG,GPIO49 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
newline
|
|
bitfld.long 0x00 4. "GPIO49INCFG,GPIO49 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
bitfld.long 0x00 3. "GPIO48INTD,GPIO48 interrupt direction" "0: Interrupt on low to high GPIO transition,1: Interrupt on high to low GPIO transition"
|
|
newline
|
|
bitfld.long 0x00 1.--2. "GPIO48OUTCFG,GPIO48 output configuration" "0: Output disabled,1: Output is push-pull,2: Output is open drain,3: Output is tri-state"
|
|
bitfld.long 0x00 0. "GPIO48INCFG,GPIO48 input enable" "0: Read the GPIO pin data,1: Readback will always be zero"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PADKEY,Lock state of the PINCFG and GPIO configuration registers"
|
|
hexmask.long 0x00 0.--31. 1. "PADKEY,Key register value"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "RDA,GPIO Input Register A"
|
|
hexmask.long 0x00 0.--31. 1. "RDA,GPIO31-0 read data"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RDB,GPIO Input Register B"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "RDB,GPIO49-32 read data"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "WTA,GPIO Output Register A"
|
|
hexmask.long 0x00 0.--31. 1. "WTA,GPIO31-0 write data"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "WTB,GPIO Output Register B"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "WTB,GPIO49-32 write data"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "WTSA,GPIO Output Register A Set"
|
|
hexmask.long 0x00 0.--31. 1. "WTSA,Set the GPIO31-0 write data"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "WTSB,GPIO Output Register B Set"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "WTSB,Set the GPIO49-32 write data"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "WTCA,GPIO Output Register A Clear"
|
|
hexmask.long 0x00 0.--31. 1. "WTCA,Clear the GPIO31-0 write data"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "WTCB,GPIO Output Register B Clear"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "WTCB,Clear the GPIO49-32 write data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "ENA,GPIO Enable Register A"
|
|
hexmask.long 0x00 0.--31. 1. "ENA,GPIO31-0 output enables"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "ENB,GPIO Enable Register B"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ENB,GPIO49-32 output enables"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "ENSA,GPIO Enable Register A Set"
|
|
hexmask.long 0x00 0.--31. 1. "ENSA,Set the GPIO31-0 output enables"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "ENSB,GPIO Enable Register B Set"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ENSB,Set the GPIO49-32 output enables"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "ENCA,GPIO Enable Register A Clear"
|
|
hexmask.long 0x00 0.--31. 1. "ENCA,Clear the GPIO31-0 output enables"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "ENCB,GPIO Enable Register B Clear"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. "ENCB,Clear the GPIO49-32 output enables"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "STMRCAP,STIMER Capture trigger select and enable"
|
|
bitfld.long 0x00 30. "STPOL3,STIMER Capture 3 Polarity" "0: Capture on low to high GPIO transition,1: Capture on high to low GPIO transition"
|
|
bitfld.long 0x00 24.--29. "STSEL3,STIMER Capture 3 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 22. "STPOL2,STIMER Capture 2 Polarity" "0: Capture on low to high GPIO transition,1: Capture on high to low GPIO transition"
|
|
bitfld.long 0x00 16.--21. "STSEL2,STIMER Capture 2 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 14. "STPOL1,STIMER Capture 1 Polarity" "0: Capture on low to high GPIO transition,1: Capture on high to low GPIO transition"
|
|
bitfld.long 0x00 8.--13. "STSEL1,STIMER Capture 1 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 6. "STPOL0,STIMER Capture 0 Polarity" "0: Capture on low to high GPIO transition,1: Capture on high to low GPIO transition"
|
|
bitfld.long 0x00 0.--5. "STSEL0,STIMER Capture 0 Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "IOM0IRQ,IOMSTR0 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM0IRQ,IOMSTR0 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "IOM1IRQ,IOMSTR1 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM1IRQ,IOMSTR1 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "IOM2IRQ,IOMSTR2 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM2IRQ,IOMSTR2 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "IOM3IRQ,IOMSTR3 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM3IRQ,IOMSTR3 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "IOM4IRQ,IOMSTR4 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM4IRQ,IOMSTR4 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "IOM5IRQ,IOMSTR5 IRQ select for flow control"
|
|
bitfld.long 0x00 0.--5. "IOM5IRQ,IOMSTR5 IRQ pad select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "LOOPBACK,IOM to IOS loopback control"
|
|
bitfld.long 0x00 0.--2. "LOOPBACK,IOM to IOS loopback control" "0: Loop IOM0 to IOS,1: Loop IOM1 to IOS,2: Loop IOM2 to IOS,3: Loop IOM3 to IOS,4: Loop IOM4 to IOS,5: Loop IOM5 to IOS,6: No loopback connections,?..."
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "GPIOOBS,GPIO Observation mode sample register"
|
|
hexmask.long.word 0x00 0.--15. 1. "OBS_DATA,Sample of the data output on the GPIO observation port"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "ALTPADCFGA,This register has additional configuration control for pads 3 2 1 0"
|
|
bitfld.long 0x00 28. "PAD3_SR,Pad 3 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD3_DS1,Pad 3 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD2_SR,Pad 2 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD2_DS1,Pad 2 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD1_SR,Pad 1 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD1_DS1,Pad 1 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD0_SR,Pad 0 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD0_DS1,Pad 0 high order drive strength selection" "0,1"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "ALTPADCFGB,This register has additional configuration control for pads 7 6 5 4"
|
|
bitfld.long 0x00 28. "PAD7_SR,Pad 7 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD7_DS1,Pad 7 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD6_SR,Pad 6 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD6_DS1,Pad 6 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD5_SR,Pad 5 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD5_DS1,Pad 5 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD4_SR,Pad 4 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD4_DS1,Pad 4 high order drive strength selection" "0,1"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "ALTPADCFGC,This register has additional configuration control for pads 11 10 9 8"
|
|
bitfld.long 0x00 28. "PAD11_SR,Pad 11 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD11_DS1,Pad 11 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD10_SR,Pad 10 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD10_DS1,Pad 10 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD9_SR,Pad 9 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD9_DS1,Pad 9 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD8_SR,Pad 8 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD8_DS1,Pad 8 high order drive strength selection" "0,1"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "ALTPADCFGD,This register has additional configuration control for pads 15 14 13 12"
|
|
bitfld.long 0x00 28. "PAD15_SR,Pad 15 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD15_DS1,Pad 15 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD14_SR,Pad 14 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD14_DS1,Pad 14 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD13_SR,Pad 13 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD13_DS1,Pad 13 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD12_SR,Pad 12 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD12_DS1,Pad 12 high order drive strength selection" "0,1"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "ALTPADCFGE,This register has additional configuration control for pads 19 18 17 16"
|
|
bitfld.long 0x00 28. "PAD19_SR,Pad 19 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD19_DS1,Pad 19 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD18_SR,Pad 18 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD18_DS1,Pad 18 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD17_SR,Pad 17 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD17_DS1,Pad 17 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD16_SR,Pad 16 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD16_DS1,Pad 16 high order drive strength selection" "0,1"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "ALTPADCFGF,This register has additional configuration control for pads 23 22 21 20"
|
|
bitfld.long 0x00 28. "PAD23_SR,Pad 23 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD23_DS1,Pad 23 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD22_SR,Pad 22 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD22_DS1,Pad 22 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD21_SR,Pad 21 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD21_DS1,Pad 21 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD20_SR,Pad 20 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD20_DS1,Pad 20 high order drive strength selection" "0,1"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "ALTPADCFGG,This register has additional configuration control for pads 27 26 25 24"
|
|
bitfld.long 0x00 28. "PAD27_SR,Pad 27 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD27_DS1,Pad 27 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD26_SR,Pad 26 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD26_DS1,Pad 26 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD25_SR,Pad 25 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD25_DS1,Pad 25 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD24_SR,Pad 24 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD24_DS1,Pad 24 high order drive strength selection" "0,1"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "ALTPADCFGH,This register has additional configuration control for pads 31 30 29 28"
|
|
bitfld.long 0x00 28. "PAD31_SR,Pad 31 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD31_DS1,Pad 31 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD30_SR,Pad 30 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD30_DS1,Pad 30 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD29_SR,Pad 29 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD29_DS1,Pad 29 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD28_SR,Pad 28 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD28_DS1,Pad 28 high order drive strength selection" "0,1"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "ALTPADCFGI,This register has additional configuration control for pads 35 34 33 32"
|
|
bitfld.long 0x00 28. "PAD35_SR,Pad 35 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD35_DS1,Pad 35 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD34_SR,Pad 34 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD34_DS1,Pad 34 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD33_SR,Pad 33 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD33_DS1,Pad 33 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD32_SR,Pad 32 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD32_DS1,Pad 32 high order drive strength selection" "0,1"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "ALTPADCFGJ,This register has additional configuration control for pads 39 38 37 36"
|
|
bitfld.long 0x00 28. "PAD39_SR,Pad 39 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD39_DS1,Pad 39 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD38_SR,Pad 38 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD38_DS1,Pad 38 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD37_SR,Pad 37 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD37_DS1,Pad 37 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD36_SR,Pad 36 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD36_DS1,Pad 36 high order drive strength selection" "0,1"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "ALTPADCFGK,This register has additional configuration control for pads 43 42 41 40"
|
|
bitfld.long 0x00 28. "PAD43_SR,Pad 43 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD43_DS1,Pad 43 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD42_SR,Pad 42 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD42_DS1,Pad 42 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD41_SR,Pad 41 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD41_DS1,Pad 41 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD40_SR,Pad 40 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD40_DS1,Pad 40 high order drive strength selection" "0,1"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ALTPADCFGL,This register has additional configuration control for pads 47 46 45 44"
|
|
bitfld.long 0x00 28. "PAD47_SR,Pad 47 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 24. "PAD47_DS1,Pad 47 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 20. "PAD46_SR,Pad 46 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 16. "PAD46_DS1,Pad 46 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PAD45_SR,Pad 45 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD45_DS1,Pad 45 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD44_SR,Pad 44 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD44_DS1,Pad 44 high order drive strength selection" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ALTPADCFGM,This register has additional configuration control for pads 49 48"
|
|
bitfld.long 0x00 12. "PAD49_SR,Pad 49 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 8. "PAD49_DS1,Pad 49 high order drive strength selection" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PAD48_SR,Pad 48 slew rate selection" "?,1: Enables Slew rate control on pad"
|
|
bitfld.long 0x00 0. "PAD48_DS1,Pad 48 high order drive strength selection" "0,1"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INT0EN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 31. "GPIO31,GPIO31 interrupt" "0,1"
|
|
bitfld.long 0x00 30. "GPIO30,GPIO30 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "GPIO29,GPIO29 interrupt" "0,1"
|
|
bitfld.long 0x00 28. "GPIO28,GPIO28 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "GPIO27,GPIO27 interrupt" "0,1"
|
|
bitfld.long 0x00 26. "GPIO26,GPIO26 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "GPIO25,GPIO25 interrupt" "0,1"
|
|
bitfld.long 0x00 24. "GPIO24,GPIO24 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO23,GPIO23 interrupt" "0,1"
|
|
bitfld.long 0x00 22. "GPIO22,GPIO22 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "GPIO21,GPIO21 interrupt" "0,1"
|
|
bitfld.long 0x00 20. "GPIO20,GPIO20 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "GPIO19,GPIO19 interrupt" "0,1"
|
|
bitfld.long 0x00 18. "GPIO18,GPIO18interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "GPIO17,GPIO17 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO16,GPIO16 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO15,GPIO15 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO14,GPIO14 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO13,GPIO13 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO12,GPIO12 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO11,GPIO11 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO10,GPIO10 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO9,GPIO9 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO8,GPIO8 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO7,GPIO7 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO6,GPIO6 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO5,GPIO5 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO4,GPIO4 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO3,GPIO3 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO2,GPIO2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO1,GPIO1 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO0,GPIO0 interrupt" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INT0STAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 31. "GPIO31,GPIO31 interrupt" "0,1"
|
|
bitfld.long 0x00 30. "GPIO30,GPIO30 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "GPIO29,GPIO29 interrupt" "0,1"
|
|
bitfld.long 0x00 28. "GPIO28,GPIO28 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "GPIO27,GPIO27 interrupt" "0,1"
|
|
bitfld.long 0x00 26. "GPIO26,GPIO26 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "GPIO25,GPIO25 interrupt" "0,1"
|
|
bitfld.long 0x00 24. "GPIO24,GPIO24 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO23,GPIO23 interrupt" "0,1"
|
|
bitfld.long 0x00 22. "GPIO22,GPIO22 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "GPIO21,GPIO21 interrupt" "0,1"
|
|
bitfld.long 0x00 20. "GPIO20,GPIO20 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "GPIO19,GPIO19 interrupt" "0,1"
|
|
bitfld.long 0x00 18. "GPIO18,GPIO18interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "GPIO17,GPIO17 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO16,GPIO16 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO15,GPIO15 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO14,GPIO14 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO13,GPIO13 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO12,GPIO12 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO11,GPIO11 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO10,GPIO10 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO9,GPIO9 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO8,GPIO8 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO7,GPIO7 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO6,GPIO6 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO5,GPIO5 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO4,GPIO4 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO3,GPIO3 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO2,GPIO2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO1,GPIO1 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO0,GPIO0 interrupt" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INT0CLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 31. "GPIO31,GPIO31 interrupt" "0,1"
|
|
bitfld.long 0x00 30. "GPIO30,GPIO30 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "GPIO29,GPIO29 interrupt" "0,1"
|
|
bitfld.long 0x00 28. "GPIO28,GPIO28 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "GPIO27,GPIO27 interrupt" "0,1"
|
|
bitfld.long 0x00 26. "GPIO26,GPIO26 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "GPIO25,GPIO25 interrupt" "0,1"
|
|
bitfld.long 0x00 24. "GPIO24,GPIO24 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO23,GPIO23 interrupt" "0,1"
|
|
bitfld.long 0x00 22. "GPIO22,GPIO22 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "GPIO21,GPIO21 interrupt" "0,1"
|
|
bitfld.long 0x00 20. "GPIO20,GPIO20 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "GPIO19,GPIO19 interrupt" "0,1"
|
|
bitfld.long 0x00 18. "GPIO18,GPIO18interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "GPIO17,GPIO17 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO16,GPIO16 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO15,GPIO15 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO14,GPIO14 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO13,GPIO13 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO12,GPIO12 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO11,GPIO11 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO10,GPIO10 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO9,GPIO9 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO8,GPIO8 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO7,GPIO7 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO6,GPIO6 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO5,GPIO5 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO4,GPIO4 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO3,GPIO3 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO2,GPIO2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO1,GPIO1 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO0,GPIO0 interrupt" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INT0SET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 31. "GPIO31,GPIO31 interrupt" "0,1"
|
|
bitfld.long 0x00 30. "GPIO30,GPIO30 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 29. "GPIO29,GPIO29 interrupt" "0,1"
|
|
bitfld.long 0x00 28. "GPIO28,GPIO28 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. "GPIO27,GPIO27 interrupt" "0,1"
|
|
bitfld.long 0x00 26. "GPIO26,GPIO26 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 25. "GPIO25,GPIO25 interrupt" "0,1"
|
|
bitfld.long 0x00 24. "GPIO24,GPIO24 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. "GPIO23,GPIO23 interrupt" "0,1"
|
|
bitfld.long 0x00 22. "GPIO22,GPIO22 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 21. "GPIO21,GPIO21 interrupt" "0,1"
|
|
bitfld.long 0x00 20. "GPIO20,GPIO20 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. "GPIO19,GPIO19 interrupt" "0,1"
|
|
bitfld.long 0x00 18. "GPIO18,GPIO18interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. "GPIO17,GPIO17 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO16,GPIO16 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO15,GPIO15 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO14,GPIO14 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO13,GPIO13 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO12,GPIO12 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO11,GPIO11 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO10,GPIO10 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO9,GPIO9 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO8,GPIO8 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO7,GPIO7 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO6,GPIO6 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO5,GPIO5 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO4,GPIO4 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO3,GPIO3 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO2,GPIO2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO1,GPIO1 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO0,GPIO0 interrupt" "0,1"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "INT1EN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 17. "GPIO49,GPIO49 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO48,GPIO48 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO47,GPIO47 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO46,GPIO46 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO45,GPIO45 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO44,GPIO44 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO43,GPIO43 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO42,GPIO42 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO41,GPIO41 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO40,GPIO40 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO39,GPIO39 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO38,GPIO38 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO37,GPIO37 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO36,GPIO36 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO35,GPIO35 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO34,GPIO34 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO33,GPIO33 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO32,GPIO32 interrupt" "0,1"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "INT1STAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 17. "GPIO49,GPIO49 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO48,GPIO48 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO47,GPIO47 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO46,GPIO46 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO45,GPIO45 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO44,GPIO44 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO43,GPIO43 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO42,GPIO42 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO41,GPIO41 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO40,GPIO40 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO39,GPIO39 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO38,GPIO38 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO37,GPIO37 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO36,GPIO36 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO35,GPIO35 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO34,GPIO34 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO33,GPIO33 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO32,GPIO32 interrupt" "0,1"
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "INT1CLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 17. "GPIO49,GPIO49 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO48,GPIO48 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO47,GPIO47 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO46,GPIO46 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO45,GPIO45 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO44,GPIO44 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO43,GPIO43 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO42,GPIO42 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO41,GPIO41 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO40,GPIO40 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO39,GPIO39 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO38,GPIO38 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO37,GPIO37 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO36,GPIO36 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO35,GPIO35 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO34,GPIO34 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO33,GPIO33 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO32,GPIO32 interrupt" "0,1"
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "INT1SET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 17. "GPIO49,GPIO49 interrupt" "0,1"
|
|
bitfld.long 0x00 16. "GPIO48,GPIO48 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. "GPIO47,GPIO47 interrupt" "0,1"
|
|
bitfld.long 0x00 14. "GPIO46,GPIO46 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "GPIO45,GPIO45 interrupt" "0,1"
|
|
bitfld.long 0x00 12. "GPIO44,GPIO44 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "GPIO43,GPIO43 interrupt" "0,1"
|
|
bitfld.long 0x00 10. "GPIO42,GPIO42 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "GPIO41,GPIO41 interrupt" "0,1"
|
|
bitfld.long 0x00 8. "GPIO40,GPIO40 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "GPIO39,GPIO39 interrupt" "0,1"
|
|
bitfld.long 0x00 6. "GPIO38,GPIO38 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "GPIO37,GPIO37 interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GPIO36,GPIO36 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "GPIO35,GPIO35 interrupt" "0,1"
|
|
bitfld.long 0x00 2. "GPIO34,GPIO34 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "GPIO33,GPIO33 interrupt" "0,1"
|
|
bitfld.long 0x00 0. "GPIO32,GPIO32 interrupt" "0,1"
|
|
tree.end
|
|
tree "IOMSTR (I2C/SPI Master)"
|
|
repeat 6. (list 0. 1. 2. 3. 4. 5.) (list ad:0x50004000 ad:0x50005000 ad:0x50006000 ad:0x50007000 ad:0x50008000 ad:0x50009000)
|
|
tree "IOMSTR$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FIFO,FIFO Access Port"
|
|
hexmask.long 0x00 0.--31. 1. "FIFO,FIFO access port"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointers"
|
|
hexmask.long.byte 0x00 16.--23. 1. "FIFOREM,The number of bytes remaining in the FIFO (i.e. 128-FIFOSIZ if FULLDUP = 0 or 64-FIFOSIZ if FULLDUP = 1))"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FIFOSIZ,The number of bytes currently in the FIFO"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "TLNGTH,Transfer Length"
|
|
hexmask.long.word 0x00 0.--11. 1. "TLNGTH,Remaining transfer length"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration"
|
|
hexmask.long.byte 0x00 8.--14. 1. "FIFOWTHR,FIFO write threshold"
|
|
hexmask.long.byte 0x00 0.--6. 1. "FIFORTHR,FIFO read threshold"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "CLKCFG,I/O Clock Configuration"
|
|
hexmask.long.byte 0x00 24.--31. 1. "TOTPER,Clock total count minus 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. "LOWPER,Clock low count minus 1"
|
|
newline
|
|
bitfld.long 0x00 12. "DIVEN,Enable clock division by TOTPER" "0: Disable TOTPER division,1: Enable TOTPER division"
|
|
bitfld.long 0x00 11. "DIV3,Enable divide by 3" "0: Select divide by 1,1: Select divide by 3"
|
|
newline
|
|
bitfld.long 0x00 8.--10. "FSEL,Select the input clock frequency" "0: Selects the minimum power clock,1: Selects the HFRC as the input clock,2: Selects the HFRC / 2 as the input clock,3: Selects the HFRC / 4 as the input clock,4: Selects the HFRC / 8 as the input clock,5: Selects the HFRC / 16 as the input clock,6: Selects the HFRC / 32 as the input clock,7: Selects the HFRC / 64 as the input clock"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "CMD,Command Register"
|
|
hexmask.long 0x00 0.--31. 1. "CMD,This register holds the I/O Command"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "CMDRPT,Command Repeat Register"
|
|
bitfld.long 0x00 0.--4. "CMDRPT,These bits hold the Command repeat count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "STATUS,Status Register"
|
|
bitfld.long 0x00 2. "IDLEST,This bit indicates if the I/O state machine is IDLE" "?,1: The I/O state machine is in the idle state"
|
|
bitfld.long 0x00 1. "CMDACT,This bit indicates if the I/O Command is active" "?,1: An I/O command is active"
|
|
newline
|
|
bitfld.long 0x00 0. "ERR,This bit indicates if an error interrupt has occurred" "?,1: An error has been indicated by the IOM"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "CFG,I/O Master Configuration"
|
|
bitfld.long 0x00 31. "IFCEN,This bit enables the IO Master" "0: Disable the IO Master,1: Enable the IO Master"
|
|
bitfld.long 0x00 14. "RDFCPOL,This bit selects the read flow control signal polarity" "0: Flow control signal high creates flow control,1: Flow control signal low creates flow control"
|
|
newline
|
|
bitfld.long 0x00 13. "WTFCPOL,This bit selects the write flow control signal polarity" "0: Flow control signal high creates flow control,1: Flow control signal low creates flow control"
|
|
bitfld.long 0x00 12. "WTFCIRQ,This bit selects the write mode flow control signal" "0: MISO is used as the write mode flow control..,1: IRQ is used as the write mode flow control.."
|
|
newline
|
|
bitfld.long 0x00 11. "FCDEL,This bit must be left at the default value of 0" "0,1"
|
|
bitfld.long 0x00 10. "MOSIINV,This bit invewrts MOSI when flow control is enabled" "0: MOSI is set to 0 in read mode and 1 in write..,1: MOSI is set to 1 in read mode and 0 in write.."
|
|
newline
|
|
bitfld.long 0x00 9. "RDFC,This bit enables read mode flow control" "0: Read mode flow control disabled,1: Read mode flow control enabled"
|
|
bitfld.long 0x00 8. "WTFC,This bit enables write mode flow control" "0: Write mode flow control disabled,1: Write mode flow control enabled"
|
|
newline
|
|
bitfld.long 0x00 4.--5. "STARTRD,This bit selects the preread timing" "0: 0 read delay cycles,1: 1 read delay cycles,2: 2 read delay cycles,3: 3 read delay cycles"
|
|
bitfld.long 0x00 3. "FULLDUP,This bit selects full duplex mode" "0: 128 byte FIFO in half duplex mode,1: 64 byte FIFO in full duplex mode"
|
|
newline
|
|
bitfld.long 0x00 2. "SPHA,This bit selects SPI phase" "0: Sample on the leading (first) clock edge,1: Sample on the trailing (second) clock edge"
|
|
bitfld.long 0x00 1. "SPOL,This bit selects SPI polarity" "0: The base value of the clock is 0,1: The base value of the clock is 1"
|
|
newline
|
|
bitfld.long 0x00 0. "IFCSEL,This bit selects the I/O interface" "0: Selects I2C interface for the I/O Master,1: Selects SPI interface for the I/O Master"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 10. "ARB,This is the arbitration loss interrupt" "0,1"
|
|
bitfld.long 0x00 9. "STOP,This is the STOP command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "START,This is the START command interrupt" "0,1"
|
|
bitfld.long 0x00 7. "ICMD,This is the illegal command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "IACC,This is the illegal FIFO access interrupt" "0,1"
|
|
bitfld.long 0x00 5. "WTLEN,This is the WTLEN interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "NAK,This is the I2C NAK interrupt" "0,1"
|
|
bitfld.long 0x00 3. "FOVFL,This is the Write FIFO Overflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "FUNDFL,This is the Read FIFO Underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "THR,This is the FIFO Threshold interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMDCMP,This is the Command Complete interrupt" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 10. "ARB,This is the arbitration loss interrupt" "0,1"
|
|
bitfld.long 0x00 9. "STOP,This is the STOP command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "START,This is the START command interrupt" "0,1"
|
|
bitfld.long 0x00 7. "ICMD,This is the illegal command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "IACC,This is the illegal FIFO access interrupt" "0,1"
|
|
bitfld.long 0x00 5. "WTLEN,This is the WTLEN interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "NAK,This is the I2C NAK interrupt" "0,1"
|
|
bitfld.long 0x00 3. "FOVFL,This is the Write FIFO Overflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "FUNDFL,This is the Read FIFO Underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "THR,This is the FIFO Threshold interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMDCMP,This is the Command Complete interrupt" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 10. "ARB,This is the arbitration loss interrupt" "0,1"
|
|
bitfld.long 0x00 9. "STOP,This is the STOP command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "START,This is the START command interrupt" "0,1"
|
|
bitfld.long 0x00 7. "ICMD,This is the illegal command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "IACC,This is the illegal FIFO access interrupt" "0,1"
|
|
bitfld.long 0x00 5. "WTLEN,This is the WTLEN interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "NAK,This is the I2C NAK interrupt" "0,1"
|
|
bitfld.long 0x00 3. "FOVFL,This is the Write FIFO Overflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "FUNDFL,This is the Read FIFO Underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "THR,This is the FIFO Threshold interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMDCMP,This is the Command Complete interrupt" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 10. "ARB,This is the arbitration loss interrupt" "0,1"
|
|
bitfld.long 0x00 9. "STOP,This is the STOP command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "START,This is the START command interrupt" "0,1"
|
|
bitfld.long 0x00 7. "ICMD,This is the illegal command interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "IACC,This is the illegal FIFO access interrupt" "0,1"
|
|
bitfld.long 0x00 5. "WTLEN,This is the WTLEN interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "NAK,This is the I2C NAK interrupt" "0,1"
|
|
bitfld.long 0x00 3. "FOVFL,This is the Write FIFO Overflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "FUNDFL,This is the Read FIFO Underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "THR,This is the FIFO Threshold interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CMDCMP,This is the Command Complete interrupt" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "IOSLAVE (I2C/SPI Slave)"
|
|
base ad:0x50000000
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "FIFOPTR,Current FIFO Pointer"
|
|
hexmask.long.byte 0x00 8.--15. 1. "FIFOSIZ,The number of bytes currently in the hardware FIFO"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FIFOPTR,Current FIFO pointer"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "FIFOCFG,FIFO Configuration"
|
|
bitfld.long 0x00 24.--29. "ROBASE,Defines the read-only area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. "FIFOMAX,These bits hold the maximum FIFO address in 8 byte segments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--4. "FIFOBASE,These bits hold the base address of the I/O FIFO in 8 byte segments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "FIFOTHR,FIFO Threshold Configuration"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FIFOTHR,FIFO size interrupt threshold"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "FUPD,FIFO Update Status"
|
|
bitfld.long 0x00 1. "IOREAD,This bitfield indicates an IO read is active" "0,1"
|
|
bitfld.long 0x00 0. "FIFOUPD,This bit indicates that a FIFO update is underway" "0,1"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "FIFOCTR,Overall FIFO Counter"
|
|
hexmask.long.word 0x00 0.--9. 1. "FIFOCTR,Virtual FIFO byte count"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "FIFOINC,Overall FIFO Counter Increment"
|
|
hexmask.long.word 0x00 0.--9. 1. "FIFOINC,Increment the Overall FIFO Counter by this value on a"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "CFG,I/O Slave Configuration"
|
|
bitfld.long 0x00 31. "IFCEN,IOSLAVE interface enable" "0: Disable the IOSLAVE,1: Enable the IOSLAVE"
|
|
hexmask.long.word 0x00 8.--19. 1. "I2CADDR,7-bit or 10-bit I2C device address"
|
|
newline
|
|
bitfld.long 0x00 4. "STARTRD,This bit holds the cycle to initiate an I/O RAM" "0: Initiate I/O RAM read late in each..,1: Initiate I/O RAM read early in each.."
|
|
bitfld.long 0x00 2. "LSB,This bit selects the transfer bit ordering" "0: Data is assumed to be sent and received with..,1: Data is assumed to be sent and received with.."
|
|
newline
|
|
bitfld.long 0x00 1. "SPOL,This bit selects SPI polarity" "0: Polarity 0 handles SPI modes 0 and 3,1: Polarity 1 handles SPI modes 1 and 2"
|
|
bitfld.long 0x00 0. "IFCSEL,This bit selects the I/O interface" "0: Selects I2C interface for the IO Slave,1: Selects SPI interface for the IO Slave"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "PRENC,I/O Slave Interrupt Priority Encode"
|
|
bitfld.long 0x00 0.--4. "PRENC,These bits hold the priority encode of the REGACC interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "IOINTCTL,I/O Interrupt Control"
|
|
hexmask.long.byte 0x00 24.--31. 1. "IOINTSET,These bits set the IOINT interrupts when written with a 1"
|
|
bitfld.long 0x00 16. "IOINTCLR,This bit clears all of the IOINT interrupts when written with a 1" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. "IOINT,These bits read the IOINT interrupts"
|
|
hexmask.long.byte 0x00 0.--7. 1. "IOINTEN,These read-only bits indicate whether the IOINT interrupts are enabled"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "GENADD,General Address Data"
|
|
hexmask.long.byte 0x00 0.--7. 1. "GADATA,The data supplied on the last General Address reference"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 9. "XCMPWR,Transfer complete interrupt write to register space" "0,1"
|
|
bitfld.long 0x00 8. "XCMPWF,Transfer complete interrupt write to FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "XCMPRR,Transfer complete interrupt read from register space" "0,1"
|
|
bitfld.long 0x00 6. "XCMPRF,Transfer complete interrupt read from FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "IOINTW,I2C Interrupt Write interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GENAD,I2C General Address interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "FRDERR,FIFO Read Error interrupt" "0,1"
|
|
bitfld.long 0x00 2. "FUNDFL,FIFO Underflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FOVFL,FIFO Overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "FSIZE,FIFO Size interrupt" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 9. "XCMPWR,Transfer complete interrupt write to register space" "0,1"
|
|
bitfld.long 0x00 8. "XCMPWF,Transfer complete interrupt write to FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "XCMPRR,Transfer complete interrupt read from register space" "0,1"
|
|
bitfld.long 0x00 6. "XCMPRF,Transfer complete interrupt read from FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "IOINTW,I2C Interrupt Write interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GENAD,I2C General Address interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "FRDERR,FIFO Read Error interrupt" "0,1"
|
|
bitfld.long 0x00 2. "FUNDFL,FIFO Underflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FOVFL,FIFO Overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "FSIZE,FIFO Size interrupt" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 9. "XCMPWR,Transfer complete interrupt write to register space" "0,1"
|
|
bitfld.long 0x00 8. "XCMPWF,Transfer complete interrupt write to FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "XCMPRR,Transfer complete interrupt read from register space" "0,1"
|
|
bitfld.long 0x00 6. "XCMPRF,Transfer complete interrupt read from FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "IOINTW,I2C Interrupt Write interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GENAD,I2C General Address interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "FRDERR,FIFO Read Error interrupt" "0,1"
|
|
bitfld.long 0x00 2. "FUNDFL,FIFO Underflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FOVFL,FIFO Overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "FSIZE,FIFO Size interrupt" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 9. "XCMPWR,Transfer complete interrupt write to register space" "0,1"
|
|
bitfld.long 0x00 8. "XCMPWF,Transfer complete interrupt write to FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "XCMPRR,Transfer complete interrupt read from register space" "0,1"
|
|
bitfld.long 0x00 6. "XCMPRF,Transfer complete interrupt read from FIFO space" "0,1"
|
|
newline
|
|
bitfld.long 0x00 5. "IOINTW,I2C Interrupt Write interrupt" "0,1"
|
|
bitfld.long 0x00 4. "GENAD,I2C General Address interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "FRDERR,FIFO Read Error interrupt" "0,1"
|
|
bitfld.long 0x00 2. "FUNDFL,FIFO Underflow interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "FOVFL,FIFO Overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "FSIZE,FIFO Size interrupt" "0,1"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "REGACCINTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
hexmask.long 0x00 0.--31. 1. "REGACC,Register access interrupts"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "REGACCINTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
hexmask.long 0x00 0.--31. 1. "REGACC,Register access interrupts"
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "REGACCINTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
hexmask.long 0x00 0.--31. 1. "REGACC,Register access interrupts"
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "REGACCINTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
hexmask.long 0x00 0.--31. 1. "REGACC,Register access interrupts"
|
|
tree.end
|
|
tree "MCUCTRL (MCU Miscellaneous Control Logic)"
|
|
base ad:0x40020000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CHIP_INFO,Chip Information Register"
|
|
hexmask.long 0x00 0.--31. 1. "PARTNUM,BCD part number"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CHIPID0,Unique Chip ID 0"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Unique chip ID 0"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CHIPID1,Unique Chip ID 1"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Unique chip ID 1"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "CHIPREV,Chip Revision"
|
|
bitfld.long 0x00 4.--7. "REVMAJ,Major Revision ID" "?,1: Apollo2 revision A,2: Apollo2 revision B,?..."
|
|
bitfld.long 0x00 0.--3. "REVMIN,Minor Revision ID" "0: Apollo2 minor revision value,?,2: Apollo2 minor revision value,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "VENDORID,Unique Vendor ID"
|
|
hexmask.long 0x00 0.--31. 1. "VALUE,Unique Vendor ID"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DEBUGGER,Debugger Access Control"
|
|
bitfld.long 0x00 0. "LOCKOUT,Lockout of debugger (SWD)" "0,1"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "BUCK,Analog Buck Control"
|
|
bitfld.long 0x00 7. "MEMBUCKRST,Reset control override for Mem Buck" "0: enabled,1: reset Value is"
|
|
bitfld.long 0x00 6. "COREBUCKRST,Reset control override for Core Buck" "0: enabled,1: reset Value is"
|
|
newline
|
|
bitfld.long 0x00 5. "BYPBUCKMEM,Not used" "0,1"
|
|
bitfld.long 0x00 4. "MEMBUCKPWD,Memory buck power down override" "0: Memory Buck Enable,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "SLEEPBUCKANA,HFRC clkgen bit 0 override" "0,1"
|
|
bitfld.long 0x00 2. "COREBUCKPWD,Core buck power down override" "0: Core Buck enable,?..."
|
|
newline
|
|
bitfld.long 0x00 1. "BYPBUCKCORE,Not used" "0,1"
|
|
bitfld.long 0x00 0. "BUCKSWE,Buck Register Software Override Enable" "0: BUCK Software Override Disable,1: BUCK Software Override Enable"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "BUCK3,Buck control reg 3"
|
|
bitfld.long 0x00 18.--21. "MEMBUCKLOTON,MEM Buck low TON trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 17. "MEMBUCKBURSTEN,MEM Buck burst enable" "0: disabled,1: enable"
|
|
newline
|
|
bitfld.long 0x00 13.--16. "MEMBUCKZXTRIM,Memory buck zero crossing trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11.--12. "MEMBUCKHYSTTRIM,Hysterisis trim for mem buck" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7.--10. "COREBUCKLOTON,Core Buck low TON trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. "COREBUCKBURSTEN,Core Buck burst enable" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "COREBUCKZXTRIM,Core buck zero crossing trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--1. "COREBUCKHYSTTRIM,Hysterisis trim for core buck" "0,1,2,3"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "LDOREG1,Analog LDO Reg 1"
|
|
bitfld.long 0x00 20. "CORELDOIBSTRM,CORE LDO IBIAS Trim" "0,1"
|
|
bitfld.long 0x00 14.--19. "CORELDOLPTRIM,CORE LDO Low Power Trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "TRIMCORELDOR3,CORE LDO tempco trim (R3)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--9. 1. "TRIMCORELDOR1,CORE LDO Active mode ouput trim (R1)"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "LDOREG3,LDO Control Register 3"
|
|
bitfld.long 0x00 12.--17. "TRIMMEMLDOR1,MEM LDO active mode trim (R1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 6.--11. "MEMLDOLPALTTRIM,MEM LDO TRIM for low power mode with ADC active" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "MEMLDOLPTRIM,MEM LDO TRIM for low power mode with ADC inactive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "BODPORCTRL,BOD and PDR control Register"
|
|
bitfld.long 0x00 3. "BODEXTREFSEL,BOD External Reference Select" "?,1: BOD external reference select"
|
|
bitfld.long 0x00 2. "PDREXTREFSEL,PDR External Reference Select" "?,1: PDR external reference select"
|
|
newline
|
|
bitfld.long 0x00 1. "PWDBOD,BOD Power Down" "?,1: BOD power down"
|
|
bitfld.long 0x00 0. "PWDPDR,PDR Power Down" "?,1: PDR power down"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "ADCPWRDLY,ADC Power Up Delay Control"
|
|
hexmask.long.byte 0x00 8.--15. 1. "ADCPWR1,ADC Reference Keeper enable delay in 16 ADC CLK increments for ADC_CLKSEL = 0x1 8 ADC CLOCK increments for ADC_CLKSEL = 0x2"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ADCPWR0,ADC Reference Buffer Power Enable delay in 64 ADC CLK increments for ADC_CLKSEL = 0x1 32 ADC CLOCK increments for ADC_CLKSEL = 0x2"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "ADCCAL,ADC Calibration Control"
|
|
bitfld.long 0x00 1. "ADCCALIBRATED,Status for ADC Calibration" "0: ADC is not calibrated,1: ADC is calibrated"
|
|
bitfld.long 0x00 0. "CALONPWRUP,Run ADC Calibration on initial power up sequence" "0: Disable automatic calibration on initial..,1: Enable automatic calibration on initial power.."
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "ADCBATTLOAD,ADC Battery Load Enable"
|
|
bitfld.long 0x00 0. "BATTLOAD,Enable the ADC battery load resistor" "0: Battery load is disconnected,1: Battery load is enabled"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "BUCKTRIM,Trim settings for Core and Mem buck modules"
|
|
bitfld.long 0x00 24.--29. "RSVD2,RESERVED" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--19. "COREBUCKR1_HI,Core Buck voltage output trim bits[9:6]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 8.--13. "COREBUCKR1_LO,Core Buck voltage output trim bits[5:0] Concatenate with field COREBUCKR1_HI for the full trim value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. "MEMBUCKR1,Trim values for BUCK regulator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "XTALGENCTRL,XTAL Oscillator General Control"
|
|
bitfld.long 0x00 8.--13. "XTALKSBIASTRIM,XTAL IBIAS Kick start trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 2.--7. "XTALBIASTRIM,XTAL IBIAS trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "ACWARMUP,Auto-calibration delay control" "0: Warmup period of 1-2 seconds,1: Warmup period of 2-4 seconds,2: Warmup period of 4-8 seconds,3: Warmup period of 8-16 seconds"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "BOOTLOADERLOW,Determines whether the bootloader code is visible at address 0x00000000"
|
|
bitfld.long 0x00 0. "VALUE,Determines whether the bootloader code is visible at address 0x00000000 or not" "?,1: Bootloader code at 0x00000000"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "SHADOWVALID,Register to indicate whether the shadow registers have been successfully loaded from the Flash Information Space"
|
|
bitfld.long 0x00 1. "BL_DSLEEP,Indicates whether the bootloader should sleep or deep sleep if no image loaded" "?,1: Bootloader will go to deep sleep if no flash.."
|
|
bitfld.long 0x00 0. "VALID,Indicates whether the shadow registers contain valid data from the Flash Information Space" "?,1: Flash information space contains valid data"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "ICODEFAULTADDR,ICODE bus address which was present when a bus fault occurred"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,The ICODE bus address observed when a Bus Fault occurred"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "DCODEFAULTADDR,DCODE bus address which was present when a bus fault occurred"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,The DCODE bus address observed when a Bus Fault occurred"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "SYSFAULTADDR,System bus address which was present when a bus fault occurred"
|
|
hexmask.long 0x00 0.--31. 1. "ADDR,SYS bus address observed when a Bus Fault occurred"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "FAULTSTATUS,Reflects the status of the bus decoders' fault detection"
|
|
bitfld.long 0x00 2. "SYS,SYS Bus Decoder Fault Detected bit" "0: No bus fault has been detected,1: Bus fault detected"
|
|
bitfld.long 0x00 1. "DCODE,DCODE Bus Decoder Fault Detected bit" "0: No DCODE fault has been detected,1: DCODE fault detected"
|
|
newline
|
|
bitfld.long 0x00 0. "ICODE,The ICODE Bus Decoder Fault Detected bit" "0: No ICODE fault has been detected,1: ICODE fault detected"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "FAULTCAPTUREEN,Enable the fault capture registers"
|
|
bitfld.long 0x00 0. "ENABLE,Fault Capture Enable field" "0: Disable fault capture,1: Enable fault capture"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "DBGR1,Read-only debug register 1"
|
|
hexmask.long 0x00 0.--31. 1. "ONETO8,Read-only register for communication validation"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "DBGR2,Read-only debug register 2"
|
|
hexmask.long 0x00 0.--31. 1. "COOLCODE,Read-only register for communication validation"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "PMUENABLE,Control bit to enable/disable the PMU"
|
|
bitfld.long 0x00 0. "ENABLE,PMU Enable Control bit" "0: Disable MCU power management,1: Enable MCU power management"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "TPIUCTRL,TPIU Control Register"
|
|
bitfld.long 0x00 8.--10. "CLKSEL,This field selects the frequency of the ARM M4 TPIU port" "0: Low power state,1: Selects HFRC divided by 2 as the source TPIU..,2: Selects HFRC divided by 8 as the source TPIU..,3: Selects HFRC divided by 16 as the source TPIU..,4: Selects HFRC divided by 32 as the source TPIU..,?..."
|
|
bitfld.long 0x00 0. "ENABLE,TPIU Enable field" "0: Disable the TPIU,1: Enable the TPIU"
|
|
tree.end
|
|
tree "PDM (Pulse Density Modulation (Digital Microphone) Interface)"
|
|
base ad:0x50011000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "PCFG,PDM Configuration Register"
|
|
bitfld.long 0x00 31. "LRSWAP,Left/right channel swap" "0: No channel swapping (IFO Read LEFT_RIGHT),1: Swap left and right channels (FIFO Read.."
|
|
bitfld.long 0x00 27.--30. "PGARIGHT,Right channel PGA gain" "0: 0.0 db gain,1: 1.5 db gain,2: 3.0 db gain,3: 4.5 db gain,4: 6.0 db gain,5: 7.5 db gain,6: 9.0 db gain,7: 10.5 db gain,8: -12.0 db gain,9: -10.5 db gain,10: -9.0 db gain,11: -7.5 db gain,12: -6.0 db gain,13: -4.5 db gain,14: -3.0 db gain,15: -1.5 db gain"
|
|
bitfld.long 0x00 23.--26. "PGALEFT,Left channel PGA gain" "0: 0.0 db gain,1: 1.5 db gain,2: 3.0 db gain,3: 4.5 db gain,4: 6.0 db gain,5: 7.5 db gain,6: 9.0 db gain,7: 10.5 db gain,8: -12.0 db gain,9: -10.5 db gain,10: -9.0 db gain,11: -7.5 db gain,12: -6.0 db gain,13: -4.5 db gain,14: -3.0 db gain,15: -1.5 db gain"
|
|
newline
|
|
bitfld.long 0x00 17.--18. "MCLKDIV,PDM_CLK frequency divisor" "0: Divide input clock by 1,1: Divide input clock by 2,2: Divide input clock by 3,3: Divide input clock by 4"
|
|
hexmask.long.byte 0x00 10.--16. 1. "SINCRATE,SINC decimation rate"
|
|
bitfld.long 0x00 9. "ADCHPD,High pass filter disable" "0: Enable high pass filter,1: Disable high pass filter"
|
|
newline
|
|
bitfld.long 0x00 5.--8. "HPCUTOFF,High pass filter coefficients" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--4. "CYCLES,Number of clocks during gain-setting changes" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 1. "SOFTMUTE,Soft mute control" "0: Disable Soft Mute,1: Enable Soft Mute"
|
|
newline
|
|
bitfld.long 0x00 0. "PDMCORE,Data Streaming Control" "0: Disable Data Streaming,1: Enable Data Streaming"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "VCFG,Voice Configuration Register"
|
|
bitfld.long 0x00 31. "IOCLKEN,Enable the IO clock" "0: Disable FIFO,1: Enable FIFO"
|
|
bitfld.long 0x00 30. "RSTB,Reset the IP core" "0: Reset the core,1: Enable the core"
|
|
bitfld.long 0x00 27.--29. "PDMCLKSEL,Select the PDM input clock" "0: Static value,1: PDM clock is 12 MHz,2: PDM clock is 6 MHz,3: PDM clock is 3 MHz,4: PDM clock is 1.5 MHz,5: PDM clock is 750 KHz,6: PDM clock is 375 KHz,7: PDM clock is 187.5 KHz"
|
|
newline
|
|
bitfld.long 0x00 26. "PDMCLK,Enable the serial clock" "0: Disable serial clock,1: Enable serial clock"
|
|
bitfld.long 0x00 20. "I2SMODE,I2S interface enable" "0: Disable I2S interface,1: Enable I2S interface"
|
|
bitfld.long 0x00 19. "BCLKINV,I2S BCLK input inversion" "0: BCLK inverted,1: BCLK not inverted"
|
|
newline
|
|
bitfld.long 0x00 17. "DMICKDEL,PDM clock sampling delay" "0: No delay,1: 1 cycle delay"
|
|
bitfld.long 0x00 16. "SELAP,Select PDM input clock source" "0: Clock source from internal clock generator,1: Clock source from I2S BCLK"
|
|
bitfld.long 0x00 8. "PCMPACK,PCM data packing enable" "0: Disable PCM packing,1: Enable PCM packing"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "CHSET,Set PCM channels" "0: Channel disabled,1: Mono left channel,2: Mono right channel,3: Stereo channels"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "FR,Voice Status Register"
|
|
hexmask.long.word 0x00 0.--8. 1. "FIFOCNT,Valid 32-bit entries currently in the FIFO"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "FRD,FIFO"
|
|
hexmask.long 0x00 0.--31. 1. "FIFOREAD,FIFO read data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FLUSH,FIFO Flush"
|
|
bitfld.long 0x00 0. "FIFOFLUSH,FIFO FLUSH" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FTHR,FIFO Threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. "FIFOTHR,FIFO interrupt threshold"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 2. "UNDFL,This is the FIFO underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "OVF,This is the FIFO overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "THR,This is the FIFO threshold interrupt" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 2. "UNDFL,This is the FIFO underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "OVF,This is the FIFO overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "THR,This is the FIFO threshold interrupt" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 2. "UNDFL,This is the FIFO underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "OVF,This is the FIFO overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "THR,This is the FIFO threshold interrupt" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 2. "UNDFL,This is the FIFO underflow interrupt" "0,1"
|
|
bitfld.long 0x00 1. "OVF,This is the FIFO overflow interrupt" "0,1"
|
|
bitfld.long 0x00 0. "THR,This is the FIFO threshold interrupt" "0,1"
|
|
tree.end
|
|
tree "PWRCTRL (PWR Controller Register Bank)"
|
|
base ad:0x40021000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SUPPLYSRC,Memory and Core Voltage Supply Source Select Register"
|
|
bitfld.long 0x00 2. "SWITCH_LDO_IN_SLEEP,Switches the CORE DOMAIN from BUCK mode (if enabled) to LDO when CPU is in DEEP SLEEP" "?,1: Automatically switch from CORE BUCK to CORE.."
|
|
bitfld.long 0x00 1. "COREBUCKEN,Enables and Selects the Core Buck as the supply for the low-voltage power domain" "?,1: Enable the Core Buck for the low-voltage.."
|
|
newline
|
|
bitfld.long 0x00 0. "MEMBUCKEN,Enables and select the Memory Buck as the supply for the Flash and SRAM power domain" "?,1: Enable the Memory Buck as the supply for.."
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "POWERSTATUS,Power Status Register for MCU supplies and peripherals"
|
|
bitfld.long 0x00 1. "COREBUCKON,Indicates whether the Core low-voltage domain is supplied from the LDO or the Buck" "0: Indicates the the LDO is supplying the Core..,1: Indicates the the Buck is supplying the Core.."
|
|
bitfld.long 0x00 0. "MEMBUCKON,Indicate whether the Memory power domain is supplied from the LDO or the Buck" "0: Indicates the LDO is supplying the memory..,1: Indicates the Buck is supplying the memory.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "DEVICEEN,DEVICE ENABLES for SHELBY"
|
|
bitfld.long 0x00 10. "PWRPDM,Enable PDM Digital Block" "0: Disables PDM,1: Enable PDM"
|
|
bitfld.long 0x00 9. "PWRADC,Enable ADC Digital Block" "0: Disables ADC,1: Enable ADC"
|
|
newline
|
|
bitfld.long 0x00 8. "PWRUART1,Enable UART 1" "0: Disables UART 1,1: Enable UART 1"
|
|
bitfld.long 0x00 7. "PWRUART0,Enable UART 0" "0: Disables UART 0,1: Enable UART 0"
|
|
newline
|
|
bitfld.long 0x00 6. "IO_MASTER5,Enable IO MASTER 5" "0: Disables IO MASTER 5,1: Enable IO MASTER 5"
|
|
bitfld.long 0x00 5. "IO_MASTER4,Enable IO MASTER 4" "0: Disables IO MASTER 4,1: Enable IO MASTER 4"
|
|
newline
|
|
bitfld.long 0x00 4. "IO_MASTER3,Enable IO MASTER 3" "0: Disables IO MASTER 3,1: Enable IO MASTER 3"
|
|
bitfld.long 0x00 3. "IO_MASTER2,Enable IO MASTER 2" "0: Disables IO MASTER 2,1: Enable IO MASTER 2"
|
|
newline
|
|
bitfld.long 0x00 2. "IO_MASTER1,Enable IO MASTER 1" "0: Disables IO MASTER 1,1: Enable IO MASTER 1"
|
|
bitfld.long 0x00 1. "IO_MASTER0,Enable IO MASTER 0" "0: Disables IO MASTER 0,1: Enable IO MASTER 0"
|
|
newline
|
|
bitfld.long 0x00 0. "IO_SLAVE,Enable IO SLAVE" "0: Disables IO SLAVE,1: Enable IO SLAVE"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SRAMPWDINSLEEP,Powerdown an SRAM Banks in Deep Sleep mode"
|
|
bitfld.long 0x00 31. "CACHE_PWD_SLP,Enable CACHE BANKS to power down in deep sleep" "0: CACHE BANKS STAYS in Retention in CORE SLEEP,1: CACHE BANKS POWER DOWN in CORE SLEEP"
|
|
hexmask.long.word 0x00 0.--10. 1. "SRAMSLEEPPOWERDOWN,Selects which SRAM banks are powered down in deep sleep mode causing the contents of the bank to be lost"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MEMEN,Disables individual banks of the MEMORY array"
|
|
bitfld.long 0x00 31. "CACHEB2,Enable CACHE BANK 2" "0: Disable CACHE BANK 2,1: Enable CACHE BANK 2"
|
|
bitfld.long 0x00 29. "CACHEB0,Enable CACHE BANK 0" "0: Disable CACHE BANK 0,1: Enable CACHE BANK 0"
|
|
newline
|
|
bitfld.long 0x00 12. "FLASH1,Enable FLASH1" "0: Disables FLASH1,1: Enable FLASH1"
|
|
bitfld.long 0x00 11. "FLASH0,Enable FLASH 0" "0: Disables FLASH 0,1: Enable FLASH 0"
|
|
newline
|
|
hexmask.long.word 0x00 0.--10. 1. "SRAMEN,Enables power for selected SRAM banks (else an access to its address space to generate a Hard Fault)"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "PWRONSTATUS,POWER ON Status"
|
|
bitfld.long 0x00 21. "PD_CACHEB2,This bit is 1 if power is supplied to CACHE BANK 2" "0,1"
|
|
bitfld.long 0x00 19. "PD_CACHEB0,This bit is 1 if power is supplied to CACHE BANK 0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 18. "PD_GRP7_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP7" "0,1"
|
|
bitfld.long 0x00 17. "PD_GRP6_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP6" "0,1"
|
|
newline
|
|
bitfld.long 0x00 16. "PD_GRP5_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP5" "0,1"
|
|
bitfld.long 0x00 15. "PD_GRP4_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP4" "0,1"
|
|
newline
|
|
bitfld.long 0x00 14. "PD_GRP3_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP3" "0,1"
|
|
bitfld.long 0x00 13. "PD_GRP2_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 12. "PD_GRP1_SRAM,This bit is 1 if power is supplied to SRAM domain PD_GRP1" "0,1"
|
|
bitfld.long 0x00 11. "PD_GRP0_SRAM3,This bit is 1 if power is supplied to SRAM domain PD_SRAM0_3" "0,1"
|
|
newline
|
|
bitfld.long 0x00 10. "PD_GRP0_SRAM2,This bit is 1 if power is supplied to SRAM domain PD_SRAM0_2" "0,1"
|
|
bitfld.long 0x00 9. "PD_GRP0_SRAM1,This bit is 1 if power is supplied to SRAM domain SRAM0_1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PD_GRP0_SRAM0,This bit is 1 if power is supplied to SRAM domain SRAM0_0" "0,1"
|
|
bitfld.long 0x00 7. "PDADC,This bit is 1 if power is supplied to domain PD_ADC" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "PD_FLAM1,This bit is 1 if power is supplied to domain PD_FLAM1" "0,1"
|
|
bitfld.long 0x00 5. "PD_FLAM0,This bit is 1 if power is supplied to domain PD_FLAM0" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "PD_PDM,This bit is 1 if power is supplied to domain PD_PDM" "0,1"
|
|
bitfld.long 0x00 3. "PDC,This bit is 1 if power is supplied to power domain C which supplies IOM3-5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "PDB,This bit is 1 if power is supplied to power domain B which supplies IOM0-2" "0,1"
|
|
bitfld.long 0x00 1. "PDA,This bit is 1 if power is supplied to power domain A which supplies IOS and UART0 1" "0,1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SRAMCTRL,SRAM Control register"
|
|
bitfld.long 0x00 2. "SRAM_MASTER_CLKGATE,Enables top-level clock gating in the SRAM block" "0: Disables Master SRAM Clock Gating,1: Enable Master SRAM Clock Gate"
|
|
bitfld.long 0x00 1. "SRAM_CLKGATE,Enables individual per-RAM clock gating in the SRAM block" "0: Disables Individual SRAM Clock Gating,1: Enable Individual SRAM Clock Gating"
|
|
newline
|
|
bitfld.long 0x00 0. "SRAM_LIGHT_SLEEP,Enable LS (light sleep) of cache RAMs" "0: Disables LIGHT SLEEP for SRAMs,1: Enable LIGHT SLEEP for SRAMs"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "ADCSTATUS,Power Status Register for ADC Block"
|
|
bitfld.long 0x00 5. "ADC_REFBUF_PWD,This bit indicates that the ADC REFBUF is powered down" "0,1"
|
|
bitfld.long 0x00 4. "ADC_REFKEEP_PWD,This bit indicates that the ADC REFKEEP is powered down" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. "ADC_VBAT_PWD,This bit indicates that the ADC VBAT resistor divider is powered down" "0,1"
|
|
bitfld.long 0x00 2. "ADC_VPTAT_PWD,This bit indicates that the ADC temperature sensor input buffer is powered down" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "ADC_BGT_PWD,This bit indicates that the ADC Band Gap is powered down" "0,1"
|
|
bitfld.long 0x00 0. "ADC_PWD,This bit indicates that the ADC is powered down" "0,1"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MISCOPT,Power Optimization Control Bits"
|
|
bitfld.long 0x00 2. "DIS_LDOLPMODE_TIMERS,Setting this bit will enable the MEM LDO to be in LPMODE during deep sleep even when the ctimers or stimers are running" "0,1"
|
|
tree.end
|
|
tree "RSTGEN (MCU Reset Generator)"
|
|
base ad:0x40000000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 1. "WDREN,Watchdog Timer Reset Enable" "0,1"
|
|
bitfld.long 0x00 0. "BODHREN,Brown out high (2.1v) reset enable" "0,1"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SWPOI,Software POI Reset"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWPOIKEY,0x1B generates a software POI reset"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SWPOR,Software POR Reset"
|
|
hexmask.long.byte 0x00 0.--7. 1. "SWPORKEY,0xD4 generates a software POR reset"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "STAT,Status Register"
|
|
bitfld.long 0x00 6. "WDRSTAT,Reset was initiated by a Watchdog Timer Reset" "0,1"
|
|
bitfld.long 0x00 5. "DBGRSTAT,Reset was a initiated by Debugger Reset" "0,1"
|
|
bitfld.long 0x00 4. "POIRSTAT,Reset was a initiated by Software POI Reset" "0,1"
|
|
bitfld.long 0x00 3. "SWRSTAT,Reset was a initiated by SW POR or AIRCR Reset" "0,1"
|
|
bitfld.long 0x00 2. "BORSTAT,Reset was initiated by a Brown-Out Reset" "0,1"
|
|
bitfld.long 0x00 1. "PORSTAT,Reset was initiated by a Power-On Reset" "0,1"
|
|
bitfld.long 0x00 0. "EXRSTAT,Reset was initiated by an External Reset" "0,1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CLRSTAT,Clear the status register"
|
|
bitfld.long 0x00 0. "CLRSTAT,Writing a 1 to this bit clears all bits in the RST_STAT" "0,1"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TPIU_RST,TPIU reset"
|
|
bitfld.long 0x00 0. "TPIURST,Static reset for the TPIU" "0,1"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 0. "BODH,Enables an interrupt that triggers when VCC is below BODH level" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 0. "BODH,Enables an interrupt that triggers when VCC is below BODH level" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 0. "BODH,Enables an interrupt that triggers when VCC is below BODH level" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 0. "BODH,Enables an interrupt that triggers when VCC is below BODH level" "0,1"
|
|
tree.end
|
|
tree "RTC (Real-time Counter)"
|
|
base ad:0x40004040
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRLOW,RTC Counters Lower"
|
|
bitfld.long 0x00 24.--29. "CTRHR,Hours Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 16.--22. 1. "CTRMIN,Minutes Counter"
|
|
hexmask.long.byte 0x00 8.--14. 1. "CTRSEC,Seconds Counter"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "CTR100,100ths of a second Counter"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRUP,RTC Counters Upper"
|
|
bitfld.long 0x00 31. "CTERR,Counter read error status" "0: No read error occurred,1: Read error occurred"
|
|
bitfld.long 0x00 28. "CEB,Century enable" "0: Disable the Century bit from changing,1: Enable the Century bit to change"
|
|
bitfld.long 0x00 27. "CB,Century" "0: Century is 2000s,1: Century is 1900s/2100s"
|
|
newline
|
|
bitfld.long 0x00 24.--26. "CTRWKDY,Weekdays Counter" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 16.--23. 1. "CTRYR,Years Counter"
|
|
bitfld.long 0x00 8.--12. "CTRMO,Months Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "CTRDATE,Date Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ALMLOW,RTC Alarms Lower"
|
|
bitfld.long 0x00 24.--29. "ALMHR,Hours Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 16.--22. 1. "ALMMIN,Minutes Alarm"
|
|
hexmask.long.byte 0x00 8.--14. 1. "ALMSEC,Seconds Alarm"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "ALM100,100ths of a second Alarm"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ALMUP,RTC Alarms Upper"
|
|
bitfld.long 0x00 16.--18. "ALMWKDY,Weekdays Alarm" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--12. "ALMMO,Months Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--5. "ALMDATE,Date Alarm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "RTCCTL,RTC Control Register"
|
|
bitfld.long 0x00 5. "HR1224,Hours Counter mode" "0: Hours in 24 hour mode,1: Hours in 12 hour mode"
|
|
bitfld.long 0x00 4. "RSTOP,RTC input clock control" "0: Allow the RTC input clock to run,1: Stop the RTC input clock"
|
|
bitfld.long 0x00 1.--3. "RPT,Alarm repeat interval" "0: Alarm interrupt disabled,1: Interrupt every year,2: Interrupt every month,3: Interrupt every week,4: Interrupt every day,5: Interrupt every hour,6: Interrupt every minute,7: Interrupt every second/10th/100th"
|
|
newline
|
|
bitfld.long 0x00 0. "WRTC,Counter write control" "0: Counter writes are disabled,1: Counter writes are enabled"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 3. "ALM,RTC Alarm interrupt" "0,1"
|
|
bitfld.long 0x00 2. "OF,XT Oscillator Fail interrupt" "0,1"
|
|
bitfld.long 0x00 1. "ACC,Autocalibration Complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "ACF,Autocalibration Fail interrupt" "0,1"
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
repeat 2. (list 0. 1.) (list ad:0x4001C000 ad:0x4001D000)
|
|
tree "UART$1"
|
|
base $2
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DR,UART Data Register"
|
|
bitfld.long 0x00 11. "OEDATA,This is the overrun error indicator" "0: No error on UART OEDATA overrun error indicator,1: Error on UART OEDATA overrun error indicator"
|
|
bitfld.long 0x00 10. "BEDATA,This is the break error indicator" "0: No error on UART BEDATA break error indicator,1: Error on UART BEDATA break error indicator"
|
|
newline
|
|
bitfld.long 0x00 9. "PEDATA,This is the parity error indicator" "0: No error on UART PEDATA parity error indicator,1: Error on UART PEDATA parity error indicator"
|
|
bitfld.long 0x00 8. "FEDATA,This is the framing error indicator" "0: No error on UART FEDATA framing error indicator,1: Error on UART FEDATA framing error indicator"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "DATA,This is the UART data port"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RSR,UART Status Register"
|
|
bitfld.long 0x00 3. "OESTAT,This is the overrun error indicator" "0: No error on UART OESTAT overrun error indicator,1: Error on UART OESTAT overrun error indicator"
|
|
bitfld.long 0x00 2. "BESTAT,This is the break error indicator" "0: No error on UART BESTAT break error indicator,1: Error on UART BESTAT break error indicator"
|
|
newline
|
|
bitfld.long 0x00 1. "PESTAT,This is the parity error indicator" "0: No error on UART PESTAT parity error indicator,1: Error on UART PESTAT parity error indicator"
|
|
bitfld.long 0x00 0. "FESTAT,This is the framing error indicator" "0: No error on UART FESTAT framing error indicator,1: Error on UART FESTAT framing error indicator"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FR,Flag Register"
|
|
bitfld.long 0x00 8. "TXBUSY,This bit holds the transmit BUSY indicator" "0,1"
|
|
bitfld.long 0x00 7. "TXFE,This bit holds the transmit FIFO empty indicator" "?,1: Transmit fifo is empty"
|
|
newline
|
|
bitfld.long 0x00 6. "RXFF,This bit holds the receive FIFO full indicator" "?,1: Receive fifo is full"
|
|
bitfld.long 0x00 5. "TXFF,This bit holds the transmit FIFO full indicator" "?,1: Transmit fifo is full"
|
|
newline
|
|
bitfld.long 0x00 4. "RXFE,This bit holds the receive FIFO empty indicator" "?,1: Receive fifo is empty"
|
|
bitfld.long 0x00 3. "BUSY,This bit holds the busy indicator" "?,1: UART busy indicator"
|
|
newline
|
|
bitfld.long 0x00 2. "DCD,This bit holds the data carrier detect indicator" "?,1: Data carrier detect detected"
|
|
bitfld.long 0x00 1. "DSR,This bit holds the data set ready indicator" "?,1: Data set ready"
|
|
newline
|
|
bitfld.long 0x00 0. "CTS,This bit holds the clear to send indicator" "?,1: Clear to send is indicated"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "ILPR,IrDA Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ILPDVSR,These bits hold the IrDA counter divisor"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IBRD,Integer Baud Rate Divisor"
|
|
hexmask.long.word 0x00 0.--15. 1. "DIVINT,These bits hold the baud integer divisor"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FBRD,Fractional Baud Rate Divisor"
|
|
bitfld.long 0x00 0.--5. "DIVFRAC,These bits hold the baud fractional divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "LCRH,Line Control High"
|
|
bitfld.long 0x00 7. "SPS,This bit holds the stick parity select" "0,1"
|
|
bitfld.long 0x00 5.--6. "WLEN,These bits hold the write length" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 4. "FEN,This bit holds the FIFO enable" "0,1"
|
|
bitfld.long 0x00 3. "STP2,This bit holds the two stop bits select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "EPS,This bit holds the even parity select" "0,1"
|
|
bitfld.long 0x00 1. "PEN,This bit holds the parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "BRK,This bit holds the break set" "0,1"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 15. "CTSEN,This bit enables CTS hardware flow control" "0,1"
|
|
bitfld.long 0x00 14. "RTSEN,This bit enables RTS hardware flow control" "0,1"
|
|
newline
|
|
bitfld.long 0x00 13. "OUT2,This bit holds modem Out2" "0,1"
|
|
bitfld.long 0x00 12. "OUT1,This bit holds modem Out1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. "RTS,This bit enables request to send" "0,1"
|
|
bitfld.long 0x00 10. "DTR,This bit enables data transmit ready" "0,1"
|
|
newline
|
|
bitfld.long 0x00 9. "RXE,This bit is the receive enable" "0,1"
|
|
bitfld.long 0x00 8. "TXE,This bit is the transmit enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. "LBE,This bit is the loopback enable" "0,1"
|
|
bitfld.long 0x00 4.--6. "CLKSEL,This bitfield is the UART clock select" "0: No UART clock,1: 24 MHz clock,2: 12 MHz clock,3: 6 MHz clock,4: 3 MHz clock,?..."
|
|
newline
|
|
bitfld.long 0x00 3. "CLKEN,This bit is the UART clock enable" "0,1"
|
|
bitfld.long 0x00 2. "SIRLP,This bit is the SIR low power select" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "SIREN,This bit is the SIR ENDEC enable" "0,1"
|
|
bitfld.long 0x00 0. "UARTEN,This bit is the UART enable" "0,1"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IFLS,FIFO Interrupt Level Select"
|
|
bitfld.long 0x00 3.--5. "RXIFLSEL,These bits hold the receive FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. "TXIFLSEL,These bits hold the transmit FIFO interrupt level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "IER,Interrupt Enable"
|
|
bitfld.long 0x00 10. "OEIM,This bit holds the overflow interrupt enable" "0,1"
|
|
bitfld.long 0x00 9. "BEIM,This bit holds the break error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PEIM,This bit holds the parity error interrupt enable" "0,1"
|
|
bitfld.long 0x00 7. "FEIM,This bit holds the framing error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RTIM,This bit holds the receive timeout interrupt enable" "0,1"
|
|
bitfld.long 0x00 5. "TXIM,This bit holds the transmit interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXIM,This bit holds the receive interrupt enable" "0,1"
|
|
bitfld.long 0x00 3. "DSRMIM,This bit holds the modem DSR interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DCDMIM,This bit holds the modem DCD interrupt enable" "0,1"
|
|
bitfld.long 0x00 1. "CTSMIM,This bit holds the modem CTS interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXCMPMIM,This bit holds the modem TXCMP interrupt enable" "0,1"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "IES,Interrupt Status"
|
|
bitfld.long 0x00 10. "OERIS,This bit holds the overflow interrupt status" "0,1"
|
|
bitfld.long 0x00 9. "BERIS,This bit holds the break error interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PERIS,This bit holds the parity error interrupt status" "0,1"
|
|
bitfld.long 0x00 7. "FERIS,This bit holds the framing error interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RTRIS,This bit holds the receive timeout interrupt status" "0,1"
|
|
bitfld.long 0x00 5. "TXRIS,This bit holds the transmit interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXRIS,This bit holds the receive interrupt status" "0,1"
|
|
bitfld.long 0x00 3. "DSRMRIS,This bit holds the modem DSR interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DCDMRIS,This bit holds the modem DCD interrupt status" "0,1"
|
|
bitfld.long 0x00 1. "CTSMRIS,This bit holds the modem CTS interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXCMPMRIS,This bit holds the modem TXCMP interrupt status" "0,1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MIS,Masked Interrupt Status"
|
|
bitfld.long 0x00 10. "OEMIS,This bit holds the overflow interrupt status masked" "0,1"
|
|
bitfld.long 0x00 9. "BEMIS,This bit holds the break error interrupt status masked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PEMIS,This bit holds the parity error interrupt status masked" "0,1"
|
|
bitfld.long 0x00 7. "FEMIS,This bit holds the framing error interrupt status masked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RTMIS,This bit holds the receive timeout interrupt status masked" "0,1"
|
|
bitfld.long 0x00 5. "TXMIS,This bit holds the transmit interrupt status masked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXMIS,This bit holds the receive interrupt status masked" "0,1"
|
|
bitfld.long 0x00 3. "DSRMMIS,This bit holds the modem DSR interrupt status masked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DCDMMIS,This bit holds the modem DCD interrupt status masked" "0,1"
|
|
bitfld.long 0x00 1. "CTSMMIS,This bit holds the modem CTS interrupt status masked" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXCMPMMIS,This bit holds the modem TXCMP interrupt status masked" "0,1"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "IEC,Interrupt Clear"
|
|
bitfld.long 0x00 10. "OEIC,This bit holds the overflow interrupt clear" "0,1"
|
|
bitfld.long 0x00 9. "BEIC,This bit holds the break error interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 8. "PEIC,This bit holds the parity error interrupt clear" "0,1"
|
|
bitfld.long 0x00 7. "FEIC,This bit holds the framing error interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 6. "RTIC,This bit holds the receive timeout interrupt clear" "0,1"
|
|
bitfld.long 0x00 5. "TXIC,This bit holds the transmit interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. "RXIC,This bit holds the receive interrupt clear" "0,1"
|
|
bitfld.long 0x00 3. "DSRMIC,This bit holds the modem DSR interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 2. "DCDMIC,This bit holds the modem DCD interrupt clear" "0,1"
|
|
bitfld.long 0x00 1. "CTSMIC,This bit holds the modem CTS interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "TXCMPMIC,This bit holds the modem TXCMP interrupt clear" "0,1"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "VCOMP (Voltage Comparator)"
|
|
base ad:0x4000C000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,The Voltage Comparator Configuration Register contains the software control for selecting beween the 4 options for the positive input as well as the multiple options for the reference input"
|
|
bitfld.long 0x00 16.--19. "LVLSEL,When the reference input NSEL is set to NSEL_DAC this bitfield selects the voltage level for the negative input to the comparator" "0: Set Reference input to 0.58 Volts,1: Set Reference input to 0.77 Volts,2: Set Reference input to 0.97 Volts,3: Set Reference input to 1.16 Volts,4: Set Reference input to 1.35 Volts,5: Set Reference input to 1.55 Volts,6: Set Reference input to 1.74 Volts,7: Set Reference input to 1.93 Volts,8: Set Reference input to 2.13 Volts,9: Set Reference input to 2.32 Volts,10: Set Reference input to 2.51 Volts,11: Set Reference input to 2.71 Volts,12: Set Reference input to 2.90 Volts,13: Set Reference input to 3.09 Volts,14: Set Reference input to 3.29 Volts,15: Set Reference input to 3.48 Volts"
|
|
bitfld.long 0x00 8.--9. "NSEL,This bitfield selects the negative input to the comparator" "0: Use external reference 1 for reference input,1: Use external reference 2 for reference input,2: Use external reference 3 for reference input,3: Use DAC output selected by LVLSEL for.."
|
|
newline
|
|
bitfld.long 0x00 0.--1. "PSEL,This bitfield selects the positive input to the comparator" "0: Use VDDADJ for the positive input,1: Use the temperature sensor output for the..,2: Use external voltage 0 for positive input,3: Use external voltage 1 for positive input"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STAT,Status Register"
|
|
bitfld.long 0x00 1. "PWDSTAT,This bit indicates the power down state of the voltage comparator" "?,1: The voltage comparator is powered down"
|
|
bitfld.long 0x00 0. "CMPOUT,This bit is 1 if the positive input of the comparator is greater than the negative input" "0: The negative input of the comparator is..,1: The positive input of the comparator is.."
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PWDKEY,Write a value of 0x37 to unlock write any other value to lock"
|
|
hexmask.long 0x00 0.--31. 1. "PWDKEY,Key register value"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
|
|
bitfld.long 0x00 1. "OUTHI,This bit is the vcompout high interrupt" "0,1"
|
|
bitfld.long 0x00 0. "OUTLOW,This bit is the vcompout low interrupt" "0,1"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
|
|
bitfld.long 0x00 1. "OUTHI,This bit is the vcompout high interrupt" "0,1"
|
|
bitfld.long 0x00 0. "OUTLOW,This bit is the vcompout low interrupt" "0,1"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
|
|
bitfld.long 0x00 1. "OUTHI,This bit is the vcompout high interrupt" "0,1"
|
|
bitfld.long 0x00 0. "OUTLOW,This bit is the vcompout low interrupt" "0,1"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
|
|
bitfld.long 0x00 1. "OUTHI,This bit is the vcompout high interrupt" "0,1"
|
|
bitfld.long 0x00 0. "OUTLOW,This bit is the vcompout low interrupt" "0,1"
|
|
tree.end
|
|
tree "WDT (Watchdog Timer Unit)"
|
|
base ad:0x40024000
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 24.--26. "CLKSEL,Select the frequency for the WDT" "0: Low Power Mode,1: 128 Hz LFRC clock,2: 16 Hz LFRC clock,3: 1 Hz LFRC clock,4: 1/16th Hz LFRC clock,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. "INTVAL,This bitfield is the compare value for counter bits 7:0 to generate a watchdog interrupt"
|
|
hexmask.long.byte 0x00 8.--15. 1. "RESVAL,This bitfield is the compare value for counter bits 7:0 to generate a watchdog reset"
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bitfld.long 0x00 2. "RESEN,This bitfield enables the WDT reset" "0,1"
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bitfld.long 0x00 1. "INTEN,This bitfield enables the WDT interrupt" "0,1"
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bitfld.long 0x00 0. "WDTEN,This bitfield enables the WDT" "0,1"
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group.long 0x04++0x03
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line.long 0x00 "RSTRT,Restart the watchdog timer"
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hexmask.long.byte 0x00 0.--7. 1. "RSTRT,Writing 0xB2 to WDTRSTRT restarts the watchdog timer"
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group.long 0x08++0x03
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line.long 0x00 "LOCK,Locks the WDT"
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hexmask.long.byte 0x00 0.--7. 1. "LOCK,Writing 0x3A locks the watchdog timer"
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group.long 0x0C++0x03
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line.long 0x00 "COUNT,Current Counter Value for WDT"
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hexmask.long.byte 0x00 0.--7. 1. "COUNT,Read-Only current value of the WDT counter"
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group.long 0x200++0x03
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line.long 0x00 "INTEN,Set bits in this register to allow this module to generate the corresponding interrupt"
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bitfld.long 0x00 0. "WDTINT,Watchdog Timer Interrupt" "0,1"
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group.long 0x204++0x03
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line.long 0x00 "INTSTAT,Read bits from this register to discover the cause of a recent interrupt"
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bitfld.long 0x00 0. "WDTINT,Watchdog Timer Interrupt" "0,1"
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group.long 0x208++0x03
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line.long 0x00 "INTCLR,Write a 1 to a bit in this register to clear the interrupt status associated with that bit"
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bitfld.long 0x00 0. "WDTINT,Watchdog Timer Interrupt" "0,1"
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group.long 0x20C++0x03
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line.long 0x00 "INTSET,Write a 1 to a bit in this register to instantly generate an interrupt from this module"
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bitfld.long 0x00 0. "WDTINT,Watchdog Timer Interrupt" "0,1"
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tree.end
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autoindent.off
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endif
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newline
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