14659 lines
890 KiB
Plaintext
14659 lines
890 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: APM32E1 On-Chip Peripherals
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; @Props: Released
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; @Author: NEJ
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; @Changelog: 2023-12-18 NEJ
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; @Manufacturer: Geehy - Geehy Semiconductor
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; @Doc: Generated (TRACE32, build: 165489.), based on:
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; APM32E103xx.svd (Ver. 1.0)
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; @Core: Cortex-M3
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; @Chip: APM32E103CC, APM32E103CE, APM32E103RC, APM32E103RE
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; APM32E103VC, APM32E103VE, APM32E103ZC, APM32E103ZE
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perapm32e1.per 17263 2023-12-22 15:06:56Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M3)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 11.
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group 0x10--0x1b
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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;group 0x14++0x03
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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;group 0x18++0x03
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value"
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rgroup 0x1c++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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textline " "
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rgroup 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor"
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bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd04--0xd17
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set"
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bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending"
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hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field"
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;group 0xd08++0x03
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line.long 0x04 "VTOR,Vector Table Offset Register"
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bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM"
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hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field"
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;group 0xd0c++0x03
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset"
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;group 0xd10++0x03
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line.long 0x0c "SCR,System Control Register"
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bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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;group 0xd14++0x03
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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group 0xd18--0xd23
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line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x04 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x08 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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group 0xd24++0x3
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line.long 0x00 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
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textline " "
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bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group 0xd28--0xd3b
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line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
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bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error"
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bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error"
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textline " "
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bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error"
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bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error"
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;group 0xd29++0x00
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid"
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bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error"
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bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
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textline " "
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error"
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bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error"
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bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error"
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;group 0xd2a++0x01
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line.word 0x02 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error"
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bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error"
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bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error"
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textline " "
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bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
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bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error"
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;group 0xd2c++0x03
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line.long 0x04 "HFSR,Hard Fault Status Register"
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bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
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bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error"
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bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error"
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;group 0xd30++0x03
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line.long 0x08 "DFSR,Debug Fault Status Register"
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bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted"
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bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
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textline " "
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bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested"
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;group 0xd34++0x03
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line.long 0xc "MMFAR,Memory Manage Fault Address Register"
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;group 0xd38++0x03
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line.long 0x10 "BFAR,Bus Fault Address Register"
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wgroup 0xf00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Feature Registers"
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width 10.
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
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bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
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line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
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bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
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bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
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textline " "
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bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
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bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
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bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
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tree.end
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tree "CoreSight Identification Registers"
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width 6.
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "PID0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "PID1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "PID2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
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hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
|
|
group 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group 0x00--0x27
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field"
|
|
;group 0x08++0x03
|
|
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID0"
|
|
line.long 0x14 "PID1,Peripheral ID1"
|
|
line.long 0x18 "PID2,Peripheral ID2"
|
|
line.long 0x1c "PID3,Peripheral ID3"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group 0x00--0x1B
|
|
line.long 0x00 "DWT_CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
|
|
bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID1"
|
|
line.long 0x14 "PID1,Peripheral ID2"
|
|
line.long 0x18 "PID2,Peripheral ID3"
|
|
line.long 0x1c "PID3,Peripheral ID4"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x0
|
|
tree "ADC1"
|
|
base ad:0x40012400
|
|
group.long 0x0++0x3B
|
|
line.long 0x0 "STS,status register"
|
|
bitfld.long 0x0 4. "REGCSFLG,Regular channel start flag" "0,1"
|
|
bitfld.long 0x0 3. "INJCSFLG,Injected channel start" "0,1"
|
|
bitfld.long 0x0 2. "INJEOCFLG,Injected channel end of" "0,1"
|
|
bitfld.long 0x0 1. "EOCFLG,Regular channel end of" "0,1"
|
|
bitfld.long 0x0 0. "AWDFLG,Analog watchdog flag" "0,1"
|
|
line.long 0x4 "CTRL1,control register 1"
|
|
bitfld.long 0x4 23. "REGAWDEN,Analog watchdog enable on regular" "0,1"
|
|
bitfld.long 0x4 22. "INJAWDEN,Analog watchdog enable on injected" "0,1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DUALMCFG,Dual mode selection"
|
|
bitfld.long 0x4 13.--15. "DISCNUMCFG,Discontinuous mode channel" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "INJDISCEN,Discontinuous mode on injected" "0,1"
|
|
bitfld.long 0x4 11. "REGDISCEN,Discontinuous mode on regular" "0,1"
|
|
bitfld.long 0x4 10. "INJGACEN,Automatic injected group" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "AWDSGLEN,Enable the watchdog on a single channel" "0,1"
|
|
bitfld.long 0x4 8. "SCANEN,Scan mode" "0,1"
|
|
bitfld.long 0x4 7. "INJEOCIEN,Interrupt enable for injected" "0,1"
|
|
bitfld.long 0x4 6. "AWDIEN,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 5. "EOCIEN,Interrupt enable for EOC" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "AWDCHSEL,Analog watchdog channel select"
|
|
line.long 0x8 "CTRL2,control register 2"
|
|
bitfld.long 0x8 23. "TSVREFEN,Temperature sensor and VREFINT" "0,1"
|
|
bitfld.long 0x8 22. "REGSWSC,Start conversion of regular" "0,1"
|
|
bitfld.long 0x8 21. "INJSWSC,Start conversion of injected" "0,1"
|
|
bitfld.long 0x8 20. "REGEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 17.--19. "REGEXTTRGSEL,External event select for regular" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "INJEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 12.--14. "INJGEXTTRGSEL,External event select for injected" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 11. "DALIGNCFG,Data alignment" "0,1"
|
|
bitfld.long 0x8 8. "DMAEN,Direct memory access mode" "0,1"
|
|
bitfld.long 0x8 3. "CALRST,Reset calibration" "0,1"
|
|
bitfld.long 0x8 2. "CAL,A/D calibration" "0,1"
|
|
bitfld.long 0x8 1. "CONTCEN,Continuous conversion" "0,1"
|
|
bitfld.long 0x8 0. "ADCEN,A/D converter ON / OFF" "0,1"
|
|
line.long 0xC "SMPTIM1,sample time register 1"
|
|
bitfld.long 0xC 21.--23. "SMPCYCCFG17,Channel 17 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18.--20. "SMPCYCCFG16,Channel 16 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 15.--17. "SMPCYCCFG15,Channel 15 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 12.--14. "SMPCYCCFG14,Channel 14 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 9.--11. "SMPCYCCFG13,Channel 13 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 6.--8. "SMPCYCCFG12,Channel 12 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3.--5. "SMPCYCCFG11,Channel 11 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 0.--2. "SMPCYCCFG10,Channel 10 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "SMPTIM2,sample time register 2"
|
|
bitfld.long 0x10 27.--29. "SMPCYCCFG9,Channel 9 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. "SMPCYCCFG8,Channel 8 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 21.--23. "SMPCYCCFG7,Channel 7 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 18.--20. "SMPCYCCFG6,Channel 6 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 15.--17. "SMPCYCCFG5,Channel 5 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 12.--14. "SMPCYCCFG4,Channel 4 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9.--11. "SMPCYCCFG3,Channel 3 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 6.--8. "SMPCYCCFG2,Channel 2 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 3.--5. "SMPCYCCFG1,Channel 1 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "SMPCYCCFG0,Channel 0 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "INJDOF1,injected channel data offset register 1"
|
|
hexmask.long.word 0x14 0.--11. 1. "INJDOF1,Data offset for injected channel 1"
|
|
line.long 0x18 "INJDOF2,injected channel data offset register 2"
|
|
hexmask.long.word 0x18 0.--11. 1. "INJDOF2,Data offset for injected channel 2"
|
|
line.long 0x1C "INJDOF3,injected channel data offset register 3"
|
|
hexmask.long.word 0x1C 0.--11. 1. "INJDOF3,Data offset for injected channel 3"
|
|
line.long 0x20 "INJDOF4,injected channel data offset register 4"
|
|
hexmask.long.word 0x20 0.--11. 1. "INJDOF4,Data offset for injected channel 4"
|
|
line.long 0x24 "AWDHT,watchdog higher threshold"
|
|
hexmask.long.word 0x24 0.--11. 1. "AWDHT,Analog watchdog higher"
|
|
line.long 0x28 "AWDLT,watchdog lower threshold"
|
|
hexmask.long.word 0x28 0.--11. 1. "AWDLT,Analog watchdog lower"
|
|
line.long 0x2C "REGSEQ1,regular sequence register 1"
|
|
hexmask.long.byte 0x2C 20.--23. 1. "REGSEQLEN,Regular channel sequence"
|
|
hexmask.long.byte 0x2C 15.--19. 1. "REGSEQC16,16th conversion in regular"
|
|
hexmask.long.byte 0x2C 10.--14. 1. "REGSEQC15,15th conversion in regular"
|
|
hexmask.long.byte 0x2C 5.--9. 1. "REGSEQC14,14th conversion in regular"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "REGSEQC13,13th conversion in regular"
|
|
line.long 0x30 "REGSEQ2,regular sequence register 2"
|
|
hexmask.long.byte 0x30 25.--29. 1. "REGSEQC12,12th conversion in regular"
|
|
hexmask.long.byte 0x30 20.--24. 1. "REGSEQC11,11th conversion in regular"
|
|
hexmask.long.byte 0x30 15.--19. 1. "REGSEQC10,10th conversion in regular"
|
|
hexmask.long.byte 0x30 10.--14. 1. "REGSEQC9,9th conversion in regular"
|
|
hexmask.long.byte 0x30 5.--9. 1. "REGSEQC8,8th conversion in regular"
|
|
hexmask.long.byte 0x30 0.--4. 1. "REGSEQC7,7th conversion in regular"
|
|
line.long 0x34 "REGSEQ3,regular sequence register 3"
|
|
hexmask.long.byte 0x34 25.--29. 1. "REGSEQC6,6th conversion in regular"
|
|
hexmask.long.byte 0x34 20.--24. 1. "REGSEQC5,5th conversion in regular"
|
|
hexmask.long.byte 0x34 15.--19. 1. "REGSEQC4,4th conversion in regular"
|
|
hexmask.long.byte 0x34 10.--14. 1. "REGSEQC3,3rd conversion in regular"
|
|
hexmask.long.byte 0x34 5.--9. 1. "REGSEQC2,2nd conversion in regular"
|
|
hexmask.long.byte 0x34 0.--4. 1. "REGSEQC1,1st conversion in regular"
|
|
line.long 0x38 "INJSEQ,injected sequence register"
|
|
bitfld.long 0x38 20.--21. "INJSEQLEN,Injected sequence length" "0,1,2,3"
|
|
hexmask.long.byte 0x38 15.--19. 1. "INJSEQC4,4th conversion in injected"
|
|
hexmask.long.byte 0x38 10.--14. 1. "INJSEQC3,3rd conversion in injected"
|
|
hexmask.long.byte 0x38 5.--9. 1. "INJSEQC2,2nd conversion in injected"
|
|
hexmask.long.byte 0x38 0.--4. 1. "INJSEQC1,1st conversion in injected"
|
|
rgroup.long 0x3C++0x13
|
|
line.long 0x0 "INJDATA1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x4 "INJDATA2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x8 "INJDATA3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0xC "INJDATA4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x10 "REGDATA,regular data register"
|
|
hexmask.long.word 0x10 16.--31. 1. "ADC2DATA,ADC2 data"
|
|
hexmask.long.word 0x10 0.--15. 1. "REGDATA,Regular data"
|
|
tree.end
|
|
tree "ADC2"
|
|
base ad:0x40012800
|
|
group.long 0x0++0x3B
|
|
line.long 0x0 "STS,status register"
|
|
bitfld.long 0x0 4. "REGCSFLG,Regular channel start flag" "0,1"
|
|
bitfld.long 0x0 3. "INJCSFLG,Injected channel start" "0,1"
|
|
bitfld.long 0x0 2. "INJEOCFLG,Injected channel end of" "0,1"
|
|
bitfld.long 0x0 1. "EOCFLG,Regular channel end of" "0,1"
|
|
bitfld.long 0x0 0. "AWDFLG,Analog watchdog flag" "0,1"
|
|
line.long 0x4 "CTRL1,control register 1"
|
|
bitfld.long 0x4 23. "REGAWDEN,Analog watchdog enable on regular" "0,1"
|
|
bitfld.long 0x4 22. "INJAWDEN,Analog watchdog enable on injected" "0,1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DUALMCFG,Dual mode selection"
|
|
bitfld.long 0x4 13.--15. "DISCNUMCFG,Discontinuous mode channel" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "INJDISCEN,Discontinuous mode on injected" "0,1"
|
|
bitfld.long 0x4 11. "REGDISCEN,Discontinuous mode on regular" "0,1"
|
|
bitfld.long 0x4 10. "INJGACEN,Automatic injected group" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "AWDSGLEN,Enable the watchdog on a single channel" "0,1"
|
|
bitfld.long 0x4 8. "SCANEN,Scan mode" "0,1"
|
|
bitfld.long 0x4 7. "INJEOCIEN,Interrupt enable for injected" "0,1"
|
|
bitfld.long 0x4 6. "AWDIEN,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 5. "EOCIEN,Interrupt enable for EOC" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "AWDCHSEL,Analog watchdog channel select"
|
|
line.long 0x8 "CTRL2,control register 2"
|
|
bitfld.long 0x8 23. "TSVREFEN,Temperature sensor and VREFINT" "0,1"
|
|
bitfld.long 0x8 22. "REGSWSC,Start conversion of regular" "0,1"
|
|
bitfld.long 0x8 21. "INJSWSC,Start conversion of injected" "0,1"
|
|
bitfld.long 0x8 20. "REGEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 17.--19. "REGEXTTRGSEL,External event select for regular" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "INJEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 12.--14. "INJGEXTTRGSEL,External event select for injected" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 11. "DALIGNCFG,Data alignment" "0,1"
|
|
bitfld.long 0x8 8. "DMAEN,Direct memory access mode" "0,1"
|
|
bitfld.long 0x8 3. "CALRST,Reset calibration" "0,1"
|
|
bitfld.long 0x8 2. "CAL,A/D calibration" "0,1"
|
|
bitfld.long 0x8 1. "CONTCEN,Continuous conversion" "0,1"
|
|
bitfld.long 0x8 0. "ADCEN,A/D converter ON / OFF" "0,1"
|
|
line.long 0xC "SMPTIM1,sample time register 1"
|
|
bitfld.long 0xC 21.--23. "SMPCYCCFG17,Channel 17 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18.--20. "SMPCYCCFG16,Channel 16 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 15.--17. "SMPCYCCFG15,Channel 15 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 12.--14. "SMPCYCCFG14,Channel 14 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 9.--11. "SMPCYCCFG13,Channel 13 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 6.--8. "SMPCYCCFG12,Channel 12 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3.--5. "SMPCYCCFG11,Channel 11 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 0.--2. "SMPCYCCFG10,Channel 10 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "SMPTIM2,sample time register 2"
|
|
bitfld.long 0x10 27.--29. "SMPCYCCFG9,Channel 9 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. "SMPCYCCFG8,Channel 8 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 21.--23. "SMPCYCCFG7,Channel 7 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 18.--20. "SMPCYCCFG6,Channel 6 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 15.--17. "SMPCYCCFG5,Channel 5 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 12.--14. "SMPCYCCFG4,Channel 4 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9.--11. "SMPCYCCFG3,Channel 3 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 6.--8. "SMPCYCCFG2,Channel 2 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 3.--5. "SMPCYCCFG1,Channel 1 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "SMPCYCCFG0,Channel 0 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "INJDOF1,injected channel data offset register 1"
|
|
hexmask.long.word 0x14 0.--11. 1. "INJDOF1,Data offset for injected channel 1"
|
|
line.long 0x18 "INJDOF2,injected channel data offset register 2"
|
|
hexmask.long.word 0x18 0.--11. 1. "INJDOF2,Data offset for injected channel 2"
|
|
line.long 0x1C "INJDOF3,injected channel data offset register 3"
|
|
hexmask.long.word 0x1C 0.--11. 1. "INJDOF3,Data offset for injected channel 3"
|
|
line.long 0x20 "INJDOF4,injected channel data offset register 4"
|
|
hexmask.long.word 0x20 0.--11. 1. "INJDOF4,Data offset for injected channel 4"
|
|
line.long 0x24 "AWDHT,watchdog higher threshold"
|
|
hexmask.long.word 0x24 0.--11. 1. "AWDHT,Analog watchdog higher"
|
|
line.long 0x28 "AWDLT,watchdog lower threshold"
|
|
hexmask.long.word 0x28 0.--11. 1. "AWDLT,Analog watchdog lower"
|
|
line.long 0x2C "REGSEQ1,regular sequence register 1"
|
|
hexmask.long.byte 0x2C 20.--23. 1. "REGSEQLEN,Regular channel sequence"
|
|
hexmask.long.byte 0x2C 15.--19. 1. "REGSEQC16,16th conversion in regular"
|
|
hexmask.long.byte 0x2C 10.--14. 1. "REGSEQC15,15th conversion in regular"
|
|
hexmask.long.byte 0x2C 5.--9. 1. "REGSEQC14,14th conversion in regular"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "REGSEQC13,13th conversion in regular"
|
|
line.long 0x30 "REGSEQ2,regular sequence register 2"
|
|
hexmask.long.byte 0x30 25.--29. 1. "REGSEQC12,12th conversion in regular"
|
|
hexmask.long.byte 0x30 20.--24. 1. "REGSEQC11,11th conversion in regular"
|
|
hexmask.long.byte 0x30 15.--19. 1. "REGSEQC10,10th conversion in regular"
|
|
hexmask.long.byte 0x30 10.--14. 1. "REGSEQC9,9th conversion in regular"
|
|
hexmask.long.byte 0x30 5.--9. 1. "REGSEQC8,8th conversion in regular"
|
|
hexmask.long.byte 0x30 0.--4. 1. "REGSEQC7,7th conversion in regular"
|
|
line.long 0x34 "REGSEQ3,regular sequence register 3"
|
|
hexmask.long.byte 0x34 25.--29. 1. "REGSEQC6,6th conversion in regular"
|
|
hexmask.long.byte 0x34 20.--24. 1. "REGSEQC5,5th conversion in regular"
|
|
hexmask.long.byte 0x34 15.--19. 1. "REGSEQC4,4th conversion in regular"
|
|
hexmask.long.byte 0x34 10.--14. 1. "REGSEQC3,3rd conversion in regular"
|
|
hexmask.long.byte 0x34 5.--9. 1. "REGSEQC2,2nd conversion in regular"
|
|
hexmask.long.byte 0x34 0.--4. 1. "REGSEQC1,1st conversion in regular"
|
|
line.long 0x38 "INJSEQ,injected sequence register"
|
|
bitfld.long 0x38 20.--21. "INJSEQC5,Injected sequence length" "0,1,2,3"
|
|
hexmask.long.byte 0x38 15.--19. 1. "INJSEQC4,4th conversion in injected"
|
|
hexmask.long.byte 0x38 10.--14. 1. "INJSEQC3,3rd conversion in injected"
|
|
hexmask.long.byte 0x38 5.--9. 1. "INJSEQC2,2nd conversion in injected"
|
|
hexmask.long.byte 0x38 0.--4. 1. "INJSEQC1,1st conversion in injected"
|
|
rgroup.long 0x3C++0x13
|
|
line.long 0x0 "INJDATA1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x4 "INJDATA2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x8 "INJDATA3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0xC "INJDATA4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x10 "REGDATA,regular data register"
|
|
hexmask.long.word 0x10 16.--31. 1. "ADC2DATA,ADC2 data"
|
|
hexmask.long.word 0x10 0.--15. 1. "REGDATA,Regular data"
|
|
tree.end
|
|
tree "ADC3"
|
|
base ad:0x40013C00
|
|
group.long 0x0++0x3B
|
|
line.long 0x0 "STS,status register"
|
|
bitfld.long 0x0 4. "REGCSFLG,Regular channel start flag" "0,1"
|
|
bitfld.long 0x0 3. "INJCSFLG,Injected channel start" "0,1"
|
|
bitfld.long 0x0 2. "INJEOCFLG,Injected channel end of" "0,1"
|
|
bitfld.long 0x0 1. "EOCFLG,Regular channel end of" "0,1"
|
|
bitfld.long 0x0 0. "AWDFLG,Analog watchdog flag" "0,1"
|
|
line.long 0x4 "CTRL1,control register 1"
|
|
bitfld.long 0x4 23. "REGAWDEN,Analog watchdog enable on regular" "0,1"
|
|
bitfld.long 0x4 22. "INJAWDEN,Analog watchdog enable on injected" "0,1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DUALMCFG,Dual mode selection"
|
|
bitfld.long 0x4 13.--15. "DISCNUMCFG,Discontinuous mode channel" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "INJDISCEN,Discontinuous mode on injected" "0,1"
|
|
bitfld.long 0x4 11. "REGDISCEN,Discontinuous mode on regular" "0,1"
|
|
bitfld.long 0x4 10. "INJGACEN,Automatic injected group" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "AWDSGLEN,Enable the watchdog on a single channel" "0,1"
|
|
bitfld.long 0x4 8. "SCANEN,Scan mode" "0,1"
|
|
bitfld.long 0x4 7. "INJEOCIEN,Interrupt enable for injected" "0,1"
|
|
bitfld.long 0x4 6. "AWDIEN,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 5. "EOCIEN,Interrupt enable for EOC" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "AWDCHSEL,Analog watchdog channel select"
|
|
line.long 0x8 "CTRL2,control register 2"
|
|
bitfld.long 0x8 23. "TSVREFEN,Temperature sensor and VREFINT" "0,1"
|
|
bitfld.long 0x8 22. "REGSWSC,Start conversion of regular" "0,1"
|
|
bitfld.long 0x8 21. "INJSWSC,Start conversion of injected" "0,1"
|
|
bitfld.long 0x8 20. "REGEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 17.--19. "REGEXTTRGSEL,External event select for regular" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "INJEXTTRGEN,External trigger conversion mode for" "0,1"
|
|
bitfld.long 0x8 12.--14. "INJGEXTTRGSEL,External event select for injected" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 11. "DALIGNCFG,Data alignment" "0,1"
|
|
bitfld.long 0x8 8. "DMAEN,Direct memory access mode" "0,1"
|
|
bitfld.long 0x8 3. "CALRST,Reset calibration" "0,1"
|
|
bitfld.long 0x8 2. "CAL,A/D calibration" "0,1"
|
|
bitfld.long 0x8 1. "CONTCEN,Continuous conversion" "0,1"
|
|
bitfld.long 0x8 0. "ADCEN,A/D converter ON / OFF" "0,1"
|
|
line.long 0xC "SMPTIM1,sample time register 1"
|
|
bitfld.long 0xC 21.--23. "SMPCYCCFG17,Channel 17 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18.--20. "SMPCYCCFG16,Channel 16 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 15.--17. "SMPCYCCFG15,Channel 15 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 12.--14. "SMPCYCCFG14,Channel 14 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 9.--11. "SMPCYCCFG13,Channel 13 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 6.--8. "SMPCYCCFG12,Channel 12 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3.--5. "SMPCYCCFG11,Channel 11 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 0.--2. "SMPCYCCFG10,Channel 10 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "SMPTIM2,sample time register 2"
|
|
bitfld.long 0x10 27.--29. "SMPCYCCFG9,Channel 9 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. "SMPCYCCFG8,Channel 8 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 21.--23. "SMPCYCCFG7,Channel 7 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 18.--20. "SMPCYCCFG6,Channel 6 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 15.--17. "SMPCYCCFG5,Channel 5 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 12.--14. "SMPCYCCFG4,Channel 4 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9.--11. "SMPCYCCFG3,Channel 3 sample time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 6.--8. "SMPCYCCFG2,Channel 2 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 3.--5. "SMPCYCCFG1,Channel 1 sample time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "SMPCYCCFG0,Channel 0 sample time" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "INJDOF1,injected channel data offset register 1"
|
|
hexmask.long.word 0x14 0.--11. 1. "INJDOF1,Data offset for injected channel 1"
|
|
line.long 0x18 "INJDOF2,injected channel data offset register 2"
|
|
hexmask.long.word 0x18 0.--11. 1. "INJDOF2,Data offset for injected channel 2"
|
|
line.long 0x1C "INJDOF3,injected channel data offset register 3"
|
|
hexmask.long.word 0x1C 0.--11. 1. "INJDOF3,Data offset for injected channel 3"
|
|
line.long 0x20 "INJDOF4,injected channel data offset register 4"
|
|
hexmask.long.word 0x20 0.--11. 1. "INJDOF4,Data offset for injected channel 4"
|
|
line.long 0x24 "AWDHT,watchdog higher threshold"
|
|
hexmask.long.word 0x24 0.--11. 1. "AWDHT,Analog watchdog higher"
|
|
line.long 0x28 "AWDLT,watchdog lower threshold"
|
|
hexmask.long.word 0x28 0.--11. 1. "AWDLT,Analog watchdog lower"
|
|
line.long 0x2C "REGSEQ1,regular sequence register 1"
|
|
hexmask.long.byte 0x2C 20.--23. 1. "REGSEQLEN,Regular channel sequence"
|
|
hexmask.long.byte 0x2C 15.--19. 1. "REGSEQC16,16th conversion in regular"
|
|
hexmask.long.byte 0x2C 10.--14. 1. "REGSEQC15,15th conversion in regular"
|
|
hexmask.long.byte 0x2C 5.--9. 1. "REGSEQC14,14th conversion in regular"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "REGSEQC13,13th conversion in regular"
|
|
line.long 0x30 "REGSEQ2,regular sequence register 2"
|
|
hexmask.long.byte 0x30 25.--29. 1. "REGSEQC12,12th conversion in regular"
|
|
hexmask.long.byte 0x30 20.--24. 1. "REGSEQC11,11th conversion in regular"
|
|
hexmask.long.byte 0x30 15.--19. 1. "REGSEQC10,10th conversion in regular"
|
|
hexmask.long.byte 0x30 10.--14. 1. "REGSEQC9,9th conversion in regular"
|
|
hexmask.long.byte 0x30 5.--9. 1. "REGSEQC8,8th conversion in regular"
|
|
hexmask.long.byte 0x30 0.--4. 1. "REGSEQC7,7th conversion in regular"
|
|
line.long 0x34 "REGSEQ3,regular sequence register 3"
|
|
hexmask.long.byte 0x34 25.--29. 1. "REGSEQC6,6th conversion in regular"
|
|
hexmask.long.byte 0x34 20.--24. 1. "REGSEQC5,5th conversion in regular"
|
|
hexmask.long.byte 0x34 15.--19. 1. "REGSEQC4,4th conversion in regular"
|
|
hexmask.long.byte 0x34 10.--14. 1. "REGSEQC3,3rd conversion in regular"
|
|
hexmask.long.byte 0x34 5.--9. 1. "REGSEQC2,2nd conversion in regular"
|
|
hexmask.long.byte 0x34 0.--4. 1. "REGSEQC1,1st conversion in regular"
|
|
line.long 0x38 "INJSEQ,injected sequence register"
|
|
bitfld.long 0x38 20.--21. "INJSEQC5,Injected sequence length" "0,1,2,3"
|
|
hexmask.long.byte 0x38 15.--19. 1. "INJSEQC4,4th conversion in injected"
|
|
hexmask.long.byte 0x38 10.--14. 1. "INJSEQC3,3rd conversion in injected"
|
|
hexmask.long.byte 0x38 5.--9. 1. "INJSEQC2,2nd conversion in injected"
|
|
hexmask.long.byte 0x38 0.--4. 1. "INJSEQC1,1st conversion in injected"
|
|
rgroup.long 0x3C++0x13
|
|
line.long 0x0 "INJDATA1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x4 "INJDATA2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x8 "INJDATA3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0xC "INJDATA4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "INJDATA,Injected data"
|
|
line.long 0x10 "REGDATA,regular data register"
|
|
hexmask.long.word 0x10 16.--31. 1. "ADC2DATA,ADC2 data"
|
|
hexmask.long.word 0x10 0.--15. 1. "REGDATA,Regular data"
|
|
tree.end
|
|
tree.end
|
|
tree "AFIO (Alternate Function Input and Output)"
|
|
base ad:0x40010000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "EVCTRL,Event control register (AFIO_EVCTRL)"
|
|
bitfld.long 0x0 7. "EVOEN,EVOEN" "0,1"
|
|
bitfld.long 0x0 4.--6. "PORTSEL,PORTSEL" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PINSEL,PINSEL"
|
|
line.long 0x4 "REMAP1,Alternate function IO remap and Serial wire JTAG configuration register (AFIO_REMAP1)"
|
|
bitfld.long 0x4 24.--26. "SWJCFG,Serial wire JTAG configuration" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 22. "CAN2RMP,CAN2 alternate function remapping" "0,1"
|
|
bitfld.long 0x4 20. "ADC2_ETRGREGC_RMP,ADC 2 external trigger regular conversion remapping" "0,1"
|
|
bitfld.long 0x4 19. "ADC2_ETRGINJC_RMP,ADC 2 external trigger injected conversion remapping" "0,1"
|
|
bitfld.long 0x4 18. "ADC1_ETRGREGC_RMP,ADC 1 external trigger regular conversion remapping" "0,1"
|
|
bitfld.long 0x4 17. "ADC1_ETRGINJC_RMP,ADC 1 External trigger injected conversion remapping" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TMR5CH4IRMP,TMR5 channel4 internal remap" "0,1"
|
|
bitfld.long 0x4 15. "PD01RMP,Port D0/Port D1 mapping on OSC_IN/OSC_OUT" "0,1"
|
|
bitfld.long 0x4 13.--14. "CAN1RMP,CAN1 alternate function remapping" "0,1,2,3"
|
|
bitfld.long 0x4 12. "TMR4RMP,TMR4 remapping" "0,1"
|
|
bitfld.long 0x4 10.--11. "TMR3RMP,TMR3 remapping" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "TMR2RMP,TMR2 remapping" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "TMR1RMP,TMR1 remapping" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "USART3RMP,USART3 remapping" "0,1,2,3"
|
|
bitfld.long 0x4 3. "USART2RMP,USART2 remapping" "0,1"
|
|
bitfld.long 0x4 2. "USART1RMP,USART1 remapping" "0,1"
|
|
bitfld.long 0x4 1. "I2C1RMP,I2C1 remapping" "0,1"
|
|
bitfld.long 0x4 0. "SPI1RMP,SPI1 remapping" "0,1"
|
|
line.long 0x8 "EINTSEL1,External interrupt configuration register1 (AFIO_EINTSEL1)"
|
|
hexmask.long.byte 0x8 12.--15. 1. "EINT3,EINT 3 configuration"
|
|
hexmask.long.byte 0x8 8.--11. 1. "EINT2,EINT 2 configuration"
|
|
hexmask.long.byte 0x8 4.--7. 1. "EINT1,EINT 1 configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "EINT0,EINT 0 configuration"
|
|
line.long 0xC "EINTSEL2,External interrupt configuration register2 (AFIO_EINTSEL2)"
|
|
hexmask.long.byte 0xC 12.--15. 1. "EINT7,EINT 7 configuration"
|
|
hexmask.long.byte 0xC 8.--11. 1. "EINT6,EINT 6 configuration"
|
|
hexmask.long.byte 0xC 4.--7. 1. "EINT5,EINT 5 configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "EINT4,EINT 4 configuration"
|
|
line.long 0x10 "EINTSEL3,External interrupt configuration register3 (AFIO_EINTSEL3)"
|
|
hexmask.long.byte 0x10 12.--15. 1. "EINT11,EINT 11 configuration"
|
|
hexmask.long.byte 0x10 8.--11. 1. "EINT10,EINT 10 configuration"
|
|
hexmask.long.byte 0x10 4.--7. 1. "EINT9,EINT 9 configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "EINT8,EINT 8 configuration"
|
|
line.long 0x14 "EINTSEL4,External interrupt configuration register4 (AFIO_EINTSEL4)"
|
|
hexmask.long.byte 0x14 12.--15. 1. "EINT15,EINT 15 configuration"
|
|
hexmask.long.byte 0x14 8.--11. 1. "EINT14,EINT 14 configuration"
|
|
hexmask.long.byte 0x14 4.--7. 1. "EINT13,EINT 13 configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "EINT12,EINT 12 configuration"
|
|
line.long 0x18 "REMAP2,Alternate function IO remap register2 (AFIO_REMAP2)"
|
|
bitfld.long 0x18 10. "EMMCNADV,NAVD connect/disconnect" "0,1"
|
|
tree.end
|
|
tree "BAKPR (Backup Register)"
|
|
base ad:0x40006C00
|
|
group.long 0x4++0x27
|
|
line.long 0x0 "DATA1,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x4 "DATA2,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x4 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x8 "DATA3,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x8 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0xC "DATA4,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0xC 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x10 "DATA5,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x10 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x14 "DATA6,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x14 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x18 "DATA7,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x18 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x1C "DATA8,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x20 "DATA9,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x20 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x24 "DATA10,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x24 0.--15. 1. "DATA,Bakr data"
|
|
group.long 0x40++0x7F
|
|
line.long 0x0 "DATA11,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x4 "DATA12,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x4 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x8 "DATA13,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x8 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0xC "DATA14,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0xC 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x10 "DATA15,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x10 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x14 "DATA16,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x14 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x18 "DATA17,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x18 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x1C "DATA18,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x1C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x20 "DATA19,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x20 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x24 "DATA20,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x24 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x28 "DATA21,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x28 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x2C "DATA22,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x2C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x30 "DATA23,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x30 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x34 "DATA24,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x34 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x38 "DATA25,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x38 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x3C "DATA26,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x3C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x40 "DATA27,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x40 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x44 "DATA28,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x44 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x48 "DATA29,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x48 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x4C "DATA30,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x4C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x50 "DATA31,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x50 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x54 "DATA32,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x54 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x58 "DATA33,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x58 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x5C "DATA34,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x5C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x60 "DATA35,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x60 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x64 "DATA36,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x64 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x68 "DATA37,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x68 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x6C "DATA38,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x6C 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x70 "DATA39,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x70 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x74 "DATA40,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x74 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x78 "DATA41,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x78 0.--15. 1. "DATA,Bakr data"
|
|
line.long 0x7C "DATA42,Bakr data register (BAKPR_DATA)"
|
|
hexmask.long.word 0x7C 0.--15. 1. "DATA,Bakr data"
|
|
group.long 0x2C++0xB
|
|
line.long 0x0 "CLKCAL,RTC clock calibration register"
|
|
bitfld.long 0x0 9. "ASPOSEL,Alarm or second output" "0,1"
|
|
bitfld.long 0x0 8. "ASPOEN,Alarm or second output" "0,1"
|
|
bitfld.long 0x0 7. "CALCOEN,Calibration Clock Output" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CALVALUE,Calibration value"
|
|
line.long 0x4 "CTRL,Bakr control register"
|
|
bitfld.long 0x4 1. "TPALCFG,Tamper pin active level" "0,1"
|
|
bitfld.long 0x4 0. "TPFCFG,Tamper pin enable" "0,1"
|
|
line.long 0x8 "CSTS,Bakr control/status register"
|
|
rbitfld.long 0x8 9. "TIFLG,Tamper Interrupt Flag" "0,1"
|
|
rbitfld.long 0x8 8. "TEFLG,Tamper Event Flag" "0,1"
|
|
bitfld.long 0x8 2. "TPIEN,Tamper Pin interrupt" "0,1"
|
|
bitfld.long 0x8 1. "TICLR,Clear Tamper Interrupt" "0,1"
|
|
bitfld.long 0x8 0. "TECLR,Clear Tamper event" "0,1"
|
|
tree.end
|
|
tree "CAN (Controller Area Network)"
|
|
base ad:0x0
|
|
tree "CAN1"
|
|
base ad:0x40006400
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MCTRL,CAN Master control register"
|
|
bitfld.long 0x0 16. "DBGFRZE,DBGFRZE" "0,1"
|
|
bitfld.long 0x0 15. "SWRST,SWRST" "0,1"
|
|
bitfld.long 0x0 6. "ALBOFFM,ALBOFFM" "0,1"
|
|
bitfld.long 0x0 5. "AWUPCFG,AWUPCFG" "0,1"
|
|
bitfld.long 0x0 4. "ARTXMD,ARTXMD" "0,1"
|
|
bitfld.long 0x0 3. "RXFLOCK,RXFLOCK" "0,1"
|
|
bitfld.long 0x0 2. "TXFPCFG,TXFPCFG" "0,1"
|
|
bitfld.long 0x0 1. "SLEEPREQ,SLEEPREQ" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INITREQ,INITREQ" "0,1"
|
|
line.long 0x4 "MSTS,CAN Master States register"
|
|
rbitfld.long 0x4 11. "RXSIGL,RXSIGL" "0,1"
|
|
rbitfld.long 0x4 10. "LSAMVALUE,LSAMVALUE" "0,1"
|
|
rbitfld.long 0x4 9. "RXMFLG,RXMFLG" "0,1"
|
|
rbitfld.long 0x4 8. "TXMFLG,TXMFLG" "0,1"
|
|
bitfld.long 0x4 4. "SLEEPIFLG,SLEEPIFLG" "0,1"
|
|
bitfld.long 0x4 3. "WUPIFLG,WUPIFLG" "0,1"
|
|
bitfld.long 0x4 2. "ERRIFLG,ERRIFLG" "0,1"
|
|
rbitfld.long 0x4 1. "SLEEPFLG,SLEEPFLG" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "INITFLG,INITFLG" "0,1"
|
|
line.long 0x8 "TXSTS,CAN Send States register"
|
|
rbitfld.long 0x8 31. "LOWESTP2,LOWESTP2" "0,1"
|
|
rbitfld.long 0x8 30. "LOWESTP1,LOWESTP1" "0,1"
|
|
rbitfld.long 0x8 29. "LOWESTP0,LOWESTP0" "0,1"
|
|
rbitfld.long 0x8 28. "TXMEFLG2,TXMEFLG2" "0,1"
|
|
rbitfld.long 0x8 27. "TXMEFLG1,TXMEFLG1" "0,1"
|
|
rbitfld.long 0x8 26. "TXMEFLG0,TXMEFLG0" "0,1"
|
|
rbitfld.long 0x8 24.--25. "EMNUM,EMNUM" "0,1,2,3"
|
|
bitfld.long 0x8 23. "ABREQFLG2,ABREQFLG2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "TXERRFLG2,TXERRFLG2" "0,1"
|
|
bitfld.long 0x8 18. "ARBLSTFLG2,ARBLSTFLG2" "0,1"
|
|
bitfld.long 0x8 17. "TXSUSFLG2,TXSUSFLG2" "0,1"
|
|
bitfld.long 0x8 16. "REQCFLG2,REQCFLG2" "0,1"
|
|
bitfld.long 0x8 15. "ABREQFLG1,ABREQFLG1" "0,1"
|
|
bitfld.long 0x8 11. "TXERRFLG1,TXERRFLG1" "0,1"
|
|
bitfld.long 0x8 10. "ARBLSTFLG1,ARBLSTFLG1" "0,1"
|
|
bitfld.long 0x8 9. "TXSUSFLG1,TXSUSFLG1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "REQCFLG1,REQCFLG1" "0,1"
|
|
bitfld.long 0x8 7. "ABREQFLG0,ABREQFLG0" "0,1"
|
|
bitfld.long 0x8 3. "TXERRFLG0,TXERRFLG0" "0,1"
|
|
bitfld.long 0x8 2. "ARBLSTFLG0,ARBLSTFLG0" "0,1"
|
|
bitfld.long 0x8 1. "TXSUSFLG0,TXSUSFLG0" "0,1"
|
|
bitfld.long 0x8 0. "REQCFLG0,REQCFLG0" "0,1"
|
|
line.long 0xC "RXF0,CAN Receive FIFO 0 register"
|
|
bitfld.long 0xC 5. "RFOM0,RFOM0" "0,1"
|
|
bitfld.long 0xC 4. "FOVRFLG0,FOVRFLG0" "0,1"
|
|
bitfld.long 0xC 3. "FFULLFLG0,FFULLFLG0" "0,1"
|
|
rbitfld.long 0xC 0.--1. "FMNUM0,FMNUM0" "0,1,2,3"
|
|
line.long 0x10 "RXF1,CAN Receive FIFO 1 register"
|
|
bitfld.long 0x10 5. "RFOM1,RFOM1" "0,1"
|
|
bitfld.long 0x10 4. "FOVRFLG1,FOVRFLG1" "0,1"
|
|
bitfld.long 0x10 3. "FFULLFLG1,FFULLFLG1" "0,1"
|
|
rbitfld.long 0x10 0.--1. "FMNUM1,FMNUM1" "0,1,2,3"
|
|
line.long 0x14 "INTEN,CAN Interrupts register"
|
|
bitfld.long 0x14 17. "SLEEPIEN,SLEEPIEN" "0,1"
|
|
bitfld.long 0x14 16. "WUPIEN,WUPIEN" "0,1"
|
|
bitfld.long 0x14 15. "ERRIEN,ERRIEN" "0,1"
|
|
bitfld.long 0x14 11. "LECIEN,LECIEN" "0,1"
|
|
bitfld.long 0x14 10. "BOFFIEN,BOFFIEN" "0,1"
|
|
bitfld.long 0x14 9. "ERRPIEN,ERRPIEN" "0,1"
|
|
bitfld.long 0x14 8. "ERRWIEN,ERRWIEN" "0,1"
|
|
bitfld.long 0x14 6. "FOVRIEN1,FOVRIEN1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "FFULLIEN1,FFULLIEN1" "0,1"
|
|
bitfld.long 0x14 4. "FMIEN1,FMIEN1" "0,1"
|
|
bitfld.long 0x14 3. "FOVRIEN0,FOVRIEN0" "0,1"
|
|
bitfld.long 0x14 2. "FFULLIEN0,FFULLIEN0" "0,1"
|
|
bitfld.long 0x14 1. "FMIEN0,FMIEN0" "0,1"
|
|
bitfld.long 0x14 0. "TXMEIEN,TXMEIEN" "0,1"
|
|
line.long 0x18 "ERRSTS,CAN Error States register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "RXERRCNT,RXERRCNT"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TXERRCNT,TXERRCNT"
|
|
bitfld.long 0x18 4.--6. "LERRC,LERRC" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x18 2. "BOFLG,BOFLG" "0,1"
|
|
rbitfld.long 0x18 1. "ERRPFLG,ERRPFLG" "0,1"
|
|
rbitfld.long 0x18 0. "ERRWFLG,ERRWFLG" "0,1"
|
|
line.long 0x1C "BITTIM,CAN Bit Time register"
|
|
bitfld.long 0x1C 31. "SILMEN,SILMEN" "0,1"
|
|
bitfld.long 0x1C 30. "LBKMEN,LBKMEN" "0,1"
|
|
bitfld.long 0x1C 24.--25. "RSYNJW,RSYNJW" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--22. "TIMSEG2,TIMSEG2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "TIMSEG1,TIMSEG1"
|
|
hexmask.long.word 0x1C 0.--9. 1. "BRPSC,BRPSC"
|
|
group.long 0x180++0x2F
|
|
line.long 0x0 "TXMID0,CAN Each mailbox contains the sending mailbox identifier register 0"
|
|
hexmask.long.word 0x0 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x0 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x0 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x0 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x4 "TXDLEN0,CAN Send the mailbox data length and timestamp register 0"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x8 "TXMDL0,CAN Send mailbox low byte data register 0"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0xC "TXMDH0,CAN Send mailbox High byte data register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x10 "TXMID1,CAN Each mailbox contains the sending mailbox identifier register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x10 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x10 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x10 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x14 "TXDLEN1,CAN Send the mailbox data length and timestamp register 1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x18 "TXMDL1,CAN Send mailbox low byte data register 1"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x1C "TXMDH1,CAN Send mailbox High byte data register1"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x20 "TXMID2,CAN Each mailbox contains the sending mailbox identifier register 2"
|
|
hexmask.long.word 0x20 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x20 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x20 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x20 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x20 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x24 "TXDLEN2,CAN Send the mailbox data length and timestamp register 2"
|
|
hexmask.long.byte 0x24 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x28 "TXMDL2,CAN Send mailbox low byte data register 2"
|
|
hexmask.long.byte 0x28 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x2C "TXMDH2,CAN Send mailbox High byte data register2"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
rgroup.long 0x1B0++0x1F
|
|
line.long 0x0 "RXMID0,CAN Each mailbox contains the receive mailbox identifier register 0"
|
|
hexmask.long.word 0x0 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x0 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x0 1. "RFTXREQ,RFTXREQ" "0,1"
|
|
line.long 0x4 "RXDLEN0,CAN receive the mailbox data length and timestamp register 0"
|
|
hexmask.long.byte 0x4 8.--15. 1. "FMIDX,FMIDX"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x8 "RXMDL0,CAN receive mailbox low byte data register 0"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0xC "RXMDH0,CAN receive mailbox High byte data register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x10 "RXMID1,CAN Each mailbox contains the receive mailbox identifier register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x10 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x10 1. "RFTXREQ,RFTXREQ" "0,1"
|
|
line.long 0x14 "RXDLEN1,CAN receive the mailbox data length and timestamp register 1"
|
|
hexmask.long.byte 0x14 8.--15. 1. "FMIDX,FMIDX"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x18 "RXMDL1,CAN receive mailbox low byte data register 1"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x1C "RXMDH1,CAN receive mailbox High byte data register 1"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "FCTRL,CAN Filter the master control register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "CAN2SB,CAN2 Start Bank"
|
|
bitfld.long 0x0 0. "FINITEN,FINITEN" "0,1"
|
|
line.long 0x4 "FMCFG,CAN Filter register"
|
|
bitfld.long 0x4 27. "FMCFG27,Filter mode" "0,1"
|
|
bitfld.long 0x4 26. "FMCFG26,Filter mode" "0,1"
|
|
bitfld.long 0x4 25. "FMCFG25,Filter mode" "0,1"
|
|
bitfld.long 0x4 24. "FMCFG24,Filter mode" "0,1"
|
|
bitfld.long 0x4 23. "FMCFG23,Filter mode" "0,1"
|
|
bitfld.long 0x4 22. "FMCFG22,Filter mode" "0,1"
|
|
bitfld.long 0x4 21. "FMCFG21,Filter mode" "0,1"
|
|
bitfld.long 0x4 20. "FMCFG20,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "FMCFG19,Filter mode" "0,1"
|
|
bitfld.long 0x4 18. "FMCFG18,Filter mode" "0,1"
|
|
bitfld.long 0x4 17. "FMCFG17,Filter mode" "0,1"
|
|
bitfld.long 0x4 16. "FMCFG16,Filter mode" "0,1"
|
|
bitfld.long 0x4 15. "FMCFG15,Filter mode" "0,1"
|
|
bitfld.long 0x4 14. "FMCFG14,Filter mode" "0,1"
|
|
bitfld.long 0x4 13. "FMCFG13,Filter mode" "0,1"
|
|
bitfld.long 0x4 12. "FMCFG12,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "FMCFG11,Filter mode" "0,1"
|
|
bitfld.long 0x4 10. "FMCFG10,Filter mode" "0,1"
|
|
bitfld.long 0x4 9. "FMCFG9,Filter mode" "0,1"
|
|
bitfld.long 0x4 8. "FMCFG8,Filter mode" "0,1"
|
|
bitfld.long 0x4 7. "FMCFG7,Filter mode" "0,1"
|
|
bitfld.long 0x4 6. "FMCFG6,Filter mode" "0,1"
|
|
bitfld.long 0x4 5. "FMCFG5,Filter mode" "0,1"
|
|
bitfld.long 0x4 4. "FMCFG4,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "FMCFG3,Filter mode" "0,1"
|
|
bitfld.long 0x4 2. "FMCFG2,Filter mode" "0,1"
|
|
bitfld.long 0x4 1. "FMCFG1,Filter mode" "0,1"
|
|
bitfld.long 0x4 0. "FMCFG0,Filter mode" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "FSCFG,CAN Filter bit width register"
|
|
bitfld.long 0x0 27. "FSCFG27,Filter bit" "0,1"
|
|
bitfld.long 0x0 26. "FSCFG26,Filter bit" "0,1"
|
|
bitfld.long 0x0 25. "FSCFG25,Filter bit" "0,1"
|
|
bitfld.long 0x0 24. "FSCFG24,Filter bit" "0,1"
|
|
bitfld.long 0x0 23. "FSCFG23,Filter bit" "0,1"
|
|
bitfld.long 0x0 22. "FSCFG22,Filter bit" "0,1"
|
|
bitfld.long 0x0 21. "FSCFG21,Filter bit" "0,1"
|
|
bitfld.long 0x0 20. "FSCFG20,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FSCFG19,Filter bit" "0,1"
|
|
bitfld.long 0x0 18. "FSCFG18,Filter bit" "0,1"
|
|
bitfld.long 0x0 17. "FSCFG17,Filter bit" "0,1"
|
|
bitfld.long 0x0 16. "FSCFG16,Filter bit" "0,1"
|
|
bitfld.long 0x0 15. "FSCFG15,Filter bit" "0,1"
|
|
bitfld.long 0x0 14. "FSCFG14,Filter bit" "0,1"
|
|
bitfld.long 0x0 13. "FSCFG13,Filter bit" "0,1"
|
|
bitfld.long 0x0 12. "FSCFG12,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FSCFG11,Filter bit" "0,1"
|
|
bitfld.long 0x0 10. "FSCFG10,Filter bit" "0,1"
|
|
bitfld.long 0x0 9. "FSCFG9,Filter bit" "0,1"
|
|
bitfld.long 0x0 8. "FSCFG8,Filter bit" "0,1"
|
|
bitfld.long 0x0 7. "FSCFG7,Filter bit" "0,1"
|
|
bitfld.long 0x0 6. "FSCFG6,Filter bit" "0,1"
|
|
bitfld.long 0x0 5. "FSCFG5,Filter bit" "0,1"
|
|
bitfld.long 0x0 4. "FSCFG4,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FSCFG3,Filter bit" "0,1"
|
|
bitfld.long 0x0 2. "FSCFG2,Filter bit" "0,1"
|
|
bitfld.long 0x0 1. "FSCFG1,Filter bit" "0,1"
|
|
bitfld.long 0x0 0. "FSCFG0,Filter bit" "0,1"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "FFASS,CAN Filter FIFO associated registers"
|
|
bitfld.long 0x0 27. "FFASS27,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 26. "FFASS26,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 25. "FFASS25,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 24. "FFASS24,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 23. "FFASS23,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 22. "FFASS22,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 21. "FFASS21,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 20. "FFASS20,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FFASS19,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 18. "FFASS18,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 17. "FFASS17,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 16. "FFASS16,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 15. "FFASS15,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 14. "FFASS14,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 13. "FFASS13,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 12. "FFASS12,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FFASS11,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 10. "FFASS10,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 9. "FFASS9,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 8. "FFASS8,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 7. "FFASS7,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 6. "FFASS6,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 5. "FFASS5,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 4. "FFASS4,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FFASS3,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 2. "FFASS2,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 1. "FFASS1,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 0. "FFASS0,Filter FIFO assignment for filter" "0,1"
|
|
group.long 0x21C++0x3
|
|
line.long 0x0 "FACT,CAN Filter activation register"
|
|
bitfld.long 0x0 27. "FACT27,Filter active" "0,1"
|
|
bitfld.long 0x0 26. "FACT26,Filter active" "0,1"
|
|
bitfld.long 0x0 25. "FACT25,Filter active" "0,1"
|
|
bitfld.long 0x0 24. "FACT24,Filter active" "0,1"
|
|
bitfld.long 0x0 23. "FACT23,Filter active" "0,1"
|
|
bitfld.long 0x0 22. "FACT22,Filter active" "0,1"
|
|
bitfld.long 0x0 21. "FACT21,Filter active" "0,1"
|
|
bitfld.long 0x0 20. "FACT20,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FACT19,Filter active" "0,1"
|
|
bitfld.long 0x0 18. "FACT18,Filter active" "0,1"
|
|
bitfld.long 0x0 17. "FACT17,Filter active" "0,1"
|
|
bitfld.long 0x0 16. "FACT16,Filter active" "0,1"
|
|
bitfld.long 0x0 15. "FACT15,Filter active" "0,1"
|
|
bitfld.long 0x0 14. "FACT14,Filter active" "0,1"
|
|
bitfld.long 0x0 13. "FACT13,Filter active" "0,1"
|
|
bitfld.long 0x0 12. "FACT12,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FACT11,Filter active" "0,1"
|
|
bitfld.long 0x0 10. "FACT10,Filter active" "0,1"
|
|
bitfld.long 0x0 9. "FACT9,Filter active" "0,1"
|
|
bitfld.long 0x0 8. "FACT8,Filter active" "0,1"
|
|
bitfld.long 0x0 7. "FACT7,Filter active" "0,1"
|
|
bitfld.long 0x0 6. "FACT6,Filter active" "0,1"
|
|
bitfld.long 0x0 5. "FACT5,Filter active" "0,1"
|
|
bitfld.long 0x0 4. "FACT4,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FACT3,Filter active" "0,1"
|
|
bitfld.long 0x0 2. "FACT2,Filter active" "0,1"
|
|
bitfld.long 0x0 1. "FACT1,Filter active" "0,1"
|
|
bitfld.long 0x0 0. "FACT0,Filter active" "0,1"
|
|
group.long 0x240++0x6F
|
|
line.long 0x0 "F0BANK1,Filter bank 0 register 1"
|
|
bitfld.long 0x0 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x0 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x0 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x0 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x0 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x0 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x0 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x0 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x0 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x0 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x0 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x0 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x0 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x0 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x0 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x0 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x0 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x0 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x0 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x0 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x0 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x0 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x0 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x0 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x0 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x0 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x0 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x0 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x0 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x4 "F0BANK2,Filter bank 0 register 2"
|
|
bitfld.long 0x4 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x4 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x4 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x4 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x4 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x4 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x4 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x4 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x4 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x4 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x4 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x4 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x4 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x4 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x4 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x4 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x4 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x4 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x4 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x4 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x4 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x4 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x4 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x4 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x4 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x4 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x4 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x4 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x4 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x8 "F1BANK1,Filter bank 1 register 1"
|
|
bitfld.long 0x8 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x8 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x8 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x8 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x8 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x8 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x8 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x8 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x8 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x8 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x8 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x8 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x8 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x8 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x8 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x8 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x8 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x8 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x8 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x8 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x8 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x8 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x8 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x8 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x8 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x8 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x8 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x8 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x8 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0xC "F1BANK2,Filter bank 1 register 2"
|
|
bitfld.long 0xC 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0xC 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0xC 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0xC 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0xC 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0xC 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0xC 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0xC 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0xC 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0xC 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0xC 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0xC 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0xC 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0xC 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0xC 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0xC 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0xC 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0xC 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0xC 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0xC 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0xC 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0xC 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0xC 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0xC 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0xC 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0xC 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0xC 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0xC 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0xC 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x10 "F2BANK1,Filter bank 2 register 1"
|
|
bitfld.long 0x10 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x10 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x10 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x10 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x10 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x10 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x10 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x10 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x10 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x10 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x10 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x10 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x10 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x10 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x10 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x10 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x10 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x10 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x10 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x10 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x10 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x10 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x10 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x10 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x10 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x10 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x10 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x10 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x10 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x14 "F2BANK2,Filter bank 2 register 2"
|
|
bitfld.long 0x14 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x14 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x14 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x14 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x14 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x14 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x14 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x14 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x14 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x14 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x14 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x14 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x14 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x14 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x14 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x14 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x14 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x14 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x14 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x14 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x14 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x14 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x14 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x14 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x14 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x14 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x14 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x14 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x14 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x18 "F3BANK1,Filter bank 3 register 1"
|
|
bitfld.long 0x18 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x18 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x18 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x18 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x18 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x18 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x18 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x18 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x18 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x18 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x18 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x18 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x18 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x18 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x18 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x18 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x18 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x18 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x18 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x18 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x18 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x18 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x18 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x18 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x18 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x18 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x18 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x18 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x18 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x1C "F3BANK2,Filter bank 3 register 2"
|
|
bitfld.long 0x1C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x1C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x1C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x1C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x1C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x1C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x1C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x1C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x1C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x1C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x1C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x1C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x1C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x1C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x1C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x1C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x1C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x1C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x1C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x1C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x1C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x1C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x1C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x1C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x1C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x1C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x1C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x1C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x1C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x20 "F4BANK1,Filter bank 4 register 1"
|
|
bitfld.long 0x20 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x20 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x20 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x20 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x20 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x20 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x20 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x20 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x20 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x20 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x20 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x20 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x20 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x20 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x20 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x20 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x20 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x20 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x20 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x20 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x20 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x20 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x20 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x20 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x20 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x20 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x20 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x20 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x20 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x24 "F4BANK2,Filter bank 4 register 2"
|
|
bitfld.long 0x24 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x24 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x24 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x24 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x24 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x24 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x24 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x24 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x24 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x24 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x24 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x24 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x24 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x24 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x24 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x24 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x24 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x24 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x24 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x24 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x24 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x24 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x24 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x24 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x24 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x24 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x24 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x24 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x24 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x28 "F5BANK1,Filter bank 5 register 1"
|
|
bitfld.long 0x28 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x28 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x28 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x28 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x28 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x28 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x28 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x28 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x28 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x28 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x28 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x28 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x28 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x28 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x28 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x28 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x28 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x28 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x28 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x28 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x28 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x28 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x28 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x28 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x28 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x28 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x28 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x28 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x28 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x2C "F5BANK2,Filter bank 5 register 2"
|
|
bitfld.long 0x2C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x2C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x2C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x2C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x2C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x2C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x2C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x2C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x2C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x2C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x2C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x2C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x2C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x2C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x2C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x2C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x2C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x2C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x2C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x2C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x2C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x2C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x2C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x2C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x2C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x2C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x2C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x2C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x2C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x30 "F6BANK1,Filter bank 6 register 1"
|
|
bitfld.long 0x30 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x30 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x30 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x30 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x30 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x30 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x30 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x30 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x30 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x30 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x30 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x30 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x30 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x30 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x30 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x30 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x30 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x30 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x30 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x30 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x30 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x30 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x30 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x30 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x30 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x30 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x30 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x30 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x30 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x34 "F6BANK2,Filter bank 6 register 2"
|
|
bitfld.long 0x34 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x34 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x34 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x34 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x34 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x34 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x34 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x34 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x34 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x34 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x34 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x34 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x34 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x34 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x34 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x34 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x34 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x34 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x34 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x34 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x34 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x34 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x34 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x34 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x34 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x34 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x34 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x34 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x34 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x38 "F7BANK1,Filter bank 7 register 1"
|
|
bitfld.long 0x38 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x38 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x38 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x38 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x38 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x38 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x38 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x38 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x38 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x38 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x38 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x38 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x38 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x38 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x38 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x38 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x38 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x38 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x38 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x38 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x38 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x38 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x38 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x38 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x38 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x38 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x38 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x38 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x38 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x3C "F7BANK2,Filter bank 7 register 2"
|
|
bitfld.long 0x3C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x3C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x3C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x3C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x3C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x3C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x3C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x3C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x3C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x3C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x3C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x3C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x3C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x3C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x3C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x3C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x3C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x3C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x3C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x3C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x3C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x3C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x3C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x3C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x3C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x3C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x3C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x3C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x3C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x40 "F8BANK1,Filter bank 8 register 1"
|
|
bitfld.long 0x40 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x40 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x40 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x40 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x40 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x40 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x40 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x40 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x40 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x40 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x40 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x40 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x40 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x40 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x40 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x40 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x40 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x40 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x40 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x40 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x40 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x40 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x40 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x40 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x40 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x40 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x40 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x40 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x40 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x44 "F8BANK2,Filter bank 8 register 2"
|
|
bitfld.long 0x44 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x44 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x44 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x44 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x44 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x44 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x44 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x44 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x44 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x44 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x44 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x44 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x44 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x44 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x44 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x44 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x44 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x44 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x44 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x44 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x44 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x44 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x44 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x44 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x44 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x44 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x44 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x44 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x44 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x48 "F9BANK1,Filter bank 9 register 1"
|
|
bitfld.long 0x48 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x48 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x48 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x48 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x48 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x48 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x48 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x48 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x48 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x48 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x48 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x48 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x48 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x48 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x48 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x48 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x48 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x48 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x48 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x48 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x48 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x48 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x48 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x48 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x48 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x48 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x48 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x48 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x48 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x4C "F9BANK2,Filter bank 9 register 2"
|
|
bitfld.long 0x4C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x4C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x4C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x4C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x4C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x4C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x4C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x4C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x4C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x4C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x4C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x4C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x4C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x4C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x4C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x4C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x4C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x4C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x4C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x4C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x4C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x4C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x4C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x4C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x4C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x4C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x4C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x4C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x4C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x50 "F10BANK1,Filter bank 10 register 1"
|
|
bitfld.long 0x50 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x50 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x50 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x50 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x50 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x50 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x50 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x50 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x50 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x50 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x50 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x50 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x50 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x50 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x50 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x50 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x50 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x50 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x50 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x50 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x50 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x50 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x50 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x50 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x50 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x50 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x50 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x50 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x50 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x54 "F10BANK2,Filter bank 10 register 2"
|
|
bitfld.long 0x54 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x54 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x54 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x54 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x54 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x54 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x54 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x54 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x54 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x54 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x54 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x54 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x54 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x54 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x54 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x54 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x54 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x54 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x54 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x54 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x54 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x54 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x54 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x54 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x54 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x54 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x54 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x54 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x54 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x58 "F11BANK1,Filter bank 11 register 1"
|
|
bitfld.long 0x58 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x58 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x58 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x58 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x58 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x58 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x58 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x58 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x58 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x58 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x58 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x58 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x58 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x58 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x58 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x58 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x58 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x58 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x58 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x58 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x58 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x58 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x58 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x58 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x58 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x58 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x58 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x58 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x58 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x5C "F11BANK2,Filter bank 11 register 2"
|
|
bitfld.long 0x5C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x5C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x5C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x5C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x5C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x5C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x5C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x5C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x5C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x5C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x5C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x5C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x5C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x5C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x5C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x5C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x5C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x5C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x5C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x5C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x5C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x5C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x5C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x5C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x5C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x5C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x5C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x5C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x5C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x60 "F12BANK1,Filter bank 12 register 1"
|
|
bitfld.long 0x60 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x60 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x60 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x60 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x60 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x60 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x60 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x60 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x60 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x60 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x60 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x60 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x60 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x60 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x60 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x60 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x60 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x60 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x60 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x60 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x60 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x60 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x60 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x60 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x60 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x60 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x60 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x60 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x60 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x64 "F12BANK2,Filter bank 12 register 2"
|
|
bitfld.long 0x64 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x64 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x64 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x64 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x64 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x64 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x64 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x64 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x64 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x64 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x64 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x64 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x64 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x64 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x64 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x64 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x64 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x64 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x64 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x64 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x64 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x64 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x64 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x64 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x64 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x64 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x64 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x64 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x64 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x68 "F13BANK1,Filter bank 13 register 1"
|
|
bitfld.long 0x68 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x68 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x68 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x68 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x68 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x68 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x68 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x68 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x68 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x68 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x68 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x68 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x68 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x68 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x68 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x68 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x68 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x68 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x68 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x68 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x68 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x68 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x68 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x68 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x68 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x68 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x68 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x68 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x68 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x6C "F13BANK2,Filter bank 13 register 2"
|
|
bitfld.long 0x6C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x6C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x6C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x6C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x6C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x6C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x6C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x6C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x6C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x6C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x6C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x6C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x6C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x6C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x6C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x6C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x6C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x6C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x6C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x6C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x6C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x6C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x6C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x6C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x6C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x6C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x6C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x6C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x6C 0. "FBIT0,Filter bits" "0,1"
|
|
tree.end
|
|
tree "CAN2"
|
|
base ad:0x40006800
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MCTRL,CAN Master control register"
|
|
bitfld.long 0x0 16. "DBGFRZE,DBGFRZE" "0,1"
|
|
bitfld.long 0x0 15. "SWRST,SWRST" "0,1"
|
|
bitfld.long 0x0 6. "ALBOFFM,ALBOFFM" "0,1"
|
|
bitfld.long 0x0 5. "AWUPCFG,AWUPCFG" "0,1"
|
|
bitfld.long 0x0 4. "ARTXMD,ARTXMD" "0,1"
|
|
bitfld.long 0x0 3. "RXFLOCK,RXFLOCK" "0,1"
|
|
bitfld.long 0x0 2. "TXFPCFG,TXFPCFG" "0,1"
|
|
bitfld.long 0x0 1. "SLEEPREQ,SLEEPREQ" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INITREQ,INITREQ" "0,1"
|
|
line.long 0x4 "MSTS,CAN Master States register"
|
|
rbitfld.long 0x4 11. "RXSIGL,RXSIGL" "0,1"
|
|
rbitfld.long 0x4 10. "LSAMVALUE,LSAMVALUE" "0,1"
|
|
rbitfld.long 0x4 9. "RXMFLG,RXMFLG" "0,1"
|
|
rbitfld.long 0x4 8. "TXMFLG,TXMFLG" "0,1"
|
|
bitfld.long 0x4 4. "SLEEPIFLG,SLEEPIFLG" "0,1"
|
|
bitfld.long 0x4 3. "WUPIFLG,WUPIFLG" "0,1"
|
|
bitfld.long 0x4 2. "ERRIFLG,ERRIFLG" "0,1"
|
|
rbitfld.long 0x4 1. "SLEEPFLG,SLEEPFLG" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "INITFLG,INITFLG" "0,1"
|
|
line.long 0x8 "TXSTS,CAN Send States register"
|
|
rbitfld.long 0x8 31. "LOWESTP2,LOWESTP2" "0,1"
|
|
rbitfld.long 0x8 30. "LOWESTP1,LOWESTP1" "0,1"
|
|
rbitfld.long 0x8 29. "LOWESTP0,LOWESTP0" "0,1"
|
|
rbitfld.long 0x8 28. "TXMEFLG2,TXMEFLG2" "0,1"
|
|
rbitfld.long 0x8 27. "TXMEFLG1,TXMEFLG1" "0,1"
|
|
rbitfld.long 0x8 26. "TXMEFLG0,TXMEFLG0" "0,1"
|
|
rbitfld.long 0x8 24.--25. "EMNUM,EMNUM" "0,1,2,3"
|
|
bitfld.long 0x8 23. "ABREQFLG2,ABREQFLG2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "TXERRFLG2,TXERRFLG2" "0,1"
|
|
bitfld.long 0x8 18. "ARBLSTFLG2,ARBLSTFLG2" "0,1"
|
|
bitfld.long 0x8 17. "TXSUSFLG2,TXSUSFLG2" "0,1"
|
|
bitfld.long 0x8 16. "REQCFLG2,REQCFLG2" "0,1"
|
|
bitfld.long 0x8 15. "ABREQFLG1,ABREQFLG1" "0,1"
|
|
bitfld.long 0x8 11. "TXERRFLG1,TXERRFLG1" "0,1"
|
|
bitfld.long 0x8 10. "ARBLSTFLG1,ARBLSTFLG1" "0,1"
|
|
bitfld.long 0x8 9. "TXSUSFLG1,TXSUSFLG1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "REQCFLG1,REQCFLG1" "0,1"
|
|
bitfld.long 0x8 7. "ABREQFLG0,ABREQFLG0" "0,1"
|
|
bitfld.long 0x8 3. "TXERRFLG0,TXERRFLG0" "0,1"
|
|
bitfld.long 0x8 2. "ARBLSTFLG0,ARBLSTFLG0" "0,1"
|
|
bitfld.long 0x8 1. "TXSUSFLG0,TXSUSFLG0" "0,1"
|
|
bitfld.long 0x8 0. "REQCFLG0,REQCFLG0" "0,1"
|
|
line.long 0xC "RXF0,CAN Receive FIFO 0 register"
|
|
bitfld.long 0xC 5. "RFOM0,RFOM0" "0,1"
|
|
bitfld.long 0xC 4. "FOVRFLG0,FOVRFLG0" "0,1"
|
|
bitfld.long 0xC 3. "FFULLFLG0,FFULLFLG0" "0,1"
|
|
rbitfld.long 0xC 0.--1. "FMNUM0,FMNUM0" "0,1,2,3"
|
|
line.long 0x10 "RXF1,CAN Receive FIFO 1 register"
|
|
bitfld.long 0x10 5. "RFOM1,RFOM1" "0,1"
|
|
bitfld.long 0x10 4. "FOVRFLG1,FOVRFLG1" "0,1"
|
|
bitfld.long 0x10 3. "FFULLFLG1,FFULLFLG1" "0,1"
|
|
rbitfld.long 0x10 0.--1. "FMNUM1,FMNUM1" "0,1,2,3"
|
|
line.long 0x14 "INTEN,CAN Interrupts register"
|
|
bitfld.long 0x14 17. "SLEEPIEN,SLEEPIEN" "0,1"
|
|
bitfld.long 0x14 16. "WUPIEN,WUPIEN" "0,1"
|
|
bitfld.long 0x14 15. "ERRIEN,ERRIEN" "0,1"
|
|
bitfld.long 0x14 11. "LECIEN,LECIEN" "0,1"
|
|
bitfld.long 0x14 10. "BOFFIEN,BOFFIEN" "0,1"
|
|
bitfld.long 0x14 9. "ERRPIEN,ERRPIEN" "0,1"
|
|
bitfld.long 0x14 8. "ERRWIEN,ERRWIEN" "0,1"
|
|
bitfld.long 0x14 6. "FOVRIEN1,FOVRIEN1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "FFULLIEN1,FFULLIEN1" "0,1"
|
|
bitfld.long 0x14 4. "FMIEN1,FMIEN1" "0,1"
|
|
bitfld.long 0x14 3. "FOVRIEN0,FOVRIEN0" "0,1"
|
|
bitfld.long 0x14 2. "FFULLIEN0,FFULLIEN0" "0,1"
|
|
bitfld.long 0x14 1. "FMIEN0,FMIEN0" "0,1"
|
|
bitfld.long 0x14 0. "TXMEIEN,TXMEIEN" "0,1"
|
|
line.long 0x18 "ERRSTS,CAN Error States register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "RXERRCNT,RXERRCNT"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TXERRCNT,TXERRCNT"
|
|
bitfld.long 0x18 4.--6. "LERRC,LERRC" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x18 2. "BOFLG,BOFLG" "0,1"
|
|
rbitfld.long 0x18 1. "ERRPFLG,ERRPFLG" "0,1"
|
|
rbitfld.long 0x18 0. "ERRWFLG,ERRWFLG" "0,1"
|
|
line.long 0x1C "BITTIM,CAN Bit Time register"
|
|
bitfld.long 0x1C 31. "SILMEN,SILMEN" "0,1"
|
|
bitfld.long 0x1C 30. "LBKMEN,LBKMEN" "0,1"
|
|
bitfld.long 0x1C 24.--25. "RSYNJW,RSYNJW" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--22. "TIMSEG2,TIMSEG2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "TIMSEG1,TIMSEG1"
|
|
hexmask.long.word 0x1C 0.--9. 1. "BRPSC,BRPSC"
|
|
group.long 0x180++0x2F
|
|
line.long 0x0 "TXMID0,CAN Each mailbox contains the sending mailbox identifier register 0"
|
|
hexmask.long.word 0x0 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x0 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x0 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x0 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x4 "TXDLEN0,CAN Send the mailbox data length and timestamp register 0"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x8 "TXMDL0,CAN Send mailbox low byte data register 0"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0xC "TXMDH0,CAN Send mailbox High byte data register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x10 "TXMID1,CAN Each mailbox contains the sending mailbox identifier register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x10 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x10 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x10 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x14 "TXDLEN1,CAN Send the mailbox data length and timestamp register 1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x18 "TXMDL1,CAN Send mailbox low byte data register 1"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x1C "TXMDH1,CAN Send mailbox High byte data register1"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x20 "TXMID2,CAN Each mailbox contains the sending mailbox identifier register 2"
|
|
hexmask.long.word 0x20 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x20 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x20 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x20 1. "TXRFREQ,TXRFREQ" "0,1"
|
|
bitfld.long 0x20 0. "TXMREQ,TXMREQ" "0,1"
|
|
line.long 0x24 "TXDLEN2,CAN Send the mailbox data length and timestamp register 2"
|
|
hexmask.long.byte 0x24 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x28 "TXMDL2,CAN Send mailbox low byte data register 2"
|
|
hexmask.long.byte 0x28 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x2C "TXMDH2,CAN Send mailbox High byte data register2"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
rgroup.long 0x1B0++0x1F
|
|
line.long 0x0 "RXMID0,CAN Each mailbox contains the receive mailbox identifier register 0"
|
|
hexmask.long.word 0x0 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x0 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x0 1. "RFTXREQ,RFTXREQ" "0,1"
|
|
line.long 0x4 "RXDLEN0,CAN receive the mailbox data length and timestamp register 0"
|
|
hexmask.long.byte 0x4 8.--15. 1. "FMIDX,FMIDX"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x8 "RXMDL0,CAN receive mailbox low byte data register 0"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0xC "RXMDH0,CAN receive mailbox High byte data register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
line.long 0x10 "RXMID1,CAN Each mailbox contains the receive mailbox identifier register 1"
|
|
hexmask.long.word 0x10 21.--31. 1. "STDID,STDID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,EXTID"
|
|
bitfld.long 0x10 2. "IDTYPESEL,IDTYPESEL" "0,1"
|
|
bitfld.long 0x10 1. "RFTXREQ,RFTXREQ" "0,1"
|
|
line.long 0x14 "RXDLEN1,CAN receive the mailbox data length and timestamp register 1"
|
|
hexmask.long.byte 0x14 8.--15. 1. "FMIDX,FMIDX"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLCODE,DLCODE"
|
|
line.long 0x18 "RXMDL1,CAN receive mailbox low byte data register 1"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,DATABYTE3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,DATABYTE2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,DATABYTE1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,DATABYTE0"
|
|
line.long 0x1C "RXMDH1,CAN receive mailbox High byte data register 1"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,DATABYTE7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,DATABYTE6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,DATABYTE5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,DATABYTE4"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "FCTRL,CAN Filter the master control register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "CAN2SB,CAN2 Start Bank"
|
|
bitfld.long 0x0 0. "FINITEN,FINITEN" "0,1"
|
|
line.long 0x4 "FMCFG,CAN Filter register"
|
|
bitfld.long 0x4 27. "FMCFG27,Filter mode" "0,1"
|
|
bitfld.long 0x4 26. "FMCFG26,Filter mode" "0,1"
|
|
bitfld.long 0x4 25. "FMCFG25,Filter mode" "0,1"
|
|
bitfld.long 0x4 24. "FMCFG24,Filter mode" "0,1"
|
|
bitfld.long 0x4 23. "FMCFG23,Filter mode" "0,1"
|
|
bitfld.long 0x4 22. "FMCFG22,Filter mode" "0,1"
|
|
bitfld.long 0x4 21. "FMCFG21,Filter mode" "0,1"
|
|
bitfld.long 0x4 20. "FMCFG20,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "FMCFG19,Filter mode" "0,1"
|
|
bitfld.long 0x4 18. "FMCFG18,Filter mode" "0,1"
|
|
bitfld.long 0x4 17. "FMCFG17,Filter mode" "0,1"
|
|
bitfld.long 0x4 16. "FMCFG16,Filter mode" "0,1"
|
|
bitfld.long 0x4 15. "FMCFG15,Filter mode" "0,1"
|
|
bitfld.long 0x4 14. "FMCFG14,Filter mode" "0,1"
|
|
bitfld.long 0x4 13. "FMCFG13,Filter mode" "0,1"
|
|
bitfld.long 0x4 12. "FMCFG12,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "FMCFG11,Filter mode" "0,1"
|
|
bitfld.long 0x4 10. "FMCFG10,Filter mode" "0,1"
|
|
bitfld.long 0x4 9. "FMCFG9,Filter mode" "0,1"
|
|
bitfld.long 0x4 8. "FMCFG8,Filter mode" "0,1"
|
|
bitfld.long 0x4 7. "FMCFG7,Filter mode" "0,1"
|
|
bitfld.long 0x4 6. "FMCFG6,Filter mode" "0,1"
|
|
bitfld.long 0x4 5. "FMCFG5,Filter mode" "0,1"
|
|
bitfld.long 0x4 4. "FMCFG4,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "FMCFG3,Filter mode" "0,1"
|
|
bitfld.long 0x4 2. "FMCFG2,Filter mode" "0,1"
|
|
bitfld.long 0x4 1. "FMCFG1,Filter mode" "0,1"
|
|
bitfld.long 0x4 0. "FMCFG0,Filter mode" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "FSCFG,CAN Filter bit width register"
|
|
bitfld.long 0x0 27. "FSCFG27,Filter bit" "0,1"
|
|
bitfld.long 0x0 26. "FSCFG26,Filter bit" "0,1"
|
|
bitfld.long 0x0 25. "FSCFG25,Filter bit" "0,1"
|
|
bitfld.long 0x0 24. "FSCFG24,Filter bit" "0,1"
|
|
bitfld.long 0x0 23. "FSCFG23,Filter bit" "0,1"
|
|
bitfld.long 0x0 22. "FSCFG22,Filter bit" "0,1"
|
|
bitfld.long 0x0 21. "FSCFG21,Filter bit" "0,1"
|
|
bitfld.long 0x0 20. "FSCFG20,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FSCFG19,Filter bit" "0,1"
|
|
bitfld.long 0x0 18. "FSCFG18,Filter bit" "0,1"
|
|
bitfld.long 0x0 17. "FSCFG17,Filter bit" "0,1"
|
|
bitfld.long 0x0 16. "FSCFG16,Filter bit" "0,1"
|
|
bitfld.long 0x0 15. "FSCFG15,Filter bit" "0,1"
|
|
bitfld.long 0x0 14. "FSCFG14,Filter bit" "0,1"
|
|
bitfld.long 0x0 13. "FSCFG13,Filter bit" "0,1"
|
|
bitfld.long 0x0 12. "FSCFG12,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FSCFG11,Filter bit" "0,1"
|
|
bitfld.long 0x0 10. "FSCFG10,Filter bit" "0,1"
|
|
bitfld.long 0x0 9. "FSCFG9,Filter bit" "0,1"
|
|
bitfld.long 0x0 8. "FSCFG8,Filter bit" "0,1"
|
|
bitfld.long 0x0 7. "FSCFG7,Filter bit" "0,1"
|
|
bitfld.long 0x0 6. "FSCFG6,Filter bit" "0,1"
|
|
bitfld.long 0x0 5. "FSCFG5,Filter bit" "0,1"
|
|
bitfld.long 0x0 4. "FSCFG4,Filter bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FSCFG3,Filter bit" "0,1"
|
|
bitfld.long 0x0 2. "FSCFG2,Filter bit" "0,1"
|
|
bitfld.long 0x0 1. "FSCFG1,Filter bit" "0,1"
|
|
bitfld.long 0x0 0. "FSCFG0,Filter bit" "0,1"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "FFASS,CAN Filter FIFO associated registers"
|
|
bitfld.long 0x0 27. "FFASS27,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 26. "FFASS26,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 25. "FFASS25,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 24. "FFASS24,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 23. "FFASS23,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 22. "FFASS22,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 21. "FFASS21,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 20. "FFASS20,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FFASS19,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 18. "FFASS18,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 17. "FFASS17,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 16. "FFASS16,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 15. "FFASS15,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 14. "FFASS14,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 13. "FFASS13,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 12. "FFASS12,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FFASS11,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 10. "FFASS10,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 9. "FFASS9,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 8. "FFASS8,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 7. "FFASS7,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 6. "FFASS6,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 5. "FFASS5,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 4. "FFASS4,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FFASS3,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 2. "FFASS2,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 1. "FFASS1,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 0. "FFASS0,Filter FIFO assignment for filter" "0,1"
|
|
group.long 0x21C++0x3
|
|
line.long 0x0 "FACT,CAN Filter activation register"
|
|
bitfld.long 0x0 27. "FACT27,Filter active" "0,1"
|
|
bitfld.long 0x0 26. "FACT26,Filter active" "0,1"
|
|
bitfld.long 0x0 25. "FACT25,Filter active" "0,1"
|
|
bitfld.long 0x0 24. "FACT24,Filter active" "0,1"
|
|
bitfld.long 0x0 23. "FACT23,Filter active" "0,1"
|
|
bitfld.long 0x0 22. "FACT22,Filter active" "0,1"
|
|
bitfld.long 0x0 21. "FACT21,Filter active" "0,1"
|
|
bitfld.long 0x0 20. "FACT20,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FACT19,Filter active" "0,1"
|
|
bitfld.long 0x0 18. "FACT18,Filter active" "0,1"
|
|
bitfld.long 0x0 17. "FACT17,Filter active" "0,1"
|
|
bitfld.long 0x0 16. "FACT16,Filter active" "0,1"
|
|
bitfld.long 0x0 15. "FACT15,Filter active" "0,1"
|
|
bitfld.long 0x0 14. "FACT14,Filter active" "0,1"
|
|
bitfld.long 0x0 13. "FACT13,Filter active" "0,1"
|
|
bitfld.long 0x0 12. "FACT12,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "FACT11,Filter active" "0,1"
|
|
bitfld.long 0x0 10. "FACT10,Filter active" "0,1"
|
|
bitfld.long 0x0 9. "FACT9,Filter active" "0,1"
|
|
bitfld.long 0x0 8. "FACT8,Filter active" "0,1"
|
|
bitfld.long 0x0 7. "FACT7,Filter active" "0,1"
|
|
bitfld.long 0x0 6. "FACT6,Filter active" "0,1"
|
|
bitfld.long 0x0 5. "FACT5,Filter active" "0,1"
|
|
bitfld.long 0x0 4. "FACT4,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FACT3,Filter active" "0,1"
|
|
bitfld.long 0x0 2. "FACT2,Filter active" "0,1"
|
|
bitfld.long 0x0 1. "FACT1,Filter active" "0,1"
|
|
bitfld.long 0x0 0. "FACT0,Filter active" "0,1"
|
|
group.long 0x240++0x6F
|
|
line.long 0x0 "F0BANK1,Filter bank 0 register 1"
|
|
bitfld.long 0x0 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x0 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x0 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x0 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x0 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x0 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x0 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x0 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x0 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x0 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x0 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x0 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x0 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x0 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x0 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x0 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x0 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x0 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x0 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x0 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x0 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x0 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x0 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x0 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x0 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x0 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x0 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x0 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x0 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x4 "F0BANK2,Filter bank 0 register 2"
|
|
bitfld.long 0x4 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x4 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x4 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x4 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x4 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x4 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x4 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x4 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x4 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x4 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x4 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x4 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x4 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x4 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x4 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x4 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x4 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x4 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x4 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x4 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x4 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x4 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x4 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x4 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x4 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x4 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x4 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x4 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x4 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x8 "F1BANK1,Filter bank 1 register 1"
|
|
bitfld.long 0x8 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x8 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x8 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x8 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x8 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x8 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x8 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x8 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x8 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x8 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x8 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x8 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x8 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x8 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x8 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x8 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x8 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x8 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x8 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x8 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x8 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x8 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x8 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x8 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x8 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x8 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x8 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x8 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x8 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0xC "F1BANK2,Filter bank 1 register 2"
|
|
bitfld.long 0xC 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0xC 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0xC 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0xC 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0xC 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0xC 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0xC 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0xC 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0xC 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0xC 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0xC 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0xC 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0xC 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0xC 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0xC 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0xC 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0xC 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0xC 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0xC 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0xC 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0xC 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0xC 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0xC 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0xC 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0xC 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0xC 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0xC 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0xC 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0xC 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x10 "F2BANK1,Filter bank 2 register 1"
|
|
bitfld.long 0x10 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x10 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x10 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x10 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x10 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x10 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x10 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x10 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x10 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x10 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x10 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x10 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x10 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x10 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x10 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x10 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x10 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x10 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x10 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x10 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x10 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x10 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x10 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x10 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x10 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x10 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x10 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x10 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x10 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x14 "F2BANK2,Filter bank 2 register 2"
|
|
bitfld.long 0x14 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x14 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x14 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x14 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x14 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x14 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x14 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x14 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x14 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x14 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x14 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x14 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x14 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x14 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x14 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x14 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x14 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x14 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x14 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x14 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x14 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x14 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x14 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x14 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x14 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x14 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x14 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x14 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x14 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x18 "F3BANK1,Filter bank 3 register 1"
|
|
bitfld.long 0x18 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x18 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x18 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x18 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x18 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x18 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x18 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x18 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x18 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x18 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x18 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x18 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x18 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x18 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x18 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x18 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x18 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x18 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x18 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x18 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x18 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x18 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x18 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x18 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x18 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x18 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x18 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x18 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x18 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x1C "F3BANK2,Filter bank 3 register 2"
|
|
bitfld.long 0x1C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x1C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x1C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x1C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x1C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x1C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x1C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x1C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x1C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x1C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x1C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x1C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x1C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x1C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x1C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x1C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x1C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x1C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x1C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x1C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x1C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x1C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x1C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x1C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x1C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x1C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x1C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x1C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x1C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x20 "F4BANK1,Filter bank 4 register 1"
|
|
bitfld.long 0x20 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x20 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x20 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x20 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x20 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x20 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x20 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x20 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x20 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x20 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x20 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x20 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x20 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x20 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x20 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x20 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x20 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x20 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x20 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x20 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x20 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x20 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x20 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x20 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x20 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x20 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x20 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x20 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x20 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x24 "F4BANK2,Filter bank 4 register 2"
|
|
bitfld.long 0x24 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x24 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x24 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x24 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x24 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x24 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x24 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x24 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x24 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x24 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x24 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x24 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x24 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x24 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x24 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x24 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x24 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x24 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x24 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x24 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x24 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x24 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x24 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x24 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x24 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x24 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x24 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x24 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x24 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x28 "F5BANK1,Filter bank 5 register 1"
|
|
bitfld.long 0x28 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x28 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x28 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x28 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x28 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x28 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x28 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x28 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x28 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x28 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x28 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x28 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x28 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x28 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x28 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x28 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x28 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x28 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x28 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x28 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x28 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x28 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x28 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x28 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x28 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x28 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x28 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x28 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x28 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x2C "F5BANK2,Filter bank 5 register 2"
|
|
bitfld.long 0x2C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x2C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x2C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x2C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x2C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x2C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x2C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x2C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x2C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x2C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x2C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x2C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x2C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x2C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x2C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x2C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x2C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x2C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x2C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x2C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x2C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x2C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x2C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x2C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x2C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x2C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x2C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x2C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x2C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x30 "F6BANK1,Filter bank 6 register 1"
|
|
bitfld.long 0x30 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x30 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x30 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x30 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x30 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x30 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x30 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x30 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x30 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x30 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x30 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x30 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x30 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x30 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x30 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x30 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x30 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x30 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x30 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x30 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x30 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x30 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x30 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x30 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x30 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x30 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x30 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x30 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x30 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x34 "F6BANK2,Filter bank 6 register 2"
|
|
bitfld.long 0x34 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x34 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x34 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x34 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x34 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x34 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x34 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x34 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x34 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x34 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x34 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x34 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x34 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x34 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x34 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x34 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x34 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x34 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x34 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x34 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x34 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x34 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x34 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x34 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x34 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x34 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x34 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x34 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x34 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x38 "F7BANK1,Filter bank 7 register 1"
|
|
bitfld.long 0x38 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x38 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x38 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x38 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x38 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x38 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x38 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x38 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x38 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x38 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x38 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x38 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x38 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x38 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x38 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x38 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x38 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x38 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x38 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x38 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x38 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x38 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x38 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x38 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x38 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x38 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x38 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x38 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x38 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x3C "F7BANK2,Filter bank 7 register 2"
|
|
bitfld.long 0x3C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x3C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x3C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x3C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x3C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x3C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x3C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x3C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x3C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x3C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x3C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x3C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x3C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x3C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x3C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x3C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x3C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x3C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x3C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x3C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x3C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x3C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x3C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x3C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x3C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x3C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x3C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x3C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x3C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x40 "F8BANK1,Filter bank 8 register 1"
|
|
bitfld.long 0x40 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x40 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x40 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x40 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x40 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x40 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x40 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x40 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x40 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x40 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x40 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x40 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x40 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x40 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x40 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x40 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x40 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x40 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x40 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x40 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x40 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x40 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x40 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x40 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x40 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x40 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x40 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x40 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x40 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x44 "F8BANK2,Filter bank 8 register 2"
|
|
bitfld.long 0x44 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x44 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x44 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x44 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x44 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x44 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x44 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x44 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x44 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x44 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x44 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x44 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x44 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x44 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x44 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x44 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x44 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x44 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x44 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x44 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x44 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x44 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x44 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x44 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x44 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x44 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x44 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x44 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x44 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x48 "F9BANK1,Filter bank 9 register 1"
|
|
bitfld.long 0x48 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x48 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x48 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x48 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x48 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x48 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x48 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x48 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x48 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x48 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x48 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x48 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x48 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x48 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x48 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x48 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x48 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x48 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x48 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x48 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x48 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x48 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x48 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x48 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x48 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x48 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x48 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x48 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x48 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x4C "F9BANK2,Filter bank 9 register 2"
|
|
bitfld.long 0x4C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x4C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x4C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x4C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x4C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x4C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x4C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x4C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x4C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x4C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x4C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x4C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x4C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x4C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x4C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x4C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x4C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x4C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x4C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x4C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x4C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x4C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x4C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x4C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x4C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x4C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x4C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x4C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x4C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x50 "F10BANK1,Filter bank 10 register 1"
|
|
bitfld.long 0x50 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x50 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x50 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x50 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x50 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x50 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x50 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x50 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x50 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x50 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x50 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x50 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x50 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x50 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x50 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x50 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x50 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x50 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x50 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x50 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x50 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x50 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x50 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x50 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x50 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x50 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x50 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x50 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x50 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x54 "F10BANK2,Filter bank 10 register 2"
|
|
bitfld.long 0x54 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x54 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x54 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x54 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x54 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x54 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x54 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x54 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x54 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x54 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x54 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x54 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x54 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x54 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x54 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x54 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x54 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x54 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x54 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x54 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x54 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x54 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x54 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x54 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x54 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x54 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x54 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x54 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x54 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x58 "F11BANK1,Filter bank 11 register 1"
|
|
bitfld.long 0x58 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x58 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x58 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x58 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x58 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x58 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x58 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x58 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x58 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x58 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x58 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x58 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x58 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x58 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x58 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x58 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x58 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x58 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x58 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x58 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x58 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x58 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x58 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x58 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x58 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x58 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x58 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x58 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x58 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x5C "F11BANK2,Filter bank 11 register 2"
|
|
bitfld.long 0x5C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x5C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x5C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x5C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x5C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x5C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x5C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x5C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x5C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x5C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x5C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x5C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x5C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x5C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x5C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x5C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x5C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x5C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x5C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x5C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x5C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x5C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x5C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x5C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x5C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x5C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x5C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x5C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x5C 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x60 "F12BANK1,Filter bank 12 register 1"
|
|
bitfld.long 0x60 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x60 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x60 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x60 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x60 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x60 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x60 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x60 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x60 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x60 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x60 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x60 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x60 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x60 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x60 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x60 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x60 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x60 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x60 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x60 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x60 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x60 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x60 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x60 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x60 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x60 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x60 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x60 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x60 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x64 "F12BANK2,Filter bank 12 register 2"
|
|
bitfld.long 0x64 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x64 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x64 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x64 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x64 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x64 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x64 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x64 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x64 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x64 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x64 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x64 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x64 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x64 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x64 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x64 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x64 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x64 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x64 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x64 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x64 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x64 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x64 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x64 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x64 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x64 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x64 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x64 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x64 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x68 "F13BANK1,Filter bank 13 register 1"
|
|
bitfld.long 0x68 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x68 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x68 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x68 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x68 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x68 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x68 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x68 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x68 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x68 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x68 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x68 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x68 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x68 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x68 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x68 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x68 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x68 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x68 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x68 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x68 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x68 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x68 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x68 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x68 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x68 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x68 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x68 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x68 0. "FBIT0,Filter bits" "0,1"
|
|
line.long 0x6C "F13BANK2,Filter bank 13 register 2"
|
|
bitfld.long 0x6C 31. "FBIT31,Filter bits" "0,1"
|
|
bitfld.long 0x6C 30. "FBIT30,Filter bits" "0,1"
|
|
bitfld.long 0x6C 29. "FBIT29,Filter bits" "0,1"
|
|
bitfld.long 0x6C 28. "FBIT28,Filter bits" "0,1"
|
|
bitfld.long 0x6C 27. "FBIT27,Filter bits" "0,1"
|
|
bitfld.long 0x6C 26. "FBIT26,Filter bits" "0,1"
|
|
bitfld.long 0x6C 25. "FBIT25,Filter bits" "0,1"
|
|
bitfld.long 0x6C 24. "FBIT24,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 23. "FBIT23,Filter bits" "0,1"
|
|
bitfld.long 0x6C 22. "FBIT22,Filter bits" "0,1"
|
|
bitfld.long 0x6C 21. "FBIT21,Filter bits" "0,1"
|
|
bitfld.long 0x6C 20. "FBIT20,Filter bits" "0,1"
|
|
bitfld.long 0x6C 19. "FBIT19,Filter bits" "0,1"
|
|
bitfld.long 0x6C 18. "FBIT18,Filter bits" "0,1"
|
|
bitfld.long 0x6C 17. "FBIT17,Filter bits" "0,1"
|
|
bitfld.long 0x6C 16. "FBIT16,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 15. "FBIT15,Filter bits" "0,1"
|
|
bitfld.long 0x6C 14. "FBIT14,Filter bits" "0,1"
|
|
bitfld.long 0x6C 13. "FBIT13,Filter bits" "0,1"
|
|
bitfld.long 0x6C 12. "FBIT12,Filter bits" "0,1"
|
|
bitfld.long 0x6C 11. "FBIT11,Filter bits" "0,1"
|
|
bitfld.long 0x6C 10. "FBIT10,Filter bits" "0,1"
|
|
bitfld.long 0x6C 9. "FBIT9,Filter bits" "0,1"
|
|
bitfld.long 0x6C 8. "FBIT8,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 7. "FBIT7,Filter bits" "0,1"
|
|
bitfld.long 0x6C 6. "FBIT6,Filter bits" "0,1"
|
|
bitfld.long 0x6C 5. "FBIT5,Filter bits" "0,1"
|
|
bitfld.long 0x6C 4. "FBIT4,Filter bits" "0,1"
|
|
bitfld.long 0x6C 3. "FBIT3,Filter bits" "0,1"
|
|
bitfld.long 0x6C 2. "FBIT2,Filter bits" "0,1"
|
|
bitfld.long 0x6C 1. "FBIT1,Filter bits" "0,1"
|
|
bitfld.long 0x6C 0. "FBIT0,Filter bits" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check Computing Unit)"
|
|
base ad:0x40023000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DATA,Data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data Register"
|
|
line.long 0x4 "INDATA,Independent Data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INDATA,Independent Data register"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 0. "RST,Reset bit" "0,1"
|
|
tree.end
|
|
tree "DAC (Digital-to-Analog Converter)"
|
|
base ad:0x40007400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,Control register (DAC_CTRL)"
|
|
bitfld.long 0x0 28. "DMAENCH2,DAC channel2 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MAMPSELCH2,DAC channel2 mask/amplitude"
|
|
bitfld.long 0x0 22.--23. "WAVENCH2,DAC channel2 noise/triangle wave" "0,1,2,3"
|
|
bitfld.long 0x0 19.--21. "TRGSELCH2,DAC channel2 trigger" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18. "TRGENCH2,DAC channel2 trigger" "0,1"
|
|
bitfld.long 0x0 17. "BUFFDCH2,DAC channel2 output buffer" "0,1"
|
|
bitfld.long 0x0 16. "ENCH2,DAC channel2 enable" "0,1"
|
|
bitfld.long 0x0 12. "DMAENCH1,DAC channel1 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MAMPSELCH1,DAC channel1 mask/amplitude"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "WAVENCH1,DAC channel1 noise/triangle wave" "0,1,2,3"
|
|
bitfld.long 0x0 3.--5. "TRGSELCH1,DAC channel1 trigger" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "TRGENCH1,DAC channel1 trigger" "0,1"
|
|
bitfld.long 0x0 1. "BUFFDCH1,DAC channel1 output buffer" "0,1"
|
|
bitfld.long 0x0 0. "ENCH1,DAC channel1 enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "SWTRG,DAC software trigger register"
|
|
bitfld.long 0x0 1. "SWTRG2,DAC channel2 software" "0,1"
|
|
bitfld.long 0x0 0. "SWTRG1,DAC channel1 software" "0,1"
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "DH12R1,DAC channel1 12-bit right-aligned data"
|
|
hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel1 12-bit right-aligned"
|
|
line.long 0x4 "DH12L1,DAC channel1 12-bit left aligned data"
|
|
hexmask.long.word 0x4 4.--15. 1. "DATA,DAC channel1 12-bit left-aligned"
|
|
line.long 0x8 "DH8R1,DAC channel1 8-bit right aligned data"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATA,DAC channel1 8-bit right-aligned"
|
|
line.long 0xC "DH12R2,DAC channel1 12-bit right-aligned data"
|
|
hexmask.long.word 0xC 0.--11. 1. "DATA,DAC channel2 12-bit right-aligned"
|
|
line.long 0x10 "DH12L2,DAC channel1 12-bit left aligned data"
|
|
hexmask.long.word 0x10 4.--15. 1. "DATA,DAC channel2 12-bit left-aligned"
|
|
line.long 0x14 "DH8R2,DAC channel1 8-bit right aligned data"
|
|
hexmask.long.byte 0x14 0.--7. 1. "DATA,DAC channel2 8-bit right-aligned"
|
|
line.long 0x18 "DH12RDUAL,Dual DAC 12-bit right-aligned data holding"
|
|
hexmask.long.word 0x18 16.--27. 1. "DATACH2,DAC channel2 12-bit right-aligned"
|
|
hexmask.long.word 0x18 0.--11. 1. "DATACH1,DAC channel1 12-bit right-aligned"
|
|
line.long 0x1C "DH12LDUAL,DUAL DAC 12-bit left aligned data holding"
|
|
hexmask.long.word 0x1C 20.--31. 1. "DATACH2,DAC channel2 12-bit right-aligned"
|
|
hexmask.long.word 0x1C 4.--15. 1. "DATACH1,DAC channel1 12-bit left-aligned"
|
|
line.long 0x20 "DH8RDUAL,DUAL DAC 8-bit right aligned data holding"
|
|
hexmask.long.byte 0x20 8.--15. 1. "DATACH2,DAC channel2 8-bit right-aligned"
|
|
hexmask.long.byte 0x20 0.--7. 1. "DATACH1,DAC channel1 8-bit right-aligned"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "DATAOCH1,DAC channel1 data output register"
|
|
hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel1 data output"
|
|
line.long 0x4 "DATAOCH2,DAC channel2 data output register"
|
|
hexmask.long.word 0x4 0.--11. 1. "DATA,DAC channel2 data output"
|
|
tree.end
|
|
tree "DBGMCU (Debug Support)"
|
|
base ad:0xE0042000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDCODE,DBGMCU_IDCODE"
|
|
hexmask.long.word 0x0 16.--31. 1. "WVR,Wafer Version Recognition"
|
|
hexmask.long.word 0x0 0.--11. 1. "EQR,Equipment Recognition"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CFG,DBGMCU_CFG"
|
|
bitfld.long 0x0 21. "CAN2_STS,CAN2_STS" "0,1"
|
|
bitfld.long 0x0 20. "TMR7_STS,TMR7_STS" "0,1"
|
|
bitfld.long 0x0 19. "TMR6_STS,TMR6_STS" "0,1"
|
|
bitfld.long 0x0 18. "TMR5_STS,TMR5_STS" "0,1"
|
|
bitfld.long 0x0 17. "TMR8_STS,TMR8_STS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "I2C2_SMBUS_TIMEOUT_STS,I2C2_SMBUS_TIMEOUT_STS" "0,1"
|
|
bitfld.long 0x0 15. "I2C1_SMBUS_TIMEOUT_STS,I2C1_SMBUS_TIMEOUT_STS" "0,1"
|
|
bitfld.long 0x0 14. "CAN1_STS,CAN1_STS" "0,1"
|
|
bitfld.long 0x0 13. "TMR4_STS,TMR4_STS" "0,1"
|
|
bitfld.long 0x0 12. "TMR3_STS,TMR3_STS" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TMR2_STS,TMR2_STS" "0,1"
|
|
bitfld.long 0x0 10. "TMR1_STS,TMR1_STS" "0,1"
|
|
bitfld.long 0x0 9. "WWDT_STS,WWDT_STS" "0,1"
|
|
bitfld.long 0x0 8. "IWDT_STS,IWDT_STS" "0,1"
|
|
bitfld.long 0x0 6.--7. "MODE,MODE" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 5. "IOEN,IOEN" "0,1"
|
|
bitfld.long 0x0 2. "STANDBY_CLK_STS,STANDBY_CLK_STS" "0,1"
|
|
bitfld.long 0x0 1. "STOP_CLK_STS,STOP_CLK_STS" "0,1"
|
|
bitfld.long 0x0 0. "SLEEP_CLK_STS,SLEEP_CLK_STS" "0,1"
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
base ad:0x0
|
|
tree "DMA1"
|
|
base ad:0x40020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "INTSTS,DMA Interrupt status register (DMA_INTSTS)"
|
|
bitfld.long 0x0 27. "TERRFLG7,Channel 7 Transfer Error" "0,1"
|
|
bitfld.long 0x0 26. "HTFLG7,Channel 7 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 25. "TCFLG7,Channel 7 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 24. "GINTFLG7,Channel 7 Global interrupt" "0,1"
|
|
bitfld.long 0x0 23. "TERRFLG6,Channel 6 Transfer Error" "0,1"
|
|
bitfld.long 0x0 22. "HTFLG6,Channel 6 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 21. "TCFLG6,Channel 6 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 20. "GINTFLG6,Channel 6 Global interrupt" "0,1"
|
|
bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 16. "GINTFLG5,Channel 5 Global interrupt" "0,1"
|
|
bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error" "0,1"
|
|
bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 12. "GINTFLG4,Channel 4 Global interrupt" "0,1"
|
|
bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error" "0,1"
|
|
bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 8. "GINTFLG3,Channel 3 Global interrupt" "0,1"
|
|
bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error" "0,1"
|
|
bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 4. "GINTFLG2,Channel 2 Global interrupt" "0,1"
|
|
bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error" "0,1"
|
|
bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GINTFLG1,Channel 1 Global interrupt" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "INTFCLR,DMA Interrupt reset register (DMA_INTFCLR)"
|
|
bitfld.long 0x0 27. "TERRCLR7,Channel 7 Transfer Error" "0,1"
|
|
bitfld.long 0x0 26. "HTCLR7,Channel 7 Half Transfer" "0,1"
|
|
bitfld.long 0x0 25. "TCCLR7,Channel 7 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 24. "GINTCLR7,Channel 7 Global interrupt" "0,1"
|
|
bitfld.long 0x0 23. "TERRCLR6,Channel 6 Transfer Error" "0,1"
|
|
bitfld.long 0x0 22. "HTCLR6,Channel 6 Half Transfer" "0,1"
|
|
bitfld.long 0x0 21. "TCCLR6,Channel 6 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 20. "GINTCLR6,Channel 6 Global interrupt" "0,1"
|
|
bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1"
|
|
bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 16. "GINTCLR5,Channel 5 Global interrupt" "0,1"
|
|
bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1"
|
|
bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1"
|
|
bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 12. "GINTCLR4,Channel 4 Global interrupt" "0,1"
|
|
bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1"
|
|
bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 8. "GINTCLR3,Channel 3 Global interrupt" "0,1"
|
|
bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1"
|
|
bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1"
|
|
bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 4. "GINTCLR2,Channel 2 Global interrupt" "0,1"
|
|
bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1"
|
|
bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1"
|
|
bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GINTCLR1,Channel 1 Global interrupt" "0,1"
|
|
group.long 0x8++0xF
|
|
line.long 0x0 "CHCFG1,DMA channel 1 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA1,DMA channel 1 number of data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address register"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR1,DMA channel 1 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "CHCFG2,DMA channel 2 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA2,DMA channel 2 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR2,DMA channel 2 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "CHCFG3,DMA channel 3 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA3,DMA channel 3 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR3,DMA channel 3 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "CHCFG4,DMA channel 4 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA4,DMA channel 4 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR4,DMA channel 4 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "CHCFG5,DMA channel 5 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA5,DMA channel 5 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR5,DMA channel 5 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "CHCFG6,DMA channel 6 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA6,DMA channel 6 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR6,DMA channel 6 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR6,DMA channel 6 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CHCFG7,DMA channel 7 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA7,DMA channel 7 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NADDR,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR7,DMA channel 7 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR7,DMA channel 7 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
tree.end
|
|
tree "DMA2"
|
|
base ad:0x40020400
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "INTSTS,DMA Interrupt status register (DMA_INTSTS)"
|
|
bitfld.long 0x0 27. "TERRFLG7,Channel 7 Transfer Error" "0,1"
|
|
bitfld.long 0x0 26. "HTFLG7,Channel 7 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 25. "TCFLG7,Channel 7 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 24. "GINTFLG7,Channel 7 Global interrupt" "0,1"
|
|
bitfld.long 0x0 23. "TERRFLG6,Channel 6 Transfer Error" "0,1"
|
|
bitfld.long 0x0 22. "HTFLG6,Channel 6 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 21. "TCFLG6,Channel 6 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 20. "GINTFLG6,Channel 6 Global interrupt" "0,1"
|
|
bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 16. "GINTFLG5,Channel 5 Global interrupt" "0,1"
|
|
bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error" "0,1"
|
|
bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 12. "GINTFLG4,Channel 4 Global interrupt" "0,1"
|
|
bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error" "0,1"
|
|
bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 8. "GINTFLG3,Channel 3 Global interrupt" "0,1"
|
|
bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error" "0,1"
|
|
bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 4. "GINTFLG2,Channel 2 Global interrupt" "0,1"
|
|
bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error" "0,1"
|
|
bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete" "0,1"
|
|
bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GINTFLG1,Channel 1 Global interrupt" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "INTFCLR,DMA Interrupt reset register (DMA_INTFCLR)"
|
|
bitfld.long 0x0 27. "TERRCLR7,Channel 7 Transfer Error" "0,1"
|
|
bitfld.long 0x0 26. "HTCLR7,Channel 7 Half Transfer" "0,1"
|
|
bitfld.long 0x0 25. "TCCLR7,Channel 7 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 24. "GINTCLR7,Channel 7 Global interrupt" "0,1"
|
|
bitfld.long 0x0 23. "TERRCLR6,Channel 6 Transfer Error" "0,1"
|
|
bitfld.long 0x0 22. "HTCLR6,Channel 6 Half Transfer" "0,1"
|
|
bitfld.long 0x0 21. "TCCLR6,Channel 6 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 20. "GINTCLR6,Channel 6 Global interrupt" "0,1"
|
|
bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1"
|
|
bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 16. "GINTCLR5,Channel 5 Global interrupt" "0,1"
|
|
bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1"
|
|
bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1"
|
|
bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 12. "GINTCLR4,Channel 4 Global interrupt" "0,1"
|
|
bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1"
|
|
bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 8. "GINTCLR3,Channel 3 Global interrupt" "0,1"
|
|
bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1"
|
|
bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1"
|
|
bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1"
|
|
bitfld.long 0x0 4. "GINTCLR2,Channel 2 Global interrupt" "0,1"
|
|
bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1"
|
|
bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1"
|
|
bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GINTCLR1,Channel 1 Global interrupt" "0,1"
|
|
group.long 0x8++0xF
|
|
line.long 0x0 "CHCFG1,DMA channel 1 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA1,DMA channel 1 number of data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address register"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR1,DMA channel 1 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "CHCFG2,DMA channel 2 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA2,DMA channel 2 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR2,DMA channel 2 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "CHCFG3,DMA channel 3 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA3,DMA channel 3 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR3,DMA channel 3 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "CHCFG4,DMA channel 4 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA4,DMA channel 4 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR4,DMA channel 4 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "CHCFG5,DMA channel 5 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA5,DMA channel 5 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR5,DMA channel 5 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "CHCFG6,DMA channel 6 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA6,DMA channel 6 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDATA,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR6,DMA channel 6 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR6,DMA channel 6 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CHCFG7,DMA channel 7 configuration register"
|
|
bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MEMSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "CHNDATA7,DMA channel 7 number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NADDR,Number of data to transfer"
|
|
line.long 0x8 "CHPADDR7,DMA channel 7 peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address"
|
|
line.long 0xC "CHMADDR7,DMA channel 7 memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address"
|
|
tree.end
|
|
tree.end
|
|
tree "DMC (Dynamic Memory Controller)"
|
|
base ad:0xA0000000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CFG,Configuraion register"
|
|
bitfld.long 0x0 13.--14. "DWCFG,DWCFG" "0,1,2,3"
|
|
hexmask.long.byte 0x0 9.--12. 1. "CAWCFG,CAWCFG"
|
|
hexmask.long.byte 0x0 5.--8. 1. "RAWCFG,RAWCFG"
|
|
bitfld.long 0x0 3.--4. "BAWCFG,BAWCFG" "0,1,2,3"
|
|
line.long 0x4 "TIM0,Timing register 0"
|
|
hexmask.long.byte 0x4 27.--31. 1. "EXSR1,EXSR1"
|
|
bitfld.long 0x4 26. "ECASLSEL1,ECASLSEL1" "0,1"
|
|
hexmask.long.byte 0x4 22.--25. 1. "ATACP,ATACP"
|
|
hexmask.long.byte 0x4 18.--21. 1. "XSR0,XSR0"
|
|
hexmask.long.byte 0x4 14.--17. 1. "ARPSEL,ARPSEL"
|
|
bitfld.long 0x4 12.--13. "WRTIMSEL,WRTIMSEL" "0,1,2,3"
|
|
bitfld.long 0x4 9.--11. "PCPSEL,PCPSEL" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 6.--8. "DTIMSEL,DTIMSEL" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 2.--5. 1. "RASMINTSEL,RASMINTSEL"
|
|
bitfld.long 0x4 0.--1. "CASLSEL0,CASLSEL0" "0,1,2,3"
|
|
line.long 0x8 "TIM1,Timing register 1"
|
|
hexmask.long.byte 0x8 16.--19. 1. "ARNUMCFG,ARNUMCFG"
|
|
hexmask.long.word 0x8 0.--15. 1. "STBTIM,STBTIM"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
hexmask.long.byte 0xC 12.--15. 1. "BANKNUMCFG,BANKNUMCFG"
|
|
rbitfld.long 0xC 11. "SRMFLG,SRMFLG" "0,1"
|
|
bitfld.long 0xC 9. "MODESET,MODESET" "0,1"
|
|
bitfld.long 0xC 6.--8. "RDNUMMCFG,RDNUMCFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 5. "FRASREN,FRASREN" "0,1"
|
|
bitfld.long 0xC 4. "FRBSREN,FRBSREN" "0,1"
|
|
bitfld.long 0xC 3. "PCACFG,PCACFG" "0,1"
|
|
bitfld.long 0xC 2. "PDMEN,PDMEN" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SRMEN,SRMEN" "0,1"
|
|
bitfld.long 0xC 0. "INIT,INIT" "0,1"
|
|
line.long 0x10 "REF,refresh register"
|
|
hexmask.long.word 0x10 0.--15. 1. "RCYCCFG,RCYCCFG"
|
|
line.long 0x14 "CHIPSEL,Chip select register"
|
|
hexmask.long.word 0x14 16.--31. 1. "BACHIPSEL,BACHIPSEL"
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "MASK,Mask register"
|
|
bitfld.long 0x0 5.--7. "MTYPESEL,MTYPESEL" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--4. 1. "MSIZESEL,MSIZESEL"
|
|
group.long 0x400++0x7
|
|
line.long 0x0 "SW,switch register"
|
|
bitfld.long 0x0 0. "MCSW,Memory Controller Function Switch" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 7. "WRPBSEL,WRPBSEL" "0,1"
|
|
bitfld.long 0x4 6. "BUFFEN,BUFFEN" "0,1"
|
|
bitfld.long 0x4 5. "WPEN,WPEN" "0,1"
|
|
bitfld.long 0x4 2.--4. "RDDCFG,RDDCFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 1. "RDDEN,RDDEN" "0,1"
|
|
bitfld.long 0x4 0. "CPHACFG,CPHACFG" "0,1"
|
|
tree.end
|
|
tree "EINT (External Interrupt/Event Controller)"
|
|
base ad:0x40010400
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "IMASK,Interrupt mask register (EINT_IMASK)"
|
|
bitfld.long 0x0 18. "IMASK18,Interrupt Mask on line 18" "0,1"
|
|
bitfld.long 0x0 17. "IMASK17,Interrupt Mask on line 17" "0,1"
|
|
bitfld.long 0x0 16. "IMASK16,Interrupt Mask on line 16" "0,1"
|
|
bitfld.long 0x0 15. "IMASK15,Interrupt Mask on line 15" "0,1"
|
|
bitfld.long 0x0 14. "IMASK14,Interrupt Mask on line 14" "0,1"
|
|
bitfld.long 0x0 13. "IMASK13,Interrupt Mask on line 13" "0,1"
|
|
bitfld.long 0x0 12. "IMASK12,Interrupt Mask on line 12" "0,1"
|
|
bitfld.long 0x0 11. "IMASK11,Interrupt Mask on line 11" "0,1"
|
|
bitfld.long 0x0 10. "IMASK10,Interrupt Mask on line 10" "0,1"
|
|
bitfld.long 0x0 9. "IMASK9,Interrupt Mask on line 9" "0,1"
|
|
bitfld.long 0x0 8. "IMASK8,Interrupt Mask on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "IMASK7,Interrupt Mask on line 7" "0,1"
|
|
bitfld.long 0x0 6. "IMASK6,Interrupt Mask on line 6" "0,1"
|
|
bitfld.long 0x0 5. "IMASK5,Interrupt Mask on line 5" "0,1"
|
|
bitfld.long 0x0 4. "IMASK4,Interrupt Mask on line 4" "0,1"
|
|
bitfld.long 0x0 3. "IMASK3,Interrupt Mask on line 3" "0,1"
|
|
bitfld.long 0x0 2. "IMASK2,Interrupt Mask on line 2" "0,1"
|
|
bitfld.long 0x0 1. "IMASK1,Interrupt Mask on line 1" "0,1"
|
|
bitfld.long 0x0 0. "IMASK0,Interrupt Mask on line 0" "0,1"
|
|
line.long 0x4 "EMASK,Event mask register (EINT_EMASK)"
|
|
bitfld.long 0x4 18. "EMASK18,Event Mask on line 18" "0,1"
|
|
bitfld.long 0x4 17. "EMASK17,Event Mask on line 17" "0,1"
|
|
bitfld.long 0x4 16. "EMASK16,Event Mask on line 16" "0,1"
|
|
bitfld.long 0x4 15. "EMASK15,Event Mask on line 15" "0,1"
|
|
bitfld.long 0x4 14. "EMASK14,Event Mask on line 14" "0,1"
|
|
bitfld.long 0x4 13. "EMASK13,Event Mask on line 13" "0,1"
|
|
bitfld.long 0x4 12. "EMASK12,Event Mask on line 12" "0,1"
|
|
bitfld.long 0x4 11. "EMASK11,Event Mask on line 11" "0,1"
|
|
bitfld.long 0x4 10. "EMASK10,Event Mask on line 10" "0,1"
|
|
bitfld.long 0x4 9. "EMASK9,Event Mask on line 9" "0,1"
|
|
bitfld.long 0x4 8. "EMASK8,Event Mask on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EMASK7,Event Mask on line 7" "0,1"
|
|
bitfld.long 0x4 6. "EMASK6,Event Mask on line 6" "0,1"
|
|
bitfld.long 0x4 5. "EMASK5,Event Mask on line 5" "0,1"
|
|
bitfld.long 0x4 4. "EMASK4,Event Mask on line 4" "0,1"
|
|
bitfld.long 0x4 3. "EMASK3,Event Mask on line 3" "0,1"
|
|
bitfld.long 0x4 2. "EMASK2,Event Mask on line 2" "0,1"
|
|
bitfld.long 0x4 1. "EMASK1,Event Mask on line 1" "0,1"
|
|
bitfld.long 0x4 0. "EMASK0,Event Mask on line 0" "0,1"
|
|
line.long 0x8 "RTEN,Rising Trigger selection register (EINT_RTEN)"
|
|
bitfld.long 0x8 18. "PTEN18,Rising trigger event configuration of line 18" "0,1"
|
|
bitfld.long 0x8 17. "PTEN17,Rising trigger event configuration of line 17" "0,1"
|
|
bitfld.long 0x8 16. "PTEN16,Rising trigger event configuration of line 16" "0,1"
|
|
bitfld.long 0x8 15. "PTEN15,Rising trigger event configuration of line 15" "0,1"
|
|
bitfld.long 0x8 14. "PTEN14,Rising trigger event configuration of line 14" "0,1"
|
|
bitfld.long 0x8 13. "PTEN13,Rising trigger event configuration of line 13" "0,1"
|
|
bitfld.long 0x8 12. "PTEN12,Rising trigger event configuration of line 12" "0,1"
|
|
bitfld.long 0x8 11. "PTEN11,Rising trigger event configuration of line 11" "0,1"
|
|
bitfld.long 0x8 10. "PTEN10,Rising trigger event configuration of line 10" "0,1"
|
|
bitfld.long 0x8 9. "PTEN9,Rising trigger event configuration of line 9" "0,1"
|
|
bitfld.long 0x8 8. "PTEN8,Rising trigger event configuration of line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "PTEN7,Rising trigger event configuration of line 7" "0,1"
|
|
bitfld.long 0x8 6. "PTEN6,Rising trigger event configuration of line 6" "0,1"
|
|
bitfld.long 0x8 5. "PTEN5,Rising trigger event configuration of line 5" "0,1"
|
|
bitfld.long 0x8 4. "PTEN4,Rising trigger event configuration of line 4" "0,1"
|
|
bitfld.long 0x8 3. "PTEN3,Rising trigger event configuration of line 3" "0,1"
|
|
bitfld.long 0x8 2. "PTEN2,Rising trigger event configuration of line 2" "0,1"
|
|
bitfld.long 0x8 1. "PTEN1,Rising trigger event configuration of line 1" "0,1"
|
|
bitfld.long 0x8 0. "PTEN0,Rising trigger event configuration of line 0" "0,1"
|
|
line.long 0xC "FTEN,Falling Trigger selection register"
|
|
bitfld.long 0xC 18. "FTEN18,Falling trigger event configuration of line 18" "0,1"
|
|
bitfld.long 0xC 17. "FTEN17,Falling trigger event configuration of line 17" "0,1"
|
|
bitfld.long 0xC 16. "FTEN16,Falling trigger event configuration of line 16" "0,1"
|
|
bitfld.long 0xC 15. "FTEN15,Falling trigger event configuration of line 15" "0,1"
|
|
bitfld.long 0xC 14. "FTEN14,Falling trigger event configuration of line 14" "0,1"
|
|
bitfld.long 0xC 13. "FTEN13,Falling trigger event configuration of line 13" "0,1"
|
|
bitfld.long 0xC 12. "FTEN12,Falling trigger event configuration of line 12" "0,1"
|
|
bitfld.long 0xC 11. "FTEN11,Falling trigger event configuration of line 11" "0,1"
|
|
bitfld.long 0xC 10. "FTEN10,Falling trigger event configuration of line 10" "0,1"
|
|
bitfld.long 0xC 9. "FTEN9,Falling trigger event configuration of line 9" "0,1"
|
|
bitfld.long 0xC 8. "FTEN8,Falling trigger event configuration of line 8" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "FTEN7,Falling trigger event configuration of line 7" "0,1"
|
|
bitfld.long 0xC 6. "FTEN6,Falling trigger event configuration of line 6" "0,1"
|
|
bitfld.long 0xC 5. "FTEN5,Falling trigger event configuration of line 5" "0,1"
|
|
bitfld.long 0xC 4. "FTEN4,Falling trigger event configuration of line 4" "0,1"
|
|
bitfld.long 0xC 3. "FTEN3,Falling trigger event configuration of line 3" "0,1"
|
|
bitfld.long 0xC 2. "FTEN2,Falling trigger event configuration of line 2" "0,1"
|
|
bitfld.long 0xC 1. "FTEN1,Falling trigger event configuration of line 1" "0,1"
|
|
bitfld.long 0xC 0. "FTEN0,Falling trigger event configuration of line 0" "0,1"
|
|
line.long 0x10 "SWINTE,Software interrupt event register"
|
|
bitfld.long 0x10 18. "SWINTE18,Software Interrupt on line 18" "0,1"
|
|
bitfld.long 0x10 17. "SWINTE17,Software Interrupt on line 17" "0,1"
|
|
bitfld.long 0x10 16. "SWINTE16,Software Interrupt on line 16" "0,1"
|
|
bitfld.long 0x10 15. "SWINTE15,Software Interrupt on line 15" "0,1"
|
|
bitfld.long 0x10 14. "SWINTE14,Software Interrupt on line 14" "0,1"
|
|
bitfld.long 0x10 13. "SWINTE13,Software Interrupt on line 13" "0,1"
|
|
bitfld.long 0x10 12. "SWINTE12,Software Interrupt on line 12" "0,1"
|
|
bitfld.long 0x10 11. "SWINTE11,Software Interrupt on line 11" "0,1"
|
|
bitfld.long 0x10 10. "SWINTE10,Software Interrupt on line 10" "0,1"
|
|
bitfld.long 0x10 9. "SWINTE9,Software Interrupt on line 9" "0,1"
|
|
bitfld.long 0x10 8. "SWINTE8,Software Interrupt on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "SWINTE7,Software Interrupt on line 7" "0,1"
|
|
bitfld.long 0x10 6. "SWINTE6,Software Interrupt on line 6" "0,1"
|
|
bitfld.long 0x10 5. "SWINTE5,Software Interrupt on line 5" "0,1"
|
|
bitfld.long 0x10 4. "SWINTE4,Software Interrupt on line 4" "0,1"
|
|
bitfld.long 0x10 3. "SWINTE3,Software Interrupt on line 3" "0,1"
|
|
bitfld.long 0x10 2. "SWINTE2,Software Interrupt on line 2" "0,1"
|
|
bitfld.long 0x10 1. "SWINTE1,Software Interrupt on line 1" "0,1"
|
|
bitfld.long 0x10 0. "SWINTE0,Software Interrupt on line 0" "0,1"
|
|
line.long 0x14 "IPEND,Interrupt Flag Enable register (EINT_IPEND)"
|
|
bitfld.long 0x14 18. "IPEND18,Pending bit 18" "0,1"
|
|
bitfld.long 0x14 17. "IPEND17,Pending bit 17" "0,1"
|
|
bitfld.long 0x14 16. "IPEND16,Pending bit 16" "0,1"
|
|
bitfld.long 0x14 15. "IPEND15,Pending bit 15" "0,1"
|
|
bitfld.long 0x14 14. "IPEND14,Pending bit 14" "0,1"
|
|
bitfld.long 0x14 13. "IPEND13,Pending bit 13" "0,1"
|
|
bitfld.long 0x14 12. "IPEND12,Pending bit 12" "0,1"
|
|
bitfld.long 0x14 11. "IPEND11,Pending bit 11" "0,1"
|
|
bitfld.long 0x14 10. "IPEND10,Pending bit 10" "0,1"
|
|
bitfld.long 0x14 9. "IPEND9,Pending bit 9" "0,1"
|
|
bitfld.long 0x14 8. "IPEND8,Pending bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "IPEND7,Pending bit 7" "0,1"
|
|
bitfld.long 0x14 6. "IPEND6,Pending bit 6" "0,1"
|
|
bitfld.long 0x14 5. "IPEND5,Pending bit 5" "0,1"
|
|
bitfld.long 0x14 4. "IPEND4,Pending bit 4" "0,1"
|
|
bitfld.long 0x14 3. "IPEND3,Pending bit 3" "0,1"
|
|
bitfld.long 0x14 2. "IPEND2,Pending bit 2" "0,1"
|
|
bitfld.long 0x14 1. "IPEND1,Pending bit 1" "0,1"
|
|
bitfld.long 0x14 0. "IPEND0,Pending bit 0" "0,1"
|
|
tree.end
|
|
tree "FMC (Flash Memory Controller)"
|
|
base ad:0x40022000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL1,Flash access control register"
|
|
rbitfld.long 0x0 5. "PBSF,Prefetch buffer status" "0,1"
|
|
bitfld.long 0x0 4. "PBEN,Prefetch buffer enable" "0,1"
|
|
bitfld.long 0x0 3. "HCAEN,Flash half cycle access" "0,1"
|
|
bitfld.long 0x0 0.--2. "WS,Latency" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x4++0x7
|
|
line.long 0x0 "KEY,key register"
|
|
hexmask.long 0x0 0.--31. 1. "KEY,FMC key"
|
|
line.long 0x4 "OBKEY,option byte key register"
|
|
hexmask.long 0x4 0.--31. 1. "OBKEY,Option byte key"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "STS,status register"
|
|
bitfld.long 0x0 5. "OCF,End of operation" "0,1"
|
|
bitfld.long 0x0 4. "WPEF,Write protection error" "0,1"
|
|
bitfld.long 0x0 2. "PEF,Programming error" "0,1"
|
|
rbitfld.long 0x0 0. "BUSYF,Busy" "0,1"
|
|
line.long 0x4 "CTRL2,Control register"
|
|
bitfld.long 0x4 12. "OCIE,End of operation interrupt enable" "0,1"
|
|
bitfld.long 0x4 10. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 9. "OBWEN,Option bytes write enable" "0,1"
|
|
bitfld.long 0x4 7. "LOCK,Lock" "0,1"
|
|
bitfld.long 0x4 6. "STA,Start" "0,1"
|
|
bitfld.long 0x4 5. "OBE,Option byte erase" "0,1"
|
|
bitfld.long 0x4 4. "OBP,Option byte programming" "0,1"
|
|
bitfld.long 0x4 2. "MASSERA,Mass Erase" "0,1"
|
|
bitfld.long 0x4 1. "PAGEERA,Page Erase" "0,1"
|
|
bitfld.long 0x4 0. "PG,Programming" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "ADDR,Flash address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Flash Address"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "OBCS,Option byte register"
|
|
hexmask.long.byte 0x0 18.--25. 1. "DATA1,Data1"
|
|
hexmask.long.byte 0x0 10.--17. 1. "DATA0,Data1"
|
|
hexmask.long.byte 0x0 2.--9. 1. "UOB,UOB"
|
|
bitfld.long 0x0 1. "READPROT,Read protection" "0,1"
|
|
bitfld.long 0x0 0. "OBE,Option byte error" "0,1"
|
|
line.long 0x4 "WRTPROT,Write protection register"
|
|
hexmask.long 0x4 0.--31. 1. "WRTPROT,Write protect"
|
|
tree.end
|
|
tree "GPIO (General Purpose Input/Output)"
|
|
base ad:0x0
|
|
tree "GPIOA"
|
|
base ad:0x40010800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x40010C00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x40011000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x40011400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOE"
|
|
base ad:0x40011800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOF"
|
|
base ad:0x40011C00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree "GPIOG"
|
|
base ad:0x40012000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CFGLOW,Port configuration register 0"
|
|
bitfld.long 0x0 30.--31. "CFG7,Port n.7 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODE7,Port n.7 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CFG6,Port n.6 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODE6,Port n.6 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "CFG5,Port n.5 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODE5,Port n.5 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "CFG4,Port n.4 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODE4,Port n.4 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "CFG3,Port n.3 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODE3,Port n.3 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "CFG2,Port n.2 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODE2,Port n.2 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CFG1,Port n.1 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODE1,Port n.1 mode bits" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "CFG0,Port n.0 configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE0,Port n.0 mode bits" "0,1,2,3"
|
|
line.long 0x4 "CFGHIG,Port configuration register 1"
|
|
bitfld.long 0x4 30.--31. "CFG15,Port n.15 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 28.--29. "MODE15,Port n.15 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 26.--27. "CFG14,Port n.14 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 24.--25. "MODE14,Port n.14 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 22.--23. "CFG13,Port n.13 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 20.--21. "MODE13,Port n.13 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 18.--19. "CFG12,Port n.12 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "MODE12,Port n.12 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 14.--15. "CFG11,Port n.11 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 12.--13. "MODE11,Port n.11 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "CFG10,Port n.10 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "MODE10,Port n.10 mode bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "CFG9,Port n.9 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 4.--5. "MODE9,Port n.9 mode bits" "0,1,2,3"
|
|
bitfld.long 0x4 2.--3. "CFG8,Port n.8 configuration" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "MODE8,Port n.8 mode bits" "0,1,2,3"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "IDATA,Port input data register"
|
|
bitfld.long 0x0 15. "IDATA15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDATA14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDATA13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDATA12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDATA11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDATA10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDATA9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDATA8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDATA7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDATA6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDATA5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDATA4,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "IDATA3,Port input data" "0,1"
|
|
bitfld.long 0x0 2. "IDATA2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDATA1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDATA0,Port input data" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ODATA,Port output data register"
|
|
bitfld.long 0x0 15. "ODATA15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODATA14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODATA13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODATA12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODATA11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODATA10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODATA9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODATA8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODATA7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODATA6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODATA5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODATA4,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ODATA3,Port output data" "0,1"
|
|
bitfld.long 0x0 2. "ODATA2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODATA1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODATA0,Port output data" "0,1"
|
|
wgroup.long 0x10++0x7
|
|
line.long 0x0 "BSC,Port bit set/reset register"
|
|
bitfld.long 0x0 31. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x0 18. "BC2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "BC0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "BS11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Set bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "BS7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Set bit 6" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "BS1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Set bit 0" "0,1"
|
|
line.long 0x4 "BC,Port bit clear register (GPIOn_BC)"
|
|
bitfld.long 0x4 15. "BC15,Clear bit 15" "0,1"
|
|
bitfld.long 0x4 14. "BC14,Clear bit 14" "0,1"
|
|
bitfld.long 0x4 13. "BC13,Clear bit 13" "0,1"
|
|
bitfld.long 0x4 12. "BC12,Clear bit 12" "0,1"
|
|
bitfld.long 0x4 11. "BC11,Clear bit 11" "0,1"
|
|
bitfld.long 0x4 10. "BC10,Clear bit 10" "0,1"
|
|
bitfld.long 0x4 9. "BC9,Clear bit 9" "0,1"
|
|
bitfld.long 0x4 8. "BC8,Clear bit 8" "0,1"
|
|
bitfld.long 0x4 7. "BC7,Clear bit 7" "0,1"
|
|
bitfld.long 0x4 6. "BC6,Clear bit 6" "0,1"
|
|
bitfld.long 0x4 5. "BC5,Clear bit 5" "0,1"
|
|
bitfld.long 0x4 4. "BC4,Clear bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BC3,Clear bit 3" "0,1"
|
|
bitfld.long 0x4 2. "BC2,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 1. "BC1,Clear bit 1" "0,1"
|
|
bitfld.long 0x4 0. "BC0,Clear bit 0" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LOCK,Port configuration lock register (GPIOn_LOCK)"
|
|
bitfld.long 0x0 16. "LOCKKEY,Lock key" "0,1"
|
|
bitfld.long 0x0 15. "LOCK15,Port A Lock bit 15" "0,1"
|
|
bitfld.long 0x0 14. "LOCK14,Port A Lock bit 14" "0,1"
|
|
bitfld.long 0x0 13. "LOCK13,Port A Lock bit 13" "0,1"
|
|
bitfld.long 0x0 12. "LOCK12,Port A Lock bit 12" "0,1"
|
|
bitfld.long 0x0 11. "LOCK11,Port A Lock bit 11" "0,1"
|
|
bitfld.long 0x0 10. "LOCK10,Port A Lock bit 10" "0,1"
|
|
bitfld.long 0x0 9. "LOCK9,Port A Lock bit 9" "0,1"
|
|
bitfld.long 0x0 8. "LOCK8,Port A Lock bit 8" "0,1"
|
|
bitfld.long 0x0 7. "LOCK7,Port A Lock bit 7" "0,1"
|
|
bitfld.long 0x0 6. "LOCK6,Port A Lock bit 6" "0,1"
|
|
bitfld.long 0x0 5. "LOCK5,Port A Lock bit 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "LOCK4,Port A Lock bit 4" "0,1"
|
|
bitfld.long 0x0 3. "LOCK3,Port A Lock bit 3" "0,1"
|
|
bitfld.long 0x0 2. "LOCK2,Port A Lock bit 2" "0,1"
|
|
bitfld.long 0x0 1. "LOCK1,Port A Lock bit 1" "0,1"
|
|
bitfld.long 0x0 0. "LOCK0,Port A Lock bit 0" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "I2C (Internal Integrated Circuit Interface)"
|
|
base ad:0x0
|
|
tree "I2C1"
|
|
base ad:0x40005400
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 15. "SWRST,Software reset" "0,1"
|
|
bitfld.long 0x0 13. "ALERTEN,SMBus alert" "0,1"
|
|
bitfld.long 0x0 12. "PEC,Packet error checking" "0,1"
|
|
bitfld.long 0x0 11. "ACKPOS,Acknowledge/PEC Position (for data" "0,1"
|
|
bitfld.long 0x0 10. "ACKEN,Acknowledge enable" "0,1"
|
|
bitfld.long 0x0 9. "STOP,Stop generation" "0,1"
|
|
bitfld.long 0x0 8. "START,Start generation" "0,1"
|
|
bitfld.long 0x0 7. "CLKSTRETCHD,Clock stretching disable (Slave mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "SRBEN,General call enable" "0,1"
|
|
bitfld.long 0x0 5. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 4. "ARPEN,ARP enable" "0,1"
|
|
bitfld.long 0x0 3. "SMBTCFG,SMBus type" "0,1"
|
|
bitfld.long 0x0 1. "SMBEN,SMBus mode" "0,1"
|
|
bitfld.long 0x0 0. "I2CEN,Peripheral enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 12. "LTCFG,DMA last transfer" "0,1"
|
|
bitfld.long 0x4 11. "DMAEN,DMA requests enable" "0,1"
|
|
bitfld.long 0x4 10. "BUFIEN,Buffer interrupt enable" "0,1"
|
|
bitfld.long 0x4 9. "EVIEN,Event interrupt enable" "0,1"
|
|
bitfld.long 0x4 8. "ERRIEN,Error interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--5. 1. "CLKFCFG,Peripheral clock frequency"
|
|
line.long 0x8 "SADDR1,Own address register 1"
|
|
bitfld.long 0x8 15. "ADDRLEN,Address Length Configure" "0,1"
|
|
bitfld.long 0x8 8.--9. "ADDR8_9,Interface address" "0,1,2,3"
|
|
hexmask.long.byte 0x8 1.--7. 1. "ADDR1_7,Interface address"
|
|
bitfld.long 0x8 0. "ADDR0,Interface address" "0,1"
|
|
line.long 0xC "SADDR2,Own address register 2"
|
|
hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address"
|
|
bitfld.long 0xC 0. "ADDRNUM,Dual addressing mode" "0,1"
|
|
line.long 0x10 "DATA,Data register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,8-bit data register"
|
|
line.long 0x14 "STS1,Status register 1"
|
|
bitfld.long 0x14 15. "SMBALTFLG,SMBus alert" "0,1"
|
|
bitfld.long 0x14 14. "TTEFLG,Timeout or Tlow error" "0,1"
|
|
bitfld.long 0x14 12. "PECEFLG,PEC Error in reception" "0,1"
|
|
bitfld.long 0x14 11. "OVRURFLG,Overrun/Underrun" "0,1"
|
|
bitfld.long 0x14 10. "AEFLG,Acknowledge failure" "0,1"
|
|
bitfld.long 0x14 9. "ALFLG,Arbitration lost (master" "0,1"
|
|
bitfld.long 0x14 8. "BERRFLG,Bus error" "0,1"
|
|
rbitfld.long 0x14 7. "TXBEFLG,Data register empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 6. "RXBNEFLG,Data register not empty" "0,1"
|
|
rbitfld.long 0x14 4. "STOPFLG,Stop detection (slave" "0,1"
|
|
rbitfld.long 0x14 3. "ADDR10FLG,10-bit header sent (Master" "0,1"
|
|
rbitfld.long 0x14 2. "BTCFLG,Byte transfer finished" "0,1"
|
|
rbitfld.long 0x14 1. "ADDRFLG,Address sent (master mode)/matched" "0,1"
|
|
rbitfld.long 0x14 0. "STARTFLG,Start bit (Master mode)" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STS2,Status register 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "PECVALUE,acket error checking"
|
|
bitfld.long 0x0 7. "DUALADDRFLG,Dual flag (Slave mode)" "0,1"
|
|
bitfld.long 0x0 6. "SMMHADDR,SMBus host header (Slave" "0,1"
|
|
bitfld.long 0x0 5. "SMBDADDRFLG,SMBus device default address (Slave" "0,1"
|
|
bitfld.long 0x0 4. "GENCALLFLG,General call address (Slave" "0,1"
|
|
bitfld.long 0x0 2. "TRFLG,Transmitter/receiver" "0,1"
|
|
bitfld.long 0x0 1. "BUSBSYFLG,Bus busy" "0,1"
|
|
bitfld.long 0x0 0. "MSFLG,Master/slave" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "CLKCTRL,Clock control register"
|
|
bitfld.long 0x0 15. "SPEEDCFG,I2C master mode selection" "0,1"
|
|
bitfld.long 0x0 14. "FDUTYCFG,Fast mode duty cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--11. 1. "CLKS,Clock control register in Fast/Standard"
|
|
line.long 0x4 "RISETMAX,RISETMAX register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "RISETMAX,Maximum rise time in Fast/Standard mode"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SWITCH,I2C Switching register"
|
|
bitfld.long 0x0 0. "SWITCH,I2C Switching" "0,1"
|
|
tree.end
|
|
tree "I2C2"
|
|
base ad:0x40005800
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 15. "SWRST,Software reset" "0,1"
|
|
bitfld.long 0x0 13. "ALERTEN,SMBus alert" "0,1"
|
|
bitfld.long 0x0 12. "PEC,Packet error checking" "0,1"
|
|
bitfld.long 0x0 11. "ACKPOS,Acknowledge/PEC Position (for data" "0,1"
|
|
bitfld.long 0x0 10. "ACKEN,Acknowledge enable" "0,1"
|
|
bitfld.long 0x0 9. "STOP,Stop generation" "0,1"
|
|
bitfld.long 0x0 8. "START,Start generation" "0,1"
|
|
bitfld.long 0x0 7. "CLKSTRETCHD,Clock stretching disable (Slave mode)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "SRBEN,General call enable" "0,1"
|
|
bitfld.long 0x0 5. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 4. "ARPEN,ARP enable" "0,1"
|
|
bitfld.long 0x0 3. "SMBTCFG,SMBus type" "0,1"
|
|
bitfld.long 0x0 1. "SMBEN,SMBus mode" "0,1"
|
|
bitfld.long 0x0 0. "I2CEN,Peripheral enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 12. "LTCFG,DMA last transfer" "0,1"
|
|
bitfld.long 0x4 11. "DMAEN,DMA requests enable" "0,1"
|
|
bitfld.long 0x4 10. "BUFIEN,Buffer interrupt enable" "0,1"
|
|
bitfld.long 0x4 9. "EVIEN,Event interrupt enable" "0,1"
|
|
bitfld.long 0x4 8. "ERRIEN,Error interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--5. 1. "CLKFCFG,Peripheral clock frequency"
|
|
line.long 0x8 "SADDR1,Own address register 1"
|
|
bitfld.long 0x8 15. "ADDRLEN,Address Length Configure" "0,1"
|
|
bitfld.long 0x8 8.--9. "ADDR8_9,Interface address" "0,1,2,3"
|
|
hexmask.long.byte 0x8 1.--7. 1. "ADDR1_7,Interface address"
|
|
bitfld.long 0x8 0. "ADDR0,Interface address" "0,1"
|
|
line.long 0xC "SADDR2,Own address register 2"
|
|
hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address"
|
|
bitfld.long 0xC 0. "ADDRNUM,Dual addressing mode" "0,1"
|
|
line.long 0x10 "DATA,Data register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,8-bit data register"
|
|
line.long 0x14 "STS1,Status register 1"
|
|
bitfld.long 0x14 15. "SMBALTFLG,SMBus alert" "0,1"
|
|
bitfld.long 0x14 14. "TTEFLG,Timeout or Tlow error" "0,1"
|
|
bitfld.long 0x14 12. "PECEFLG,PEC Error in reception" "0,1"
|
|
bitfld.long 0x14 11. "OVRURFLG,Overrun/Underrun" "0,1"
|
|
bitfld.long 0x14 10. "AEFLG,Acknowledge failure" "0,1"
|
|
bitfld.long 0x14 9. "ALFLG,Arbitration lost (master" "0,1"
|
|
bitfld.long 0x14 8. "BERRFLG,Bus error" "0,1"
|
|
rbitfld.long 0x14 7. "TXBEFLG,Data register empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 6. "RXBNEFLG,Data register not empty" "0,1"
|
|
rbitfld.long 0x14 4. "STOPFLG,Stop detection (slave" "0,1"
|
|
rbitfld.long 0x14 3. "ADDR10FLG,10-bit header sent (Master" "0,1"
|
|
rbitfld.long 0x14 2. "BTCFLG,Byte transfer finished" "0,1"
|
|
rbitfld.long 0x14 1. "ADDRFLG,Address sent (master mode)/matched" "0,1"
|
|
rbitfld.long 0x14 0. "STARTFLG,Start bit (Master mode)" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "STS2,Status register 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "PECVALUE,acket error checking"
|
|
bitfld.long 0x0 7. "DUALADDRFLG,Dual flag (Slave mode)" "0,1"
|
|
bitfld.long 0x0 6. "SMMHADDR,SMBus host header (Slave" "0,1"
|
|
bitfld.long 0x0 5. "SMBDADDRFLG,SMBus device default address (Slave" "0,1"
|
|
bitfld.long 0x0 4. "GENCALLFLG,General call address (Slave" "0,1"
|
|
bitfld.long 0x0 2. "TRFLG,Transmitter/receiver" "0,1"
|
|
bitfld.long 0x0 1. "BUSBSYFLG,Bus busy" "0,1"
|
|
bitfld.long 0x0 0. "MSFLG,Master/slave" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "CLKCTRL,Clock control register"
|
|
bitfld.long 0x0 15. "SPEEDCFG,I2C master mode selection" "0,1"
|
|
bitfld.long 0x0 14. "FDUTYCFG,Fast mode duty cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--11. 1. "CLKS,Clock control register in Fast/Standard"
|
|
line.long 0x4 "RISETMAX,RISETMAX register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "RISETMAX,Maximum rise time in Fast/Standard mode"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SWITCH,I2C Switching register"
|
|
bitfld.long 0x0 0. "SWITCH,I2C Switching" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "I2C3 (Internal Integrated Circuit Interface)"
|
|
base ad:0x0
|
|
tree "SCI2C1"
|
|
base ad:0x40005400
|
|
group.long 0x0++0x43
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 10. "DSMA,DSMA" "0,1"
|
|
bitfld.long 0x0 9. "RFFIE,RFFIE" "0,1"
|
|
bitfld.long 0x0 8. "TFEIC,TFEIC" "0,1"
|
|
bitfld.long 0x0 7. "DSA,DSA" "0,1"
|
|
bitfld.long 0x0 6. "SLADIS,SLADIS" "0,1"
|
|
bitfld.long 0x0 5. "RSTAEN,RSTAEN" "0,1"
|
|
bitfld.long 0x0 3. "SAM,SAM" "0,1"
|
|
bitfld.long 0x0 1.--2. "SPD,SPD" "0,1,2,3"
|
|
bitfld.long 0x0 0. "MST,MST" "0,1"
|
|
line.long 0x4 "TARADDR,Target address register"
|
|
bitfld.long 0x4 12. "MAM,MAM" "0,1"
|
|
bitfld.long 0x4 11. "GCEN,GCEN" "0,1"
|
|
bitfld.long 0x4 10. "STA,STA" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0x8 "SLAADDR,Slave address register"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0xC "HSMC,High speed master code register"
|
|
bitfld.long 0xC 0.--2. "HSMC,HSMC" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "DATA,Data register"
|
|
bitfld.long 0x10 9. "STOP,STOP" "0,1"
|
|
bitfld.long 0x10 8. "CMD,CMD" "0,1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,8-bit data register"
|
|
line.long 0x14 "SSCHC,Standard speed clock high counter register"
|
|
hexmask.long.word 0x14 0.--15. 1. "CNT,CNT"
|
|
line.long 0x18 "SSCLC,Standard speed clock low counter register"
|
|
hexmask.long.word 0x18 0.--15. 1. "CNT,CNT"
|
|
line.long 0x1C "FSCHC,Fast speed clock high counter register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CNT,CNT"
|
|
line.long 0x20 "FSCLC,Fast speed clock low counter register"
|
|
hexmask.long.word 0x20 0.--15. 1. "CNT,CNT"
|
|
line.long 0x24 "HSCHC,High speed clock high counter"
|
|
hexmask.long.word 0x24 0.--15. 1. "CNT,CNT"
|
|
line.long 0x28 "HSCLC,High speed clock low counter register"
|
|
hexmask.long.word 0x28 0.--15. 1. "CNT,CNT"
|
|
line.long 0x2C "INTSTS,Interrupt status register"
|
|
bitfld.long 0x2C 13. "MOHIF,MOHIF" "0,1"
|
|
bitfld.long 0x2C 12. "RSTADIF,RSTADIF" "0,1"
|
|
bitfld.long 0x2C 11. "GCIF,GCIF" "0,1"
|
|
bitfld.long 0x2C 10. "STADIF,STADIF" "0,1"
|
|
bitfld.long 0x2C 9. "STPDIF,STPDIF" "0,1"
|
|
bitfld.long 0x2C 8. "ACTIF,ACTIF" "0,1"
|
|
bitfld.long 0x2C 7. "RDIF,RDIF" "0,1"
|
|
bitfld.long 0x2C 6. "TAIF,TAIF" "0,1"
|
|
bitfld.long 0x2C 5. "RRIF,RRIF" "0,1"
|
|
bitfld.long 0x2C 4. "TFEIF,TFEIF" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 3. "TFOIF,TFOIF" "0,1"
|
|
bitfld.long 0x2C 2. "RFFIF,RFFIF" "0,1"
|
|
bitfld.long 0x2C 1. "RFOIF,RFOIF" "0,1"
|
|
bitfld.long 0x2C 0. "RFUIF,RFUIF" "0,1"
|
|
line.long 0x30 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x30 13. "MOHIE,MOHIE" "0,1"
|
|
bitfld.long 0x30 12. "RSTADIE,RSTADIE" "0,1"
|
|
bitfld.long 0x30 11. "GCIE,GCIE" "0,1"
|
|
bitfld.long 0x30 10. "STADIE,STADIE" "0,1"
|
|
bitfld.long 0x30 9. "STPDIE,STPDIE" "0,1"
|
|
bitfld.long 0x30 8. "ACTIE,ACTIE" "0,1"
|
|
bitfld.long 0x30 7. "RDIE,RDIE" "0,1"
|
|
bitfld.long 0x30 6. "TAIE,TAIE" "0,1"
|
|
bitfld.long 0x30 5. "RRIE,RRIE" "0,1"
|
|
bitfld.long 0x30 4. "TFEIE,TFEIE" "0,1"
|
|
newline
|
|
bitfld.long 0x30 3. "TFOIE,TFOIE" "0,1"
|
|
bitfld.long 0x30 2. "RFFIE,RFFIE" "0,1"
|
|
bitfld.long 0x30 1. "RFOIE,RFOIE" "0,1"
|
|
bitfld.long 0x30 0. "RFUIE,RFUIE" "0,1"
|
|
line.long 0x34 "RIS,Raw interrupt status register"
|
|
bitfld.long 0x34 12. "RSTADIF,RSTADIF" "0,1"
|
|
bitfld.long 0x34 11. "GCIF,GCIF" "0,1"
|
|
bitfld.long 0x34 10. "STADIF,STADIF" "0,1"
|
|
bitfld.long 0x34 9. "STPDIF,STPDIF" "0,1"
|
|
bitfld.long 0x34 8. "ACTIF,ACTIF" "0,1"
|
|
bitfld.long 0x34 7. "RDIF,RDIF" "0,1"
|
|
bitfld.long 0x34 6. "TAIF,TAIF" "0,1"
|
|
bitfld.long 0x34 5. "RRIF,RRIF" "0,1"
|
|
bitfld.long 0x34 4. "TFEIF,TFEIF" "0,1"
|
|
bitfld.long 0x34 3. "TFOIF,TFOIF" "0,1"
|
|
newline
|
|
bitfld.long 0x34 2. "RFFIF,RFFIF" "0,1"
|
|
bitfld.long 0x34 1. "RFOIF,RFOIF" "0,1"
|
|
bitfld.long 0x34 0. "RFUIF,RFUIF" "0,1"
|
|
line.long 0x38 "RFT,Reception FIFO threshold register"
|
|
hexmask.long.byte 0x38 1.--7. 1. "ADD2,Interface address"
|
|
bitfld.long 0x38 0. "DUALEN,Dual addressing mode" "0,1"
|
|
line.long 0x3C "TFT,Transmission FIFO threshold register"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "RFT,RFT"
|
|
line.long 0x40 "INTCLR,Interruption clear register"
|
|
hexmask.long.byte 0x40 0.--7. 1. "TFT,TFT"
|
|
rgroup.long 0x44++0x17
|
|
line.long 0x0 "RFUIC,Reception FIFO underflow interruption clear register"
|
|
bitfld.long 0x0 0. "INTCLR,INTCLR" "0,1"
|
|
line.long 0x4 "RFOIC,Reception FIFO overflow interruption clear register"
|
|
bitfld.long 0x4 0. "RFUIC,RFUIC" "0,1"
|
|
line.long 0x8 "TFOIC,Transmission FIFO overflow interruption clear register"
|
|
bitfld.long 0x8 0. "RFOIC,RFOIC" "0,1"
|
|
line.long 0xC "RRIC,Reception request interruption clear register"
|
|
bitfld.long 0xC 0. "TFOIC,TFOIC" "0,1"
|
|
line.long 0x10 "TAIC,Transmission abort interruption clear register"
|
|
bitfld.long 0x10 0. "RRIC,RRIC" "0,1"
|
|
line.long 0x14 "RDIC,Receive done interruption clear register"
|
|
bitfld.long 0x14 0. "RDIC,RDIC" "0,1"
|
|
group.long 0x5C++0x4B
|
|
line.long 0x0 "AIC,Activity interruption clear register"
|
|
bitfld.long 0x0 0. "AIC,AIC" "0,1"
|
|
line.long 0x4 "STPDIC,Stop detection interruption clear register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "STPDIC,STPDIC"
|
|
line.long 0x8 "STADIC,Start detection interruption clear register"
|
|
bitfld.long 0x8 0. "STADIC,STADIC" "0,1"
|
|
line.long 0xC "GCIC,General call interruption clear register"
|
|
hexmask.long.byte 0xC 0.--5. 1. "GCIC,GCIC"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
bitfld.long 0x10 2. "TCB,TCB" "0,1"
|
|
bitfld.long 0x10 1. "ABR,ABR" "0,1"
|
|
bitfld.long 0x10 0. "I2CEN,I2CEN" "0,1"
|
|
line.long 0x14 "STS1,Status register 1"
|
|
bitfld.long 0x14 6. "SAF,SAF" "0,1"
|
|
bitfld.long 0x14 5. "MAF,MAF" "0,1"
|
|
bitfld.long 0x14 4. "RFFF,RFFF" "0,1"
|
|
bitfld.long 0x14 3. "RFNEF,RFNEF" "0,1"
|
|
bitfld.long 0x14 2. "TFEF,TFEF" "0,1"
|
|
bitfld.long 0x14 1. "TFNFF,TFNFF" "0,1"
|
|
bitfld.long 0x14 0. "ACTF,ACTF" "0,1"
|
|
line.long 0x18 "TFL,Transmission FIFO level"
|
|
bitfld.long 0x18 0. "TFL,TFL" "0,1"
|
|
line.long 0x1C "RFL,Reception FIFO level"
|
|
hexmask.long.byte 0x1C 0.--5. 1. "RFL,RFL"
|
|
line.long 0x20 "SDAHOLD,SDA hold time length register"
|
|
hexmask.long.byte 0x20 16.--23. 1. "RXHOLD,RXHOLD"
|
|
hexmask.long.word 0x20 0.--15. 1. "TXHOLD,TXHOLD"
|
|
line.long 0x24 "TAS,Transmission abort source register"
|
|
bitfld.long 0x24 15. "FLUCNT,FLUCNT" "0,1"
|
|
bitfld.long 0x24 14. "USRARB,USRARB" "0,1"
|
|
bitfld.long 0x24 13. "SRI,SRI" "0,1"
|
|
bitfld.long 0x24 12. "SAL,SAL" "0,1"
|
|
bitfld.long 0x24 11. "LFTF,LFTF" "0,1"
|
|
bitfld.long 0x24 10. "ARBLOST,ARBLOST" "0,1"
|
|
bitfld.long 0x24 9. "MSTDIS,MSTDIS" "0,1"
|
|
bitfld.long 0x24 8. "RNR10B,RNR10B" "0,1"
|
|
bitfld.long 0x24 7. "SNR,SNR" "0,1"
|
|
bitfld.long 0x24 6. "HSAD,HSAD" "0,1"
|
|
newline
|
|
bitfld.long 0x24 5. "GCR,GCR" "0,1"
|
|
bitfld.long 0x24 4. "GCNA,GCNA" "0,1"
|
|
bitfld.long 0x24 3. "TDNA,TDNA" "0,1"
|
|
bitfld.long 0x24 2. "AD10NA2,AD10NA2" "0,1"
|
|
bitfld.long 0x24 1. "AD10NA1,AD10NA1" "0,1"
|
|
bitfld.long 0x24 0. "AD7NA,AD7NA" "0,1"
|
|
line.long 0x28 "SDNO,Slave data NACK only register"
|
|
bitfld.long 0x28 0. "NACK,NACK" "0,1"
|
|
line.long 0x2C "DMACTRL,DMA control register"
|
|
bitfld.long 0x2C 1. "TXEN,TXEN" "0,1"
|
|
bitfld.long 0x2C 0. "RXEN,RXEN" "0,1"
|
|
line.long 0x30 "DTDL,DMA transmission data level register"
|
|
bitfld.long 0x30 0. "DTDL,DTDL" "0,1"
|
|
line.long 0x34 "DRDL,DMA teception data level register"
|
|
hexmask.long.byte 0x34 0.--5. 1. "DRDL,DRDL"
|
|
line.long 0x38 "SDADLY,SDA delay register"
|
|
bitfld.long 0x38 0. "SDADLY,SDADLY" "0,1"
|
|
line.long 0x3C "GCA,Genernal call ACK register"
|
|
hexmask.long.byte 0x3C 0.--5. 1. "GCA,GCA"
|
|
line.long 0x40 "STS2,Status register2"
|
|
bitfld.long 0x40 2. "SRDL,SRDL" "0,1"
|
|
bitfld.long 0x40 1. "SDWB,SDWB" "0,1"
|
|
bitfld.long 0x40 0. "I2CEN,I2CEN" "0,1"
|
|
line.long 0x44 "LSSSL,Low speed spike suppression limit"
|
|
hexmask.long.byte 0x44 0.--5. 1. "LSSSL,LSSSL"
|
|
line.long 0x48 "HSSSL,High speed spike suppression limit"
|
|
bitfld.long 0x48 0. "HSSSL,HSSSL" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SW,Switch register"
|
|
bitfld.long 0x0 0. "SW,SW" "0,1"
|
|
tree.end
|
|
tree "SCI2C2"
|
|
base ad:0x40005800
|
|
group.long 0x0++0x43
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 10. "DSMA,DSMA" "0,1"
|
|
bitfld.long 0x0 9. "RFFIE,RFFIE" "0,1"
|
|
bitfld.long 0x0 8. "TFEIC,TFEIC" "0,1"
|
|
bitfld.long 0x0 7. "DSA,DSA" "0,1"
|
|
bitfld.long 0x0 6. "SLADIS,SLADIS" "0,1"
|
|
bitfld.long 0x0 5. "RSTAEN,RSTAEN" "0,1"
|
|
bitfld.long 0x0 3. "SAM,SAM" "0,1"
|
|
bitfld.long 0x0 1.--2. "SPD,SPD" "0,1,2,3"
|
|
bitfld.long 0x0 0. "MST,MST" "0,1"
|
|
line.long 0x4 "TARADDR,Target address register"
|
|
bitfld.long 0x4 12. "MAM,MAM" "0,1"
|
|
bitfld.long 0x4 11. "GCEN,GCEN" "0,1"
|
|
bitfld.long 0x4 10. "STA,STA" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0x8 "SLAADDR,Slave address register"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR,ADDR"
|
|
line.long 0xC "HSMC,High speed master code register"
|
|
bitfld.long 0xC 0.--2. "HSMC,HSMC" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "DATA,Data register"
|
|
bitfld.long 0x10 9. "STOP,STOP" "0,1"
|
|
bitfld.long 0x10 8. "CMD,CMD" "0,1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DATA,8-bit data register"
|
|
line.long 0x14 "SSCHC,Standard speed clock high counter register"
|
|
hexmask.long.word 0x14 0.--15. 1. "CNT,CNT"
|
|
line.long 0x18 "SSCLC,Standard speed clock low counter register"
|
|
hexmask.long.word 0x18 0.--15. 1. "CNT,CNT"
|
|
line.long 0x1C "FSCHC,Fast speed clock high counter register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CNT,CNT"
|
|
line.long 0x20 "FSCLC,Fast speed clock low counter register"
|
|
hexmask.long.word 0x20 0.--15. 1. "CNT,CNT"
|
|
line.long 0x24 "HSCHC,High speed clock high counter"
|
|
hexmask.long.word 0x24 0.--15. 1. "CNT,CNT"
|
|
line.long 0x28 "HSCLC,High speed clock low counter register"
|
|
hexmask.long.word 0x28 0.--15. 1. "CNT,CNT"
|
|
line.long 0x2C "INTSTS,Interrupt status register"
|
|
bitfld.long 0x2C 13. "MOHIF,MOHIF" "0,1"
|
|
bitfld.long 0x2C 12. "RSTADIF,RSTADIF" "0,1"
|
|
bitfld.long 0x2C 11. "GCIF,GCIF" "0,1"
|
|
bitfld.long 0x2C 10. "STADIF,STADIF" "0,1"
|
|
bitfld.long 0x2C 9. "STPDIF,STPDIF" "0,1"
|
|
bitfld.long 0x2C 8. "ACTIF,ACTIF" "0,1"
|
|
bitfld.long 0x2C 7. "RDIF,RDIF" "0,1"
|
|
bitfld.long 0x2C 6. "TAIF,TAIF" "0,1"
|
|
bitfld.long 0x2C 5. "RRIF,RRIF" "0,1"
|
|
bitfld.long 0x2C 4. "TFEIF,TFEIF" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 3. "TFOIF,TFOIF" "0,1"
|
|
bitfld.long 0x2C 2. "RFFIF,RFFIF" "0,1"
|
|
bitfld.long 0x2C 1. "RFOIF,RFOIF" "0,1"
|
|
bitfld.long 0x2C 0. "RFUIF,RFUIF" "0,1"
|
|
line.long 0x30 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x30 13. "MOHIE,MOHIE" "0,1"
|
|
bitfld.long 0x30 12. "RSTADIE,RSTADIE" "0,1"
|
|
bitfld.long 0x30 11. "GCIE,GCIE" "0,1"
|
|
bitfld.long 0x30 10. "STADIE,STADIE" "0,1"
|
|
bitfld.long 0x30 9. "STPDIE,STPDIE" "0,1"
|
|
bitfld.long 0x30 8. "ACTIE,ACTIE" "0,1"
|
|
bitfld.long 0x30 7. "RDIE,RDIE" "0,1"
|
|
bitfld.long 0x30 6. "TAIE,TAIE" "0,1"
|
|
bitfld.long 0x30 5. "RRIE,RRIE" "0,1"
|
|
bitfld.long 0x30 4. "TFEIE,TFEIE" "0,1"
|
|
newline
|
|
bitfld.long 0x30 3. "TFOIE,TFOIE" "0,1"
|
|
bitfld.long 0x30 2. "RFFIE,RFFIE" "0,1"
|
|
bitfld.long 0x30 1. "RFOIE,RFOIE" "0,1"
|
|
bitfld.long 0x30 0. "RFUIE,RFUIE" "0,1"
|
|
line.long 0x34 "RIS,Raw interrupt status register"
|
|
bitfld.long 0x34 12. "RSTADIF,RSTADIF" "0,1"
|
|
bitfld.long 0x34 11. "GCIF,GCIF" "0,1"
|
|
bitfld.long 0x34 10. "STADIF,STADIF" "0,1"
|
|
bitfld.long 0x34 9. "STPDIF,STPDIF" "0,1"
|
|
bitfld.long 0x34 8. "ACTIF,ACTIF" "0,1"
|
|
bitfld.long 0x34 7. "RDIF,RDIF" "0,1"
|
|
bitfld.long 0x34 6. "TAIF,TAIF" "0,1"
|
|
bitfld.long 0x34 5. "RRIF,RRIF" "0,1"
|
|
bitfld.long 0x34 4. "TFEIF,TFEIF" "0,1"
|
|
bitfld.long 0x34 3. "TFOIF,TFOIF" "0,1"
|
|
newline
|
|
bitfld.long 0x34 2. "RFFIF,RFFIF" "0,1"
|
|
bitfld.long 0x34 1. "RFOIF,RFOIF" "0,1"
|
|
bitfld.long 0x34 0. "RFUIF,RFUIF" "0,1"
|
|
line.long 0x38 "RFT,Reception FIFO threshold register"
|
|
hexmask.long.byte 0x38 1.--7. 1. "ADD2,Interface address"
|
|
bitfld.long 0x38 0. "DUALEN,Dual addressing mode" "0,1"
|
|
line.long 0x3C "TFT,Transmission FIFO threshold register"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "RFT,RFT"
|
|
line.long 0x40 "INTCLR,Interruption clear register"
|
|
hexmask.long.byte 0x40 0.--7. 1. "TFT,TFT"
|
|
rgroup.long 0x44++0x17
|
|
line.long 0x0 "RFUIC,Reception FIFO underflow interruption clear register"
|
|
bitfld.long 0x0 0. "INTCLR,INTCLR" "0,1"
|
|
line.long 0x4 "RFOIC,Reception FIFO overflow interruption clear register"
|
|
bitfld.long 0x4 0. "RFUIC,RFUIC" "0,1"
|
|
line.long 0x8 "TFOIC,Transmission FIFO overflow interruption clear register"
|
|
bitfld.long 0x8 0. "RFOIC,RFOIC" "0,1"
|
|
line.long 0xC "RRIC,Reception request interruption clear register"
|
|
bitfld.long 0xC 0. "TFOIC,TFOIC" "0,1"
|
|
line.long 0x10 "TAIC,Transmission abort interruption clear register"
|
|
bitfld.long 0x10 0. "RRIC,RRIC" "0,1"
|
|
line.long 0x14 "RDIC,Receive done interruption clear register"
|
|
bitfld.long 0x14 0. "RDIC,RDIC" "0,1"
|
|
group.long 0x5C++0x4B
|
|
line.long 0x0 "AIC,Activity interruption clear register"
|
|
bitfld.long 0x0 0. "AIC,AIC" "0,1"
|
|
line.long 0x4 "STPDIC,Stop detection interruption clear register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "STPDIC,STPDIC"
|
|
line.long 0x8 "STADIC,Start detection interruption clear register"
|
|
bitfld.long 0x8 0. "STADIC,STADIC" "0,1"
|
|
line.long 0xC "GCIC,General call interruption clear register"
|
|
hexmask.long.byte 0xC 0.--5. 1. "GCIC,GCIC"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
bitfld.long 0x10 2. "TCB,TCB" "0,1"
|
|
bitfld.long 0x10 1. "ABR,ABR" "0,1"
|
|
bitfld.long 0x10 0. "I2CEN,I2CEN" "0,1"
|
|
line.long 0x14 "STS1,Status register 1"
|
|
bitfld.long 0x14 6. "SAF,SAF" "0,1"
|
|
bitfld.long 0x14 5. "MAF,MAF" "0,1"
|
|
bitfld.long 0x14 4. "RFFF,RFFF" "0,1"
|
|
bitfld.long 0x14 3. "RFNEF,RFNEF" "0,1"
|
|
bitfld.long 0x14 2. "TFEF,TFEF" "0,1"
|
|
bitfld.long 0x14 1. "TFNFF,TFNFF" "0,1"
|
|
bitfld.long 0x14 0. "ACTF,ACTF" "0,1"
|
|
line.long 0x18 "TFL,Transmission FIFO level"
|
|
bitfld.long 0x18 0. "TFL,TFL" "0,1"
|
|
line.long 0x1C "RFL,Reception FIFO level"
|
|
hexmask.long.byte 0x1C 0.--5. 1. "RFL,RFL"
|
|
line.long 0x20 "SDAHOLD,SDA hold time length register"
|
|
hexmask.long.byte 0x20 16.--23. 1. "RXHOLD,RXHOLD"
|
|
hexmask.long.word 0x20 0.--15. 1. "TXHOLD,TXHOLD"
|
|
line.long 0x24 "TAS,Transmission abort source register"
|
|
bitfld.long 0x24 15. "FLUCNT,FLUCNT" "0,1"
|
|
bitfld.long 0x24 14. "USRARB,USRARB" "0,1"
|
|
bitfld.long 0x24 13. "SRI,SRI" "0,1"
|
|
bitfld.long 0x24 12. "SAL,SAL" "0,1"
|
|
bitfld.long 0x24 11. "LFTF,LFTF" "0,1"
|
|
bitfld.long 0x24 10. "ARBLOST,ARBLOST" "0,1"
|
|
bitfld.long 0x24 9. "MSTDIS,MSTDIS" "0,1"
|
|
bitfld.long 0x24 8. "RNR10B,RNR10B" "0,1"
|
|
bitfld.long 0x24 7. "SNR,SNR" "0,1"
|
|
bitfld.long 0x24 6. "HSAD,HSAD" "0,1"
|
|
newline
|
|
bitfld.long 0x24 5. "GCR,GCR" "0,1"
|
|
bitfld.long 0x24 4. "GCNA,GCNA" "0,1"
|
|
bitfld.long 0x24 3. "TDNA,TDNA" "0,1"
|
|
bitfld.long 0x24 2. "AD10NA2,AD10NA2" "0,1"
|
|
bitfld.long 0x24 1. "AD10NA1,AD10NA1" "0,1"
|
|
bitfld.long 0x24 0. "AD7NA,AD7NA" "0,1"
|
|
line.long 0x28 "SDNO,Slave data NACK only register"
|
|
bitfld.long 0x28 0. "NACK,NACK" "0,1"
|
|
line.long 0x2C "DMACTRL,DMA control register"
|
|
bitfld.long 0x2C 1. "TXEN,TXEN" "0,1"
|
|
bitfld.long 0x2C 0. "RXEN,RXEN" "0,1"
|
|
line.long 0x30 "DTDL,DMA transmission data level register"
|
|
bitfld.long 0x30 0. "DTDL,DTDL" "0,1"
|
|
line.long 0x34 "DRDL,DMA teception data level register"
|
|
hexmask.long.byte 0x34 0.--5. 1. "DRDL,DRDL"
|
|
line.long 0x38 "SDADLY,SDA delay register"
|
|
bitfld.long 0x38 0. "SDADLY,SDADLY" "0,1"
|
|
line.long 0x3C "GCA,Genernal call ACK register"
|
|
hexmask.long.byte 0x3C 0.--5. 1. "GCA,GCA"
|
|
line.long 0x40 "STS2,Status register2"
|
|
bitfld.long 0x40 2. "SRDL,SRDL" "0,1"
|
|
bitfld.long 0x40 1. "SDWB,SDWB" "0,1"
|
|
bitfld.long 0x40 0. "I2CEN,I2CEN" "0,1"
|
|
line.long 0x44 "LSSSL,Low speed spike suppression limit"
|
|
hexmask.long.byte 0x44 0.--5. 1. "LSSSL,LSSSL"
|
|
line.long 0x48 "HSSSL,High speed spike suppression limit"
|
|
bitfld.long 0x48 0. "HSSSL,HSSSL" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SW,Switch register"
|
|
bitfld.long 0x0 0. "SW,SW" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "IWDT (Independent Watchdog Timer)"
|
|
base ad:0x40003000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "KEY,Key register (IWDT_KEY)"
|
|
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "PSC,Frequency Divider register (IWDT_PSC)"
|
|
bitfld.long 0x0 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CNTRLD,Reload values register (IWDT_CNTRLD)"
|
|
hexmask.long.word 0x4 0.--11. 1. "CNTRLD,Watchdog counter reload"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STS,Status register (IWDT_STS)"
|
|
bitfld.long 0x0 1. "CNTUFLG,Watchdog counter reload value" "0,1"
|
|
bitfld.long 0x0 0. "PSCUFLG,Watchdog prescaler value" "0,1"
|
|
tree.end
|
|
tree "NVIC (Nested Vector Interrupt Controller)"
|
|
base ad:0xE000E000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ICTR,Interrupt Controller Type"
|
|
hexmask.long.byte 0x0 0.--3. 1. "INTLINESNUM,Total number of interrupt lines in"
|
|
wgroup.long 0xF00++0x3
|
|
line.long 0x0 "STIR,Software Triggered Interrupt"
|
|
hexmask.long.word 0x0 0.--8. 1. "INTID,interrupt to be triggered"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x300++0x7
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x400++0x3B
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base ad:0x40007000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL,Power control register"
|
|
bitfld.long 0x0 8. "BPWEN,Disable Bakr Domain write" "0,1"
|
|
bitfld.long 0x0 5.--7. "PLSEL,PVD Level Selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4. "PVDEN,Power Voltage Detector" "0,1"
|
|
bitfld.long 0x0 3. "SBFLGCLR,Clear STANDBY Flag" "0,1"
|
|
bitfld.long 0x0 2. "WUFLGCLR,Clear Wake-up Flag" "0,1"
|
|
bitfld.long 0x0 1. "PDDSCFG,Power Down Deep Sleep" "0,1"
|
|
bitfld.long 0x0 0. "LPDSCFG,Low Power Deep Sleep" "0,1"
|
|
line.long 0x4 "CSTS,Power control/status register (PMU_CSTS)"
|
|
bitfld.long 0x4 8. "WKUPCFG,Enable WKUP pin" "0,1"
|
|
rbitfld.long 0x4 2. "PVDOFLG,PVD Output" "0,1"
|
|
rbitfld.long 0x4 1. "SBFLG,STANDBY Flag" "0,1"
|
|
rbitfld.long 0x4 0. "WUEFLG,Wake-Up Flag" "0,1"
|
|
tree.end
|
|
tree "QSPI (Quad Serial Peripheral Interface)"
|
|
base ad:0xA0000000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 22.--23. "FRF,FRF" "0,1,2,3"
|
|
bitfld.long 0x0 14. "SSTEN,SSTEN" "0,1"
|
|
bitfld.long 0x0 10.--11. "TXMODE,TXMODE" "0,1,2,3"
|
|
bitfld.long 0x0 9. "CPOL,CPOL" "0,1"
|
|
bitfld.long 0x0 8. "CPHA,CPHA" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DFS,DFS"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDF,NDF"
|
|
line.long 0x8 "SSIEN,QSPI Enable register"
|
|
bitfld.long 0x8 0. "EN,EN" "0,1"
|
|
group.long 0x10++0x1F
|
|
line.long 0x0 "SLAEN,QSPI Slave enable register"
|
|
bitfld.long 0x0 0. "SLAEN,SLAEN" "0,1"
|
|
line.long 0x4 "BR,Baudrate register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CLKDIV,CLKDIV"
|
|
line.long 0x8 "TFTL,Transmission FIFO threshhold level register"
|
|
bitfld.long 0x8 16.--18. "TFTH,TFTH" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "TFT,TFT" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "RFTL,Reception FIFO threshhold level register"
|
|
bitfld.long 0xC 0.--2. "RFT,RFT" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "TFL,Transmission FIFO level register"
|
|
bitfld.long 0x10 0.--2. "TFL,TFL" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "RFL,Reception FIFO level register"
|
|
bitfld.long 0x14 0.--2. "RFL,RFL" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "STS,Status register"
|
|
bitfld.long 0x18 6. "DCEF,DCEF" "0,1"
|
|
bitfld.long 0x18 4. "RFFF,RFFF" "0,1"
|
|
bitfld.long 0x18 3. "RFNEF,RFNEF" "0,1"
|
|
bitfld.long 0x18 2. "TFEF,TFEF" "0,1"
|
|
bitfld.long 0x18 1. "TFNF,TFNF" "0,1"
|
|
bitfld.long 0x18 0. "BUSYF,BUSYF" "0,1"
|
|
line.long 0x1C "INTEN,Interrupt enable register"
|
|
bitfld.long 0x1C 5. "MSTIE,MSTIE" "0,1"
|
|
bitfld.long 0x1C 4. "RFFIE,RFFIE" "0,1"
|
|
bitfld.long 0x1C 3. "RFOIE,RFOIE" "0,1"
|
|
bitfld.long 0x1C 2. "RFUIE,RFUIE" "0,1"
|
|
bitfld.long 0x1C 1. "TFOIE,TFOIE" "0,1"
|
|
bitfld.long 0x1C 0. "TFEIE,TFEIE" "0,1"
|
|
rgroup.long 0x30++0x1B
|
|
line.long 0x0 "ISTS,Interrupt status register"
|
|
bitfld.long 0x0 5. "MSTIF,MSTIF" "0,1"
|
|
bitfld.long 0x0 4. "RFFIF,RFFIF" "0,1"
|
|
bitfld.long 0x0 3. "RFOIF,RFOIF" "0,1"
|
|
bitfld.long 0x0 2. "RFUIF,RFUIF" "0,1"
|
|
bitfld.long 0x0 1. "TFOIF,TFOIF" "0,1"
|
|
bitfld.long 0x0 0. "TFEIF,TFEIF" "0,1"
|
|
line.long 0x4 "RIS,Raw interrupt register"
|
|
bitfld.long 0x4 5. "MSTIR,MSTIR" "0,1"
|
|
bitfld.long 0x4 4. "RXFIR,RXFIR" "0,1"
|
|
bitfld.long 0x4 3. "RXOIR,RXOIR" "0,1"
|
|
bitfld.long 0x4 2. "RFUIF,RFUIF" "0,1"
|
|
bitfld.long 0x4 1. "TFOIF,TFOIF" "0,1"
|
|
bitfld.long 0x4 0. "TFEIF,TFEIF" "0,1"
|
|
line.long 0x8 "TFOIC,Transmission FIFO overflow interrupt clear register"
|
|
bitfld.long 0x8 0. "TFOIC,TFOIC" "0,1"
|
|
line.long 0xC "RFOIC,Reception FIFO overflow interrupt clear register"
|
|
bitfld.long 0xC 0. "RFOIC,RFOIC" "0,1"
|
|
line.long 0x10 "RFUIC,Reception FIFO underflow interrupt clear register"
|
|
bitfld.long 0x10 0. "RFUIC,RFUIC" "0,1"
|
|
line.long 0x14 "MIC,Master interrupt clear register"
|
|
bitfld.long 0x14 0. "MIC,MIC" "0,1"
|
|
line.long 0x18 "ICF,Interrupt clear register"
|
|
bitfld.long 0x18 0. "ICF,ICF" "0,1"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "DATA,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data register"
|
|
group.long 0xF0++0x7
|
|
line.long 0x0 "RSD,Reception sample register"
|
|
bitfld.long 0x0 16. "RSE,RSE" "0,1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RSD,RSD"
|
|
line.long 0x4 "CTRL3,Control register 3"
|
|
bitfld.long 0x4 30. "CSEN,CSEN" "0,1"
|
|
hexmask.long.byte 0x4 11.--15. 1. "WAITCYC,WAITCYC"
|
|
bitfld.long 0x4 8.--9. "INSLEN,INSLEN" "0,1,2,3"
|
|
hexmask.long.byte 0x4 2.--5. 1. "ADDRLEN,ADDRLEN"
|
|
bitfld.long 0x4 0.--1. "IAT,IAT" "0,1,2,3"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "IOSW,IO switch register"
|
|
bitfld.long 0x0 0. "IOSW,I/O switch" "0,1"
|
|
tree.end
|
|
tree "RCM (Reset and Clock)"
|
|
base ad:0x40021000
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CTRL,Clock control register (RCM_CTRL)"
|
|
rbitfld.long 0x0 25. "PLLRDYFLG,PLL clock ready flag" "0,1"
|
|
bitfld.long 0x0 24. "PLLEN,PLL enable" "0,1"
|
|
bitfld.long 0x0 19. "CSSEN,Clock Security System" "0,1"
|
|
bitfld.long 0x0 18. "HSEBCFG,External High Speed clock" "0,1"
|
|
rbitfld.long 0x0 17. "HSERDYFLG,External High Speed clock ready" "0,1"
|
|
bitfld.long 0x0 16. "HSEEN,External High Speed clock" "0,1"
|
|
hexmask.long.byte 0x0 8.--15. 1. "HSICAL,Internal High Speed clock"
|
|
hexmask.long.byte 0x0 3.--7. 1. "HSITRIM,Internal High Speed clock"
|
|
rbitfld.long 0x0 1. "HSIRDYFLG,Internal High Speed clock ready" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "HSIEN,Internal High Speed clock" "0,1"
|
|
line.long 0x4 "CFG,Clock configuration register (RCM_CFGR)"
|
|
bitfld.long 0x4 28.--29. "SDRAMPSC,SDRAM Clock Prescaler configure" "0,1,2,3"
|
|
bitfld.long 0x4 27. "FPUPSC,FPU Clock Prescaler Factor Configure" "0,1"
|
|
bitfld.long 0x4 24.--26. "MCOSEL,Microcontroller clock" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 22.--23. "USBDPSC,USB OTG FS prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x4 18.--21. 1. "PLLMULCFG,PLL Multiplication Factor"
|
|
bitfld.long 0x4 17. "PLLHSEPSC,HSE divider for PLL entry" "0,1"
|
|
bitfld.long 0x4 16. "PLLSRCSEL,PLL entry clock source" "0,1"
|
|
bitfld.long 0x4 14.--15. "ADCPSC,ADC prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 11.--13. "APB2PSC,APB High speed prescaler" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "APB1PSC,APB Low speed prescaler" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AHBPSC,AHB prescaler"
|
|
rbitfld.long 0x4 2.--3. "SCLKSWSTS,System Clock Switch Status" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "SCLKSW,System clock Switch" "0,1,2,3"
|
|
line.long 0x8 "INT,Clock interrupt control register (RCM_INT)"
|
|
bitfld.long 0x8 23. "CSSCLR,Clock security system interrupt" "0,1"
|
|
bitfld.long 0x8 20. "PLLRDYCLR,PLL Ready Interrupt Clear" "0,1"
|
|
bitfld.long 0x8 19. "HSERDYCLR,HSE Ready Interrupt Clear" "0,1"
|
|
bitfld.long 0x8 18. "HSIRDYCLR,HSI Ready Interrupt Clear" "0,1"
|
|
bitfld.long 0x8 17. "LSERDYCLR,LSE Ready Interrupt Clear" "0,1"
|
|
bitfld.long 0x8 16. "LSIRDYCLR,LSI Ready Interrupt Clear" "0,1"
|
|
bitfld.long 0x8 12. "PLLRDYEN,PLL Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 11. "HSERDYEN,HSE Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 10. "HSIRDYEN,HSI Ready Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "LSERDYEN,LSE Ready Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 8. "LSIRDYEN,LSI Ready Interrupt Enable" "0,1"
|
|
rbitfld.long 0x8 7. "CSSIF,Clock Security System Interrupt" "0,1"
|
|
rbitfld.long 0x8 4. "PLLRDYFLG,PLL Ready Interrupt flag" "0,1"
|
|
rbitfld.long 0x8 3. "HSERDYFLG,HSE Ready Interrupt flag" "0,1"
|
|
rbitfld.long 0x8 2. "HSIRDYFLG,HSI Ready Interrupt flag" "0,1"
|
|
rbitfld.long 0x8 1. "LSERDYFLG,LSE Ready Interrupt flag" "0,1"
|
|
rbitfld.long 0x8 0. "LSIRDYFLG,LSI Ready Interrupt flag" "0,1"
|
|
line.long 0xC "APB2RST,APB2 peripheral reset register (RCM_APB2RST)"
|
|
bitfld.long 0xC 15. "ADC3RST,ADC3 reset" "0,1"
|
|
bitfld.long 0xC 14. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0xC 13. "TMR8RST,TMR8 timer reset" "0,1"
|
|
bitfld.long 0xC 12. "SPI1RST,SPI 1 reset" "0,1"
|
|
bitfld.long 0xC 11. "TMR1RST,TMR1 timer reset" "0,1"
|
|
bitfld.long 0xC 10. "ADC2RST,ADC 2 interface reset" "0,1"
|
|
bitfld.long 0xC 9. "ADC1RST,ADC 1 interface reset" "0,1"
|
|
bitfld.long 0xC 8. "PGRST,IO port G reset" "0,1"
|
|
bitfld.long 0xC 7. "PFRST,IO port F reset" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6. "PERST,IO port E reset" "0,1"
|
|
bitfld.long 0xC 5. "PDRST,IO port D reset" "0,1"
|
|
bitfld.long 0xC 4. "PCRST,IO port C reset" "0,1"
|
|
bitfld.long 0xC 3. "PBRST,IO port B reset" "0,1"
|
|
bitfld.long 0xC 2. "PARST,IO port A reset" "0,1"
|
|
bitfld.long 0xC 0. "AFIORST,Alternate function I/O" "0,1"
|
|
line.long 0x10 "APB1RST,APB1 peripheral reset register (RCM_APB1RST)"
|
|
bitfld.long 0x10 29. "DACRST,DAC interface reset" "0,1"
|
|
bitfld.long 0x10 28. "PMURST,Power interface reset" "0,1"
|
|
bitfld.long 0x10 27. "BAKPRST,Bakr interface reset" "0,1"
|
|
bitfld.long 0x10 26. "CAN2RST,CAN2 reset" "0,1"
|
|
bitfld.long 0x10 25. "CAN1RST,CAN1 reset" "0,1"
|
|
bitfld.long 0x10 23. "USBDRST,USB reset" "0,1"
|
|
bitfld.long 0x10 22. "I2C2RST,I2C2 reset" "0,1"
|
|
bitfld.long 0x10 21. "I2C1RST,I2C1 reset" "0,1"
|
|
bitfld.long 0x10 20. "UART5RST,UART 5 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "UART4RST,UART 4 reset" "0,1"
|
|
bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1"
|
|
bitfld.long 0x10 17. "USART2RST,USART 2 reset" "0,1"
|
|
bitfld.long 0x10 15. "SPI3RST,SPI3 reset" "0,1"
|
|
bitfld.long 0x10 14. "SPI2RST,SPI2 reset" "0,1"
|
|
bitfld.long 0x10 11. "WWDTRST,Window watchdog reset" "0,1"
|
|
bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1"
|
|
bitfld.long 0x10 4. "TMR6RST,Timer 6 reset" "0,1"
|
|
bitfld.long 0x10 3. "TMR5RST,Timer 5 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "TMR4RST,Timer 4 reset" "0,1"
|
|
bitfld.long 0x10 1. "TMR3RST,Timer 3 reset" "0,1"
|
|
bitfld.long 0x10 0. "TMR2RST,Timer 2 reset" "0,1"
|
|
line.long 0x14 "AHBCLKEN,AHB clock enable register (RCM_AHBCLKEN)"
|
|
bitfld.long 0x14 10. "SDIOEN,SDIO clock enable" "0,1"
|
|
bitfld.long 0x14 8. "EMMCEN,EMMC clock enable" "0,1"
|
|
bitfld.long 0x14 6. "CRCEN,CRC clock enable" "0,1"
|
|
bitfld.long 0x14 5. "QSPIEN,QSPI clock enable" "0,1"
|
|
bitfld.long 0x14 4. "FMCEN,FMC clock enable" "0,1"
|
|
bitfld.long 0x14 3. "FPUEN,FPU clock Enable" "0,1"
|
|
bitfld.long 0x14 2. "SRAMEN,SRAM interface clock enable" "0,1"
|
|
bitfld.long 0x14 1. "DMA2EN,DMA2 clock enable" "0,1"
|
|
bitfld.long 0x14 0. "DMA1EN,DMA1 clock enable" "0,1"
|
|
line.long 0x18 "APB2CLKEN,APB2 clock enable register (RCM_APB2CLKEN)"
|
|
bitfld.long 0x18 15. "ADC3EN,ADC3 interface clock" "0,1"
|
|
bitfld.long 0x18 14. "USART1EN,USART1 clock enable" "0,1"
|
|
bitfld.long 0x18 13. "TMR8EN,TMR8 Timer clock enable" "0,1"
|
|
bitfld.long 0x18 12. "SPI1EN,SPI 1 clock enable" "0,1"
|
|
bitfld.long 0x18 11. "TMR1EN,TMR1 Timer clock enable" "0,1"
|
|
bitfld.long 0x18 10. "ADC2EN,ADC 2 interface clock" "0,1"
|
|
bitfld.long 0x18 9. "ADC1EN,ADC 1 interface clock" "0,1"
|
|
bitfld.long 0x18 8. "PGEN,I/O port G clock enable" "0,1"
|
|
bitfld.long 0x18 7. "PFEN,I/O port F clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "PEEN,I/O port E clock enable" "0,1"
|
|
bitfld.long 0x18 5. "PDEN,I/O port D clock enable" "0,1"
|
|
bitfld.long 0x18 4. "PCEN,I/O port C clock enable" "0,1"
|
|
bitfld.long 0x18 3. "PBEN,I/O port B clock enable" "0,1"
|
|
bitfld.long 0x18 2. "PAEN,I/O port A clock enable" "0,1"
|
|
bitfld.long 0x18 0. "AFIOEN,Alternate function I/O clock" "0,1"
|
|
line.long 0x1C "APB1CLKEN,APB1 clock enable register (RCM_APB1CLKEN)"
|
|
bitfld.long 0x1C 29. "DACEN,DAC interface clock enable" "0,1"
|
|
bitfld.long 0x1C 28. "PMUEN,Power interface clock" "0,1"
|
|
bitfld.long 0x1C 27. "BAKPEN,Bakr interface clock enable" "0,1"
|
|
bitfld.long 0x1C 26. "CAN2EN,CAN2 clock enable" "0,1"
|
|
bitfld.long 0x1C 25. "CAN1EN,CAN1 clock enable" "0,1"
|
|
bitfld.long 0x1C 23. "USBDEN,USB clock enable" "0,1"
|
|
bitfld.long 0x1C 22. "I2C2EN,I2C 2 clock enable" "0,1"
|
|
bitfld.long 0x1C 21. "I2C1EN,I2C 1 clock enable" "0,1"
|
|
bitfld.long 0x1C 20. "UART5EN,UART 5 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 19. "UART4EN,UART 4 clock enable" "0,1"
|
|
bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1"
|
|
bitfld.long 0x1C 17. "USART2EN,USART 2 clock enable" "0,1"
|
|
bitfld.long 0x1C 15. "SPI3EN,SPI 3 clock enable" "0,1"
|
|
bitfld.long 0x1C 14. "SPI2EN,SPI 2 clock enable" "0,1"
|
|
bitfld.long 0x1C 11. "WWDTEN,Window watchdog clock" "0,1"
|
|
bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1"
|
|
bitfld.long 0x1C 4. "TMR6EN,Timer 6 clock enable" "0,1"
|
|
bitfld.long 0x1C 3. "TMR5EN,Timer 5 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 2. "TMR4EN,Timer 4 clock enable" "0,1"
|
|
bitfld.long 0x1C 1. "TMR3EN,Timer 3 clock enable" "0,1"
|
|
bitfld.long 0x1C 0. "TMR2EN,Timer 2 clock enable" "0,1"
|
|
line.long 0x20 "BDCTRL,Bakr domain control register (RCM_BDCTRL)"
|
|
bitfld.long 0x20 16. "BDRST,Bakr domain software reset" "0,1"
|
|
bitfld.long 0x20 15. "RTCCLKEN,RTC clock enable" "0,1"
|
|
bitfld.long 0x20 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3"
|
|
bitfld.long 0x20 2. "LSEBCFG,External Low Speed oscillator" "0,1"
|
|
rbitfld.long 0x20 1. "LSERDYFLG,External Low Speed oscillator" "0,1"
|
|
bitfld.long 0x20 0. "LSEEN,External Low Speed oscillator enable" "0,1"
|
|
line.long 0x24 "CSTS,Control/status register (RCM_CSTS)"
|
|
bitfld.long 0x24 31. "LPWRRSTFLG,Low-power reset flag" "0,1"
|
|
bitfld.long 0x24 30. "WWDTRSTFLG,Window watchdog reset flag" "0,1"
|
|
bitfld.long 0x24 29. "IWDTRSTFLG,Independent watchdog reset" "0,1"
|
|
bitfld.long 0x24 28. "SWRSTFLG,Software reset flag" "0,1"
|
|
bitfld.long 0x24 27. "PODRSTFLG,POR/PDR reset flag" "0,1"
|
|
bitfld.long 0x24 26. "NRSTFLG,PIN reset flag" "0,1"
|
|
bitfld.long 0x24 24. "RSTFLGCLR,Remove reset flag" "0,1"
|
|
rbitfld.long 0x24 1. "LSIRDYFLG,Internal low speed oscillator ready" "0,1"
|
|
bitfld.long 0x24 0. "LSIEN,Internal low speed oscillator" "0,1"
|
|
tree.end
|
|
tree "RTC (Real-Time Clock)"
|
|
base ad:0x40002800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 2. "OVRIEN,Overflow interrupt Enable" "0,1"
|
|
bitfld.long 0x0 1. "ALRIEN,Alarm interrupt Enable" "0,1"
|
|
bitfld.long 0x0 0. "SECIEN,Second interrupt Enable" "0,1"
|
|
line.long 0x4 "CSTS,Control and State register"
|
|
rbitfld.long 0x4 5. "OCFLG,RTC operation OFF" "0,1"
|
|
bitfld.long 0x4 4. "CFGMFLG,Configuration Flag" "0,1"
|
|
bitfld.long 0x4 3. "RSYNCFLG,Registers Synchronized" "0,1"
|
|
bitfld.long 0x4 2. "OVRFLG,Overflow Flag" "0,1"
|
|
bitfld.long 0x4 1. "ALRFLG,Alarm Flag" "0,1"
|
|
bitfld.long 0x4 0. "SECFLG,Second Flag" "0,1"
|
|
wgroup.long 0x8++0x7
|
|
line.long 0x0 "PSCRLDH,RTC predivision loading register High Bit"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PSCRLDH,RTC Prescaler Load Register"
|
|
line.long 0x4 "PSCRLDL,RTC predivision loading register Low Bit"
|
|
hexmask.long.word 0x4 0.--15. 1. "PSCRLDL,RTC Prescaler Divider Register"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "PSCH,RTC predivider remainder register High Bit"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PSCH,RTC prescaler divider register"
|
|
line.long 0x4 "PSCL,RTC predivider remainder register Low Bit"
|
|
hexmask.long.word 0x4 0.--15. 1. "PSCL,RTC prescaler divider register"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CNTH,RTC count register High Bit"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNTH,RTC counter register high"
|
|
line.long 0x4 "CNTL,RTC count register Low Bit"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNTL,RTC counter register Low"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "ALRH,RTC alarm clock register High Bit"
|
|
hexmask.long.word 0x0 0.--15. 1. "ALRH,RTC alarm register high"
|
|
line.long 0x4 "ALRL,RTC alarm clock register Low Bit"
|
|
hexmask.long.word 0x4 0.--15. 1. "ALRL,RTC alarm register low"
|
|
tree.end
|
|
tree "SDIO (Secure Digital Input/Output Interface)"
|
|
base ad:0x40018000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PWRCTRL,Bits 1:0 = PWRCTRL: Power supply control"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCTRL,SDI clock control register"
|
|
bitfld.long 0x4 14. "HFCEN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "DEPSEL,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WBSEL,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASSEN,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,Bits 31:0 = : Command argument"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,SDIO command register"
|
|
bitfld.long 0xC 14. "ATACMD,ATACMD" "0,1"
|
|
bitfld.long 0xC 13. "INTEN,INTEN" "0,1"
|
|
bitfld.long 0xC 12. "CMDCPEN,CMDCPEN" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSC,SDIOSC" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,CPSMEN" "0,1"
|
|
bitfld.long 0xC 9. "WENDDATA,WENDDATA" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,WAITINT" "0,1"
|
|
bitfld.long 0xC 6.--7. "WAITRES,WAITRES" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,CMDINDEX"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "CMDRES,SDIO command register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CMDRES,CMDRES"
|
|
line.long 0x4 "RES1,Bits 31:0 = CARDSTATUS1"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTS1,CARDSTS1"
|
|
line.long 0x8 "RES2,Bits 31:0 = CARDSTATUS2"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTS2,CARDSTS2"
|
|
line.long 0xC "RES3,Bits 31:0 = CARDSTATUS3"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTS3,CARDSTS3"
|
|
line.long 0x10 "RES4,Bits 31:0 = CARDSTATUS4"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTS4,CARDSTS4"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DATATIME,Bits 31:0 = DATATIME: Data timeout"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DATALEN,Bits 24:0 = DATALENGTH: Data length"
|
|
hexmask.long 0x4 0.--24. 1. "DATALEN,Data length value"
|
|
line.long 0x8 "DCTRL,SDIO data control register"
|
|
bitfld.long 0x8 11. "SDIOF,SDIOF" "0,1"
|
|
bitfld.long 0x8 10. "RDWAIT,RDWAIT" "0,1"
|
|
bitfld.long 0x8 9. "PWSTOP,RWSTOP" "0,1"
|
|
bitfld.long 0x8 8. "RWSTR,RWSTR" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBSIZE,DBSIZE"
|
|
bitfld.long 0x8 3. "DMAEN,DMAEN" "0,1"
|
|
bitfld.long 0x8 2. "DTSEL,DTSEL" "0,1"
|
|
bitfld.long 0x8 1. "DTDRCFG,DTDRCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCNT,Bits 24:0 = DATACOUNT: Data count"
|
|
hexmask.long 0x0 0.--24. 1. "DATACNT,Data count value"
|
|
line.long 0x4 "STS,SDIO status register"
|
|
bitfld.long 0x4 23. "ATAEND,ATAEND" "0,1"
|
|
bitfld.long 0x4 22. "SDIOINT,SDIOINT" "0,1"
|
|
bitfld.long 0x4 21. "RXDA,RXDA" "0,1"
|
|
bitfld.long 0x4 20. "TXDA,TXDA" "0,1"
|
|
bitfld.long 0x4 19. "RXFE,RXFE" "0,1"
|
|
bitfld.long 0x4 18. "TXFE,TXFE" "0,1"
|
|
bitfld.long 0x4 17. "RXFF,RXFF" "0,1"
|
|
bitfld.long 0x4 16. "TXFF,TXFF" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "RXFHF,RXFHF" "0,1"
|
|
bitfld.long 0x4 14. "TXFHF,TXFHF" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,RXACT" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,TXACT" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,CMDACT" "0,1"
|
|
bitfld.long 0x4 10. "DBCP,DBCP" "0,1"
|
|
bitfld.long 0x4 9. "SBE,SBE" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,DATAEND" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CMDSENT,CMDSENT" "0,1"
|
|
bitfld.long 0x4 6. "CMDRES,CMDRES" "0,1"
|
|
bitfld.long 0x4 5. "RXOVRER,RXOVRER" "0,1"
|
|
bitfld.long 0x4 4. "TXUDRER,TXUDRER" "0,1"
|
|
bitfld.long 0x4 3. "DATATO,DATATO" "0,1"
|
|
bitfld.long 0x4 2. "CMDRESTO,CMDRESTO" "0,1"
|
|
bitfld.long 0x4 1. "DBDR,DBDR" "0,1"
|
|
bitfld.long 0x4 0. "COMRESP,COMRESP" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICF,SDIO interrupt clear register"
|
|
bitfld.long 0x0 23. "ATAEND,ATAEND" "0,1"
|
|
bitfld.long 0x0 22. "SDIOIT,SDIOIT" "0,1"
|
|
bitfld.long 0x0 10. "DBCP,DBCP" "0,1"
|
|
bitfld.long 0x0 9. "SBE,SBE" "0,1"
|
|
bitfld.long 0x0 8. "DATAEND,DATAEND" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENT,CMDSENT" "0,1"
|
|
bitfld.long 0x0 6. "CMDRES,CMDRES" "0,1"
|
|
bitfld.long 0x0 5. "RXFOE,RXFOE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXFUE,TXFUE" "0,1"
|
|
bitfld.long 0x0 3. "DTO,DTO" "0,1"
|
|
bitfld.long 0x0 2. "CRTO,CRTO" "0,1"
|
|
bitfld.long 0x0 1. "CRCE,CRCE" "0,1"
|
|
bitfld.long 0x0 0. "DBCE,DBCE" "0,1"
|
|
line.long 0x4 "MASK,SDIO mask register (SDIO_MASK)"
|
|
bitfld.long 0x4 23. "ATACLPREC,ATACLPREC" "0,1"
|
|
bitfld.long 0x4 22. "SDIOINTREC,SDIOINTREC" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVB,RXDAVB" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVB,TXDAVB" "0,1"
|
|
bitfld.long 0x4 19. "RXFEIE,RXFEIE" "0,1"
|
|
bitfld.long 0x4 18. "TXEPT,TXEPT" "0,1"
|
|
bitfld.long 0x4 17. "RXFUL,RXFUL" "0,1"
|
|
bitfld.long 0x4 16. "TXFUL,TXFUL" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "RXHFFUL,RXHFFUL" "0,1"
|
|
bitfld.long 0x4 14. "TXHFERT,TXFERT" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,RXACT" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,TXACT" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,CMDACT" "0,1"
|
|
bitfld.long 0x4 10. "DBEND,DBEND" "0,1"
|
|
bitfld.long 0x4 9. "STRTER,STRTER" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,DATAEND" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CMDSENT,CMDSENT" "0,1"
|
|
bitfld.long 0x4 6. "CMDRESRC,CMDRESRC" "0,1"
|
|
bitfld.long 0x4 5. "RXORER,RXORER" "0,1"
|
|
bitfld.long 0x4 4. "TXURER,TXURER" "0,1"
|
|
bitfld.long 0x4 3. "DATATO,DATATO" "0,1"
|
|
bitfld.long 0x4 2. "CMDTO,CMDTO" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,DCRCFAIL" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,CCRCFAIL" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,Bits 23:0 = FIFOCOUNT: Remaining number of"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCNT,FIFOCNT"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFODATA,bits 31:0 = FIFOData: Receive and transmit"
|
|
hexmask.long 0x0 0.--31. 1. "FIFODATA,FIFODATA"
|
|
tree.end
|
|
tree "SMC (Static Memory Controller)"
|
|
base ad:0xA0000000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "CSCTRL1,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x0 19. "WRBURSTEN,WRBURSTEN" "0,1"
|
|
bitfld.long 0x0 16.--18. "CRAMPSIZECFG,CRAMPSIZECFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 15. "WSASYNCEN,WSASYNCEN" "0,1"
|
|
bitfld.long 0x0 14. "EXTMODEEN,EXTMODEEN" "0,1"
|
|
bitfld.long 0x0 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x0 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x0 11. "WTIMCFG,WTIMCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "WRAPBEN,WRAPBEN" "0,1"
|
|
bitfld.long 0x0 9. "WSPOLCFG,WSPOLCFG" "0,1"
|
|
bitfld.long 0x0 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x0 6. "NORFMACCEN,NORFMACCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "MDBWIDCFG,MDBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MTYPECFG,MTYPECFG" "0,1,2,3"
|
|
bitfld.long 0x0 1. "ADMUXEN,ADMUXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x4 "CSTIM1,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x4 28.--29. "ACCMODECFG,ACCMODECFG" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x4 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x4 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x4 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x4 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
line.long 0x8 "CSCTRL2,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x8 19. "WRBURSTEN,WRBURSTEN" "0,1"
|
|
bitfld.long 0x8 16.--18. "CRAMPSIZECFG,CRAMPSIZECFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "WSASYNCEN,WSASYNCEN" "0,1"
|
|
bitfld.long 0x8 14. "EXTMODEEN,EXTMODEEN" "0,1"
|
|
bitfld.long 0x8 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x8 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x8 11. "WTIMCFG,WTIMCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10. "WRAPBEN,WRAPBEN" "0,1"
|
|
bitfld.long 0x8 9. "WSPOLCFG,WSPOLCFG" "0,1"
|
|
bitfld.long 0x8 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x8 6. "NORFMACCEN,NORFMACCEN" "0,1"
|
|
bitfld.long 0x8 4.--5. "MDBWIDCFG,MDBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "MTYPECFG,MTYPECFG" "0,1,2,3"
|
|
bitfld.long 0x8 1. "ADMUXEN,ADMUXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0xC "CSTIM2,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0xC 28.--29. "ACCMODECFG,ACCMODECFG" "0,1,2,3"
|
|
hexmask.long.byte 0xC 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0xC 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0xC 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0xC 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0xC 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
line.long 0x10 "CSCTRL3,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x10 19. "WRBURSTEN,WRBURSTEN" "0,1"
|
|
bitfld.long 0x10 16.--18. "CRAMPSIZECFG,CRAMPSIZECFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 15. "WSASYNCEN,WSASYNCEN" "0,1"
|
|
bitfld.long 0x10 14. "EXTMODEEN,EXTMODEEN" "0,1"
|
|
bitfld.long 0x10 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x10 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x10 11. "WTIMCFG,WTIMCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x10 10. "WRAPBEN,WRAPBEN" "0,1"
|
|
bitfld.long 0x10 9. "WSPOLCFG,WSPOLCFG" "0,1"
|
|
bitfld.long 0x10 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x10 6. "NORFMACCEN,NORFMACCEN" "0,1"
|
|
bitfld.long 0x10 4.--5. "MDBWIDCFG,MDBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. "MTYPECFG,MTYPECFG" "0,1,2,3"
|
|
bitfld.long 0x10 1. "ADMUXEN,ADMUXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x14 "CSTIM3,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x14 28.--29. "ACCMODECFG,ACCMODECFG" "0,1,2,3"
|
|
hexmask.long.byte 0x14 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x14 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x14 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x14 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x14 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
line.long 0x18 "CSCTRL4,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x18 19. "WRBURSTEN,WRBURSTEN" "0,1"
|
|
bitfld.long 0x18 16.--18. "CRAMPSIZECFG,CRAMPSIZECFG" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15. "WSASYNCEN,WSASYNCEN" "0,1"
|
|
bitfld.long 0x18 14. "EXTMODEEN,EXTMODEEN" "0,1"
|
|
bitfld.long 0x18 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x18 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x18 11. "WTIMCFG,WTIMCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x18 10. "WRAPBEN,WRAPBEN" "0,1"
|
|
bitfld.long 0x18 9. "WSPOLCFG,WSPOLCFG" "0,1"
|
|
bitfld.long 0x18 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x18 6. "NORFMACCEN,NORFMACCEN" "0,1"
|
|
bitfld.long 0x18 4.--5. "MDBWIDCFG,MDBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x18 2.--3. "MTYPECFG,MTYPECFG" "0,1,2,3"
|
|
bitfld.long 0x18 1. "ADMUXEN,ADMUXEN" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x1C "CSTIM4,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x1C 28.--29. "ACCMODECFG,ACCMODECFG" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x1C 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "CTRL2,PC Card/NAND Flash control register"
|
|
bitfld.long 0x0 17.--19. "ECCPSCFG,ECCPSCFG" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 13.--16. 1. "A2RDCFG,A2RDCFG"
|
|
hexmask.long.byte 0x0 9.--12. 1. "C2RDCFG,C2RDCF"
|
|
bitfld.long 0x0 6. "ECCEN,ECCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "DBWIDCFG,DBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x0 3. "MTYPECFG,MTYPECFG" "0,1"
|
|
bitfld.long 0x0 2. "MBKEN,MBKEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WAITFEN,WAITFEN" "0,1"
|
|
line.long 0x4 "STSINT2,FIFO status and interrupt register"
|
|
rbitfld.long 0x4 6. "FEFLG,FEFLG" "0,1"
|
|
bitfld.long 0x4 5. "IFEDEN,IFEDEN" "0,1"
|
|
bitfld.long 0x4 4. "IHLDEN,IHLDEN" "0,1"
|
|
bitfld.long 0x4 3. "IREDEN,IREDEN" "0,1"
|
|
bitfld.long 0x4 2. "IFEFLG,IFEFLG" "0,1"
|
|
bitfld.long 0x4 1. "IHLFLG,IHLFLG" "0,1"
|
|
bitfld.long 0x4 0. "IREFLG,IREFLG" "0,1"
|
|
line.long 0x8 "CMSTIM2,Common memory space timing register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "HIZ2,Common memory 2 databus HiZ time"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HLD2,Common memory 2 hold time"
|
|
hexmask.long.byte 0x8 8.--15. 1. "WAIT2,Common memory 2 wait time"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SET2,Common memory 2 setup time"
|
|
line.long 0xC "AMSTIM2,Attribute memory space timing register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "HIZ2,Attribute memory 2 databus HiZ"
|
|
hexmask.long.byte 0xC 16.--23. 1. "HLD2,Attribute memory 2 hold"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WAIT2,Attribute memory 2 wait"
|
|
hexmask.long.byte 0xC 0.--7. 1. "SET2,Attribute memory 2 setup time"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "ECCRS2,ECC result register 2"
|
|
hexmask.long 0x0 0.--31. 1. "ECCRS2,ECC result 2"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CTRL3,PC Card/NAND Flash control register"
|
|
bitfld.long 0x0 17.--19. "ECCPSCFG,ECCPSCFG" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 13.--16. 1. "A2RDCFG,A2RDCFG"
|
|
hexmask.long.byte 0x0 9.--12. 1. "C2RDCFG,C2RDCF"
|
|
bitfld.long 0x0 6. "ECCEN,ECCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "DBWIDCFG,DBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x0 3. "MTYPECFG,MTYPECFG" "0,1"
|
|
bitfld.long 0x0 2. "MBKEN,MBKEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WAITFEN,WAITFEN" "0,1"
|
|
line.long 0x4 "STSINT3,FIFO status and interrupt register"
|
|
rbitfld.long 0x4 6. "FEFLG,FEFLG" "0,1"
|
|
bitfld.long 0x4 5. "IFEDEN,IFEDEN" "0,1"
|
|
bitfld.long 0x4 4. "IHLDEN,IHLDEN" "0,1"
|
|
bitfld.long 0x4 3. "IREDEN,IREDEN" "0,1"
|
|
bitfld.long 0x4 2. "IFEFLG,IFEFLG" "0,1"
|
|
bitfld.long 0x4 1. "IHLFLG,IHLFLG" "0,1"
|
|
bitfld.long 0x4 0. "IREFLG,IREFLG" "0,1"
|
|
line.long 0x8 "CMSTIM3,Common memory space timing register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "HIZ3,Common memory 3 databus HiZ time"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HLD3,Common memory 3 hold time"
|
|
hexmask.long.byte 0x8 8.--15. 1. "WAIT3,Common memory 3 wait time"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SET3,Common memory 3 setup time"
|
|
line.long 0xC "AMSTIM3,Attribute memory space timing register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "HIZ3,Attribute memory 3 databus HiZ"
|
|
hexmask.long.byte 0xC 16.--23. 1. "HLD3,Attribute memory 3 hold"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WAIT3,Attribute memory 3 wait"
|
|
hexmask.long.byte 0xC 0.--7. 1. "SET3,Attribute memory 3 setup time"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "ECCRS3,ECC result register 3"
|
|
hexmask.long 0x0 0.--31. 1. "ECCRS3,ECC result 3"
|
|
group.long 0xA0++0x13
|
|
line.long 0x0 "CTRL4,PC Card/NAND Flash control register"
|
|
bitfld.long 0x0 17.--19. "ECCPSCFG,ECCPSCFG" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 13.--16. 1. "A2RDCFG,A2RDCFG"
|
|
hexmask.long.byte 0x0 9.--12. 1. "C2RDCFG,C2RDCF"
|
|
bitfld.long 0x0 6. "ECCEN,ECCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "DBWIDCFG,DBWIDCFG" "0,1,2,3"
|
|
bitfld.long 0x0 3. "MTYPECFG,MTYPECFG" "0,1"
|
|
bitfld.long 0x0 2. "MBKEN,MBKEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WAITFEN,WAITFEN" "0,1"
|
|
line.long 0x4 "STSINT4,FIFO status and interrupt register"
|
|
rbitfld.long 0x4 6. "FEFLG,FEFLG" "0,1"
|
|
bitfld.long 0x4 5. "IFEDEN,IFEDEN" "0,1"
|
|
bitfld.long 0x4 4. "IHLDEN,IHLDEN" "0,1"
|
|
bitfld.long 0x4 3. "IREDEN,IREDEN" "0,1"
|
|
bitfld.long 0x4 2. "IFEFLG,IFEFLG" "0,1"
|
|
bitfld.long 0x4 1. "IHLFLG,IHLFLG" "0,1"
|
|
bitfld.long 0x4 0. "IREFLG,IREFLG" "0,1"
|
|
line.long 0x8 "CMSTIM4,Common memory space timing register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "HIZ4,Common memory 4 databus HiZ time"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HLD4,Common memory 4 hold time"
|
|
hexmask.long.byte 0x8 8.--15. 1. "WAIT4,Common memory 4 wait time"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SET4,Common memory 4 setup time"
|
|
line.long 0xC "AMSTIM4,Attribute memory space timing register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "HIZ4,Attribute memory 4 databus HiZ"
|
|
hexmask.long.byte 0xC 16.--23. 1. "HLD4,Attribute memory 4 hold"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WAIT4,Attribute memory 4 wait"
|
|
hexmask.long.byte 0xC 0.--7. 1. "SET4,Attribute memory 4 setup time"
|
|
line.long 0x10 "IOSTIM4,I/O space timing register 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. "HIZ4,HIZ4"
|
|
hexmask.long.byte 0x10 16.--23. 1. "HLD4,HLD4"
|
|
hexmask.long.byte 0x10 8.--15. 1. "WAIT4,WAIT4"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SET4,SET4"
|
|
group.long 0x104++0x3
|
|
line.long 0x0 "WRTTIM1,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ASYNCACCCFG,ASYNCACCCFG" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "WRTTIM2,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ASYNCACCCFG,ASYNCACCCFG" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
group.long 0x114++0x3
|
|
line.long 0x0 "WRTTIM3,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ASYNCACCCFG,ASYNCACCCFG" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "WRTTIM4,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ASYNCACCCFG,ASYNCACCCFG" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATALATCFG,DATALATCFG"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIVCFG,CLKDIVCFG"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSTURNCFG,BUSTURNCFG"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATASETCFG,DATASETCFG"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHLDCFG,ADDRHLDCFG"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRSETCFG,ADDRSETCFG"
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI1"
|
|
base ad:0x40013000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFLSEL,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSEN,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1"
|
|
bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1"
|
|
rbitfld.long 0x8 2. "SCHDIR,Channel side" "0,1"
|
|
rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DATA,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DATA,Data register"
|
|
line.long 0x10 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRC,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRC,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCFG,I2S configuration register"
|
|
bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1"
|
|
bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x0 3. "CPOL,Steady state clock" "0,1"
|
|
bitfld.long 0x0 1.--2. "DATLEN,Data length to be" "0,1,2,3"
|
|
bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio" "0,1"
|
|
line.long 0x4 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x4 9. "MCIEN,Master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "ODDPSC,Odd factor for the" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S Linear prescaler"
|
|
tree.end
|
|
tree "SPI2"
|
|
base ad:0x40003800
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFLSEL,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSEN,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1"
|
|
bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1"
|
|
rbitfld.long 0x8 2. "SCHDIR,Channel side" "0,1"
|
|
rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DATA,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DATA,Data register"
|
|
line.long 0x10 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRC,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRC,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCFG,I2S configuration register"
|
|
bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1"
|
|
bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x0 3. "CPOL,Steady state clock" "0,1"
|
|
bitfld.long 0x0 1.--2. "DATLEN,Data length to be" "0,1,2,3"
|
|
bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio" "0,1"
|
|
line.long 0x4 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x4 9. "MCIEN,Master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "ODDPSC,Odd factor for the" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S Linear prescaler"
|
|
tree.end
|
|
tree "SPI3"
|
|
base ad:0x40003C00
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFLSEL,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSEN,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1"
|
|
bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1"
|
|
rbitfld.long 0x8 2. "SCHDIR,Channel side" "0,1"
|
|
rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DATA,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DATA,Data register"
|
|
line.long 0x10 "CRCPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRC,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRC,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCFG,I2S configuration register"
|
|
bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1"
|
|
bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3"
|
|
bitfld.long 0x0 3. "CPOL,Steady state clock" "0,1"
|
|
bitfld.long 0x0 1.--2. "DATLEN,Data length to be" "0,1,2,3"
|
|
bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio" "0,1"
|
|
line.long 0x4 "I2SPSC,I2S prescaler register"
|
|
bitfld.long 0x4 9. "MCIEN,Master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "ODDPSC,Odd factor for the" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S Linear prescaler"
|
|
tree.end
|
|
tree.end
|
|
tree "TMR (Timers)"
|
|
base ad:0x0
|
|
tree "TMR1 (Advanced Timer)"
|
|
base ad:0x40012C00
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 14. "OC4OIS,Output Idle state 4" "0,1"
|
|
bitfld.long 0x4 13. "OC3NOIS,Output Idle state 3" "0,1"
|
|
bitfld.long 0x4 12. "OC3OIS,Output Idle state 3" "0,1"
|
|
bitfld.long 0x4 11. "OC2NOIS,Output Idle state 2" "0,1"
|
|
bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1"
|
|
bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1"
|
|
bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1"
|
|
bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 13. "COMDEN,COM DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1"
|
|
bitfld.long 0x10 6. "TIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 7. "BEG,Break generation" "0,1"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x33
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 10. "CC3NEN,Capture/Compare 3 complementary output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 6. "CC2NEN,Capture/Compare 2 complementary output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
line.long 0x14 "REPCNT,Repeat count register"
|
|
hexmask.long.word 0x14 0.--15. 1. "REPCNT,Repetition Counter Value"
|
|
line.long 0x18 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x18 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x1C "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x20 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x20 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0x24 "CC4,capture/compare register 4"
|
|
hexmask.long.word 0x24 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
line.long 0x28 "BDT,Brake and dead zone registers"
|
|
bitfld.long 0x28 15. "MOEN,Main output enable" "0,1"
|
|
bitfld.long 0x28 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x28 13. "BRKPOL,Break polarity" "0,1"
|
|
bitfld.long 0x28 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x28 11. "RMOS,Off-state selection for Run" "0,1"
|
|
bitfld.long 0x28 10. "IMOS,Off-state selection for Idle" "0,1"
|
|
bitfld.long 0x28 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DTS,Dead-time generator setup"
|
|
line.long 0x2C "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x2C 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x30 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x30 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree "TMR2 (General-Purpose Timer)"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x4 "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x8 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0xC "CC4,capture/compare register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x4 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree "TMR3 (General-Purpose Timer)"
|
|
base ad:0x40000400
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x4 "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x8 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0xC "CC4,capture/compare register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x4 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree "TMR4 (General-Purpose Timer)"
|
|
base ad:0x40000800
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x4 "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x8 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0xC "CC4,capture/compare register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x4 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree "TMR5 (General-Purpose Timer)"
|
|
base ad:0x40000C00
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x4 "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x8 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0xC "CC4,capture/compare register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x4 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree "TMR6 (Basic Timer)"
|
|
base ad:0x40001000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x4 "STS,status register"
|
|
bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CNT,counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,counter value"
|
|
line.long 0x4 "PSC,prescaler"
|
|
hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x8 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
tree.end
|
|
tree "TMR7 (Basic Timer)"
|
|
base ad:0x40001400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x4 "STS,status register"
|
|
bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CNT,counter"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,counter value"
|
|
line.long 0x4 "PSC,prescaler"
|
|
hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x8 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
tree.end
|
|
tree "TMR8 (Advanced Timer)"
|
|
base ad:0x40013400
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3"
|
|
bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "CNTDIR,Direction" "0,1"
|
|
bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1"
|
|
bitfld.long 0x0 2. "URSSEL,Update request source" "0,1"
|
|
bitfld.long 0x0 1. "UD,Update disable" "0,1"
|
|
bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 14. "OC4OIS,Output Idle state 4" "0,1"
|
|
bitfld.long 0x4 13. "OC3NOIS,Output Idle state 3" "0,1"
|
|
bitfld.long 0x4 12. "OC3OIS,Output Idle state 3" "0,1"
|
|
bitfld.long 0x4 11. "OC2NOIS,Output Idle state 2" "0,1"
|
|
bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1"
|
|
bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1"
|
|
bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1"
|
|
bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1"
|
|
bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1"
|
|
line.long 0x8 "SMCTRL,slave mode control register"
|
|
bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECEN,External clock enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter"
|
|
bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1"
|
|
bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "DIEN,DMA/Interrupt enable register"
|
|
bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 13. "COMDEN,COM DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1"
|
|
bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1"
|
|
line.long 0x10 "STS,status register"
|
|
bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1"
|
|
bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1"
|
|
bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1"
|
|
bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1"
|
|
bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1"
|
|
bitfld.long 0x10 6. "TIFLG,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1"
|
|
bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1"
|
|
bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1"
|
|
bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "CEG,event generation register"
|
|
bitfld.long 0x0 7. "BEG,Break generation" "0,1"
|
|
bitfld.long 0x0 6. "TEG,Trigger generation" "0,1"
|
|
bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1"
|
|
bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1"
|
|
bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1"
|
|
bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1"
|
|
bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1"
|
|
bitfld.long 0x0 0. "UEG,Update generation" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CCM1,capture/compare mode register 1 (Compare mode)"
|
|
bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CCM1_CAPTURE,capture/compare mode register 1 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3"
|
|
line.long 0x4 "CCM2,capture/compare mode register 2 (Compare mode)"
|
|
bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "OC4MODE,Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3"
|
|
bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "OC3MODE,Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1"
|
|
bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3"
|
|
group.long 0x1C++0x33
|
|
line.long 0x0 "CCM2_CAPTURE,capture/compare mode register 2 (Capture mode)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3" "0,1,2,3"
|
|
line.long 0x4 "CCEN,capture/compare enable"
|
|
bitfld.long 0x4 13. "CC4POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1"
|
|
bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 10. "CC3NEN,Capture/Compare 3 complementary output" "0,1"
|
|
bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output" "0,1"
|
|
bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 6. "CC2NEN,Capture/Compare 2 complementary output" "0,1"
|
|
bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1"
|
|
bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1"
|
|
bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1"
|
|
bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1"
|
|
line.long 0x8 "CNT,counter"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,counter value"
|
|
line.long 0xC "PSC,prescaler"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value"
|
|
line.long 0x10 "AUTORLD,auto-reload register"
|
|
hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value"
|
|
line.long 0x14 "REPCNT,Repeat count register"
|
|
hexmask.long.word 0x14 0.--15. 1. "REPCNT,Repetition Counter Value"
|
|
line.long 0x18 "CC1,capture/compare register 1"
|
|
hexmask.long.word 0x18 0.--15. 1. "CC1,Capture/Compare 1 value"
|
|
line.long 0x1C "CC2,capture/compare register 2"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CC2,Capture/Compare 2 value"
|
|
line.long 0x20 "CC3,capture/compare register 3"
|
|
hexmask.long.word 0x20 0.--15. 1. "CC3,Capture/Compare 3 value"
|
|
line.long 0x24 "CC4,capture/compare register 4"
|
|
hexmask.long.word 0x24 0.--15. 1. "CC4,Capture/Compare 4 value"
|
|
line.long 0x28 "BDT,Brake and dead zone registers"
|
|
bitfld.long 0x28 15. "MOEN,Main output enable" "0,1"
|
|
bitfld.long 0x28 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x28 13. "BRKPOL,Break polarity" "0,1"
|
|
bitfld.long 0x28 12. "BRKEN,Break enable" "0,1"
|
|
bitfld.long 0x28 11. "RMOS,Off-state selection for Run" "0,1"
|
|
bitfld.long 0x28 10. "IMOS,Off-state selection for Idle" "0,1"
|
|
bitfld.long 0x28 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DTS,Dead-time generator setup"
|
|
line.long 0x2C "DCTRL,DMA control register"
|
|
hexmask.long.byte 0x2C 8.--12. 1. "DBLEN,DMA burst length"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "DBADDR,DMA base address"
|
|
line.long 0x30 "DMADDR,Consecutive DMA addresses"
|
|
hexmask.long.word 0x30 0.--15. 1. "DMADDR,DMA register for burst accesses"
|
|
tree.end
|
|
tree.end
|
|
tree "USART (Universal Synchronous/Asynchronous Transceiver)"
|
|
base ad:0x0
|
|
tree "USART1"
|
|
base ad:0x40013800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "STS,Status register"
|
|
bitfld.long 0x0 9. "CTSFLG,CTS flag" "0,1"
|
|
bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1"
|
|
rbitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1"
|
|
bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1"
|
|
bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEFLG,IDLE line detected" "0,1"
|
|
rbitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1"
|
|
rbitfld.long 0x0 2. "NEFLG,Noise error flag" "0,1"
|
|
rbitfld.long 0x0 1. "FEFLG,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PEFLG,Parity error" "0,1"
|
|
line.long 0x4 "DATA,TX Buffer Data Register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DATA,Data value"
|
|
line.long 0x8 "BR,Baud rate register"
|
|
hexmask.long.word 0x8 4.--15. 1. "IBR,Integer of USARTDIV"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FBR,Fraction of USARTDIV"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBLCFG,Word length" "0,1"
|
|
bitfld.long 0xC 11. "WUPMCFG,Wakeup method" "0,1"
|
|
bitfld.long 0xC 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0xC 9. "PCFG,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PEIEN,PE interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TXBEIEN,TXBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TXCIEN,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RXBNEIEN,RXBNE interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TXEN,Transmitter enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "RXEN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RXMUTEEN,Receiver wakeup" "0,1"
|
|
bitfld.long 0xC 0. "TXBF,Send break" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
bitfld.long 0x10 14. "LINMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPCFG,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x10 9. "CPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCPOEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "LBDIEN,LIN break detection interrupt" "0,1"
|
|
bitfld.long 0x10 5. "LBDLCFG,lin break detection length" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "ADDR,Address of the USART node"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 10. "CTSIEN,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATXEN,DMA enable transmitter" "0,1"
|
|
bitfld.long 0x14 6. "DMARXEN,DMA enable receiver" "0,1"
|
|
bitfld.long 0x14 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x14 2. "IRLPEN,IrDA low-power" "0,1"
|
|
bitfld.long 0x14 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GTPSC,Guard time and divider number register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "GRDT,Guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "PSC,Prescaler value"
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40004400
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "STS,Status register"
|
|
bitfld.long 0x0 9. "CTSFLG,CTS flag" "0,1"
|
|
bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1"
|
|
rbitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1"
|
|
bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1"
|
|
bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEFLG,IDLE line detected" "0,1"
|
|
rbitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1"
|
|
rbitfld.long 0x0 2. "NEFLG,Noise error flag" "0,1"
|
|
rbitfld.long 0x0 1. "FEFLG,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PEFLG,Parity error" "0,1"
|
|
line.long 0x4 "DATA,TX Buffer Data Register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DATA,Data value"
|
|
line.long 0x8 "BR,Baud rate register"
|
|
hexmask.long.word 0x8 4.--15. 1. "IBR,Integer of USARTDIV"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FBR,Fraction of USARTDIV"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBLCFG,Word length" "0,1"
|
|
bitfld.long 0xC 11. "WUPMCFG,Wakeup method" "0,1"
|
|
bitfld.long 0xC 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0xC 9. "PCFG,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PEIEN,PE interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TXBEIEN,TXBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TXCIEN,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RXBNEIEN,RXBNE interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TXEN,Transmitter enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "RXEN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RXMUTEEN,Receiver wakeup" "0,1"
|
|
bitfld.long 0xC 0. "TXBF,Send break" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
bitfld.long 0x10 14. "LINMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPCFG,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x10 9. "CPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCPOEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "LBDIEN,LIN break detection interrupt" "0,1"
|
|
bitfld.long 0x10 5. "LBDLCFG,lin break detection length" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "ADDR,Address of the USART node"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 10. "CTSIEN,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATXEN,DMA enable transmitter" "0,1"
|
|
bitfld.long 0x14 6. "DMARXEN,DMA enable receiver" "0,1"
|
|
bitfld.long 0x14 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x14 2. "IRLPEN,IrDA low-power" "0,1"
|
|
bitfld.long 0x14 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GTPSC,Guard time and divider number register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "GRDT,Guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "PSC,Prescaler value"
|
|
tree.end
|
|
tree "USART3"
|
|
base ad:0x40004800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "STS,Status register"
|
|
bitfld.long 0x0 9. "CTSFLG,CTS flag" "0,1"
|
|
bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1"
|
|
rbitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1"
|
|
bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1"
|
|
bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEFLG,IDLE line detected" "0,1"
|
|
rbitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1"
|
|
rbitfld.long 0x0 2. "NEFLG,Noise error flag" "0,1"
|
|
rbitfld.long 0x0 1. "FEFLG,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PEFLG,Parity error" "0,1"
|
|
line.long 0x4 "DATA,TX Buffer Data Register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DATA,Data value"
|
|
line.long 0x8 "BR,Baud rate register"
|
|
hexmask.long.word 0x8 4.--15. 1. "IBR,Integer of USARTDIV"
|
|
hexmask.long.byte 0x8 0.--3. 1. "FBR,Fraction of USARTDIV"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBLCFG,Word length" "0,1"
|
|
bitfld.long 0xC 11. "WUPMCFG,Wakeup method" "0,1"
|
|
bitfld.long 0xC 10. "PCEN,Parity control enable" "0,1"
|
|
bitfld.long 0xC 9. "PCFG,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PEIEN,PE interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TXBEIEN,TXBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TXCIEN,Transmission complete interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RXBNEIEN,RXBNE interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TXEN,Transmitter enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "RXEN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RXMUTEEN,Receiver wakeup" "0,1"
|
|
bitfld.long 0xC 0. "TXBF,Send break" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
bitfld.long 0x10 14. "LINMEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPCFG,STOP bits" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x10 9. "CPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCPOEN,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "LBDIEN,LIN break detection interrupt" "0,1"
|
|
bitfld.long 0x10 5. "LBDLCFG,lin break detection length" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "ADDR,Address of the USART node"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 10. "CTSIEN,CTS interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATXEN,DMA enable transmitter" "0,1"
|
|
bitfld.long 0x14 6. "DMARXEN,DMA enable receiver" "0,1"
|
|
bitfld.long 0x14 5. "SCEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "HDEN,Half-duplex selection" "0,1"
|
|
bitfld.long 0x14 2. "IRLPEN,IrDA low-power" "0,1"
|
|
bitfld.long 0x14 1. "IREN,IrDA mode enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GTPSC,Guard time and divider number register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "GRDT,Guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "PSC,Prescaler value"
|
|
tree.end
|
|
tree.end
|
|
tree "USBD (Full-speed USBD Interface Device)"
|
|
base ad:0x40005C00
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "EP0,endpoint 0 register"
|
|
bitfld.long 0x0 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x0 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x0 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x0 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x0 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x0 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x0 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x0 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x4 "EP1,endpoint 1 register"
|
|
bitfld.long 0x4 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x4 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x4 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x4 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x4 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x4 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x4 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x4 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x4 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x8 "EP2,endpoint 2 register"
|
|
bitfld.long 0x8 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x8 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x8 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x8 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x8 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x8 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x8 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x8 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x8 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0xC "EP3,endpoint 3 register"
|
|
bitfld.long 0xC 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0xC 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0xC 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0xC 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0xC 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0xC 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0xC 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0xC 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0xC 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x10 "EP4,endpoint 4 register"
|
|
bitfld.long 0x10 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x10 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x10 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x10 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x10 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x10 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x10 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x10 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x10 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x10 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x14 "EP5,endpoint 5 register"
|
|
bitfld.long 0x14 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x14 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x14 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x14 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x14 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x14 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x14 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x14 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x14 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x18 "EP6,endpoint 6 register"
|
|
bitfld.long 0x18 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x18 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x18 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x18 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x18 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x18 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x18 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x18 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x18 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x18 0.--3. 1. "ADDR,Endpoint address"
|
|
line.long 0x1C "EP7,endpoint 7 register"
|
|
bitfld.long 0x1C 15. "CTFR,Correct transfer for" "0,1"
|
|
bitfld.long 0x1C 14. "RXDTOG,Data Toggle for reception" "0,1"
|
|
bitfld.long 0x1C 12.--13. "RXSTS,Status bits for reception" "0,1,2,3"
|
|
bitfld.long 0x1C 11. "SETUP,Setup transaction" "0,1"
|
|
bitfld.long 0x1C 9.--10. "TYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x1C 8. "KIND,Endpoint kind" "0,1"
|
|
bitfld.long 0x1C 7. "CTFT,Correct Transfer for" "0,1"
|
|
bitfld.long 0x1C 6. "TXDTOG,Data Toggle for transmission" "0,1"
|
|
bitfld.long 0x1C 4.--5. "TXSTS,Status bits for transmission" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "ADDR,Endpoint address"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CTRL,control register"
|
|
bitfld.long 0x0 15. "CTRIEN,Correct transfer interrupt mask" "0,1"
|
|
bitfld.long 0x0 14. "PMAOUIEN ,Packet memory area over / underrun interrupt mask" "0,1"
|
|
bitfld.long 0x0 13. "ERRIEN,Error interrupt mask" "0,1"
|
|
bitfld.long 0x0 12. "WUPIEN,Wakeup interrupt mask" "0,1"
|
|
bitfld.long 0x0 11. "SUSIEN,Suspend mode interrupt" "0,1"
|
|
bitfld.long 0x0 10. "RSTIEN,USB reset interrupt mask" "0,1"
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bitfld.long 0x0 9. "SOFIEN,Start of frame interrupt" "0,1"
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bitfld.long 0x0 8. "ESOFIEN,Expected start of frame interrupt" "0,1"
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bitfld.long 0x0 4. "WUPREQ,Wakeup request" "0,1"
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bitfld.long 0x0 3. "FORSUS,Force suspend" "0,1"
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|
newline
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bitfld.long 0x0 2. "LPWREN,Low-power mode" "0,1"
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bitfld.long 0x0 1. "PWRDOWN,Power down" "0,1"
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bitfld.long 0x0 0. "FORRST,Force USB Reset" "0,1"
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line.long 0x4 "INTSTS,interrupt status register"
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bitfld.long 0x4 15. "CTFLG,Correct transfer" "0,1"
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bitfld.long 0x4 14. "PMOFLG,Packet memory area over / underrun" "0,1"
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bitfld.long 0x4 13. "ERRFLG,Error" "0,1"
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bitfld.long 0x4 12. "WUPREQ,Wakeup" "0,1"
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bitfld.long 0x4 11. "SUSREQ,Suspend mode request" "0,1"
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bitfld.long 0x4 10. "RSTREQ,reset request" "0,1"
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bitfld.long 0x4 9. "SOFFLG,start of frame" "0,1"
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bitfld.long 0x4 8. "ESOFFLG,Expected start frame" "0,1"
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bitfld.long 0x4 4. "DOT,Direction of transaction" "0,1"
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|
hexmask.long.byte 0x4 0.--3. 1. "EPID,Endpoint Identifier"
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|
rgroup.long 0x48++0x3
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|
line.long 0x0 "FRANUM,frame number register"
|
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bitfld.long 0x0 15. "RXDPSTS,Receive data + line status" "0,1"
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bitfld.long 0x0 14. "RXDMSTS,Receive data - line status" "0,1"
|
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bitfld.long 0x0 13. "LOCK,Locked" "0,1"
|
|
bitfld.long 0x0 11.--12. "LSOFNUM,Lost SOF" "0,1,2,3"
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|
hexmask.long.word 0x0 0.--10. 1. "FRANUM,Frame number"
|
|
group.long 0x4C++0x7
|
|
line.long 0x0 "ADDR,device address"
|
|
bitfld.long 0x0 7. "USBDEN,Enable function" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "ADDR,Device address"
|
|
line.long 0x4 "BUFFTB,Buffer table address"
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|
hexmask.long.word 0x4 3.--15. 1. "BUFFTB,Buffer table"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "SWITCH,Switch register"
|
|
bitfld.long 0x0 0. "SWITCH,Switch" "0,1"
|
|
tree.end
|
|
tree "WWDT (Window Watchdog Timer)"
|
|
base ad:0x40002C00
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRL,Control register (WWDT_CTRL)"
|
|
bitfld.long 0x0 7. "WWDTEN,Activation bit" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CNT,7-bit counter (MSB to LSB)"
|
|
line.long 0x4 "CFG,Configuration register"
|
|
bitfld.long 0x4 9. "EWIEN,Early Wakeup Interrupt" "0,1"
|
|
bitfld.long 0x4 7.--8. "TBPSC,Timer Base" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--6. 1. "WIN,7-bit window value"
|
|
line.long 0x8 "STS,Status register (WWDT_STS)"
|
|
bitfld.long 0x8 0. "EWIFLG,Early Wakeup Interrupt" "0,1"
|
|
tree.end
|
|
AUTOINDENT.OFF
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