9991 lines
612 KiB
Plaintext
9991 lines
612 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: ADUC7xxx On-Chip Peripherals
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; @Description:
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; ADUC7xxx include:
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; ADUC7019, ADUC7020, ADUC7021, ADUC7022, ADUC7023, ADUC7024,
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; ADUC7025, ADUC7026, ADUC7027, ADUC7028, ADUC7029, ADUC7121,
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; ADUC7122, ADUC7124, ADUC7128, ADUC7129
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; @Props: Released
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; @Author: MAL, MPI, SOL, (SYL)
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; @Changelog: 2010-11-10 MAL
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; @Manufacturer: AD - Analog Devices Inc.
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; @Doc: ADuC7019_20_1_2_4_5_6_7_a.pdf; ADuC7023.pdf (Rev. 0)
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; ADuC7122.pdf (Rev. 0); ADUC7128_7129.pdf (Rev. 0)
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; ADuC7019_7020_7021_7022_7024_7025_7026_7027_7028_7029.pdf (Rev. C)
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; ADuC7124.pdf (Rev. 0)
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; @Core: ARM7TDMI
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; @Chip: ADUC7129
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: peraduc7xxx.per 17414 2024-01-30 17:56:17Z kwisniewski $
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;Known problems:
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;-EXT_MEM: Base address doesn't match memory map address. Appropriate address should be probably 0xFFFFF000
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config 16. 8.
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width 0x0B
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tree "Icebreaker"
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width 8.
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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tree.end
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base ad:0x00000000
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tree "Interrupt System"
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base ad:0xFFFF0000
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sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
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width 0x08
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rgroup.long 0x0000--0x0007
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line.long 0x00 "IRQSTA,IRQ Status"
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bitfld.long 0x00 23. " STA_PWM_TRIP ,PWM Trip Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 22. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 21. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 20. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 19. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 18. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 17. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 16. " STA_CMP ,Comparator Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 15. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 14. " STA_UART ,UART Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 13. " STA_SPI_MA ,SPI Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 12. " STA_SPI_SL ,SPI Slave Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 11. " STA_I2C1_MA ,I2C1 Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 10. " STA_I2C0_MA ,I2C0 Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 9. " STA_I2C0_SL ,I2C0 Slave Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 8. " STA_PLL_LOCK ,PLL Lock Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 7. " STA_ADC_CHANN ,ADC Channel Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 6. " STA_FLASH_CTRL ,Flash Control Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 5. " STA_WDT ,Watchdog Timer - Timer 3 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 4. " STA_WUT ,Wake Up Timer - Timer 2 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 0. " STA_ALL ,All Interrupts OR'ed Status" "Not requested,Requested"
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line.long 0x04 "IRQSIG,IRQ Signals"
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bitfld.long 0x04 23. " SIG_PWM_TRIP ,PWM Trip Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 22. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 21. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 20. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 19. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 18. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 17. " SIG_PSM ,PSM Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 16. " SIG_CMP ,Comparator Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 15. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 14. " SIG_UART ,UART Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 13. " SIG_SPI_MA ,SPI Master Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 12. " SIG_SPI_SL ,SPI Slave Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 11. " SIG_I2C1_MA ,I2C1 Master Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 10. " SIG_I2C0_MA ,I2C0 Master Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 9. " SIG_I2C0_SL ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 8. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 7. " SIG_ADC_CHANN ,ADC Channel Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 6. " SIG_FLASH_CTRL ,Flash Control Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 5. " SIG_WDT ,Watchdog Timer - Timer 3 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 4. " SIG_WUT ,Wake Up Timer - Timer 2 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 0. " SIG_ALL ,All Interrupts OR'ed Signal" "Not generated,Generated"
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group.long 0x0008--0x000B
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line.long 0x00 "IRQEN,IRQ Enable Mask"
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bitfld.long 0x00 23. " EN_PWM_TRIP ,PWM Trip Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 22. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 21. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 20. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 19. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 18. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 16. " EN_CMP ,Comparator Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 15. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 14. " EN_UART ,UART Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 13. " EN_SPI_MA ,SPI Master Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " EN_SPI_SL ,SPI Slave Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 11. " EN_I2C1_MA ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 10. " EN_I2C0_MA ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 9. " EN_I2C0_SL ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 8. " EN_PLL_lock ,PLL Lock Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 7. " EN_ADC_chann ,ADC Channel Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 6. " EN_FLASH_ctrl ,Flash Control Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 5. " EN_WDT ,Watchdog Timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 4. " EN_WUT ,Wake Up Timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " EN_ALL ,All Interrupts OR'ed Enable" "Disabled,Enabled"
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wgroup.long 0x000C--0x000F
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line.long 0x00 "IRQCLR,IRQ Enable Mask Clear"
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bitfld.long 0x00 23. " CLR_PWM_TRIP ,PWM Trip Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 22. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 21. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 20. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 19. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 18. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 17. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 16. " CLR_CMP ,Comparator Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 15. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 14. " CLR_UART ,UART Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 13. " CLR_SPI_MA ,SPI Master Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 12. " CLR_SPI_SL ,SPI Slave Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 11. " CLR_I2C1_MA ,I2C1 Master Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 10. " CLR_I2C0_MA ,I2C0 Master Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 9. " CLR_I2C0_SL ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 8. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 7. " CLR_ADC_CHANN ,ADC Channel Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 6. " CLR_FLASH_CTRL ,Flash Control Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 5. " CLR_WDT ,Watchdog Timer - Timer 3 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 4. " CLR_WUT ,Wake Up Timer - Timer 2 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
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textline " "
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bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
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bitfld.long 0x00 0. " CLR_ALL ,All Interrupts OR'ed Clear" "No effect,Cleared"
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rgroup.long 0x0100--0x0107
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line.long 0x00 "FIQSTA,FIQ Status"
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bitfld.long 0x00 23. " STA_PWM_SYNC ,PWM Sync Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 22. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 21. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 20. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 19. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 18. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 17. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 16. " STA_CMP ,Comparator Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 15. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 14. " STA_UART ,UART Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 13. " STA_SPI_MA ,SPI Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 12. " STA_SPI_SL ,SPI Slave Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 11. " STA_I2C1_MA ,I2C1 Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 10. " STA_I2C0_MA ,I2C0 Master Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 9. " STA_I2C0_SL ,I2C0 Slave Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 8. " STA_PLL_LOCK ,PLL lock Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 7. " STA_ADC_CHANN ,ADC Channel Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 6. " STA_FLASH_CTRL ,Flash Control Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 5. " STA_WDT ,Watchdog Timer - Timer 3 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 4. " STA_WUT ,Wake Up Timer - Timer 2 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
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textline " "
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bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
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bitfld.long 0x00 0. " STA_ALL ,All Interrupts OR'ed Status" "Not requested,Requested"
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line.long 0x04 "FIQSIG,FIQ Signals"
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bitfld.long 0x04 23. " SIG_PWM_SYNC ,PWM Sync Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 22. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 21. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 20. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 19. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 18. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 17. " SIG_PSM ,PSM Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 16. " SIG_CMP ,Comparator Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 15. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 14. " SIG_UART ,UART Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 13. " SIG_SPI_MA ,SPI Master Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 12. " SIG_SPI_SL ,SPI Slave Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 11. " SIG_I2C1_MA ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
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bitfld.long 0x04 10. " SIG_I2C0_MA ,I2C0 Master Interrupt Signal" "Not generated,Generated"
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bitfld.long 0x04 9. " SIG_I2C0_SL ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 8. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Not generated,Generated"
|
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bitfld.long 0x04 7. " SIG_ADC_CHANN ,ADC Channel Interrupt Signal" "Not generated,Generated"
|
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bitfld.long 0x04 6. " SIG_FLASH_ctrl ,Flash Control Interrupt Signal" "Not generated,Generated"
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textline " "
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bitfld.long 0x04 5. " SIG_WDT ,Watchdog Timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up Timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 0. " SIG_ALL ,All Interrupts OR'ed Signal" "Not generated,Generated"
|
|
group.long 0x0108--0x010B
|
|
line.long 0x00 "FIQEN,FIQ Enable Mask"
|
|
bitfld.long 0x00 23. " EN_PWM_SYNC ,PWM Sync Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_CMP ,Comparator Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EN_UART ,UART Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EN_SPI_MA ,SPI Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EN_SPI_SL ,SPI Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EN_I2C1_MA ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EN_I2C0_MA ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EN_I2C0_SL ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EN_PLL_LOCK ,PLL Lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EN_ADC_CHANN ,ADC Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_FLASH_CTRL ,Flash Control Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog Timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up Timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_ALL ,All Interrupts OR'ed Enable" "Disabled,Enabled"
|
|
wgroup.long 0x010C--0x010F
|
|
line.long 0x00 "FIQCLR,FIQ Enable Mask Clear"
|
|
bitfld.long 0x00 23. " CLR_PWM_SYNC ,PWM Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " CLR_CMP ,Comparator Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 14. " CLR_UART ,UART Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " CLR_SPI_MA ,SPI Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " CLR_SPI_SL ,SPI Slave Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CLR_I2C1_MA ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " CLR_I2C0_MA ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " CLR_I2C0_SL ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CLR_ADC_CHANN ,ADC Channel Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " CLR_FLASH_CTRL ,Flash Control Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog Timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up Timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " CLR_ALL ,All Interrupts OR'ed Clear" "No effect,Cleared"
|
|
wgroup.long 0x0010--0x0013
|
|
line.long 0x00 "SWICFG,Software Interrupt Config"
|
|
bitfld.long 0x00 2. " PI_FIQ ,Programmed Interrupt-FIQ" "Clear,Set"
|
|
bitfld.long 0x00 1. " PI_IRQ ,Programmed Interrupt-IRQ" "Clear,Set"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7023")
|
|
width 0x08
|
|
rgroup.long 0x0000++0x0007
|
|
line.long 0x00 "IRQSTA,Active IRQ Status"
|
|
bitfld.long 0x00 21. " STA_PWM ,PWM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_CMP ,Comparator Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_I2C1_SL ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " STA_I2C1_MA ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STA_I2C0_SL ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_I2C0_MA ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " STA_PLL_LOCK ,PLL Lock Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STA_ADC_CHANN ,ADC Channel Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_FLASH_CTRL ,Flash Control Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " STA_WDT ,Watchdog Timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
line.long 0x04 "IRQSIG,Current state of all IRQ sources"
|
|
bitfld.long 0x04 21. " SIG_PWM ,PWM Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SIG_PSM ,PSM Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SIG_CMP ,Comparator Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " SIG_SPI ,SPI Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SIG_I2C1_SL ,I2C1 Slave Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " SIG_I2C1_MA ,I2C1 Master Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " SIG_I2C0_SL ,I2C0 Slave Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SIG_I2C0_MA ,I2C0 Master Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " SIG_ADC_CHANN ,ADC Channel Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SIG_FLASH_CTRL ,Flash Control Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " SIG_WDT ,Watchdog Timer - Timer 2 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Disabled,Enabled"
|
|
group.long 0x0008++0x0003
|
|
line.long 0x00 "IRQEN,Enabled IRQ sources"
|
|
bitfld.long 0x00 21. " EN_PWM ,PWM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_CMP ,Comparator Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_I2C1_SL ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EN_I2C1_MA ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EN_I2C0_SL ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_I2C0_MA ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EN_PLL_LOCK ,PLL Lock Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EN_ADC_CHANN ,ADC Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_FLASH_CTRL ,Flash Control Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN_WDT ,Watchdog Timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x000C++0x0003
|
|
line.long 0x00 "IRQCLR,IRQ Enable Mask Clear"
|
|
bitfld.long 0x00 21. " CLR_PWM ,PWM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_CMP ,Comparator Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_I2C1_SL ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " CLR_I2C1_MA ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLR_I2C0_SL ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_I2C0_MA ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLR_ADC_CHANN ,ADC Channel Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_FLASH_CTRL ,Flash Control Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " CLR_WDT ,Watchdog Timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.long 0x0100++0x0007
|
|
line.long 0x00 "FIQSTA,FIQ Status"
|
|
bitfld.long 0x00 21. " STA_PWM ,PWM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_CMP ,Comparator Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_I2C1_SL ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " STA_I2C1_MA ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " STA_I2C0_SL ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_I2C0_MA ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " STA_PLL_LOCK ,PLL Lock Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STA_ADC_CHANN ,ADC Channel Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_FLASH_CTRL ,Flash Control Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " STA_WDT ,Watchdog Timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_ALL ,All Interrupts OR'ed Status" "Not requested,Requested"
|
|
line.long 0x04 "FIQSIG,FIQ Signals"
|
|
bitfld.long 0x04 21. " SIG_PWM ,PWM Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SIG_PSM ,PSM Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " SIG_CMP ,Comparator Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " SIG_SPI ,SPI Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " SIG_I2C1_SL ,I2C1 Slave Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " SIG_I2C1_MA ,I2C1 Master Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " SIG_I2C0_SL ,I2C0 Slave Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SIG_I2C0_MA ,I2C0 Master Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " SIG_ADC_CHANN ,ADC Channel Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SIG_FLASH_CTRL ,Flash Control Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " SIG_WDT ,Watchdog Timer - Timer 2 Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " SIG_ALL ,All Interrupts OR'ed Signal" "Disabled,Enabled"
|
|
group.long 0x0108++0x0003
|
|
line.long 0x00 "FIQEN,FIQ Enable Mask"
|
|
bitfld.long 0x00 21. " EN_PWM ,PWM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_CMP ,Comparator Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_I2C1_SL ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EN_I2C1_MA ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EN_I2C0_SL ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_I2C0_MA ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " EN_PLL_LOCK ,PLL Lock Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " EN_ADC_CHANN ,ADC Channel Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_FLASH_CTRL ,Flash Control Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN_WDT ,Watchdog Timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_ALL ,All Interrupts OR'ed Enable" "Disabled,Enabled"
|
|
wgroup.long 0x010C++0x0003
|
|
line.long 0x00 "FIQCLR,FIQ Enable Mask Clear"
|
|
bitfld.long 0x00 21. " CLR_PWM ,PWM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_CMP ,Comparator Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_I2C1_SL ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " CLR_I2C1_MA ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CLR_I2C0_SL ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_I2C0_MA ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 7. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CLR_ADC_CHANN ,ADC Channel Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_FLASH_CTRL ,Flash Control Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " CLR_WDT ,Watchdog Timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " CLR_ALL ,All Interrupts OR'ed Clear" "No effect,Cleared"
|
|
wgroup.long 0x0010++0x0003
|
|
line.long 0x00 "SWICFG,Software Interrupt Config"
|
|
bitfld.long 0x00 2. " PI_FIQ ,Programmed Interrupt-FIQ" "Clear,Set"
|
|
bitfld.long 0x00 1. " PI_IRQ ,Programmed Interrupt-IRQ" "Clear,Set"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IRQBASE,IRQBASE Register"
|
|
hexmask.long.word 0x00 0.--15. 0x01 " VBR ,Vector base address"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "IRQVEC,IRQVEC Register"
|
|
hexmask.long.tbyte 0x00 7.--22. 0x80 " VALUE ,IRQBASE register value"
|
|
bitfld.long 0x00 2.--6. " PRIO ,Highest priority source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,?..."
|
|
group.long 0x20++0x0B
|
|
line.long 0x00 "IRQP0,IRQ Priority Register 0"
|
|
bitfld.long 0x00 28.--30. " PLLPI ,Priority level for PLL lock interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " ADCPI ,Priority level for ADC interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " FlashPI ,Priority level for Flash controller interrupt" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " T2PI ,Priority level for Timer 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " T1PI ,Priority level for Timer 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T0PI ,Priority level for Timer 0" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " SWINTP ,Priority level for software interrupt" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "IRQP0,IRQ Priority Register 1"
|
|
bitfld.long 0x04 28.--30. " PSMPI ,Priority level for power supply monitor interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " COMPI ,Priority level for comparator" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 20.--22. " IRQ0PI ,Priority level for IRQ0" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " SPIPI ,Priority level for SPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 12.--14. " I2C1SPI ,Priority level for I2C1 slave" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " I2C1MPI ,Priority level for I2C1 master" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " I2C0SPI ,Priority level for I2C0 slave" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " I2C0MPI ,Priority level for I2C0 master" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "IRQP0,IRQ Priority Register 2"
|
|
bitfld.long 0x08 20.--22. " PWMPI ,Priority level for PWM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 16.--18. " PLA1PI ,Priority level for PLA IRQ1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 12.--14. " IRQ3PI ,Priority level for IRQ3" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 8.--10. " IRQ2PI ,Priority level for IRQ2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 4.--6. " PLA0PI ,Priority level for PLA IRQ0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " IRQ1PI ,Priority level for IRQ1" "0,1,2,3,4,5,6,7"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "IRQCONN,IRQ and FIQ control register"
|
|
bitfld.long 0x00 1. " ENFIQN ,Nesting of FIQ interrupts" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENIRQN ,Nesting of IRQ interrupts" "Disabled,Enabled"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "IRQSTAN,IRQSTAN Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IRQSTAN ,Enable nesting of IRQ interrupts"
|
|
rgroup.long 0x011C++0x03
|
|
line.long 0x00 "FIQVEC,FIQ interrupt vector register"
|
|
hexmask.long.tbyte 0x00 7.--22. 0x80 " VALUE ,IRQBASE register value"
|
|
bitfld.long 0x00 2.--6. " PRIO ,Highest priority source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,?..."
|
|
group.long 0x013C++0x03
|
|
line.long 0x00 "FIQSTAN,FIQSTAN Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " FIQSTAN ,Enable nesting of FIQ interrupts"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "IRQCONE,IRQCONE Register"
|
|
bitfld.long 0x00 10.--11. " PLA1SRC[1:0] ,PLA IRQ1 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 8.--9. " IRQ3SRC[1:0] ,External IRQ3 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 6.--7. " IRQ2SRC[1:0] ,External IRQ2 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PLA0SRC[1:0] ,PLA IRQ0 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 2.--3. " IRQ1SRC[1:0] ,External IRQ1 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--1. " IRQ0SRC[1:0] ,External IRQ0 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
line.long 0x04 "IRQCLRE,IRQCLRE Register"
|
|
bitfld.long 0x04 20. " PLA1CLRI ,PLA IRQ1 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x04 19. " IRQ3CLRI ,External IRQ3 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " IRQ2CLRI ,External IRQ2 interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 17. " PLA0CLRI ,PLA IRQ0 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " IRQ1CLRI ,External IRQ1 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " IRQ0CLRI ,External IRQ0 interrupt Clear" "No effect,Cleared"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7121"||cpu()=="ADUC7122")
|
|
width 8.
|
|
rgroup.long 0x0000--0x0007
|
|
line.long 0x00 "IRQSTA,IRQ Status Register"
|
|
bitfld.long 0x00 27. " STA_PLA_IRQ1 ,PLA Block 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " STA_PLA_IRQ0 ,PLA Block 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 25. " STA_XIRQ5 ,External Interrupt 5 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 24. " STA_XIRQ4 ,External Interrupt 4 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_PWM ,PWM trip Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " STA_XIRQ3 ,External Interrupt 3 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STA_XIRQ2 ,External Interrupt 2 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_XIRQ1 ,External Interrupt 1 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " STA_XIRQ0 ,External Interrupt 0 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " STA_UART ,UART Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 8. " STA_PSM ,Power supply monitor Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " STA_IDAC_FAULT ,IDAC fault IRQ" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " STA_TIMER4 ,Timer 4 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "IRQSIG,IRQ Signals Register"
|
|
bitfld.long 0x04 27. " SIG_PLA_IRQ1 ,PLA Block 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 26. " SIG_PLA_IRQ0 ,PLA Block 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 25. " SIG_XIRQ5 ,External Interrupt 5 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 24. " SIG_XIRQ4 ,External Interrupt 4 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_PWM ,PWM trip Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 22. " SIG_XIRQ3 ,External Interrupt 3 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 21. " SIG_XIRQ2 ,External Interrupt 2 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_XIRQ1 ,External Interrupt 1 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 19. " SIG_XIRQ0 ,External Interrupt 0 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 18. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 16. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_SPI ,SPI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 13. " SIG_UART ,UART Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 12. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 10. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 8. " SIG_PSM ,Power supply monitor Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x04 7. " SIG_IDAC_FAULT ,IDAC fault IRQ" "Not generated,Generated"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 6. " SIG_TIMER4 ,Timer 4 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "IRQEN,IRQ Enable Register"
|
|
bitfld.long 0x00 27. " EN_PLA_IRQ1 ,PLA Block 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EN_PLA_IRQ0 ,PLA Block 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " EN_XIRQ5 ,External Interrupt 5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EN_XIRQ4 ,External Interrupt 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_PWM ,PWM trip Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EN_XIRQ3 ,External Interrupt 3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EN_XIRQ2 ,External Interrupt 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_XIRQ1 ,External Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EN_XIRQ0 ,External Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EN_UART ,UART Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EN_PSM ,Power supply monitor Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " EN_IDAC_FAULT ,IDAC fault IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " EN_TIMER4 ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7121")
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_SWI ,SWI Interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x000C--0x000F
|
|
line.long 0x00 "IRQCLR,IRQ Clear Register"
|
|
bitfld.long 0x00 27. " CLR_PLA_IRQ1 ,PLA Block 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " CLR_PLA_IRQ1 ,PLA Block 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " XIRQ5 ,External Interrupt 5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CLR_XIRQ4 ,External Interrupt 4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_PWM ,PWM trip Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " CLR_XIRQ3 ,External Interrupt 3 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 21. " CLR_XIRQ2 ,External Interrupt 2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_XIRQ1 ,External Interrupt 1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " CLR_XIRQ0 ,External Interrupt 0 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " CLR_I2C0_S ,I2C0 Slave0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " CLR_UART ,UART Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLR_PSM ,Power supply monitor Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " CLR_IDAC_FAULT ,IDAC fault IRQ" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " CLR_TIMER4 ,Timer 4 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 1. " CLR_SWI ,SWI Interrupt enable" "No effect,Cleared"
|
|
endif
|
|
rgroup.long 0x0100--0x0107
|
|
line.long 0x00 "FIQSTA,FIQ Status Register"
|
|
bitfld.long 0x00 27. " STA_PLA_IRQ1 ,PLA Block 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " STA_PLA_IRQ0 ,PLA Block 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 25. " STA_XIRQ5 ,External Interrupt 5 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 24. " STA_XIRQ4 ,External Interrupt 4 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_PWM ,PWM trip Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " STA_XIRQ3 ,External Interrupt 3 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " STA_XIRQ2 ,External Interrupt 2 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_XIRQ1 ,External Interrupt 1 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " STA_XIRQ0 ,External Interrupt 0 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " STA_UART ,UART Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 8. " STA_PSM ,Power supply monitor Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " STA_IDAC_FAULT ,IDAC fault IRQ" "Not requested,Requested"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " STA_TIMER4 ,Timer 4 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " STA_FIQ ,FIQ Source Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "FIQSIG,FIQ Signals Register"
|
|
bitfld.long 0x04 27. " SIG_PLA_IRQ1 ,PLA Block 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 26. " SIG_PLA_IRQ0 ,PLA Block 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 25. " SIG_XIRQ5 ,External Interrupt 5 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 24. " SIG_XIRQ4 ,External Interrupt 4 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_PWM ,PWM trip Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 22. " SIG_XIRQ3 ,External Interrupt 3 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 21. " SIG_XIRQ2 ,External Interrupt 2 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_XIRQ1 ,External Interrupt 1 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 19. " SIG_XIRQ0 ,External Interrupt 0 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 18. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 16. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_SPI ,SPI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 13. " SIG_UART ,UART Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 12. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 10. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 8. " SIG_PSM ,Power supply monitor Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x04 7. " SIG_IDAC_FAULT ,IDAC fault IRQ" "Not generated,Generated"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 6. " SIG_TIMER4 ,Timer 4 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 0. " SIG_FIQ ,FIQ Source Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0108--0x010B
|
|
line.long 0x00 "FIQEN,FIQ Enable Register"
|
|
bitfld.long 0x00 27. " EN_PLA_IRQ1 ,PLA Block 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EN_PLA_IRQ0 ,PLA Block 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " EN_XIRQ5 ,External Interrupt 5 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " EN_XIRQ4 ,External Interrupt 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_PWM ,PWM trip Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " EN_XIRQ3 ,External Interrupt 3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EN_XIRQ2 ,External Interrupt 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_XIRQ1 ,External Interrupt 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " EN_XIRQ0 ,External Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EN_UART ,UART Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EN_PSM ,Power supply monitor Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " EN_IDAC_FAULT ,IDAC fault IRQ" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " EN_TIMER4 ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 1. " EN_SWI ,SWI Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " EN_FIQ ,FIQ Source Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x010C--0x010F
|
|
line.long 0x00 "FIQCLR,FIQ Clear Registr"
|
|
bitfld.long 0x00 27. " CLR_PLA_IRQ1 ,PLA Block 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " CLR_PLA_IRQ1 ,PLA Block 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " XIRQ5 ,External Interrupt 5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CLR_XIRQ4 ,External Interrupt 4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_PWM ,PWM trip Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " CLR_XIRQ3 ,External Interrupt 3 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 21. " CLR_XIRQ2 ,External Interrupt 2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_XIRQ1 ,External Interrupt 1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " CLR_XIRQ0 ,External Interrupt 0 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " CLR_I2C0_S ,I2C0 Slave0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " CLR_UART ,UART Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 12. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLR_PSM ,Power supply monitor Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 7. " CLR_IDAC_FAULT ,IDAC fault IRQ" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " CLR_TIMER4 ,Timer 4 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 1. " CLR_SWI ,SWI Interrupt enable" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " CLR_FIQ ,FIQ Source Interrupt Clear" "No effect,Cleared"
|
|
wgroup.long 0x0010--0x0013
|
|
line.long 0x00 "SWICFG,Software Interrupt Config"
|
|
bitfld.long 0x00 2. " PI_FIQ ,Programmed Interrupt-FIQ" "Clear,Set"
|
|
bitfld.long 0x00 1. " PI_IRQ ,Programmed Interrupt-IRQ" "Clear,Set"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IRQBASE,Vector base register"
|
|
hexmask.long.word 0x00 0.--15. 1. " VBR ,Vector base address"
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.long 0x1C++0x03
|
|
else
|
|
group.long 0x1C++0x03
|
|
endif
|
|
line.long 0x00 "IRQVEC,IRQ interrupt vector register"
|
|
hexmask.long 0x00 7.--22. 0x80 " VALUE ,IRQBASE register value"
|
|
bitfld.long 0x00 2.--6. " PRIO ,Highest priority IRQ source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..."
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "IRQP0,IRQ Priority Register 0"
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 28.--30. " IDAC_FAULT ,A priority level for IDAC fault interrupt" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 24.--26. " T4PI ,A priority level for Timer 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " T3PI ,A priority level for Timer 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " T2PI ,A priority level for Timer 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " T1PI ,A priority level for Timer 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T0PI ,A priority level for Timer 0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " SWINTP ,A priority level for software interrupt" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "IRQP1,IRQ Priority Register 1"
|
|
bitfld.long 0x04 28.--30. " I2C0MPI ,A priority level for I2C0 master" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " SPIPI ,A priority level for SPI" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 20.--22. " UARTPI ,A priority level for UART" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " ADCPI ,A priority level for ADC" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 12.--14. " Flash1PI ,A priority level for Flash Block 1 controller" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " Flash0PI ,A priority level for Flash Block 0 controller" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PSMPI ,A priority level for Power supply monitor" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "IRQP2,IRQ Priority Register 2"
|
|
bitfld.long 0x08 28.--30. " PWMPI ,A priority level for PWM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 24.--26. " IRQ3PI ,A priority level for IRQ3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 20.--22. " IRQ2PI ,A priority level for IRQ2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " IRQ1PI ,A priority level for IRQ1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 12.--14. " IRQ0PI ,A priority level for IRQ0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " I2C1SPI ,A priority level for I2C1 slave" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " I2C1MPI ,A priority level for I2C1 master" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " I2C0SPI ,A priority level for I2C0 slave" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0C "IRQP3,IRQ Priority Register 3"
|
|
bitfld.long 0x0C 12.--14. " PLA1PI ,A priority level for PLA1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 8.--10. " PLA0PI ,A priority level for PLA0" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x0C 4.--6. " IRQ5PI ,A priority level for IRQ5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 0.--2. " IRQ4PI ,A priority level for IRQ4" "0,1,2,3,4,5,6,7"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "IRQCONN,IRQ and FIQ control register"
|
|
bitfld.byte 0x00 1. " ENFIQN ,Nesting of FIQ interrupts" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENIRQN ,Nesting of IRQ interrupts" "Disabled,Enabled"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "IRQSTAN,IRQSTAN Register"
|
|
hexmask.byte 0x00 0.--7. 1. " IRQSTAN ,Enable nesting of IRQ interrupts"
|
|
rgroup.long 0x011C++0x03
|
|
line.long 0x00 "FIQVEC,FIQ interrupt vector register"
|
|
hexmask.long 0x00 7.--22. 0x80 " VALUE ,IRQBASE register value"
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 2.--6. " PRIO ,Highest priority source" "0,1,2,3,4,5,6,7,8,Reserved,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..."
|
|
else
|
|
bitfld.long 0x00 2.--6. " PRIO ,Highest priority source" "0,1,2,3,4,5,6,Reserved,8,Reserved,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..."
|
|
endif
|
|
group.byte 0x013C++0x00
|
|
line.byte 0x00 "FIQSTAN,FIQSTAN Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIQSTAN ,Enable nesting of FIQ interrupts"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IRQCONE,IRQCONE Register"
|
|
bitfld.long 0x00 10.--11. " IRQ5SRC[1:0] ,External IRQ5 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 8.--9. " IRQ4SRC[1:0] ,External IRQ4 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 6.--7. " IRQ3SRC[1:0] ,External IRQ3 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " IRQ2SRC[1:0] ,External IRQ2 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 2.--3. " IRQ1SRC[1:0] ,External IRQ1 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--1. " IRQ0SRC[1:0] ,External IRQ0 trigger" "High level,Low level,Rising edge,Falling edge"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "IRQCLRE,IRQCLRE Register"
|
|
bitfld.long 0x00 25. " IRQ5CLRI ,External IRQ5 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " IRQ4CLRI ,External IRQ4 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " IRQ3CLRI ,External IRQ3 interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQ2CLRI ,External IRQ2 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " IRQ1CLRI ,External IRQ1 interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " IRQ0CLRI ,External IRQ0 interrupt Clear" "No effect,Cleared"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7124")
|
|
width 0x09
|
|
rgroup.long 0x0000--0x0007
|
|
line.long 0x00 "IRQSTA,IRQ Status Register"
|
|
bitfld.long 0x00 25. " STA_PWM ,PWM trip interrupt source Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_XIRQ3 ,External Interrupt 3 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STA_XIRQ2 ,External Interrupt 2 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " SSTA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_XIRQ1 ,External Interrupt 1 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STA_PSM ,Power supply monitor Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " STA_CMP ,Voltage comparator source Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_XIRQ0 ,External Interrupt 0 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_PLL_LOCK ,PLL lock Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STA_UART1 ,UART1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " STA_UART0 ,UART0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "IRQSIG,IRQ Signals Register"
|
|
bitfld.long 0x04 25. " SIG_PWM ,PWM trip interrupt source Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 24. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_XIRQ3 ,External Interrupt 3 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SIG_XIRQ2 ,External Interrupt 2 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 21. " SSIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_XIRQ1 ,External Interrupt 1 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SIG_PSM ,Power supply monitor Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 18. " SIG_CMP ,Voltage comparator source Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_XIRQ0 ,External Interrupt 0 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SIG_SPI ,SPI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 15. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 12. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_PLL_LOCK ,PLL lock Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SIG_UART1 ,UART1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 9. " SIG_UART0 ,UART0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 8. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 6. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "IRQEN,IRQ Enable Register"
|
|
bitfld.long 0x00 25. " EN_PWM ,PWM trip interrupt source Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_XIRQ3 ,External Interrupt 3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EN_XIRQ2 ,External Interrupt 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_XIRQ1 ,External Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_PSM ,Power supply monitor Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_CMP ,Voltage comparator source Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_XIRQ0 ,External Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_PLL_LOCK ,PLL lock Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EN_UART1 ,UART1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EN_UART0 ,UART0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_SWI ,SWI Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x000C--0x000F
|
|
line.long 0x00 "IRQCLR,IRQ Clear Register"
|
|
bitfld.long 0x00 25. " CLR_PWM ,PWM trip interrupt source Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_XIRQ3 ,External Interrupt 3 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLR_XIRQ2 ,External Interrupt 2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " SCLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_XIRQ1 ,External Interrupt 1 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLR_PSM ,Power supply monitor Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " CLR_CMP ,Voltage comparator source Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_XIRQ0 ,External Interrupt 0 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLR_I2C0_S ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_PLL_LOCK ,PLL lock Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_UART1 ,UART1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " CLR_UART0 ,UART0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
rgroup.long 0x0100--0x0107
|
|
line.long 0x00 "FIQSTA,FIQ Status Register"
|
|
bitfld.long 0x00 25. " STA_PWM ,PWM trip interrupt source Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_XIRQ3 ,External Interrupt 3 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STA_XIRQ2 ,External Interrupt 2 Status" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " SSTA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_XIRQ1 ,External Interrupt 1 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STA_PSM ,Power supply monitor Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " STA_CMP ,Voltage comparator source Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_XIRQ0 ,External Interrupt 0 Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STA_SPI ,SPI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_PLL_LOCK ,PLL lock Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STA_UART1 ,UART1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " STA_UART0 ,UART0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " STA_FIQ ,FIQ Source Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "FIQSIG,FIQ Signals Register"
|
|
bitfld.long 0x04 25. " SIG_PWM ,PWM trip interrupt source Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 24. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_XIRQ3 ,External Interrupt 3 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SIG_XIRQ2 ,External Interrupt 2 Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 21. " SSIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_XIRQ1 ,External Interrupt 1 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SIG_PSM ,Power supply monitor Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 18. " SIG_CMP ,Voltage comparator source Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_XIRQ0 ,External Interrupt 0 Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SIG_SPI ,SPI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 15. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 12. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_PLL_LOCK ,PLL lock Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SIG_UART1 ,UART1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 9. " SIG_UART0 ,UART0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 8. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 6. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 0. " SIG_FIQ ,FIQ Source Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0108--0x010B
|
|
line.long 0x00 "FIQEN,FIQ Enable Register"
|
|
bitfld.long 0x00 25. " EN_PWM ,PWM trip interrupt source Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_XIRQ3 ,External Interrupt 3 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EN_XIRQ2 ,External Interrupt 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SEN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_XIRQ1 ,External Interrupt 1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_PSM ,Power supply monitor Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_CMP ,Voltage comparator source Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_XIRQ0 ,External Interrupt 0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_SPI ,SPI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_PLL_LOCK ,PLL lock Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EN_UART1 ,UART1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EN_UART0 ,UART0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN_SWI ,SWI Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN_FIQ ,FIQ Source Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x010C--0x010F
|
|
line.long 0x00 "FIQCLR,FIQ Clear Registr"
|
|
bitfld.long 0x00 25. " CLR_PWM ,PWM trip interrupt source Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_XIRQ3 ,External Interrupt 3 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLR_XIRQ2 ,External Interrupt 2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " SCLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_XIRQ1 ,External Interrupt 1 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLR_PSM ,Power supply monitor Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " CLR_CMP ,Voltage comparator source Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_XIRQ0 ,External Interrupt 0 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLR_SPI ,SPI Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLR_I2C0_S ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_PLL_LOCK ,PLL lock Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_UART1 ,UART1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " CLR_UART0 ,UART0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLR_FIQ ,FIQ Source Interrupt Clear" "No effect,Cleared"
|
|
wgroup.long 0x0010--0x0013
|
|
line.long 0x00 "SWICFG,Software Interrupt Config"
|
|
bitfld.long 0x00 2. " PI_FIQ ,Programmed Interrupt-FIQ" "Clear,Set"
|
|
bitfld.long 0x00 1. " PI_IRQ ,Programmed Interrupt-IRQ" "Clear,Set"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IRQBASE,IRQBASE Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BASE ,Vector base address"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "IRQVEC,IRQVEC Register"
|
|
hexmask.long.tbyte 0x00 7.--22. 0x80 " BASE ,IRQBASE register value"
|
|
bitfld.long 0x00 2.--6. " HPS ,Highest priority source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..."
|
|
group.long 0x20++0x0f "Priority Registers"
|
|
line.long 0x00 "IRQP0,Interrupt Priority Register 0"
|
|
bitfld.long 0x00 28.--30. " FLASH1PI ,A priority level for Flash Block 1 controller interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " FLASH0PI ,A priority level for Flash Block 0 controller interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " T3PI ,A priority level for Timer 3 interrupt" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " T2PI ,A priority level for Timer 2 interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " T1PI ,A priority level for Timer 1 interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " T0PI ,A priority level for Timer 0 interrupt" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " SWINTP ,A priority level for software interrupt" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "IRQP1,Interrupt Priority Register 1"
|
|
bitfld.long 0x04 28.--30. " I2C1SPI ,A priority level for I2C1 slave" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " I2C1MPI ,A priority level for I2C1 master" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 20.--22. " I2C0SPI ,A priority level for I2C0 slave" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " I2C0MPI ,A priority level for I2C 0 master" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 12.--14. " PLLPI ,A priority level for PLL lock interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 8.--10. " UART1PI ,A priority level for UART 1" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " UART0PI ,A priority level for UART 0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " ADCPI ,A priority level for ADC interrupt" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "IRQP2,Interrupt Priority Register 2"
|
|
bitfld.long 0x08 28.--30. " IRQ3PI ,A priority level for IRQ3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 24.--26. " IRQ2PI ,A priority level for IRQ2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 20.--22. " PLA0PI ,A priority level for PLA IRQ0" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 16.--18. " IRQ1PI ,A priority level for IRQ1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 12.--14. " PSMPI ,A priority level for power supply monitor interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " COMPI ,A priority level for comparator" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " IRQ0PI ,A priority level for IRQ0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " SPIPI ,A priority level for SPI" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "IRQP3,Interrupt Priority Register 3"
|
|
bitfld.long 0x0C 4.--6. " PWMPI ,A priority level for PWM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 0.--2. " PLA1PI ,A priority level for PLA IRQ1" "0,1,2,3,4,5,6,7"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "IRQCONN,IRQ and FIQ control register"
|
|
bitfld.byte 0x00 1. " ENFIQN ,Nesting of FIQ interrupts enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENIRQN ,Nesting of IRQ interrupts enable" "Disabled,Enabled"
|
|
group.byte 0x3c++0x00
|
|
line.byte 0x00 "IRQSTAN,IRQSTAN Register"
|
|
bitfld.byte 0x00 7. " P7 ,IRQ inerrupt priority level 7" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P6 ,IRQ inerrupt priority level 6" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P5 ,IRQ inerrupt priority level 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,IRQ inerrupt priority level 4" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " P3 ,IRQ inerrupt priority level 3" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P2 ,IRQ inerrupt priority level 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P1 ,IRQ inerrupt priority level 1" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P0 ,IRQ inerrupt priority level 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x11c++0x03
|
|
line.long 0x00 "FIQVEC,FIQ interrupt vector register"
|
|
hexmask.long.tbyte 0x00 7.--22. 0x80 " BASE ,IRQBASE register value"
|
|
bitfld.long 0x00 2.--6. " HPS ,Highest priority source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..."
|
|
group.byte 0x13c++0x00
|
|
line.byte 0x00 "FIQSTAN,FIQSTAN Register"
|
|
bitfld.byte 0x00 7. " P7 ,FIQ inerrupt priority level 7" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " P6 ,FIQ inerrupt priority level 6" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 5. " P5 ,FIQ inerrupt priority level 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,FIQ inerrupt priority level 4" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " P3 ,FIQ inerrupt priority level 3" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " P2 ,FIQ inerrupt priority level 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P1 ,FIQ inerrupt priority level 1" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " P0 ,FIQ inerrupt priority level 0" "No interrupt,Interrupt"
|
|
group.long 0x34++0x03 "External Interrupts and PLA interrupts"
|
|
line.long 0x00 "IRQCONE,IRQCONE Register"
|
|
bitfld.long 0x00 10.--11. " PLA1SRC ,PLA IRQ1 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 8.--9. " IRQ3SRC ,External IRQ3 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 6.--7. " IRQ2SRC ,External IRQ2 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " PLA0SRC ,PLA IRQ0 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 2.--3. " IRQ1SRC ,External IRQ1 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
bitfld.long 0x00 0.--1. " IRQ0SRC ,External IRQ0 trigger select" "High level,Low level,Rising edge,Falling edge"
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "IRQCLRE,External Interrupts Clear Register"
|
|
bitfld.long 0x00 24. " PLA1CLRI ,PLA IRQ1 interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IRQ3CLRI ,External IRQ3 interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IRQ2CLRI ,External IRQ2 interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PLA0CLRI ,PLA IRQ0 interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IRQ1CLRI ,External IRQ1 interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IRQ0CLRI ,External IRQ0 interrupt clear" "No effect,Clear"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
width 0x08
|
|
rgroup.long 0x0000--0x0007
|
|
line.long 0x00 "IRQSTA,IRQ Status Register"
|
|
bitfld.long 0x00 28. " STA_PLL_LOCK ,PLL Lock Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " STA_PWM ,PWM Trip Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_COMP ,Comparator Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " STA_UART1 ,UART 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_UART0 ,UART 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STA_SPI_M ,SPI Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " STA_SPI_S ,SPI Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STA_Q_E ,Quadrature Encoder Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " STA_TIMER4 ,Timer 4 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " STA_FIQ ,FIQ Source Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x04++0x03
|
|
line.long 0x04 "IRQSIG,IRQ Signals Register"
|
|
bitfld.long 0x04 28. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 27. " SIG_PWM ,PWM Trip Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 26. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 24. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 21. " SIG_PSM ,PSM Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_COMP ,Comparator Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 18. " SIG_UART1 ,UART 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_UART0 ,UART 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SIG_SPI_M ,SPI Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 15. " SIG_SPI_S ,SPI Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 12. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SIG_Q_E ,Quadrature Encoder Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 9. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 8. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 6. " SIG_TIMER4 ,Timer 4 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 0. " SIG_FIQ ,FIQ Source Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "IRQEN,IRQ Enable Register"
|
|
bitfld.long 0x00 28. " EN_PLL_LOCK ,PLL Lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EN_PWM ,PWM Trip Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_COMP ,Comparator Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_UART1 ,UART 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_UART0 ,UART 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_SPI_M ,SPI Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EN_SPI_S ,SPI Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EN_Q_E ,Quadrature Encoder Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_TIMER4 ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN_FIQ ,FIQ Source Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x000C--0x000F
|
|
line.long 0x00 "IRQCLR,IRQ Clear Register"
|
|
bitfld.long 0x00 28. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 27. " CLR_PWM ,PWM Trip Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_COMP ,Comparator Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " CLR_UART1 ,UART 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_UART0 ,UART 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLR_SPI_M ,SPI Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " CLR_SPI_S ,SPI Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_I2C0_S ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_Q_E ,Quadrature Encoder Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " CLR_TIMER4 ,Timer 4 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLR_FIQ ,FIQ Source Interrupt Clear" "No effect,Cleared"
|
|
rgroup.long 0x0100--0x0107
|
|
line.long 0x00 "FIQSTA,FIQ Status Register"
|
|
bitfld.long 0x00 28. " STA_PLL_LOCK ,PLL Lock Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " STA_PWM ,PWM Trip Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " STA_EXT_IRQ3 ,External IRQ3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " STA_EXT_IRQ2 ,External IRQ2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " STA_PLA_IRQ1 ,PLA IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " STA_PLA_IRQ0 ,PLA IRQ0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " STA_EXT_IRQ1 ,External IRQ1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " STA_PSM ,PSM Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " STA_COMP ,Comparator Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " STA_EXT_IRQ0 ,External IRQ0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " STA_UART1 ,UART 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " STA_UART0 ,UART 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " STA_SPI_M ,SPI Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " STA_SPI_S ,SPI Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " STA_I2C1_M ,I2C1 Master Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STA_I2C0_M ,I2C0 Master Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " STA_I2C1_S ,I2C1 Slave Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " STA_I2C0_S ,I2C0 Slave Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STA_Q_E ,Quadrature Encoder Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " STA_ADC ,ADC Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " STA_FLASH1 ,Flash Controler 1 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STA_FLASH0 ,Flash Controler 0 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " STA_TIMER4 ,Timer 4 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " STA_WDT ,Watchdog timer - Timer 3 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STA_WUT ,Wake Up timer - Timer 2 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " STA_TIMER1 ,Timer 1 Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " STA_TIMER0 ,Timer 0 Interrupt Status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STA_SWI ,SWI Interrupt Status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " STA_FIQ ,FIQ Source Interrupt Status" "Not requested,Requested"
|
|
;rgroup 0x104++0x03
|
|
line.long 0x04 "FIQSIG,FIQ Signals Register"
|
|
bitfld.long 0x04 28. " SIG_PLL_LOCK ,PLL Lock Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 27. " SIG_PWM ,PWM Trip Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 26. " SIG_EXT_IRQ3 ,External IRQ3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SIG_EXT_IRQ2 ,External IRQ2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 24. " SIG_PLA_IRQ1 ,PLA IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 23. " SIG_PLA_IRQ0 ,PLA IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SIG_EXT_IRQ1 ,External IRQ1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 21. " SIG_PSM ,PSM Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 20. " SIG_COMP ,Comparator Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SIG_EXT_IRQ0 ,External IRQ0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 18. " SIG_UART1 ,UART 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 17. " SIG_UART0 ,UART 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SIG_SPI_M ,SPI Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 15. " SIG_SPI_S ,SPI Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 14. " SIG_I2C1_M ,I2C1 Master Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SIG_I2C0_M ,I2C0 Master Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 12. " SIG_I2C1_S ,I2C1 Slave Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 11. " SIG_I2C0_S ,I2C0 Slave Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SIG_Q_E ,Quadrature Encoder Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 9. " SIG_ADC ,ADC Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 8. " SIG_FLASH1 ,Flash Controler 1 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SIG_FLASH0 ,Flash Controler 0 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 6. " SIG_TIMER4 ,Timer 4 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 5. " SIG_WDT ,Watchdog timer - Timer 3 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SIG_WUT ,Wake Up timer - Timer 2 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 3. " SIG_TIMER1 ,Timer 1 Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 2. " SIG_TIMER0 ,Timer 0 Interrupt Signal" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SIG_SWI ,SWI Interrupt Signal" "Not generated,Generated"
|
|
bitfld.long 0x04 0. " SIG_FIQ ,FIQ Source Interrupt Signal" "Not generated,Generated"
|
|
group.long 0x0108--0x010B
|
|
line.long 0x00 "FIQEN,FIQ Enable Register"
|
|
bitfld.long 0x00 28. " EN_PLL_LOCK ,PLL Lock Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EN_PWM ,PWM Trip Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EN_EXT_IRQ3 ,External IRQ3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EN_EXT_IRQ2 ,External IRQ2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EN_PLA_IRQ1 ,PLA IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EN_PLA_IRQ0 ,PLA IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EN_EXT_IRQ1 ,External IRQ1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EN_PSM ,PSM Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EN_COMP ,Comparator Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EN_EXT_IRQ0 ,External IRQ0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EN_UART1 ,UART 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EN_UART0 ,UART 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_SPI_M ,SPI Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EN_SPI_S ,SPI Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EN_I2C1_M ,I2C1 Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EN_I2C0_M ,I2C0 Master Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EN_I2C1_S ,I2C1 Slave Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EN_I2C0_S ,I2C0 Slave Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EN_Q_E ,Quadrature Encoder Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EN_ADC ,ADC Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EN_FLASH1 ,Flash Controler 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EN_FLASH0 ,Flash Controler 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EN_TIMER4 ,Timer 4 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN_WDT ,Watchdog timer - Timer 3 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EN_WUT ,Wake Up timer - Timer 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN_TIMER1 ,Timer 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN_TIMER0 ,Timer 0 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN_FIQ ,FIQ Source Interrupt Enable" "Disabled,Enabled"
|
|
wgroup.long 0x010C--0x010F
|
|
line.long 0x00 "FIQCLR,FIQ Clear Registr"
|
|
bitfld.long 0x00 28. " CLR_PLL_LOCK ,PLL Lock Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 27. " CLR_PWM ,PWM Trip Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " CLR_EXT_IRQ3 ,External IRQ3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CLR_EXT_IRQ2 ,External IRQ2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " CLR_PLA_IRQ1 ,PLA IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " CLR_PLA_IRQ0 ,PLA IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CLR_EXT_IRQ1 ,External IRQ1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " CLR_PSM ,PSM Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " CLR_COMP ,Comparator Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CLR_EXT_IRQ0 ,External IRQ0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " CLR_UART1 ,UART 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " CLR_UART0 ,UART 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CLR_SPI_M ,SPI Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " CLR_SPI_S ,SPI Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " CLR_I2C1_M ,I2C1 Master Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLR_I2C0_M ,I2C0 Master Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " CLR_I2C1_S ,I2C1 Slave Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " CLR_I2C0_S ,I2C0 Slave Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CLR_Q_E ,Quadrature Encoder Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " CLR_ADC ,ADC Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " CLR_FLASH1 ,Flash Controler 1 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CLR_FLASH0 ,Flash Controler 0 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " CLR_TIMER4 ,Timer 4 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " CLR_WDT ,Watchdog timer - Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLR_WUT ,Wake Up timer - Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " CLR_TIMER1 ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " CLR_TIMER0 ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLR_FIQ ,FIQ Source Interrupt Clear" "No effect,Cleared"
|
|
wgroup.long 0x0010--0x0013
|
|
line.long 0x00 "SWICFG,Software Interrupt Config"
|
|
bitfld.long 0x00 2. " PI_FIQ ,Programmed Interrupt-FIQ" "Clear,Set"
|
|
bitfld.long 0x00 1. " PI_IRQ ,Programmed Interrupt-IRQ" "Clear,Set"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "System Control"
|
|
base ad:0xFFFF0200
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7023"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029"||cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7124")
|
|
width 0x0B
|
|
group.byte 0x020--0x020
|
|
line.byte 0x00 "REMAP,SRAM Remap"
|
|
sif (cpu()!="ADUC7122"&&cpu()!="ADUC7124")
|
|
bitfld.byte 0x00 4. " SFEE ,Flash/EE Memory Available Size" "Not only 32 kB,Only 32 kB"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SMA ,SRAM Memory Available Size" "Not only 4 kB,Only 4 kB"
|
|
sif (cpu()=="ADUC7023")
|
|
textline " "
|
|
bitfld.byte 0x00 1.--2. " JTAFO ,P0.1/P0.2/P0.3 pins configuration" "JTAG,Reserved,GPIO,GPIO"
|
|
endif
|
|
textline " "
|
|
endif
|
|
bitfld.byte 0x00 0. " REMAP ,Set by the user to remap the SRAM to address 0x00000000" "Not remapped,Remapped"
|
|
rgroup.byte 0x030--0x030
|
|
line.byte 0x00 "RSTSTA,Reset Status"
|
|
bitfld.byte 0x00 2. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " WDT ,Watchdog Timeout" "No timeout,Timeout"
|
|
bitfld.byte 0x00 0. " POR ,Power-on-reset" "No reset,Reset"
|
|
wgroup.byte 0x034--0x034
|
|
line.byte 0x00 "RSTCLR,Reset Status Clear"
|
|
bitfld.byte 0x00 2. " SWRC ,Software Reset Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 1. " WDTC ,Watchdog Timeout Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " PORC ,Power-on-reset Clear" "No effect,Cleared"
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7122"||cpu()=="ADUC7124")
|
|
group.byte 0x4C++0x00
|
|
line.byte 0x00 "RSTCFG,RSTCFG Register"
|
|
bitfld.byte 0x00 2. " DAC ,DAC pin configuration" "Return,Retain"
|
|
bitfld.byte 0x00 0. " GPIO ,GPIO pin configuration" "Return,Retain"
|
|
wgroup.byte 0x48++0x00
|
|
line.byte 0x00 "RSTKEY0, RSTKEY0 Register"
|
|
wgroup.byte 0x50++0x00
|
|
line.byte 0x00 "RSTKEY1, RSTKEY1 Register"
|
|
endif
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
width 8.
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "REMAP,REMAP Register"
|
|
bitfld.byte 0x00 0. " REMAP ,Set by the User to Remap the SRAM to Address 0x00000000" "Not remapped,Remapped"
|
|
rgroup.byte 0x30++0x00
|
|
line.byte 0x00 "RSTSTA,Reset Source Register"
|
|
bitfld.byte 0x00 2. " SWR ,Software Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " WDT ,Watchdog Timeout" "No timeout,Timeout"
|
|
bitfld.byte 0x00 0. " POR ,Power-On Reset" "No reset,Reset"
|
|
wgroup.byte 0x34++0x00
|
|
line.byte 0x00 "RSTCLR,Reset Clear Register"
|
|
bitfld.byte 0x00 2. " SWRC ,Software Reset Clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 1. " WDTC ,Watchdog Timeout Clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 0. " PORC ,Power-On Reset Clear" "Not cleared,Cleared"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Timers"
|
|
base ad:0xFFFF0300
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7023"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029"||cpu()=="ADUC7124")
|
|
tree "Timer 0 - RTOS Timer"
|
|
width 0x08
|
|
group.word 0x0000--0x0001
|
|
line.word 0x00 "T0LD,Timer 0 Load Register"
|
|
rgroup.word 0x0004--0x0005
|
|
line.word 0x00 "T0VAL,Timer 0 Value Register"
|
|
group.word 0x0008--0x0009
|
|
line.word 0x00 "T0CON,Timer 0 Control"
|
|
bitfld.word 0x00 7. " ENA ,Timer0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MODE ,Timer 0 Mode" "Free-running,Periodic"
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7124")
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " CLK_SEL ,Clock select" "HCLK,UCLK,Internal 32768 Hz,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " PRESCALE ,Prescale" "Core clock,Core clock/16,Core clock/256,Undefined"
|
|
wgroup.byte 0x000C--0x000C
|
|
line.byte 0x00 "T0CLRI,Timer 0 Clear Register"
|
|
tree.end
|
|
tree "Timer 1 - General-Purpose Timer"
|
|
width 0x08
|
|
group.long 0x0020--0x0023
|
|
line.long 0x00 "T1LD,Timer 1 Load Register"
|
|
rgroup.long 0x0024--0x0027
|
|
line.long 0x00 "T1VAL,Timer 1 Value Register"
|
|
group.long 0x0028--0x002b
|
|
line.long 0x00 "T1CON,Timer 1 Control Register"
|
|
bitfld.long 0x00 17. " EVENT_SEL ,Event Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--16. " EVENT_RANGE ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.long 0x00 9.--11. " CLOCK_SELECT ,Clock select" "HCLK,External 32.768kHz,UCLK,P1.1 raising,?..."
|
|
elif (cpu()=="ADUC7124")
|
|
bitfld.long 0x00 9.--11. " CLOCK_SELECT ,Clock select" "Core clock,32.768kHz,UCLK,P1.0 raising,?..."
|
|
else
|
|
bitfld.long 0x00 9.--11. " CLOCK_SELECT ,Clock select" "HCLK,External 32.768kHz,P1.0 raising,P0.6 raising,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 8. " COUNT_UP ,Count up" "Count down,Count up"
|
|
bitfld.long 0x00 7. " ENA ,Timer1 Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MODE ,Timer 1 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FORMAT ,Format" "Binary,Reserved,23 hours to 0 hour,255 hours to 0 hour"
|
|
bitfld.long 0x00 0.--3. " PRESCALE ,Prescale" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32768"
|
|
wgroup.byte 0x002C--0x002C
|
|
line.byte 0x00 "T1CLRI,Timer 1 Clear Register"
|
|
group.long 0x0030--0x0033
|
|
line.long 0x00 "T1CAP,Timer 1 Capture Register"
|
|
tree.end
|
|
sif (cpu()!="ADUC7023")
|
|
tree "Timer 2 - Wake-Up Timer"
|
|
width 0x08
|
|
group.long 0x0040--0x0043
|
|
line.long 0x00 "T2LD,Timer 2 Load Register"
|
|
rgroup.long 0x0044--0x0047
|
|
line.long 0x00 "T2VAL,Timer 2 Value Register"
|
|
group.word 0x0048--0x0049
|
|
line.word 0x00 "T2CON,Timer 2 Control Register"
|
|
bitfld.word 0x00 9.--10. " CS ,Clock Source" "External,External,Internal,Core clock"
|
|
bitfld.word 0x00 8. " COUNT_UP ,Count up" "Count down,Count up"
|
|
bitfld.word 0x00 7. " ENA ,Timer 2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MODE ,Timer 2 Mode" "Free-running,Periodic"
|
|
bitfld.word 0x00 4.--5. " FORMAT ,Format" "Binary,Reserved,23 hours to 0 hour,255 hours to 0 hour"
|
|
bitfld.word 0x00 0.--3. " PRESCALE ,Prescale" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32768"
|
|
wgroup.byte 0x004C--0x004C
|
|
line.byte 0x00 "T2CLRI,Timer 2 Clear Register"
|
|
tree.end
|
|
tree "Timer 3 - Watchdog Timer"
|
|
width 0x08
|
|
group.word 0x0060--0x0061
|
|
line.word 0x00 "T3LD,Timer 3 Load Register"
|
|
rgroup.word 0x0064--0x0065
|
|
line.word 0x00 "T3VAL,Timer 3 Value Register"
|
|
group.word 0x0068--0x0069
|
|
line.word 0x00 "T3CON,Timer 3 Control Register"
|
|
bitfld.word 0x00 8. " COUNT_UP ,Count up" "Count down,Count up"
|
|
bitfld.word 0x00 7. " ENA ,Timer 3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MODE ,Timer 3 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WD_ENA ,Watchdog Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SEC_CLR ,Secure Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " PRESCALE ,Prescale" "Source clock,Source clock/16,Source clock/256,Source clock"
|
|
textline " "
|
|
bitfld.word 0x00 1. " WD_IRQ_OPT ,Watchdog IRQ Option" "Disabled,Enabled"
|
|
wgroup.byte 0x006C--0x006C
|
|
line.byte 0x00 "T3CLRI,Timer 3 Clear Register"
|
|
tree.end
|
|
else
|
|
tree "Timer 2 - Watchdog Timer"
|
|
width 0x08
|
|
group.word 0x0060--0x0061
|
|
line.word 0x00 "T2LD,Timer 2 Load Register"
|
|
rgroup.word 0x0064--0x0065
|
|
line.word 0x00 "T2VAL,Timer 2 Value Register"
|
|
group.word 0x0068--0x0069
|
|
line.word 0x00 "T2CON,Timer 2 Control Register"
|
|
bitfld.word 0x00 8. " COUNT_UP ,Count up" "Count down,Count up"
|
|
bitfld.word 0x00 7. " ENA ,Timer 2 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MODE ,Timer 2 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WD_ENA ,Watchdog Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SEC_CLR ,Secure Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " PRESCALE ,Prescale" "Source clock,Source clock/16,Source clock/256,Source clock"
|
|
textline " "
|
|
bitfld.word 0x00 1. " WD_IRQ_OPT ,Watchdog IRQ Option" "Disabled,Enabled"
|
|
wgroup.byte 0x006C--0x006C
|
|
line.byte 0x00 "T2CLRI,Timer 2 Clear Register"
|
|
tree.end
|
|
endif
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
tree "Timer 0 - Life-Time Timer"
|
|
width 0x08
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "T0VAL0,Timer 0 Value 0 Register"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "T0VAL1,Timer 0 Value 1 Register"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "T0CON,Timer 0 Control Register"
|
|
bitfld.long 0x00 17. " ES ,Event Select" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7121"||cpu()=="ADUC7122")
|
|
bitfld.long 0x00 12.--16. " ESR ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,?..."
|
|
bitfld.long 0x00 9.--10. " CS ,Clock select" "Internal 32 kHz,UCLK,External 32 kHz,HCLK"
|
|
else
|
|
bitfld.long 0x00 12.--16. " ESR ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 8. " CU ,Count up" "Down,Up"
|
|
bitfld.long 0x00 7. " T0E ,Timer 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T0M ,Timer 0 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TOMO ,Timer 0 Mode of Operation" "16-bit,48-bit"
|
|
bitfld.long 0x00 0.--3. " PRE ,Prescaler" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32768"
|
|
if (((d.l(ad:0xFFFF030C))&0x10)==0x0)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "T0LD,Timer 0 Load Register"
|
|
rgroup.word 0x14++0x01
|
|
line.word 0x00 "T0CAP,Timer 0 Capture Register"
|
|
wgroup.byte 0x10++0x00
|
|
line.byte 0x00 "T0ICLR,Timer 0 Clear Register"
|
|
endif
|
|
tree.end
|
|
width 8.
|
|
tree "Timer 1"
|
|
width 0x08
|
|
group.long 0x0020++0x3
|
|
line.long 0x00 "T1LD,Timer 1 Load Register"
|
|
wgroup.byte 0x002C++0x0
|
|
line.byte 0x00 "T1ICLR,Timer 1 Clear Register"
|
|
rgroup.long 0x0024++0x3
|
|
line.long 0x00 "T1VAL,Timer 1 Value Register"
|
|
rgroup.long 0x0030++0x3
|
|
line.long 0x00 "T1CAP,Timer 1 Capture Register"
|
|
group.long 0x0028++0x3
|
|
line.long 0x00 "T1CON,Timer 1 Control Register"
|
|
sif (cpu()=="ADUC7121")
|
|
hexmask.long.byte 0x00 24.--31. 1. " POSTSCALER ,8-bit postscaler"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="ADUC7122"||cpu()=="ADUC7121")
|
|
bitfld.long 0x00 23. " WRIT_EN ,Enable write to postscaler" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " POST_COMP ,Postscaler compare flag" "Not compared,Compared"
|
|
bitfld.long 0x00 18. " T1_INT ,T1 interrupt generation selection flag" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 17. " EVENT_SEL ,Event Select" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7122"||cpu()=="ADUC7121")
|
|
textline " "
|
|
bitfld.long 0x00 12.--16. " EVENT_RANGE ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CLOCK_SELECT ,Clock Select" "Internal 32 kHz,Core clock,UCLK,P0.6,?..."
|
|
bitfld.long 0x00 8. " COUNT_UP ,Count up" "Down,Up"
|
|
else
|
|
bitfld.long 0x00 12.--16. " EVENT_RANGE ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CLOCK_SELECT ,Clock Select" "Core clock,32.768 kHz,P1.0,P0.6,?..."
|
|
bitfld.long 0x00 8. " COUNT_UP ,Count up" "Down,Up"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENA ,Timer1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MODE ,Timer 1 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FORMAT ,Format" "Binary,Reserved,23 hours to 0 hour,255 hours to 0 hour"
|
|
bitfld.long 0x00 0.--3. " PRESCALE ,Prescaler" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32768"
|
|
tree.end
|
|
width 8.
|
|
tree "Timer 2 - Wake-Up Timer"
|
|
width 0x08
|
|
group.long 0x0040++0x3
|
|
line.long 0x00 "T2LD,Timer 2 Load Register"
|
|
wgroup.byte 0x004C++0x0
|
|
line.byte 0x00 "T2ICLR,Timer 2 Clear Register"
|
|
rgroup.long 0x0044++0x3
|
|
line.long 0x00 "T2VAL,Timer 2 Value Register"
|
|
group.long 0x0048++0x3
|
|
line.long 0x00 "T2CON,Timer 2 Control Register"
|
|
sif (cpu()=="ADUC7122"||cpu()=="ADUC7121")
|
|
bitfld.long 0x00 9.--10. " CS ,Clock Source" "Internal 32 kHz,Core clock,External,UCLK"
|
|
bitfld.long 0x00 8. " COUNT_UP ,Count up" "Down,Up"
|
|
else
|
|
bitfld.long 0x00 9.--10. " CS ,Clock Source" "Core clock,Internal,External,External"
|
|
bitfld.long 0x00 8. " COUNT_UP ,Count up" "Down,Up"
|
|
endif
|
|
bitfld.long 0x00 7. " ENA ,Timer2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MODE ,Timer 2 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 4.--5. " FORMAT ,Format" "Binary,Reserved,23 hours to 0 hour,255 hours to 0 hour"
|
|
bitfld.long 0x00 0.--3. " PRESCALE ,Prescaler" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32768"
|
|
tree.end
|
|
width 8.
|
|
tree "Timer 3 - Watchdog Timer"
|
|
width 0x08
|
|
group.word 0x0060++0x1
|
|
line.word 0x00 "T3LD,Timer 3 Load Register"
|
|
rgroup.word 0x0064++0x1
|
|
line.word 0x00 "T3VAL,Timer 3 Value Register"
|
|
group.word 0x0068++0x1
|
|
line.word 0x00 "T3CON,Timer 3 Control Register"
|
|
bitfld.word 0x00 8. " COUNT_UP ,Count up" "Down,Up"
|
|
bitfld.word 0x00 7. " ENA ,Timer 3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " MODE ,Timer 3 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WD_ENA ,Watchdog Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SEC_CLR ,Secure Clear" "Disabled,Enabled"
|
|
bitfld.word 0x00 2.--3. " PRESCALE ,Prescaler" "Source clock,?..."
|
|
textline " "
|
|
bitfld.word 0x00 1. " WD_IRQ_ENA ,Watchdog IRQ Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " PD_OFF ,Stop Timer 3 when Powered Down" "Not stopped,Stopped"
|
|
wgroup.byte 0x006C++0x0
|
|
line.byte 0x00 "T3ICLR,Timer 3 Clear Register"
|
|
tree.end
|
|
width 8.
|
|
tree "Timer 4"
|
|
width 8.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "T4LD,Timer 4 Load Register"
|
|
wgroup.byte 0x8c++0x00
|
|
line.byte 0x00 "T4ICLR,Timer 4 Clear Register"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "T4VAL,Timer 4 Value Register"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "T4CAP,Timer 4 Capture Register"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "T4CON,Timer 4 Control Register"
|
|
bitfld.long 0x00 17. " ES ,Event Select" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--16. " ESR ,Event Select Range" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,?..."
|
|
sif (cpu()=="ADUC7122"||cpu()=="ADUC7121")
|
|
bitfld.long 0x00 9.--11. " CS ,Clock Select" "Internal 32 kHz,Core clock,UCLK,UCLK,?..."
|
|
else
|
|
bitfld.long 0x00 9.--11. " CS ,Clock Select" "Core clock,32.768 kHz,P4.6,P4.7,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 8. " CU ,Count up" "Down,Up"
|
|
bitfld.long 0x00 7. " T4E ,Timer 4 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T4M ,Timer 4 Mode" "Free-running,Periodic"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FORMAT ,Format" "Binary,Reserved,23 hours to 0 hour,255 hours to 0 hour"
|
|
bitfld.long 0x00 0.--3. " PS ,Prescaler" "Source clock,Reserved,Reserved,Reserved,Source clock/16,Reserved,Reserved,Reserved,Source clock/256,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Source clock/32765"
|
|
tree.end
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "Oscillator and PLL - Power Control"
|
|
base ad:0xFFFF0400
|
|
width 9.
|
|
wgroup.word 0x10++0x01
|
|
line.word 0x00 "PLLKEY1,PLL Key 1 Register"
|
|
wgroup.word 0x18++0x01
|
|
line.word 0x00 "PLLKEY2,PLL Key 2 Register"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "PLLCON,PLL Control Register"
|
|
bitfld.byte 0x00 5. " OSEL ,32 kHz PLL Input Selection" "External,Internal"
|
|
bitfld.byte 0x00 0.--1. " MDCLK ,Clocking Modes" "Reserved,Default,Reserved,External clock"
|
|
wgroup.word 0x04++0x01
|
|
line.word 0x00 "POWKEY1,Power Key 1 Register"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "POWKEY2,Power Key 2 Register"
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7124")
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "POWCON0,Power Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " PC ,Operating Modes" "Active,Pause,Nap,Sleep,Stop,?..."
|
|
bitfld.byte 0x00 0.--2. " CD ,CPU Clock Divider" "41.78 MHz,20.89 MHz,10.44 MHz,5.22 MHz,2.61 MHz,1.31 MHz,653 kHz,326 kHz"
|
|
wgroup.word 0x34++0x01
|
|
line.word 0x00 "POWKEY3,Power Key 3 Register"
|
|
wgroup.word 0x3c++0x01
|
|
line.word 0x00 "POWKEY4,Power Key 4 Register"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "POWCON1,Power Control Register 1"
|
|
sif (cpu()=="ADUC7124")
|
|
bitfld.word 0x00 11. " PWMPO ,PWM power enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9.--10. " PWMCLKDIV ,PWM block driving clock divider bits" "0,1,2,3"
|
|
endif
|
|
bitfld.word 0x00 8. " SPIPO ,SPI power enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6.--7. " SPICLKDIV ,SPI block driving clock divider bits" "41.78 MHz,20.89 MHz,10.44 MHz,5.22 MHz"
|
|
bitfld.word 0x00 5. " I2C1PO ,I2C1 power enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " I2C1CLKDIV ,I2C1 block driving clock divider bits" "41.78 MHz,10.44 MHz,5.22 MHz,1.31 MHz"
|
|
bitfld.word 0x00 2. " I2C0PO ,I2C0 power enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--1. " I2C0CLKDIV ,I2C0 block driving clock divider bits" "41.78 MHz,10.44 MHz,5.22 MHz,1.31 MHz"
|
|
elif ((cpu()=="ADUC7121")||(cpu()=="ADUC7122")||(cpu()=="ADUC7128")||(cpu()=="ADUC7129"))
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "POWCON,Power Control Register"
|
|
bitfld.byte 0x00 4.--6. " PC ,Operating Modes" "Active,Pause,Nap,Sleep,Stop,?..."
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.byte 0x00 0.--2. " CD ,CPU Clock Divider" "41.78 MHz,20.89 MHz,10.44 MHz,5.22 MHz,2.61 MHz,1.31 MHz,655 kHz,326 kHz"
|
|
else
|
|
bitfld.byte 0x00 0.--2. " CD ,CPU Clock Divider" "41.78 MHz,20.89 MHz,10.44 MHz,5.22 MHz,2.61 MHz,1.31 MHz,653 kHz,326 kHz"
|
|
endif
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "POWCON,Power Control Register"
|
|
bitfld.word 0x00 4.--6. " PC ,Operating Modes" "Active,Pause,Nap.,Sleep,Stop,?..."
|
|
bitfld.word 0x00 0.--2. " CD ,CPU Clock Divider" "41.78 MHz,20.89 MHz,10.44 MHz,5.22 MHz,2.61 MHz,1.31 MHz,655 kHz,326 kHz"
|
|
endif
|
|
width 0x0b
|
|
tree.end
|
|
tree "Power Supply Monitor"
|
|
base ad:0xffff0440
|
|
width 0x08
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PSMCON,Power Supply Monitor Control Register"
|
|
bitfld.word 0x00 3. " CMP ,Comparator" "Below,Above"
|
|
bitfld.word 0x00 2. " TP ,Trip Point Selection" "2.79V,3.07V"
|
|
bitfld.word 0x00 1. " PSMEN ,Power Supply Monitor Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.word 0x00 0. " PSMI ,Power Supply Monitor Interrupt" "Not occurred,Occurred"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Comparator"
|
|
base ad:0xFFFF0440
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7023"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029"||cpu()=="ADUC7124"||cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
width 0x08
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "CMPCON,Comparator Interface Register"
|
|
bitfld.word 0x00 10. " CMPEN ,Comparator Enable" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
bitfld.word 0x00 8.--9. " CMPIN ,Comparator Negative Input Select" "AVDD/2,ADC3 input,Vref x 0.6,?..."
|
|
bitfld.word 0x00 6.--7. " CMPOC ,Comparator Output Configuration" "Disabled,Disabled,PLA,IRQ"
|
|
else
|
|
bitfld.word 0x00 8.--9. " CMPIN ,Comparator Negative Input Select" "AVDD/2,ADC3 input,DAC0 output,?..."
|
|
bitfld.word 0x00 6.--7. " CMPOC ,Comparator Output Configuration" "Reserved,Reserved,Output on CMPOUT,IRQ"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 5. " CMPOL ,Comparator Output Logic State" "Low,High"
|
|
bitfld.word 0x00 3.--4. " CMPRES ,Response Time" "5 us/17 us,Reserved,Reserved,3 us"
|
|
bitfld.word 0x00 2. " CMPHYST ,Comparator Hysteresis" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.word 0x00 1. " CMPORI ,Comparator Output Rising Edge Interrupt" "Not occurred,Occurred"
|
|
bitfld.word 0x00 0. " CMPOFI ,Comparator Output Falling Edge Interrupt" "Not occurred,Occurred"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree "Reference"
|
|
base ad:0xFFFF0474
|
|
width 0x08
|
|
group.byte 0x000C--0x000C
|
|
line.byte 0x00 "REFCON,Reference Control Register"
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.byte 0x00 2. " VREF ,BUF_VREF1/BUF_VREF2 reference voltage" "Disabled,2.5V"
|
|
endif
|
|
sif (cpu()=="ADUC7121"||cpu()=="ADUC7122")
|
|
bitfld.byte 0x00 1. " IRO ,Internal Reference Output Enable" "Disabled,Enabled"
|
|
elif (cpu()!="ADUC7122"&&cpu()!="ADUC7128"&&cpu()!="ADUC7129")
|
|
bitfld.byte 0x00 1. " IRPE ,Internal Reference Powerdown Enable" "Disabled,Enabled"
|
|
endif
|
|
bitfld.byte 0x00 0. " IROE ,Internal Reference Output Enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "UART"
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
|
|
base ad:0xFFFF0700
|
|
width 0x09
|
|
if (((data.byte(ad:0xFFFF070C))&0x80)==0x00)
|
|
wgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMTX,Transmit Register"
|
|
rgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMRX,Receive Register"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COMIEN0,Interrupt Enable Register"
|
|
bitfld.byte 0x00 3. " EDSSI ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ELSI ,RX Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ETBEI ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ERBFI ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMDIV0,Divisor Latch (low byte)"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COMDIV1,Divisor Latch (high byte)"
|
|
endif
|
|
rgroup.byte 0x0008--0x0008
|
|
line.byte 0x00 "COMIID0,Interrupt Identification Register"
|
|
bitfld.byte 0x00 0.--2. " STA/NINT ,Interrupt Source" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,?..."
|
|
if (((data.byte(ad:0xFFFF070C))&0x03)==0x00)
|
|
group.byte 0x000C--0x000C
|
|
line.byte 0x00 "COMCON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.byte 0x000C--0x000C
|
|
line.byte 0x00 "COMCON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.byte 0x0010--0x0010
|
|
line.byte 0x00 "COMCON1,Modem Control Register"
|
|
bitfld.byte 0x00 4. " LOOPBACK ,Loop Back" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
rgroup.byte 0x0014--0x0014
|
|
line.byte 0x00 "COMSTA0,Line Status Register"
|
|
bitfld.byte 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 4. " BI ,Break Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COMSTA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COMSCR,Scratch Register"
|
|
if (((data.byte(ad:0xFFFF0720))&0x80)==0x80)
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COMIEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " E9BT ,9-bit Transmit Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " E9BR ,9-bit Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
else
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COMIEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
endif
|
|
group.byte 0x0028--0x0028
|
|
line.byte 0x00 "COMADR,Network Address Register"
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COMDIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
rgroup.byte 0x0024--0x0024
|
|
line.byte 0x00 "COMIID1,Network interrupt register"
|
|
bitfld.byte 0x00 0.--3. " STA/NINT ,Status bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,Reserved,Reserved,Reserved,Address transmitted/buffer empty,Reserved,Matching network address,?..."
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7121")
|
|
base ad:0xFFFF0800
|
|
width 0x09
|
|
wgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMTX,Transmit Register"
|
|
rgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMRX,Receive Register"
|
|
group.byte 0x0000--0x0000
|
|
line.byte 0x00 "COMDIV0,Divisor Latch (low byte)"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COMIEN0,Interrupt Enable Register"
|
|
bitfld.byte 0x00 2. " ELSI ,RX Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ETBEI ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ERBFI ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COMDIV1,Divisor Latch (high byte)"
|
|
rgroup.byte 0x0008--0x0008
|
|
line.byte 0x00 "COMIID0,Interrupt Identification Register"
|
|
bitfld.byte 0x00 1.--2. " STA/NINT ,Interrupt Source" "No interrupt,Receive line status,Receive buffer full,Transmit buffer empty"
|
|
if (((d.b(ad:0xFFFF0800+0x0c))&0x03)==0x00)
|
|
group.byte 0x000C--0x000C
|
|
line.byte 0x00 "COMCON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.byte 0x000C--0x000C
|
|
line.byte 0x00 "COMCON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.byte 0x0010--0x0010
|
|
line.byte 0x00 "COMCON1,Modem Control Register"
|
|
bitfld.byte 0x00 4. " LOOPBACK ,Loop Back" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
rgroup.byte 0x0014--0x0014
|
|
line.byte 0x00 "COMSTA0,Line Status Register"
|
|
bitfld.byte 0x00 6. " TEMT ,COMTX and shift register empty status" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,COMTX empty status" "Not empty,Empty"
|
|
bitfld.byte 0x00 4. " BI ,Break Indicator" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COMDIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7122")
|
|
base ad:0xFFFF0800
|
|
width 0x09
|
|
if (((data.byte(d:(0xFFFF0800+0x0c)))&0x80)==0x00)
|
|
wgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0TX,Transmit Register"
|
|
rgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0RX,Receive Register"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM0IEN0,Interrupt Enable Register"
|
|
bitfld.byte 0x00 3. " EDSSI ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ELSI ,RX Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ETBEI ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ERBFI ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0DIV0,Divisor Latch (low byte)"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM0DIV1,Divisor Latch (high byte)"
|
|
endif
|
|
rgroup.byte 0x0008--0x0008
|
|
line.byte 0x00 "COM0IID0,Interrupt Identification Register"
|
|
sif (cpu()!="ADUC7124")
|
|
bitfld.byte 0x00 0.--2. " STA/NINT ,Status Bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,?..."
|
|
else
|
|
bitfld.byte 0x00 6.--7. " FIFOMODE ,FIFO mode" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.byte 0x00 1.--3. " STATUS[2:0] ,Interrupt status bits" "Modem status,Transmit buffer empty,Receive buffer empty,Receive line status,Reserved,Reserved,RXFIFO timeout,?..."
|
|
bitfld.byte 0x00 0. " NINT ,Interrupt flags enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()=="ADUC7124")
|
|
wgroup.byte 0x08++0x0
|
|
line.byte 0x00 "COM0FCR,FIFO control register"
|
|
bitfld.byte 0x00 5.--7. " RXFIFOTL ,Receiver FIFO trigger level" "1 byte,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.byte 0x00 2. " TXRST ,TXFIFO reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " RXRST ,RXFIFO reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Disabled,Enabled"
|
|
endif
|
|
if (((data.byte(d:(0xFFFF0800+0x0c)))&0x03)==0x00)
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM0CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM0CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.byte 0x0010--0x0010
|
|
line.byte 0x00 "COM0CON1,Modem Control Register"
|
|
bitfld.byte 0x00 4. " LOOPBACK ,Loop Back" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7124")
|
|
bitfld.byte 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
else
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
endif
|
|
sif (cpu()!="ADUC7124")
|
|
rgroup.byte 0x0014--0x0014
|
|
line.byte 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.byte 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 4. " BI ,Break Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
if (((data.byte(d:(0xFFFF0800+0x08)))&0xc0)==0xc0)
|
|
; FIFO mode
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 10. " RX_TIMEOUT ,Receive timeout" "No timeout,timeout"
|
|
bitfld.word 0x00 9. " RX_TRIGGERED ,Receive trigger" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TX_FULL ,Transmit FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TX_HALF_EMPTY ,Transmit FIFO Half Empty" "<= 8 bytes,> 8 bytes"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
endif
|
|
endif
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM0SCR,Scratch Register"
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
elif (cpu()=="ADUC7124")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
else
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM0SCR,Scratch Register"
|
|
if (((data.byte(d:(0xFFFF0800+0x20)))&0x80)==0x80)
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " E9BT ,9-bit Transmit Enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " E9BR ,9-bit Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
else
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
endif
|
|
endif
|
|
width 0x09
|
|
sif (cpu()=="ADUC7124")
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM0DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
else
|
|
group.byte 0x0028--0x0028
|
|
line.byte 0x00 "COM0ADR,Network Address Register"
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM0DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
rgroup.byte 0x0024--0x0024
|
|
line.byte 0x00 "COM0IID1,Network interrupt register"
|
|
bitfld.byte 0x00 0.--3. " STA/NINT ,Status bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,Reserved,Reserved,Reserved,Address transmitted/buffer empty,Reserved,Matching network address,?..."
|
|
endif
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7124"||cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
tree "UART 0"
|
|
base ad:0xFFFF0700
|
|
width 0x09
|
|
if (((data.byte(d:(0xFFFF0700+0x0c)))&0x80)==0x00)
|
|
wgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0TX,Transmit Register"
|
|
rgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0RX,Receive Register"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM0IEN0,Interrupt Enable Register"
|
|
bitfld.byte 0x00 3. " EDSSI ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ELSI ,RX Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ETBEI ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ERBFI ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM0DIV0,Divisor Latch (low byte)"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM0DIV1,Divisor Latch (high byte)"
|
|
endif
|
|
rgroup.byte 0x0008--0x0008
|
|
line.byte 0x00 "COM0IID0,Interrupt Identification Register"
|
|
sif (cpu()!="ADUC7124")
|
|
bitfld.byte 0x00 0.--2. " STA/NINT ,Status Bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,?..."
|
|
else
|
|
bitfld.byte 0x00 6.--7. " FIFOMODE ,FIFO mode" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.byte 0x00 1.--3. " STATUS[2:0] ,Interrupt status bits" "Modem status,Transmit buffer empty,Receive buffer empty,Receive line status,Reserved,Reserved,RXFIFO timeout,?..."
|
|
bitfld.byte 0x00 0. " NINT ,Interrupt flags enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()=="ADUC7124")
|
|
wgroup.byte 0x08++0x0
|
|
line.byte 0x00 "COM0FCR,FIFO control register"
|
|
bitfld.byte 0x00 5.--7. " RXFIFOTL ,Receiver FIFO trigger level" "1 byte,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.byte 0x00 2. " TXRST ,TXFIFO reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " RXRST ,RXFIFO reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Disabled,Enabled"
|
|
endif
|
|
if (((data.byte(d:(0xFFFF0700+0x0c)))&0x03)==0x00)
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM0CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM0CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.byte 0x0010--0x0010
|
|
line.byte 0x00 "COM0CON1,Modem Control Register"
|
|
bitfld.byte 0x00 4. " LOOPBACK ,Loop Back" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7124")
|
|
bitfld.byte 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
else
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
endif
|
|
sif (cpu()!="ADUC7124")
|
|
rgroup.byte 0x0014--0x0014
|
|
line.byte 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.byte 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 4. " BI ,Break Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
if (((data.byte(d:(0xFFFF0700+0x08)))&0xc0)==0xc0)
|
|
; FIFO mode
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 10. " RX_TIMEOUT ,Receive timeout" "No timeout,timeout"
|
|
bitfld.word 0x00 9. " RX_TRIGGERED ,Receive trigger" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TX_FULL ,Transmit FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TX_HALF_EMPTY ,Transmit FIFO Half Empty" "<= 8 bytes,> 8 bytes"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM0STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
endif
|
|
endif
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM0SCR,Scratch Register"
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
elif (cpu()=="ADUC7124")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
else
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM0STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM0SCR,Scratch Register"
|
|
if (((data.byte(d:(0xFFFF0700+0x20)))&0x80)==0x80)
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " E9BT ,9-bit Transmit Enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " E9BR ,9-bit Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
else
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM0IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
endif
|
|
endif
|
|
width 0x09
|
|
sif (cpu()=="ADUC7124")
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM0DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
else
|
|
group.byte 0x0028--0x0028
|
|
line.byte 0x00 "COM0ADR,Network Address Register"
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM0DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
rgroup.byte 0x0024--0x0024
|
|
line.byte 0x00 "COM0IID1,Network interrupt register"
|
|
bitfld.byte 0x00 0.--3. " STA/NINT ,Status bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,Reserved,Reserved,Reserved,Address transmitted/buffer empty,Reserved,Matching network address,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "UART 1"
|
|
base ad:0xFFFF0740
|
|
width 0x09
|
|
if (((data.byte(d:(0xFFFF0740+0x0c)))&0x80)==0x00)
|
|
wgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM1TX,Transmit Register"
|
|
rgroup.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM1RX,Receive Register"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM1IEN0,Interrupt Enable Register"
|
|
bitfld.byte 0x00 3. " EDSSI ,Modem Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ELSI ,RX Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ETBEI ,Enable Transmit Buffer Empty Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ERBFI ,Enable Receive Buffer Full Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x0000--0x0000
|
|
line.byte 0x00 "COM1DIV0,Divisor Latch (low byte)"
|
|
group.byte 0x0004--0x0004
|
|
line.byte 0x00 "COM1DIV1,Divisor Latch (high byte)"
|
|
endif
|
|
rgroup.byte 0x0008--0x0008
|
|
line.byte 0x00 "COM1IID0,Interrupt Identification Register"
|
|
sif (cpu()!="ADUC7124")
|
|
bitfld.byte 0x00 0.--2. " STA/NINT ,Status Bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,?..."
|
|
else
|
|
bitfld.byte 0x00 6.--7. " FIFOMODE ,FIFO mode" "Non-FIFO,Reserved,Reserved,FIFO"
|
|
bitfld.byte 0x00 1.--3. " STATUS[2:0] ,Interrupt status bits" "Modem status,Transmit buffer empty,Receive buffer empty,Receive line status,Reserved,Reserved,RXFIFO timeout,?..."
|
|
bitfld.byte 0x00 0. " NINT ,Interrupt flags enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()=="ADUC7124")
|
|
wgroup.byte 0x08++0x0
|
|
line.byte 0x00 "COM1FCR,FIFO control register"
|
|
bitfld.byte 0x00 5.--7. " RXFIFOTL ,Receiver FIFO trigger level" "1 byte,2 bytes,4 bytes,6 bytes,8 bytes,10 bytes,12 bytes,14 bytes"
|
|
bitfld.byte 0x00 2. " TXRST ,TXFIFO reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " RXRST ,RXFIFO reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Disabled,Enabled"
|
|
endif
|
|
if (((data.byte(d:(0xFFFF0740+0x0c)))&0x03)==0x00)
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM1CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.byte 0x000C--0x0010
|
|
line.byte 0x00 "COM1CON0,Line Control Register"
|
|
bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access" "COMRX/COMTX/COMIEN0,COMDIV0/COMDIV1"
|
|
bitfld.byte 0x00 6. " BRK ,Set Break" "Normal,Force SOUT=0"
|
|
bitfld.byte 0x00 5. " SP ,Stick Parity" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EPS ,Even Parity Select" "Odd,Even"
|
|
bitfld.byte 0x00 3. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.byte 0x0010--0x0010
|
|
line.byte 0x00 "COM1CON1,Modem Control Register"
|
|
bitfld.byte 0x00 4. " LOOPBACK ,Loop Back" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7124")
|
|
bitfld.byte 0x00 3. " PEN ,Parity enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " STOP ,Stop bit" "1 bit,1.5/2 bits"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
else
|
|
bitfld.byte 0x00 1. " RTS ,Request to Send" "RTS=1,RTS=0"
|
|
bitfld.byte 0x00 0. " DTR ,Data Terminal Ready" "DTR=1,DTR=0"
|
|
endif
|
|
sif (cpu()!="ADUC7124")
|
|
rgroup.byte 0x0014--0x0014
|
|
line.byte 0x00 "COM1STA0,Line Status Register"
|
|
bitfld.byte 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 4. " BI ,Break Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.byte 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
if (((data.byte(d:(0xFFFF0740+0x08)))&0xc0)==0xc0)
|
|
; FIFO mode
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM1STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 10. " RX_TIMEOUT ,Receive timeout" "No timeout,timeout"
|
|
bitfld.word 0x00 9. " RX_TRIGGERED ,Receive trigger" "No trigger,Trigger"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TX_FULL ,Transmit FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 7. " TX_HALF_EMPTY ,Transmit FIFO Half Empty" "<= 8 bytes,> 8 bytes"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
else
|
|
rgroup.word 0x0014--0x0015
|
|
line.word 0x00 "COM1STA0,Line Status Register"
|
|
bitfld.word 0x00 11. " RX_ERROR ,Receive error" "No error,Error"
|
|
bitfld.word 0x00 6. " TEMT ,COMTX Empty Status" "Not empty,Empty"
|
|
bitfld.word 0x00 5. " THRE ,COMTX and COMRX Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 4. " BI ,Break Error" "No error,Error"
|
|
bitfld.word 0x00 3. " FE ,Framing Error" "No error,Error"
|
|
bitfld.word 0x00 2. " PE ,Parity Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OE ,Overrun Error" "No error,Error"
|
|
bitfld.word 0x00 0. " DR ,Data Ready" "Not ready,Ready"
|
|
endif
|
|
endif
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM1STA1,Modem Status Register"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM1SCR,Scratch Register"
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM1IEN1,Network Enable Register"
|
|
elif (cpu()=="ADUC7124")
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM1STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
else
|
|
rgroup.byte 0x0018--0x0018
|
|
line.byte 0x00 "COM1STA1,Modem Status Register"
|
|
bitfld.byte 0x00 7. " DCD ,Data Carrier Detect" "Not detected,Detected"
|
|
bitfld.byte 0x00 6. " RI ,Ring Indicator" "Not rang,Rang"
|
|
bitfld.byte 0x00 5. " DSR ,Data Set Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CTS ,Clear to Send" "Not clear,Clear"
|
|
bitfld.byte 0x00 3. " DDCD ,Delta DCD" "Not changed,Changed"
|
|
bitfld.byte 0x00 2. " TERI ,Trailing Edge RI" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DDSR ,Delta DSR" "Not changed,Changed"
|
|
bitfld.byte 0x00 0. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
group.byte 0x001C--0x001C
|
|
line.byte 0x00 "COM1SCR,Scratch Register"
|
|
if (((data.byte(d:(0xFFFF0740+0x20)))&0x80)==0x80)
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM1IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " E9BT ,9-bit Transmit Enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " E9BR ,9-bit Receive Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
else
|
|
group.byte 0x0020--0x0020
|
|
line.byte 0x00 "COM1IEN1,Network Enable Register"
|
|
bitfld.byte 0x00 7. " ENAM ,Network Address Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " ENI ,Network Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " E9BD ,Word Length" "8-bit,9-bit"
|
|
bitfld.byte 0x00 2. " ETD ,Transmitter Pin Driver Enable" "Three-state,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NABP ,Network Address / Interrupt Polarity" "Low,High"
|
|
bitfld.byte 0x00 0. " NAB ,Network Address" "Data,Slave's address"
|
|
endif
|
|
endif
|
|
width 0x09
|
|
sif (cpu()=="ADUC7124")
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM1DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
else
|
|
group.byte 0x0028--0x0028
|
|
line.byte 0x00 "COM1ADR,Network Address Register"
|
|
group.word 0x002C--0x002D
|
|
line.word 0x00 "COM1DIV2,Fractional Baud Divide Register"
|
|
bitfld.word 0x00 15. " FBEN ,Fractional Baudrate Generator Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11.--12. " FBM[1-0] ,M" "00,01,10,11"
|
|
hexmask.word 0x00 0.--10. 1. " FBN[10-0] ,N"
|
|
rgroup.byte 0x0024--0x0024
|
|
line.byte 0x00 "COM1IID1,Network interrupt register"
|
|
bitfld.byte 0x00 0.--3. " STA/NINT ,Status bits/NINT" "Modem status,No interrupt,Transmit buffer empty,Reserved,Receive buffer full,Reserved,Receive line status,Reserved,Reserved,Reserved,Address transmitted/buffer empty,Reserved,Matching network address,?..."
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Nonvolatile Flash/EE Memory"
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7023"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
|
|
base ad:0xfffff800
|
|
width 0x09
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "FEESTA,Status of the Flash Control Interface Register"
|
|
in
|
|
; bitfld.byte 0x00 5. " BCE ,Burst Command Enable" "Disabled,Enabled"
|
|
; bitfld.byte 0x00 3. " FIS ,Flash Interrupt Status" "Not occurred,Occurred"
|
|
; bitfld.byte 0x00 2. " CB ,Flash/EE Controller Busy" "Not busy,Busy"
|
|
; textline " "
|
|
; bitfld.byte 0x00 1. " CF ,Command Fail" "Not failed,Failed"
|
|
; bitfld.byte 0x00 0. " CP ,Command Pass" "Not passed,Passed"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "FEEMOD,Operating Mode of the Flash Control Interface Register"
|
|
bitfld.word 0x00 4. " IE ,Flash/EE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " EWCP ,Erase/Write Command Protection" "Disabled,Enabled"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "FEECON,Command Register"
|
|
bitfld.byte 0x00 0.--3. " COMMAND ,Command" "Null,Single read,Single write,Erase/write,Single verify,Single erase,Mass erase,Reserved,Reserved,Reserved,Reserved,Signature,Protect,Reserved,Reserved,Ping"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "FEEDAT,Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEEDAT ,Data Value"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FEEADR,Address Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEEADR ,Address Value"
|
|
rgroup.tbyte 0x18++0x02
|
|
line.tbyte 0x00 "FEESIGN,Code Signature Register"
|
|
hexmask.tbyte 0x00 0.--23. 1. " FEESIGN ,Code Signature Value"
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "FEEPRO,Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " WP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " WP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
line.long 0x04 "FEEHIDE,Immediate Protection Register"
|
|
bitfld.long 0x04 31. " IRP ,Immediate Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " IWP_123_120 ,Immediate Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " IWP_119_116 ,Immediate Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IWP_115_112 ,Immediate Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " IWP_111_108 ,Immediate Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " IWP_107_104 ,Immediate Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IWP_103_100 ,Immediate Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " IWP_99_96 ,Immediate Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " IWP_95_92 ,Immediate Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IWP_91_88 ,Immediate Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " IWP_87_84 ,Immediate Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " IWP_83_80 ,Immediate Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IWP_79_76 ,Immediate Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " IWP_75_72 ,Immediate Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " IWP_71_68 ,Immediate Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IWP_67_64 ,Immediate Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " IWP_63_60 ,Immediate Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " IWP_59_56 ,Immediate Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IWP_55_52 ,Immediate Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " IWP_51_48 ,Immediate Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " IWP_47_44 ,Immediate Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IWP_43_40 ,Immediate Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " IWP_39_36 ,Immediate Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " IWP_35_32 ,Immediate Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IWP_31_28 ,Immediate Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " IWP_27_24 ,Immediate Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " IWP_23_20 ,Immediate Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IWP_19_16 ,Immediate Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " IWP_15_12 ,Immediate Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " IWP_11_8 ,Immediate Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IWP_7_4 ,Immediate Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " IWP_3_0 ,Immediate Write Protection for Pages 3..0" "Protected,Not protected"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7128"||cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7129")
|
|
tree "Block 0"
|
|
base ad:0xffff0e00
|
|
width 0x09
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "FEE0STA,Status of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 3. " FEE_INTERRUPT_STATUS ,Flash/EE interrupt status bit" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " FEE_CONTROLLER_BUSY ,Flash/EE controller busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 1. " COMMAND_FAIL ,Command fail" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " COMMAND_COMPLETE ,Command complete" "Not completed,Completed"
|
|
else
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "FEE0STA,Status of the Flash Control Interface Register"
|
|
in
|
|
endif
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "FEE0MOD,Operating Mode of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 4. " IE ,Flash/EE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " EWCP ,Erase/Write Command Protection" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " FWS ,Flash Waitstates" "0,1,2,3"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "FEE0CON,Command Register"
|
|
bitfld.byte 0x00 0.--3. " COMMAND ,Command" "Null,Single read,Single write,Erase-write,Single verify,Single erase,Mass erase,Reserved,Reserved,Reserved,Reserved,Signature,Protect,Reserved,Reserved,Ping"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "FEE0DAT,Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE0DAT ,Data Value"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FEE0ADR,Address Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE0ADR ,Address Value"
|
|
rgroup.tbyte 0x18++0x02
|
|
line.tbyte 0x00 "FEE0SGN,Code Signature Register"
|
|
hexmask.tbyte 0x00 0.--23. 1. " FEE0SGN ,Code Signature Value"
|
|
width 9.
|
|
if (0.==0.)
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE0PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE0HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
else
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE0PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE0HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Block 1"
|
|
base ad:0xffff0e80
|
|
width 0x09
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "FEE1STA,Status of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 3. " FEE_INTERRUPT_STATUS ,Flash/EE interrupt status bit" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " FEE_CONTROLLER_BUSY ,Flash/EE controller busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 1. " COMMAND_FAIL ,Command fail" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " COMMAND_COMPLETE ,Command complete" "Not completed,Completed"
|
|
else
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "FEE1STA,Status of the Flash Control Interface Register"
|
|
in
|
|
endif
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "FEE1MOD,Operating Mode of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 4. " IE ,Flash/EE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " EWCP ,Erase/Write Command Protection" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " FWS ,Flash Waitstates" "0,1,2,3"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "FEE1CON,Command Register"
|
|
bitfld.byte 0x00 0.--3. " COMMAND ,Command" "Null,Single read,Single write,Erase-write,Single verify,Single erase,Mass erase,Reserved,Reserved,Reserved,Reserved,Signature,Protect,Reserved,Reserved,Ping"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "FEE1DAT,Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE1DAT ,Data Value"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FEE1ADR,Address Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE1ADR ,Address Value"
|
|
rgroup.tbyte 0x18++0x02
|
|
line.tbyte 0x00 "FEE1SGN,Code Signature Register"
|
|
hexmask.tbyte 0x00 0.--23. 1. " FEE1SGN ,Code Signature Value"
|
|
width 9.
|
|
if (1.==0.)
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE1PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE1HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
else
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE1PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE1HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
elif (cpu()=="ADUC7124")
|
|
tree "Block 0"
|
|
base ad:0xfffff800
|
|
width 0x09
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "FEE0STA,Status of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 3. " FEE_INTERRUPT_STATUS ,Flash/EE interrupt status bit" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " FEE_CONTROLLER_BUSY ,Flash/EE controller busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 1. " COMMAND_FAIL ,Command fail" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " COMMAND_COMPLETE ,Command complete" "Not completed,Completed"
|
|
else
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "FEE0STA,Status of the Flash Control Interface Register"
|
|
in
|
|
endif
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "FEE0MOD,Operating Mode of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 4. " IE ,Flash/EE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " EWCP ,Erase/Write Command Protection" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " FWS ,Flash Waitstates" "0,1,2,3"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "FEE0CON,Command Register"
|
|
bitfld.byte 0x00 0.--3. " COMMAND ,Command" "Null,Single read,Single write,Erase-write,Single verify,Single erase,Mass erase,Reserved,Reserved,Reserved,Reserved,Signature,Protect,Reserved,Reserved,Ping"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "FEE0DAT,Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE0DAT ,Data Value"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FEE0ADR,Address Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE0ADR ,Address Value"
|
|
rgroup.tbyte 0x18++0x02
|
|
line.tbyte 0x00 "FEE0SGN,Code Signature Register"
|
|
hexmask.tbyte 0x00 0.--23. 1. " FEE0SGN ,Code Signature Value"
|
|
width 9.
|
|
if (0.==0.)
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE0PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE0HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
else
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE0PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE0HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Block 1"
|
|
base ad:0xfffff880
|
|
width 0x09
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "FEE1STA,Status of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 3. " FEE_INTERRUPT_STATUS ,Flash/EE interrupt status bit" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " FEE_CONTROLLER_BUSY ,Flash/EE controller busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 1. " COMMAND_FAIL ,Command fail" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " COMMAND_COMPLETE ,Command complete" "Not completed,Completed"
|
|
else
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "FEE1STA,Status of the Flash Control Interface Register"
|
|
in
|
|
endif
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "FEE1MOD,Operating Mode of the Flash Control Interface Register"
|
|
bitfld.byte 0x00 4. " IE ,Flash/EE Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " EWCP ,Erase/Write Command Protection" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " FWS ,Flash Waitstates" "0,1,2,3"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "FEE1CON,Command Register"
|
|
bitfld.byte 0x00 0.--3. " COMMAND ,Command" "Null,Single read,Single write,Erase-write,Single verify,Single erase,Mass erase,Reserved,Reserved,Reserved,Reserved,Signature,Protect,Reserved,Reserved,Ping"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "FEE1DAT,Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE1DAT ,Data Value"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "FEE1ADR,Address Register"
|
|
hexmask.word 0x00 0.--15. 1. " FEE1ADR ,Address Value"
|
|
rgroup.tbyte 0x18++0x02
|
|
line.tbyte 0x00 "FEE1SGN,Code Signature Register"
|
|
hexmask.tbyte 0x00 0.--23. 1. " FEE1SGN ,Code Signature Value"
|
|
width 9.
|
|
if (1.==0.)
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE1PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE1HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_123_120 ,Write Protection for Pages 123..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
else
|
|
group.long 0x1C--0x23
|
|
line.long 0x00 "FEE1PRO,Immediate Protection Following Subsequent Register"
|
|
bitfld.long 0x00 31. " IRP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x00 30. " IWP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x00 29. " IWP_119_116 ,Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IWP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x00 27. " IWP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x00 26. " IWP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IWP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x00 24. " IWP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x00 23. " IWP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IWP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x00 21. " IWP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x00 20. " IWP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IWP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " IWP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x00 17. " IWP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IWP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x00 15. " IWP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x00 14. " IWP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IWP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x00 12. " IWP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x00 11. " IWP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IWP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x00 9. " IWP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x00 8. " IWP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IWP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x00 6. " IWP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x00 5. " IWP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IWP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x00 3. " IWP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x00 2. " IWP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IWP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x00 0. " IWP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
;group 0x20++0x03
|
|
line.long 0x04 "FEE1HID,Protection Register"
|
|
bitfld.long 0x04 31. " RP ,Read Protection" "Protected,Not protected"
|
|
bitfld.long 0x04 30. " WP_127_120 ,Write Protection for Pages 127..120" "Protected,Not protected"
|
|
bitfld.long 0x04 29. " WP_119_116 , Write Protection for Pages 119..116" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 28. " WP_115_112 ,Write Protection for Pages 115..112" "Protected,Not protected"
|
|
bitfld.long 0x04 27. " WP_111_108 ,Write Protection for Pages 111..108" "Protected,Not protected"
|
|
bitfld.long 0x04 26. " WP_107_104 ,Write Protection for Pages 107..104" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " WP_103_100 ,Write Protection for Pages 103..100" "Protected,Not protected"
|
|
bitfld.long 0x04 24. " WP_99_96 ,Write Protection for Pages 99..96" "Protected,Not protected"
|
|
bitfld.long 0x04 23. " WP_95_92 ,Write Protection for Pages 95..92" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 22. " WP_91_88 ,Write Protection for Pages 91..88" "Protected,Not protected"
|
|
bitfld.long 0x04 21. " WP_87_84 ,Write Protection for Pages 87..84" "Protected,Not protected"
|
|
bitfld.long 0x04 20. " WP_83_80 ,Write Protection for Pages 83..80" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " WP_79_76 ,Write Protection for Pages 79..76" "Protected,Not protected"
|
|
bitfld.long 0x04 18. " WP_75_72 ,Write Protection for Pages 75..72" "Protected,Not protected"
|
|
bitfld.long 0x04 17. " WP_71_68 ,Write Protection for Pages 71..68" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 16. " WP_67_64 ,Write Protection for Pages 67..64" "Protected,Not protected"
|
|
bitfld.long 0x04 15. " WP_63_60 ,Write Protection for Pages 63..60" "Protected,Not protected"
|
|
bitfld.long 0x04 14. " WP_59_56 ,Write Protection for Pages 59..56" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " WP_55_52 ,Write Protection for Pages 55..52" "Protected,Not protected"
|
|
bitfld.long 0x04 12. " WP_51_48 ,Write Protection for Pages 51..48" "Protected,Not protected"
|
|
bitfld.long 0x04 11. " WP_47_44 ,Write Protection for Pages 47..44" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 10. " WP_43_40 ,Write Protection for Pages 43..40" "Protected,Not protected"
|
|
bitfld.long 0x04 9. " WP_39_36 ,Write Protection for Pages 39..36" "Protected,Not protected"
|
|
bitfld.long 0x04 8. " WP_35_32 ,Write Protection for Pages 35..32" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WP_31_28 ,Write Protection for Pages 31..28" "Protected,Not protected"
|
|
bitfld.long 0x04 6. " WP_27_24 ,Write Protection for Pages 27..24" "Protected,Not protected"
|
|
bitfld.long 0x04 5. " WP_23_20 ,Write Protection for Pages 23..20" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 4. " WP_19_16 ,Write Protection for Pages 19..16" "Protected,Not protected"
|
|
bitfld.long 0x04 3. " WP_15_12 ,Write Protection for Pages 15..12" "Protected,Not protected"
|
|
bitfld.long 0x04 2. " WP_11_8 ,Write Protection for Pages 11..8" "Protected,Not protected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WP_7_4 ,Write Protection for Pages 7..4" "Protected,Not protected"
|
|
bitfld.long 0x04 0. " WP_3_0 ,Write Protection for Pages 3..0" "Protected,Not protected"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "I2C"
|
|
tree "I2C 0"
|
|
sif (cpu()=="ADUC7121")
|
|
base ad:0xffff0880
|
|
width 0x0A
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "I2C0MCON,I2C Master Control Register"
|
|
bitfld.word 0x00 8. " I2CMCENI ,I2C transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " I2CNACKENI ,I2C no acknowledge received interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " I2CALENI ,I2C arbitration lost interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " I2CMTENI ,I2C transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " I2CMRENI ,I2C receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " I2CMSEN ,I2C master SCL stretch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " I2CILEN ,I2C internal loopback enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " I2CBD ,I2C master backoff disable" "No,Yes"
|
|
bitfld.word 0x00 0. " I2CMEN ,I2C master enable" "Disabled,Enabled"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "I2C0MSTA,I2C Master Status Registers"
|
|
bitfld.word 0x00 10. " I2CBBUSY ,I2C bus busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 9. " I2CMRxFO ,Master Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 8. " I2CMTC ,I2C transmission complete status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CMNA ,I2C master no acknowledge data" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CMBUSY ,I2C master busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 5. " I2CAL ,I2C arbitration lost status" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CMNA ,I2C master no acknowledge address" "Normal,No acknowledge"
|
|
bitfld.word 0x00 3. " I2CMRXQ ,I2C master receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CMTXQ ,I2C master transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " I2CMTFSTA ,I2C master Tx FIFO status" "I2C master Tx FIFO empty,1 byte in master Tx FIFO,1 byte in master Tx FIFO,I2C master Tx FIFO full"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "I2C0MRX,I2C Master Receive Register"
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "I2C0MTX,I2C Master Transmit Register"
|
|
width 0x0B
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "I2C0MCNT0,I2C Master Read Count Register"
|
|
bitfld.word 0x00 8. " I2CRECNT ,Required number of bytes" "256 or less,greater than 256"
|
|
hexmask.word.byte 0x00 0.--7. 1. " I2CRCNT ,Number of bytes"
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x14++0x01
|
|
line.byte 0x00 "I2C0MCNT1,I2C Master Current Read Count Register"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "I2C0MCNT1,I2C Master Current Read Count Register"
|
|
endif
|
|
if (d.w(ad:0xffff0880+0x28)&0x02)==0x00
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C0ADR0,I2C Address 0 Register"
|
|
hexmask.byte 0x00 1.--7. 0x02 " I2CADR ,Address of required slave device"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
hgroup.byte 0x1C++0x00
|
|
hide.byte 0x00 "I2C0ADR1,I2C Address 1 Register"
|
|
else
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C0ADR0,I2C Address 0 Register"
|
|
bitfld.byte 0x00 1.--2. " I2CMADR ,These bits contain ADDR[9:8]" "00,01,10,11"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "I2C0ADR1,I2C Address 1 Register"
|
|
endif
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "I2C0DIV,I2C Master Clock Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DIVH ,Duration of the high period of SCL"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIVL ,Duration of the low period of SCL"
|
|
sif (cpu()=="ADUC7122")
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "I2C0SBYTE,I2C0 Start Byte Register"
|
|
endif
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "I2C0SCON,I2C Slave Control Register"
|
|
bitfld.word 0x00 10. " I2CSTXENI ,Slave transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " I2CSRXENI ,Slave receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " I2CSSENI ,I2C stop condition detected interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CNACKEN ,I2C no acknowledge enable" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CSSEN ,I2C slave SCL stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " I2CSETEN ,I2C early transmit interrupt enable" "Negative edge of SCL,Positive edge of SCL"
|
|
textline " "
|
|
eventfld.word 0x00 4. " I2CGCCLR ,I2C general call status and ID clear" "Not cleared,Cleared"
|
|
bitfld.word 0x00 3. " I2CHGCEN ,I2C hardware general call enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " I2CGCEN ,I2C general call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ADR10EN ,I2C 10-bit address mode" "Normal,10-bit"
|
|
bitfld.word 0x00 0. " I2CSEN ,I2C slave enable" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.word 0x2C++0x01
|
|
else
|
|
group.word 0x2C++0x01
|
|
endif
|
|
line.word 0x00 "I2C0SSTA,I2C Slave Status Register"
|
|
bitfld.word 0x00 14. " I2CSTA ,I2C Status" "Stoped,Started"
|
|
bitfld.word 0x00 13. " I2CREPS ,I2C Repeated start" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11.--12. " I2CID[1:0] ,I2C address matching" "Address matches I2C0ID0,Address matches I2C0ID1,Address matches I2C0ID2,Address matches I2C0ID3"
|
|
textline " "
|
|
bitfld.word 0x00 10. " I2CSS ,I2C stop condition after start detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " I2CGCID[1:0] ,I2C general call ID" "No general call received,General call reset and program address,General program address,General call matching alternative ID"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CGC ,I2C general call status" "Normal,Received call"
|
|
bitfld.word 0x00 6. " I2CSBUSY ,I2C slave busy status" "Stoped,Started"
|
|
bitfld.word 0x00 5. " I2CSNA ,I2C slave no acknowledge data" "Normal,No acknowledge"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CSRxFO ,Slave Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 3. " I2CSRXQ ,I2C slave receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CSTXQ ,I2C slave transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 1. " I2CSTFE ,I2C slave FIFO underflow status" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " I2CETSTA ,I2C slave early transmit FIFO status" "Not empty,Empty"
|
|
width 0x0A
|
|
rgroup.byte 0x30++0x00
|
|
line.byte 0x00 "I2C0SRX,I2C Slave Receive Register"
|
|
wgroup.byte 0x34++0x00
|
|
line.byte 0x00 "I2C0STX,I2C Slave Transmit Register"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "I2C0ALT,I2C Hardware General Call Recognition Register"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "I2C0ID0,I2C Slave Device ID Register 0"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "I2C0ID1,I2C Slave Device ID Register 1"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "I2C0ID2,I2C Slave Device ID Register 2"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "I2C0ID3,I2C Slave Device ID Register 3"
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "I2C0FSTA,I2C FIFO Status Register"
|
|
bitfld.word 0x00 9. " I2CFMTX ,Master Tx FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 8. " I2CFSTX ,Slave Tx FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " I2CMRXSTA ,I2C master receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 4.--5. " I2CMTXSTA ,I2C master transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " I2CSRXSTA ,I2C slave receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 0.--1. " I2CSTXSTA ,I2C slave transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
width 0x0B
|
|
else
|
|
base ad:0xffff0800
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7122"||cpu()=="ADUC7124")
|
|
width 0x0A
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "I2C0MCON,I2C Master Control Register"
|
|
bitfld.word 0x00 8. " I2CMCENI ,I2C transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " I2CNACKENI ,I2C no acknowledge received interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " I2CALENI ,I2C arbitration lost interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " I2CMTENI ,I2C transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " I2CMRENI ,I2C receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " I2CMSEN ,I2C master SCL stretch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " I2CILEN ,I2C internal loopback enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " I2CBD ,I2C master backoff disable" "No,Yes"
|
|
bitfld.word 0x00 0. " I2CMEN ,I2C master enable" "Disabled,Enabled"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "I2C0MSTA,I2C Master Status Registers"
|
|
bitfld.word 0x00 10. " I2CBBUSY ,I2C bus busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 9. " I2CMRxFO ,Master Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 8. " I2CMTC ,I2C transmission complete status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CMNA ,I2C master no acknowledge data" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CMBUSY ,I2C master busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 5. " I2CAL ,I2C arbitration lost status" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CMNA ,I2C master no acknowledge address" "Normal,No acknowledge"
|
|
bitfld.word 0x00 3. " I2CMRXQ ,I2C master receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CMTXQ ,I2C master transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " I2CMTFSTA ,I2C master Tx FIFO status" "I2C master Tx FIFO empty,1 byte in master Tx FIFO,1 byte in master Tx FIFO,I2C master Tx FIFO full"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "I2C0MRX,I2C Master Receive Register"
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "I2C0MTX,I2C Master Transmit Register"
|
|
width 0x0B
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "I2C0MCNT0,I2C Master Read Count Register"
|
|
bitfld.word 0x00 8. " I2CRECNT ,Required number of bytes" "256 or less,greater than 256"
|
|
hexmask.word.byte 0x00 0.--7. 1. " I2CRCNT ,Number of bytes"
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x14++0x01
|
|
line.byte 0x00 "I2C0MCNT1,I2C Master Current Read Count Register"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "I2C0MCNT1,I2C Master Current Read Count Register"
|
|
endif
|
|
if (d.w(ad:0xffff0800+0x28)&0x02)==0x00
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C0ADR0,I2C Address 0 Register"
|
|
hexmask.byte 0x00 1.--7. 0x02 " I2CADR ,Address of required slave device"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
hgroup.byte 0x1C++0x00
|
|
hide.byte 0x00 "I2C0ADR1,I2C Address 1 Register"
|
|
else
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C0ADR0,I2C Address 0 Register"
|
|
bitfld.byte 0x00 1.--2. " I2CMADR ,These bits contain ADDR[9:8]" "00,01,10,11"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "I2C0ADR1,I2C Address 1 Register"
|
|
endif
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "I2C0DIV,I2C Master Clock Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DIVH ,Duration of the high period of SCL"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIVL ,Duration of the low period of SCL"
|
|
sif (cpu()=="ADUC7122")
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "I2C0SBYTE,I2C0 Start Byte Register"
|
|
endif
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "I2C0SCON,I2C Slave Control Register"
|
|
bitfld.word 0x00 10. " I2CSTXENI ,Slave transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " I2CSRXENI ,Slave receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " I2CSSENI ,I2C stop condition detected interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CNACKEN ,I2C no acknowledge enable" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CSSEN ,I2C slave SCL stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " I2CSETEN ,I2C early transmit interrupt enable" "Negative edge of SCL,Positive edge of SCL"
|
|
textline " "
|
|
eventfld.word 0x00 4. " I2CGCCLR ,I2C general call status and ID clear" "Not cleared,Cleared"
|
|
bitfld.word 0x00 3. " I2CHGCEN ,I2C hardware general call enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " I2CGCEN ,I2C general call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ADR10EN ,I2C 10-bit address mode" "Normal,10-bit"
|
|
bitfld.word 0x00 0. " I2CSEN ,I2C slave enable" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.word 0x2C++0x01
|
|
else
|
|
group.word 0x2C++0x01
|
|
endif
|
|
line.word 0x00 "I2C0SSTA,I2C Slave Status Register"
|
|
bitfld.word 0x00 14. " I2CSTA ,I2C Status" "Stoped,Started"
|
|
bitfld.word 0x00 13. " I2CREPS ,I2C Repeated start" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11.--12. " I2CID[1:0] ,I2C address matching" "Address matches I2C0ID0,Address matches I2C0ID1,Address matches I2C0ID2,Address matches I2C0ID3"
|
|
textline " "
|
|
bitfld.word 0x00 10. " I2CSS ,I2C stop condition after start detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " I2CGCID[1:0] ,I2C general call ID" "No general call received,General call reset and program address,General program address,General call matching alternative ID"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CGC ,I2C general call status" "Normal,Received call"
|
|
bitfld.word 0x00 6. " I2CSBUSY ,I2C slave busy status" "Stoped,Started"
|
|
bitfld.word 0x00 5. " I2CSNA ,I2C slave no acknowledge data" "Normal,No acknowledge"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CSRxFO ,Slave Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 3. " I2CSRXQ ,I2C slave receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CSTXQ ,I2C slave transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 1. " I2CSTFE ,I2C slave FIFO underflow status" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " I2CETSTA ,I2C slave early transmit FIFO status" "Not empty,Empty"
|
|
width 0x0A
|
|
rgroup.byte 0x30++0x00
|
|
line.byte 0x00 "I2C0SRX,I2C Slave Receive Register"
|
|
wgroup.byte 0x34++0x00
|
|
line.byte 0x00 "I2C0STX,I2C Slave Transmit Register"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "I2C0ALT,I2C Hardware General Call Recognition Register"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "I2C0ID0,I2C Slave Device ID Register 0"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "I2C0ID1,I2C Slave Device ID Register 1"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "I2C0ID2,I2C Slave Device ID Register 2"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "I2C0ID3,I2C Slave Device ID Register 3"
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "I2C0FSTA,I2C FIFO Status Register"
|
|
bitfld.word 0x00 9. " I2CFMTX ,Master Tx FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 8. " I2CFSTX ,Slave Tx FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " I2CMRXSTA ,I2C master receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 4.--5. " I2CMTXSTA ,I2C master transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " I2CSRXSTA ,I2C slave receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 0.--1. " I2CSTXSTA ,I2C slave transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
width 0x0B
|
|
else
|
|
width 0x0A
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "I2C0MSTA,Status Register for Master Channel"
|
|
bitfld.byte 0x00 7. " MTR ,Master Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.byte 0x00 6. " MB ,Master Busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 5. " ALOSS ,Arbitration Loss" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " NACK ,No ACK" "Normal,No ACK"
|
|
bitfld.byte 0x00 3. " MRIRQ ,Master Receive IRQ" "Not received,Received"
|
|
bitfld.byte 0x00 2. " MTIRQ ,Master Transmit IRQ" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MTFIFO ,Master Transmit FIFO Underflow" "No underflow,Underflow"
|
|
bitfld.byte 0x00 0. " MTFIFONF ,Master TX FIFO Not Full" "Full,Not full"
|
|
hgroup.word 0x04++0x01
|
|
hide.word 0x00 "I2C0SSTA,Status Register for Slave Channel"
|
|
in
|
|
; bitfld.word 0x00 14. " STARTDEC ,START Decode" "Not started,Started"
|
|
; bitfld.word 0x00 13. " RSTARTDEC ,Repeated START Decode" "Not repeated,Repeated"
|
|
; bitfld.word 0x00 11.--12. " IDDEC ,ID Decode Bits" "0,1,2,3"
|
|
; textline " "
|
|
; bitfld.word 0x00 10. " SASIRQ ,Stop After Start and Matching Address Interrupt" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 8.--9. " GCID ,General Call ID" "No general call,Reset and program,Program,Alternative ID"
|
|
; bitfld.word 0x00 7. " GCI ,General Call Interrupt" "No interrupt,Interrupt"
|
|
; textline " "
|
|
; bitfld.word 0x00 6. " SB ,Slave Busy" "Not busy,Busy"
|
|
; bitfld.word 0x00 5. " NOACK ,No ACK" "No ACK,ACK"
|
|
; bitfld.word 0x00 4. " SRFO ,Slave Receive FIFO Overflow" "Not overflowed,Overflowed"
|
|
; textline " "
|
|
; bitfld.word 0x00 3. " SRIRQ ,Slave Receive IRQ" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 2. " STIRQ ,Slave Transmit IRQ" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 1. " STFIFOUN ,Slave Transmit FIFO Underflow" "Not underflowed,Underflowed"
|
|
; textline " "
|
|
; bitfld.word 0x00 0. " STFIFOE ,Slave Transmit FIFO Empty" "Not empty,Empty"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "I2C0SRX,Receive Register for Slave Channel"
|
|
wgroup.byte 0x0C--0x0C
|
|
line.byte 0x00 "I2C0STX,Transmit Register for Slave Channel"
|
|
rgroup.byte 0x10--0x10
|
|
line.byte 0x00 "I2C0MRX,Receive Register for Master Channel"
|
|
wgroup.byte 0x14--0x14
|
|
line.byte 0x00 "I2C0MTX,Transmit Register for Master Channel"
|
|
group.byte 0x18--0x18
|
|
line.byte 0x00 "I2C0CNT,Master Receive Data Count Register"
|
|
group.byte 0x1c--0x1c
|
|
line.byte 0x00 "I2C0ADR,Master Address Byte Register"
|
|
group.byte 0x24--0x24
|
|
line.byte 0x00 "I2C0BYT,Broadcast Byte Register"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "I2C0ALT,Hardware General Call ID Register"
|
|
group.word 0x2c++0x01
|
|
line.word 0x00 "I2C0CFG,Configuration register"
|
|
bitfld.word 0x00 14. " ESTOPIRQ ,Enable Stop Interrupt" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " ESSCL ,Enable Stretch SCL" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " STFIRQEN ,Slave Tx FIFO Request Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " GCSBC ,General Call Status Bit Clear" "Not cleared,Cleared"
|
|
bitfld.word 0x00 7. " MSCE ,Master Serial Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SBOD ,Start Back-Off Disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 4. " HGCE ,Hardware General Call Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " GCE ,General Call Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ME ,Master Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SE ,Slave Enable" "Disabled,Enabled"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "I2C0DIV,Clock Divider Register"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "I2C0ID0,Slave Address Device ID Register 0"
|
|
group.byte 0x3c++0x00
|
|
line.byte 0x00 "I2C0ID1,Slave Address Device ID Register 1"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "I2C0ID2,Slave Address Device ID Register 2"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "I2C0ID3,Slave Address Device ID Register 3"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "I2C0CCNT,8-bit Start/Stop Generation Counter Register"
|
|
group.word 0x4c++0x01
|
|
line.word 0x00 "I2C0FSTA,FIFO Status Register"
|
|
bitfld.word 0x00 9. " MTFIFOF ,Master Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.word 0x00 8. " STFIFOF ,Slave Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.word 0x00 6.--7. " MRFIFOS ,Master Rx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " MTFIFOS ,Master Tx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
bitfld.word 0x00 2.--3. " SRFIFOS ,Slave Rx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
bitfld.word 0x00 0.--1. " STFIFOS ,Slave Tx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
width 0x0B
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "I2C 1"
|
|
base ad:0xffff0900
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7121"||cpu()=="ADUC7122")
|
|
width 0x0A
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "I2C1MCON,I2C Master Control Register"
|
|
bitfld.word 0x00 8. " I2CMCENI ,I2C transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " I2CNACKENI ,I2C no acknowledge received interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " I2CALENI ,I2C arbitration lost interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " I2CMTENI ,I2C transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " I2CMRENI ,I2C receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " I2CMSEN ,I2C master SCL stretch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " I2CILEN ,I2C internal loopback enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " I2CBD ,I2C master backoff disable" "No,Yes"
|
|
bitfld.word 0x00 0. " I2CMEN ,I2C master enable" "Disabled,Enabled"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "I2C1MSTA,I2C Master Status Registers"
|
|
bitfld.word 0x00 10. " I2CBBUSY ,I2C bus busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 9. " I2CMRxFO ,Master Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 8. " I2CMTC ,I2C transmission complete status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CMNA ,I2C master no acknowledge data" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CMBUSY ,I2C master busy status" "Not busy,Busy"
|
|
bitfld.word 0x00 5. " I2CAL ,I2C arbitration lost status" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CMNA ,I2C master no acknowledge address" "Normal,No acknowledge"
|
|
bitfld.word 0x00 3. " I2CMRXQ ,I2C master receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CMTXQ ,I2C master transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " I2CMTFSTA ,I2C master Tx FIFO status" "I2C master Tx FIFO empty,1 byte in master Tx FIFO,1 byte in master Tx FIFO,I2C master Tx FIFO full"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "I2C1MRX,I2C Master Receive Register"
|
|
wgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "I2C1MTX,I2C Master Transmit Register"
|
|
width 0x0B
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "I2C1MCNT0,I2C Master Read Count Register"
|
|
bitfld.word 0x00 8. " I2CRECNT ,Required number of bytes" "256 or less,greater than 256"
|
|
hexmask.word.byte 0x00 0.--7. 1. " I2CRCNT ,Number of bytes"
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.byte 0x14++0x01
|
|
line.byte 0x00 "I2C1MCNT1,I2C Master Current Read Count Register"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "I2C1MCNT1,I2C Master Current Read Count Register"
|
|
endif
|
|
if (d.w(ad:0xffff0900+0x28)&0x02)==0x00
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C1ADR0,I2C Address 0 Register"
|
|
hexmask.byte 0x00 1.--7. 0x02 " I2CADR ,Address of required slave device"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
hgroup.byte 0x1C++0x00
|
|
hide.byte 0x00 "I2C1ADR1,I2C Address 1 Register"
|
|
else
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "I2C1ADR0,I2C Address 0 Register"
|
|
bitfld.byte 0x00 1.--2. " I2CMADR ,These bits contain ADDR[9:8]" "00,01,10,11"
|
|
bitfld.byte 0x00 0. " R/W ,Read/Write" "Write,Read"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "I2C1ADR1,I2C Address 1 Register"
|
|
endif
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "I2C1DIV,I2C Master Clock Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DIVH ,Duration of the high period of SCL"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DIVL ,Duration of the low period of SCL"
|
|
sif (cpu()=="ADUC7122")
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "I2C1SBYTE,I2C1 Start Byte Register"
|
|
endif
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "I2C1SCON,I2C Slave Control Register"
|
|
bitfld.word 0x00 10. " I2CSTXENI ,Slave transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " I2CSRXENI ,Slave receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " I2CSSENI ,I2C stop condition detected interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CNACKEN ,I2C no acknowledge enable" "Normal,No acknowledge"
|
|
bitfld.word 0x00 6. " I2CSSEN ,I2C slave SCL stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " I2CSETEN ,I2C early transmit interrupt enable" "Negative edge of SCL,Positive edge of SCL"
|
|
textline " "
|
|
eventfld.word 0x00 4. " I2CGCCLR ,I2C general call status and ID clear" "Not cleared,Cleared"
|
|
bitfld.word 0x00 3. " I2CHGCEN ,I2C hardware general call enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " I2CGCEN ,I2C general call enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ADR10EN ,I2C 10-bit address mode" "Normal,10-bit"
|
|
bitfld.word 0x00 0. " I2CSEN ,I2C slave enable" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7122")
|
|
rgroup.word 0x2C++0x01
|
|
else
|
|
group.word 0x2C++0x01
|
|
endif
|
|
line.word 0x00 "I2C1SSTA,I2C Slave Status Register"
|
|
bitfld.word 0x00 14. " I2CSTA ,I2C Status" "Stoped,Started"
|
|
bitfld.word 0x00 13. " I2CREPS ,I2C Repeated start" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11.--12. " I2CID[1:0] ,I2C address matching" "Address matches I2C1ID0,Address matches I2C1ID1,Address matches I2C1ID2,Address matches I2C1ID3"
|
|
textline " "
|
|
bitfld.word 0x00 10. " I2CSS ,I2C stop condition after start detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " I2CGCID[1:0] ,I2C general call ID" "No general call received,General call reset and program address,General program address,General call matching alternative ID"
|
|
textline " "
|
|
bitfld.word 0x00 7. " I2CGC ,I2C general call status" "Normal,Received call"
|
|
bitfld.word 0x00 6. " I2CSBUSY ,I2C slave busy status" "Stoped,Started"
|
|
bitfld.word 0x00 5. " I2CSNA ,I2C slave no acknowledge data" "Normal,No acknowledge"
|
|
textline " "
|
|
bitfld.word 0x00 4. " I2CSRxFO ,Slave Rx FIFO overflow" "No overflow,Overflow"
|
|
bitfld.word 0x00 3. " I2CSRXQ ,I2C slave receive request" "Not received,Received"
|
|
bitfld.word 0x00 2. " I2CSTXQ ,I2C slave transmit request" "Not transmited,Transmited"
|
|
textline " "
|
|
bitfld.word 0x00 1. " I2CSTFE ,I2C slave FIFO underflow status" "Not empty,Empty"
|
|
bitfld.word 0x00 0. " I2CETSTA ,I2C slave early transmit FIFO status" "Not empty,Empty"
|
|
width 0x0A
|
|
rgroup.byte 0x30++0x00
|
|
line.byte 0x00 "I2C1SRX,I2C Slave Receive Register"
|
|
wgroup.byte 0x34++0x00
|
|
line.byte 0x00 "I2C1STX,I2C Slave Transmit Register"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "I2C1ALT,I2C Hardware General Call Recognition Register"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "I2C1ID0,I2C Slave Device ID Register 0"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "I2C1ID1,I2C Slave Device ID Register 1"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "I2C1ID2,I2C Slave Device ID Register 2"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "I2C1ID3,I2C Slave Device ID Register 3"
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "I2C1FSTA,I2C FIFO Status Register"
|
|
bitfld.word 0x00 9. " I2CFMTX ,Master Tx FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 8. " I2CFSTX ,Slave Tx FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " I2CMRXSTA ,I2C master receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 4.--5. " I2CMTXSTA ,I2C master transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " I2CSRXSTA ,I2C slave receive FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
bitfld.word 0x00 0.--1. " I2CSTXSTA ,I2C slave transmit FIFO status" "FIFO empty,byte written to FIFO,1 byte in FIFO,FIFO full"
|
|
width 0x0B
|
|
else
|
|
width 0x0A
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "I2C1MSTA,Status Register for Master Channel"
|
|
bitfld.byte 0x00 7. " MTR ,Master Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.byte 0x00 6. " MB ,Master Busy" "Not busy,Busy"
|
|
bitfld.byte 0x00 5. " ALOSS ,Arbitration Loss" "Not lost,Lost"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " NACK ,No ACK" "Normal,No ACK"
|
|
bitfld.byte 0x00 3. " MRIRQ ,Master Receive IRQ" "Not received,Received"
|
|
bitfld.byte 0x00 2. " MTIRQ ,Master Transmit IRQ" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MTFIFO ,Master Transmit FIFO Underflow" "No underflow,Underflow"
|
|
bitfld.byte 0x00 0. " MTFIFONF ,Master TX FIFO Not Full" "Full,Not full"
|
|
hgroup.word 0x04++0x01
|
|
hide.word 0x00 "I2C1SSTA,Status Register for Slave Channel"
|
|
in
|
|
; bitfld.word 0x00 14. " STARTDEC ,START Decode" "Not started,Started"
|
|
; bitfld.word 0x00 13. " RSTARTDEC ,Repeated START Decode" "Not repeated,Repeated"
|
|
; bitfld.word 0x00 11.--12. " IDDEC ,ID Decode Bits" "0,1,2,3"
|
|
; textline " "
|
|
; bitfld.word 0x00 10. " SASIRQ ,Stop After Start and Matching Address Interrupt" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 8.--9. " GCID ,General Call ID" "No general call,Reset and program,Program,Alternative ID"
|
|
; bitfld.word 0x00 7. " GCI ,General Call Interrupt" "No interrupt,Interrupt"
|
|
; textline " "
|
|
; bitfld.word 0x00 6. " SB ,Slave Busy" "Not busy,Busy"
|
|
; bitfld.word 0x00 5. " NOACK ,No ACK" "No ACK,ACK"
|
|
; bitfld.word 0x00 4. " SRFO ,Slave Receive FIFO Overflow" "Not overflowed,Overflowed"
|
|
; textline " "
|
|
; bitfld.word 0x00 3. " SRIRQ ,Slave Receive IRQ" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 2. " STIRQ ,Slave Transmit IRQ" "No interrupt,Interrupt"
|
|
; bitfld.word 0x00 1. " STFIFOUN ,Slave Transmit FIFO Underflow" "Not underflowed,Underflowed"
|
|
; textline " "
|
|
; bitfld.word 0x00 0. " STFIFOE ,Slave Transmit FIFO Empty" "Not empty,Empty"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "I2C1SRX,Receive Register for Slave Channel"
|
|
wgroup.byte 0x0C--0x0C
|
|
line.byte 0x00 "I2C1STX,Transmit Register for Slave Channel"
|
|
rgroup.byte 0x10--0x10
|
|
line.byte 0x00 "I2C1MRX,Receive Register for Master Channel"
|
|
wgroup.byte 0x14--0x14
|
|
line.byte 0x00 "I2C1MTX,Transmit Register for Master Channel"
|
|
group.byte 0x18--0x18
|
|
line.byte 0x00 "I2C1CNT,Master Receive Data Count Register"
|
|
group.byte 0x1c--0x1c
|
|
line.byte 0x00 "I2C1ADR,Master Address Byte Register"
|
|
group.byte 0x24--0x24
|
|
line.byte 0x00 "I2C1BYT,Broadcast Byte Register"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "I2C1ALT,Hardware General Call ID Register"
|
|
group.word 0x2c++0x01
|
|
line.word 0x00 "I2C1CFG,Configuration register"
|
|
bitfld.word 0x00 14. " ESTOPIRQ ,Enable Stop Interrupt" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " ESSCL ,Enable Stretch SCL" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " STFIRQEN ,Slave Tx FIFO Request Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " GCSBC ,General Call Status Bit Clear" "Not cleared,Cleared"
|
|
bitfld.word 0x00 7. " MSCE ,Master Serial Clock Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SBOD ,Start Back-Off Disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 4. " HGCE ,Hardware General Call Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " GCE ,General Call Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ME ,Master Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " SE ,Slave Enable" "Disabled,Enabled"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "I2C1DIV,Clock Divider Register"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "I2C1ID0,Slave Address Device ID Register 0"
|
|
group.byte 0x3c++0x00
|
|
line.byte 0x00 "I2C1ID1,Slave Address Device ID Register 1"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "I2C1ID2,Slave Address Device ID Register 2"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "I2C1ID3,Slave Address Device ID Register 3"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "I2C1CCNT,8-bit Start/Stop Generation Counter Register"
|
|
group.word 0x4c++0x01
|
|
line.word 0x00 "I2C1FSTA,FIFO Status Register"
|
|
bitfld.word 0x00 9. " MTFIFOF ,Master Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.word 0x00 8. " STFIFOF ,Slave Transmit FIFO Flush" "No effect,Flushed"
|
|
bitfld.word 0x00 6.--7. " MRFIFOS ,Master Rx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " MTFIFOS ,Master Tx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
bitfld.word 0x00 2.--3. " SRFIFOS ,Slave Rx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
bitfld.word 0x00 0.--1. " STFIFOS ,Slave Tx FIFO Status" "Empty,Byte written,1 Byte,Full"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "SPI"
|
|
base ad:0xFFFF0A00
|
|
width 0x08
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7124")
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "SPISTA,SPI Status Register"
|
|
bitfld.word 0x00 11. " SPIREX ,SPI Rx FIFO excess bytes present" "Less or equal SPIMDE,More than SPIMDE"
|
|
bitfld.word 0x00 8.--10. " SPIRXFSTA[2:0] ,SPI Rx FIFO status" "Empty,1 valid byte,2 valid byte,3 valid byte,4 valid byte,?..."
|
|
textline " "
|
|
bitfld.word 0x00 7. " SPIFOF ,SPI Rx FIFO overflow status" "No overflow,Overflow"
|
|
bitfld.word 0x00 6. " SPIRXIRQ ,SPI Rx IRQ status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SPITXIRQ ,SPI Tx IRQ status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " SPITXUF ,SPI Tx FIFO underflow" "No underflow,Underflow"
|
|
textline " "
|
|
bitfld.word 0x00 1.--3. " SPITXFSTA[2:0] ,SPI Tx FIFO status" "Empty,1 valid byte,2 valid byte,3 valid byte,4 valid byte,?..."
|
|
bitfld.word 0x00 0. " SPIISTA ,SPI interrupt status" "No interrupt,Interrupt"
|
|
else
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "SPISTA,Status Register"
|
|
bitfld.byte 0x00 5. " SPIRXDROVR ,SPIRX Data Register Overflow Status" "No overflow,Overflow"
|
|
bitfld.byte 0x00 4. " SPIRXDRIRQ ,SPIRX Data Register IRQ" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 3. " SPIRXDRFULL ,SPIRX Data Register Full Status" "Not full,Full"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " SPITXDRUFW ,SPITX Data Register Underflow Status" "No underflow,Underflow"
|
|
bitfld.byte 0x00 1. " SPITXDRIRQ ,SPITX Data Register IRQ" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " SPITXDREMP ,SPITX Data Register Empty Status" "Empty,Not empty"
|
|
endif
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7122"||cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
hgroup.byte 0x04++0x00
|
|
hide.byte 0x00 "SPIRX,Receive Register"
|
|
in
|
|
else
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "SPIRX,Receive Register"
|
|
endif
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "SPITX,Transmit Register"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "SPIDIV,Serial Clock Divider Register"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SPICON,Control Register"
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7124")
|
|
bitfld.word 0x00 14.--15. " SPIMDE ,SPI IRQ mode" "One byte,Two bytes,Three bytes,Four bytes"
|
|
bitfld.word 0x00 13. " SPITFLH ,SPI Tx FIFO flush enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " SPIRFLH ,SPI Rx FIFO flush enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " SPICONT ,Continuous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " SPILP ,Loop back enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " SPIOEN ,Slave MISO output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " SPIROW ,SPIRX overflow overwrite enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " SPIZEN ,SPI transmit zeros when Tx FIFO is empty" "Last value,Zeros"
|
|
bitfld.word 0x00 6. " SPITMDE ,SPI transfer and interrupt mode" "Read,Write"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SPILF ,LSB first transfer enable" "MSB,LSB"
|
|
bitfld.word 0x00 4. " SPIWOM ,SPI wired or mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " SCPOM ,Serial Clock Polarity Mode" "Idles low,Idles high"
|
|
else
|
|
bitfld.word 0x00 12. " CTE ,Continuous Transfer Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " SOE ,Slave Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " SSIE ,Slave Select Input Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " SPIRXOOE ,SPIRX Overflow Overwrite Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " SPITXUM ,SPITX Underflow Mode" "Transmit 0,Previous data"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TIM ,Transfer and Interrupt Mode (master mode)" "RX full,TX empty"
|
|
bitfld.word 0x00 5. " LSBFTE ,LSB First Transfer Enable" "MSB,LSB"
|
|
bitfld.word 0x00 3. " SCPOM ,Serial Clock Polarity Mode" "Idles low,Idles high"
|
|
endif
|
|
textline " "
|
|
bitfld.word 0x00 2. " SCPHM ,Serial Clock Phase Mode" "At end,At beginning"
|
|
bitfld.word 0x00 1. " MME ,Master Mode Enable" "Slave,Master"
|
|
bitfld.word 0x00 0. " SPIE ,SPI Enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Programmable Logic Array"
|
|
base ad:0xFFFF0B00
|
|
width 0x0A
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PLAELM0,Element 0 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) Control" "Element 15,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) Control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) Control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PLAELM1,Element 1 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PLAELM2,Element 2 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PLAELM3,Element 3 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PLAELM4,Element 4 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PLAELM5,Element 5 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "PLAELM6,Element 6 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PLAELM7,Element 7 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 0,Element 2,Element 4,Element 6"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 1,Element 3,Element 5,Element 7"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PLAELM8,Element 8 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 7,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "PLAELM9,Element 9 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "PLAELM10,Element 10 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "PLAELM11,Element 11 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x30++0x1
|
|
line.word 0x00 "PLAELM12,Element 12 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "PLAELM13,Element 13 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "PLAELM14,Element 14 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "PLAELM15,Element 15 Control Register"
|
|
bitfld.word 0x00 9.--10. " MUX0_CTRL ,Mux (0) control" "Element 8,Element 10,Element 12,Element 14"
|
|
bitfld.word 0x00 7.--8. " MUX1_CTRL ,Mux (1) control" "Element 9,Element 11,Element 13,Element 15"
|
|
bitfld.word 0x00 6. " MUX2_CTRL ,Mux (2) control" "PLADIN,Mux0 out"
|
|
textline " "
|
|
bitfld.word 0x00 5. " MUX3_CTRL ,Mux (3) control" "Mux1 out,Particular"
|
|
bitfld.word 0x00 1.--4. " LUT ,Look-up table control" "0,NOR,B AND NOT A,NOT A,A AND NOT B,NOT B,EXOR,NAND,AND,EXNOR,B,NOT A OR B,A,A OR NOT B,OR,1"
|
|
bitfld.word 0x00 0. " MUX4_CTRL ,Mux (4) control" "Flip-flop,Bypassed"
|
|
group.byte 0x40++0x0
|
|
line.byte 0x00 "PLACLK,Clock Selection For The Flip-Flops Of Block 0 And 1 Register"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.byte 0x00 4.--6. " BLOCK1_CSS ,Block 1 clock source selection" "GPIO P0.5,GPIO P1.1,GPIO P1.6,HCLK,External,Timer1 overflow,UCLK,Internal"
|
|
bitfld.byte 0x00 0.--2. " BLOCK0_CSS ,Block 0 clock source selection" "GPIO P0.5,GPIO P1.1,GPIO P1.6,HCLK,External,Timer1 overflow,UCLK,Internal"
|
|
elif (cpu()=="ADUC7124")
|
|
bitfld.byte 0x00 4.--6. " BLOCK1_CSS ,Block 1 clock source selection" "GPIO P0.5,GPIO P0.0,GPIO P0.7,HCLK,OCLK,Timer1 overflow,UCLK,Internal"
|
|
bitfld.byte 0x00 0.--2. " BLOCK0_CSS ,Block 0 clock source selection" "GPIO P0.5,GPIO P0.0,GPIO P0.7,HCLK,OCLK,Timer1 overflow,?..."
|
|
elif ((cpu()=="ADUC7128")||(cpu()=="ADUC7129"))
|
|
bitfld.byte 0x00 4.--6. " BLOCK1_CSS ,Block 1 clock source selection" "GPIO P0.5,GPIO P1.1,GPIO P1.6,HCLK,External,Timer1 overflow,Timer4 overflow,?..."
|
|
bitfld.byte 0x00 0.--2. " BLOCK0_CSS ,Block 0 clock source selection" "GPIO P0.5,GPIO P1.1,GPIO P1.6,HCLK,External,Timer1 overflow,Timer4 overflow,?..."
|
|
else
|
|
bitfld.byte 0x00 4.--6. " BLOCK1_CSS ,Block 1 clock source selection" "GPIO P0.5,GPIO P0.0,GPIO P0.7,HCLK,OCLK,Timer1 overflow,?..."
|
|
bitfld.byte 0x00 0.--2. " BLOCK0_CSS ,Block 0 clock source selection" "GPIO P0.5,GPIO P0.0,GPIO P0.7,HCLK,OCLK,Timer1 overflow,?..."
|
|
endif
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "PLAIRQ,Enable IRQ0 Or/And IRQ1 And Select The Source Of The IRQ"
|
|
bitfld.long 0x00 12. " IRQ1_ENA ,PLA IRQ1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " IRQ1_SOURCE ,PLA IRQ1 source" "Element 0,Element 1,Element 2,Element 3,Element 4,Element 5,Element 6,Element 7,Element 8,Element 9,Element 10,Element 11,Element 12,Element 13,Element 14,Element 15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQ0_ENA ,PLA IRQ0 enable" "Disabled,Enabled"
|
|
sif ((cpu()=="ADUC7122")||(cpu()=="ADUC7128")||(cpu()=="ADUC7129"))
|
|
bitfld.long 0x00 0.--3. " IRQ0_SOURCE ,PLA IRQ0 source" "Element 0,Element 1,Element 2,Element 3,Element 4,Element 5,Element 6,Element 7,?..."
|
|
else
|
|
bitfld.long 0x00 0.--3. " IRQ0_SOURCE ,PLA IRQ0 source" "Element 0,Element 1,Element 2,Element 3,Element 4,Element 5,Element 6,Element 7,Element 8,Element 9,Element 10,Element 11,Element 12,Element 13,Element 14,Element 15"
|
|
endif
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "PLAADC,PLA Source From ADC Start Conversion Signal Register"
|
|
bitfld.long 0x00 4. " ADC_SCE ,ADC start conversion enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " ADC_SCS ,ADC start conversion source" "Element 0,Element 1,Element 2,Element 3,Element 4,Element 5,Element 6,Element 7,Element 8,Element 9,Element 10,Element 11,Element 12,Element 13,Element 14,Element 15"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "PLADIN,Data input for PLA"
|
|
bitfld.long 0x00 15. " IN15 ,Input Bit to element 15" "Low,High"
|
|
bitfld.long 0x00 14. " IN14 ,Input Bit to element 14" "Low,High"
|
|
bitfld.long 0x00 13. " IN13 ,Input Bit to element 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IN12 ,Input Bit to element 12" "Low,High"
|
|
bitfld.long 0x00 11. " IN11 ,Input Bit to element 11" "Low,High"
|
|
bitfld.long 0x00 10. " IN10 ,Input Bit to element 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IN9 ,Input Bit to element 9" "Low,High"
|
|
bitfld.long 0x00 8. " IN8 ,Input Bit to element 8" "Low,High"
|
|
bitfld.long 0x00 7. " IN7 ,Input Bit to element 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IN6 ,Input Bit to element 6" "Low,High"
|
|
bitfld.long 0x00 5. " IN5 ,Input Bit to element 5" "Low,High"
|
|
bitfld.long 0x00 4. " IN4 ,Input Bit to element 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IN3 ,Input Bit to element 3" "Low,High"
|
|
bitfld.long 0x00 2. " IN2 ,Input Bit to element 2" "Low,High"
|
|
bitfld.long 0x00 1. " IN1 ,Input Bit to element 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IN0 ,Input Bit to element 0" "Low,High"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x00 "PLADOUT,Data output for PLA"
|
|
bitfld.long 0x00 15. " OUT15 ,Output Bit from element 15" "Low,High"
|
|
bitfld.long 0x00 14. " OUT14 ,Output Bit from element 14" "Low,High"
|
|
bitfld.long 0x00 13. " OUT13 ,Output Bit from element 13" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " OUT12 ,Output Bit from element 12" "Low,High"
|
|
bitfld.long 0x00 11. " OUT11 ,Output Bit from element 11" "Low,High"
|
|
bitfld.long 0x00 10. " OUT10 ,Output Bit from element 10" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUT9 ,Output Bit from element 9" "Low,High"
|
|
bitfld.long 0x00 8. " OUT8 ,Output Bit from element 8" "Low,High"
|
|
bitfld.long 0x00 7. " OUT7 ,Output Bit from element 7" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " OUT6 ,Output Bit from element 6" "Low,High"
|
|
bitfld.long 0x00 5. " OUT5 ,Output Bit from element 5" "Low,High"
|
|
bitfld.long 0x00 4. " OUT4 ,Output Bit from element 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OUT3 ,Output Bit from element 3" "Low,High"
|
|
bitfld.long 0x00 2. " OUT2 ,Output Bit from element 2" "Low,High"
|
|
bitfld.long 0x00 1. " OUT1 ,Output Bit from element 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OUT0 ,Output Bit from element 0" "Low,High"
|
|
sif (cpu()!="ADUC7122"&&cpu()!="ADUC7128"&&cpu()!="ADUC7129")
|
|
wgroup.byte 0x54++0x0
|
|
line.byte 0x00 "PLALCK,PLA Lock Option Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "GPIO"
|
|
base ad:0xFFFFF400
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,ECLK/XCLK,SIN,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO/T1,MRST,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO/IRQ1,ADCBUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TRST,A16,ADCBUSY"
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-Up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-Up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-Up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-Up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-Up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-Up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO,SOUT,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO/T1,SIN,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-Up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-Up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-Up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-Up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-Up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-Up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-Up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-Up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin Functions"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P1.0 Function" "GPIO,/CONVSTART,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 4"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "GP4CON,GPIO Port 4 Pin Functions"
|
|
bitfld.long 0x00 8.--9. " P4.2_FUN ,Port P4.2 Function" "GPIO,Reserved,AD10,PLAO[10]"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x3
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Cleared"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7021"||cpu()=="ADUC7022")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,ECLK/XCLK,SIN,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO/T1,MRST,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO/IRQ1,ADCBUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TRST,A16,ADCBUSY"
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-Up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-Up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-Up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-Up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-Up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-Up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO,SOUT,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO/T1,SIN,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-Up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-Up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-Up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-Up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-Up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-Up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-Up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-Up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin Functions"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P2.0 Function" "GPIO,/CONVSTART,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7028")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,ECLK/XCLK,SIN,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO/T1,MRST,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO/IRQ1,ADCBUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TRST,A16,ADCBUSY"
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-Up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-Up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-Up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-Up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-Up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-Up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO,SOUT,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO/T1,SIN,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-Up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-Up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-Up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-Up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-Up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-Up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-Up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-Up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin Functions"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P1.0 Function" "GPIO,/CONVSTART,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 3"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "GP3CON,GPIO Port 3 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P3.7_FUN ,Port P3.7 Function" "GPIO,PWMSYNC,AD7,PLAI[15]"
|
|
bitfld.long 0x00 24.--25. " P3.6_FUN ,Port P3.6 Function" "GPIO,PWMTRIP,AD6,PLAI[14]"
|
|
bitfld.long 0x00 20.--21. " P3.5_FUN ,Port P3.5 Function" "GPIO,PWM2L,AD5,PLAI[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4_FUN ,Port P3.4 Function" "GPIO,PWM2H,AD4,PLAI[12]"
|
|
bitfld.long 0x00 12.--13. " P3.3_FUN ,Port P3.3 Function" "GPIO,PWM1L,AD3,PLAI[11]"
|
|
bitfld.long 0x00 8.--9. " P3.2_FUN ,Port P3.2 Function" "GPIO,PWM1H,AD2,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1_FUN ,Port P3.1 Function" "GPIO,PWM0L,AD1,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P3.0_FUN ,Port P3.0 Function" "GPIO,PWM0H,AD0,PLAI[8]"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "GP3PAR,Program the Parameters for Port 3 Register"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull-Up Disable P3.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull-Up Disable P3.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull-Up Disable P3.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull-Up Disable P3.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull-Up Disable P3.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull-Up Disable P3.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull-Up Disable P3.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull-Up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x3
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 23. " P3.7_SET ,Port 3.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x3
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 23. " P3.7_CLR ,Port 3.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P3.6_CLR ,Port 3.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 4"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "GP4CON,GPIO Port 4 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P4.7_FUN ,Port P4.7 Function" "GPIO,Reserved,AD15,PLAO[15]"
|
|
bitfld.long 0x00 24.--25. " P4.6_FUN ,Port P4.6 Function" "GPIO,Reserved,AD14,PLAO[14]"
|
|
bitfld.long 0x00 20.--21. " P4.5_FUN ,Port P4.5 Function" "GPIO,Reserved,AD13,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P4.4_FUN ,Port P4.4 Function" "GPIO,Reserved,AD12,PLAO[12]"
|
|
bitfld.long 0x00 12.--13. " P4.3_FUN ,Port P4.3 Function" "GPIO,Reserved,AD11,PLAO[11]"
|
|
bitfld.long 0x00 8.--9. " P4.2_FUN ,Port P4.2 Function" "GPIO,Reserved,AD10,PLAO[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P4.1_FUN ,Port P4.1 Function" "GPIO,Reserved,AD9,PLAO[9]"
|
|
bitfld.long 0x00 0.--1. " P4.0_FUN ,Port P4.0 Function" "GPIO,Reserved,AD8,PLAO[8]"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P4.7_DIR ,Port 4.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P4.6_DIR ,Port 4.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P4.5_DIR ,Port 4.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P4.4_DIR ,Port 4.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P4.3_DIR ,Port 4.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P4.1_DIR ,Port 4.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P4.0_DIR ,Port 4.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P4.7_OUT ,Port 4.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P4.6_OUT ,Port 4.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P4.5_OUT ,Port 4.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P4.4_OUT ,Port 4.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P4.3_OUT ,Port 4.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P4.1_OUT ,Port 4.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P4.0_OUT ,Port 4.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P4.7_RST_ST ,Port 4.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P4.6_RST_ST ,Port 4.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P4.5_RST_ST ,Port 4.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P4.4_RST_ST ,Port 4.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P4.3_RST_ST ,Port 4.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P4.1_RST_ST ,Port 4.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P4.0_RST_ST ,Port 4.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P4.7_IN ,Port 4.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P4.6_IN ,Port 4.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P4.5_IN ,Port 4.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4.4_IN ,Port 4.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P4.3_IN ,Port 4.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P4.1_IN ,Port 4.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P4.0_IN ,Port 4.0 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 23. " P4.7_SET ,Port 4.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P4.6_SET ,Port 4.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P4.5_SET ,Port 4.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_SET ,Port 4.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P4.3_SET ,Port 4.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_SET ,Port 4.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P4.0_SET ,Port 4.0 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x3
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 23. " P4.7_CLR ,Port 4.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P4.6_CLR ,Port 4.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P4.5_CLR ,Port 4.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_CLR ,Port 4.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P4.3_CLR ,Port 4.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_CLR ,Port 4.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P4.0_CLR ,Port 4.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7026"||cpu()=="ADUC7027")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 0 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,ECLK/XCLK,SIN,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO/T1,MRST,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO/IRQ1,ADCBUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TRST,A16,ADCBUSY"
|
|
bitfld.long 0x00 8.--9. " P0.2_FUN ,Port P0.2 Function" "GPIO,PWM2L,/BHE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.1_FUN ,Port P0.1 Function" "GPIO,PWM2H,/BLE,?..."
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO/BM,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-Up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-Up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-Up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-Up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-Up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull-Up Disable P0.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull-Up Disable P0.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-Up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P0.2_SET ,Port 0.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_SET ,Port 0.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P0.2_CLR ,Port 0.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_CLR ,Port 0.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO,SOUT,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO/T1,SIN,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-Up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-Up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-Up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-Up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-Up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-Up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-Up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-Up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P2.7_FUN ,Port P2.7 Function" "GPIO,PWM1L,MS3,?..."
|
|
bitfld.long 0x00 24.--25. " P2.6_FUN ,Port P2.6 Function" "GPIO,PWM1H,MS2,?..."
|
|
bitfld.long 0x00 20.--21. " P2.5_FUN ,Port P2.5 Function" "GPIO,PWM0L,MS1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P2.4_FUN ,Port P2.4 Function" "GPIO,PWM0H,MS0,?..."
|
|
bitfld.long 0x00 12.--13. " P2.3_FUN ,Port P2.3 Function" "GPIO,Reserved,AE,?..."
|
|
bitfld.long 0x00 8.--9. " P2.2_FUN ,Port P2.2 Function" "GPIO,PWM0L,/RS,PLAO[7]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P2.1_FUN ,Port P2.1 Function" "GPIO,PWM0H,/WS,PLAO[6]"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P2.0 Function" "GPIO,/CONVSTART,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P2.7_DIR ,Port 2.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.6_DIR ,Port 2.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.5_DIR ,Port 2.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P2.1_DIR ,Port 2.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P2.7_OUT ,Port 2.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P2.6_OUT ,Port 2.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P2.5_OUT ,Port 2.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P2.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P2.1_OUT ,Port 2.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P2.7_RST_ST ,Port 2.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P2.6_RST_ST ,Port 2.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P2.5_RST_ST ,Port 2.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P2.1_RST_ST ,Port 2.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7_IN ,Port 2.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P2.6_IN ,Port 2.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P2.5_IN ,Port 2.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P2.1_IN ,Port 2.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 23. " P2.7_SET ,Port 2.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P2.6_SET ,Port 2.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P2.5_SET ,Port 2.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_SET ,Port 2.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P2.3_SET ,Port 2.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P2.2_SET ,Port 2.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_SET ,Port 2.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 23. " P2.7_CLR ,Port 2.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P2.6_CLR ,Port 2.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P2.5_CLR ,Port 2.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_CLR ,Port 2.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P2.3_CLR ,Port 2.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P2.2_CLR ,Port 2.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_CLR ,Port 2.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 3"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "GP3CON,GPIO Port 3 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P3.7_FUN ,Port P3.7 Function" "GPIO,PWMSYNC,AD7,PLAI[15]"
|
|
bitfld.long 0x00 24.--25. " P3.6_FUN ,Port P3.6 Function" "GPIO,PWMTRIP,AD6,PLAI[14]"
|
|
bitfld.long 0x00 20.--21. " P3.5_FUN ,Port P3.5 Function" "GPIO,PWM2L,AD5,PLAI[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4_FUN ,Port P3.4 Function" "GPIO,PWM2H,AD4,PLAI[12]"
|
|
bitfld.long 0x00 12.--13. " P3.3_FUN ,Port P3.3 Function" "GPIO,PWM1L,AD3,PLAI[11]"
|
|
bitfld.long 0x00 8.--9. " P3.2_FUN ,Port P3.2 Function" "GPIO,PWM1H,AD2,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1_FUN ,Port P3.1 Function" "GPIO,PWM0L,AD1,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P3.0_FUN ,Port P3.0 Function" "GPIO,PWM0H,AD0,PLAI[8]"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "GP3PAR,Program the Parameters for Port 3 Register"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull-Up Disable P3.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull-Up Disable P3.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull-Up Disable P3.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull-Up Disable P3.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull-Up Disable P3.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull-Up Disable P3.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull-Up Disable P3.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull-Up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x3
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 23. " P3.7_SET ,Port 3.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x3
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 23. " P3.7_CLR ,Port 3.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P3.6_CLR ,Port 3.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 4"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "GP4CON,GPIO Port 4 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P4.7_FUN ,Port P4.7 Function" "GPIO,Reserved,AD15,PLAO[15]"
|
|
bitfld.long 0x00 24.--25. " P4.6_FUN ,Port P4.6 Function" "GPIO,Reserved,AD14,PLAO[14]"
|
|
bitfld.long 0x00 20.--21. " P4.5_FUN ,Port P4.5 Function" "GPIO,Reserved,AD13,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P4.4_FUN ,Port P4.4 Function" "GPIO,Reserved,AD12,PLAO[12]"
|
|
bitfld.long 0x00 12.--13. " P4.3_FUN ,Port P4.3 Function" "GPIO,Reserved,AD11,PLAO[11]"
|
|
bitfld.long 0x00 8.--9. " P4.2_FUN ,Port P4.2 Function" "GPIO,Reserved,AD10,PLAO[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P4.1_FUN ,Port P4.1 Function" "GPIO,Reserved,AD9,PLAO[9]"
|
|
bitfld.long 0x00 0.--1. " P4.0_FUN ,Port P4.0 Function" "GPIO,Reserved,AD8,PLAO[8]"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P4.7_DIR ,Port 4.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P4.6_DIR ,Port 4.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P4.5_DIR ,Port 4.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P4.4_DIR ,Port 4.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P4.3_DIR ,Port 4.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P4.1_DIR ,Port 4.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P4.0_DIR ,Port 4.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P4.7_OUT ,Port 4.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P4.6_OUT ,Port 4.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P4.5_OUT ,Port 4.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P4.4_OUT ,Port 4.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P4.3_OUT ,Port 4.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P4.1_OUT ,Port 4.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P4.0_OUT ,Port 4.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P4.7_RST_ST ,Port 4.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P4.6_RST_ST ,Port 4.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P4.5_RST_ST ,Port 4.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P4.4_RST_ST ,Port 4.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P4.3_RST_ST ,Port 4.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P4.1_RST_ST ,Port 4.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P4.0_RST_ST ,Port 4.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P4.7_IN ,Port 4.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P4.6_IN ,Port 4.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P4.5_IN ,Port 4.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4.4_IN ,Port 4.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P4.3_IN ,Port 4.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P4.1_IN ,Port 4.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P4.0_IN ,Port 4.0 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 23. " P4.7_SET ,Port 4.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P4.6_SET ,Port 4.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P4.5_SET ,Port 4.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_SET ,Port 4.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P4.3_SET ,Port 4.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_SET ,Port 4.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P4.0_SET ,Port 4.0 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x3
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 23. " P4.7_CLR ,Port 4.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P4.6_CLR ,Port 4.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P4.5_CLR ,Port 4.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_CLR ,Port 4.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P4.3_CLR ,Port 4.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_CLR ,Port 4.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P4.0_CLR ,Port 4.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7029")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 0 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,ECLK/XCLK,SIN,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO/T1,MRST,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO/IRQ1,ADCBUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TRST,A16,ADCBUSY"
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO/BM,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-Up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-Up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-Up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-Up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-Up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-Up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO,SOUT,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO/T1,SIN,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-Up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-Up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-Up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-Up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-Up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-Up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-Up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-Up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin functions"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P2.0 Function" "GPIO,/CONVSTART,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
tree "GPIO Port 3"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "GP3CON,GPIO Port 3 Pin functions"
|
|
bitfld.long 0x00 24.--25. " P3.6_FUN ,Port P3.6 Function" "GPIO,PWMTRIP,AD6,PLAI[14]"
|
|
bitfld.long 0x00 20.--21. " P3.5_FUN ,Port P3.5 Function" "GPIO,PWM2L,AD5,PLAI[13]"
|
|
bitfld.long 0x00 16.--17. " P3.4_FUN ,Port P3.4 Function" "GPIO,PWM2H,AD4,PLAI[12]"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " P3.3_FUN ,Port P3.3 Function" "GPIO,PWM1L,AD3,PLAI[11]"
|
|
bitfld.long 0x00 8.--9. " P3.2_FUN ,Port P3.2 Function" "GPIO,PWM1H,AD2,PLAI[10]"
|
|
bitfld.long 0x00 4.--5. " P3.1_FUN ,Port P3.1 Function" "GPIO,PWM0L,AD1,PLAI[9]"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " P3.0_FUN ,Port P3.0 Function" "GPIO,PWM0H,AD0,PLAI[8]"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "GP3PAR,Program the Parameters for Port 3 Register"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull-Up Disable P3.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull-Up Disable P3.5" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull-Up Disable P3.4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull-Up Disable P3.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull-Up Disable P3.2" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull-Up Disable P3.1" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull-Up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x3
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 22. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x3
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 22. " P3.6_CLR ,Port 3.6 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Clear"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7023")
|
|
width 0x08
|
|
tree "GPIO Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO Port 0 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P0.7_FUN ,Port P0.7 Function" "GPIO,MOSI,SDA1,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P0.6_FUN ,Port P0.6 Function" "GPIO,MISO,SCL1,PLAI[2]"
|
|
bitfld.long 0x00 20.--21. " P0.5_FUN ,Port P0.5 Function" "GPIO,SDA0,COMP_OUT,PLAI[1]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4_FUN ,Port P0.4 Function" "GPIO/IRQ0,SCL0,/CONV_START,PLAI[0]"
|
|
bitfld.long 0x00 12.--13. " P0.3_FUN ,Port P0.3 Function" "GPIO,TCK,N/A,PLAO[9]"
|
|
bitfld.long 0x00 8.--9. " P0.2_FUN ,Port P0.2 Function" "GPIO,TDI,N/A,PLAO[8]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.1_FUN ,Port P0.1 Function" "GPIO,TDO,N/A,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P0.0_FUN ,Port P0.0 Function" "GPIO/BM,nTRST,ADC_BUSY,PLAI[8]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,Program the Parameters for Port 0 Register"
|
|
bitfld.long 0x00 29.--30. " P0.7_DS ,Drive strength P0.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull-up disable P0.7" "No,Yes"
|
|
bitfld.long 0x00 25.--26. " P0.6_DS ,Drive strength P0.6" "Medium,Low,High,High"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull-up disable P0.6" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " P0.5_DS ,Drive strength P0.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull-up disable P0.5" "No,Yes"
|
|
bitfld.long 0x00 17.--18. " P0.4_DS ,Drive strength P0.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull-up disable P0.4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " P0.3_DS ,Drive strength P0.3" "Medium,Low,High,High"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull-up disable P0.3" "No,Yes"
|
|
bitfld.long 0x00 9.--10. " P0.2_DS ,Drive strength P0.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull-up disable P0.2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " P0.1_DS ,Drive strength P0.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull-up disable P0.1" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " P0.0_DS ,Drive strength P0.0" "Medium,Low,High,High"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull-up disable P0.0" "No,Yes"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P0.2_SET ,Port 0.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_SET ,Port 0.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P0.2_CLR ,Port 0.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_CLR ,Port 0.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO Port 1 Pin Functions"
|
|
bitfld.long 0x00 28.--29. " P1.7_FUN ,Port P1.7 Function" "GPIO,SDA1,PWM3,PLAI[6]"
|
|
bitfld.long 0x00 24.--25. " P1.6_FUN ,Port P1.6 Function" "GPIO,SCL1,PWM2,PLAI[5]"
|
|
bitfld.long 0x00 20.--21. " P1.5_FUN ,Port P1.5 Function" "GPIO,ADC6,PWM_TRIPINPUT,PLAO[4]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4_FUN ,Port P1.4 Function" "GPIO,ADC10,N/A,PLAO[3]"
|
|
bitfld.long 0x00 12.--13. " P1.3_FUN ,Port P1.3 Function" "GPIO/IRQ3,ADC5,N/A,PLAI[4]"
|
|
bitfld.long 0x00 8.--9. " P1.2_FUN ,Port P1.2 Function" "GPIO/IRQ2,ADC4,ECLK,PLAI[3]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1_FUN ,Port P1.1 Function" "GPIO/IRQ1,/SS,PWM1,PLAO[2]"
|
|
bitfld.long 0x00 0.--1. " P1.0_FUN ,Port P1.0 Function" "GPIO,SCLK,PWM0,PLAO[1]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,Program the Parameters for Port 1 Register"
|
|
bitfld.long 0x00 29.--30. " P1.7_DS ,Drive strength P1.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull-up disable P1.7" "No,Yes"
|
|
bitfld.long 0x00 25.--26. " P1.6_DS ,Drive strength P1.6" "Medium,Low,High,High"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull-up disable P1.6" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " P1.5_DS ,Drive strength P1.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull-up disable P1.5" "No,Yes"
|
|
bitfld.long 0x00 17.--18. " P1.4_DS ,Drive strength P1.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull-up disable P1.4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " P1.3_DS ,Drive strength P1.3" "Medium,Low,High,High"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull-up disable P1.3" "No,Yes"
|
|
bitfld.long 0x00 9.--10. " P1.2_DS ,Drive strength P1.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull-up disable P1.2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " P1.1_DS ,Drive strength P1.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull-up disable P1.1" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " P1.0_DS ,Drive strength 10.0" "Medium,Low,High,High"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull-up disable 10.0" "No,Yes"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "GPIO Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO Port 2 Pin Functions"
|
|
bitfld.long 0x00 16.--17. " P2.4_FUN ,Port P2.4 Function" "GPIO,ADC9,N/A,PLAI[10]"
|
|
bitfld.long 0x00 12.--13. " P2.3_FUN ,Port P2.3 Function" "GPIO,ADC8,N/A,PLAO[7]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P2.2_FUN ,Port P2.2 Function" "GPIO,ADC7,PWM_sync,PLAO[6]"
|
|
bitfld.long 0x00 0.--1. " P2.0_FUN ,Port P2.0 Function" "GPIO,ADC12,PWM4,PLAI[7]"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "GP2PAR,Program the Parameters for Port 2 Register"
|
|
bitfld.long 0x00 17.--18. " P2.4_DS ,Drive strength P2.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP2.4 ,Pull-up disable P2.4" "No,Yes"
|
|
bitfld.long 0x00 13.--14. " P2.3_DS ,Drive strength P2.3" "Medium,Low,High,High"
|
|
bitfld.long 0x00 12. " PUP2.3 ,Pull-up disable P2.3" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " P2.2_DS ,Drive strength P2.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP2.2 ,Pull-up disable P2.2" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " P2.0_DS ,Drive strength P2.0" "Medium,Low,High,High"
|
|
bitfld.long 0x00 0. " PUP2.0 ,Pull-up disable P2.0" "No,Yes"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P2.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 20. " P2.4_SET ,Port 2.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P2.3_SET ,Port 2.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P2.2_SET ,Port 2.2 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 20. " P2.4_CLR ,Port 2.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P2.3_CLR ,Port 2.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P2.2_CLR ,Port 2.2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7121")
|
|
base ad:0xFFFF0d00
|
|
width 8.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO 0 Control Register"
|
|
bitfld.long 0x00 28.--29. " P0.7 ,GPIO P0.7 Pin Function" "GPIO,/TRST,Reserved,PLAI[3]"
|
|
bitfld.long 0x00 24.--25. " P0.6 ,GPIO P0.6 Pin Function" "GPIO,/MRST,Reserved,PLAI[2]"
|
|
bitfld.long 0x00 20.--21. " P0.5 ,GPIO P0.5 Pin Function" "GPIO,/CS,/CONVST,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4 ,GPIO P0.4 Pin Function" "GPIO,MOSI,TRIP,PLAI[11]"
|
|
bitfld.long 0x00 12.--13. " P0.3 ,GPIO P0.3 Pin Function" "GPIO,MISO,SYNC,PLAO[12]"
|
|
bitfld.long 0x00 8.--9. " P0.2 ,GPIO P0.2 Pin Function" "GPIO,SPICLK,ADC_BUSY,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.1 ,GPIO P0.1 Pin Function" "GPIO,SDA0,Reserved,PLAI[4]"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,GPIO P0.0 Pin Function" "GPIO,SCL0,Reserved,PLAI[5]"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "GP0PAR,GPIO 0 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull up Disable P0.7" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull up Disable P0.6" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull up Disable P0.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull up Disable P0.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull up Disable P0.3" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull up Disable P0.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull up Disable P0.1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull up Disable P0.0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO 1 Control Register"
|
|
bitfld.long 0x00 28.--29. " P1.7 ,GPIO P1.7 Pin Function" "GPIO,Reserved,Reserved,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P1.6 ,GPIO P1.6 Pin Function" "GPIO,Reserved,Reserved,PLAO[5]"
|
|
bitfld.long 0x00 20.--21. " P1.5 ,GPIO P1.5 Pin Function" "GPIO,PWM2,Reserved,PLAI[9]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4 ,GPIO P1.4 Pin Function" "GPIO,PWM1,ECLK/XCLK,PLAI[8]"
|
|
bitfld.long 0x00 12.--13. " P1.3 ,GPIO P1.3 Pin Function" "TDO,Reserved,Reserved,PLAO[14]"
|
|
bitfld.long 0x00 8.--9. " P1.2 ,GPIO P1.2 Pin Function" "TDI,Reserved,Reserved,PLAO[15]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1 ,GPIO P1.1 Pin Function" "GPIO,SOUT,SDA1,PLAI[6]"
|
|
bitfld.long 0x00 0.--1. " P1.0 ,GPIO P1.0 Pin Function" "GPIO,SIN,SCL1,PLAI[7]"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
group.long 0x3C++0x3
|
|
line.long 0x00 "GP1PAR,GPIO 1 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull up Disable P1.7" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull up Disable P1.6" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull up Disable P1.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull up Disable P1.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull up Disable P1.3" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull up Disable P1.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull up Disable P1.1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull up Disable P1.0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO 2 Control Register"
|
|
bitfld.long 0x00 28.--29. " P2.7 ,GPIO P2.7 Pin Function" "GPIO,Reserved,Reserved,PLAI[0]"
|
|
bitfld.long 0x00 24.--25. " P2.6 ,GPIO P2.6 Pin Function" "GPIO/IRQ3,Reserved,Reserved,PLAI[15]"
|
|
bitfld.long 0x00 20.--21. " P2.5 ,GPIO P2.5 Pin Function" "GPIO,PWM6,Reserved,PLAO[6]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P2.4 ,GPIO P2.4 Pin Function" "GPIO,PWM5,Reserved,PLAO[7]"
|
|
bitfld.long 0x00 12.--13. " P2.3 ,GPIO P2.3 Pin Function" "GPIO/IRQ2,Reserved,Reserved,PLAI[14]"
|
|
bitfld.long 0x00 8.--9. " P2.2 ,GPIO P2.2 Pin Function" "GPIO,Reserved,Reserved,PLAI[1]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P2.1 ,GPIO P2.1 Pin Function" "GPIO/IRQ1,Reserved,Reserved,PLAI[12]"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,GPIO P2.0 Pin Function" "GPIO/IRQ0,Reserved,Reserved,PLAI[13]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P2.7_DIR ,Port 2.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.6_DIR ,Port 2.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.5_DIR ,Port 2.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P2.1_DIR ,Port 2.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " P2.7_OUT ,Port 2.7 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " P2.6_OUT ,Port 2.6 Data Output" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " P2.5_OUT ,Port 2.5 Data Output" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " P2.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " P2.1_OUT ,Port 2.1 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P2.7_RST_ST ,Port 2.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P2.6_RST_ST ,Port 2.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P2.5_RST_ST ,Port 2.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P2.1_RST_ST ,Port 2.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7_IN ,Port 2.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P2.6_IN ,Port 2.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P2.5_IN ,Port 2.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P2.1_IN ,Port 2.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
group.long 0x4C++0x3
|
|
line.long 0x00 "GP2PAR,GPIO 2 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP2.7 ,Pull up Disable P2.7" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUP2.6 ,Pull up Disable P2.6" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PUP2.5 ,Pull up Disable P2.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP2.4 ,Pull up Disable P2.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PUP2.3 ,Pull up Disable P2.3" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUP2.2 ,Pull up Disable P2.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP2.1 ,Pull up Disable P2.1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUP2.0 ,Pull up Disable P2.0" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x0C++0x3
|
|
line.long 0x00 "GP3CON,GPIO 3 Control Register"
|
|
bitfld.long 0x00 28.--29. " P3.7 ,GPIO P3.7 Pin Function" "GPIO/BM,Reserved,Reserved,PLA0[11]"
|
|
bitfld.long 0x00 24.--25. " P3.6 ,GPIO P3.6 Pin Function" "GPIO,Reserved,Reserved,PLAO[10]"
|
|
bitfld.long 0x00 20.--21. " P3.5 ,GPIO P3.5 Pin Function" "GPIO,PWM6,Reserved,PLAO[9]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4 ,GPIO P3.4 Pin Function" "GPIO,PWM6,Reserved,PLAO[8]"
|
|
bitfld.long 0x00 12.--13. " P3.3 ,GPIO P3.3 Pin Function" "GPIO/IRQ5,PWM4,Reserved,PLAO[3]"
|
|
bitfld.long 0x00 8.--9. " P3.2 ,GPIO P3.2 Pin Function" "GPIO/IRQ4,PWM3,Reserved,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1 ,GPIO P3.1 Pin Function" "GPIO,Reserved,Reserved,PLAO[1]"
|
|
bitfld.long 0x00 0.--1. " P3.0 ,GPIO P3.0 Pin Function" "GPIO,Reserved,Reserved,PLAO[0]"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
group.long 0x5C++0x3
|
|
line.long 0x00 "GP3PAR,GPIO 3 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull up Disable P3.7" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull up Disable P3.6" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull up Disable P3.5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull up Disable P3.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull up Disable P3.3" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull up Disable P3.2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull up Disable P3.1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull up Disable P3.0" "Disabled,Enabled"
|
|
tree.end
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7122")
|
|
base ad:0xFFFF0d00
|
|
width 8.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO 0 Control Register"
|
|
bitfld.long 0x00 28.--29. " P0.7 ,GPIO P0.7 Pin Function" "GPIO,TRST,N/A,PLAI[3]"
|
|
bitfld.long 0x00 24.--25. " P0.6 ,GPIO P0.6 Pin Function" "GPIO,/MRST,N/A,PLAI[2]"
|
|
bitfld.long 0x00 20.--21. " P0.5 ,GPIO P0.5 Pin Function" "GPIO,/SPICS,/CONVST,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4 ,GPIO P0.4 Pin Function" "GPIO,SPIMOSI,TRIP,PLAI[11]"
|
|
bitfld.long 0x00 12.--13. " P0.3 ,GPIO P0.3 Pin Function" "GPIO,SPIMISO,SYNC,PLAO[12]"
|
|
bitfld.long 0x00 8.--9. " P0.2 ,GPIO P0.2 Pin Function" "GPIO,SPICLK,ADC_BUSY,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P0.1 ,GPIO P0.1 Pin Function" "GPIO,SDA1,N/A,PLAI[4]"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,GPIO P0.0 Pin Function" "GPIO,SCL1,N/A,PLAI[5]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,GPIO 0 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull up Disable P0.7" "No,Yes"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull up Disable P0.6" "No,Yes"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull up Disable P0.5" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull up Disable P0.4" "No,Yes"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull up Disable P0.3" "No,Yes"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull up Disable P0.2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull up Disable P0.1" "No,Yes"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull up Disable P0.0" "No,Yes"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.byte 0x26++0x0
|
|
line.byte 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.byte 0x00 7. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.byte 0x00 6. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.byte 0x00 5. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.byte 0x00 3. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.byte 0x00 2. " P0.2_SET ,Port 0.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P0.1_SET ,Port 0.1 Set" "No effect,Set"
|
|
bitfld.byte 0x00 0. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.byte 0x2A++0x0
|
|
line.byte 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.byte 0x00 7. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 6. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 2. " P0.2_CLR ,Port 0.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P0.1_CLR ,Port 0.1 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO 1 Control Register"
|
|
bitfld.long 0x00 28.--29. " P1.7 ,GPIO P1.7 Pin Function" "GPIO,N/A,N/A,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P1.6 ,GPIO P1.6 Pin Function" "GPIO,N/A,N/A,PLAO[5]"
|
|
bitfld.long 0x00 20.--21. " P1.5 ,GPIO P1.5 Pin Function" "GPIO,PWM2,N/A,PLAI[9]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4 ,GPIO P1.4 Pin Function" "GPIO,PWM1,ECLK/XCLK,PLAI[8]"
|
|
bitfld.long 0x00 4.--5. " P1.1 ,GPIO P1.1 Pin Function" "GPIO,SOUT,SDA2,PLAI[6]"
|
|
bitfld.long 0x00 0.--1. " P1.0 ,GPIO P1.0 Pin Function" "GPIO,SIN,SCL2,PLAI[7]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,GPIO 1 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull up Disable P1.7" "No,Yes"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull up Disable P1.6" "No,Yes"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull up Disable P1.5" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull up Disable P1.4" "No,Yes"
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull up Disable P1.1" "No,Yes"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull up Disable P1.0" "No,Yes"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.byte 0x36++0x0
|
|
line.byte 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.byte 0x00 7. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.byte 0x00 6. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.byte 0x00 5. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.byte 0x00 1. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.byte 0x00 0. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.byte 0x3A++0x0
|
|
line.byte 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.byte 0x00 7. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 6. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 1. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
wgroup.byte 0x70++0x00
|
|
line.byte 0x00 "GP1OCE,GIPO Port 1 Open-collector Enable"
|
|
bitfld.byte 0x00 7. " P1.7_OCE ,GPIO P1.7 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P1.6_OCE ,GPIO P1.6 open-collector enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO 2 Control Register"
|
|
bitfld.long 0x00 28.--29. " P2.7 ,GPIO P2.7 Pin Function" "GPIO,N/A,N/A,PLAI[0]"
|
|
bitfld.long 0x00 24.--25. " P2.6 ,GPIO P2.6 Pin Function" "GPIO/IRQ3,N/A,N/A,PLAI[15]"
|
|
bitfld.long 0x00 20.--21. " P2.5 ,GPIO P2.5 Pin Function" "GPIO,PWM6,N/A,PLAO[6]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P2.4 ,GPIO P2.4 Pin Function" "GPIO,PWM5,N/A,PLAO[7]"
|
|
bitfld.long 0x00 12.--13. " P2.3 ,GPIO P2.3 Pin Function" "GPIO/IRQ2,N/A,N/A,PLAI[14]"
|
|
bitfld.long 0x00 8.--9. " P2.2 ,GPIO P2.2 Pin Function" "GPIO,N/A,N/A,PLAI[1]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P2.1 ,GPIO P2.1 Pin Function" "GPIO/IRQ1,N/A,N/A,PLAI[12]"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,GPIO P2.0 Pin Function" "GPIO/IRQ0,N/A,N/A,PLAI[13]"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "GP2PAR,GPIO 2 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP2.7 ,Pull up Disable P2.7" "No,Yes"
|
|
bitfld.long 0x00 24. " PUP2.6 ,Pull up Disable P2.6" "No,Yes"
|
|
bitfld.long 0x00 20. " PUP2.5 ,Pull up Disable P2.5" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP2.4 ,Pull up Disable P2.4" "No,Yes"
|
|
bitfld.long 0x00 12. " PUP2.3 ,Pull up Disable P2.3" "No,Yes"
|
|
bitfld.long 0x00 8. " PUP2.2 ,Pull up Disable P2.2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP2.1 ,Pull up Disable P2.1" "No,Yes"
|
|
bitfld.long 0x00 0. " PUP2.0 ,Pull up Disable P2.0" "No,Yes"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P2.7_DIR ,Port 2.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.6_DIR ,Port 2.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.5_DIR ,Port 2.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P2.1_DIR ,Port 2.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P2.7_OUT ,Port 2.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P2.6_OUT ,Port 2.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P2.5_OUT ,Port 2.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P2.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P2.1_OUT ,Port 2.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P2.7_RST_ST ,Port 2.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P2.6_RST_ST ,Port 2.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P2.5_RST_ST ,Port 2.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P2.1_RST_ST ,Port 2.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P2.6_IN ,Port 2.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P2.5_IN ,Port 2.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P2.1_IN ,Port 2.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.byte 0x46++0x0
|
|
line.byte 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.byte 0x00 7. " P2.7_SET ,Port 2.7 Set" "No effect,Set"
|
|
bitfld.byte 0x00 6. " P2.6_SET ,Port 2.6 Set" "No effect,Set"
|
|
bitfld.byte 0x00 5. " P2.5_SET ,Port 2.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P2.4_SET ,Port 2.4 Set" "No effect,Set"
|
|
bitfld.byte 0x00 3. " P2.3_SET ,Port 2.3 Set" "No effect,Set"
|
|
bitfld.byte 0x00 2. " P2.2_SET ,Port 2.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P2.1_SET ,Port 2.1 Set" "No effect,Set"
|
|
bitfld.byte 0x00 0. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.byte 0x4A++0x0
|
|
line.byte 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.byte 0x00 7. " P2.7_CLR ,Port 2.7 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 6. " P2.6_CLR ,Port 2.6 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " P2.5_CLR ,Port 2.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P2.4_CLR ,Port 2.4 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " P2.3_CLR ,Port 2.3 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 2. " P2.2_CLR ,Port 2.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P2.1_CLR ,Port 2.1 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
wgroup.byte 0x74++0x00
|
|
line.byte 0x00 "GP2OCE,GIPO Port 2 Open-collector Enable"
|
|
bitfld.byte 0x00 7. " P2.7_OCE ,GPIO P2.7 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P2.6_OCE ,GPIO P2.6 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P2.5_OCE ,GPIO P2.5 open-collector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P2.4_OCE ,GPIO P2.4 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P2.3_OCE ,GPIO P2.3 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P2.2_OCE ,GPIO P2.2 open-collector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P2.1_OCE ,GPIO P2.1 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P2.0_OCE ,GPIO P2.0 open-collector enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GP3CON,GPIO 3 Control Register"
|
|
bitfld.long 0x00 28.--29. " P3.7 ,GPIO P3.7 Pin Function" "GPIO,N/A,N/A,PLAO[11]"
|
|
bitfld.long 0x00 24.--25. " P3.6 ,GPIO P3.6 Pin Function" "GPIO,N/A,N/A,PLAO[10]"
|
|
bitfld.long 0x00 20.--21. " P3.5 ,GPIO P3.5 Pin Function" "GPIO,N/A,N/A,PLAO[9]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4 ,GPIO P3.4 Pin Function" "GPIO,N/A,N/A,PLAO[8]"
|
|
bitfld.long 0x00 12.--13. " P3.3 ,GPIO P3.3 Pin Function" "GPIO/IRQ5,PWM4,N/A,PLAO[3]"
|
|
bitfld.long 0x00 8.--9. " P3.2 ,GPIO P3.2 Pin Function" "GPIO/IRQ4,PWM3,N/A,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1 ,GPIO P3.1 Pin Function" "GPIO,N/A,N/A,PLAO[1]"
|
|
bitfld.long 0x00 0.--1. " P3.0 ,GPIO P3.0 Pin Function" "GPIO,N/A,N/A,PLAO[0]"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "GP3PAR,GPIO 3 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull up Disable P3.7" "No,Yes"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull up Disable P3.6" "No,Yes"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull up Disable P3.5" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull up Disable P3.4" "No,Yes"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull up Disable P3.3" "No,Yes"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull up Disable P3.2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull up Disable P3.1" "No,Yes"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull up Disable P3.0" "No,Yes"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.byte 0x56++0x0
|
|
line.byte 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.byte 0x00 7. " P3.7_SET ,Port 3.7 Set" "No effect,Set"
|
|
bitfld.byte 0x00 6. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.byte 0x00 5. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.byte 0x00 3. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.byte 0x00 2. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.byte 0x00 0. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.byte 0x5A++0x0
|
|
line.byte 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.byte 0x00 7. " P3.7_CLR ,Port 3.7 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 6. " P3.6_CLR ,Port 3.6 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 5. " P3.5_CLR ,Port 3.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P3.4_CLR ,Port 3.4 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3. " P3.3_CLR ,Port 3.3 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 2. " P3.2_CLR ,Port 3.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P3.1_CLR ,Port 3.1 Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 0. " P3.0_CLR ,Port 3.0 Clear" "No effect,Cleared"
|
|
wgroup.byte 0x78++0x00
|
|
line.byte 0x00 "GP3OCE,GIPO Port 3 Open-collector Enable"
|
|
bitfld.byte 0x00 7. " P3.7_OCE ,GPIO P3.7 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P3.6_OCE ,GPIO P3.6 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P3.5_OCE ,GPIO P3.5 open-collector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P3.4_OCE ,GPIO P3.4 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P3.3_OCE ,GPIO P3.3 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P3.2_OCE ,GPIO P3.2 open-collector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P3.1_OCE ,GPIO P3.1 open-collector enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P3.0_OCE ,GPIO P3.0 open-collector enable" "Disabled,Enabled"
|
|
tree.end
|
|
elif (cpu()=="ADUC7124")
|
|
base ad:0xFFFFF400
|
|
width 8.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO 0 Control Register"
|
|
bitfld.long 0x00 28.--29. " P0.7 ,GPIO P0.7 Pin Function" "GPIO,ECLK/XCLK,SIN0,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6 ,GPIO P0.6 Pin Function" "GPIO,MRST,MS3,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5 ,GPIO P0.5 Pin Function" "GPIO/IRQ1,ADC_BUSY,MS2,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4 ,GPIO P0.4 Pin Function" "GPIO/IRQ0,PWMTRIP,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3 ,GPIO P0.3 Pin Function" "GPIO/JTAG,TRST,A16,ADC_BUSY"
|
|
bitfld.long 0x00 8.--9. " P0.2 ,GPIO P0.2 Pin Function" "GPIO/JTAG,PWM5,/BHE,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.1 ,GPIO P0.1 Pin Function" "GPIO/JTAG,PWM4,/BLE,?..."
|
|
bitfld.long 0x00 0.--1. " P0.0 ,GPIO P0.0 Pin Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,GPIO 0 Parameters Register"
|
|
bitfld.long 0x00 29.--30. " DSP0.7 ,Drive strength P0.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 25.--26. " DSP0.6 ,Drive strength P0.6" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--22. " DSP0.5 ,Drive strength P0.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " DSP0.4 ,Drive strength P0.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " DSP0.3 ,Drive strength P0.3" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 9.--10. " DSP0.2 ,Drive strength P0.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull up Disable P0.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DSP0.1 ,Drive strength P0.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull up Disable P0.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1.--2. " DSP0.0 ,Drive strength P0.0" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 28. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P0.2_SET ,Port 0.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_SET ,Port 0.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P0.2_CLR ,Port 0.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_CLR ,Port 0.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO 1 Control Register"
|
|
bitfld.long 0x00 28.--29. " P1.7 ,GPIO P1.7 Pin Function" "GPIO,DTR,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6 ,GPIO P1.6 Pin Function" "GPIO,DSR,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5 ,GPIO P1.5 Pin Function" "GPIO/IRQ3,DCD,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4 ,GPIO P1.4 Pin Function" "GPIO/IRQ2,RI,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3 ,GPIO P1.3 Pin Function" "GPIO,CTS,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2 ,GPIO P1.2 Pin Function" "GPIO,RTS,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1 ,GPIO P1.1 Pin Function" "GPIO,SOUT0,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0 ,GPIO P1.0 Pin Function" "GPIO/T1,SIN0,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,GPIO 1 Parameters Register"
|
|
bitfld.long 0x00 29.--30. " DSP1.7 ,Drive strength P1.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 25.--26. " DSP1.6 ,Drive strength P1.6" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--22. " DSP1.5 ,Drive strength P1.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " DSP1.4 ,Drive strength P1.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " DSP1.3 ,Drive strength P1.3" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 9.--10. " DSP1.2 ,Drive strength P1.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DSP1.1 ,Drive strength P1.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1.--2. " DSP1.0 ,Drive strength P1.0" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO 2 Control Register"
|
|
bitfld.long 0x00 28.--29. " P2.7 ,GPIO P2.7 Pin Function" "GPIO,PWM3,MS3,?..."
|
|
bitfld.long 0x00 24.--25. " P2.6 ,GPIO P2.6 Pin Function" "GPIO,PWM2,MS2,?..."
|
|
bitfld.long 0x00 20.--21. " P2.5 ,GPIO P2.5 Pin Function" "GPIO,PWM1,MS1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P2.4 ,GPIO P2.4 Pin Function" "GPIO,PWM0,MS0,SOUT1"
|
|
bitfld.long 0x00 12.--13. " P2.3 ,GPIO P2.3 Pin Function" "GPIO,Reserved,AE,SIN1"
|
|
bitfld.long 0x00 8.--9. " P2.2 ,GPIO P2.2 Pin Function" "GPIO,PWM1,/RS,PLAO[7]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P2.1 ,GPIO P2.1 Pin Function" "GPIO,PWM0,/WS,PLAO[6]"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,GPIO P2.0 Pin Function" "GPIO,/CONVSTART,SOUT0,PLAO[5]"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "GP2PAR,GPIO 2 Parameters Register"
|
|
bitfld.long 0x00 29.--30. " DSP2.7 ,Drive strength P2.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP2.7 ,Pull up Disable P2.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 25.--26. " DSP2.6 ,Drive strength P2.6" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PUP2.6 ,Pull up Disable P2.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--22. " DSP2.5 ,Drive strength P2.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP2.5 ,Pull up Disable P2.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " DSP2.4 ,Drive strength P2.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP2.4 ,Pull up Disable P2.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " DSP2.3 ,Drive strength P2.3" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP2.3 ,Pull up Disable P2.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 9.--10. " DSP2.2 ,Drive strength P2.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP2.2 ,Pull up Disable P2.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DSP2.1 ,Drive strength P2.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP2.1 ,Pull up Disable P2.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1.--2. " DSP2.0 ,Drive strength P2.0" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP2.0 ,Pull up Disable P2.0" "Enabled,Disabled"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P2.7_DIR ,Port 2.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.6_DIR ,Port 2.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.5_DIR ,Port 2.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P2.1_DIR ,Port 2.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P2.7_OUT ,Port 2.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P2.6_OUT ,Port 2.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P2.5_OUT ,Port 2.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 2.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P2.7_RST_ST ,Port 2.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P2.6_RST_ST ,Port 2.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P2.5_RST_ST ,Port 2.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P2.1_RST_ST ,Port 2.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P2.6_IN ,Port 2.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P2.5_IN ,Port 2.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P2.1_IN ,Port 2.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 23. " P2.7_SET ,Port 2.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P2.6_SET ,Port 2.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P2.5_SET ,Port 2.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_SET ,Port 2.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P2.3_SET ,Port 2.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P2.2_SET ,Port 2.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_SET ,Port 2.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 23. " P2.7_CLR ,Port 2.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P2.6_CLR ,Port 2.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P2.5_CLR ,Port 2.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_CLR ,Port 2.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P2.3_CLR ,Port 2.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P2.2_CLR ,Port 2.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_CLR ,Port 2.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GP3CON,GPIO 3 Control Register"
|
|
bitfld.long 0x00 28.--29. " P3.7 ,GPIO P3.7 Pin Function" "GPIO,PWMSYNC,AD7,PLAI[15]"
|
|
bitfld.long 0x00 24.--25. " P3.6 ,GPIO P3.6 Pin Function" "GPIO,PWMTRIP,AD6,PLAI[14]"
|
|
bitfld.long 0x00 20.--21. " P3.5 ,GPIO P3.5 Pin Function" "GPIO,PWM5,AD5,PLAI[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4 ,GPIO P3.4 Pin Function" "GPIO,PWM4,AD4,PLAI[12]"
|
|
bitfld.long 0x00 12.--13. " P3.3 ,GPIO P3.3 Pin Function" "GPIO,PWM3,AD3,PLAI[11]"
|
|
bitfld.long 0x00 8.--9. " P3.2 ,GPIO P3.2 Pin Function" "GPIO,PWM2,AD2,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1 ,GPIO P3.1 Pin Function" "GPIO,PWM1,AD1,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P3.0 ,GPIO P3.0 Pin Function" "GPIO,PWM0,AD0,PLAI[8]"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "GP3PAR,GPIO 3 Parameters Register"
|
|
bitfld.long 0x00 29.--30. " DSP3.7 ,Drive strength P3.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull up Disable P3.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 25.--26. " DSP3.6 ,Drive strength P3.6" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull up Disable P3.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--22. " DSP3.5 ,Drive strength P3.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull up Disable P3.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " DSP3.4 ,Drive strength P3.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull up Disable P3.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " DSP3.3 ,Drive strength P3.3" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull up Disable P3.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 9.--10. " DSP3.2 ,Drive strength P3.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull up Disable P3.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DSP3.1 ,Drive strength P3.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull up Disable P3.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1.--2. " DSP3.0 ,Drive strength P3.0" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 23. " P3.7_SET ,Port 3.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 23. " P3.7_CLR ,Port 3.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P3.6_CLR ,Port 3.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 4"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP4CON,GPIO 4 Control Register"
|
|
bitfld.long 0x00 28.--29. " P4.7 ,GPIO P4.7 Pin Function" "GPIO,Reserved,AD15,PLAO[15]"
|
|
bitfld.long 0x00 24.--25. " P4.6 ,GPIO P4.6 Pin Function" "GPIO,Reserved,AD14,PLAO[14]"
|
|
bitfld.long 0x00 20.--21. " P4.5 ,GPIO P4.5 Pin Function" "GPIO/RTCK,Reserved,AD13,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P4.4 ,GPIO P4.4 Pin Function" "GPIO,Reserved,AD12,PLAO[12]"
|
|
bitfld.long 0x00 12.--13. " P4.3 ,GPIO P4.3 Pin Function" "GPIO,Reserved,AD11,PLAO[11]"
|
|
bitfld.long 0x00 8.--9. " P4.2 ,GPIO P4.2 Pin Function" "GPIO,Reserved,AD10,PLAO[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P4.1 ,GPIO P4.1 Pin Function" "GPIO,SOUT1,AD9,PLAO[9]"
|
|
bitfld.long 0x00 0.--1. " P4.0 ,GPIO P4.0 Pin Function" "GPIO,SIN1,AD8,PLAO[8]"
|
|
group.long 0x6c++0x03
|
|
line.long 0x00 "GP4PAR,GPIO 4 Parameters Register"
|
|
bitfld.long 0x00 29.--30. " DSP4.7 ,Drive strength P4.7" "Medium,Low,High,High"
|
|
bitfld.long 0x00 28. " PUP4.7 ,Pull up Disable P4.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 25.--26. " DSP4.6 ,Drive strength P4.6" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PUP4.6 ,Pull up Disable P4.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 21.--22. " DSP4.5 ,Drive strength P4.5" "Medium,Low,High,High"
|
|
bitfld.long 0x00 20. " PUP4.5 ,Pull up Disable P4.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " DSP4.4 ,Drive strength P4.4" "Medium,Low,High,High"
|
|
bitfld.long 0x00 16. " PUP4.4 ,Pull up Disable P4.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 13.--14. " DSP4.3 ,Drive strength P4.3" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP4.3 ,Pull up Disable P4.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 9.--10. " DSP4.2 ,Drive strength P4.2" "Medium,Low,High,High"
|
|
bitfld.long 0x00 8. " PUP4.2 ,Pull up Disable P4.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " DSP4.1 ,Drive strength P4.1" "Medium,Low,High,High"
|
|
bitfld.long 0x00 4. " PUP4.1 ,Pull up Disable P4.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1.--2. " DSP4.0 ,Drive strength P4.0" "Medium,Low,High,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PUP4.0 ,Pull up Disable P4.0" "Enabled,Disabled"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P4.7_DIR ,Port 4.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P4.6_DIR ,Port 4.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P4.5_DIR ,Port 4.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P4.4_DIR ,Port 4.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P4.3_DIR ,Port 4.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P4.1_DIR ,Port 4.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P4.0_DIR ,Port 4.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P4.7_OUT ,Port 4.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P4.6_OUT ,Port 4.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P4.5_OUT ,Port 4.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P4.4_OUT ,Port 4.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P4.3_OUT ,Port 4.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P4.1_OUT ,Port 4.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P4.0_OUT ,Port 4.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P4.7_RST_ST ,Port 4.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P4.6_RST_ST ,Port 4.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P4.5_RST_ST ,Port 4.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P4.4_RST_ST ,Port 4.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P4.3_RST_ST ,Port 4.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P4.1_RST_ST ,Port 4.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P4.0_RST_ST ,Port 4.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P4.7_IN ,Port 4.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P4.6_IN ,Port 4.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P4.5_IN ,Port 4.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4.4_IN ,Port 4.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P4.3_IN ,Port 4.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P4.1_IN ,Port 4.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P4.0_IN ,Port 4.0 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 23. " P4.7_SET ,Port 4.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P4.6_SET ,Port 4.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P4.5_SET ,Port 4.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_SET ,Port 4.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P4.3_SET ,Port 4.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_SET ,Port 4.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P4.0_SET ,Port 4.0 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 23. " P4.7_CLR ,Port 4.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P4.6_CLR ,Port 4.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P4.5_CLR ,Port 4.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_CLR ,Port 4.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P4.3_CLR ,Port 4.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_CLR ,Port 4.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P4.0_CLR ,Port 4.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
width 12.
|
|
elif (cpu()=="ADUC7128")
|
|
base ad:0xFFFF0d00
|
|
width 8.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO 0 Control Register"
|
|
bitfld.long 0x00 28.--29. " P0.7 ,GPIO P0.7 Pin Function" "GPIO,ECLK/XCLK,SIN0,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6 ,GPIO P0.6 Pin Function" "GPIO/T1,/MRST,AE,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5 ,GPIO P0.5 Pin Function" "GPIO/IRQ1,ADC_BUSY,PLM_COMP,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4 ,GPIO P0.4 Pin Function" "GPIO/IRQ0,/CONVSTART,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3 ,GPIO P0.3 Pin Function" "GPIO,/TRST,A16,ADC_BUSY"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,GPIO P0.0 Pin Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,GPIO 0 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull up Disable P0.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull up Disable P0.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull up Disable P0.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO 1 Control Register"
|
|
bitfld.long 0x00 28.--29. " P1.7 ,GPIO P1.7 Pin Function" "GPIO,DTR0,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6 ,GPIO P1.6 Pin Function" "GPIO,DSR0,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5 ,GPIO P1.5 Pin Function" "GPIO/IRQ3,DCD0,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4 ,GPIO P1.4 Pin Function" "GPIO/IRQ2,RI0,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3 ,GPIO P1.3 Pin Function" "GPIO,CTS0,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2 ,GPIO P1.2 Pin Function" "GPIO,RTS0,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1 ,GPIO P1.1 Pin Function" "GPIO,SOUT0,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0 ,GPIO P1.0 Pin Function" "GPIO/T1,SIN0,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,GPIO 1 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO 2 Control Register"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,GPIO P2.0 Pin Function" "GPIO,SYNC,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GP3CON,GPIO 3 Control Register"
|
|
bitfld.long 0x00 20.--21. " P3.5 ,GPIO P3.5 Pin Function" "GPIO,PWM6,AD5,PLAI[13]"
|
|
bitfld.long 0x00 16.--17. " P3.4 ,GPIO P3.4 Pin Function" "GPIO,PWM5,AD4,PLAI[12]"
|
|
bitfld.long 0x00 12.--13. " P3.3 ,GPIO P3.3 Pin Function" "GPIO,PWM4,AD3,PLAI[11]"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P3.2 ,GPIO P3.2 Pin Function" "GPIO,PWM3,AD2,PLAI[10]"
|
|
bitfld.long 0x00 4.--5. " P3.1 ,GPIO P3.1 Pin Function" "GPIO,PWM2,AD1,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P3.0 ,GPIO P3.0 Pin Function" "GPIO,PWM1,AD0,PLAI[8]"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "GP3PAR,GPIO 3 Parameters Register"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull up Disable P3.5" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull up Disable P3.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull up Disable P3.3" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull up Disable P3.2" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull up Disable P3.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 4"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP4CON,GPIO 4 Control Register"
|
|
bitfld.long 0x00 28.--29. " P4.7 ,GPIO P4.7 Pin Function" "GPIO,SOUT1,AD15,PLAO[15]"
|
|
bitfld.long 0x00 24.--25. " P4.6 ,GPIO P4.6 Pin Function" "GPIO,SIN1,AD14,PLAO[14]"
|
|
bitfld.long 0x00 20.--21. " P4.5 ,GPIO P4.5 Pin Function" "GPIO,PLMOUT,AD13,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P4.4 ,GPIO P4.4 Pin Function" "GPIO,PLMIN,AD12,PLAO[12]"
|
|
bitfld.long 0x00 12.--13. " P4.3 ,GPIO P4.3 Pin Function" "GPIO,Trip,AD11,PLAO[11]"
|
|
bitfld.long 0x00 8.--9. " P4.2 ,GPIO P4.2 Pin Function" "GPIO,RSVD,AD10,PLAO[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P4.1 ,GPIO P4.1 Pin Function" "GPIO,QENS2,AD9,PLAO[9]"
|
|
bitfld.long 0x00 0.--1. " P4.0 ,GPIO P4.0 Pin Function" "GPIO,QENS1,AD8,PLAO[8]"
|
|
group.long 0x6c++0x03
|
|
line.long 0x00 "GP4PAR,GPIO 4 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP4.7 ,Pull up Disable P4.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP4.6 ,Pull up Disable P4.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP4.5 ,Pull up Disable P4.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP4.4 ,Pull up Disable P4.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP4.3 ,Pull up Disable P4.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP4.2 ,Pull up Disable P4.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP4.1 ,Pull up Disable P4.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP4.0 ,Pull up Disable P4.0" "Enabled,Disabled"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P4.7_DIR ,Port 4.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P4.6_DIR ,Port 4.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P4.5_DIR ,Port 4.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P4.4_DIR ,Port 4.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P4.3_DIR ,Port 4.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P4.1_DIR ,Port 4.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P4.0_DIR ,Port 4.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P4.7_OUT ,Port 4.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P4.6_OUT ,Port 4.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P4.5_OUT ,Port 4.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P4.4_OUT ,Port 4.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P4.3_OUT ,Port 4.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P4.1_OUT ,Port 4.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P4.0_OUT ,Port 4.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P4.7_RST_ST ,Port 4.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P4.6_RST_ST ,Port 4.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P4.5_RST_ST ,Port 4.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P4.4_RST_ST ,Port 4.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P4.3_RST_ST ,Port 4.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P4.1_RST_ST ,Port 4.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P4.0_RST_ST ,Port 4.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P4.7_IN ,Port 4.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P4.6_IN ,Port 4.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P4.5_IN ,Port 4.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4.4_IN ,Port 4.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P4.3_IN ,Port 4.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P4.1_IN ,Port 4.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P4.0_IN ,Port 4.0 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 23. " P4.7_SET ,Port 4.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P4.6_SET ,Port 4.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P4.5_SET ,Port 4.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_SET ,Port 4.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P4.3_SET ,Port 4.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_SET ,Port 4.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P4.0_SET ,Port 4.0 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 23. " P4.7_CLR ,Port 4.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P4.6_CLR ,Port 4.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P4.5_CLR ,Port 4.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_CLR ,Port 4.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P4.3_CLR ,Port 4.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_CLR ,Port 4.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P4.0_CLR ,Port 4.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
elif (cpu()=="ADUC7129")
|
|
base ad:0xFFFF0d00
|
|
width 8.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "GP0CON,GPIO 0 Control Register"
|
|
bitfld.long 0x00 28.--29. " P0.7 ,GPIO P0.7 Pin Function" "GPIO,ECLK/XCLK,SIN0,PLAO[4]"
|
|
bitfld.long 0x00 24.--25. " P0.6 ,GPIO P0.6 Pin Function" "GPIO/T1,/MRST,AE,PLAO[3]"
|
|
bitfld.long 0x00 20.--21. " P0.5 ,GPIO P0.5 Pin Function" "GPIO/IRQ1,ADC_BUSY,PLM_COMP,PLAO[2]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P0.4 ,GPIO P0.4 Pin Function" "GPIO/IRQ0,/CONVSTART,MS1,PLAO[1]"
|
|
bitfld.long 0x00 12.--13. " P0.3 ,GPIO P0.3 Pin Function" "GPIO,/TRST,A16,ADC_BUSY"
|
|
bitfld.long 0x00 8.--9. " P0.2 ,GPIO P0.2 Pin Function" "GPIO,N/A,BHE,N/A"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P0.1 ,GPIO P0.1 Pin Function" "GPIO,N/A,BLE,N/A"
|
|
bitfld.long 0x00 0.--1. " P0.0 ,GPIO P0.0 Pin Function" "GPIO,CMP,MS0,PLAI[7]"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "GP0PAR,GPIO 0 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP0.7 ,Pull up Disable P0.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP0.6 ,Pull up Disable P0.6" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PUP0.5 ,Pull up Disable P0.5" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PUP0.4 ,Pull up Disable P0.4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PUP0.3 ,Pull up Disable P0.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP0.2 ,Pull up Disable P0.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP0.1 ,Pull up Disable P0.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP0.0 ,Pull up Disable P0.0" "Enabled,Disabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "GP0DAT,GPIO Port 0 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P0.7_DIR ,Port 0.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P0.6_DIR ,Port 0.6 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P0.5_DIR ,Port 0.5 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 28. " P0.4_DIR ,Port 0.4 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P0.3_DIR ,Port 0.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P0.2_DIR ,Port 0.1 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P0.1_DIR ,Port 0.2 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P0.0_DIR ,Port 0.0 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P0.7_OUT ,Port 0.7 Data Output" "Low,High"
|
|
bitfld.long 0x00 22. " P0.6_OUT ,Port 0.6 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P0.5_OUT ,Port 0.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P0.4_OUT ,Port 0.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P0.3_OUT ,Port 0.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 28. " P0.2_OUT ,Port 0.2 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_OUT ,Port 0.1 Data Output" "Low,High"
|
|
bitfld.long 0x00 16. " P0.0_OUT ,Port 0.0 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P0.7_RST_ST ,Port 0.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P0.6_RST_ST ,Port 0.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P0.5_RST_ST ,Port 0.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P0.4_RST_ST ,Port 0.4 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P0.3_RST_ST ,Port 0.3 State at Reset" "Low,High"
|
|
bitfld.long 0x00 10. " P0.2_RST_ST ,Port 0.2 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P0.1_RST_ST ,Port 0.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P0.0_RST_ST ,Port 0.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P0.7_IN ,Port 0.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P0.6_IN ,Port 0.6 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P0.5_IN ,Port 0.5 Data Input" "Low,High"
|
|
bitfld.long 0x00 4. " P0.4_IN ,Port 0.4 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P0.3_IN ,Port 0.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P0.2_IN ,Port 0.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P0.1_IN ,Port 0.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P0.0_IN ,Port 0.0 Data Input" "Low,High"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "GP0SET,GPIO Port 0 Data Set Register"
|
|
bitfld.long 0x00 23. " P0.7_SET ,Port 0.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P0.6_SET ,Port 0.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P0.5_SET ,Port 0.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_SET ,Port 0.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P0.3_SET ,Port 0.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P0.2_SET ,Port 0.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_SET ,Port 0.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P0.0_SET ,Port 0.0 Set" "No effect,Set"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GP0CLR,GPIO Port 0 Data Clear Register"
|
|
bitfld.long 0x00 23. " P0.7_CLR ,Port 0.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P0.6_CLR ,Port 0.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P0.5_CLR ,Port 0.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P0.4_CLR ,Port 0.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P0.3_CLR ,Port 0.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P0.2_CLR ,Port 0.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P0.1_CLR ,Port 0.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P0.0_CLR ,Port 0.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GP1CON,GPIO 1 Control Register"
|
|
bitfld.long 0x00 28.--29. " P1.7 ,GPIO P1.7 Pin Function" "GPIO,DTR0,CSL,PLAO[0]"
|
|
bitfld.long 0x00 24.--25. " P1.6 ,GPIO P1.6 Pin Function" "GPIO,DSR0,MOSI,PLAI[6]"
|
|
bitfld.long 0x00 20.--21. " P1.5 ,GPIO P1.5 Pin Function" "GPIO/IRQ3,DCD0,MISO,PLAI[5]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P1.4 ,GPIO P1.4 Pin Function" "GPIO/IRQ2,RI0,CLK,PLAI[4]"
|
|
bitfld.long 0x00 12.--13. " P1.3 ,GPIO P1.3 Pin Function" "GPIO,CTS0,SDA1,PLAI[3]"
|
|
bitfld.long 0x00 8.--9. " P1.2 ,GPIO P1.2 Pin Function" "GPIO,RTS0,SCL1,PLAI[2]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P1.1 ,GPIO P1.1 Pin Function" "GPIO,SOUT0,SDA0,PLAI[1]"
|
|
bitfld.long 0x00 0.--1. " P1.0 ,GPIO P1.0 Pin Function" "GPIO/T1,SIN0,SCL0,PLAI[0]"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "GP1PAR,GPIO 1 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP1.7 ,Pull up Disable P1.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP1.6 ,Pull up Disable P1.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP1.5 ,Pull up Disable P1.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP1.4 ,Pull up Disable P1.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP1.3 ,Pull up Disable P1.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP1.2 ,Pull up Disable P1.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP1.1 ,Pull up Disable P1.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP1.0 ,Pull up Disable P1.0" "Enabled,Disabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "GP1DAT,GPIO Port 1 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P1.7_DIR ,Port 1.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P1.6_DIR ,Port 1.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P1.5_DIR ,Port 1.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P1.4_DIR ,Port 1.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P1.3_DIR ,Port 1.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P1.2_DIR ,Port 1.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P1.1_DIR ,Port 1.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P1.0_DIR ,Port 1.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P1.7_OUT ,Port 1.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P1.6_OUT ,Port 1.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P1.5_OUT ,Port 1.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P1.4_OUT ,Port 1.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P1.3_OUT ,Port 1.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 1.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 1.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P1.0_OUT ,Port 1.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P1.7_RST_ST ,Port 1.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P1.6_RST_ST ,Port 1.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P1.5_RST_ST ,Port 1.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P1.4_RST_ST ,Port 1.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P1.3_RST_ST ,Port 1.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P1.2_RST_ST ,Port 1.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P1.1_RST_ST ,Port 1.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P1.0_RST_ST ,Port 1.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P1.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P1.6_IN ,Port 1.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P1.5_IN ,Port 1.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P1.4_IN ,Port 1.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P1.3_IN ,Port 1.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P1.2_IN ,Port 1.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1.1_IN ,Port 1.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P1.0_IN ,Port 1.0 Data Input" "Low,High"
|
|
wgroup.long 0x34++0x3
|
|
line.long 0x00 "GP1SET,GPIO Port 1 Data Set Register"
|
|
bitfld.long 0x00 23. " P1.7_SET ,Port 1.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P1.6_SET ,Port 1.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P1.5_SET ,Port 1.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_SET ,Port 1.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P1.3_SET ,Port 1.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P1.2_SET ,Port 1.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_SET ,Port 1.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P1.0_SET ,Port 1.0 Set" "No effect,Set"
|
|
wgroup.long 0x38++0x3
|
|
line.long 0x00 "GP1CLR,GPIO Port 1 Data Clear Register"
|
|
bitfld.long 0x00 23. " P1.7_CLR ,Port 1.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P1.6_CLR ,Port 1.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P1.5_CLR ,Port 1.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P1.4_CLR ,Port 1.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P1.3_CLR ,Port 1.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P1.2_CLR ,Port 1.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P1.1_CLR ,Port 1.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P1.0_CLR ,Port 1.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "GP2CON,GPIO 2 Control Register"
|
|
bitfld.long 0x00 28.--29. " P2.7 ,GPIO P2.7 Pin Function" "GPIO,DTR1,MS3,N/A"
|
|
bitfld.long 0x00 24.--25. " P2.6 ,GPIO P2.6 Pin Function" "GPIO,DSR1,MS2,N/A"
|
|
bitfld.long 0x00 20.--21. " P2.5 ,GPIO P2.5 Pin Function" "GPIO,DCD1,MS1,N/A"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P2.4 ,GPIO P2.4 Pin Function" "GPIO,RI1,MS0,N/A"
|
|
bitfld.long 0x00 12.--13. " P2.3 ,GPIO P2.3 Pin Function" "GPIO,CTS1,AE,N/A"
|
|
bitfld.long 0x00 8.--9. " P2.2 ,GPIO P2.2 Pin Function" "GPIO,RTS1,RS,PLAO[7]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P2.1 ,GPIO P2.1 Pin Function" "GPIO,N/A,WS,PLAO[6]"
|
|
bitfld.long 0x00 0.--1. " P2.0 ,GPIO P2.0 Pin Function" "GPIO,SYNC,SOUT,PLAO[5]"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "GP2DAT,GPIO Port 2 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P2.7_DIR ,Port 2.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P2.6_DIR ,Port 2.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P2.5_DIR ,Port 2.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P2.4_DIR ,Port 2.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P2.3_DIR ,Port 2.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P2.2_DIR ,Port 2.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P2.1_DIR ,Port 2.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P2.0_DIR ,Port 2.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P2.7_OUT ,Port 2.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P2.6_OUT ,Port 2.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P2.5_OUT ,Port 2.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P2.4_OUT ,Port 2.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P2.3_OUT ,Port 2.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P1.2_OUT ,Port 2.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P1.1_OUT ,Port 2.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P2.0_OUT ,Port 2.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P2.7_RST_ST ,Port 2.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P2.6_RST_ST ,Port 2.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P2.5_RST_ST ,Port 2.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P2.4_RST_ST ,Port 2.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P2.3_RST_ST ,Port 2.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P2.2_RST_ST ,Port 2.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P2.1_RST_ST ,Port 2.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P2.0_RST_ST ,Port 2.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P2.7_IN ,Port 1.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P2.6_IN ,Port 2.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P2.5_IN ,Port 2.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P2.4_IN ,Port 2.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P2.3_IN ,Port 2.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P2.2_IN ,Port 2.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P2.1_IN ,Port 2.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P2.0_IN ,Port 2.0 Data Input" "Low,High"
|
|
wgroup.long 0x44++0x3
|
|
line.long 0x00 "GP2SET,GPIO Port 2 Data Set Register"
|
|
bitfld.long 0x00 23. " P2.7_SET ,Port 2.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P2.6_SET ,Port 2.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P2.5_SET ,Port 2.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_SET ,Port 2.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P2.3_SET ,Port 2.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P2.2_SET ,Port 2.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_SET ,Port 2.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P2.0_SET ,Port 2.0 Set" "No effect,Set"
|
|
wgroup.long 0x48++0x3
|
|
line.long 0x00 "GP2CLR,GPIO Port 2 Data Clear Register"
|
|
bitfld.long 0x00 23. " P2.7_CLR ,Port 2.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P2.6_CLR ,Port 2.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P2.5_CLR ,Port 2.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P2.4_CLR ,Port 2.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P2.3_CLR ,Port 2.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P2.2_CLR ,Port 2.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P2.1_CLR ,Port 2.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P2.0_CLR ,Port 2.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GP3CON,GPIO 3 Control Register"
|
|
bitfld.long 0x00 28.--29. " P3.7 ,GPIO P3.7 Pin Function" "GPIO,PWM3,AD7,PLAI[15]"
|
|
bitfld.long 0x00 24.--25. " P3.6 ,GPIO P3.6 Pin Function" "GPIO,PWM1,AD6,PLAI[14]"
|
|
bitfld.long 0x00 20.--21. " P3.5 ,GPIO P3.5 Pin Function" "GPIO,PWM6,AD5,PLAI[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P3.4 ,GPIO P3.4 Pin Function" "GPIO,PWM5,AD4,PLAI[12]"
|
|
bitfld.long 0x00 12.--13. " P3.3 ,GPIO P3.3 Pin Function" "GPIO,PWM4,AD3,PLAI[11]"
|
|
bitfld.long 0x00 8.--9. " P3.2 ,GPIO P3.2 Pin Function" "GPIO,PWM3,AD2,PLAI[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P3.1 ,GPIO P3.1 Pin Function" "GPIO,PWM2,AD1,PLAI[9]"
|
|
bitfld.long 0x00 0.--1. " P3.0 ,GPIO P3.0 Pin Function" "GPIO,PWM1,AD0,PLAI[8]"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "GP3PAR,GPIO 3 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP3.7 ,Pull up Disable P3.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP3.6 ,Pull up Disable P3.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP3.5 ,Pull up Disable P3.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP3.4 ,Pull up Disable P3.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP3.3 ,Pull up Disable P3.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP3.2 ,Pull up Disable P3.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP3.1 ,Pull up Disable P3.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP3.0 ,Pull up Disable P3.0" "Enabled,Disabled"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GP3DAT,GPIO Port 3 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P3.7_DIR ,Port 3.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P3.6_DIR ,Port 3.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P3.5_DIR ,Port 3.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P3.4_DIR ,Port 3.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P3.3_DIR ,Port 3.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P3.2_DIR ,Port 3.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P3.1_DIR ,Port 3.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P3.0_DIR ,Port 3.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P3.7_OUT ,Port 3.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P3.6_OUT ,Port 3.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P3.5_OUT ,Port 3.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P3.4_OUT ,Port 3.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P3.3_OUT ,Port 3.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P3.2_OUT ,Port 3.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P3.1_OUT ,Port 3.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P3.0_OUT ,Port 3.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P3.7_RST_ST ,Port 3.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P3.6_RST_ST ,Port 3.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P3.5_RST_ST ,Port 3.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P3.4_RST_ST ,Port 3.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P3.3_RST_ST ,Port 3.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P3.2_RST_ST ,Port 3.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P3.1_RST_ST ,Port 3.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P3.0_RST_ST ,Port 3.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P3.7_IN ,Port 3.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P3.6_IN ,Port 3.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P3.5_IN ,Port 3.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P3.4_IN ,Port 3.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P3.3_IN ,Port 3.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P3.2_IN ,Port 3.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P3.1_IN ,Port 3.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P3.0_IN ,Port 3.0 Data Input" "Low,High"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "GP3SET,GPIO Port 3 Data Set Register"
|
|
bitfld.long 0x00 23. " P3.7_SET ,Port 3.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P3.6_SET ,Port 3.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P3.5_SET ,Port 3.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_SET ,Port 3.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P3.3_SET ,Port 3.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P3.2_SET ,Port 3.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_SET ,Port 3.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P3.0_SET ,Port 3.0 Set" "No effect,Set"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "GP3CLR,GPIO Port 3 Data Clear Register"
|
|
bitfld.long 0x00 23. " P3.7_CLR ,Port 3.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P3.6_CLR ,Port 3.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P3.5_CLR ,Port 3.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P3.4_CLR ,Port 3.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P3.3_CLR ,Port 3.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P3.2_CLR ,Port 3.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P3.1_CLR ,Port 3.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P3.0_CLR ,Port 3.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
tree "Port 4"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GP4CON,GPIO 4 Control Register"
|
|
bitfld.long 0x00 28.--29. " P4.7 ,GPIO P4.7 Pin Function" "GPIO,SOUT1,AD15,PLAO[15]"
|
|
bitfld.long 0x00 24.--25. " P4.6 ,GPIO P4.6 Pin Function" "GPIO,SIN1,AD14,PLAO[14]"
|
|
bitfld.long 0x00 20.--21. " P4.5 ,GPIO P4.5 Pin Function" "GPIO,PLMOUT,AD13,PLAO[13]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " P4.4 ,GPIO P4.4 Pin Function" "GPIO,PLMIN,AD12,PLAO[12]"
|
|
bitfld.long 0x00 12.--13. " P4.3 ,GPIO P4.3 Pin Function" "GPIO,Trip,AD11,PLAO[11]"
|
|
bitfld.long 0x00 8.--9. " P4.2 ,GPIO P4.2 Pin Function" "GPIO,RSVD,AD10,PLAO[10]"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " P4.1 ,GPIO P4.1 Pin Function" "GPIO,QENS2,AD9,PLAO[9]"
|
|
bitfld.long 0x00 0.--1. " P4.0 ,GPIO P4.0 Pin Function" "GPIO,QENS1,AD8,PLAO[8]"
|
|
group.long 0x6c++0x03
|
|
line.long 0x00 "GP4PAR,GPIO 4 Parameters Register"
|
|
bitfld.long 0x00 28. " PUP4.7 ,Pull up Disable P4.7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PUP4.6 ,Pull up Disable P4.6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PUP4.5 ,Pull up Disable P4.5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " PUP4.4 ,Pull up Disable P4.4" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " PUP4.3 ,Pull up Disable P4.3" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " PUP4.2 ,Pull up Disable P4.2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PUP4.1 ,Pull up Disable P4.1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PUP4.0 ,Pull up Disable P4.0" "Enabled,Disabled"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "GP4DAT,GPIO Port 4 Configuration and Data Register"
|
|
bitfld.long 0x00 31. " P4.7_DIR ,Port 4.7 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 30. " P4.6_DIR ,Port 4.6 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 29. " P4.5_DIR ,Port 4.5 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 28. " P4.4_DIR ,Port 4.4 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 27. " P4.3_DIR ,Port 4.3 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 26. " P4.2_DIR ,Port 4.2 Data Direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P4.1_DIR ,Port 4.1 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 24. " P4.0_DIR ,Port 4.0 Data Direction" "Input,Output"
|
|
bitfld.long 0x00 23. " P4.7_OUT ,Port 4.7 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " P4.6_OUT ,Port 4.6 Data Output" "Low,High"
|
|
bitfld.long 0x00 21. " P4.5_OUT ,Port 4.5 Data Output" "Low,High"
|
|
bitfld.long 0x00 20. " P4.4_OUT ,Port 4.4 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P4.3_OUT ,Port 4.3 Data Output" "Low,High"
|
|
bitfld.long 0x00 18. " P4.2_OUT ,Port 4.2 Data Output" "Low,High"
|
|
bitfld.long 0x00 17. " P4.1_OUT ,Port 4.1 Data Output" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " P4.0_OUT ,Port 4.0 Data Output" "Low,High"
|
|
bitfld.long 0x00 15. " P4.7_RST_ST ,Port 4.7 State at Reset" "Low,High"
|
|
bitfld.long 0x00 14. " P4.6_RST_ST ,Port 4.6 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P4.5_RST_ST ,Port 4.5 State at Reset" "Low,High"
|
|
bitfld.long 0x00 12. " P4.4_RST_ST ,Port 4.4 State at Reset" "Low,High"
|
|
bitfld.long 0x00 11. " P4.3_RST_ST ,Port 4.3 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " P4.2_RST_ST ,Port 4.2 State at Reset" "Low,High"
|
|
bitfld.long 0x00 9. " P4.1_RST_ST ,Port 4.1 State at Reset" "Low,High"
|
|
bitfld.long 0x00 8. " P4.0_RST_ST ,Port 4.0 State at Reset" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P4.7_IN ,Port 4.7 Data Input" "Low,High"
|
|
bitfld.long 0x00 6. " P4.6_IN ,Port 4.6 Data Input" "Low,High"
|
|
bitfld.long 0x00 5. " P4.5_IN ,Port 4.5 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " P4.4_IN ,Port 4.4 Data Input" "Low,High"
|
|
bitfld.long 0x00 3. " P4.3_IN ,Port 4.3 Data Input" "Low,High"
|
|
bitfld.long 0x00 2. " P4.2_IN ,Port 4.2 Data Input" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P4.1_IN ,Port 4.1 Data Input" "Low,High"
|
|
bitfld.long 0x00 0. " P4.0_IN ,Port 4.0 Data Input" "Low,High"
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "GP4SET,GPIO Port 4 Data Set Register"
|
|
bitfld.long 0x00 23. " P4.7_SET ,Port 4.7 Set" "No effect,Set"
|
|
bitfld.long 0x00 22. " P4.6_SET ,Port 4.6 Set" "No effect,Set"
|
|
bitfld.long 0x00 21. " P4.5_SET ,Port 4.5 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_SET ,Port 4.4 Set" "No effect,Set"
|
|
bitfld.long 0x00 19. " P4.3_SET ,Port 4.3 Set" "No effect,Set"
|
|
bitfld.long 0x00 18. " P4.2_SET ,Port 4.2 Set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_SET ,Port 4.1 Set" "No effect,Set"
|
|
bitfld.long 0x00 16. " P4.0_SET ,Port 4.0 Set" "No effect,Set"
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "GP4CLR,GPIO Port 4 Data Clear Register"
|
|
bitfld.long 0x00 23. " P4.7_CLR ,Port 4.7 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " P4.6_CLR ,Port 4.6 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " P4.5_CLR ,Port 4.5 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 20. " P4.4_CLR ,Port 4.4 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 19. " P4.3_CLR ,Port 4.3 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " P4.2_CLR ,Port 4.2 Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P4.1_CLR ,Port 4.1 Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " P4.0_CLR ,Port 4.0 Clear" "No effect,Cleared"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "AD Converter"
|
|
base ad:0xffff0500
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7023")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,Reserved,ADC12,Reserved,DAC1,DAC2,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,Reserved,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
endif
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,Reserved,ADC12,Reserved,Reserved,DAC1,Temperature,AGND,Internal reference,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,Reserved,Internal reference,?..."
|
|
endif
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
sif (cpu()=="ADUC7023")
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
in
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
endif
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
sif (cpu()=="ADUC7023")
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "TSCON,Temperature sensor chopping enable register"
|
|
bitfld.byte 0x00 0. " TCEN ,Temperature sensor chop enable" "Disabled,Enabled"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "TEMPREF,Temperature sensor reference value register"
|
|
bitfld.word 0x00 8. " SIGN ,Temperature reference voltage sign" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " ADCCAL ,ADC calibration voltage"
|
|
endif
|
|
width 16.
|
|
elif (cpu()=="ADUC7020")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7021"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
sif (cpu()=="ADUC7028")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
elif (cpu()=="ADUC7029")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,Reserved,Reserved,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
endif
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
sif (cpu()=="ADUC7028")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Internal reference,?..."
|
|
elif (cpu()=="ADUC7029")
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,Reserved,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,DAC2,DAC3,Internal reference,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,Reserved,Reserved,Reserved,Reserved,DAC0,DAC1,Reserved,Reserved,Internal reference,?..."
|
|
endif
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7022")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7024")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,Reserved,Reserved,DAC0,DAC1,Reserved,Reserved,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,Reserved,Reserved,DAC0,DAC1,Reserved,Reserved,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7025")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,Reserved,Reserved,Reserved,Reserved,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,Reserved,Reserved,Reserved,Reserved,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7026")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,DAC0,DAC1,DAC2,DAC3,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,DAC0,DAC1,DAC2,DAC3,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7027")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCCS ,ADC Clock Speed" "fADC/1,fADC/2,fADC/4,fADC/8,fADC/16,fADC/32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " ESC ,Enable Start Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " EADCB ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Normal,Power-down"
|
|
bitfld.word 0x00 3.--4. " CM , Conversion Mode" "Single-ended,Differential,Pseudo differential,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer1,Timer0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12,ADC13,ADC14,ADC15,Temperature,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " ADCCP ,ADC Positive Channel Selection Register" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12,ADC13,ADC14,ADC15,Internal reference,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRES ,12-bit ADC Result"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
hexmask.byte 0x00 0.--7. 1. " ADCRST ,Resets the Digital Interface of the ADC"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit Gain Calibration Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit Offset Calibration Register"
|
|
width 16.
|
|
elif (cpu()=="ADUC7121"||cpu()=="ADUC7122")
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.long 0x00 15. " POS_BP ,Positive ADC buffer bypass" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " NEG_BP ,Negative ADC buffer bypass" "Disabled,Enabled"
|
|
bitfld.long 0x00 11.--13. " ADCS ,ADC Clock Speed" "Fadc/1,Fadc/2,Fadc/4,Fadc/8,Fadc/16,Fadc/32,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks,32 clocks,64 clocks,?..."
|
|
bitfld.long 0x00 7. " EC ,Enable Conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADCPC ,ADC Power Control" "Power-down,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CM ,Conversion Mode" "Single ended,Differential,Pseudo-differential,?..."
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.long 0x00 0.--2. " CT ,Conversion Type" "CONVSTART,Timer 1,Timer 0,Single,Continuous,PLA,PWM,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " CT ,Conversion Type" "CONVSTART,Timer 1,Timer 0,Single,Continuous,PLA,?..."
|
|
endif
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.byte 0x00 0.--4. " PCSB ,Positive Channel Selection Bits" "PADC0P,PADC1P,Reserved,Reserved,Reserved,Reserved,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10/AINCM,Temperature sensor,DVDD_IDAC0,DVDD_IDAC1,DVDD_IDAC2,DVDD_IDAC3,DVDD_IDAC4,IOVDD_MON,Reserved,Reserved,VREF,AGND,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " PCSB ,Positive Channel Selection Bits" "PADC0P,PADC1P,ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10/AINCM,Temperature sensor,DVDD_IDAC0,DVDD_IDAC0,DVDD_IDAC0,DVDD_IDAC0,DVDD_IDAC0,IOVDD_MON,Reserved,Reserved,VREF,AGND,?..."
|
|
endif
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
sif (cpu()=="ADUC7121")
|
|
bitfld.byte 0x00 0.--4. " NCSB ,Negative Channel Selection Bits" "PADC0N,PADC1N,Reserved,Reserved,Reserved,Reserved,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10/AINCM,VREF,AGND,PGND,IOGND,Reserved,Reserved,IOVDD_MON,Reserved,Reserved,VREF,AGND,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " NCSB ,Negative Channel Selection Bits" "PAD0N,PAD1N,ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10/AINCM,Reserved,AGND,Reserved,IOGND,?..."
|
|
endif
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
sif (cpu()=="ADUC7121")
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " ADCRESULT ,12-bit ADC Result"
|
|
else
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
in
|
|
; hexmask.long.word 0x00 16.--27. 1. " ADCRESULT ,12-bit ADC Result"
|
|
endif
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
bitfld.byte 0x00 0. " RST ,Reset" "No reset,Reset"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "PGA_GN,Gain of PADC0 and PADC1"
|
|
bitfld.word 0x00 6.--11. " PGA_PADC0_GN ,Gain of PGA for PADC0" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
bitfld.word 0x00 0.--5. " PGA_PADC1_GN ,Gain of PGA for PADC1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
|
|
sif (cpu()=="ADUC7121")
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "ADCGN,ADC Gain Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADC_GAIN_CALIBRATION ,ADC Gain Calibration value for non-PGA channels"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "ADCOF,ADC Offset Calibration Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADC_OFFSET_CALIBRATION ,ADC Offset Calibration value"
|
|
endif
|
|
;section
|
|
width 0xb
|
|
elif (cpu()=="ADUC7124")
|
|
width 9.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.long 0x00 13. " TRIG_MOD ,Trigger mode" "Level,Edge"
|
|
bitfld.long 0x00 10.--12. " ADCS ,ADC Clock Speed" "Fadc/1,Fadc/2,Fadc/4,Fadc/8,Fadc/16,Fadc/32,?..."
|
|
bitfld.long 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EC ,Enable Conversion" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ADCB_EN ,Enable ADCBUSY" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ADCPC ,ADC Power Control" "Power-down,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " CM ,Conversion Mode" "Single ended,Differential,Pseudo-differential,?..."
|
|
bitfld.long 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer 1,Timer 0,Single,Continuous,PLA,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " PCSB ,Positive Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12/DAC0,ADC13/DAC1,ADC14/DAC2,ADC15/DAC3,Temperature sensor,AGND,Internal reference,AVDD/2,?..."
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
bitfld.byte 0x00 0.--4. " NCSB ,Negative Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12/DAC0,ADC13/DAC1,ADC14/DAC2,ADC15/DAC3,Reserved,AGND,?..."
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
in
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "ADCGN,Gain calibration register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCGN ,10-bit gain calibration"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "ADCOF,Offset calibration register"
|
|
hexmask.word 0x00 0.--9. 1. " ADCOF ,10-bit offset calibration"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "TSCON,Temperature Sensor Control Register"
|
|
bitfld.byte 0x00 0. " EN ,Temperature sensor chop enable" "Disabled,Enabled"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "TEMPREF,Temperature Sensor Reference"
|
|
bitfld.word 0x00 8. " SIGN ,Temperature reference voltage sign" "0,1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " OFFSET ,Temperature sensor offset calibration voltage"
|
|
width 0xb
|
|
elif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
width 8.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 10.--12. " ADCS ,ADC Speed" "Fadc / 1,Fadc / 2,Fadc / 4,Fadc / 8,Fadc / 16,Fadc / 32,?..."
|
|
bitfld.word 0x00 8.--9. " ADCAT ,ADC Acquisition Time" "2 clocks,4 clocks,8 clocks,16 clocks"
|
|
bitfld.word 0x00 7. " EC ,Enable Conversion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ADCPC ,ADC Power Control" "Power-down,Normal"
|
|
bitfld.word 0x00 3.--4. " CM ,Conversion Mode" "Single ended,Differential,Pseudo-differential,?..."
|
|
bitfld.word 0x00 0.--2. " CT ,Conversion Type" "/CONVSTART,Timer 1,Timer 0,Single,Continuous,PLA,PWM,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "ADCCP,ADC Positive Channel Selection Register"
|
|
sif (cpu()=="ADUC7128")
|
|
bitfld.byte 0x00 0.--4. " PCSB ,Positive Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,Reserved,Reserved,Reserved,ADC9,ADC10,Reserved,Reserved,Reserved,Reserved,Reserved,Temperature sensor,AGND,Reference,AVDD/2,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " PCSB ,Positive Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12/LD2TX,ADC13/LD1TX,Reserved,Reserved,Temperature sensor,AGND,Reference,AVDD/2,?..."
|
|
endif
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "ADCCN,ADC Negative Channel Selection Register"
|
|
sif (cpu()=="ADUC7128")
|
|
bitfld.byte 0x00 0.--4. " NCSB ,Negative Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,Reserved,Reserved,Reserved,ADC9,ADC10,Reserved,Reserved,Reserved,Reserved,Reserved,Temperature sensor,?..."
|
|
else
|
|
bitfld.byte 0x00 0.--4. " NCSB ,Negative Channel Selection Bits" "ADC0,ADC1,ADC2,ADC3,ADC4,ADC5,ADC6,ADC7,ADC8,ADC9,ADC10,ADC11,ADC12/LD2TX,ADC13/LD1TX,Reserved,Reserved,Temperature sensor,?..."
|
|
endif
|
|
rgroup.byte 0x0c++0x00
|
|
line.byte 0x00 "ADCSTA,ADC Status Register"
|
|
bitfld.byte 0x00 0. " ADCREADY ,ADC Ready" "Not ready,Ready"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "ADCDAT,ADC Data Result Register"
|
|
; hexmask.long.word 0x00 16.--27. 1. " ADCRESULT ,12-bit ADC Result"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "ADCRST,ADC Reset Register"
|
|
bitfld.byte 0x00 0. " RST ,Reset" "No reset,Reset"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "DA Converter"
|
|
sif (cpu()=="ADUC7021"||cpu()=="ADUC7024"||cpu()=="ADUC7124")
|
|
base ad:0xffff0600
|
|
width 0x09
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "DAC0CON,DA Converter 0 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "DAC0DAT,DA Converter 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 0 Data"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "DAC1CON,DA Converter 1 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "DAC1DAT,DA Converter 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 1 Data"
|
|
sif (cpu()=="ADUC7124")
|
|
group.byte 0x54++0x0
|
|
line.byte 0x00 "DACBCFG,DA Converter Op Amp Mode Register"
|
|
bitfld.byte 0x00 1. " DAC1_MODE ,DAC1 output buffer mode" "Normal,Op Amp"
|
|
bitfld.byte 0x00 0. " DAC0_MODE ,DAC0 output buffer mode" "Normal,Op Amp"
|
|
endif
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7020"||cpu()=="ADUC7026"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
|
|
base ad:0xffff0600
|
|
width 0x09
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "DAC0CON,DA Converter 0 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "DAC0DAT,DA Converter 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 0 Data"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "DAC1CON,DA Converter 1 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "DAC1DAT,DA Converter 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 1 Data"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "DAC2CON,DA Converter 2 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DAC2DAT,DA Converter 2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 2 Data"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "DAC3CON,DA Converter 3 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "DAC3DAT,DA Converter 3 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 3 Data"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7023")
|
|
base ad:0xffff0600
|
|
width 0x09
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "DAC0CON,DA Converter 0 Control Register"
|
|
bitfld.byte 0x00 6. " DACBY ,Bypass the DAC output buffer" "Not bypassed,Bypassed"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,Reserved,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "DAC0DAT,DA Converter 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 0 Data"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "DAC1CON,DA Converter 1 Control Register"
|
|
bitfld.byte 0x00 6. " DACBY ,Bypass the DAC output buffer" "Not bypassed,Bypassed"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,Reserved,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "DAC1DAT,DA Converter 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 1 Data"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "DAC2CON,DA Converter 2 Control Register"
|
|
bitfld.byte 0x00 6. " DACBY ,Bypass the DAC output buffer" "Not bypassed,Bypassed"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,Reserved,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DAC2DAT,DA Converter 2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 2 Data"
|
|
group.byte 0x18++0x0
|
|
line.byte 0x00 "DAC3CON,DA Converter 3 Control Register"
|
|
bitfld.byte 0x00 6. " DACBY ,Bypass the DAC output buffer" "Not bypassed,Bypassed"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer1"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC range bits" "Power-down,Reserved,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "DAC3DAT,DA Converter 3 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 3 Data"
|
|
group.byte 0x54++0x0
|
|
line.byte 0x00 "DACBCFG,DACBCFG Register"
|
|
bitfld.byte 0x00 3. " DAC3M ,DAC3 Mode" "Normal,Amp"
|
|
bitfld.byte 0x00 2. " DAC2M ,DAC2 Mode" "Normal,Amp"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " DAC1M ,DAC1 Mode" "Normal,Amp"
|
|
bitfld.byte 0x00 0. " DAC0M ,DAC0 Mode" "Normal,Amp"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "DACBKEY1,DACBKEY1 Register"
|
|
wgroup.long 0x58++0x03
|
|
line.long 0x00 "DACBKEY2,DACBKEY2 Register"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7019")
|
|
base ad:0xffff0600
|
|
width 0x09
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "DAC0CON,DA Converter 0 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC Update Rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC Clear Bit" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC Range Bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "DAC0DAT,DA Converter 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 0 Data"
|
|
group.byte 0x08++0x0
|
|
line.byte 0x00 "DAC1CON,DA Converter 1 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC Update Rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC Clear Bit" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC Range Bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "DAC1DAT,DA Converter 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 1 Data"
|
|
group.byte 0x10++0x0
|
|
line.byte 0x00 "DAC2CON,DA Converter 2 Control Register"
|
|
bitfld.byte 0x00 5. " DACCLK ,DAC Update Rate" "HCLK,Timer1"
|
|
bitfld.byte 0x00 4. " DACCLR ,DAC Clear Bit" "Reset,Normal"
|
|
bitfld.byte 0x00 0.--1. " DACRAN ,DAC Range Bits" "Power-down,0-DACref,0-Vref (2.5V),0-AVDD"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DAC2DAT,DA Converter 2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,DA Converter 2 Data"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7121")
|
|
base ad:0xffff0580
|
|
width 0x0A
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "DAC0CONN,DAC 0 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 7. " DACBUF_LP ,DAC buffer low power mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 3. " MODE ,DAC mode bit" "Interpolation,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RATE ,DAC rate" "HCLK/32,HCLK/16"
|
|
bitfld.word 0x00 0.--1. " DACRN0 ,DAC range" "VREF/AGND,EXT_REF,EXT_REF,AVDD/AGND"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "DAC0DAT,DAC 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC0DATA ,12-bit data for DAC0"
|
|
bitfld.long 0x00 12.--15. " INTERPOLATION_MODE ,Extra bits for interpolation mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "DAC1CONN,DAC 1 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 7. " DACBUF_LP ,DAC buffer low power mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 3. " MODE ,DAC mode bit" "Interpolation,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RATE ,DAC rate" "HCLK/32,HCLK/16"
|
|
bitfld.word 0x00 0.--1. " DACRN1 ,DAC range" "VREF/AGND,EXT_REF,EXT_REF,AVDD/AGND"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "DAC1DAT,DAC 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC1DATA ,12-bit data for DAC1"
|
|
bitfld.long 0x00 12.--15. " INTERPOLATION_MODE ,Extra bits for interpolation mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "DAC2CONN,DAC 2 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 7. " DACBUF_LP ,DAC buffer low power mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 3. " MODE ,DAC mode bit" "Interpolation,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RATE ,DAC rate" "HCLK/32,HCLK/16"
|
|
bitfld.word 0x00 0.--1. " DACRN2 ,DAC range" "VREF/AGND,EXT_REF,EXT_REF,AVDD/AGND"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DAC2DAT,DAC 2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC2DATA ,12-bit data for DAC2"
|
|
bitfld.long 0x00 12.--15. " INTERPOLATION_MODE ,Extra bits for interpolation mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "DAC3CONN,DAC 3 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 7. " DACBUF_LP ,DAC buffer low power mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 3. " MODE ,DAC mode bit" "Interpolation,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RATE ,DAC rate" "HCLK/32,HCLK/16"
|
|
bitfld.word 0x00 0.--1. " DACRN3 ,DAC range" "VREF/AGND,EXT_REF,EXT_REF,AVDD/AGND"
|
|
group.long 0x5c++0x03
|
|
line.long 0x00 "DAC3DAT,DAC 3 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC3DATA ,12-bit data for DAC3"
|
|
bitfld.long 0x00 12.--15. " INTERPOLATION_MODE ,Extra bits for interpolation mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7122")
|
|
base ad:0xffff0580
|
|
width 0x0A
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "DAC0CONN,DAC 0 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN0 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "DAC0DAT,DAC 0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC0DATA ,12-bit data for DAC0"
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "DAC1CONN,DAC 1 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN1 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "DAC1DAT,DAC 1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC1DATA ,12-bit data for DAC1"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "DAC2CONN,DAC 2 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN2 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "DAC2DAT,DAC 2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC2DATA ,12-bit data for DAC2"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "DAC3CONN,DAC 3 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN3 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DAC3DAT,DAC 3 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC3DATA ,12-bit data for DAC3"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "DAC4CONN,DAC 4 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN4 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DAC4DAT,DAC 4 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC4DATA ,12-bit data for DAC4"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "DAC5CONN,DAC 5 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN5 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "DAC5DAT,DAC 5 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC5DATA ,12-bit data for DAC5"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "DAC6CONN,DAC 6 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN6 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DAC6DAT,DAC 6 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC6DATA ,12-bit data for DAC6"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "DAC7CONN,DAC 7 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN7 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "DAC7DAT,DAC 7 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC7DATA ,12-bit data for DAC7"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "DAC8CONN,DAC 8 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN8 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DAC8DAT,DAC 8 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC8DATA ,12-bit data for DAC8"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "DAC9CONN,DAC 9 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN9 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "DAC9DAT,DAC 9 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC9DATA ,12-bit data for DAC9"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "DAC10CONN,DAC 10 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN10 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DAC10DAT,DAC 10 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC10DATA ,12-bit data for DAC10"
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "DAC11CONN,DAC 11 Control Register"
|
|
bitfld.word 0x00 8. " DACPD ,DAC power-down" "Normal,Tri-state"
|
|
bitfld.word 0x00 6. " BYP ,DAC bypass" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DACCLK ,DAC update rate" "HCLK,Timer 1"
|
|
bitfld.word 0x00 4. " DACCLR ,DAC clear" "Reset,Normal"
|
|
bitfld.word 0x00 0.--1. " DACRN11 ,DAC range" "VREF/AGND,Reserved,Reserved,AVDD/AGND"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "DAC11DAT,DAC 11 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DAC11DATA ,12-bit data for DAC11"
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="ADUC7121")
|
|
tree "Current Output DACs"
|
|
base ad:0xffff0700
|
|
width 0x0F
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "IDAC0CON ,IDAC0 Control Register"
|
|
bitfld.word 0x00 7.--8. " SFHMODE ,Bit shuffling" "One increment,Internal counter,Input data,?..."
|
|
bitfld.word 0x00 6. " MSBSHFEN ,MSB shuffle enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LSBSHFEN ,LSB shuffle enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IDACPD ,IDAC power-down bit" "Power up,Power down"
|
|
bitfld.word 0x00 3. " IDACCLK ,IDAC update rate" "HCLK,Timer1"
|
|
bitfld.word 0x00 2. " IDACCLR ,IDAC clear bit" "Reset,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MODE ,Mode bit" "0,?..."
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "IDAC0DAT,IDAC0 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,Data from IDAC0"
|
|
group.byte 0x8++0x00
|
|
line.byte 0x00 "IDAC0BW,IDAC0 Bandwidth Register"
|
|
bitfld.byte 0x00 0.--3. " BW ,Bandwidth control bits" "100 kHz,28.7 kHz,15 kHz,7.8 kHz,4 kHz,2.2 kHz,1.2 kHz,?..."
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "IDAC1CON ,IDAC1 Control Register"
|
|
bitfld.word 0x00 7.--8. " SFHMODE ,Bit shuffling" "One increment,Internal counter,Input data,?..."
|
|
bitfld.word 0x00 6. " MSBSHFEN ,MSB shuffle enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LSBSHFEN ,LSB shuffle enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IDACPD ,IDAC power-down bit" "Power up,Power down"
|
|
bitfld.word 0x00 3. " IDACCLK ,IDAC update rate" "HCLK,Timer1"
|
|
bitfld.word 0x00 2. " IDACCLR ,IDAC clear bit" "Reset,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MODE ,Mode bit" "0,?..."
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "IDAC1DAT,IDAC1 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,Data from IDAC1"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "IDAC1BW,IDAC1 Bandwidth Register"
|
|
bitfld.byte 0x00 0.--3. " BW ,Bandwidth control bits" "100 kHz,28.7 kHz,15 kHz,7.8 kHz,4 kHz,2.2 kHz,1.2 kHz,?..."
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "IDAC2CON ,IDAC2 Control Register"
|
|
bitfld.word 0x00 7.--8. " SFHMODE ,Bit shuffling" "One increment,Internal counter,Input data,?..."
|
|
bitfld.word 0x00 6. " MSBSHFEN ,MSB shuffle enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LSBSHFEN ,LSB shuffle enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IDACPD ,IDAC power-down bit" "Power up,Power down"
|
|
bitfld.word 0x00 3. " IDACCLK ,IDAC update rate" "HCLK,Timer1"
|
|
bitfld.word 0x00 2. " IDACCLR ,IDAC clear bit" "Reset,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MODE ,Mode bit" "0,?..."
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "IDAC2DAT,IDAC2 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,Data from IDAC2"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "IDAC2BW,IDAC2 Bandwidth Register"
|
|
bitfld.byte 0x00 0.--3. " BW ,Bandwidth control bits" "100 kHz,28.7 kHz,15 kHz,7.8 kHz,4 kHz,2.2 kHz,1.2 kHz,?..."
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "IDAC3CON ,IDAC3 Control Register"
|
|
bitfld.word 0x00 7.--8. " SFHMODE ,Bit shuffling" "One increment,Internal counter,Input data,?..."
|
|
bitfld.word 0x00 6. " MSBSHFEN ,MSB shuffle enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LSBSHFEN ,LSB shuffle enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IDACPD ,IDAC power-down bit" "Power up,Power down"
|
|
bitfld.word 0x00 3. " IDACCLK ,IDAC update rate" "HCLK,Timer1"
|
|
bitfld.word 0x00 2. " IDACCLR ,IDAC clear bit" "Reset,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MODE ,Mode bit" "0,?..."
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "IDAC3DAT,IDAC3 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,Data from IDAC3"
|
|
group.byte 0x2C++0x00
|
|
line.byte 0x00 "IDAC3BW,IDAC3 Bandwidth Register"
|
|
bitfld.byte 0x00 0.--3. " BW ,Bandwidth control bits" "100 kHz,28.7 kHz,15 kHz,7.8 kHz,4 kHz,2.2 kHz,1.2 kHz,?..."
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "IDAC4CON ,IDAC4 Control Register"
|
|
bitfld.word 0x00 7.--8. " SFHMODE ,Bit shuffling" "One increment,Internal counter,Input data,?..."
|
|
bitfld.word 0x00 6. " MSBSHFEN ,MSB shuffle enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " LSBSHFEN ,LSB shuffle enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " IDACPD ,IDAC power-down bit" "Power up,Power down"
|
|
bitfld.word 0x00 3. " IDACCLK ,IDAC update rate" "HCLK,Timer1"
|
|
bitfld.word 0x00 2. " IDACCLR ,IDAC clear bit" "Reset,Normal"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MODE ,Mode bit" "0,?..."
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IDAC4DAT,IDAC4 Data Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA ,Data from IDAC4"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "IDAC4BW,IDAC4 Bandwidth Register"
|
|
bitfld.byte 0x00 0.--3. " BW ,Bandwidth control bits" "100 kHz,28.7 kHz,15 kHz,7.8 kHz,4 kHz,2.2 kHz,1.2 kHz,?..."
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "TDSCON,TDS Configuration"
|
|
bitfld.byte 0x00 2. " DISLR ,Disable low external resistance" "Yes,No"
|
|
bitfld.byte 0x00 1. " DISINT ,Disable thermal trigger interrupt" "No,Yes"
|
|
bitfld.byte 0x00 0. " DISSD ,Disable the output current DACs" "Yes,No"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "IDACSTA,IDAC Status Register"
|
|
bitfld.byte 0x00 1. " TSHUT ,Thermal shutdown error status" "Normal,Shutdown"
|
|
bitfld.byte 0x00 0. " EXTRESLOW ,External resistor short bit" "Normal,Short"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "IDAC0PULLDOWN, IDAC0 Pull Down Register"
|
|
bitfld.byte 0x00 5. " PULLDOWN ,IDAC0 pull-down" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " PLA_PD_EN ,PLA output trigger enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--3. " PLA_SOURCE ,PLA output source for PLA output trigger enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
tree "DAC and DDS Registers"
|
|
base ad:0xffff0670
|
|
width 9.
|
|
tree "DAC"
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "DACCON,DAC Control Register"
|
|
bitfld.word 0x00 5. " OE ,Line Driver Output Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " SEODO ,Single Ended / Differential Output Control" "Single ended,Differential"
|
|
textline " "
|
|
bitfld.word 0x00 1.--2. " OMC ,Operation Mode Control" "Powerdown,Reserved,Reserved,DDS and DAC"
|
|
bitfld.word 0x00 0. " DACURC ,DAC Update Rate Control" "HCLK,Timer 1"
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "DACEN,DAC Enable Register"
|
|
bitfld.byte 0x00 0. " DACDDS ,DAC Enable" "DDS,DAC"
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "DACDAT,Data Register"
|
|
hexmask.word 0x00 0.--9. 1. " DATA ,10-bit Data for DAC"
|
|
group.byte 0x34++0x00
|
|
line.byte 0x00 "DACKEY0,DAC Key 0 Register"
|
|
group.byte 0x4c++0x00
|
|
line.byte 0x00 "DACKEY1,DAC Key 1 Register"
|
|
tree.end
|
|
width 9.
|
|
tree "DDS"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "DDSCON,DDS Control Register"
|
|
bitfld.byte 0x00 5. " DDSOE ,DDS Output Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--3. " BDC ,Binary Divide Control" "0.000,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,1.000,1.000,1.000,1.000,1.000,1.000,1.000"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DDSFRQ,DDS Frequency Register"
|
|
hexmask.long 0x00 0.--31. 1. " FSW ,DDS Frequency"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "DDSPHS,DDS Phase Register"
|
|
hexmask.word 0x00 0.--11. 1. " PHASE , DDS Phase"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7129")
|
|
tree "External Memory"
|
|
sif (cpu()!="ADUC7129")
|
|
base ad:0xFFFFF000
|
|
width 0x08
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "XMCFG,External Memory Confoguration"
|
|
bitfld.byte 0x00 0. " XMENA ,External Memory Access Enable" "Disabled,Enabled"
|
|
if (((d.b(d:0xFFFFF000))&0x1)==0x1)
|
|
group.byte 0x10++0x0 "Region 0"
|
|
line.byte 0x00 "XM0CON,External Memory 0 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "XM0PAR,External Memory 0 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x14++0x0 "Region 1"
|
|
line.byte 0x00 "XM1CON,External Memory 1 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "XM1PAR,External Memory 1 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x18++0x0 "Region 2"
|
|
line.byte 0x00 "XM2CON,External Memory 2 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "XM2PAR,External Memory 2 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x1c++0x0 "Region 3"
|
|
line.byte 0x00 "XM3CON,External Memory 3 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "XM3PAR,External Memory 3 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
hgroup.byte 0x10++0x0 "Region 0"
|
|
hide.byte 0x00 "XM0CON,External Memory 0 Control"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "XM0PAR,External Memory 0 Region Accesing Protocol"
|
|
hgroup.byte 0x14++0x0 "Region 1"
|
|
hide.byte 0x00 "XM1CON,External Memory 1 Control"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "XM1PAR,External Memory 1 Region Accesing Protocol"
|
|
hgroup.byte 0x18++0x0 "Region 2"
|
|
hide.byte 0x00 "XM2CON,External Memory 2 Control"
|
|
hgroup.word 0x28++0x1
|
|
hide.word 0x00 "XM2PAR,External Memory 2 Region Accesing Protocol"
|
|
hgroup.byte 0x1c++0x0 "Region 3"
|
|
hide.byte 0x00 "XM3CON,External Memory 3 Control"
|
|
hgroup.word 0x2c++0x1
|
|
hide.word 0x00 "XM3PAR,External Memory 3 Region Accesing Protocol"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
base ad:0xFFFF0C00
|
|
width 0x08
|
|
group.byte 0x00++0x0
|
|
line.byte 0x00 "XMCFG,External Memory Confoguration"
|
|
bitfld.byte 0x00 0. " XMENA ,External Memory Access Enable" "Disabled,Enabled"
|
|
if (((d.b(d:0xFFFF0C00))&0x1)==0x1)
|
|
group.byte 0x10++0x0 "Region 0"
|
|
line.byte 0x00 "XM0CON,External Memory 0 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "XM0PAR,External Memory 0 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x14++0x0 "Region 1"
|
|
line.byte 0x00 "XM1CON,External Memory 1 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "XM1PAR,External Memory 1 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x18++0x0 "Region 2"
|
|
line.byte 0x00 "XM2CON,External Memory 2 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "XM2PAR,External Memory 2 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.byte 0x1c++0x0 "Region 3"
|
|
line.byte 0x00 "XM3CON,External Memory 3 Control"
|
|
bitfld.byte 0x00 1. " DB_WIDTH ,Selects between 8 and 16 bit data bus width" "8-bit,16-bit"
|
|
bitfld.byte 0x00 0. " MRE ,Enables Memory Region" "Disabled,Enabled"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "XM3PAR,External Memory 3 Region Accesing Protocol"
|
|
bitfld.word 0x00 15. " BWSE ,Enable Byte write strobe" "Disabled,Enabled"
|
|
bitfld.word 0x00 12.--14. " WS ,Number of wait states on the Address latch enable strobe" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 10. " EAHT ,Extra address hold time" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EBTTR ,Extra bus transition time on Read" "Enabled,Disabled"
|
|
bitfld.word 0x00 8. " EBTTW ,Extra bus transition time on Write" "Enabled,Disabled"
|
|
bitfld.word 0x00 4.--7. " WWS ,Number of Write Wait States" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " RWS ,Number of Read Wait States" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
hgroup.byte 0x10++0x0 "Region 0"
|
|
hide.byte 0x00 "XM0CON,External Memory 0 Control"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "XM0PAR,External Memory 0 Region Accesing Protocol"
|
|
hgroup.byte 0x14++0x0 "Region 1"
|
|
hide.byte 0x00 "XM1CON,External Memory 1 Control"
|
|
hgroup.word 0x24++0x1
|
|
hide.word 0x00 "XM1PAR,External Memory 1 Region Accesing Protocol"
|
|
hgroup.byte 0x18++0x0 "Region 2"
|
|
hide.byte 0x00 "XM2CON,External Memory 2 Control"
|
|
hgroup.word 0x28++0x1
|
|
hide.word 0x00 "XM2PAR,External Memory 2 Region Accesing Protocol"
|
|
hgroup.byte 0x1c++0x0 "Region 3"
|
|
hide.byte 0x00 "XM3CON,External Memory 3 Control"
|
|
hgroup.word 0x2c++0x1
|
|
hide.word 0x00 "XM3PAR,External Memory 3 Region Accesing Protocol"
|
|
endif
|
|
width 0x0B
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "PWM"
|
|
sif (cpu()=="ADUC7019"||cpu()=="ADUC7020"||cpu()=="ADUC7021"||cpu()=="ADUC7022"||cpu()=="ADUC7024"||cpu()=="ADUC7025"||cpu()=="ADUC7026"||cpu()=="ADUC7027"||cpu()=="ADUC7028"||cpu()=="ADUC7029")
|
|
base ad:0xFFFFFC00
|
|
width 0x09
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "PWMCON,Control Register"
|
|
bitfld.word 0x00 4. " PWM_SYNCSEL ,External Sync Select" "Internal,External"
|
|
bitfld.word 0x00 3. " PWM_EXTSYNC ,External Sync Select" "External synchronous,Asynchronous"
|
|
bitfld.word 0x00 2. " PWMDBL ,Double Update Mode" "Single,Double"
|
|
textline " "
|
|
bitfld.word 0x00 1. " PWM_SYNC_EN ,PWM Synchronisation Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "PWMSTA,PWM Status Register"
|
|
bitfld.word 0x00 9. " PWMSYNCINT ,PWM Sync Interrupt" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 8. " PWMTRIPINT ,PWM Trip Interrupt" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 3. " PWMTRIP ,Raw Signal From PWMTRIP Pin" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PWMPHASE ,PWM Phase" "Counting down,Counting up"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PWMDAT0,Switching Period Register"
|
|
hexmask.word 0x00 0.--15. 1. " DAT0 ,Switching Period"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "PWMDAT1,Dead Time Register"
|
|
hexmask.word 0x00 0.--9. 1. " DAT1 ,Dead Time"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PWMCFG,Gate Chopping Register"
|
|
bitfld.word 0x00 9. " CHOPLO ,Low-side Gate Chopping Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CHOPHI ,High-side Gate Chopping Enable" "Disabled,Enabled"
|
|
hexmask.word.byte 0x00 0.--7. 1. " GDCLK ,PWM Gate Chopping Period (unsigned)"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "PWMEN,Channel Outputs And Crossover Enable Register"
|
|
bitfld.word 0x00 8. " 0H0L_XOVR ,Channel 0 Output Crossover Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " 1H1L_XOVR ,Channel 1 Output Crossover Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " 2H2L_XOVR ,Channel 2 Output Crossover Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " 0L_EN ,0L Output Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 4. " 0H_EN ,0H Output Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 3. " 1L_EN ,1L Output Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " 1H_EN ,1H Output Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 1. " 2L_EN ,2L Output Enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 0. " 2H_EN ,2H Output Enable" "Enabled,Disabled"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "PWMDAT2,PWM Sync Pulse Width Register"
|
|
hexmask.word 0x00 0.--9. 1. " DAT2 ,Sync Pulse Width"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "PWMCH0,Channel 0 Duty Cycle Register"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "PWMCH1,Channel 1 Duty Cycle Register"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "PWMCH2,Channel 2 Duty Cycle Register"
|
|
width 0x0B
|
|
elif (cpu()=="ADUC7023"||cpu()=="ADUC7121"||cpu()=="ADUC7122"||cpu()=="ADUC7124"||cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
base ad:0xffff0f80
|
|
width 10.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "PWMCON1,PWM Control 1 Register"
|
|
bitfld.word 0x00 14. " SYNC ,Enables PWM Synchronization" "Disabled,Enabled"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.word 0x00 12. " PWM3INV ,Invert PWM3" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM1INV ,Invert PWM1" "Normal,Inverted"
|
|
elif (cpu()=="ADUC7124")
|
|
bitfld.word 0x00 13. " PWM5INV ,Invert PWM5" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " PWM3INV ,Invert PWM3" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM1INV ,Invert PWM1" "Normal,Inverted"
|
|
else
|
|
bitfld.word 0x00 13. " PWM6INV ,Invert PWM6" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " PWM4INV ,Invert PWM4" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM2INV ,Invert PWM2" "Normal,Inverted"
|
|
endif
|
|
bitfld.word 0x00 10. " PWMTRIP ,PWM Trip Interrupt Enabled" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " ENA ,Enable PWM Outputs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6.--8. " PWMCP ,PWM Clock Prescaler Bits" "Div by 2,Div by 4,Div by 8,Div by 16,Div by 32,Div by 64,Div by 128,Div by 256"
|
|
bitfld.word 0x00 5. " POINV ,Invert All PWM Outputs" "Normal,Inverted"
|
|
bitfld.word 0x00 4. " HOFF ,High Side Off" "Normal,PWM1/3 high PWM2/4 low "
|
|
textline " "
|
|
bitfld.word 0x00 3. " LCOMP ,Load Compare Regiseters" "Not loaded,Loaded"
|
|
sif (cpu()=="ADUC7023")
|
|
bitfld.word 0x00 2. " DIR ,Direction Control" "PWM0/1 output,PWM2/3 output"
|
|
elif (cpu()=="ADUC7121")
|
|
bitfld.word 0x00 2. " DIR ,Direction Control" "PWM3/4 output,PWM1/2 output"
|
|
elif (cpu()=="ADUC7124")
|
|
bitfld.word 0x00 2. " DIR ,Direction Control" "PWM0/2 output,PWM1/3 output"
|
|
else
|
|
bitfld.word 0x00 2. " DIR ,Direction Control" "PWM1/2 output,PWM3/4 output"
|
|
endif
|
|
bitfld.word 0x00 1. " HMODE ,Enables H-Bridge Mode" "Standard,H-Bridge"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PWMEN ,Enable All PWM Outputs" "Disabled,Enabled"
|
|
sif (cpu()!="ADUC7023")
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "PWMCON2,PWM Control 2 Register"
|
|
bitfld.word 0x00 7. " CSEN ,PWM Convert Start Signal" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " CSD ,Convert Start Delays" "4,8,12,16,20,24,28,32,36,40,44,48,52,56,60,64"
|
|
endif
|
|
sif (cpu()=="ADUC7023"||cpu()=="ADUC7124")
|
|
wgroup.word 0x38++0x01
|
|
line.word 0x00 "PWMCLRI,PWM Interrupt Clear Register"
|
|
group.word 0x10++0x01 "PWM0"
|
|
line.word 0x00 "PWM0LEN,Frequency Control for PWM 0 Register"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "PWM0COM0,PWM 0 Compare 0 Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "PWM0COM1,PWM 0 Compare 1 Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "PWM0COM2,PWM 0 Compare 2 Register"
|
|
group.word 0x20++0x01 "PWM1"
|
|
line.word 0x00 "PWM1LEN,Frequency Control for PWM 1 Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PWM1COM0,PWM 1 Compare 0 Register"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PWM1COM1,PWM 1 Compare 1 Register"
|
|
group.word 0x1c++0x01
|
|
line.word 0x00 "PWM1COM2,PWM 1 Compare 2 Register"
|
|
sif (cpu()=="ADUC7124")
|
|
group.word 0x30++0x01 "PWM2"
|
|
line.word 0x00 "PWM2LEN,Frequency Control for PWM 2 Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PWM2COM0,PWM 2 Compare 0 Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PWM2COM1,PWM 2 Compare 1 Register"
|
|
group.word 0x2c++0x01
|
|
line.word 0x00 "PWM2COM2,PWM 2 Compare 2 Register"
|
|
else
|
|
group.word 0x24++0x01 "PWM2"
|
|
line.word 0x00 "PWM2COM0,PWM 2 Compare 0 Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PWM2COM1,PWM 2 Compare 1 Register"
|
|
endif
|
|
else
|
|
wgroup.word 0x38++0x01
|
|
line.word 0x00 "PWMICLR,PWM Interrupt Clear Register"
|
|
group.word 0x10++0x01 "PWM1"
|
|
line.word 0x00 "PWM1LEN,Frequency Control for PWM 1 Register"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "PWM1COM1,PWM 1 Compare 1 Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "PWM1COM2,PWM 1 Compare 2 Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "PWM1COM3,PWM 1 Compare 3 Register"
|
|
group.word 0x20++0x01 "PWM2"
|
|
line.word 0x00 "PWM2LEN,Frequency Control for PWM 2 Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "PWM2COM1,PWM 2 Compare 1 Register"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "PWM2COM2,PWM 2 Compare 2 Register"
|
|
group.word 0x1c++0x01
|
|
line.word 0x00 "PWM2COM3,PWM 2 Compare 3 Register"
|
|
group.word 0x30++0x01 "PWM3"
|
|
line.word 0x00 "PWM3LEN,Frequency Control for PWM 3 Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "PWM3COM1,PWM 3 Compare 1 Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "PWM3COM2,PWM 3 Compare 2 Register"
|
|
group.word 0x2c++0x01
|
|
line.word 0x00 "PWM3COM3,PWM 3 Compare 3 Register"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="ADUC7128"||cpu()=="ADUC7129")
|
|
tree "Quadrature Encoder"
|
|
base ad:0xffff0f00
|
|
width 8.
|
|
if (((data.byte(ad:0xFFFF0F00))&0x40)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "QENCON,QEN Control Register"
|
|
bitfld.word 0x00 10. " FILTEN ,Enable Filtering on the S1 Pin" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " S2INV ,Invert the S2 Input" "Normal,Inverted"
|
|
bitfld.word 0x00 7. " S1INV ,Invert the S1 Input" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " DIRCON ,Direction Control" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " S1IRQEN ,S1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UIRQEN ,Underflow IRQ Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OIREQEN ,Overflow IRQ Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ENQEN ,Enable Quadrature Encoder" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "QENCON,QEN Control Register"
|
|
bitfld.word 0x00 10. " FILTEN ,Enable Filtering on the S1 Pin" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " S2INV ,Counter Direction" "Decrement,Increment"
|
|
bitfld.word 0x00 7. " S1INV ,Invert the S1 Input" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " DIRCON ,Direction Control" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " S1IRQEN ,S1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " UIRQEN ,Underflow IRQ Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OIREQEN ,Overflow IRQ Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ENQEN ,Enable Quadrature Encoder" "Disabled,Enabled"
|
|
endif
|
|
hgroup.byte 0x04++0x00
|
|
hide.byte 0x00 "QENSTA,QEN Status Register"
|
|
in
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "QENDAT,QEN Data Register"
|
|
rgroup.word 0x0c++0x01
|
|
line.word 0x00 "QENVAL,Current Value of the Quadrature Encoder Counter Register"
|
|
wgroup.byte 0x14++0x00
|
|
line.byte 0x00 "QENCLR,QEN Clear Register"
|
|
wgroup.byte 0x18++0x00
|
|
line.byte 0x00 "QENSET,QEN Set Register"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
textline ""
|