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Gen4_R-Car_Trace32/2_Trunk/per80331.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: tbd.
; @Props:
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chip:
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: per80331.per 15981 2023-04-17 07:25:16Z bschroefel $
config 16. 8.
width 8.
; --------------------------------------------------------------------------------
; 80200, 80219, 80321, IXP2400, IXP2800, PXA210, PXA250, PXA800F
tree "CP15"
; State: ok
; --------------------------------------------------------------------------------
; --------------------------------------------------------------------------------
; *** Intel 80200 ***
; --------------------------------------------------------------------------------
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80200,80200"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,C-0,D-0,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel 80219 ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xfffffff0)==0x69052e20||(d.l(c15:0x0)&0xfffffff0)==0x69052e30
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80219 (400MHz),80219 (600MHz)"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel 80321 or IOP321 (Verde) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80321 (400MHz),80321 (600MHz)"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,B-0,B-1,res,res,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel 80331 or IOP331 (Dobson) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054090
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80331,80331"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
; --------------------------------------------------------------------------------
; *** Intel 80332 or IOP332 ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054010
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "80332,80332"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-1/A-2,res,res,res,B-0,res,C-0,C-1,res,res,D-0,res,res,res,res,res"
; --------------------------------------------------------------------------------
; *** Intel PXA210 (Sabinal), PXA250 (Cotulla) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA250,PXA210"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,B-2,C-0,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel PXA27x (Bulverde) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA27x,PXA27x"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,A-1,B-0,B-1,C-0,res,res,C-5,res,?..."
; --------------------------------------------------------------------------------
; *** Intel IXP2400 (Sausolito), IXP2800 (Castine) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 12.--15. "CoreGen ,Core Generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x0 4.--7. "ProdNum ,Product Number" "res,res,res,res,res,res,res,res,res,IXP2400,IXP2800,res,res,res,res,res"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
; --------------------------------------------------------------------------------
; *** Intel PXA800F (Manitoba) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "PXA800F,PXA800F"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel IXP4xx, IXC1100 ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x690541f0
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP4xx/IXC1100,IXP4xx/IXC1100"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** Intel IXP455, IXP46x ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054200
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res"
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
bitfld.long 0x0 5.--5. "ProdNum ,Product Number" "IXP455/IXP46x,IXP455/IXP46x"
bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A-0,res,res,res,res,res,res,res,res,?..."
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
textline " "
bitfld.long 0x0 13.--13. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8"
textline " "
hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number"
hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel"
bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..."
textline " "
bitfld.long 0x0 12.--12. "CoreGen ,Core Generation" "XScale,XScale"
bitfld.long 0x0 8.--11. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
hexmask.long 0x0 4.--7. 1. "ProdNum ,Product Number"
hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision"
; --------------------------------------------------------------------------------
; *** any else ***
; --------------------------------------------------------------------------------
else
group c15:0x0--0x0
line.long 0x0 "ID,ID Register (read only)"
; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel
hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark"
hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number"
textline " "
hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code"
hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation"
textline " "
hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision"
endif
; --------------------------------------------------------------------------------
group c15:0x100--0x100
line.long 0x0 "CTYPE,Cache Type Register (read only)"
bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
textline " "
bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
textline " "
bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k"
bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
group c15:0x1--0x1
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 13. "V ,Exception Vector Relocation" "0x00000000,0xffff0000"
bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable"
bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable"
bitfld.long 0x0 9. " R ,ROM Protection" "off,on"
bitfld.long 0x0 8. " S ,System Protection" "off,on"
textline " "
bitfld.long 0x0 7. "B ,Endianism" "little,big"
bitfld.long 0x0 2. " C ,Data Cache" "disable,enable"
bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable"
bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable"
group c15:0x101--0x101
line.long 0x0 "AuxCR,Auxiliary Control Register"
bitfld.long 0x0 4.--5. "MD ,Mini Data Cache Attributes" "write back - read allocate,write back - read/write allocate,write through - read allocate,unpredictable"
bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1"
bitfld.long 0x0 0. " K ,Write Buffer Coalescing Disable" "enable,disable"
group c15:0x2--0x2
line.long 0x0 "TTB,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address"
group c15:0x3--0x3
line.long 0x0 "DAC,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager"
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager"
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager"
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager"
textline " "
bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager"
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager"
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager"
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager"
textline " "
bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager"
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager"
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager"
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager"
textline " "
bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager"
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager"
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager"
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager"
group c15:0x5--0x5
line.long 0x0 "FSR,Fault Status Register"
bitfld.long 0x0 10. "X ,Status Field Extension" "0,1"
bitfld.long 0x0 9. " D ,Debug event" "no,yes"
bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page"
group c15:0x6--0x6
line.long 0x0 "FAR,Fault Address Registerr"
group c15:0x29--0x29
line.long 0x0 "DCLR, Data Cache Lock Register"
bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock"
group c15:0xd--0xd
line.long 0x0 "PID,Process Identifier"
hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier"
group c15:0x8e--0x8e
line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0"
hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
group c15:0x9e--0x9e
line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1"
hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA"
bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable"
group c15:0x0e--0x0e
line.long 0x0 "DBR0,Data Breakpoint Register 0"
group c15:0x3e--0x3e
line.long 0x0 "DBR1,Data Breakpoint Register 1"
group c15:0x4e--0x4e
line.long 0x0 "DBCON,Data Breakpoint Configuration Register"
bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask"
bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load"
bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load"
; --------------------------------------------------------------------------------
; *** Intel 80200 ***
; --------------------------------------------------------------------------------
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel 80219 ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xfffffff0)==0x69052e20||(d.l(c15:0x0)&0xffffe3f0)==0x69052e30
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel 80321 (IOP321) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel PXA27x (Bulverde) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054110
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 1. "CP1 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel (Manitoba) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed"
bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; *** includes XScale IXP425, because no product ID is available now ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
; *** any else ***
; --------------------------------------------------------------------------------
else
group c15:0x1f--0x1f
line.long 0x0 "CPAR,Coprocessor Access Register"
bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed"
; --------------------------------------------------------------------------------
endif
tree.end
; --------------------------------------------------------------------------------
; 80200, PXA210, PXA250
; not impl.: 80321, IXP425, IXP2400, IXP2800, Bulverde, Manitoba
tree "CP14"
; State: preliminary
; --------------------------------------------------------------------------------
group c14:0x00--0x03 "Performance Monitoring"
line.long 4.*0x00 "PMNC, Performance Monitor control Register"
bitfld.long 4.*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
bitfld.long 4.*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..."
textline " "
bitfld.long 4.*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes"
bitfld.long 4.*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes"
bitfld.long 4.*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes"
textline " "
bitfld.long 4.*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable"
bitfld.long 4.*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable"
bitfld.long 4.*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable"
textline " "
bitfld.long 4.*0x00 3. "D ,Clock Count Divider" "1,64"
bitfld.long 4.*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0"
bitfld.long 4.*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0"
bitfld.long 4.*0x00 0. " E ,Enable all 3 Counters" "disable,enable"
line.long 4.*0x01 "CCNT, 32-bit clock counter"
line.long 4.*0x02 "PMN0, 32-bit event counter"
line.long 4.*0x03 "PMN1, 32-bit event counter"
; --------------------------------------------------------------------------------
; *** Intel 80200 ***
; --------------------------------------------------------------------------------
if (d.l(c15:0x0)&0xffffe3f0)==0x69052000
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
bitfld.long 4.*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,?..."
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP"
; --------------------------------------------------------------------------------
; *** Intel 80321 or IOP321 (Verde) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** Intel PXA210, PXA250 (Sabinal, Cotulla) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
bitfld.long 4.*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter"
bitfld.long 4.*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep"
; --------------------------------------------------------------------------------
; *** Intel (Bulverde) ***
; --------------------------------------------------------------------------------
; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!)
elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** Intel IXP2400, IXP2800 (Sausolito, Castine) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** Intel (Manitoba) ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69052000
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** other Intel XScale V5TE ***
; *** includes XScale IXP425 ***
; --------------------------------------------------------------------------------
elif (d.l(c15:0x0)&0xffffe000)==0x69054000
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
; --------------------------------------------------------------------------------
; *** any other XScale ***
; --------------------------------------------------------------------------------
else
group c14:0x06--0x07 "Clock and Power Management"
line.long 4.*0x00 "CCLKCFG,Core Clock Configuration Register"
line.long 4.*0x01 "PWRMODE,Power Management Register"
bitfld.long 4.*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP"
endif
group c14:0x08--0x0d "Software Debug"
line.long 4.*0x02 "DCSR,Debug Control and Status Register"
bitfld.long 4.*0x02 31. "GE ,Global Enable" "disable,enable"
bitfld.long 4.*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode"
textline " "
bitfld.long 4.*0x02 23. "TF ,Trap FIQ" "disable,enable"
bitfld.long 4.*0x02 22. " TI ,Trap IRQ" "disable,enable"
bitfld.long 4.*0x02 20. " TD ,Trap Data Abort" "disable,enable"
textline " "
bitfld.long 4.*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable"
bitfld.long 4.*0x02 18. " TS ,Trap Software Interrupt" "disable,enable"
bitfld.long 4.*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable"
bitfld.long 4.*0x02 16. " TR ,Trap Reset" "disable,enable"
textline " "
bitfld.long 4.*0x02 5. "SA ,Sticky Abort" "no,yes"
bitfld.long 4.*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved"
bitfld.long 4.*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once"
bitfld.long 4.*0x02 0. " E ,Trace Buffer Enable" "no,yes"
line.long 4.*0x04 "CHKPT0,Checkpoint 0 Register"
line.long 4.*0x05 "CHKPT1,Checkpoint 1 Register"
tree.end
width 12.
;%include 80331/pci.ph
; --------------------------------------------------------------------------------
; 80331
; State: preliminary,gfz
; --------------------------------------------------------------------------------
tree "Address Translation Unit"
; --------------------------------------------------------------------------------
width 12.
group asd:0xFFFFE100++0x01
line.word 0x00 "ATUVID,ATU Vendor ID Register"
group asd:0xFFFFE102++0x01
line.word 0x00 "ATUDID,ATU Device ID Register"
group asd:0xFFFFE104++0x01
line.word 0x00 "ATUCMD,ATU Command Register"
bitfld.word 0x00 10. " IntD ,Interrupt Disable" "ena,dis"
bitfld.word 0x00 9.--9. " FBtB ,Fast Back-to-Back Enable" "dis,ena"
bitfld.word 0x00 8.--8. " SERR# ,SERR# Enable" "no,yes"
bitfld.word 0x00 7.--7. " A/DSC ,Address/Data Stepping Control" "no,yes"
bitfld.word 0x00 6.--6. " PER ,Parity Error Response" "dis,ena"
bitfld.word 0x00 5.--5. " VGASnp ,VGA Palette Snoop Enable" "dis,ena"
textline " "
bitfld.word 0x00 4.--4. "MWI ,Memory Write and Invalidate Enable" "dis,ena"
bitfld.word 0x00 3.--3. " SpCyc ,Special Cycle Enable" "dis,ena"
bitfld.word 0x00 2.--2. " BM ,Bus Master Enable" "dis,ena"
bitfld.word 0x00 1.--1. " Mem ,Memory Enable" "dis,ena"
bitfld.word 0x00 0.--0. " I/OSE ,I/O Space Enable" "dis,ena"
group asd:0xFFFFE106++0x01
line.word 0x00 "ATUSR,ATU Status Register"
bitfld.word 0x00 15.--15. " DPE ,Detected Parity Error" "no,yes"
bitfld.word 0x00 14.--14. " PSERR ,P_SERR# Asserted" "no,yes"
bitfld.word 0x00 13.--13. " MA ,Master Abort" "no,yes"
bitfld.word 0x00 12.--12. " TAM ,Target Abort(Master)" "no,yes"
bitfld.word 0x00 11.--11. " TAT ,Target Abort(Target)" "no,yes"
textline " "
bitfld.word 0x00 9.--10. "DEVT ,DEVSEL# Timing" "fast,med,slow,es"
bitfld.word 0x00 8.--8. " MPE ,Master Parity Error" "no,yes"
bitfld.word 0x00 7.--7. " FBtB ,Fast Back-to-Back Enable" "dis,ena"
bitfld.word 0x00 6.--6. " UDF ,UDF Supported" "no,yes"
bitfld.word 0x00 5.--5. " 66MHz ,66 MHz Supported" "no,yes"
textline " "
bitfld.word 0x00 4.--4. " Cap ,Implements extended Capabilities" "no,yes"
bitfld.word 0x00 3.--3. " IntS ,Interrupt Status" "deasst,asst"
group asd:0xFFFFE108++0x00
line.byte 0x00 "ATURID,ATU Revision ID Register"
group asd:0xFFFFE109++0x02
line.tbyte 0x00 "ATUCCR,ATU Class Code Register"
hexmask.tbyte 0x00 16.--23. 0x01 " BC ,Base Class"
hexmask.tbyte 0x00 8.--15. 0x01 " SC ,Sub Class"
hexmask.tbyte 0x00 0.--7. 0x01 " PI ,Programming Interface"
group asd:0xFFFFE10c++0x00
line.byte 0x00 "ATUCLSR,ATU Cacheline Size Register"
group asd:0xFFFFE10d++0x00
line.byte 0x00 "ATULT,ATU Latency Timer Register"
hexmask.byte 0x00 3.--7. 0x01 " Lat ,Programming Latency Timer"
hexmask.byte 0x00 0.--2. 0x01 " Gran ,Latency Timer Granularity"
group asd:0xFFFFE10e++0x00
line.byte 0x00 "ATUHTR,ATU Header Type Register"
bitfld.byte 0x00 7.--7. " Dev ,Single Function/Multi Function Device" "Sgl,Mul"
hexmask.byte 0x00 0.--6. 0x01 " HD ,PCI Header Type"
group asd:0xFFFFE10f++0x00
line.byte 0x00 "ATUBISTR,ATU BIST Register"
bitfld.byte 0x00 7. " BISTC ,BIST Capable" "0,1"
bitfld.byte 0x00 6. " SBIST ,Start BIST" "no,yes"
bitfld.byte 0x00 0.--3. " Code ,BIST Completion Code" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xFFFFE110++0x03
line.long 0x00 "IABAR0,Inbound ATU Base Address Register 0"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Translation Base Address 0"
bitfld.long 0x00 3.--3. " Preft ,Prefetch Indicator" "no,yes"
bitfld.long 0x00 1.--2. " Type ,Type Indicator" "32b,res,64b,res"
bitfld.long 0x00 0.--0. " Mem ,Memory Space Indicator" "Mem,I/O"
group asd:0xFFFFE114++0x03
line.long 0x00 "IAUBAR0,Inbound ATU Upper Base Address Register 0"
group asd:0xFFFFE118++0x03
line.long 0x00 "IABAR1,Inbound ATU Base Address Register 1"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Translation Base Address 0"
bitfld.long 0x00 3.--3. " Preft ,Prefetch Indicator" "no,yes"
bitfld.long 0x00 1.--2. " Type ,Type Indicator" "32b,res,64b,res"
bitfld.long 0x00 0.--0. " Mem ,Memory Space Indicator" "Mem,I/O"
group asd:0xFFFFE11c++0x03
line.long 0x00 "IAUBAR1,Inbound ATU Upper Base Address Register 1"
group asd:0xFFFFE120++0x03
line.long 0x00 "IABAR2,Inbound ATU Base Address Register 2"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Translation Base Address 0"
bitfld.long 0x00 3.--3. " Preft ,Prefetch Indicator" "no,yes"
bitfld.long 0x00 1.--2. " Type ,Type Indicator" "32b,res,64b,res"
bitfld.long 0x00 0.--0. " Mem ,Memory Space Indicator" "Mem,I/O"
group asd:0xFFFFE124++0x03
line.long 0x00 "IAUBAR2,Inbound ATU Upper Base Address Register 2"
group asd:0xFFFFE12c++0x03
line.word 0x00 "ASVIR,ATU Subsystem Vendor ID Register"
line.word 0x02 "ASIR,ATU Subsystem ID Register"
group asd:0xFFFFE130++0x03
line.long 0x00 "ERBAR,Expansion ROM Base Address Register"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Expansion ROM Base Address"
bitfld.long 0x00 0.--0. " Dec ,Address Decode Enable" "dis,ena"
group asd:0xFFFFE134++0x00
line.byte 0x00 "ATU_Cap_Ptr,ATU Capability Pointer Register"
group asd:0xFFFFE13c++0x00
line.byte 0x00 "ATUILR,ATU Interrupt Line Register"
group asd:0xFFFFE13d++0x00
line.byte 0x00 "ATUIPR,ATU Interrupt Pin Register"
group asd:0xFFFFE13e++0x00
line.byte 0x00 "ATUMGNT,ATU Minimum Grant Register"
group asd:0xFFFFE13f++0x00
line.byte 0x00 "ATUMLAT,ATU Maximum Latency Register"
group asd:0xFFFFE140++0x07
line.long 0x00 "IALR0,Inbound ATU Limit Register 0"
hexmask.long 0x00 12.--31. 0x1000 " Lim0 ,Inbound Translation Limit 0"
line.long 0x04 "IATVR0,Inbound ATU Translate Value Register 0"
hexmask.long 0x04 12.--31. 0x1000 " Val0 ,Inbound ATU Translation Value 0"
group asd:0xFFFFE148++0x03
line.long 0x00 "ERLR,Expansion ROM Limit Register"
hexmask.long 0x00 12.--31. 0x1000 " Lim ,Expansion ROM Limit"
group asd:0xFFFFE14c++0x03
line.long 0x00 "ERTVR,Expansion ROM Translate Value Register"
hexmask.long 0x00 12.--31. 0x1000 " Val ,Expansion ROM Translation Value"
group asd:0xFFFFE150++0x03
line.long 0x00 "IALR1,Inbound ATU Limit Register 1"
hexmask.long 0x00 12.--31. 0x1000 " Lim1 ,Inbound Translation Limit 1"
group asd:0xFFFFE154++0x03
line.long 0x00 "IALR2,Inbound ATU Limit Register 2"
hexmask.long 0x00 12.--31. 0x1000 " Lim2 ,Inbound Translation Limit 2"
group asd:0xFFFFE158++0x03
line.long 0x00 "IATVR2,Inbound ATU Translate Value Register 2"
hexmask.long 0x00 12.--31. 0x1000 " Lim2 ,Inbound ATU Translation Value 2"
group asd:0xFFFFE15c++0x03
line.long 0x00 "OIOWTVR,Outbound I/O Window Translate Value Register"
hexmask.long 0x00 16.--31. 0x1000 " Val ,Outbound I/O Window Translate Value"
group asd:0xFFFFE160++0x03
line.long 0x00 "OMWTVR0,Outbound Memory Window Translate Value Register 0"
hexmask.long 0x00 26.--31. 1. " Val ,Outbound MW Translate Value"
bitfld.long 0x00 0.--1. " BO ,Burst Order" "00,01,10,11"
group asd:0xFFFFE164++0x03
line.long 0x00 "OUMWTVR0,Outbound Upper 32-bit Memory Window Translate Value Register 0"
group asd:0xFFFFE168++0x03
line.long 0x00 "OMWTVR1,Outbound Memory Window Translate Value Register 1"
hexmask.long 0x00 26.--31. 1. " Val ,Outbound MW Translate Value"
bitfld.long 0x00 0.--1. " BO ,Burst Order" "00,01,10,11"
group asd:0xFFFFE16c++0x03
line.long 0x00 "OUMWTVR1,Outbound Upper 32-bit Memory Window Translate Value Register 1"
group asd:0xFFFFE178++0x03
line.long 0x00 "OUDWTVR,Outbound Upper 32-bit Direct Window Translate Value Register"
group asd:0xFFFFE180++0x03
line.long 0x00 "ATUCR,ATU Configuration Register"
bitfld.long 0x00 19. " ADA ,ATU DRC Alias" "no,yes"
bitfld.long 0x00 18. " En ,Direct Addressing Upper 2Gbytes Translation Enable" "dis,ena"
bitfld.long 0x00 16. " SMA ,SERR# Manual Assertion" "no,yes "
bitfld.long 0x00 15. " ADTS ,ATU Discard Timer Status" "NoTmExp,TmExp"
bitfld.long 0x00 09. " SDIE ,SERR# Detected Interrupt Enable" "dis,ena"
bitfld.long 0x00 08. " DAE ,Direct Addressing Enable" "dis,ena"
bitfld.long 0x00 03. " ABIE ,ATU BIST Interrupt Enable" "dis,ena"
bitfld.long 0x00 01. " OAE ,Outbound ATU Enable" "dis,ena"
group asd:0xFFFFE184++0x03
line.long 0x00 "PCSR,PCI Configuration and Status Register"
bitfld.long 0x00 18. " Err ,Detected Address or Attribute Parity Error" "no,yes"
bitfld.long 0x00 16.--17. " Cap ,PCI-X capability" "PCI,66,100,133"
bitfld.long 0x00 15. " OTQB ,Outbound Transaction Queue Busy" "empt,busy"
bitfld.long 0x00 14. " ITQB ,Inbound Transaction Queue Busy" "empt,busy"
bitfld.long 0x00 12. " Val ,Discard Timer Value" "2^15clk,2^10clk"
bitfld.long 0x00 10. " 66Mhz ,Bus Operating at 66 MHz" "33MHz,66MHz"
bitfld.long 0x00 08. " 64B ,PCI Bus 64-Bit Capable" "64bit,32bit"
textline " "
bitfld.long 0x00 05. " RIB ,Reset Internal Bus" "0,1 "
bitfld.long 0x00 04. " BMIE ,Bus Master Indicator Enable" "dis,ena"
bitfld.long 0x00 03. " PDE ,Private Device Enable" "dis,ena"
bitfld.long 0x00 02. " CCR ,Configuration Cycle Retry" "no,yes "
bitfld.long 0x00 01. " CPR ,Core Processor Reset" "no,yes"
bitfld.long 0x00 00. " PME ,Private Memory Enable" "Dis,ena"
group asd:0xFFFFE188++0x03
line.long 0x00 "ATUISR ,ATU Interrupt Status Register"
bitfld.long 0x00 17. " VARUpdt ,VPD Address Register Updated" "no,yes"
bitfld.long 0x00 15. " ACW ,ATU Configuration Write" "no,yes"
bitfld.long 0x00 14. " AIMUpdt ,ATU Inbound Memory Window 1 Base Updated" "no,yes"
bitfld.long 0x00 13. " ISCEM ,Initiated Split Completion Error Message" "no,yes"
bitfld.long 0x00 12. " RSCEM ,Received Split Completion Error Message" "no,yes"
bitfld.long 0x00 11. " PST ,Power State Transition" "no,yes"
bitfld.long 0x00 10. " PA ,P_SERR# Asserted" "no,yes"
bitfld.long 0x00 09. " DPE ,Detected Parity Error" "no,yes"
textline " "
bitfld.long 0x00 08. " ABInt ,ATU BIST Interrupt" "no,yes"
bitfld.long 0x00 07. " IBMA ,Internal Bus Master Abort" "no,yes"
bitfld.long 0x00 04. " PD ,P_SERR# Detected" "no,yes"
bitfld.long 0x00 03. " PMA ,PCI Master Abort" "no,yes"
bitfld.long 0x00 02. " PTAM ,PCI Target Abort (master)" "no,yes"
bitfld.long 0x00 01. " PTAT ,PCI Target Abort (target)" "no,yes"
bitfld.long 0x00 00. " PMPE ,PCI Master Parity Error" "no,yes"
group asd:0xFFFFE18c++0x03
line.long 0x00 "ATUIMR,ATU Interrupt Mask Register"
bitfld.long 0x00 14. " VARUM ,VPD Address Register Updated Mask" "no,yes"
bitfld.long 0x00 12. " CRWM ,Configuration Register Write Mask" "no,yes"
bitfld.long 0x00 11. " AIMWUM ,ATU Inbound Memory Window 1 Base Updated Mask" "no,yes"
bitfld.long 0x00 10. " ISCEMIM ,Initiated Split Completion Error Message Interrupt Mask" "no,yes"
bitfld.long 0x00 09. " RSCEMIM ,Received Split Completion Error Message Interrupt Mask" "no,yes"
bitfld.long 0x00 08. " PSTIM ,Power State Transition Interrupt Mask" "no,yes"
bitfld.long 0x00 07. " ADPEIM ,ATU Detected Parity Error Interrupt Mask" "no,yes"
textline " "
bitfld.long 0x00 06. " ASAIM ,ATU SERR# Asserted Interrupt Mask" "no,yes"
bitfld.long 0x00 05. " APMAIM ,ATU PCI Master Abort Interrupt Mask" "no,yes"
bitfld.long 0x00 04. " APTAMIM ,ATU PCI Target Abort (Master) Interrupt Mask" "no,yes"
bitfld.long 0x00 03. " APTATIM ,ATU PCI Target Abort (Target) Interrupt Mask" "no,yes"
bitfld.long 0x00 02. " APMPEIM ,ATU PCI Master Parity Error Interrupt Mask" "no,yes"
bitfld.long 0x00 01. " AIESE ,ATU Inbound Error SERR# Enable" "dis,ena"
bitfld.long 0x00 00. " AETAE ,ATU ECC Target Abort Enable" "dis,ena"
group asd:0xFFFFE190++0x03
line.long 0x00 "IABAR3,Inbound ATU Base Address Register 3"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Translation Base Address 0"
bitfld.long 0x00 3.--3. " Preft ,Prefetch Indicator" "no,yes"
bitfld.long 0x00 1.--2. " Type ,Type Indicator" "32b,res,64b,res"
bitfld.long 0x00 0.--0. " Mem ,Memory Space Indicator" "Mem,I/O"
group asd:0xFFFFE194++0x03
line.long 0x00 "IAUBAR3,Inbound ATU Upper Base Address Register 3"
group asd:0xFFFFE198++0x03
line.long 0x00 "IALR3,Inbound ATU Limit Register 3"
hexmask.long 0x00 12.--31. 1. " Lim3 ,Inbound Translation Limit 3"
group asd:0xFFFFE19c++0x03
line.long 0x00 "IATVR3,Inbound ATU Translate Value Register 3"
hexmask.long 0x00 12.--31. 1. " Val3 ,Inbound ATU Translation Value 3"
group asd:0xFFFFE1a4++0x03
line.long 0x00 "OCCAR,Outbound Configuration Cycle Address Register"
group asd:0xFFFFE1ac++0x03
line.long 0x00 "OCCDR,Outbound Configuration Cycle Data Register"
group asd:0xFFFFE1b8++0x0
line.byte 0x00 "VPD_CAPID,VPD Capability Identifier Register"
group asd:0xFFFFE1b9++0x0
line.byte 0x00 "VPD_NXTP,VPD Next Item Pointer Register"
group asd:0xFFFFE1ba++0x1
line.word 0x00 "VPD_AR,VPD Address Register"
bitfld.word 0x00 15. " Flag ," "0,1"
hexmask.word 0x00 0.--14. 1. " VA ,VPD Address"
group asd:0xFFFFE1bc++0x3
line.long 0x00 "VPD_DR ,VPD Data Register"
group asd:0xFFFFE1c0++0x0
line.byte 0x00 "PM_CAPID,Power Management Capability Identifier Register"
group asd:0xFFFFE1c1++0x0
line.byte 0x00 "PM_NXTP,Power Management Next Item Pointer Register"
group asd:0xFFFFE1c2++0x1
line.word 0x00 "PM_CAP,Power Management Capabilities Register"
hexmask.word 0x00 11.--15. 1. " PMES ,PME_Support"
bitfld.word 0x00 10. " D2S ,D2_Support" "no,yes"
bitfld.word 0x00 09. " D1S ,D1_Support" "no,yes"
bitfld.word 0x00 6.--8. " AC ,Aux_Current" "000,001,010,011,100,101,110,111"
bitfld.word 0x00 5. " DSI ," "0,1"
bitfld.word 0x00 3. " PC ,PME Clock" "0,1"
bitfld.word 0x00 0.--2. " Ver ,Version" "000,001,010,011,100,101,110,111"
group asd:0xFFFFE1c4++0x1
line.word 0x00 "PM_CSR,Power Management Control/Status Register"
bitfld.word 0x00 15. " PS ,PME_Status" "0,1"
bitfld.word 0x00 08. " PME_En ,PME Enable" "dis,ena"
bitfld.word 0x00 0.--1. " PS ,Power State" "D0,D1,D2,D3hot"
;textline "MSI Capability Registers are defined in the Messaging Unit"
group asd:0xFFFFE1e0++0x0
line.byte 0x00 "PX_CAPID,PCI-X_Capability Identifier Register"
group asd:0xFFFFE1e1++0x0
line.byte 0x00 "PX_NXTP,PCI-X Next Item Pointer Register"
group asd:0xFFFFE1e2++0x1
line.word 0x00 "PX_CMD,PCI-X Command Register"
bitfld.word 0x00 4.--6. " MOST ,Maximum Outstanding Split Transactions" "1,2,3,4,8,12,16,32"
bitfld.word 0x00 2.--3. " MMRBC ,Maximum Memory Read Byte Count" "512,1024,2048,4096"
bitfld.word 0x00 1. " ROEn ,Enable Relaxed Ordering" "dis,ena"
bitfld.word 0x00 0. " DPERE ,Data Parity Error Recovery Enable" "dis,ena"
group asd:0xFFFFE1e4++0x3
line.long 0x00 "PX_SR,PCI-X Status Register"
bitfld.long 0x00 29. " RSCEM ,Received Split Completion Error Message" "no,yes"
bitfld.long 0x00 26.--28. " DMCRS ,Designed Maximum Cumulative Read Size" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. " DMOST ,Designed Maximum Outstanding Split Transactions" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 21.--22. " DMMRBC ,Designed Maximum Memory Read Byte Count" "0,1,2,3"
bitfld.long 0x00 20. " Comp ,80331 is a complex device" "1,?..."
bitfld.long 0x00 19. " USC ,Unexpected Split Completion" "no,yes"
textline " "
bitfld.long 0x00 18. " SCD ,Split Completion Discarded" "no,yes"
bitfld.long 0x00 17. " 133MHz ,80331 is a 133 MHz capable device" "no,yes"
bitfld.long 0x00 16. " 64bit ,64-bit interface on the secondary PCI bus" "no,yes"
hexmask.long 0x00 8.--15. 1. " BN ,Bus Number"
hexmask.long 0x00 3.--7. 1. " DN ,Device Number"
bitfld.long 0x00 0.--2. " FN ,Function Number" "0,1,2,3,4,5,6,7"
group asd:0xFFFFE1EC++0x3
line.long 0x00 "PIRSR,PCI Interrupt Routing Select Register"
bitfld.long 0x00 3. " XINT3# ,XINT3# Select Bit(Interrupt routed to which pin)" "P_INTD#,XINT3#"
bitfld.long 0x00 2. " XINT2# ,XINT3# Select Bit(Interrupt routed to which pin)" "P_INTC#,XINT2#"
bitfld.long 0x00 1. " XINT1# ,XINT3# Select Bit(Interrupt routed to which pin)" "P_INTB#,XINT1#"
bitfld.long 0x00 0. " XINT0# ,XINT3# Select Bit(Interrupt routed to which pin)" "P_INTA#,XINT0#"
group asd:0xFFFFF5C0++0x3
line.long 0x00 "SPDSCR,Secondary PCIDrive Strength Control Register"
bitfld.long 0x00 31. " OE ,Overdrive Enable" "dis,ena"
hexmask.long 0x00 8.--13. 1. " PUDS ,Pull-up Drive Strength"
hexmask.long 0x00 0.--5. 1. " PDDS ,Pull-Down Drive Strength"
group asd:0xFFFFF5C8++0x3
line.long 0x00 "PPDSCR,Primary PCIDrive Strength Control Register"
bitfld.long 0x00 31. " OE ,Overdrive Enable" "dis,ena"
hexmask.long 0x00 8.--13. 1. " PUDS ,Pull-up Drive Strength"
hexmask.long 0x00 0.--5. 1. " PDDS ,Pull-Down Drive Strength"
width 8.
tree.end
; --------------------------------------------------------------------------------
; 80312, 80321
; State: ok
;
; Messaging Unit
;
; 0xFFFFE000 Base Address
; 80331. Chip Identification
;
; --------------------------------------------------------------------------------
tree "Messaging Unit"
; --------------------------------------------------------------------------------
group asd:(0xFFFFE000+0x310)++0x07
line.long 0x00 "IMR0,Inbound Message Register"
line.long 0x04 "IMR1,Inbound Message Register"
group asd:(0xFFFFE000+0x318)++0x07
line.long 0x00 "OMR0,Outbound Message Register"
line.long 0x04 "OMR1,Outbound Message Register"
; *** 80321 ***
if (80331.==80321.)||(80331.==80331.)
group asd:(0xFFFFE000+0x320)++0x0b
line.long 0x00 "IDR,Inbound Doorbell Register"
bitfld.long 0x00 31.--31. " ErrInt ,Error Interrupt" "no,yes"
hexmask.long 0x00 0.--30. 0x01 " NorInt ,Normal Interrupt"
line.long 0x04 "IISR,Inbound Interrupt Status Register"
bitfld.long 0x04 6.--6. " IdxReg ,Index Register Interrupt" "no,yes"
bitfld.long 0x04 5.--5. " OFull ,Outbound Free Queue Full Interrupt" "no,yes"
bitfld.long 0x04 4.--4. " IPost ,Inbound Post Queue Interrupt" "no,yes"
bitfld.long 0x04 3.--3. " EDoor ,Error Doorbell Interrupt" "no,yes"
bitfld.long 0x04 2.--2. " IDoor ,Inbound Doorbell Interrupt" "no,yes"
textline " "
bitfld.long 0x04 1.--1. "Msg1 ,Inbound Message 1 Interrupt" "no,yes"
bitfld.long 0x04 0.--0. " Msg0 ,Inbound Message 0 Interrupt" "no,yes"
line.long 0x08 "IIMR,Inbound Interrupt Mask Register"
bitfld.long 0x08 6.--6. " IdxReg ,Index Register Interrupt Mask" "no,yes"
bitfld.long 0x08 5.--5. " OFull ,Outbound Free Queue Full Interrupt Mask" "no,yes"
bitfld.long 0x08 4.--4. " IPost ,Inbound Post Queue Interrupt Mask" "no,yes"
bitfld.long 0x08 3.--3. " EDoor ,Error Doorbell Interrupt Mask" "no,yes"
bitfld.long 0x08 2.--2. " IDoor ,Inbound Doorbell Interrupt Mask" "no,yes"
textline " "
bitfld.long 0x08 1.--1. "Msg1 ,Inbound Message 1 Interrupt Mask" "no,yes"
bitfld.long 0x08 0.--0. " Msg0 ,Inbound Message 0 Interrupt Mask" "no,yes"
; *** 80312 ***
elif (80331.==80312.)
group asd:(0xFFFFE000+0x320)++0x0b
line.long 0x00 "IDR,Inbound Doorbell Register"
bitfld.long 0x00 31.--31. " IRQ# ,IRQ# Interrupt" "no,yes"
hexmask.long 0x00 0.--30. 0x01 " FIQ# ,FIQ# Interrupt"
line.long 0x04 "IISR,Inbound Interrupt Status Register"
bitfld.long 0x04 6.--6. " IdxReg ,Index Register Interrupt" "no,yes"
bitfld.long 0x04 5.--5. " OFull ,Outbound Free Queue Full Interrupt" "no,yes"
bitfld.long 0x04 4.--4. " IPost ,Inbound Post Queue Interrupt" "no,yes"
bitfld.long 0x04 3.--3. " IRQDoor ,IRQ Doorbell Interrupt" "no,yes"
bitfld.long 0x04 2.--2. " IDoor ,Inbound Doorbell Interrupt" "no,yes"
textline " "
bitfld.long 0x04 1.--1. " Msg1 ,Inbound Message 1 Interrupt" "no,yes"
bitfld.long 0x04 0.--0. " Msg0 ,Inbound Message 0 Interrupt" "no,yes"
line.long 0x08 "IIMR,Inbound Interrupt Mask Register"
bitfld.long 0x08 6.--6. " IdxReg ,Index Register Interrupt Mask" "no,yes"
bitfld.long 0x08 5.--5. " OFull ,Outbound Free Queue Full Interrupt Mask" "no,yes"
bitfld.long 0x08 4.--4. " IPost ,Inbound Post Queue Interrupt Mask" "no,yes"
bitfld.long 0x08 3.--3. " IRQDoor ,IRQ Doorbell Interrupt Mask" "no,yes"
bitfld.long 0x08 2.--2. " IDoor ,Inbound Doorbell Interrupt Mask" "no,yes"
textline " "
bitfld.long 0x08 1.--1. " Msg1 ,Inbound Message 1 Interrupt Mask" "no,yes"
bitfld.long 0x08 0.--0. " Msg0 ,Inbound Message 0 Interrupt Mask" "no,yes"
endif
; *** 80321 ***
if (80331.==80321.)||(80331.==80331.)
group asd:(0xFFFFE000+0x32c)++0x0b
line.long 0x00 "ODR,Outbound Doorbell Register"
bitfld.long 0x00 28.--28. " PCI-A ,PCI Interrupt A" "no,yes"
hexmask.long 0x00 0.--27. 0x01 " SW ,Software Interrupt"
line.long 0x04 "OISR,Outbound Interrupt Status Register"
bitfld.long 0x04 4.--4. " PCI-A ,PCI Interrupt A" "no,yes"
bitfld.long 0x04 3.--3. " OPost ,Outbound Post Queue Interrupt" "no,yes"
bitfld.long 0x04 2.--2. " ODoor ,Outbound Doorbell Interrupt" "no,yes"
bitfld.long 0x04 1.--1. "Msg1 ,Outbound Message 1 Interrupt" "no,yes"
bitfld.long 0x04 0.--0. " Msg0 ,Outbound Message 0 Interrupt" "no,yes"
line.long 0x08 "OIMR,Outbound Interrupt Mask Register"
bitfld.long 0x08 4.--4. " PCI-A ,PCI Interrupt A Mask" "no,yes"
bitfld.long 0x08 3.--3. " OPost ,Outbound Post Queue Interrupt Mask" "no,yes"
bitfld.long 0x08 2.--2. " ODoor ,Outbound Doorbell Interrupt Mask" "no,yes"
bitfld.long 0x08 1.--1. "Msg1 ,Outbound Message 1 Interrupt Mask" "no,yes"
bitfld.long 0x08 0.--0. " Msg0 ,Outbound Message 0 Interrupt Mask" "no,yes"
; *** 80312 ***
elif (80331.==80312.)
group asd:(0xFFFFE000+0x32c)++0x0b
line.long 0x00 "ODR,Outbound Doorbell Register"
bitfld.long 0x00 31.--31. " PCI-D ,PCI Interrupt D" "no,yes"
bitfld.long 0x00 30.--30. " PCI-C ,PCI Interrupt C" "no,yes"
bitfld.long 0x00 29.--29. " PCI-B ,PCI Interrupt B" "no,yes"
bitfld.long 0x00 28.--28. " PCI-A ,PCI Interrupt A" "no,yes"
hexmask.long 0x00 0.--27. 0x01 " SW ,Software Interrupt"
line.long 0x04 "OISR,Outbound Interrupt Status Register"
bitfld.long 0x04 7.--7. " PCI-D ,PCI Interrupt D" "no,yes"
bitfld.long 0x04 6.--6. " PCI-C ,PCI Interrupt C" "no,yes"
bitfld.long 0x04 5.--5. " PCI-B ,PCI Interrupt B" "no,yes"
bitfld.long 0x04 4.--4. " PCI-A ,PCI Interrupt A" "no,yes"
bitfld.long 0x04 3.--3. " OPost ,Outbound Post Queue Interrupt" "no,yes"
textline " "
bitfld.long 0x04 2.--2. " ODoor ,Outbound Doorbell Interrupt" "no,yes"
bitfld.long 0x04 1.--1. " Msg1 ,Outbound Message 1 Interrupt" "no,yes"
bitfld.long 0x04 0.--0. " Msg0 ,Outbound Message 0 Interrupt" "no,yes"
line.long 0x08 "OIMR,Outbound Interrupt Mask Register"
bitfld.long 0x08 7.--7. " PCI-D ,PCI Interrupt D Mask" "no,yes"
bitfld.long 0x08 6.--6. " PCI-C ,PCI Interrupt C Mask" "no,yes"
bitfld.long 0x08 5.--5. " PCI-B ,PCI Interrupt B Mask" "no,yes"
bitfld.long 0x08 4.--4. " PCI-A ,PCI Interrupt A Mask" "no,yes"
bitfld.long 0x08 3.--3. " OPost ,Outbound Post Queue Interrupt Mask" "no,yes"
textline " "
bitfld.long 0x08 2.--2. " ODoor ,Outbound Doorbell Interrupt Mask" "no,yes"
bitfld.long 0x08 1.--1. " Msg1 ,Outbound Message 1 Interrupt Mask" "no,yes"
bitfld.long 0x08 0.--0. " Msg0 ,Outbound Message 0 Interrupt Mask" "no,yes"
endif
group asd:(0xFFFFE000+0x350)++0x03
line.long 0x00 "MUCR,MU Configuration Register"
bitfld.long 0x00 1.--5. " Size ,Circular Queue Size" "res,4K (16kbytes),8K (32kbytes),res,16K (64kbytes),res,res,res,32K (128kbytes),res,res,res,res,res,res,res,64K (256kbytes),res,res,res,res,res,res,res,res,?..."
bitfld.long 0x00 0.--0. " Que ,Circular Queue Enable" "dis,ena"
group asd:(0xFFFFE000+0x354)++0x03
line.long 0x00 "QBAR,Queue Base Address Register"
hexmask.long 0x00 20.--31. 0x0100000 " Addr ,Queue Base Address"
group asd:(0xFFFFE000+0x360)++0x0f
line.long 0x00 "IFHPR,Inbound Free Head Pointer Register"
hexmask.long 0x00 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x00 2.--19. 0x0000004 " Head ,Inbound Free Head Pointer"
line.long 0x04 "IFTPR,Inbound Free Tail Pointer Register"
hexmask.long 0x04 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x04 2.--19. 0x0000004 " Tail ,Inbound Free Tail Pointer"
line.long 0x08 "IPHPR,Inbound Post Head Pointer Register"
hexmask.long 0x08 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x08 2.--19. 0x0000004 " Head ,Inbound Post Head Pointer"
line.long 0x0c "IPTPR,Inbound Post Tail Pointer Register"
hexmask.long 0x0c 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x0c 2.--19. 0x0000004 " Tail ,Inbound Post Tail Pointer"
group asd:(0xFFFFE000+0x370)++0x0f
line.long 0x00 "OFHPR,Outbound Free Head Pointer Register"
hexmask.long 0x00 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x00 2.--19. 0x0000004 " Head ,Outbound Free Head Pointer"
line.long 0x04 "OFTPR,Outbound Free Tail Pointer Register"
hexmask.long 0x04 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x04 2.--19. 0x0000004 " Tail ,Outbound Free Tail Pointer"
line.long 0x08 "OPHPR,Outbound Post Head Pointer Register"
hexmask.long 0x08 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x08 2.--19. 0x0000004 " Head ,Outbound Post Head Pointer"
line.long 0x0c "OPTPR,Outbound Post Tail Pointer Register"
hexmask.long 0x0c 20.--31. 0x0100000 " Base ,Queue Base Address"
hexmask.long 0x0c 2.--19. 0x0000004 " Tail ,Outbound Post Tail Pointer"
group asd:(0xFFFFE000+0x380)++0x03
line.long 0x00 "IAR,Index Address Register"
hexmask.long 0x00 2.--11. 0x0000004 " Addr ,Index Address"
tree.end
; --------------------------------------------------------------------------------
; 80331
; State: preliminary,gfz
; --------------------------------------------------------------------------------
tree "Bus Interface Unit"
; --------------------------------------------------------------------------------
width 8.
group asd:0xFFFFE600++0x03
line.long 0x00 "BIUSR,BIU Status Register"
bitfld.long 0x00 28.--31. " MC ,Message Class" " WRCmp,BrdgErr,CmpErr,-,-,-,-,-,-,-,-,-,-,-,-,-"
hexmask.long 0x00 20.--27. 1. " MI ,Message Index"
bitfld.long 0x00 19. " CSCD ,Corrupted Split Completion Detected" "no,yes"
bitfld.long 0x00 06. " CMRTP ,Core Memory Read Transaction Pending" "no,yes"
bitfld.long 0x00 05. " CMWTP ,Core Memory Write Transaction Pending" "no,yes"
bitfld.long 0x00 04. " EO ,Error Overflow" "no,yes"
bitfld.long 0x00 02.--03. " ET ,Error Type" "TgtAb,MstAb,SpCmpErr,res"
bitfld.long 0x00 01. " DRC ,Direction" "RdErr,WrErr"
bitfld.long 0x00 00. " EV ,Error Valid" "no,yes"
group asd:0xFFFFE604++0x03
line.long 0x00 "BEAR,BIU Error Address Register"
group asd:0xFFFFE608++0x03
line.long 0x00 "BIUCR,BIU Control Register"
bitfld.long 0x00 00. " MPE ,MCU Port Enable" "dis,ena"
tree.end
tree "DMA Controller Unit"
; --------------------------------------------------------------------------------
; 80312, 80321, 80331,
; State: ok
;
; 803xx_dma 0xFFFFE400 0 80331.
;
; 0xFFFFE400 Base Address
; 0 Channel Number
; 80331. Chip Identification
;
; --------------------------------------------------------------------------------
;tree "DMA Controller" has to be out of this file
; --------------------------------------------------------------------------------
width 12.
group asd:0xFFFFE400++0x27 "Channel 0"
line.long 0x00 "CCR,Channel Control Register"
bitfld.long 0x00 1.--1. " CR ,Chain Resume" "no,yes"
bitfld.long 0x00 0.--0. " CH ,Channel Enable" "dis,ena"
; *** 80321 ***
if (80331.==80321.)||(80331.==80331.)
group asd:0xFFFFE400++0x27
line.long 0x04 "CSR,Channel Status Register"
bitfld.long 0x04 10.--10. " CA ,Channel Active Flag" "no,yes"
bitfld.long 0x04 9.--9. " EOT ,End of Transfer Interrupt Flag" "no,yes"
bitfld.long 0x04 8.--8. " EOC ,End of Chain Interrupt Flag" "no,yes"
bitfld.long 0x04 5.--5. " Int-MA ,Internal Bus Master-Abort Flag" "no,yes"
textline " "
bitfld.long 0x04 3.--3. " MA ,PCI Master-Abort Flag" "no,yes"
bitfld.long 0x04 2.--2. " TA ,PCI Target-Abort Flag" "no,yes"
bitfld.long 0x04 1.--1. " Split-Err ,Unknown PCI-X Split Transaction Error" "no,yes"
; *** 80312 ***
elif (80331.==80312.)
group asd:0xFFFFE400++0x27
line.long 0x04 "CSR,Channel Status Register"
bitfld.long 0x04 10.--10. " CA ,Channel Active Flag" "no,yes"
bitfld.long 0x04 9.--9. " EOT ,End of Transfer Interrupt Flag" "no,yes"
bitfld.long 0x04 8.--8. " EOC ,End of Chain Interrupt Flag" "no,yes"
bitfld.long 0x04 5.--5. " Int-MA ,Internal Bus Master-Abort Flag" "no,yes"
textline " "
bitfld.long 0x04 3.--3. " MA ,PCI Master-Abort Flag" "no,yes"
bitfld.long 0x04 2.--2. " TA ,PCI Target-Abort Flag" "no,yes"
bitfld.long 0x04 0.--0. " PPE ,PCI Parity Error Flag" "no,yes"
endif
group asd:0xFFFFE400++0x27
line.long 0x0c "DAR,Descriptor Address Register"
hexmask.long 0x0c 5.--31. 0x20 " Addr ,Current Descriptor Address"
line.long 0x10 "NDAR,Next Descriptor Address Register"
hexmask.long 0x10 5.--31. 0x20 " Addr ,Next Descriptor Address"
line.long 0x14 "PADR,PCI Address Register"
line.long 0x18 "PUADR,PCI Upper Address Register"
line.long 0x1c "LADR,Local Address Register"
line.long 0x20 "BCR,Byte Count Register"
hexmask.long 0x20 0.--23. 0x01 " Cnt ,Byte Count"
; *** 80321 ***
if (80331.==80321.)
group asd:0xFFFFE400++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 6.--6. " Mem-Mem ,Memory-to-Memory Transfer Enable" "dis,ena"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " CMD ,PCI Command" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
; *** 80312 ***
elif (80331.==80312.)
group asd:0xFFFFE400++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " CMD ,PCI Command" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
; *** 80331 ***
elif (80331.==80331.)
group asd:0xFFFFE400++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 31.--31. " CTC ,CRC Transfer Complete" "no,yes"
bitfld.long 0x24 9.--9. " CSD ,CRC Seed Disable" "ena,dis"
bitfld.long 0x24 8.--8. " CGE ,CRC Generation Enable" "dis,ena"
bitfld.long 0x24 7.--7. " CDTD ,CRC Data Transfer Disable" "ena,dis"
bitfld.long 0x24 6.--6. " Mem-Mem ,Memory-to-Memory Transfer Enable" "dis,ena"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " TRANS ,PCI Transaction" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
endif
width 8.
;tree.end
; --------------------------------------------------------------------------------
; 80312, 80321, 80331,
; State: ok
;
; 803xx_dma 0xFFFFE440 1 80331.
;
; 0xFFFFE440 Base Address
; 1 Channel Number
; 80331. Chip Identification
;
; --------------------------------------------------------------------------------
;tree "DMA Controller" has to be out of this file
; --------------------------------------------------------------------------------
width 12.
group asd:0xFFFFE440++0x27 "Channel 1"
line.long 0x00 "CCR,Channel Control Register"
bitfld.long 0x00 1.--1. " CR ,Chain Resume" "no,yes"
bitfld.long 0x00 0.--0. " CH ,Channel Enable" "dis,ena"
; *** 80321 ***
if (80331.==80321.)||(80331.==80331.)
group asd:0xFFFFE440++0x27
line.long 0x04 "CSR,Channel Status Register"
bitfld.long 0x04 10.--10. " CA ,Channel Active Flag" "no,yes"
bitfld.long 0x04 9.--9. " EOT ,End of Transfer Interrupt Flag" "no,yes"
bitfld.long 0x04 8.--8. " EOC ,End of Chain Interrupt Flag" "no,yes"
bitfld.long 0x04 5.--5. " Int-MA ,Internal Bus Master-Abort Flag" "no,yes"
textline " "
bitfld.long 0x04 3.--3. " MA ,PCI Master-Abort Flag" "no,yes"
bitfld.long 0x04 2.--2. " TA ,PCI Target-Abort Flag" "no,yes"
bitfld.long 0x04 1.--1. " Split-Err ,Unknown PCI-X Split Transaction Error" "no,yes"
; *** 80312 ***
elif (80331.==80312.)
group asd:0xFFFFE440++0x27
line.long 0x04 "CSR,Channel Status Register"
bitfld.long 0x04 10.--10. " CA ,Channel Active Flag" "no,yes"
bitfld.long 0x04 9.--9. " EOT ,End of Transfer Interrupt Flag" "no,yes"
bitfld.long 0x04 8.--8. " EOC ,End of Chain Interrupt Flag" "no,yes"
bitfld.long 0x04 5.--5. " Int-MA ,Internal Bus Master-Abort Flag" "no,yes"
textline " "
bitfld.long 0x04 3.--3. " MA ,PCI Master-Abort Flag" "no,yes"
bitfld.long 0x04 2.--2. " TA ,PCI Target-Abort Flag" "no,yes"
bitfld.long 0x04 0.--0. " PPE ,PCI Parity Error Flag" "no,yes"
endif
group asd:0xFFFFE440++0x27
line.long 0x0c "DAR,Descriptor Address Register"
hexmask.long 0x0c 5.--31. 0x20 " Addr ,Current Descriptor Address"
line.long 0x10 "NDAR,Next Descriptor Address Register"
hexmask.long 0x10 5.--31. 0x20 " Addr ,Next Descriptor Address"
line.long 0x14 "PADR,PCI Address Register"
line.long 0x18 "PUADR,PCI Upper Address Register"
line.long 0x1c "LADR,Local Address Register"
line.long 0x20 "BCR,Byte Count Register"
hexmask.long 0x20 0.--23. 0x01 " Cnt ,Byte Count"
; *** 80321 ***
if (80331.==80321.)
group asd:0xFFFFE440++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 6.--6. " Mem-Mem ,Memory-to-Memory Transfer Enable" "dis,ena"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " CMD ,PCI Command" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
; *** 80312 ***
elif (80331.==80312.)
group asd:0xFFFFE440++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " CMD ,PCI Command" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
; *** 80331 ***
elif (80331.==80331.)
group asd:0xFFFFE440++0x27
line.long 0x24 "DCR,Descriptor Control Register"
bitfld.long 0x24 31.--31. " CTC ,CRC Transfer Complete" "no,yes"
bitfld.long 0x24 9.--9. " CSD ,CRC Seed Disable" "ena,dis"
bitfld.long 0x24 8.--8. " CGE ,CRC Generation Enable" "dis,ena"
bitfld.long 0x24 7.--7. " CDTD ,CRC Data Transfer Disable" "ena,dis"
bitfld.long 0x24 6.--6. " Mem-Mem ,Memory-to-Memory Transfer Enable" "dis,ena"
bitfld.long 0x24 5.--5. " DAC ,Dual Address Cycle Enable" "dis,ena"
bitfld.long 0x24 4.--4. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x24 0.--3. " TRANS ,PCI Transaction" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
endif
width 8.
;tree.end
tree.end
; --------------------------------------------------------------------------------
; 80321, 80331,
; State: ok
; See also: 80312
;
; 80331. Chip Identification
; --------------------------------------------------------------------------------
tree "Application Accelerator Unit"
; --------------------------------------------------------------------------------
group asd:0xffffe800++0x03
line.long 0x00 "ACR,Accelerator Control Register"
bitfld.long 0x00 2.--2. " Buffer ,512-byte Buffer Enable" "1KB,512B"
bitfld.long 0x00 1.--1. " Chain Resume ,Chain Resume" "no,yes"
bitfld.long 0x00 0.--0. " AA ,AA Enable" "dis,ena"
group asd:0xffffe804++0x03
line.long 0x00 "ASR,Accelerator Status Register"
bitfld.long 0x00 10.--10. " Active ,Accelerator Active Flag" "no,yes "
bitfld.long 0x00 9.--9. " EOT ,End of Transfer Interrupt Flag" "no,yes"
bitfld.long 0x00 8.--8. " EOC ,End of Chain Interrupt Flag" "no,yes"
bitfld.long 0x00 5.--5. " MA ,Master Abort" "no,yes"
group asd:0xffffe808++0x03
line.long 0x00 "ADAR,Accelerator Descriptor Address Register"
hexmask.long 0x00 5.--31. 0x20 " Addr ,Current Descriptor Address"
group asd:0xffffe80c++0x03
line.long 0x00 "ANDAR,Accelerator Next Descriptor Address Register"
hexmask.long 0x00 5.--31. 0x20 " Addr ,Next Descriptor Address"
group asd:0xffffe810++0x97
line.long 0x00 "SAR1,Source Address Register"
line.long 0x04 "SAR2,Source Address Register"
line.long 0x08 "SAR3,Source Address Register"
line.long 0x0c "SAR4,Source Address Register"
line.long 0x1c "SAR5,Source Address Register"
line.long 0x20 "SAR6,Source Address Register"
line.long 0x24 "SAR7,Source Address Register"
line.long 0x28 "SAR8,Source Address Register"
line.long 0x30 "SAR9,Source Address Register"
line.long 0x34 "SAR10,Source Address Register"
line.long 0x38 "SAR11,Source Address Register"
line.long 0x3c "SAR12,Source Address Register"
line.long 0x40 "SAR13,Source Address Register"
line.long 0x44 "SAR14,Source Address Register"
line.long 0x48 "SAR15,Source Address Register"
line.long 0x4c "SAR16,Source Address Register"
line.long 0x54 "SAR17,Source Address Register"
line.long 0x58 "SAR18,Source Address Register"
line.long 0x5c "SAR19,Source Address Register"
line.long 0x60 "SAR20,Source Address Register"
line.long 0x64 "SAR21,Source Address Register"
line.long 0x68 "SAR22,Source Address Register"
line.long 0x6c "SAR23,Source Address Register"
line.long 0x70 "SAR24,Source Address Register"
line.long 0x78 "SAR25,Source Address Register"
line.long 0x7c "SAR26,Source Address Register"
line.long 0x80 "SAR27,Source Address Register"
line.long 0x84 "SAR28,Source Address Register"
line.long 0x88 "SAR29,Source Address Register"
line.long 0x8c "SAR30,Source Address Register"
line.long 0x90 "SAR31,Source Address Register"
line.long 0x94 "SAR32,Source Address Register"
group asd:0xffffe820++0x03
line.long 0x00 "DAR,Destination Address Register"
group asd:0xffffe824++0x03
line.long 0x00 "ABCR,Accelerator Byte Count Register"
hexmask.long 0x00 0.--23. 0x01 " Cnt ,Byte Count"
; *** 80321 ***
if (80331.==80321.)
group asd:0xffffe828++0x03
line.long 0x00 "ADCR,Accelerator Descriptor Control Register"
bitfld.long 0x00 31.--31. "DstWE ,Destination Write Enable" "dis,ena"
bitfld.long 0x00 30.--30. " Parity ,Parity Enable" "dis,ena"
bitfld.long 0x00 29.--29. " PErr ,Parity Error" "no,yes"
bitfld.long 0x00 28.--28. " TxC ,Transfer Complete" "no,yes"
bitfld.long 0x00 25.--26. " SBCI ,Supplemental Block Control Interpreter" "0 blocks,4 blocks,12 blocks,28 blocks"
textline " "
bitfld.long 0x00 22.--24. "B8CC ,Block 8 Command Control" "Null,XOR,?..."
bitfld.long 0x00 19.--21. " B7CC ,Block 7 Command Control" "Null,XOR,?..."
bitfld.long 0x00 16.--18. " B6CC ,Block 6 Command Control" "Null,XOR,?..."
bitfld.long 0x00 13.--15. " B5CC ,Block 5 Command Control" "Null,XOR,?..."
textline " "
bitfld.long 0x00 10.--12. "B4CC ,Block 4 Command Control" "Null,XOR,?..."
bitfld.long 0x00 7.--9. " B3CC ,Block 3 Command Control" "Null,XOR,?..."
bitfld.long 0x00 4.--6. " B2CC ,Block 2 Command Control" "Null,XOR,?..."
bitfld.long 0x00 1.--3. " B1CC ,Block 1 Command Control" "Null,XOR,Memory Block Fill,res,res,res,res,Direct Fill"
textline " "
bitfld.long 0x00 0.--0. "IE ,Interrupt Enable" "dis,ena"
; *** 80331 ***
elif (80331.==80331.)
group asd:0xffffe828++0x03
line.long 0x00 "ADCR,Accelerator Descriptor Control Register"
bitfld.long 0x00 31.--31. " DstWE ,Destination Write Enable" "dis,ena"
bitfld.long 0x00 30.--30. " ZRBCE ,Zero Result Buffer Check Enable" "dis,ena"
bitfld.long 0x00 29.--29. " RBNZ ,Result Buffer Not Zero" "no,yes"
bitfld.long 0x00 28.--28. " TxC ,Transfer Complete" "no,yes"
bitfld.long 0x00 25.--26. " SBCI ,Supplemental Block Control Interpreter" "0 blocks,4 blocks,12 blocks,28 blocks"
textline " "
bitfld.long 0x00 22.--24. "B8CC ,Block 8 Command Control" "Null,XOR,?..."
bitfld.long 0x00 19.--21. " B7CC ,Block 7 Command Control" "Null,XOR,?..."
bitfld.long 0x00 16.--18. " B6CC ,Block 6 Command Control" "Null,XOR,?..."
bitfld.long 0x00 13.--15. " B5CC ,Block 5 Command Control" "Null,XOR,?..."
textline " "
bitfld.long 0x00 10.--12. "B4CC ,Block 4 Command Control" "Null,XOR,?..."
bitfld.long 0x00 7.--9. " B3CC ,Block 3 Command Control" "Null,XOR,?..."
bitfld.long 0x00 4.--6. " B2CC ,Block 2 Command Control" "Null,XOR,?..."
bitfld.long 0x00 1.--3. " B1CC ,Block 1 Command Control" "Null,XOR,Memory Block Fill,res,res,res,res,Direct Fill"
textline " "
bitfld.long 0x00 0.--0. "IE ,Interrupt Enable" "dis,ena"
endif
group asd:0xffffe83c++0x4b
line.long 0x00 "EDCR0,Extended Descriptor Control Register 0"
bitfld.long 0x00 22.--24. " B16CC ,Block 16 Command Control" "Null,XOR,?..."
bitfld.long 0x00 19.--21. " B15CC ,Block 15 Command Control" "Null,XOR,?..."
bitfld.long 0x00 16.--18. " B14CC ,Block 14 Command Control" "Null,XOR,?..."
bitfld.long 0x00 13.--15. " B13CC ,Block 13 Command Control" "Null,XOR,?..."
textline " "
bitfld.long 0x00 10.--12. "B12CC ,Block 12 Command Control" "Null,XOR,?..."
bitfld.long 0x00 7.--9. " B11CC ,Block 11 Command Control" "Null,XOR,?..."
bitfld.long 0x00 4.--6. " B10CC ,Block 10 Command Control" "Null,XOR,?..."
bitfld.long 0x00 1.--3. " B9CC ,Block 9 Command Control" "Null,XOR,?..."
line.long 0x24 "EDCR1,Extended Descriptor Control Register 1"
bitfld.long 0x24 22.--24. " B24CC ,Block 24 Command Control" "Null,XOR,?..."
bitfld.long 0x24 19.--21. " B23CC ,Block 23 Command Control" "Null,XOR,?..."
bitfld.long 0x24 16.--18. " B22CC ,Block 22 Command Control" "Null,XOR,?..."
bitfld.long 0x24 13.--15. " B21CC ,Block 21 Command Control" "Null,XOR,?..."
textline " "
bitfld.long 0x24 10.--12. "B20CC ,Block 20 Command Control" "Null,XOR,?..."
bitfld.long 0x24 7.--9. " B19CC ,Block 19 Command Control" "Null,XOR,?..."
bitfld.long 0x24 4.--6. " B18CC ,Block 18 Command Control" "Null,XOR,?..."
bitfld.long 0x24 1.--3. " B17CC ,Block 17 Command Control" "Null,XOR,?..."
line.long 0x48 "EDCR2,Extended Descriptor Control Register 2"
bitfld.long 0x48 22.--24. " B32CC ,Block 32 Command Control" "Null,XOR,?..."
bitfld.long 0x48 19.--21. " B31CC ,Block 31 Command Control" "Null,XOR,?..."
bitfld.long 0x48 16.--18. " B30CC ,Block 30 Command Control" "Null,XOR,?..."
bitfld.long 0x48 13.--15. " B29CC ,Block 29 Command Control" "Null,XOR,?..."
textline " "
bitfld.long 0x48 10.--12. "B28CC ,Block 28 Command Control" "Null,XOR,?..."
bitfld.long 0x48 7.--9. " B27CC ,Block 27 Command Control" "Null,XOR,?..."
bitfld.long 0x48 4.--6. " B26CC ,Block 26 Command Control" "Null,XOR,?..."
bitfld.long 0x48 1.--3. " B25CC ,Block 25 Command Control" "Null,XOR,?..."
tree.end
; --------------------------------------------------------------------------------
; 80331
; State: preliminary,gfz
; --------------------------------------------------------------------------------
tree "Memory Controller"
; --------------------------------------------------------------------------------
group asd:0xffffe500--0xffffe51b "SDRAM"
line.long 0x00 "SDIR,SDRAM Initialization Register"
bitfld.long 0x00 0.--3. " Cmd ,Special DDR SDRAM Command" "ModRegSet,ModRegSet,PrechgAll,NOP,ExtMRS,ExtMRS,AutoRefresh,normal,normal,normal,normal,normal,normal,normal,normal,normal"
line.long 0x04 "SDCR0,SDRAM Control Register"
hexmask.long 0x04 28.--31. 1. " tRAS ,Active to Precharge duration in MCLK periods"
bitfld.long 0x04 24.--26. " tRP ,Precharge Command Period in MCLK periods" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 20.--22. " tRCD ,Active to Read, Active to Write Period in MCLK periods" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 16.--17. " tEDP ,Data Path Latency in MCLK periods" "0,1,2,3"
bitfld.long 0x04 12.--13. " tWDL ,Write Data Latency in MCLK periods used by the Memory Controller state machine" "0MCLK,1MCLK,2MCLK,res"
bitfld.long 0x04 08.--09. " tCAS ,CAS Latency" "res,2.5MCLK,3MCLK,4MCLK"
bitfld.long 0x04 04.--05. " Val ,ODT Termination Value" "dis,75_Ohm,150_Ohm,res"
bitfld.long 0x04 02. " DDRT ,DDR Type" "DDR-II,DDR"
textline " "
bitfld.long 0x04 01. " Width ,Data Bus Width" "64-bit,32-bit"
bitfld.long 0x04 00. " DIMMT ,DIMM Type" "Unbuf,Regist"
line.long 0x08 "SDCR1,DDR SDRAM Control Register 1"
bitfld.long 0x08 31. " DD ,DQS# Disable" "ena,dis"
bitfld.long 0x08 28.--30. " tRTCMD ,Read-to-Command (non-Read) turnaround period in MCLK periods" "ena,dis,?..."
bitfld.long 0x08 24.--27. " tWTCMD ,Write-to-Command (non-Read) turnaround period in MCLK periods" "0,1,2,3,4,5,6,7,%d..."
bitfld.long 0x08 20.--22. " tRTW ,Read-to-Write turnaround period in MCLK periods" "0,1,2,3,4,5,6,7"
hexmask.long 0x08 12.--16. 1. " tRFC ,Refresh-to-Active and Refresh-to-Refresh period in MCLK periods"
bitfld.long 0x08 09.--11. " tWR ,Write Recovery time in MCLK periods" "DDR333,res,DDRII 400,res,res,res,res,res"
hexmask.long 0x08 04.--08. 1. " tRC ,Active-to-Active and Active-to-Refresh period in MCLK periods"
bitfld.long 0x08 00.--03. " tWTRD ,Write-to-Read turnaround period in MCLK periods" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
line.long 0x0c "SDBR,SDRAM Base Register"
hexmask.long 0x0c 25.--31. 0x2000000 " Addr ,SDRAM Base Address"
line.long 0x10 "SBR0,SDRAM Bank 0 Size Register"
bitfld.long 0x10 30.--31. " SAT ,SDRAM Address Translation" "SAT#1,res,SAT#2,SAT#3"
hexmask.long 0x10 0.--6. 0x4000000 " SB ,SDRAM Boundary Bank 0"
line.long 0x14 "SBR1,SDRAM Bank 1 Size Register"
bitfld.long 0x14 30.--31. " SAT ,SDRAM Address Translation" "SAT#1,res,SAT#2,SAT#3"
hexmask.long 0x14 0.--6. 0x4000000 " SB ,SDRAM Boundary Bank 0"
line.long 0x18 "S32SR,DDR SDRAM 32-bit Region Size Register"
hexmask.long 0x18 20.--29. 1. " SIZE ,32-bit Region Size"
group asd:0xffffe51c--0xffffe533 "ECC"
line.long 0x00 "ECCR,ECC Control Register"
bitfld.long 0x00 3.--3. " ECC ,ECC Enable" "dis,ena"
bitfld.long 0x00 2.--2. " SBEC ,Single Bit Error Correction" "dis,ena"
bitfld.long 0x00 1.--1. " MBER ,Multi-Bit Error Reporting" "dis,ena"
bitfld.long 0x00 0.--0. " SBER ,Single Bit Error Reporting" "dis,ena"
line.long 0x04 "ELOG0,ECC Log 0 Register"
hexmask.long 0x04 16.--23. 1. " EER ,ECC Error Requester which indicates the requester of the logged error"
bitfld.long 0x04 12. " RW ,Read or Write" "RdErr,WrErr"
bitfld.long 0x04 08. " EETYP ,ECC Error Type" "SglBit,MulBit"
hexmask.long 0x04 00.--07. 1. " Synd ,Syndrome"
line.long 0x08 "ELOG1,ECC Log 1 Register"
hexmask.long 0x08 16.--23. 1. " EER ,ECC Error Requester which indicates the requester of the logged error"
bitfld.long 0x08 12. " RW ,Read or Write" "RdErr,WrErr"
bitfld.long 0x08 08. " EETYP ,ECC Error Type" "SglBit,MulBit"
hexmask.long 0x08 00.--07. 1. " Synd ,Syndrome"
line.long 0x0c "ECAR0,ECC Address 0 Register"
hexmask.long 0x0c 2.--31. 0x04 " Addr ,Error Address"
line.long 0x10 "ECAR1,ECC Address 1 Register"
hexmask.long 0x10 2.--31. 0x04 " Addr ,Error Address"
line.long 0x14 "ECTST,ECC Test Register"
hexmask.long 0x14 0.--7. 0x01 " ECCMsk ,ECC is XORED with ECC mask"
group asd:0xffffe534++0x3
line.long 0x00 "MCISR,Memory Controller Interrupt Status Register"
bitfld.long 0x00 4.--4. " IDTE ,IB Discard Timer Expired" "no,yes"
bitfld.long 0x00 3.--3. " ARE ,Address Region Error" "no,yes"
bitfld.long 0x00 2.--2. "ECCN ,ECC Error n" "no,yes"
bitfld.long 0x00 1.--1. " ECC1 ,ECC Error 1" "no,yes"
bitfld.long 0x00 0.--0. " ECC0 ,ECC Error 0" "no,yes"
group asd:0xffffe53c++0x3
line.long 0x00 "MPTCR,MCU Port Transaction Count Register"
bitfld.long 0x00 4.--7. " ITC ,IB Transaction Count" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. " CTC ,Core Transaction Count" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group asd:0xffffe540++0x3
line.long 0x00 "MPCR,MCU Preemption Control Register"
bitfld.long 0x00 0.--3. " PDPC ,Preemption Data Phase Count" "dis,res,res,res,4Bursts,res,res,res,res,?..."
group asd:0xffffe548++0x3
line.long 0x00 "RFR,Refresh Frequency Register"
hexmask.long 0x00 0.--12. 1. " RI ,Refresh Interval"
group asd:0xfffff500++0x3
line.long 0x00 "DCALCSR,DCAL Control and Status Register"
bitfld.long 0x00 31. " BIT31 ,see Docu" "0,1"
bitfld.long 0x00 28.--30. " PFI ,Pass Fail Indicators" "Pass,SDRAMDeny,UnpopRowSel,UnsupOp,CmplFail,CmplFail,CmplFail,CmplFail"
bitfld.long 0x00 24. " SIFS ,SDRAM I/F Select" "no,yes"
bitfld.long 0x00 23. " OM ,Operation Mode" "OnePass,AllPass"
bitfld.long 0x00 20. " RS ,Row Select (Chip Select)" "CS0#,CS1#"
bitfld.long 0x00 16.--18. " FDPS ,Fixed Data Pattern Selection" "F->0->F->0,0->F->0->F,A->5->A->5,5->A->5->A,C->3->C->3,3->C->3->C,9->6->9->6,6->9->6->9"
hexmask.long 0x00 4.--14. 1. " OM ,Opcode Modifiers"
bitfld.long 0x00 0.--2. " OPC ,Opcode" "res,res,res,EmrsOcdCalib,RecEnaCalib,DQSCalib,res,res"
group asd:0xfffff504++0x3
line.long 0x00 "DCALADDR,DCAL Address Register"
hexmask.long 0x00 16.--19. 1. 0x01 " RA ,Row Address"
hexmask.long 0x00 04.--13. 1. 0x01 " CA ,Column Address"
bitfld.long 0x00 0.--1. " BA ,Bank Address" "00,01,10,11"
group asd:0xfffff508++0x47 "DCAL Data Registers"
line.long 0x00 "DATA0,DCAL Data Register 0"
line.long 0x04 "DATA1,DCAL Data Register 1"
line.long 0x08 "DATA2,DCAL Data Register 2"
line.long 0x0c "DATA3,DCAL Data Register 3"
line.long 0x10 "DATA4,DCAL Data Register 4"
line.long 0x14 "DATA5,DCAL Data Register 5"
line.long 0x18 "DATA6,DCAL Data Register 6"
line.long 0x1c "DATA7,DCAL Data Register 7"
line.long 0x20 "DATA8,DCAL Data Register 8"
line.long 0x24 "DATA9,DCAL Data Register 9"
line.long 0x28 "DATA10,DCAL Data Register 10"
line.long 0x2c "DATA11,DCAL Data Register 11"
line.long 0x30 "DATA12,DCAL Data Register 12"
line.long 0x34 "DATA13,DCAL Data Register 13"
line.long 0x38 "DATA14,DCAL Data Register 14"
line.long 0x3c "DATA15,DCAL Data Register 15"
line.long 0x40 "DATA16,DCAL Data Register 16"
line.long 0x44 "DATA17,DCAL Data Register 17"
group asd:0xfffff550++0x3
line.long 0x00 "RCVDLY,Receive Enabled Delay Register"
bitfld.long 0x00 0.--2. " REDV ,Receive Enable Delay Value" "-,-,DDR-II,-,-,DDR-I,-,-"
group asd:0xfffff554++0x3
line.long 0x00 "SLVLMIX0,Slave Low Mix 0"
bitfld.long 0x00 28.--31. " DQS7 ,Dynamic DQS DLL delay value for DQS7" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 24.--27. " DQS6 ,Dynamic DQS DLL delay value for DQS6" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 20.--23. " DQS5 ,Dynamic DQS DLL delay value for DQS5" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 16.--19. " DQS4 ,Dynamic DQS DLL delay value for DQS4" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 12.--15. " DQS3 ,Dynamic DQS DLL delay value for DQS3" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 08.--11. " DQS2 ,Dynamic DQS DLL delay value for DQS2" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 04.--07. " DQS1 ,Dynamic DQS DLL delay value for DQS1" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 00.--03. " DQS0 ,Dynamic DQS DLL delay value for DQS0" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xfffff558++0x3
line.long 0x00 "SLVLMIX1,Slave Low Mix 1"
bitfld.long 0x00 00.--03. " DQS8 ,Dynamic DQS DLL delay value for DQS8" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xfffff55c++0x3
line.long 0x00 "SLVHMIX0,Slave High Mix 0"
bitfld.long 0x00 28.--31. " DQS7 ,Dynamic DQS DLL delay value for DQS7" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 24.--27. " DQS6 ,Dynamic DQS DLL delay value for DQS6" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 20.--23. " DQS5 ,Dynamic DQS DLL delay value for DQS5" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 16.--19. " DQS4 ,Dynamic DQS DLL delay value for DQS4" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 12.--15. " DQS3 ,Dynamic DQS DLL delay value for DQS3" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 08.--11. " DQS2 ,Dynamic DQS DLL delay value for DQS2" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 04.--07. " DQS1 ,Dynamic DQS DLL delay value for DQS1" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x00 00.--03. " DQS0 ,Dynamic DQS DLL delay value for DQS0" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xfffff560++0x3
line.long 0x00 "SLVHMIX1,Slave High Mix 1"
bitfld.long 0x00 00.--03. " DQS8 ,Dynamic DQS DLL delay value for DQS8" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xfffff564++0x3
line.long 0x00 "SLVLEN,Slave Length"
bitfld.long 0x00 0.--2. " LEN ,Static DQS slave DLL length" "0,1,2,3,4,5,6,7"
group asd:0xfffff568++0x3
line.long 0x00 "MASTMIX,Master Mix"
bitfld.long 0x00 0.--3. " LM ,Master DQS DLL delay loop mixer" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
group asd:0xfffff56c++0x3
line.long 0x00 "MASTLEN,Master Length"
bitfld.long 0x00 0.--1. " LC ,Master DQS DLL length control" "00,01,10,11"
group asd:0xfffff570++0x3
line.long 0x00 "DDRDSSR,DDR Drive Strength Status Register"
bitfld.long 0x00 0.--3. " STRENV ,DDR Drive Strength Value" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
if (d.l(asd:0xfffff574)&0x10)==0x10
group asd:0xfffff574++3
line.long 0x00 "DDRDSCR,DDR Drive Strength Control Register"
bitfld.long 0x00 4. " OE ,Overdrive Enable" "dis,ena"
bitfld.long 0x00 3. " PCS ,Pad Control Selection" "DSOV,LockVal"
bitfld.long 0x00 0.--2. " DSOV ,Drive Strength Override Value" "0,1,2,3,4,5,6,7"
elif (d.l(asd:0xfffff574)&0x10)==0x00
group asd:0xfffff574++3
line.long 0x00 "DDRDSCR,DDR Drive Strength Control Register"
bitfld.long 0x00 4. " OE ,Overdrive Enable" "dis,ena"
bitfld.long 0x00 0.--3. " DSVH ,Drive Strength Value Hint" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
endif
group asd:0xfffff578++0x3
line.long 0x00 "DDRMPCR,DDR Miscellaneous Pad Control Register"
bitfld.long 0x00 16.--17. " RPD ,read pointer delay" "00,01,10,11"
bitfld.long 0x00 15. " FSRC ,Fast slew rate control" "DDR-I,DDR-II"
bitfld.long 0x00 14. " HGC ,Half gain control" "0,1"
bitfld.long 0x00 13. " LTM ,Leg test mode" "0,1"
bitfld.long 0x00 12. " VS ,VOX Start" "0,1"
bitfld.long 0x00 11. " SRO ,Slew Rate Override" "no,yes"
bitfld.long 0x00 10. " DB ,DLL Bypass" "no,yes"
bitfld.long 0x00 09. " OLE ,OCD Load Enable" "dis,ena"
bitfld.long 0x00 08. " AVM ,Analog Validation Mode (behavior TBD)" "0,1"
bitfld.long 0x00 0.--3. " VS ,VREF Select" "ExtVREFBump,IntVREF-250mv,IntVREF-200mv,IntVREF-150mv,IntVREF-100mv,IntVREF-50mv,IntVREF-10mv,IntPreVREF,IntVREF+10mv,IntVREF+50mv,IntVREF+100mv,IntVREF+150mv,IntVREF+200mv,IntVREF+250mv,PullDWCalMod,PullUPCalMod"
tree.end
; --------------------------------------------------------------------------------
; 80331
; State: preliminary
; --------------------------------------------------------------------------------
tree "Peripheral Bus Interface Unit"
; --------------------------------------------------------------------------------
group asd:0xffffe680++0x03
line.long 0x00 "PBCR,PBI Control Register"
bitfld.long 0x00 3.--3. " Boot ,Intel XScale Core PCI Bus Boot Enable" "dis,ena"
bitfld.long 0x00 0.--0. " PBI ,PBI Enable" "dis,ena"
group asd:0xffffe688++0x07
line.long 0x00 "PBBAR0,PBI Base Address Register 0"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Memory Window 0 Base Address"
bitfld.long 0x00 9.--9. " BIT9 ,Read Only = 1" "1,?..."
bitfld.long 0x00 6.--8. " Rec ,Recovery Cycle Wait States" "1,4,8,12,16,20,20,20"
bitfld.long 0x00 2.--4. " AD ,Address-to-Data Wait States" "4,8,12,16,20,20,20,20"
bitfld.long 0x00 0.--1. " Buswidth ,Bus Width" "8-bit,16-bit,res,res"
line.long 0x04 "PBLR0,PBI Limit Register 0"
hexmask.long 0x04 12.--31. 0x1000 " Limit ,Memory Window 0 Limit"
group asd:0xffffe690++0x07
line.long 0x00 "PBBAR1,PBI Base Address Register 1"
hexmask.long 0x00 12.--31. 0x1000 " Addr ,Memory Window 1 Base Address"
bitfld.long 0x00 9.--9. " BIT9 ,Read Only = 1" "1,?..."
bitfld.long 0x00 6.--8. " Rec ,Recovery Cycle Wait States" "1,4,8,12,16,20,20,20"
bitfld.long 0x00 2.--4. " AD ,Address-to-Data Wait States" "4,8,12,16,20,20,20,20"
bitfld.long 0x00 0.--1. " Buswidth ,Bus Width" "8-bit,16-bit,res,res"
line.long 0x04 "PBLR1,PBI Limit Register 1"
hexmask.long 0x04 12.--31. 0x1000 " Limit ,Memory Window 1 Limit"
group asd:0xfffff580++0x03
line.long 0x00 "PBDSCR,PBI Drive Strength Control Register"
hexmask.long 0x00 8.--13. 0x01 " PDDS ,Pull-Down Drive Strength"
hexmask.long 0x00 0.--5. 0x01 " PUDS ,Pull-Up Drive Strength"
group asd:0xffffe6c0++0x27
line.long 0x00 "PMBR0,PBI Memory-less Boot Register 0 (Reset Vector)"
line.long 0x20 "PMBR1,PBI Memory-less Boot Register 1 (Long Branch to an Outbound Memory Window)"
line.long 0x24 "PMBR2,PBI Memory-less Boot Register 2 (Long Branch to an Outbound Memory Window)"
tree.end
; --------------------------------------------------------------------------------
; 80321, 80331,
; State: ok
; See also: 80312
; --------------------------------------------------------------------------------
tree "I2C Bus Interface Unit"
; --------------------------------------------------------------------------------
group asd:0xfffff680++0x17 "I2C Bus Interface Register 0"
line.long 0x00 "ICR,I2C Control Register"
bitfld.long 0x00 15.--15. " Mode ,Fast Mode" "100Kbps,400Kbps"
bitfld.long 0x00 14.--14. " Reset ,Unit Reset" "no,yes"
bitfld.long 0x00 13.--13. " SlvAddr ,Slave Address Detected Interrupt Enable" "dis,ena"
bitfld.long 0x00 12.--12. " ArbLoss ,Arbitration Loss Detected Interrupt Enable" "dis,ena"
textline " "
bitfld.long 0x00 11.--11. "SlvSTOP ,Slave STOP Detected Interrupt Enable" "dis,ena"
bitfld.long 0x00 10.--10. " BusErr ,Bus Error Interrupt Enable" "dis,ena"
bitfld.long 0x00 9.--9. " RxFull ,IDBR Receive Full Interrupt Enable" "dis,ena"
bitfld.long 0x00 8.--8. " TxEmpty ,IDBR Transmit Empty Interrupt Enable" "dis,ena"
textline " "
bitfld.long 0x00 7.--7. "GenCall ,General Call Disable" "ena,dis"
bitfld.long 0x00 6.--6. " I2C-Unit ,I2C Unit Enable" "dis,ena"
bitfld.long 0x00 5.--5. " SCL ,SCL Enable" "dis,ena"
bitfld.long 0x00 4.--4. " MA ,Master Abort" "no,yes"
bitfld.long 0x00 3.--3. " Transfer ,Transfer Byte" "no,yes"
textline " "
bitfld.long 0x00 2.--2. "Ack/Nack ,Ack/Nack Control" "dis,ena"
bitfld.long 0x00 1.--1. " STOP ,STOP" "no,yes"
bitfld.long 0x00 0.--0. " START ,START" "no,yes"
line.long 0x04 "ISR,I2C Status Register"
bitfld.long 0x04 10.--10. " BusErr ,Bus Error Detected" "no,yes"
bitfld.long 0x04 9.--9. " SlvAddr ,Slave Address Detected" "no,yes"
bitfld.long 0x04 8.--8. " GenCall ,General Call Address Disable" "no,yes"
bitfld.long 0x04 7.--7. " RxFull ,IDBR Receive Full" "no,yes"
textline " "
bitfld.long 0x04 6.--6. "TxEmpty ,IDBR Transmit Empty" "no,yes"
bitfld.long 0x04 5.--5. " ArbLoss ,Arbitration Loss Detected" "no,yes"
bitfld.long 0x04 4.--4. " SlvSTOP ,Slave STOP Detected" "no,yes"
textline " "
bitfld.long 0x04 3.--3. "BusBsy ,I2C Bus Busy" "no,yes"
bitfld.long 0x04 2.--2. " UnitBsy ,Unit Busy" "no,yes"
bitfld.long 0x04 1.--1. " Ack/Nack ,Ack/Nack Status" "Ack,Nack"
textline " "
bitfld.long 0x04 0.--0. "RW-Mode ,Read/Write Mode" "MstrTrs/SlvRec,MstrRec/SlvTrs"
line.long 0x08 "ISAR,I2C Slave Address Register"
hexmask.long 0x08 0.--6. 0x01 " Addr ,I2C Slave Address"
line.long 0x0c "IDBR,I2C Data Buffer Register"
hexmask.long 0x0c 0.--7. 0x01 " Data ,I2C Data Buffer"
line.long 0x14 "IBMR,I2C Bus Monitor Register"
bitfld.long 0x14 1.--1. " SCL ,SCL Status, value of SCL pin" "0,1"
bitfld.long 0x14 0.--0. " SDA ,SDA Status, value of SDA pin" "0,1"
group asd:0xfffff6a0++0x17 "I2C Bus Interface Register 1"
copy
tree.end
tree "UARTs"
tree "UART0"
base asd:0xFFFFF700
rgroup 0x0++0x3
hide.long 0x00 "U0RBR,UART 0 Receive BUFFER"
in
wgroup 0x0++0x3
hide.long 0x00 "U0THR,UART 0 Transmit BUFFER"
group 0x4++0x3
line.long 0x00 "U0IER,UART 0 Interrupt Enable"
bitfld.long 0x00 6. " UUE ,UART Unit Enable" "dis,ena"
bitfld.long 0x00 5. " NRZE ,NRZ coding Enable" "dis,ena"
bitfld.long 0x00 4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena"
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "dis,ena"
bitfld.long 0x00 2. " RLSE ,Receiver Line Status Interrupt Enable" "dis,ena"
bitfld.long 0x00 1. " TIE ,Transmit Data request Interrupt Enable" "dis,ena"
bitfld.long 0x00 0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena"
rgroup 0x8++0x3
line.long 0x00 "U0IIR,UART 0 Interrupt I.D."
bitfld.long 0x00 6.--7. " FIFOES1:0 ,FIFO Mode Enable Status" "NonFIFO,Res,Res,FIFO"
bitfld.long 0x00 4. " ABL ,Autobaud Lock" "no,yes"
bitfld.long 0x00 3. " TOD ,Time Out Detected" "no,yes"
bitfld.long 0x00 1.--2. " IID1:0 ,Interrupt Source Encoded" "ModemSta,TransFifo,RecDatAva,RecErr"
bitfld.long 0x00 0. " IP# ,Interrupt Pending" "no,yes"
wgroup 0x8++0x3
line.long 0x00 "U0FCR,UART 0 FIFO Control"
bitfld.long 0x00 6.--7. " ITL ,Interrupt Trigger Level" ">=1Byte,>=8Bytes,>=16Bytes,>=32Bytes"
bitfld.long 0x00 3. " TIL ,Transmitter Interrupt Level" "FifoHalfEmp,FifoEmpt"
bitfld.long 0x00 2. " RESETTF ,Reset Transmitter FIFO" "-,reset"
bitfld.long 0x00 1. " RESETRF ,Reset Receiver FIFO" "-,reset"
bitfld.long 0x00 0. " TRFIFOE ,Transmit and Receive FIFO Enable" "dis,ena"
group 0xc++0x3
line.long 0x00 "U0LCR,UART 0 Line Control"
bitfld.long 0x00 7. " DLAB ,Divisor Latch register Access Bit" "THR,DLL&DLH"
bitfld.long 0x00 6. " SB ,Set break" "-,set"
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "-,yes"
bitfld.long 0x00 4. " EPS ,Even Parity Select" "OddPar,EvenPar"
bitfld.long 0x00 3. " PEN ,Parity Enable" "dis,ena"
bitfld.long 0x00 2. " STB ,Stop bits" "1bit,2bits"
bitfld.long 0x00 0.--1. " WLS1:0 ,Word Length Select" "5bits,6bits,7bits,8bits"
group 0x10++0x3
line.long 0x00 "U0MCR,UART 0 Modem Control"
bitfld.long 0x00 5. " AFE ,Autoflow Control Enable" "dis,ena"
bitfld.long 0x00 4. " LOOP ,Loop back test mode" "normal,testmode"
bitfld.long 0x00 3. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x00 1. " RTS ,Request to Send" "0,1"
rgroup 0x14++0x3
line.long 0x00 "U0LSR,UART 0 Line Status"
bitfld.long 0x00 7. " FIFOE ,FIFO Error Status" "NoErr,Err"
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "no,yes"
bitfld.long 0x00 5. " TDRQ ,Transmit Data Request" "NotRdy,Ready"
bitfld.long 0x00 4. " BI ,Break Indicator" "NoBrk,Break"
bitfld.long 0x00 3. " FE ,Framing Error" "no,yes"
bitfld.long 0x00 2. " PE ,Parity Error" "no,yes"
bitfld.long 0x00 1. " OE ,Overflow Error" "no,yes"
bitfld.long 0x00 0. " DR ,Data Ready" "no,yes"
rgroup 0x18++0x3
line.long 0x00 "U0MSR,UART 0 Modem Status"
bitfld.long 0x00 4. " CTS ,Clear to Send" "CTS#=1,CTS#=0"
bitfld.long 0x00 0. " DCTS ,Delta Clear To Send" "NoChg,Chged"
group 0x1c++0x3
line.long 0x00 "U0SPR,UART 0 Scratch Pad"
group 0x0++0x3
line.long 0x00 "U0DLL,UART 0 Divisor Latch"
group 0x4++0x3
line.long 0x00 "U0DLH,UART 0 Divisor Latch"
group 0x24++0x3
line.long 0x00 "U0FOR,UART 0 FIFO Occupancy Register"
hexmask.long 0x00 0.--6. 1. " FOR6:0 ,Number of bytes(0-63) in Receiver FIFO"
group 0x28++0x3
line.long 0x00 "U0ABR,UART 0 Autobaud Control Register"
bitfld.long 0x00 3. " ABT ,Auto-Baud Table" "0,1"
bitfld.long 0x00 2. " ABUP ,Auto-Baud UART Program" "0,1"
bitfld.long 0x00 1. " ABLIE ,Auto-Baud Lock Interrupt Enable" "dis,ena"
bitfld.long 0x00 0. " ABE ,Auto-Baud Enable" "dis,ena"
rgroup 0x2c++0x3
line.long 0x00 "U0ACR,UART 0 Autobaud Count Register"
hexmask.long 0x00 0.--15. 1. " ACR15:0 ,Number of 33.334 MHz clock cycles within a start bit pulse"
tree.end
tree "UART1"
base asd:0xFFFFF740
rgroup 0x0++0x3
hide.long 0x00 "U1RBR,UART 1 Receive BUFFER"
in
wgroup 0x0++0x3
hide.long 0x00 "U1THR,UART 1 Transmit BUFFER"
group 0x4++0x3
line.long 0x00 "U1IER,UART 1 Interrupt Enable"
bitfld.long 0x00 6. " UUE ,UART Unit Enable" "dis,ena"
bitfld.long 0x00 5. " NRZE ,NRZ coding Enable" "dis,ena"
bitfld.long 0x00 4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena"
bitfld.long 0x00 3. " MIE ,Modem Interrupt Enable" "dis,ena"
bitfld.long 0x00 2. " RLSE ,Receiver Line Status Interrupt Enable" "dis,ena"
bitfld.long 0x00 1. " TIE ,Transmit Data request Interrupt Enable" "dis,ena"
bitfld.long 0x00 0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena"
rgroup 0x8++0x3
line.long 0x00 "U1IIR,UART 1 Interrupt I.D."
bitfld.long 0x00 6.--7. " FIFOES1:0 ,FIFO Mode Enable Status" "NonFIFO,Res,Res,FIFO"
bitfld.long 0x00 4. " ABL ,Autobaud Lock" "no,yes"
bitfld.long 0x00 3. " TOD ,Time Out Detected" "no,yes"
bitfld.long 0x00 1.--2. " IID1:0 ,Interrupt Source Encoded" "ModemSta,TransFifo,RecDatAva,RecErr"
bitfld.long 0x00 0. " IP# ,Interrupt Pending" "no,yes"
wgroup 0x8++0x3
line.long 0x00 "U1FCR,UART 1 FIFO Control"
bitfld.long 0x00 6.--7. " ITL ,Interrupt Trigger Level" ">=1Byte,>=8Bytes,>=16Bytes,>=32Bytes"
bitfld.long 0x00 3. " TIL ,Transmitter Interrupt Level" "FifoHalfEmp,FifoEmpt"
bitfld.long 0x00 2. " RESETTF ,Reset Transmitter FIFO" "-,reset"
bitfld.long 0x00 1. " RESETRF ,Reset Receiver FIFO" "-,reset"
bitfld.long 0x00 0. " TRFIFOE ,Transmit and Receive FIFO Enable" "dis,ena"
group 0xc++0x3
line.long 0x00 "U1LCR,UART 1 Line Control"
bitfld.long 0x00 7. " DLAB ,Divisor Latch register Access Bit" "THR,DLL&DLH"
bitfld.long 0x00 6. " SB ,Set break" "-,set"
bitfld.long 0x00 5. " STKYP ,Sticky Parity" "-,yes"
bitfld.long 0x00 4. " EPS ,Even Parity Select" "OddPar,EvenPar"
bitfld.long 0x00 3. " PEN ,Parity Enable" "dis,ena"
bitfld.long 0x00 2. " STB ,Stop bits" "1bit,2bits"
bitfld.long 0x00 0.--1. " WLS1:0 ,Word Length Select" "5bits,6bits,7bits,8bits"
group 0x10++0x3
line.long 0x00 "U1MCR,UART 1 Modem Control"
bitfld.long 0x00 5. " AFE ,Autoflow Control Enable" "dis,ena"
bitfld.long 0x00 4. " LOOP ,Loop back test mode" "normal,testmode"
bitfld.long 0x00 3. " IE ,Interrupt Enable" "dis,ena"
bitfld.long 0x00 1. " RTS ,Request to Send" "0,1"
rgroup 0x14++0x3
line.long 0x00 "U1LSR,UART 1 Line Status"
bitfld.long 0x00 7. " FIFOE ,FIFO Error Status" "NoErr,Err"
bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "no,yes"
bitfld.long 0x00 5. " TDRQ ,Transmit Data Request" "NotRdy,Ready"
bitfld.long 0x00 4. " BI ,Break Indicator" "NoBrk,Break"
bitfld.long 0x00 3. " FE ,Framing Error" "no,yes"
bitfld.long 0x00 2. " PE ,Parity Error" "no,yes"
bitfld.long 0x00 1. " OE ,Overflow Error" "no,yes"
bitfld.long 0x00 0. " DR ,Data Ready" "no,yes"
rgroup 0x18++0x3
line.long 0x00 "U1MSR,UART 1 Modem Status"
bitfld.long 0x00 4. " CTS ,Clear to Send" "CTS#=1,CTS#=0"
bitfld.long 0x00 0. " DCTS ,Delta Clear To Send" "NoChg,Chged"
group 0x1c++0x3
line.long 0x00 "U1SPR,UART 1 Scratch Pad"
group 0x0++0x3
line.long 0x00 "U1DLL,UART 1 Divisor Latch"
group 0x4++0x3
line.long 0x00 "U1DLH,UART 1 Divisor Latch"
group 0x24++0x3
line.long 0x00 "U1FOR,UART 1 FIFO Occupancy Register"
hexmask.long 0x00 0.--6. 1. " FOR6:0 ,Number of bytes(0-63) in Receiver FIFO"
group 0x28++0x3
line.long 0x00 "U1ABR,UART 1 Autobaud Control Register"
bitfld.long 0x00 3. " ABT ,Auto-Baud Table" "0,1"
bitfld.long 0x00 2. " ABUP ,Auto-Baud UART Program" "0,1"
bitfld.long 0x00 1. " ABLIE ,Auto-Baud Lock Interrupt Enable" "dis,ena"
bitfld.long 0x00 0. " ABE ,Auto-Baud Enable" "dis,ena"
rgroup 0x2c++0x3
line.long 0x00 "U1ACR,UART 1 Autobaud Count Register"
hexmask.long 0x00 0.--15. 1. " ACR15:0 ,Number of 33.334 MHz clock cycles within a start bit pulse"
tree.end
tree.end
tree "I/O Processor Arbitration Unit"
group asd:0xFFFFE7F0++3
line.long 0x00 "IACR,Internal Arbitration Control Register"
bitfld.long 0x00 16.--17. " MCP ,Memory Controller Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 14.--15. " PBIP ,Peripheral Bus Interface Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 12.--13. " AAP ,Application Accelerator Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 10.--11. " BIUP ,Intel XScale core Bus Interface Unit Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 06.--07. " DMA1 ,DMA Channel 1 Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 04.--05. " DMA0 ,DMA Channel 0 Priority" "Hi,Med,Low,Dis"
bitfld.long 0x00 00.--01. " A&MP ,ATU and Messaging Unit Priority" "Hi,Med,Low,Dis"
group asd:0xFFFFE7F4++3
line.long 0x00 "MTTR1,Multi-Transaction Timer Register 1"
hexmask.long 0x00 0.--7. 1. " T1PV ,Multi-Transaction Timer 1 Preload Value"
group asd:0xFFFFE7F8++3
line.long 0x00 "MTTR2,Multi-Transaction Timer Register 2"
hexmask.long 0x00 0.--7. 1. " T2PV ,Multi-Transaction Timer 2 Preload Value"
tree.end
; --------------------------------------------------------------------------------
; 80321, 80331,
; State: ok
;
; for 80321, 0xffffe7d0 = 0xffffe7e0
; for 80331, 0xffffe7d0 = 0xffffe7d0
; --------------------------------------------------------------------------------
tree "Timer"
; --------------------------------------------------------------------------------
group asd:(0xffffe7d0+0x0)++0x07
line.long 0x00 "TMR0,Timer Mode Register"
bitfld.long 0x00 4.--5. " CSEL ,Timer Input Clock Select" "1:1,4:1,8:1,16:1"
bitfld.long 0x00 3.--3. " PRI ,Timer Register Privileged Write Control" "Prv/Usr,Prvlged"
bitfld.long 0x00 2.--2. " RELOAD ,Timer Auto Reload Enable" "dis,ena"
bitfld.long 0x00 1.--1. " ENABLE ,Timer Enable" "dis,ena"
bitfld.long 0x00 0.--0. " TC ,Terminal Count Status" "no,yes"
line.long 0x04 "TMR1,Timer Mode Register"
bitfld.long 0x00 4.--5. " CSEL ,Timer Input Clock Select" "1:1,4:1,8:1,16:1"
bitfld.long 0x00 3.--3. " PRI ,Timer Register Privileged Write Control" "Prv/Usr,Prvlged"
bitfld.long 0x00 2.--2. " RELOAD ,Timer Auto Reload Enable" "dis,ena"
bitfld.long 0x00 1.--1. " ENABLE ,Timer Enable" "dis,ena"
bitfld.long 0x00 0.--0. " TC ,Terminal Count Status" "no,yes"
group asd:(0xffffe7d0+0x8)++0x07
line.long 0x00 "TCR0,Timer Count Register"
line.long 0x04 "TCR1,Timer Count Register"
group asd:(0xffffe7d0+0x10)++0x07
line.long 0x00 "TRR0,Timer Reload Register"
line.long 0x04 "TRR1,Timer Reload Register"
group asd:(0xffffe7d0+0x18)++0x03
line.long 0x00 "TISR,Timer Interrupt Status Register"
bitfld.long 0x00 1.--1. " T1 ,Timer 1 Interrupt Pending" "no,yes"
bitfld.long 0x00 0.--0. " T0 ,Timer 0 Interrupt Pending" "no,yes"
group asd:(0xffffe7d0+0x1C)++0x03
line.long 0x00 "WDTC,Watchdog Timer Control Register"
tree.end
; --------------------------------------------------------------------------------
; 80331
; State: preliminary
; --------------------------------------------------------------------------------
tree "Interrupt Controller"
; --------------------------------------------------------------------------------
group asd:0xffffe790++0x03
line.long 0x00 "INTCTL0,Interrupt Control Register 0"
bitfld.long 0x00 27. " XINT3# ,XINT3# Interrupt Mask" "yes,no"
bitfld.long 0x00 26. " XINT2# ,XINT2# Interrupt Mask" "yes,no"
bitfld.long 0x00 25. " XINT1# ,XINT1# Interrupt Mask" "yes,no"
bitfld.long 0x00 24. " XINT0# ,XINT0# Interrupt Mask" "yes,no"
bitfld.long 0x00 16. " PMU ,Intel XScale Core PMU Interrupt Mask" "yes,no"
bitfld.long 0x00 15. " PPM ,Peripheral Performance Monitor Interrupt Mask" "yes,no"
bitfld.long 0x00 14. " ASB ,ATU/Start BIST Interrupt Mask" "yes,no"
textline " "
bitfld.long 0x00 13. " MUIPQ ,Messaging Unit Inbound Post Queue Interrupt Mask" "yes,no"
bitfld.long 0x00 12. " MU ,Messaging Unit Interrupt Mask" "yes,no"
bitfld.long 0x00 11. " I2C1 ,I2C Bus Interface 1 Interrupt Mask" "yes,no"
bitfld.long 0x00 10. " I2C0 ,I2C Bus Interface 0 Interrupt Mask" "yes,no"
bitfld.long 0x00 09. " TIM1 ,Timer 1 Interrupt Mask" "yes,no"
bitfld.long 0x00 08. " TIM0 ,Timer 0 Interrupt Mask" "yes,no"
textline " "
bitfld.long 0x00 07. " AAEOC ,Application Accelerator End-Of-Chain Interrupt Mask" "yes,no"
bitfld.long 0x00 06. " AAEOT ,Application Accelerator End-Of-Transfer Interrupt Mask" "yes,no"
bitfld.long 0x00 03. " DMA1EOC ,DMA Channel 1 End-Of-Chain Interrupt Mask" "yes,no"
bitfld.long 0x00 02. " DMA1EOT ,DMA Channel 1 End-Of-Transfer Interrupt Mask" "yes,no"
bitfld.long 0x00 01. " DMA0EOC ,DMA Channel 0 End-Of-Chain Interrupt Mask" "yes,no"
bitfld.long 0x00 00. " DMA0EOT ,DMA Channel 0 End-Of-Transfer Interrupt Mask" "yes,no"
group asd:0xffffe794++0x03
line.long 0x00 "INTCTL1,Interrupt Control Register 1"
bitfld.long 0x00 31. " HPI# ,HPI# Interrupt Mask" "yes,no"
bitfld.long 0x00 30. " MUE ,Messaging Unit Error Interrupt Mask" "yes,no"
bitfld.long 0x00 28. " AAUE ,Application Accelerator Unit Error Interrupt Mask" "yes,no"
bitfld.long 0x00 26. " DMA1E ,DMA Channel 1 Error Interrupt Mask" "yes,no"
bitfld.long 0x00 25. " DMA0E ,DMA Channel 0 Error Interrupt Mask" "yes,no"
bitfld.long 0x00 24. " MCUE ,Memory Controller Unit Error Interrupt Mask" "yes,no"
bitfld.long 0x00 23. " ATUE ,ATU Error Interrupt Mask" "yes,no"
textline " "
bitfld.long 0x00 22. " ATUCW ,ATU Configuration Register Write Interrupt Mask" "yes,no"
bitfld.long 0x00 21. " PBUE ,Peripheral Bus Unit Error Interrupt Mask" "yes,no"
bitfld.long 0x00 20. " UART1 ,UART 1 Interrupt Mask" "yes,no"
bitfld.long 0x00 19. " UART0 ,UART 0 Interrupt Mask" "yes,no"
bitfld.long 0x00 07. " XINT15# ,XINT15# Interrupt Mask" "yes,no"
bitfld.long 0x00 06. " XINT14# ,XINT14# Interrupt Mask" "yes,no"
textline " "
bitfld.long 0x00 05. " XINT13# ,XINT13# Interrupt Mask" "yes,no"
bitfld.long 0x00 04. " XINT12# ,XINT12# Interrupt Mask" "yes,no"
bitfld.long 0x00 03. " XINT11# ,XINT11# Interrupt Mask" "yes,no"
bitfld.long 0x00 02. " XINT10# ,XINT10# Interrupt Mask" "yes,no"
bitfld.long 0x00 01. " XINT9# ,XINT9# Interrupt Mask" "yes,no"
bitfld.long 0x00 00. " XINT8# ,XINT8# Interrupt Mask" "yes,no"
group asd:0xffffe798++0x03
line.long 0x00 "INTCTL0,Interrupt Steering Register 0"
bitfld.long 0x00 27. " XINT3# ,XINT3# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 26. " XINT2# ,XINT2# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 25. " XINT1# ,XINT1# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 24. " XINT0# ,XINT0# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 16. " PMU ,Intel XScale Core PMU Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 15. " PPM ,Peripheral Performance Monitor Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 14. " ASB ,ATU/Start BIST Interrupt Steering" "IRQ,FIQ"
textline " "
bitfld.long 0x00 13. " MUIPQ ,Messaging Unit Inbound Post Queue Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 12. " MU ,Messaging Unit Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 11. " I2C1 ,I2C Bus Interface 1 Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 10. " I2C0 ,I2C Bus Interface 0 Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 09. " TIM1 ,Timer 1 Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 08. " TIM0 ,Timer 0 Interrupt Steering" "IRQ,FIQ"
textline " "
bitfld.long 0x00 07. " AAEOC ,Application Accelerator End-Of-Chain Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 06. " AAEOT ,Application Accelerator End-Of-Transfer Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 03. " DMA1EOC ,DMA Channel 1 End-Of-Chain Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 02. " DMA1EOT ,DMA Channel 1 End-Of-Transfer Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 01. " DMA0EOC ,DMA Channel 0 End-Of-Chain Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 00. " DMA0EOT ,DMA Channel 0 End-Of-Transfer Interrupt Steering" "IRQ,FIQ"
group asd:0xffffe79c++0x03
line.long 0x00 "INTCTL1,Interrupt Steering Register 1"
bitfld.long 0x00 31. " HPI# ,HPI# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 30. " MUE ,Messaging Unit Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 28. " AAUE ,Application Accelerator Unit Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 26. " DMA1E ,DMA Channel 1 Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 25. " DMA0E ,DMA Channel 0 Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 24. " MCUE ,Memory Controller Unit Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 23. " ATUE ,ATU Error Interrupt Steering" "IRQ,FIQ"
textline " "
bitfld.long 0x00 22. " ATUCW ,ATU Configuration Register Write Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 21. " PBUE ,Peripheral Bus Unit Error Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 20. " UART1 ,UART 1 Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 19. " UART0 ,UART 0 Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 07. " XINT15# ,XINT15# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 06. " XINT14# ,XINT14# Interrupt Steering" "IRQ,FIQ"
textline " "
bitfld.long 0x00 05. " XINT13# ,XINT13# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 04. " XINT12# ,XINT12# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 03. " XINT11# ,XINT11# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 02. " XINT10# ,XINT10# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 01. " XINT9# ,XINT9# Interrupt Steering" "IRQ,FIQ"
bitfld.long 0x00 00. " XINT8# ,XINT8# Interrupt Steering" "IRQ,FIQ"
group asd:0xffffe7a0++0x03
line.long 0x00 "IINTSRC0,IRQ Interrupt Source Register 0"
bitfld.long 0x00 27. " XINT3# ,XINT3# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 26. " XINT2# ,XINT2# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 25. " XINT1# ,XINT1# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 24. " XINT0# ,XINT0# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 16. " PMU ,Intel XScale Core PMU Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 15. " PPM ,Peripheral Performance Monitor Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 14. " ASB ,ATU/Start BIST Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 13. " MUIPQ ,Messaging Unit Inbound Post Queue Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 12. " MU ,Messaging Unit Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 11. " I2C1 ,I2C Bus Interface 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 10. " I2C0 ,I2C Bus Interface 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 09. " TIM1 ,Timer 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 08. " TIM0 ,Timer 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 07. " AAEOC ,Application Accelerator End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 06. " AAEOT ,Application Accelerator End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 03. " DMA1EOC ,DMA Channel 1 End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 02. " DMA1EOT ,DMA Channel 1 End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 01. " DMA0EOC ,DMA Channel 0 End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 00. " DMA0EOT ,DMA Channel 0 End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
group asd:0xffffe7A4++0x03
line.long 0x00 "IINTSRC1,IRQ Interrupt Source Register 1"
bitfld.long 0x00 31. " HPI# ,HPI# Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 30. " MUE ,Messaging Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 28. " AAUE ,Application Accelerator Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 26. " DMA1E ,DMA Channel 1 Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 25. " DMA0E ,DMA Channel 0 Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 24. " MCUE ,Memory Controller Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 23. " ATUE ,ATU Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 22. " ATUCW ,ATU Configuration Register Write Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 21. " PBUE ,Peripheral Bus Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 20. " UART1 ,UART 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 19. " UART0 ,UART 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 07. " XINT15# ,XINT15# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 06. " XINT14# ,XINT14# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 05. " XINT13# ,XINT13# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 04. " XINT12# ,XINT12# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 03. " XINT11# ,XINT11# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 02. " XINT10# ,XINT10# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 01. " XINT9# ,XINT9# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 00. " XINT8# ,XINT8# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
group asd:0xffffe7a8++0x03
line.long 0x00 "FINTSRC0,FIQ Interrupt Source Register 0"
bitfld.long 0x00 27. " XINT3# ,XINT3# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 26. " XINT2# ,XINT2# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 25. " XINT1# ,XINT1# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 24. " XINT0# ,XINT0# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 16. " PMU ,Intel XScale Core PMU Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 15. " PPM ,Peripheral Performance Monitor Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 14. " ASB ,ATU/Start BIST Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 13. " MUIPQ ,Messaging Unit Inbound Post Queue Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 12. " MU ,Messaging Unit Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 11. " I2C1 ,I2C Bus Interface 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 10. " I2C0 ,I2C Bus Interface 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 09. " TIM1 ,Timer 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 08. " TIM0 ,Timer 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 07. " AAEOC ,Application Accelerator End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 06. " AAEOT ,Application Accelerator End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 03. " DMA1EOC ,DMA Channel 1 End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 02. " DMA1EOT ,DMA Channel 1 End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 01. " DMA0EOC ,DMA Channel 0 End-Of-Chain Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 00. " DMA0EOT ,DMA Channel 0 End-Of-Transfer Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
group asd:0xffffe7ac++0x03
line.long 0x00 "IINTSRC1,FIQ Interrupt Source Register 1"
bitfld.long 0x00 31. " HPI# ,HPI# Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 30. " MUE ,Messaging Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 28. " AAUE ,Application Accelerator Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 26. " DMA1E ,DMA Channel 1 Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 25. " DMA0E ,DMA Channel 0 Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 24. " MCUE ,Memory Controller Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 23. " ATUE ,ATU Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 22. " ATUCW ,ATU Configuration Register Write Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 21. " PBUE ,Peripheral Bus Unit Error Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 20. " UART1 ,UART 1 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 19. " UART0 ,UART 0 Interrupt" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 07. " XINT15# ,XINT15# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 06. " XINT14# ,XINT14# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 05. " XINT13# ,XINT13# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 04. " XINT12# ,XINT12# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 03. " XINT11# ,XINT11# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
textline " "
bitfld.long 0x00 02. " XINT10# ,XINT10# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 01. " XINT9# ,XINT9# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
bitfld.long 0x00 00. " XINT8# ,XINT8# Interrupt Mask" "NoInt/NoSte/Msk,Int&Ste&UnMsk"
group asd:0xffffe7b0++0x03
line.long 0x00 "IPR0,Interrupt Priority Register 0"
bitfld.long 0x00 30.--31. " PPM ,Peripheral Performance Monitor Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 28.--29. " ASB ,ATU/Start BIST Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 26.--27. " MUIPQ ,Messaging Unit Inbound Post Queue Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 24.--25. " MU ,Messaging Unit Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 22.--23. " I2C1 ,I2C Bus Interface 1 Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 20.--21. " I2C0 ,I2C Bus Interface 0 Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 18.--19. " TIM1 ,Timer 1 Interrupt Priority" "High,MedHi,MedLo,Low"
textline " "
bitfld.long 0x00 16.--17. " TIM0 ,Timer 0 Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 14.--15. " AAEOC ,Application Accelerator End-Of-Chain Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 12.--13. " AAEOT ,Application Accelerator End-Of-Transfer Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 06.--07. " DMA1EOC ,DMA Channel 1 End-Of-Chain Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 04.--05. " DMA1EOT ,DMA Channel 1 End-Of-Transfer Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 02.--03. " DMA0EOC ,DMA Channel 0 End-Of-Chain Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 00.--01. " DMA0EOT ,DMA Channel 0 End-Of-Transfer Interrupt Priority" "High,MedHi,MedLo,Low"
group asd:0xffffe7b4++0x03
line.long 0x00 "IPR1,Interrupt Priority Register 1"
bitfld.long 0x00 22.--23. " XINT3# ,XINT3# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 20.--21. " XINT2# ,XINT3# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 18.--19. " XINT1# ,XINT3# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 16.--17. " XINT0# ,XINT3# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 00.--01. " PMU ,Intel XScale Core PMU Interrupt Priority" "High,MedHi,MedLo,Low"
group asd:0xffffe7b8++0x03
line.long 0x00 "IPR2,Interrupt Priority Register 2"
bitfld.long 0x00 14.--15. " XINT15# ,XINT15# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 12.--13. " XINT14# ,XINT14# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 10.--11. " XINT13# ,XINT13# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 08.--09. " XINT12# ,XINT12# Interrupt Priority" "High,MedHi,MedLo,Low"
textline " "
bitfld.long 0x00 06.--07. " XINT11# ,XINT11# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 04.--05. " XINT10# ,XINT10# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 02.--03. " XINT09# ,XINT09# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 00.--01. " XINT08# ,XINT08# Interrupt Priority" "High,MedHi,MedLo,Low"
group asd:0xffffe7bc++0x03
line.long 0x00 "IPR3,Interrupt Priority Register 3"
bitfld.long 0x00 30.--31. " HPI# ,HPI# Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 28.--29. " MUE ,Messaging Unit Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 24.--25. " AAUE ,Application Accelerator Unit Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 20.--21. " DMA1E ,DMA Channel 1 Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 18.--19. " DMA0E ,DMA Channel 0 Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 16.--17. " MCUE ,Memory Controller Unit Error Interrupt Priority" "High,MedHi,MedLo,Low"
textline " "
bitfld.long 0x00 14.--15. " ATUE ,ATU Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 12.--13. " ATUCW ,ATU Configuration Register Write Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 10.--11. " PBUE ,Peripheral Bus Unit Error Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 08.--09. " UART1 ,UART 1 Interrupt Priority" "High,MedHi,MedLo,Low"
bitfld.long 0x00 06.--07. " UART0 ,UART 0 Interrupt Priority" "High,MedHi,MedLo,Low"
group asd:0xffffe7c0++0x03
line.long 0x00 "INTBASE,Interrupt Base Register"
hexmask.long 0x00 08.--31. 1. " IntBase ,Interrupt Base"
group asd:0xffffe7c4++0x03
line.long 0x00 "INTSIZE,Interrupt Size Register"
bitfld.long 0x00 00.--03. " ISRSize ,ISR Memory Range Size(ISR Range Size/ISR Size(per Source)" "Dis,256B/4B,512B/8B,1KB/16B,2KB/32B,4KB/64B,8KB/128B,16KB/256B,32KB/512B,64KB/1KB,128KB/2KB,256KB/4KB,512KB/8KB,1MB/16KB,2MB/32KB,4MB/64KB"
group asd:0xffffe7c8++0x03
line.long 0x00 "IINTVEC,IRQ Interrupt Vector Register"
group asd:0xffffe7cc++0x03
line.long 0x00 "FINTVEC,FIQ Interrupt Vector Register"
group asd:0xFFFFE1EC++0x03
line.long 0x00 "PIRSR,PCI Interrupt Routing Select Register"
bitfld.long 0x00 03. " XINT3# ,XINT3# Select Bit" "P_INTD#,XINT3#"
bitfld.long 0x00 02. " XINT2# ,XINT2# Select Bit" "P_INTC#,XINT2#"
bitfld.long 0x00 01. " XINT1# ,XINT1# Select Bit" "P_INTB#,XINT1#"
bitfld.long 0x00 00. " XINT0# ,XINT0# Select Bit" "P_INTA#,XINT0#"
tree.end
; --------------------------------------------------------------------------------
; 80312, 80321,80331,
; State: ok
; --------------------------------------------------------------------------------
tree "GPIO Registers"
; --------------------------------------------------------------------------------
group asd:(0xFFFFF780+0x00)++0x03
line.long 0x00 "GPOE,GPIO Output Enable Register"
bitfld.long 0x00 7.--7. " GPIO7 ,GPIO7 Output Enable" "Out,In"
bitfld.long 0x00 6.--6. " GPIO6 ,GPIO6 Output Enable" "Out,In"
bitfld.long 0x00 5.--5. " GPIO5 ,GPIO5 Output Enable" "Out,In"
bitfld.long 0x00 4.--4. " GPIO4 ,GPIO4 Output Enable" "Out,In"
textline " "
bitfld.long 0x00 3.--3. " GPIO3 ,GPIO3 Output Enable" "Out,In"
bitfld.long 0x00 2.--2. " GPIO2 ,GPIO2 Output Enable" "Out,In"
bitfld.long 0x00 1.--1. " GPIO1 ,GPIO1 Output Enable" "Out,In"
bitfld.long 0x00 0.--0. " GPIO0 ,GPIO0 Output Enable" "Out,In"
group asd:(0xFFFFF780+0x04)++0x03
line.long 0x00 "GPID,GPIO Input Data Register"
bitfld.long 0x00 7.--7. " GPIO7 ,GPIO7 Input Data" "L,H"
bitfld.long 0x00 6.--6. " GPIO6 ,GPIO6 Input Data" "L,H"
bitfld.long 0x00 5.--5. " GPIO5 ,GPIO5 Input Data" "L,H"
bitfld.long 0x00 4.--4. " GPIO4 ,GPIO4 Input Data" "L,H"
textline " "
bitfld.long 0x00 3.--3. " GPIO3 ,GPIO3 Input Data" "L,H"
bitfld.long 0x00 2.--2. " GPIO2 ,GPIO2 Input Data" "L,H"
bitfld.long 0x00 1.--1. " GPIO1 ,GPIO1 Input Data" "L,H"
bitfld.long 0x00 0.--0. " GPIO0 ,GPIO0 Input Data" "L,H"
group asd:(0xFFFFF780+0x08)++0x03
line.long 0x00 "GPOD,GPIO Output Data Register"
bitfld.long 0x00 7.--7. " GPIO7 ,GPIO7 Output Data" "L,H"
bitfld.long 0x00 6.--6. " GPIO6 ,GPIO6 Output Data" "L,H"
bitfld.long 0x00 5.--5. " GPIO5 ,GPIO5 Output Data" "L,H"
bitfld.long 0x00 4.--4. " GPIO4 ,GPIO4 Output Data" "L,H"
textline " "
bitfld.long 0x00 3.--3. " GPIO3 ,GPIO3 Output Data" "L,H"
bitfld.long 0x00 2.--2. " GPIO2 ,GPIO2 Output Data" "L,H"
bitfld.long 0x00 1.--1. " GPIO1 ,GPIO1 Output Data" "L,H"
bitfld.long 0x00 0.--0. " GPIO0 ,GPIO0 Output Data" "L,H"
tree.end
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